Question Bank in Microprocessors & Applications I. Internal Architecture & Functional Description of 8085

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E.C.E.

GROUP
Dept, of E.C.E.; S.R.K.R. ENGG. COLLEGE; Bhimavaram

Question Bank in MICROPROCESSORS & APPLICATIONS

I. Internal Architecture & Functional Description of 8085.

1) Draw the functional diagram of INTEL 8085 microprocessor & explain


each block.
2) With the help of Pin Configuration of 8085, explain the function of each
pin.
3) Explain the interrupt system in 8085 with neat diagram

4) Explain how SIM & RIM instructions are used in 8085 interrupt system?
5) Define T –state, Machine cycle and Instruction cycle? What is instruction cycle?
Explain various phases. Draw the timing diagram for the following instructions
I. INR M
II. IN 8bit Address
III. OUT 8bit address
IV. SHLD 16 bit number
V. PUSH PSW
VI. POP D
VII. CALL 16bit address
VIII. RET
II) Programming 8085:

1) Classify the instruction set of 8085.

2) Explain the addressing modes of 8085 with two examples in each case.
3) What is subroutine and explain how subroutines are used in 8085
programming using CALL and RET instructions.
4) Explain the differences between Interrupt service Routine and Subroutine.
5) Explain how serial data transfer is performed in 8085 using SIM & RIM
instructions
6) Explain the operation, addressing mode used ,how flags will be affected
and no. of clock cycles required during the execution of the following instructions
a)DAA b)DCX H c)INR M d)XCHG d)XTHL e) SPHL f)PCHL g) DAD B
h)LHLD address i) LDAX B j) STAX D k) RAL l) RLC m) RAR n)RRC o) CMP
M p)SUI 8 bit data q) SBI 8 bit data r ) ADI 8bit data s) ACI 8 bit data t)ORI 8bit
data u) XRI 8bitdata v) ANA M
7) Explain the following;

i) Flag Register of 8085.


ii) Instructions related to stack operations
III) Interfacing Semi conductor memory devices to 8085:

1) Explain memory mapped I/O and I/O mapped I/O and compare their merits
demerits.
2) Explain the differences between RAM & ROM
3) Explain the differences between Static RAM & Dynamic RAM.
4) Design an interface and address decoding logic to interface 2 K x 8 RAM
from 0000H onwards and 4K x 8 EPROM from F000H onwards to 8085 to access
words as well as bytes. Let SRAM 2142 (1K x 4), EPROM 2716 (2KX8).

IV) Interfacing I/O devices to 8085.


1) Draw and explain the functional block diagram in detail for the following
programmable chips
a)8255 PPI b)8253 PTI c)8251 USART d) 8279 Keyboard/Display interface device
2) Explain in detail I/O features of 8255 in various modes of operation
3) Explain various modes of 8253 Counters with the help of waveforms and give its
applications

V) Elementary Concepts of 16 & 32 Bit Microprocessors:


1) Draw the internal block diagram of 8086 and explain its architecture

2) Explain about memory segmentation in 8086.

3) State and explain the enhanced features of higher end microprocessors by comparing

with 8086.
4) Draw the pin configuration of 8086 and distinguish between minimum and maximum

modes.
5) Explain about the various addressing modes of 8086.

6) Draw and explain the Programmable register array of all INTEL Microprocessors.

7) Write short notes on memory banks of all INTEL Microprocessors.

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