Tisp4Xxxj1Bj Overvoltage Protector Series
Tisp4Xxxj1Bj Overvoltage Protector Series
Tisp4Xxxj1Bj Overvoltage Protector Series
VDRM V(BO)
Device
V V
Device Symbol
TISP4070J1 58 70
TISP4080J1 65 80 MT2
TISP4095J1 75 95
TISP4115J1 90 115
TISP4125J1 100 125
TISP4145J1 120 145
TISP4165J1 135 165
TISP4180J1 145 180 MT1 SD4JAA
TISP4200J1 155 200
Rated for International Surge Wave Shapes
TISP4219J1 180 219
TISP4250J1 190 250 IPPSM
Wave Shape Standard
TISP4290J1 220 290 A
TISP4350J1 275 350
2/10 GR-1089-CORE 1000
TISP4395J1 320 395
8/20 IEC 61000-4-5 800
10/160 TIA/EIA-IS-968 (FCC Part 68) 400
10/700 ITU-T K.20/21/45 350
10/560 TIA/EIA-IS-968 (FCC Part 68) 300
10/1000 GR-1089-CORE 200
Description
The TISP4xxxJ1BJ is a symmetrical voltage-triggered bidirectional thyristor device which has been designed as the tail (ground return) element
of a Y circuit configured protector. As such, the TISP4xxxJ1BJ must be rated to conduct the sum of the TIP and RING currents. For example,
the normal GR-1089-CORE testing can impose 200 A, 10/1000 and 1000 A, 2/10 on the ground return element of the Y configuration. Using the
TISP4xxxJ1BJ together with two TISP4xxxH3BJ parts gives a 2x 100 A, 10/1000 Y protector circuit. For ITU-T applications, using the
TISP4xxxJ1BJ with a TISP3xxxT3BJ gives a coordinated Y protector with a 2x 120 A, 5/310 capability. Design tables are given in the
Applications Information section. These SMB package combinations are often more space efficient than single package Y protection multi-chip
integrations.
How To Order
Device Package Carrier Order As
TISP4xxxJ1BJ BJ (SMB/DO-214AA J-Bend) R (Embossed Tape Reeled) TISP4xxxJ1BJR
These devices allow signal voltages, without clipping, up to the maximum off-state voltage value, VDRM, see Figure 1. Voltages above VDRM are
limited and will not exceed the breakover voltage, V(BO), level. If sufficient current flows from the overvoltage, the device switches into a low-
voltage on-state condition, which diverts the current from the overvoltage though the device. When the diverted current falls below the holding
current, IH, level the devices switches off and restores normal system operation.
Thermal Characteristics
+i Quadrant I
ITSP
Switching
Characteristic
ITSM
IT
V(BO)
VT
I(BO)
IH
VDRM VD ID IDRM
-v +v
IDRM ID VD VDRM
IH
I(BO)
VT
V(BO)
IT
ITSM
Quadrant III
Switching ITSP
Characteristic -i PMXXAAB
Typical Characteristics
10 1.10
1 1.05
0·1 1.00
0·01 0.95
0·001 0.90
-25 0 25 50 75 100 125 150 -25 0 25 50 75 100 125 150
TJ - Junction Temperature - °C TJ - Junction Temperature - °C
Figure 2. Figure 3.
ON-STATE CURRENT NORMALISED HOLDING CURRENT
vs vs
ON-STATE VOLTAGE JUNCTION TEMPERATURE TC4JAD
TC4JAA 2.0
400
300 TA = 25 °C
200 tW = 100 µs
150 1.5
100
Normalised Holding Current
IT - On-State Current - A
70
50
40
1.0
30
0.9
20
15 0.8
10 0.7
7
5 0.6
4
3
0.5
2
1.5
1 0.4
0.7 1 1.5 2 3 4 5 7 10 15 -25 0 25 50 75 100 125 150
VT - On-State Voltage - V TJ - Junction Temperature - °C
Figure 4. Figure 5.
Typical Characteristics
0.7 80
0.6
70
0.5 ∆C = Coff(-2 V) - Coff(-50 V)
0.4
60
0.3
50
0.2 40
0.5 1 2 3 5 10 20 30 50 100150 50 60 70 80 90100 150 200 250 300 350
VD - Off-state Voltage - V VDRM - Repetitive Peak Off-State Voltage - V
Figure 6. Figure 7.
NORMALISED CAPACITANCE ASYMMETRY
vs
OFF-STATE VOLTAGE
TC4JCC
2.5
Vd = 10 mV rms, 1 MHz
Normalised Capacitance Asymmetry — %
2.0
1.5
0.5
0.0
0.5 0.7 1 2 3 4 5 7 10 20 30 4050
VD — Off-State Voltage — V
Figure 8.
30
RGEN = 1.4*VGEN/ITSM(t) 0.99
EIA/JESD51-2 ENVIRONMENT
20 EIA/JESD51-3 PCB
TA = 25 °C 0.98
15 '4125
Derating Factor
THRU
0.97 '4219
10 '4070
9 THRU
8 '4115
7 0.96
6
5 0.95
4
3 0.94 '4250
THRU
'4395
2 0.93
0·1 1 10 100 1000 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25
t - Current Duration - s TAMIN - Minimum Ambient Temperature - °C
Figure 9. Figure 10.
APPLICATIONS INFORMATION
Y Configuration Design
This protection configuration has three modes of protection. The RING to TIP terminal pair protection is given by the series combination of
protectors Th1a and Th1b, see Figure 11. The terminal pair protection voltage will be the sum of the V(BO), breakover voltage, of Th1a and the
V(BO) of Th1b. Protectors Th1a and Th1b are the same device type and the terminal pair protection voltage will be 2V(BO)1. For a terminal pair
protection voltage of ±400 V, Th1a and Th1b would have V(BO)1 = ±400/2 = ±200 V.
Similarly for the other terminal pairs, RING to GROUND protection is given by the series combination of Th1b and Th2 and the terminal pair
protection voltage is V(BO)1 + V(BO)2. TIP to GROUND protection voltage will also be V(BO)1 + V(BO)2.
The maximum terminal pair voltage before clipping might occur is the sum of the protector VDRM, off-state voltages, see Figure 12. For RING to
TIP this will be 2VDRM1. The ±200 V V(BO)1 protectors of the previous example have a VDRM of ±155 V, giving a maximum non-clipping signal
voltage of ±310 V. For RING to GROUND and TIP to GROUND terminal pairs, the maximum non-clipping signal voltage will be VDRM1 + VDRM2.
Under longitudinal surge conditions, when the prospective currents of the line conductors, IRING and ITIP, are equal, Th2, the ground return
protector, carries the sum of the Th1a and Th1b currents, see Figure 13. The current rating of Th2 must be twice that of Th1a and Th1b.
PROTECTED SIDE
V(BO)1 V(BO)1 VDRM1 VDRM1 Th1a Th1b
AI4JAA
AI4JAC AI4JAB
Figure 11. Protection Voltage Figure 12. Off-State Voltage Figure 13. Current Flow
GR-1089-CORE Designs
The main impulse waveforms of the standard are 500 A, 2/10 and 100 A, 10/1000. Assuming fuse current limiters, F1a and F1b, a suitable Th1a
and Th1b protector for these conductor currents is the TISP4xxxH3BJ series of devices. The ground return protector, Th2, must be rated for at
least 1000 A,2/10 and 200 A, 10/1000. A suitable Th2 protector for these ground currents is the TISP4xxxJ1BJ series of devices. This
arrangement is shown in Figure 14 and the following table lists all the catalogue device combinations.
F1b R1b
RING RING
Th2 Th2
TISP4xxxJ1BJ TISP4xxxJ1BJ
AI4JAD AI4JAE
Figure 14. GR-1089-CORE Design Figure 15. Coordinated ITU-T K recommendation Design
T1
TIP F1b
RING
C1 TIP F1a
Voltage C1
Limit
Th1a Th1b
TISP4165H3BJ TISP4165H3BJ
RING
T1 or PW Th2
Insulation TISP4350J1BJ
Breakdown
AI4JAH
Figure 16. ADSL Modem Interface Voltage Limitations Figure 17. Asymmetrical Design for US ADSL modems
An ITU-T compliant design would probably require the replacement of the fuses by coordination resistors. With a ±410 V off-state voltage, this
may seem unnecessary as modern primary protectors will switch at lower voltages and so automatically coordinate. On a perfect longitudinal
waveform this is true. However, the ITU-T also applies a transverse (metallic) test, as well, to simulate non-simultaneous switching of the primary
protection. In this case, one conductor is grounded, which places the RING to TIP protection is in parallel with the unswitched primary protector.
The ±270 V off-state voltage is likely to be lower than the primary switching voltage and there isn’t coordination. Under GR-1089-CORE
conditions with non-simultaneous switching, the 100 A 10/1000 current, which should have gone through the unswitched primary protector, is
diverted through the top arms of the Y into the switched primary, causing a 200 A current flow in that primary protector.
MECHANICAL DATA
2,54 [.100]
2,40 [.095]
2,16 [.085]
MDXXBIB
Device Symbolization Code
Devices will be coded as below. As the device parameters are symmetrical, terminal 1 is not identified.
MECHANICAL DATA
SMB
4,57 [.180]
4,06 [.160]
3,94 [.155]
2
3,30 [.130]
Index
Mark
(if needed)
2,40 [.095]
2,00 [.079]
0,20 [.008]
1,52 [.060] 2,10 [.083] 0,10 [.004] 2,32 [.091]
0,76 [.030] 1,90 [.075] 1,96 [.077]
5,59 [.220]
5,21 [.205]
MDXXBHAB
MECHANICAL DATA
Tape Dimensions
5,45 - 5,55
(.215 - .219) 11,70 - 12,30
(.461 - .484) 8,20
MAX.
(.323)
Typical component
Index cavity centre line
Mark
(if needed) Typical component
centre line
NOTES: A. The clearance between the component and the cavity must be within 0,05 mm (.002 in) MIN. to 0,65 mm (.026 in) MDXXBJA
MAX. so that the component cannot rotate more than 20° within the determined cavity.