MIN1072M

MinE-CAP
Bulk Capacitor Miniaturization and Inrush Management
IC for Very High Power Density AC/DC Converters

Product Highlights
CLV
• Up to 50% volume reduction of input bulk capacitors (E-CAPs)
• Eliminates inrush NTC
• Significantly reduces i2t stress on the input bridge rectifier and fuse
• Partners with the InnoSwitch™ IC family for lowest component count CHV

VBOT
VTOP
~

FWD

GND
BPS
ultra-compact AC/DC converters

SR
D L D V IS

MinE-CAP VOUT

Advanced Protection / Safety Features

• Integrated temperature sensing and hysteretic thermal shutdown S BP S BPP
InnoSwitch3-CP

• Input surge protection PI-9208-100720

• Pin open/short-circuit and E-CAP UV/OV fault reporting

Figure 1. Typical Application Schematic.
Applications
• High power density universal input AC-DC converters
• Applications with very wide input range (90 – 350+ VAC)
180
Description

PI-9209-110220
170
The MinE-CAP™ IC dramatically shrinks the size of input bulk capacitors 160 ge
an
without compromising output ripple, operating efficiency or requiring
150
c eR
140 tan
redesign of the transformer. When compared to traditional techniques aci
130 ap
nge
Capacitance (µF)

C
such as very high switching frequency operation, MinE-CAP achieves 120 ulk Ra
talB
V CL
110 V
the same or greater overall power supply size reduction whilst avoiding To
the challenges of complex EMI filtering and the increased transformer/ 100 160
90
clamp dissipation associated with very high frequency designs. 80
70
MinE-CAP also precisely manages inrush current at AC turn-on,
60
eliminating the need for dissipative NTCs or large slow-blow fuses. 50
40
Figure 1 illustrates, the circuit configuration when using MinE-CAP. 30
The input E-CAPs are arranged with a small high-voltage capacitor (CHV nge
20
400 V CHV Ra
typically 400 V) in parallel with a low-voltage capacitor (CLV typically 10
160 V) connected in series with the MinE-CAP IC. The physical size of 0
the input capacitors is minimized because a high percentage of the 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100
input capacitance is 160 V rated rather than 400 V as would normally Output Power (W)
be used in conventional universal input converters.
Figure 2. Typical Component Value Ranges for Optimal Space Saving and
MinE-CAP can also be used in applications requiring extended Converter Operation.
wide-range input (90 VAC to 350+VAC), again with a high percentage
of the input capacitance 160 V rated along with either stacked 400 V or
500-600 V rated capacitors of much smaller value than would normally
be required.
During steady state-operation MinE-CAP introduces CLV into the circuit
at low AC line voltage when maximum input capacitance is required.
To achieve this, MinE-CAP monitors the input rail and voltage across CLV
to dynamically engage and disengage this capacitor during every AC
line cycle as required to ensure that the power supply operates
smoothly across the entire specified input voltage range.
Figure 3. MIN1072M MinSOP-16A Package.
The selection chart of Figure 2 illustrates the recommended range of
CHV and CLV values to achieve the required total input capacitance for a
given output power.
EMI filter configurations can be adopted depending on the form factor
CLV is an electrolytic capacitor while CHV can be selected as an of a particular application. The MinE-CAP IC is designed to partner
electrolytic or ceramic. Ceramic capacitors in the range of 1 to 5 mF directly with the InnoSwitch family of power supply ICs with a minimum
400 V (depending on power level) have very low esr and typically offer of external components. The existing InnoSwitch V pin resistor is
the most space saving when the power supply is designed to connected to the MinE-CAP VTOP pin while a resistor connected to the
accommodate ceramic capacitor characteristics (see Applications VBOT pin enables CLV voltage monitoring. Input voltage and fault
Considerations section). 400 V electrolytic capacitors are lower cost information is transmitted from the MinE-CAP LINE (L) pin to the
and when selected according to Figure 2 also provide up to 50% size InnoSwitch V pin with no additional components. The MinE-CAP IC
reduction compared to traditional designs. A variety of standard input also derives its bias supply directly from the InnoSwitch BPP pin.

www.power.com November 2020

This Product is Covered by Patents and/or Pending Patent Applications.
 MinE-CAP

D VTOP VBOT

BP
BP REGULATOR

L
LINE INTERFACE

Gate
BP
DIGITAL
CONTROLLER
Driver
BP/UV

THERMAL
SHUTDOWN

PI-9216-082520
S

Figure 4. MinE-CAP IC Block Diagram.

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 MinE-CAP

Pin Functional Description VTOP Pin (Pin 8)

A high-voltage pin connected to the DC side of the input bridge
VBOT Pin (Pin 1) rectifier for monitoring bulk voltage information. A high-voltage
A high-voltage pin connected to the drain of the MinE-CAP IC. A switch is opened when the InnoSwitch IC is not sensing line
high-voltage switch is closed when the MinE-CAP IC is operated in information to reduce power consumption. RTOP resistor connected
trickle-charge mode. A 1 MW resistor is tied between this pin and the between VBUS and V TOP pin must be selected as per design line OV/UV
negative end of the LV capacitor. requirements. In systems using InnoSwitch, this RTOP resistor
No Connect (NC) Pin (Pin 2) corresponds to the resistor used on V pin.
Leave open. Should not be connected to any other pins or traces. GND Pin (Pin 9 - 10)
SIGNAL GROUND (SG) Pins (Pins 3, 6) These pins must be connected to the SOURCE pin.
This pin is signal ground for the digital controller. Must be externally SOURCE (S) Pin (Pin 11)
connected to S pin. This pin is the power switch source connection.
BYPASS (BP) Pin (Pin 4) DRAIN (D) Pin (Pin 16)
It is the connection point for an external bypass capacitor for the IC This pin is the power switch drain connection.
supply. Must be supplied by the BPP pin of the InnoSwitch IC or
other external supply.
LINE (L) Pin (Pin 5)
This pin connects to the V pin of the InnoSwitch IC and is used to VBOT 1 16 D
provide bulk capacitor voltage, start-up and fault information to the NC 2
SG 3 MIN1072M
InnoSwitch IC. BP 4 YYWW
L 5 11 S
NO CONNECT (NC) Pin (Pin 7) SG 6 %%7654321A
Leave open. Should not be connected to any other pins or traces. NC 7 10 GND
VTOP 8 9 GND

PI-8987-082120

Figure 5. Pin Configuration.

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 MinE-CAP

MinE-CAP Functional Description

The MinE-CAP IC comprises a digital controller and high-voltage VCLV
power switch which connected in series with a low-voltage (160 V)
bulk electrolytic capacitor in a power converter. The MinE-CAP IC
connects this low-voltage capacitor into the power supply at low input
line voltage conditions and disconnects it at high input line voltages.
A high-voltage (400 V) capacitor is connected in parallel to support
power delivery in high line conditions. The effective input capacitance
IDS
is equivalent the sum of CLV and CHV at low input line to maintain the
same minimum DC voltage to the DC/DC converter stage. At high
input line condition the switch is disabled to ensure the voltage
across CLV does not exceeded the rated voltage of the capacitor.
The MinE-CAP IC also includes a control signal transmitted from the
MinE-CAP LINE pin to control the start-up and fault shutdown of an
InnoSwitch IC via its V pin. Figure 4 illustrates the high level block VCLV
diagram.

Start-Up
Inrush Management
Upon application of AC input, the MinE-CAP controller is in the off- IDS
state and the power switch is open. The CLV is not engaged in the
circuit and only CHV is charged by the AC input. CHV is significantly PI-9217-082520
smaller than CLV and the inrush stress on the bridge rectifier and fuse
is therefore greatly reduced. The MinE-CAP IC then performs
Figure 6. Charging Algorithm used for Low-Line Start-Up.
controlled charging of CLV as described in the next section. This
controlled charging of the CLV allows MinE-CAP designs to eliminate
In high-line start-up condition (VIN > 150 VAC), the active charging
the inrush NTC, improving the overall system design by removing a
algorithm of CLV described above is not employed. When selected
thermal hotspot and increases conversion efficiency.
according to Figure 2, CHV alone can deliver full power converter
Power-Up output power at line voltages above 150 VAC. The InnoSwitch power
The MinE-CAP Bypass is derived externally through direct connection control IC is therefore enabled immediately using the V pin output
with the InnoSwitch BPP pin. Note that during this time, the signal while CLV is trickle charged at a lower rate until the steady-state
InnoSwitch IC is disabled from delivering power since the current CLV voltage is reached. The voltage across CLV is subsequently
received by the InnoSwitch V pin is IINJECT(UV) which is below brown-in precisely monitored and recharged as required depending on input
threshold of InnoSwitch (further details on V pin operation available line conditions.
in InnoSwitch data sheets).
Steady-State
Active Charging Power Switch Control Logic
Once the BYPASS (BP) pin reaches regulation the MinE-CAP controller The resistor connected to the VTOP pin is used to sense the line
waits for the bulk voltage to be above the MinE-CAP brown-in voltage. During normal operation the MinE-CAP IC is fully on while
threshold (IUV+) measured on the VTOP pin. After brown-in, the the bulk voltage remains below the user defined threshold (VCOV+).
controller enters a wait state for 20 ms to ensure power supply input
voltage levels have stabilized. After that time, the MinE-CAP IC VCOV± = ICOV± × RTOP
samples the bulk DC voltage to determine which of two possible CLV
where
charge up schemes to adopt as described below.
ICOV- = ICOV+ - ICOV(H)
In low-line start-up conditions (VIN < 150 VAC), the MinE-CAP IC
performs precisely controlled active charging of CLV. At low-line
In this condition CLV contributes to the output power delivery. Once
start-up condition, it is important to pre-charge CLV to support full
the bulk voltage reaches VCOV+, the MinE-CAP IC is turned off to
power capability prior to enabling the InnoSwitch. The MinE-CAP IC
maintain CLV below its rated voltage. In this state, only CHV is
controls the internal high-voltage switch as a current source and uses
contributing to output power delivery.
a precise constant current, pulse charging of CLV, see Figure 6. This
algorithm allows fast charging of CLV and ensures PSU is able to The MinE-CAP IC measures the VBOT pin voltage to determine if
deliver full power in less than 250 ms from initial AC line connection. voltage on CLV and CHV are equal. Once the DC bus voltage falls
below VCOV- and if the MinE-CAP IC determines CLV and CHV voltages
are equal (VBOT pin voltage close to 0 V), the MinE-CAP power
switch is turned on and CLV is reengaged as an energy source for the
power converter.
As such, the MinE-CAP IC is designed to turn on and off, engaging
and disengaging CLV during each AC line cycle, as may be required at
intermediate AC line voltages. Figure 7 summarizes the steady-state
control of the MinE-CAP power switch.

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 MinE-CAP

differential voltage across CLV, the MinE-CAP IC regulates the voltage

across CLV to within a predetermined range (V TRKLCHRG). This ensures
that during line dropout or load step, there is no impact on the power
Begin Steady-State supply power deliver capability. The MinE-CAP IC is designed with
extremely low off-state leakage current, much lower than the
self-leakage current of CLV, to ensure that the voltage across CLV does
not accumulate over time.

Yes Brown-Out
VTOP > VCOV?
If the bulk voltage falls below IUV- for ~500 ms the controller resets
and undergoes a normal start-up sequence.

Fault Handling
Disable MinE-CAP The MinE-CAP IC has built-in the following fault detection capabilities.
Power Switch No Fault communication to InnoSwitch is done via the LINE pin.

No Surge
Enable MinE-CAP The MinE-CAP IC has surge detection capability. If the power switch
Power Switch
is on and a surge event occurs, the power switch is disabled for 130 ms.
VTOP < VCOV? After the ~130 ms timer expires, the MinE-CAP IC returns to steady-
No
state operation. Surge information is not communicated to the
InnoSwitch IC.
Yes

Over-Temperature Protection
The MinE-CAP IC has thermal detection circuitry to maintain the
Yes
VBOT~= 0 V? MinE-CAP temperature below a safe level. In the event the MinE-CAP
PI-9215-082020 temperature exceeds TSD the part goes into thermal shutdown and
IINJECT(OV) is injected into the V pin of InnoSwitch IC. Once the
MinE-CAP temperature falls below TSD(H), the MinE-CAP controller is
reset and undergoes a normal start-up sequence.
Figure 7. Steady-State MinE-CAP Power Switch Control.
Pin Open/Short Faults
The MinE-CAP IC has pin open/short detection on VBOT and DRAIN
Trickle Charge Regulation pins. In the event of a pin fault, IINJECT(OV) is injected into the V pin of
InnoSwitch until the fault is removed. Subsequently, the MinE-CAP
During system conditions where the DC bus voltage constantly
controller is reset and undergoes a normal start-up sequence.
remains above VCOV+, e.g. during light load condition, the MinE-CAP IC
uses trickle charging algorithm to ensure there is sufficient charge on
CLV to support power delivery if required. By measuring the

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 MinE-CAP

Application Example

C4
3300 pF
760 VAC
R8
C21 C9 100 Ω
R1 R9 R10 10 µF 330 µF Q1 1%
3.9 MΩ 680 kΩ 680 kΩ FL1 FL4 35 V 25 V AONS32304 1/16 W VBUS
R7
R11 324 kΩ
20 Ω 1%
C6 C10 1/8 W C7
BR1 BR2 4700 pF 330 µF 10 µF
1 1
Z4DGP408L-HF Z4DGP408L-HF C2 250 V 25 V 35 V
R12 D1
100 µF D3 D2 C5 10 Ω BAV19WS-7-F
160 V R3 R13 DFLR1800-7
2 3 2 3
1.8 MΩ BAV21WS 2.2 nF 1%
20 Ω 800 V 200 V 1/16 W RTN
1% FL6 FL3
C8 C22 R14

AONS62922
4 4 FL2 330 µF 10 µF .006 Ω
25 V 35 V 1%

Q2
D4
BAV3004WS-7 1/2 W

AONS62922
R4 300 V
1 MΩ R5

Q3
2 MΩ T1
1% FL5 E32
R17
2 1 MinE-CAP 100 kΩ
L2 1%
U2

MMSZ5261BT1G
1/16 W
VBOT

VTOP
CMC MIN1072M
20 mH D

D5
4 3 GND CONTROL C15
10 µF
C1 63 V
GND
39 µF

MMBTA06LT1G
400 V
S SG L BP R16
C3

Q4
220 nF 47 Ω
560 V 1/10 W

R2 R6
2 MΩ 2 MΩ C13
1% 1% 2.2 µF
C12 10 V
DNP DNP 2.2 µF
10 V
3 4
L1
CMC R18
250 µH 5.1 kΩ PI-9146-100720

VOUT

VB/D
R19

GND
1/8 W

FWD
C14

BPS
SR
2.2 kΩ

IS
1 2 D V 2.2 µF
.01% 10 V
F1 1/10 W CONTROL uVCC
uVCC
2.5 A SDA
R22 R21
DZ2S100M0L

R20 SCL
10 kΩ 10 kΩ
47 Ω 1% 1%
10 V
D6

L N 1% S BPP 1/10 W 1/10 W

InnoSwitch3-Pro
SDA
C16 U1
470 nF INN3370C-H302 SCL
10 V

Figure 8. Schematic of DER-626, a 65 W USB PD 3.0 Adapter Design.

The circuit in Figure 8 shows a 65 W (5 V / 3 A; 9 V / 3 A; 15 / 3 A; MinE-CAP and InnoSwitch3 Primary

20 V / 3.25 A) USB PD 3.0 compliant adapter using the MinE-CAP IC When a MinE-CAP IC is used in tandem with the InnoSwitch3, the V
to maximize power density. The MinE-CAP IC allows for the pin of the InnoSwitch3 IC is connected directly to the LINE pin of the
significant reduction of the physical size of the input bulk capacitors MinE-CAP IC. Resistors R3 and R5 provide input voltage sensing for
by allowing the use of a smaller (both in size and capacitance) 400 V both the the MinE-CAP IC and InnoSwitch3 ICs. The MinE-CAP IC
capacitor paired with a 160 V capacitor. The MinE-CAP IC also uses R3 and R5 primarily to monitor the line voltage and maintain the
eliminated the need for an inrush current limiting thermistor, leading voltage across the low-voltage bulk capacitor, C2 below its voltage
to more saved space and increased efficiency. Together with the rating when the line voltage is above 100 VAC. In contrast, the
InnoSwitch3-Pro IC and low-profile planar magnetics, a form factor of InnoSwitch3 uses the current from the LINE pin to determine line
L- 82 mm x W- 51 mm x H- 12 mm was realized. This corresponds to undervoltage and overvoltage conditions. During regular operation,
a power density of 21.22 W/in3, with a system efficiency exceeding the current from the LINE pin follows the current flowing through R3
90%. This design also meets DOE Level 6 and EC CoC 5 average and R5, so the InnoSwitch3 IC operates as if said resistors are
efficiency standards. connected directly to the V pin. Resistor R1 is a bleed resistor used
to regulate the voltage across C3, while resistor R4 is used by the
Circuit Description MinE-CAP IC to sample the voltage at the negative terminal of C2.
Input Rectifier and EMI Filter For this specific design, bypass capacitor C16 is shared by both the
Fuse F1 isolates the circuit and protects the AC line from excessive BPP pin of the InnoSwitch3 IC and the BYPASS pin of the MinE-CAP
current due to component failure. Common mode chokes L1 and L2 IC. The value of C16 is chosen based on the desired current limit of
along with capacitors C3 and C4 provide common mode and the InnoSwitch3 IC. As with any flyback design using the
differential mode noise filtering to minimize conducted EMI emissions. InnoSwitch3 IC, one end of the transformer primary is connected to
The bridge rectifier formed by BR1 and BR2 rectifies the AC line the rectified DC bus while the other end is connected to the
voltage and provides a full-wave rectified DC voltage across the high InnoSwitch3 DRAIN pin.
voltage bulk capacitor, C1. Two bridge rectifiers are used to improve A low-cost RCD snubber formed by diode D3, resistors R9, R10 and
heat dissipation by doubling the rectifier surface area since power R13, and capacitor C6 limits the voltage across the InnoSwitch3’s
loss from two rectifiers is the same as that of a single device. Drain-Source nodes during turn-off by dissipating the energy stored
The MinE-CAP IC controls the rate of charge of the 160 V capacitor in the leakage inductance of the transformer.
during start-up; thus, inrush current is mostly dependent on the value The InnoSwitch3 IC has an internal current source that charges
of the 400 V capacitor. Since the capacitance of the 400 V capacitor capacitor C16 when AC input is first applied. Once the InnoSwitch3
is significantly less when using a MinE-CAP IC, the use of a current IC starts switching and during normal operation, bias current is drawn
limiting NTC thermistor is no longer necessary. from the auxiliary winding of the transformer. The output of the

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 MinE-CAP

auxiliary winding is rectified using diode D4 and filtered by capacitor Y capacitor connecting the input DC bulk voltage to the secondary
C15. An RC snubber can be placed across D4 to suppress voltage ground node by shunting noise current back to the primary ground.
spikes, if necessary. Since the output voltage of the charger varies
from 5 V to 20 V, the output of the auxiliary winding also varies and MinE-CAP IC and InnoSwitch3-Pro IC Primary Components
depending on the secondary to auxiliary turns ratio as well as the Selection
coupling coefficient between the primary and auxiliary. A linear The following section focuses on the selection of the MinE-CAP IC
regulator comprising resistors R17 and R18, Zener diode D6, and specific components as well as adjustments to the auxiliary bias
transistor Q4 provides a relatively stable DC voltage based on the circuit to accommodate the bias requirements of the InnoSwitch3-Pro
breakdown voltage of D6 at the emitter terminal of Q4. Bias current IC and the MinE-CAP IC. For a comprehensive guide to InnoSwitch3-Pro
can then be controlled using resistor R19. component selection, see the InnoSwitch3-Pro data sheet.
Zener diode D5 offers primary sensed overvoltage protection. In The resistor V TOP of the MinE-CAP IC corresponding to the series
case of overvoltage at the output of the converter, the auxiliary resistors R3 and R5 in the schematic in Figure 8, serves the dual
winding voltage also increases until D5 breaks down, causing excess purpose of allowing input line monitoring capabilities for the
current to flow into the BPP pin of the InnoSwitch3 IC. If the current InnoSwitch3-Pro IC and regulating the voltage of the low-voltage
flowing into the BPP pin exceeds the ISD threshold, the InnoSwitch3 input bulk capacitor, CLV. The InnoSwitch3-Pro data sheet recommends
controller latches off to prevent any further increase in output a total value of 3.8 MW for R3 and R5 for universal line input OV/UV
voltage. Resistor R20 limits the current injected to the BPP pin during protection. Using this value for the RTOP resistor programs the
an overvoltage event. MinE-CAP IC to keep the voltage across CLV to approximately 140 V,
which is well within the 160 V rating of the capacitor. Use resistors
InnoSwitch3-Pro Secondary and USB Power Delivery and Transformer
with a tolerance of 1% or better for tighter regulation of the CLV
design shall be in consideration of the AC-DC controller used
voltage.
See InnoSwitch3-Pro data sheet for secondary-side component
The recommended value for RBOT (R1 in the schematic) is 1.0 MW for
descriptions.
accurate sensing of the MinE-CAP negative terminal of CLV. The
voltage regulation of CLV is also sensitive to the value of RBOT. A
Key Application Considerations
bleeder resistor, R4, must also be connected in parallel with CLV to
No-Load Consumption help regulate the voltage across the said capacitor, especially if VCLV
The MinE-CAP IC is designed to only consume around 500 mA of bias goes beyond the voltage set by RTOP. Set the value of the bleeder
current from the BYPASS pin, which means the MinE-CAP IC only resistor to 4.0 MW for optimum operation. Resistor values higher
adds a few mW to the system no-load input power. For the design in than the recommended might cause overvoltage faults in the
Figure 8, the measured maximum no-load consumption was only 56 mW MinE-CAP IC. On the other hand, values that are too low might
at VIN = 265 VAC. For minimal no-load consumption while ensuring prevent CLV from charging to the programmed voltage, especially
proper operation of the MinE-CAP IC, follow the recommended during trickle charging.
resistor values and bias selection method outlined in the “MinE-CAP During normal operation, the MinE-CAP IC and InnoSwitch3-Pro IC
and InnoSwitch3-Pro Primary Components Selection” section of this both source their bias currents from the auxiliary winding through the
application example. linear regulator shown in Figure 8. Therefore, the selection of current
limiting resistor R14 must take into account the bias requirements of
Critical Components Selection both ICs (IS1, MinE-CAP + IS2, InnoSwitch3). For the circuit in Figure 8, R19 can
Input Capacitors be computed using the following equation:
The value of the input capacitors can be determined based on the
Capacitance vs. Output Power curve shown in Figure 2. For an VBR(D4) ̶ (VBE(Q1) + VBPP(SHUNT))
output power of 65 W, the nominal capacitance for the high-voltage R19 =
IS1(MinE-CAP) + IS2(INNOSWITCH)
capacitor, CHV, should be 30 mF while the low-voltage capacitor, CLV,
should be around 90 mF. Both capacitors are mounted with their axial
VBR, D6 = breakdown voltage of Zener D4
lines parallel to the PCB; thus, both capacitors must have a maximum
VBE(Q1) = Base-Emitter Voltage of Q1
diameter of 10 mm to fit the 12 mm height requirement of the design.
VBPP(Shunt) = 5.6 V (see InnoSwitch3 data sheet)
The remaining 2 mm clearance is for the installation of a heat
IS1(MinE-CAP) = Typical MinE-CAP bas current
spreader with insulation as well as to account for enclosure
IS2(InnoSwitch3) = InnoSwitch3 bias current
tolerances. Using the above requirements and after a few test
iterations and based on component availability, the final input
Note that the computed resistance for R19 is just a starting-point
capacitor specifications are as follows:
value and can be adjusted to optimize performance, especially for
1. HV Capacitor: 39 μF, 400 VDC, 10 mm(D) x 37 mm(L) no-load power reduction. Also, the formula given above is only valid
2. LV Capacitor: 100 μF, 160 VDC, 8 mm(D) x 42.5 mm(L) for the regulator topology used in Figure 8.
For a more detailed and general approach to the selection of the The InnoSwitch3-Pro IC uses the bypass capacitor connected to the
input capacitors, check the MinE-CAP Application Note. BPP pin (C16 in Figure 8) to set the current limit setting for the
design. If the MinE-CAP IC is placed close to the InnoSwitch3 IC,
EMI Filter both ICs could share the same bypass capacitor. However, if the
The EMI filter in this design uses a T-Filter topology comprising a MinE-CAP BYPASS pin is connected to the InnoSwitch3 BPP pin
couple of common-mode chokes and a single X-capacitor, as shown in through a long trace or a via, an extra bypass capacitor should be
Figure 8. Both L1 and L2 use an HF60 Mn-Zn Toroid. Common mode placed as close as possible to the MinE-CAP IC and must be
choke L1 is 220 mH, while L2 is 18 mH. C1 is a 220 nF Class-X Film connected to the BYPASS and GROUND pins using very short traces.
Capacitor. The common-mode chokes suppress common mode noise If an extra bypass capacitor is used, a 10 nF to 100 nF, 10 V X7R
while the leakage inductance from both chokes combined with C1, ceramic capacitor is recommended. Avoid using capacitance values
and the input bulk capacitors form an LC-filter for differential mode higher than 100 nF when using standard current limits for the
noise attenuation. Common mode noise is further reduced by the InnoSwitch3-Pro (see InnoSwitch3-Pro BPP capacitor tolerance limits).

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 MinE-CAP

Layout Considerations
The following layout considerations are specifically for the MinE-CAP 5. Tie the GROUND pins to a copper plane for heat dissipation. If a
components. For placement and layout of InnoSwitch3-specific and large copper plane is not possible, thermal vias can also be used
power components, check the InnoSwitch3-Pro data sheet. for boards with 2 or more copper layers. The MinE-CAP IC and
InnoSwitch3-Pro IC can share the same GND plane.
1. The MinE-CAP sense pins (VBOT and VTOP) and InnoSwitch3 IC’s
V pin use current in the mA range to measure line and capacitor 6. Place both input bulk capacitors in such a way to minimize the
voltages. Avoid routing lines with high dV/dt or dI/dt signals near primary switching loop. Prioritize placing the high-voltage
these pins. This rule must also be observed for the LINE pin. capacitor closer to the transformer and InnoSwitch3-Pro IC since
this capacitor is always part of the high-frequency switching loop.
2. Signal lines going to the pins stated above must also be routed
away from high dV/dt or dI/dt nodes or tracks. 7. Clean the board properly to prevent flux residues from interfering
with the signals.
3. All resistors associated with the MinE-CAP IC, except for the
bleed resistor in parallel with CLV must be placed near the Figures 9 shows the MinE-CAP layout used for the design in Figure 8
MinE-CAP IC. following the recommendation stated above. In this design, the
layout did not permit the RTOP to be placed right next to the VTOP
4. Place the MinE-CAP IC as close as possible to the InnoSwitch3-Pro
pin. However, the VTOP pin trace is shielded by a ground plane
IC to minimize the trace from the LINE pin to the V pin of the
beside and beneath the trace. Additionally, there are no high di/dt or
Innowitch IC. Placing the MinE-CAP IC next to the InnoSwitch3
dv/dt signals near the track, pin or resistor.
IC also allows the use of a single bypass capacitor for both ICs.

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 MinE-CAP

Figure 9. Layout of the Design in Figure 8 Showing the Location of Major Components.

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 MinE-CAP

EMI Considerations For the design in Figure 11, in place of the single high-voltage
When the MinE-CAP disconnects the low-voltage capacitor, CLV from capacitor, two high-voltage capacitors must be chosen such that its
the circuit during high-line operation, the conducted EMI may increase. impedance is not too high when evaluated at the maximum switching
For designs that utilize the EMI filter topology shown in Figure 10, frequency of the converter. In general, the output impedance of the
removal of the low-voltage capacitor (C3) fundamentally shifts the filter must be less than 10% of the impedance of the converter at full
cut-off of the low-pass filter formed by the leakage inductances of the load. Finally, the low-voltage capacitor (C3) must be placed after the
common-mode chokes (L1 and L2), X-capacitor (C1), and the input inductor, L3. This way, current from the low-voltage capacitor is not
bulk capacitors to a higher frequency. Removal of the low-voltage hindered by the impedance of L3 when operating at low-line.
capacitor also increases the total input bulk capacitor ESR. These
may result in an increase in differential-mode noise at high-line.
Quick Design Checklist
Aside from the verification of the functionality of the InnoSwitch3-Pro
IC, proper operation of the MinE-CAP IC must also be checked. At
VBULK the minimum, the following verification tests must be performed.
L
+ 1. VCLV Regulation – Check that the maximum voltage across the
+
L1 L2
C3 low-voltage capacitor never exceeds the capacitor’s voltage
+
AC
IN
C1 C2 rating. Perform this test across the whole input voltage and
MinE-CAP
Switch
output power range. Checking VCLV regulation during brown-in
and brown-out is also recommended.
N
2. Ensure that all resistors do not go beyond their voltage ratings.
PI-9218-082120
For RBOT and RBLEED, a single 1206 chip resistor will suffice. For
RTOP, the use of two 1206 chip resistors in series is recommended.
Figure 10. T-Filter EMI Filter Topology.
3. The MinE-CAP IC must seamlessly transition from high-line to
low-line operation and vice-versa without causing the
This effect can be remedied by either increasing the leakage InnoSwitch3-Pro IC to enter auto-restart mode. Verify this across
inductances of the common-mode chokes or by increasing the value all loading conditions.
of C1. Such a solution may not be viable due to several restrictions,
such as size or excessively high inductance requirements. The filter 4. Thermal Check – Verify that the MinE-CAP IC does not cause an
in Figure 11 is still a viable topology to use. However, the computation OTP fault when operating at maximum load throughout the whole
of the required values of C1, L1, and L2 must take into account the input range. If the unit is a charger, perform the thermal check
removal of C3 in the design. with the enclosure installed.

An alternative approach is to use a Pi-filter to help suppress

differential-mode noise. The schematic for this alternative design is
shown in Figure 11.

L3
VBULK

L
+ +
C3
L1 L2
AC + +
C1 C2 C4
IN
MinE-CAP
Switch

PI-9219-082120

Figure 11. Typical EMI Filter with a Pi-Filter at the Rectified Side.

A dedicated differential choke enables the use of a smaller common

mode choke. The 400 V capacitance is then split into two half size
capacitors either side of this differential choke in a pi-filter
configuration.

10
Rev. D 11/20 www.power.com
 MinE-CAP

Absolute Maximum Ratings(1,2)

DRAIN Pin Voltage..................................................... -0.3 V to 650 V Notes:
DRAIN Pin Peak Current.............................................................25 A
1. All voltages referenced to SOURCE, TA = 25 °C.
BP Pin Voltage .................................................................-0.3 to 6 V
2. Maximum ratings specified may be applied one at a time without
BP Pin Current .................................................................. 0 to 1 mA
causing permanent damage to the product. Exposure to Absolute
VTOP Pin Voltage ...................................................... -1.5 V to 650 V
Maximum Ratings conditions for extended periods of time may
VBOT Pin Voltage ...................................................... -1.5 V to 650 V
affect product reliability.
LINE Pin Voltage ...........................................................-0.3 V to 6 V
3. Higher peak Drain current is allowed while the Drian voltage is
Storage Temperature ...................................................-65 to 150 °C
simultaneously less than 400 V.
Operating Junction Temperature4.................................. -40 to 150 °C
4. Normally limited by internal circuitry.
Ambient Temperature ..................................................-40 to 105 °C
5. 1/16” from case for 5 seconds.
Lead Temperature5 ................................................................ 260 °C

Thermal Resistance
Thermal Resistance: Notes:
(qJA)..................................... 83 °C/W1, 76 °C/W2 1. Solder to 0.36 sq. in (232 mm2), 2 oz. (610 g/m2) copper clad.
(qJC).................................................... 24 °C/W3 2. Solder to 1 sq. in (645 mm2), 2 oz. (610 g/m2) copper clad.
3. The case temperature is measured on the top of the package.

Conditions
Parameter Symbol TJ = -40 °C to 125 °C Min Typ Max Units
(Unless Otherwise Specified)

Analog Parameters
BYPASS Supply Current IS1 TJ = 25 °C 300 430 475 mA

BYPASS Pin Voltage VBPP 4.45 V

BYPASS Pin Voltage

VBPP(H) 0.6 V
Hysteresis

Bypass Power-Up Reset

VBPP(RESET) TJ = 25 °C 3.45 3.75 3.90 V
Threshold Voltage
Brown-In IUV+ TJ = 25 °C 17 18 19 mA
Brown-Out IUV- TJ = 25 °C 11 12 13 mA

LV Capacitor OV ICOV+ TJ = -40 °C to 100 °C 33.8 37.0 38.25

mA
Threshold ICOV(H) TJ = 25 °C 2.5
Trickle Charge TJ = 25 °C
V TRKLCHRG 145 V
Regulation Voltage Using 4M RTOP and 1M RBOT Resistors

LINE Pin Brown-Out

IINJECT(UV) TJ = 25 °C 4 5 6 mA
Injection Current

LINE Pin OV Injection

IINJECT(OV) TJ = 25 °C 118 128 mA
Current

VBPP = VBPP + 0.1 V

IDSS1 VDS = 150 V 4.5 10 mA
Off-State Drain Leakage TJ = 25 °C
Current VBPP = VBPP + 0.1 V
IDSS2 VDS = 325 V 5 10 µA
TJ = 25 °C
TJ = 25 °C 0.35 0.44 W
On-State Resistance RDS(ON)
TJ = 100 °C 0.49 0.62 W
Thermal Shutdown TSD See Note A 135 142 150 °C
Thermal Shutdown
TSD(H) See Note A 70 °C
Hysteresis

NOTES:
A. This parameter is derived from characterization.

11

www.power.com Rev. D 11/20

 12
MinSOP-16A

Rev. D 11/20
0.42 [0.016] Ref. 3 4
1.35 [0.053]
2.03 [0.080] Ref. 1.23 [0.049]

5 Lead Tips 0.73 [0.029]

0.61 [0.024]
2X 16 9 0.15 [0.006] C
0.10 [0.004] C B
0.19 [0.007]
H 0.43 [0.017]
MinE-CAP

Ref.

2 Gauge
Plane
9.00 [0.354] 11.32 [0.446]
Seating Plane

0° - 8° C

1.50 [0.059]
0.81 [0.032] 0.150±0.050 Standoff
0.51 [0.020]
1 8 0.15 [0.006] C
B
8 Lead Tips DETAIL A
Pin #1 I.D. 2
and Code A
3 4
(Country of 5.61 [0.221]
Origin) 1.50 [0.059] 0.30 [0.012] 16X
0.20 [0.008]
1.00 [0.039]
0.25 [0.010] M C A B 2X 0.10 [0.004] C A

TOP VIEW BOTTOM VIEW

1.94 [0.076] Max.

Total Mounting Height 1.16 [0.046] Ref.

Detail A

Seating
Plane
C 0.29 [0.011] 13X
3 0.17 [0.007]
0.10 [0.004] C
1.94 [0.076] Coplanarity: 13 Leads
1.74 [0.069]
Body Thickness
SIDE VIEW END VIEW

Notes:
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions noted are determined at the outermost extremes of the plastic body exclusive of mold
flash, tie bar burrs, gate burrs, and inter-lead flash, but including any mismatch between the top
and bottom of the plastic body. Maximum mold protrusion is 0.18 [0.007] per side.
3. Dimensions noted are inclusive of plating thickness.
4. Does not include inter-lead flash or protrusions.
5. Controlling dimensions in millimeters [Inches].
6. Datums A and B to be determined in Datum H.
PI-8833-100118

www.power.com
POD-MinSOP-16A Rev C
 MinE-CAP

PACKAGE MARKING

MinSOP-16A

C
MIN1072M B
YYWW
%%7654321A D

A. Power Integrations Registered Trademark

B. Assembly Date Code (last two digits of year followed by 2-digit work week)
C. Product Identification (Part #/Package Type)
D. Lot Identification Code
PI-9220-082120

Part Ordering Information

• MinE-CAP Product Family

• Series Number
• Package Identifier
M MinSOP-16A
• Tape & Reel and Other Options
MIN 1072 M - TL TL Tape & Reel, 2 k pcs per reel.

13

www.power.com Rev. D 11/20

 Revision Notes Date
D Code A release. 11/20

For the latest updates, visit our website: www.power.com

Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations
does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY
HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS.
Patent Information
The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one
or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of
Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set
forth at www.power.com/ip.htm.
Life Support Policy
POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:

A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose
failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or
death to the user.

A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure
of the life support device or system, or to affect its safety or effectiveness.

Power Integrations, the Power Integrations logo, CAPZero, ChiPhy, CHY, DPA-Switch, EcoSmart, E-Shield, eSIP, eSOP, HiperPLC, HiperPFS,
HiperTFS, InnoSwitch, Innovation in Power Conversion, InSOP, LinkSwitch, LinkZero, LYTSwitch, SENZero, TinySwitch, TOPSwitch, PI, PI Expert,
PowiGaN, SCALE, SCALE-1, SCALE-2, SCALE-3 and SCALE-iDriver, are trademarks of Power Integrations, Inc. Other trademarks are property of
their respective companies. ©2020, Power Integrations, Inc.

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