G33M PDF

5 4 3 2 1
Foxconn Precision Co. Inc.

D G33M03 Schematic D
Page Index
01. Index Page 20. ICH9-2
02. Clock Distribution 21. ICH9-3
03. Power Delivery Map 22. ICH9-4
04. CK505 ClockGen 23. HDA Codec ALC888/883
C
05. VRD ISL6312 24. Super I/O IT8718FX C
06. LGA775 -1 25. PCI Express x1 Slot

07. LGA775 -2 26. PCI Slot
08. Bearlake -GMCH -1 27. CPU/System Fan
09. Bearlake -GMCH -2 28. Power/MISC Connectors
10. Bearlake -GMCH -3 29. RTL8100C/8110S
11. Bearlake -GMCH -4 30. LAN/USB Connectors
12. DDR2 Channel A DIMM1,2 31. Parallel Port & KB/MS
13. DDR2 Channel A Termination 32. Front USB Connector
14. DDR2 Channel B DIMM1,2 33. FLASH/TPM
B
15. DDR2 Channel B Termination 34. JMB368 & IDE B
16. ACPI FOX ONE 35. IEEE 1394 - V6308

17.PCI Express x16 Gfx Slot 36. History
18. VGA Connector 37. GPIO / IRQ / IDSEL Map
19. ICH9-1
A A
FOXCONN PCEG
Title
Index Page
Size Document Number Rev
C G33M03 C
Date: Thursday, April 26, 2007 Sheet 1 of 37

5 4 3 2 1
5 4 3 2 1
14.318MHz
CPU
D
CPU 200/266/333 MHz Diff Pair D
MCH 200/266/333 MHz Diff Pair
DDR2 4 Slots 12 Diff CLKs

PCI Express 100 MHz Diff Pair PCI Express x16 Gfx Channel A DDR2 DDR2 667/800
DIMM1
GMCH
DOT 96 MHz Diff Pair Bearlake DIMM2
Channel B DDR2 DDR2 667/800

DIMM1
PCI Express/DMI 100 MHz Diff Pair
C DIMM2 C
CK-505
PCI Express/DMI 100 MHz Diff Pair
USB/SIO 48 MHz
ICH 33 MHz
REF 14 MHz
ICH9
Azalia Bit Clock
B
PCI 33 MHz PCI Slot 1,2 B
80 Port 33MHz 80 Port
32.768KHz
TPM 33 MHz
TPM 1.2
HD Audio
LAN 25 MHz LAN
NINEVEH
Super I/O
SIO 33 MHz
SATA 100 MHz Diff Pair
PCI Express 100 Mhz Diff Pair PCI Express x1 Slot 1

A A
PCI Express 100 Mhz Diff Pair PCI Express x1 Slot 2
XDP 100MHz Diff Pair XDP FOXCONN PCEG

Title
CLOCK Distribution
C G33M03 C

5 4 3 2 1
5 4 3 2 1
3.3V Super I/O

ATX P/S 3.3V
Icc(Max)=50mA
Proceessor
Vccp (CPU Vcore)
5V 5VSB VRD 11 3.3SBV
12V Voltage=1.15~1.5V 5V
Switching Icc(Max)=50mA(S0)
Icc(Max)=70A
3 Phase
5VDUAL 3-Phases Swithing 3.3SBV
D
DDR2 Channel A Icc(Max)= Icc(Max)=38mA(S3)
D
1.2V FSB 5VSB

Vdd (Core)=1.8V 4.345A(S0,S1) Vtt=5.3A
Ivdd(Max)=4.7A(per channel) 22mA(S3)
USB2.0 12 Ports 5VDUAL
+5V DUAL=5A(S0, S1) Icc(Max)=
Vtt (Core) Bearlake GMCH 4.345A(S0,S1)
Single Phase Switch +5V DUAL=20mA(S3)
0.9V 22mA(S3)
Ivterm(Max)=200mA 5V to 1.8V
Ivdd(Max)=14A FSB_Vtt
(per channel) Linear 1.8V PS2
Ivdd(Max)=650mA(S3) 1.2V FSB Vtt
to 1.2V +5V DUAL=345mA(S0, S1)
LDO Icc(Max)=1.3A
6A +5V DUAL=2mA(S3)
1.8V to 0.9V
DDR2 Channel B Ivterm(Max)=1.2A
1.8V VCCSM
Vdd (Core)=1.8V 1.8V VCC_SMCLK
Ivdd(Max)=4.7A(per channel)
GMCH 1.25 V Vcore (Core Logic) PCI Express X16

Vtt (Core) 3.3V 21.34A 1.25V
0.9V Switching Icc(Max)=13.8A(Integrated)
slot (1)
Ivterm(Max)=200mA 12V
*1.25V (DMI&PCIe) +12V=5.5A
(per channel) VCCA_EXP 2.47A
3.3VSB
C
1.25V C
Icc(Max)=0.375A(wake)
VCC_CL 4.3A
Icc(Max)=0.02A(no wake)
+3.3V=3A
3.3V VCCA_DAC 66mA
3.3V VCC3_3 15.8mA
PCI Express X1
Per slot (2)
+12V=0.5A
HDA Codec
3.3VSB
Vcc LDO Icc(Max)=0.375A(wake)
5V 12V ICH9 Icc(Max)=0.02A(no wake)
Icc(Max)=200mA to 5V
1.25V VCCDMI 41mA
Vcc +3.3V=3A
3.3V Linear 1.25V 1.2V VCC_CPU_IO 14mA
Icc(Max)=40mA to 1.05V
V_1P05V_ICH 1.05V (Core) VCC1_05
2A 1.43A PCI Slot
1.5V (USB &SATA) VCC1_5A -12V
B -12V B
Linear 1.8V 1.652A Icc(Max)=0.1A
to 1.5V 1.5V (PCIe)VCC1_5B
V_1P5V_ICH 0.646A 5V
2.2A 1.5V VCCGLAN1_5 5V Icc(Max)=5A
80mA
3.3V
RTC
5VSB RTC=5uA Icc(Max)=7.6A
Battery
12V
3.3V VccCL3_3 19mA Icc(Max)=0.5A
5V_STBY to 3.3SB 3.3V VccSUS3_3 212mA
1.5A 3.3V VccLAN (10/100) 19mA 3.3VSB
3.3V VccSUSHDA 32mA Icc(Max)=0.375A(wake)
3.3V VCC3_3 308mA Icc(Max)=0.02A(no wake)
3.3V
3.3V VccGLAN3_3 1mA
3.3V VccHDA 32mA
Nineveh GbE Lan

3.3V STBY
A IO LED 15.5mA A
1.8V ANALOG 418.2mA BJT

CK505
1.0V Internal 1.8
to 1.0 VR core Vdd (Core) FOXCONN PCEG
277.2mA 3.3V
Title
Ivdd(Max)=250mA Power Delivery Map
C G33M03 C

5 4 3 2 1
5 4 3 2 1
3D3V_SB
FB19 3D3V_CLK
3D3V_CLK
*
FB 100 Ohm
1
* C172
10uF *C178*C194*C206*C205*C195*C173*C198*C191*C175*C174 X2
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 4.7uF 0.1uF 4.7uF 0.1uF 3D3V_SB
*
2
near pin3 GSEL Pin C169XTAL-14.318MHz C168
1
Hi: pin9&pin10 selects DOT 96Mhz
Low:pin9&pin10 selects PCIEX0. * 33pF
* 33pF
2
R121 4.7K +/-5%
D D
Please close to each power pin Place near Clock generator
+/-5% 33 R136 3D3V_CLK_REF_A

19 CK_14M_ICH
CP6 2 1 COPPER SMB_DATA_MAIN 27,33

CP7 2 1 COPPER SMB_CLK_MAIN 27,33
CLK_TURBO1
CLK_TURBO2
200M_P_CPU +/-5% 33 R130

CK_200M_P_CPU 6
R135 33+/-5% 33M_PCI1 200M_N_CPU +/-5% 33 R137
26 CK_33M_PCI1 CK_200M_N_CPU 6
35 CK_33M_1394 R134 33+/-5% @6308
26 CK_33M_PCI2 R133 33+/-5% 33M_PCI2
33 CK_33M_FWH R131 22 +/-5% ICS_FSBSEL2 3D3V_CLK
@TF
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
3D3V_CLK U14
SDATA
FSLC/PCICLK3_2X
PCICLK2_2X
**SEL_STOP/PCICLK1_2X
PCICLK0_2X
SCLK
CPUT_L0***
DOC_1**
DOC_0**
REF0/GSEL*
VDDREF
CPUC_L0***
X1
X2
GND
GND
GND
GND
VDDCPU
21 CK_33M_ICH R139 22 +/-5% ICS_FSBSEL1 1 54 200M_P_GMCH R140 33+/-5%
FSLB/PCICLK4_2X CPUT_L1F CK_200M_P_GMCH 8
R132 22 +/-5% 2 53 200M_N_GMCH R142 33+/-5%
24 CK_33M_SIO VDDPCI CPUC_L1F CK_200M_N_GMCH 8
R129 @TF 33 +/-5% 3 52
33 CK_33M_TPM PCICLK5_2X RESET_IN#/RESET# FP_RSTJ 6,19,28
29 CK_33M_LAN R138 22 +/-5% 4 51
PCICLK6_2X **RLATCH SLP_S4J 16,19
5 VDD48 GNDA 50
R143 33 +/-5% ICS_FSBSEL0 6 49 24M_1394 +/-5% 33 R145@6308 CK_24M_1394 35
19 CK_48M_ICH FSLA/USB_48 24.576Mhz
R144 33 +/-5% SEL24_48 7 48 3D3V_CLK_REF_A
24 CK_24M_SIO *SEL24_48#/24_48Mhz VDDA
8 GND GND 47
R146 0 +/-5% 96M_P_GMCH 9 ICS9LPRS919 46 25M_LAN +/-5% 33 R151
8 CK_96M_P_GMCH DOT96T_LR/PCIeT_LR10 25Mhz CLK_25M_LAN 29
R148 0 +/-5% 96M_N_GMCH 10 45 3D3V_CLK
8 CK_96M_N_GMCH DOT96C_LR/PCIeC_LR10 VDD
11 GND VDD 44
+/-5% 0 R158 SATA_100M_P_ICH 12 43
20 CK_SATA_100M_P_ICH SATACLKT_LR GND
+/-5% 0 R160 SATA_100M_N_ICH 13 42
20 CK_SATA_100M_N_ICH SATACLKC_LR PCIeT_LR9
C 14 VDDSATA PCIeC_LR9 41 C
15 GND PCIeT_LR8/CPU_STOP#* 40
PCI-E x1 (Slot1) 19 CK_PWRGD 16 Vtt_PwrGd/PD#/WOL_STOP# PCIeC_LR8/PCI_STOP#* 39
R163 0 +/-5% PE_100M_P_1PORT 17 38
25 CK_PE_100M_P_1PORT PCIeT_LR0 GND
PCI-E JMicron 368 R164 0 +/-5% PE_100M_N_1PORT 18 37
PCIeC_LR1
PCIeC_LR2
PCIeC_LR3
PCIeC_LR4
PCIeC_LR5
PCIeC_LR6
PCIeC_LR7
PCIeT_LR1
PCIeT_LR2
PCIeT_LR3
PCIeT_LR4
PCIeT_LR5
PCIeT_LR6
25 CK_PE_100M_N_1PORT PCIeC_LR0 PCIeT_LR7
GND
GND
GND
VDD
VDD
ICS9LPRS919AKLF-T
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
3D3V_CLK
PCI-E x16 Slot
PE_100M_P_GMCH
PE_100M_N_GMCH
RN15
*1 2
0 +/-5%
CK_PE_100M_P_GMCH 8
CK_PE_100M_N_GMCH 8
PE_100M_N_ICH 3 4
5 6 CK_DMI_N_ICH 19
PE_100M_P_ICH CK_DMI_P_ICH 19
7 8
High: 24 MHZ
Low: 48 MHz
PE_100M_N_JMB
PE_100M_P_JMB
RN13
*1 2
0 +/-5%
CK_PE_100M_N_JMB 34
CK_PE_100M_P_JMB 34
SEL24_48 R147 4.7K PE_100M_N_16PORT 3 4
3D3V_SB 5 6 CK_PE_100M_N_16PORT 17
+/-5% PE_100M_P_16PORT
R150 4.7K 7 8 CK_PE_100M_P_16PORT 17
+/-5%
dummy
3D3V_SB 3D3V_CLK_REF_A
B B
FB18
CLK_TURBO1 CLK_TURBO2 *
*internal pull-up resistor FB 100 Ohm Close to pin 48, 61
R117 R116 **internal pull-down resistor
1
RESET pin is 3.3V tolerant
4.7K
+/-5%
4.7K
+/-5% *C170 * C184
0.1uF
SMBus Address :1101-0010 0.1uF
2
ICS_FSBSEL0 R165 2.2K
FSBSEL0 6,8
+/-5%
CLK_25M_LAN
CK_24M_SIO FSB_VTT
CK_48M_ICH ICS_FSBSEL1 R169 2.2K
FSBSEL1 6,8
CK_33M_1394 +/-5%
CK_33M_PCI1
CK_33M_SIO R166 470 FSBSEL0
FSBSEL0 6,8
CK_33M_ICH +/-5%
CK_33M_FWH
R162 470 FSBSEL1 ICS_FSBSEL2 R159 2.2K
FSBSEL1 6,8 FSBSEL2 6,8
CK_14M_ICH +/-5% +/-5%
CK_33M_PCI2
R161 470 FSBSEL2
FSBSEL2 6,8
CK_24M_1394 +/-5%
C186 C180 C177 C167 C162 C165 C161 C160 C163 C156 C182
1
A
* 10pF
* 10pF
* 3.3pF
* 10pF
50V, NPO, +/-0.25pF * 10pF
* 10pF
* 10pF
* 10pF
* 10pF
* 10pF
* 10pF BSEL TABLE A
dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy
2
Add for SI FS_C FS_B FS_A FSB Frequency

0 0 1 133MHz(533)
0 1 0 200MHz(800)
0 0 0 266MHz(1066)
EMI CAPS. FOXCONN PCEG
1 0 0 333MHz(1333)
Title
CK505 ClockGen
C
G33M03 A

5 4 3 2 1
5 4 3 2 1
12V_VRM
L10 Choke 1.1uH VIN
*
2
4
5 C140 C132 C136 EC4 EC16 EC5 EC6 C126
1
* 1nF
50V, X7R, +/-10% * 0.1uF
* 10uF
-0.1
* 1500uF * 1500uF * *
1500uF 1500uF
* 0.1uF
C0603
C0603 C0603 C1206h18 16V, +/-20% 16V, +/-20% 16V, +/-20%
16V, +/-20% dummy
2
dummy dummy
3
VIN
PWR2
HM3502E-P1
1
D
pwr4nwp1h128
* C95
1uF
D
C0805
2
R102
10K Q9 16V, Y5V, +80%/-20%
5V_SYS 12V_VRM +/-1%
VTT_OUT_RIGHT R104 2.2 R0603 G
r0805h6 +/-5% AOD452
L12
S
VR_READY OS-CON
*
C281 R292 R216 1 2 VCCP
* 0.1uF 680 C318 2.2 R113 Choke 400nH
D
C0603
+/-5%
r0603h6 * 4.7uF
25V,Y5V,+80/-20%
r0805h6
Q4 Q3
2.2
r0805h6
dummy c0805h13 TC6 TC5 TC4 TC3
C285 R92 0 G G C149 * 680uF * 680uF * 680uF * 680uF
1
* 1uF
16V, Y5V, +80%/-20%
r0805h6 +/-5%
AOD472 AOD472 * 1nF
C0603
4V,+/-20%
ce35d80h90
4V,+/-20%
ce35d80h90
4V,+/-20%
ce35d80h90
4V,+/-20%
ce35d80h90
10
S
U17 ISL6312CRZ C0805 dummy
2
37 PVCC1_2 29
VCC
19 VR_READY PGOOD
6,16 VR_EN 36 EN
46 31 R215 2.2 C284 0.1uF PHASE1
24 VIDO7
*
VID7 BOOT1 r0805h6 ISEN1
24 VIDO6 47 VID6 0.8V~1.6V/70A
24 VIDO5 48 32 25V, X7R, +/-10%
VID5 UGATE1
24 VIDO4 1 VID4 PHASE1 33
24 VIDO3 2 30 VIN
VID3 LGATE1 VCCP
24 VIDO2 3 VID2
24 VIDO1 4 VID1
1
ISEN1
5 35 R222 51+/-1% C278 R170
* C128
D
24 VIDO0 VID0 ISEN1+
6 VID_SELECT 6 34 r0603h6
* 0.1uF 10K 1uF
*
VRSEL ISEN1- PHASE1 R213 6.2K +/-1% Q18 C0805
2
* *
R289 C321 1.5nF R0603 +/-1% C0603 R0603
*
681 R281 20K 1 2 C283 0.1uF R171 2.2 G 16V, Y5V, +80%/-20%
*
*
+/-1% r0603h6 +/-1% 13 27 R223 2.2 1 2 r0805h6 +/-5% AOD452

*
R256 1.15K C322 22pF COMP BOOT2 r0805h6 C289 0.1uF EC12 EC13 EC14
L21
S
*
Place * +/-1% C0603 14 26 OS-CON * 3300uF * 3300uF * 3300uF
*
RT1 R266 0 IDROOP FB UGATE2 6.3V, +/-20% 6.3V, +/-20% 6.3V, +/-20%
close to T 15 IDROOP PHASE2 25 1 2
10K r0603h6 28 R174
D
inductor LGATE2 Choke 400nH
+/-1% 1 2 R267 51 2.2
*
C C336 680pF +/-1% 16 Q20 Q19 r0805h6 TC2 TC1 C

VDIFF
R249 487
ISEN2+ 19 R236 51+/-1% ISEN2 C299 * 680uF * 680uF
r0603h6 +/-1% 20 r0603h6
* 0.1uF R212 0 G G 4V,+/-20% 4V,+/-20%
*
ISEN2-
1
IDROOP PHASE2 R230 6.2K r0805h6 +/-5% AOD472
*
AOD472C212 ce35d80h90 ce35d80h90
*
R250 R0603 +/-1% C0603 1nF
S
VCCP 20K C302 0.1uF C0603
2
+/-5% 42 R228 2.2
PVCC3 12V_VRM
1
R237
r0603h6
dummy * C294
1uF
r0805h6 PHASE2
ISEN2
Close to PWM IC 100 C0805
2
+/-1%
R240 0 r0603h6 18 40 R217 2.2 C286 0.1uF
6 VCC_SENSE
*
VSEN BOOT3
2
r0603h6 C309 r0805h6 C0603 25V, X7R, +/-10% VIN

C0603 * 10nF
UGATE3 39
R243 0 dummy 17 38
6 VSS_SENSE
1
RGND PHASE3
1
r0603h6 R248 C308 C315 41 R103
* C202
D
LGATE3
100
+/-1% * 0.1uF
* 0.1uF 10K
+/-1% Q10
1uF
C0805
2
r0603h6 C0603 C0603 44 R238 51+/-1% ISEN3 C298 R0603
ISEN3+
dummy dummy 43 r0603h6
* 0.1uF R105 2.2 G
*
ISEN3- PHASE3 R232 6.2K r0805h6 +/-5% AOD452
*
R0603 +/-1% C304 0.1uF C0603 L13
S
C0603 OS-CON
*
R280 100K dummy 12 25V, X7R, +/-10% 1 2
5V_SYS OFS
r0603h6 +/-5% 21 R231 51+/-1% ISEN4 C292 R114 Choke 400nH
D
ISEN4+
R285 4.75K dummy 7 22 r0603h6
* 0.1uF 2.2
*
R0603 DRSEL ISEN4- PHASE4 R221 6.2K * Q5 Q6 r0805h6 TC7 TC8 TC9
R278 0 dummy 8 OVPSEL
R0603 +/-1% C0603 * 680uF * 680uF * 680uF
*
R0603 C295 0.1uF R101 0 G G 4V,+/-20% 4V,+/-20% 4V,+/-20%
1
PWM4
11
45
REF PWM4 24 5V_SYS r0805h6 +/-5%
AOD472 AOD472 * C152
1nF
ce35d80h90 ce35d80h90 ce35d80h90
dummy
GND
S
FS R219 0 dummy C0603
9 23
2
SS EN_PH4 r0603h6 +/-5%
PHASE3
49
ISEN3
R259
*R268 12V_VRM
1
B
39.2K
+/-1%
0
*
+/-5%
C320
10nF * R242
100K * R279
240K BOTTOM PAD R218 15K * R580
160K
B
r0603h6 r0603h6 C0603 +/-1% +/-5% r0603h6 +/-5% +/-5%
CONNECT TO GND
2
dummy R0603
Through 8 VIAs R225
2.2K
+/-5%
r0603h6
12V_VRM
U12
R123 4.7 7 2 R112 2.2 C139 0.1uF
*
r0805h6 +/-5% PVCC BOOT r0805h6 +/-5% C0603 25V, X7R, +/-10%
C155 1 2 0.22uF 6 1
*
C0805 16V, X7R, +/-10% VCC UGATE

PWM4 3 8
PWM PHASE VIN
4 GND LGATE 5
R107
ISL6612ACBZA-T 10K
D
+/-1%
R0603 Q7 * C124
1uF
C0805
2
R100 2.2 G
r0805h6 +/-5% AOD452
L11
S
1 2
R106 Choke 400nH
D
2.2
A Q14 Q11 r0805h6 A
R124 0 G G
1
r0805h6 +/-5%
* C130
1nF
S
AOD472 AOD472 C0603

2
PHASE4
ISEN4
FOXCONN PCEG
Title
VRD ISL6312
C G33M03 C

5 4 3 2 1
5 4 3 2 1
HAJ[35..3]
8 HAJ[35..3]
HDJ[63..0]
HDJ[63..0] 8 U15A
HAJ3 L5 D2 3 OF 7
HAJ4 A03# ADS# HADSJ 8 U15C
P6 A04# BNR# C2 HBNRJ 8
2 OF 7 HAJ5 M5 D4 P2 F26 TESTHI_0
U15B A05# HIT# HITJ 8 20 SMIJ SMI# TESTHI00
HAJ6 L4 H4 TP_RSPJ K3 W3 TESTHI_1
A06# RSP# TP12 20 A20MJ A20M# TESTHI01
HAJ7 M4 G8 R3 P1 TESTHI_11
A07# BPRI# HBPRIJ 8 20 FERRJ FERR#/PBE# TESTHI11
HDJ0 B4 G16 HDJ32 HAJ8 R4 B2 K1 W2 TESTHI_12
D00# D32# A08# DBSY# HDBSYJ 8 20 INTR LINT0 TESTHI12 TESTHI_12 7
HDJ1 C5 E15 HDJ33 HAJ9 T5 C1 L1 F25
D01# D33# A09# DRDY# HDRDYJ 8 20 NMI LINT1 TESTHI02
HDJ2 A4 E16 HDJ34 HAJ10 U6 E4 N2 G25
D02# D34# A10# HITM# HITMJ 8 20 IGNNEJ IGNNE# TESTHI03
HDJ3 C6 G18 HDJ35 HAJ11 T4 AB2 HIERRJ M3 G27
D03# D35# A11# IERR# 20 STPCLKJ STPCLK# TESTHI04
HDJ4 A5 G17 HDJ36 HAJ12 U5 P3 G26
HDJ5 D04# D36# HDJ37 HAJ13 A12# INIT# INITJ 20 TESTHI05
D
B6 D05# D37# F17 U4 A13# LOCK# C3 HLOCKJ 8 7 HVCCA A23 VCCA TESTHI06 G24 D
HDJ6 B7 F18 HDJ38 HAJ14 V5 E3 B23 F24 TESTHI_2_7
D06# D38# A14# TRDY# HTRDYJ 8 7 HVSSA VSSA TESTHI07
HDJ7 A7 E18 HDJ39 HAJ15 V4 AD3 TP_BINITJ HVCCPLL D23 AK6 FORCEPHJ
D07# D39# A15# BINIT# TP11 RSVD5 FORCEPH
HDJ8 A10 E19 HDJ40 HAJ16 W5 G7 C23 G6
D08# D40# A16# DEFER# HDEFERJ 8 7 HVCCIOPLL VCCIOPLL RSVD11
HDJ9 A11 F20 HDJ41 N4 F2 CPU_GTLREF2
HDJ10 D09# D41# HDJ42 RSVD1 EDRDY# TP_MCERRJ TESTHI_13
B10 D10# D42# E21 8 HREQJ[4..0] P5 RSVD2 MCERR# AB3 TP13 TESTHI13 L2
HDJ11 C11 F21 HDJ43 HREQJ0 K4 VID0 AM2 AH2
D11# D43# REQ0# 24 VID0 VID0 RSVD12
HDJ12 D8 G21 HDJ44 HREQJ1 J5 U2 TP_APJ0 VID1 AL5 N1
D12# D44# REQ1# AP0# TP20 24 VID1 VID1 PWRGOOD CPU_PWRG 19
HDJ13 B12 E22 HDJ45 HREQJ2 M6 U3 TP_APJ1 VID2 AM3 AL2 PROCHOTJ
D13# D45# REQ2# AP1# TP21 24 VID2 VID2 PROCHOT#
HDJ14 C12 D22 HDJ46 HREQJ3 K6 VID3 AL6 M2
D14# D46# REQ3# 24 VID3 VID3 THERMTRIP# THERMTRIPJ 20
HDJ15 D11 G22 HDJ47 HREQJ4 J6 F3 HBR0J VID4 AK4
D15# D47# HAJ[35..3] REQ4# BR0# HBR0J 8 24 VID4 VID4
HDBIJ0 A8 D19 HDBIJ2 R6 G3 TESTHI_8 VID5 AL4
8 HDBIJ0 DBI0# DBI2# HDBIJ2 8 8 HAJ[35..3] 8 HADSTBJ0 ADSTB0# TESTHI08 24 VID5 VID5
C8 G20 G5 G4 TESTHI_9 VID6 AM5 A13 HCOMP0
8 HDSTBNJ0 DSTBN0# DSTBN2# HDSTBNJ2 8 20,24 PECI PCREQ# TESTHI09 24 VID6 FC11 COMP0
B9 G19 H5 TESTHI_10 VID7 AM7 T1 HCOMP1
8 HDSTBPJ0 DSTBP0# DSTBP2# HDSTBPJ2 8 TESTHI10 24 VID7 FC12 COMP1
HAJ17 AB6 AN7 G2 HCOMP2
A17# 5 VID_SELECT FC16 COMP2
HDJ16 G9 D20 HDJ48 HAJ18 W6 J16 TP_DPJ0 F28 R1 HCOMP3
D16# D48# A18# DP0# TP8 4 CK_200M_P_CPU BCLK0 COMP3
HDJ17 F8 D17 HDJ49 HAJ19 Y6 H15 TP_DPJ1 G28 J2 HCOMP4
D17# D49# A19# DP1# TP6 4 CK_200M_N_CPU BCLK1 COMP4
HDJ18 F9 A14 HDJ50 HAJ20 Y4 H16 TP_DPJ2 T2 HCOMP5
D18# D50# 4 mils width, 10 mils spacing A20# DP2# TP4 COMP5 When terminated,
HDJ19 E9 C15 HDJ51 HAJ21 AA4 J17 TP_DPJ3 AE8
D19# D51# A21# DP3# TP1 SKTOCC# it must use +-1% resistor
HDJ20 D7 C14 HDJ52 HAJ22 AD6 N5
D20# D52# A22# 24 THERMDA RSVD13
HDJ21 E10 B15 HDJ53 HAJ23 AA5 H2 HGTLREF_1 AE6
D21# D53# A23# GTLREF1 24 THERMDC RSVD14
HDJ22 D10 C18 HDJ54 HAJ24 AB5 H1 HGTLREF_0 AL1 C9 H_TEST
HDJ23 D22# D54# HDJ55 HAJ25 A24# GTLREF0 THERMDA RSVD15 CPU_GTLREF3
F11 D23# D55# B16 AC5 A25# CS_GTLREF E24 AK1 THERMDC RSVD16 G10
HDJ24 F12 A17 HDJ56 HAJ26 AB4 H29 dummy D16
HDJ25 D24# D56# HDJ57 HAJ27 A26# FC15 R239 0 r0603h6+/-5% AN3 RSVD17
D13 D25# D57# B18 AF5 A27# 5 VCC_SENSE VCCSENSE RSVD18 A20
HDJ26 E13 C21 HDJ58 HAJ28 AF4 G23 R234 0 r0603h6+/-5% AN4 E23
D26# D58# A28# RESET# HCPURSTJ 8 5 VSS_SENSE VSSSENSE RSVD19
HDJ27 G13 B21 HDJ59 HAJ29 AG6 dummy AN5 F23
HDJ28 D27# D59# HDJ60 HAJ30 A29# VCC_MB_REG RSVD21
F14 D28# D60# B19 AG4 A30# RS0# B3 HRSJ0 8 AN6 VSS_MB_REG RSVD24 J3
HDJ29 G14 A19 HDJ61 HAJ31 AG5 F5
HDJ30 D29# D61# HDJ62 HAJ32 A31# RS1# HRSJ1 8 Changed pin name MS_ID1
F15 D30# D62# A22 AH4 A32# RS2# A3 HRSJ2 8 MSID1 V1
HDJ31 G15 D31# D63# B22 HDJ63 HAJ33 AH5 A33# F29 from RSV
RSVD9 MSID0 W1 MS_ID0 Stuff it will only support
HDBIJ1 G11 C20 HDBIJ3 HAJ34 AJ5 G1 TP_CPU_G1 Conroe and future processor
8 HDBIJ1 DBI1# DBI3# HDBIJ3 8 A34# FC27
G12 A16 HAJ35 AJ6 E29
8 HDSTBNJ1 DSTBN1# DSTBN3# HDSTBNJ3 8 A35# THERMDA/THERMDC FC26
E12 C17 AC4 Y1 CPU_BOOT
8 HDSTBPJ1 DSTBP1# DSTBP3# HDSTBPJ3 8 RSVD3 1. width=10 mils, spacing=10 mils. BOOTSELECT
AE4 AL3 V2 TP_CPU_V2 R309
RSVD4 2. route the lines in parallel VRDSEL LL_ID0 TP18
AD5 AA2 TP_CPU_AA2 51
8 HADSTBJ1 ADSTB1# LL_ID1 TP16
CPU_Conroe_Rev1.0_LGA775 A24 dummy
1D5V_ICH FC23 R152
CPU_Conroe_Rev1.0_LGA775
C cpu_lga775 1 OF 7 1K C
cpu_lga775 CPU_Conroe_Rev1.0_LGA775 -0.05
dummy
HVCCPLL cpu_lga775
VTT_OUT_RIGHT C420 C478
1
VTT_OUT_RIGHT
R322 62 HIERRJ
10uF
C0805 * * 10nF
50V, X7R, +/-10%
GTLREF voltage should be 0.67*VTT 10V, Y5V, +80%/-20% C0603 PROCHOTJ R353 0
2
R335 12 mils width, 15 mils spacing r0603h6 +/-5% ICH_THRM_UP 19,24
100 divider should be within 1.5" of the GTLREF pin dummy
+/-1% 0.22nF caps should be placed near CPU pin
place series resistor as close to divider placed near pin D23, within 500 mils Stuff to enable Thermal event
VTT_OUT_LEFT
VTT_OUT_RIGHT
R305 10 HGTLREF_1
Place at CPU end of route R345 62 HCPURSTJ r0603h6 +/-5% FSB_VTT
R316 62 HBR0J C356 U15D 4 OF 7
1
Place at CPU end of route
Place at CPU end of route * C362
1uF
R320
200 Ohm * 220pF
50V, X7R, +/-10%
HTCK
HTDI
AE1
AD1
TCK
TDI
VTT1
VTT2
A29
B25
R356 100 CPU_PWRG C0603
10V, Y5V, +80%/-20% +/-1% C0603 HTDO AF1 B29
2
dummy VTT_OUT_RIGHT dummy HTMS TDO VTT3
AC1 TMS VTT4 B30
RN20 HTRSTJ AG1 C29 VTT_OUT_RIGHT
TRST# VTT5
* 1 2
51 +/-5% TESTHI_13
TESTHI_10
If not used, pull up through 51 to 1k ohm
to vtt_out_right or ground respectively,i.e VTT6 A26
B27
3 4 TESTHI_11 R338 130 dummy FORCEPHJ reserved the termination circuit HBPM0J VTT7 R214 1K
5 6 AJ2 BPM0# VTT8 C28
R0603 +/-1% HBPM1J AJ1 A25
7 8 VTT_OUT_RIGHT HBPM2J BPM1# VTT9
AD2 BPM2# VTT10 A28
8p4r0603h7 HBPM3J AG2 A27
RN22 HBPM4J BPM3# VTT11
AF2 BPM4# VTT12 C30
*1 2
51 +/-5% TESTHI_9
TESTHI_8
R340
R0603
130 dummy PROCHOTJ
+/-1%
HBPM5J AG3 BPM5# VTT13 A30
C25
3 4 TESTHI_12 FP_RSTJ VTT14
5 6 4,19,28 FP_RSTJ AC2 DBR# VTT15 C26
7 8 VTT16 C27
FSB_VTT AK3 B26
8p4r0603h7 ITPCLKOUT0 VTT17
AJ3 ITPCLKOUT1 VTT18 D27
VTT19 D28
R306 dummy 49.9 +/-1% HCOMP4 R156 51 TESTHI_0 FSBSEL0 G29 D25
B 4,8 FSBSEL0 FSBSEL1 BSEL0 VTT20 B
4,8 FSBSEL1 H30 BSEL1 VTT21 D26
R307 49.9 +/-1% HCOMP5 FSBSEL2 G30 B28 VR_EN 5,16
dummy R157 51 TESTHI_2_7 4,8 FSBSEL2 BSEL2 VTT22
VTT23 D29
10 mils width D30 VTT_OUT_RIGHT
7 mils spacing to low speed signals VTT_OUT_RIGHT VTT24
VTTPWRGD AM6
14mils spacing to high speed signals VTT_OUT_LEFT VTT_OUT_LEFT
max. 1200mils AA1 VTT_OUT_RIGHT
VTT_OUT1 VTT_OUT_LEFT
VTT_OUT2 J1
R303 49.9 +/-1% HCOMP2 R308 51 TESTHI_1 F27 VTT_SEL
R326 51 HBPM5J VTT_OUT_LEFT VTT_OUT_LEFT VTT_SEL VTT_SEL 16
R315 49.9 +/-1% HCOMP3 CPU_Conroe_Rev1.0_LGA775
VTT_OUT_RIGHT R349 51 HBPM4J VTT_SEL VTT
cpu_lga775 No Connect 1.2V
10 mils width RN19 HBPM3J R350 0 TESTHI_8 R352 1.2V 1.2V
7 mils spacing to low speed signals
14mils spacing to high speed signals C366
R339 62
dummy
HTDO
*1 2
51 +/-5%
HBPM2J
r0603h6
R348
+/-5%
0 TESTHI_9
51 R344
51
Vss 1.1V
3 4
1
max. 1200mils VTT_OUT_RIGHT

* 0.1uF R324 62 HTDI
5
7
6
8
HBPM0J
r0603h6
R332
+/-5%
0 TP_CPU_G1
C0603 R323 62 HTMS r0603h6 +/-5%
2
25V, Y5V, +80%/-20% 8p4r0603h7 HBPM1J R351 0 H_TEST R358

R207 49.9 +/-1% HCOMP0 R325 62 HTRSTJ r0603h6 +/-5% R357 680
R311 62 HTCK 1K dummy
R336 49.9 +/-1% HCOMP1 Place BPM termination near CPU reserve for Kentsfield CPU support dummy
R577 62 HTRSTJ
10 mils width dummy MS_ID0 R343 VR_EN 5,16
C
7 mils spacing to low speed signals 0 dummy
14mils spacing to high speed signals place TRSTJ termination anywhere on route B Q24
max. 1200mils place TCK/TDI/TMS terminations near CPU within 1.5 inch MS_ID1 R342 MMBT3904_NL C375
1
0 dummy
* 0.1uF
E
16V, Y5V, +80%/-20%
R328 R327 dummy
2
VTT_OUT_RIGHT 51 51
FSB_VTT VTT_OUT_LEFT
GTLREF voltage should be 0.67*VTT
R334 12 mils width, 15 mils spacing stuff for only support 65W CPU
R154 R333 100 divider should be within 1.5" of the GTLREF pin
100 100 +/-1% 0.22nF caps should be placed near CPU pin For CPU before Conroe
A +/-1% +/-1% place series resistor as close to divider A
VTT_OUT_RIGHT
R304 10 HGTLREF_0 RN21
R155 10 CPU_GTLREF3 R317 10 CPU_GTLREF2 r0603h6 +/-5%
*1 2
VID3
* C361 C355
3 4
VID2
1
VID1
* C187 C188
* C365 C354 1uF R319
* 220pF
5 6
1
1uF
10V, Y5V, +80%/-20%
R153
200 Ohm * 220pF
50V, X7R, +/-10%
1uF
10V, Y5V, +80%/-20%
R318
200 Ohm * 220pF
50V, X7R, +/-10%
10V, Y5V, +80%/-20%
C0603
200 Ohm
+/-1%
50V, X7R, +/-10%
C0603 7 8
VID0
2
C0603 +/-1% C0603 C0603 +/-1% C0603 dummy 680

FOXCONN PCEG
2
dummy dummy RN18

*1 2
VID7
VID6 Title
3 4 VID5
5 6 VID4 LGA775 -1
7 8 Size Document Number Rev
680 C G33M03 C

5 4 3 2 1
5 4 3 2 1
FSB_VTT PLL Supply Filter
1
VCCP VCCP VCCP L15 L14
U15G 7 OF 7 L0805 10uH L0805 10uH
U15E 5 OF 7 U15F 6 OF 7 0805h14 0805h14
AG22 AK12 AF9 AL23 H22 D5 +/-20% +/-20%
VCCP1 VCCP93 VCCP185 VSS41 VSS126 VSS211
K29 AH22 AF22 A12 H21 A9
2
AM26 VCCP3 VCCP95 T29 AH11 VCCP187 VSS43 L25 H20 VSS128 VSS213 D3
AL8 VCCP4 VCCP96 AM14 AJ14 VCCP188 VSS44 J7 H19 VSS129 VSS214 B1
AE12 VCCP5 VCCP97 AM25 AH19 VCCP189 VSS45 AE28 H18 VSS130 VSS215 B5
AE11 AE9 AH29 AE29 AB7 B8 HVCCIOPLL
D VCCP6 VCCP98 VCCP190 VSS46 VSS131 VSS216 6 HVCCIOPLL D
W23 VCCP7 VCCP99 Y29 AH27 VCCP191 VSS47 K5 H17 VSS132 VSS217 AJ4
W24 VCCP8 VCCP100 AK25 AG28 VCCP192 VSS48 J4 AJ24 VSS133 VSS218 AE26
W25 AK19 AL26 AE30 AM17 AH1 HVCCA
VCCP9 VCCP101 VCCP193 VSS49 VSS134 VSS219 6 HVCCA
T25 VCCP10 VCCP102 AG15 AM12 VCCP194 VSS50 AN20 AC3 VSS135
Y28 VCCP11 VCCP103 J22 J24 VCCP195 VSS51 AF10 H14 VSS136 VSS221 V7
AL18 VCCP12 VCCP104 T24 J13 VCCP196 VSS52 AE24 P28 VSS137 VSS222 C13
1
AC25
W30
VCCP13
VCCP14
VCCP105
VCCP106
AG21
AM21
T28
W28
VCCP197
VCCP198
VSS53
VSS54
AM24
AN23
V6
AK2
VSS138
VSS139
VSS223
VSS224
AK24
AB30
* C197
*C196
Y30 J25 J12 H9 P27 L6 10uF 10uF
2
AN14 VCCP16 VCCP108 U30 J27 VCCP200 VSS56 H8 P26 VSS141 VSS226 L7
AD28 VCCP17 VCCP109 AL21 AG19 VCCP201 VSS57 H13 AM28 VSS142 VSS227 AB29
Y26 VCCP18 VCCP110 AG25 AL9 VCCP202 VSS58 AC6 AJ13 VSS143 VSS228 M1
AC29 AJ18 AD30 AC7 W4 AB28 HVSSA
VCCP19 VCCP111 VCCP203 VSS59 VSS144 VSS229 6 HVSSA
M29 VCCP20 VCCP112 J19 AF21 VCCP204 VSS60 AH6 P25 VSS145 VSS230 E8
U24 VCCP21 VCCP113 AH30 Y24 VCCP205 VSS61 C16 AJ20 VSS146 VSS231 AG20
J23 VCCP22 VCCP114 J15 AK14 VCCP206 VSS62 AM16 W7 VSS147 VSS232 AN17
AC27 VCCP23 VCCP115 AG12 J9 VCCP207 VSS63 AE25 P23 VSS148 VSS233 AB27
AM18 VCCP24 VCCP116 AJ22 M27 VCCP208 VSS64 AE27 AG13 VSS149 VSS234 AB26
AM19 VCCP25 VCCP117 J20 AF14 VCCP209 VSS65 AJ28 AG16 VSS150 VSS235 AN16
AB8 VCCP26 VCCP118 AH18 J30 VCCP210 VSS66 AJ7 AG17 VSS151 VSS236 M7
AC26 VCCP27 VCCP119 AH26 AG18 VCCP211 VSS67 F19 C7 VSS152 VSS237 AB25
J8 VCCP28 VCCP120 W27 AA8 VCCP212 VSS68 AH13 Y2 VSS153 VSS238 AB24
J28 VCCP29 VCCP121 AL25 AG8 VCCP213 VSS69 AD7 L30 VSS154 VSS239 AB23
T30 VCCP30 VCCP122 AN8 AL29 VCCP214 VSS70 AH16 L29 VSS155 VSS240 N3
AM9 VCCP31 VCCP123 AH14 AD29 VCCP215 VSS71 AK17 D15 VSS156 VSS241 AA30
AF15 VCCP32 VCCP124 U27 W8 VCCP216 VSS72 E17 AL27 VSS157 VSS242 F4
AC8 VCCP33 VCCP125 T23 AH8 VCCP217 VSS73 AH17 Y7 VSS158 VSS243 AG10
AE14 VCCP34 VCCP126 R8 N24 VCCP218 VSS74 AH20 L27 VSS159 VSS244 AE13
N23 VCCP35 VCCP127 AK22 AN22 VCCP219 VSS75 AE5 AA29 VSS160 VSS245 AF30
W29 VCCP36 VCCP128 AN29 J14 VCCP220 VSS76 AH23 N6 VSS161 VSS246 H28
U29 VCCP37 VCCP129 AG11 K26 VCCP221 VSS77 AE7 N7 VSS162 VSS247 F7
AC24 AK26 AF19 AM13 AA28 AF29 Place these caps. inside CPU socket
VCCP38 VCCP130 VCCP222 VSS78 VSS163 VSS248 VCCP 10uF/SP caps. co-layout
AC23 VCCP39 VCCP131 J10 N8 VCCP223 VSS79 AH24 AN13 VSS164 VSS249 AF28
Y23 VCCP40 VCCP132 AJ15 AF12 VCCP224 VSS80 AJ30 AA27 VSS165
AN26 VCCP41 VCCP133 AG26 M28 VCCP225 VSS81 AJ10 AA26 VSS166 VSS251 AF27
AN25 VCCP42 VCCP134 AN9 AK9 VCCP226 VSS82 AF3 P4 VSS167 VSS252 AF26
AN11 VCCP43 VCCP135 AH15 VSS83 AK5 AA25 VSS168 VSS253 AF25
C AN18 VCCP44 VCCP136 AF18 VSS84 AJ16 AA24 VSS169 VSS254 AN28 C
Y27 VCCP45 VCCP137 AL15 C10 VSS1 VSS85 AF6 P7 VSS170 VSS255 AN27
Y25 VCCP46 VCCP138 J26 D12 VSS2 VSS86 AK29 E26 VSS171 VSS256 AF24
AD24 VCCP47 VCCP139 J18 VSS87 AJ17 V30 VSS172 VSS257 AF23
1
AE23
AE22
VCCP48
VCCP49
VCCP140
VCCP141
J21
AG27
C24
K2
VSS4
VSS5
VSS88
VSS89
F22
AH3
R2
V29
VSS173
VSS174
VSS258
VSS259
AG24
AF17
*C243*C247*C254*C258*C263*C269*C244*C248*C255*C259*C264*C270*C245*C249*C256*C260*C265*C271
AN19 AK15 C22 AK10 V28 AN24 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF 10uF
2
VCCP50 VCCP142 VSS6 VSS90 VSS175 VSS260
V8 AF11 AN1 AM10 R5 H3
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%

VCCP51 VCCP143 VSS7 VSS91 VSS176 VSS261
K8 VCCP52 VCCP144 AD23 B14 VSS8 VSS92 F16 V27 VSS177
AE21 VCCP53 VCCP145 AM15 K7 VSS9 VSS93 AJ23 R7 VSS178 VSS263 P24
AM30 VCCP54 VCCP146 AF8 AE16 VSS10 VSS94 F13 E20 VSS179 VSS264 AE20
AE19 VCCP55 VCCP147 AK21 B11 VSS11 VSS95 AG7 AN10 VSS180 VSS265 AE17
AC30 VCCP56 VCCP148 AG30 AL10 VSS12 VSS96 F10 V25 VSS181 VSS266 E27
AE15 VCCP57 VCCP149 AJ21 AK23 VSS13 VSS97 L26 T3 VSS182 VSS267 T7
M30 VCCP58 VCCP150 AM11 H12 VSS14 VSS98 AD4 V24 VSS183 VSS268 R30
K27 VCCP59 VCCP151 AL11 AF7 VSS15 VSS99 H11 V23 VSS184 VSS269 AJ27
M24 VCCP60 VCCP152 AJ11 AK7 VSS16 VSS100 L24 T6 VSS185 VSS270 AB1
AN21 VCCP61 VCCP153 K30 H7 VSS17 VSS101 L23 AL7 VSS186 VSS271 AM4
T8 VCCP62 VCCP154 AL14 E14 VSS18 VSS102 AM23 E25 VSS187 VSS272 V26
AC28 VCCP63 VCCP155 AN30 L28 VSS19 VSS103 A15 6 TESTHI_12 U1 VSS188 VSS273 AA23
N25 VCCP64 VCCP156 AH25 Y5 VSS20 VSS104 AH10 R29 VSS189 VSS274 AL28
AE18 VCCP65 VCCP157 AL12 E11 VSS21 R28 VSS190 VSS275 AF20
W26 VCCP66 VCCP158 AJ9 AL16 VSS22 VSS106 B24 R27 VSS191 VSS276 AG23
AD25 VCCP67 VCCP159 AK11 AL24 VSS23 VSS107 L3 R26 VSS192
M8 VCCP68 VCCP160 AG14 AK13 VSS24 VSS108 H27 R25 VSS193
N30 VCCP69 VCCP161 N29 VSS109 A21 U7 VSS194
AD26 VCCP70 VCCP162 AL30 D21 VSS26 VSS110 AE2 R24 VSS195
AJ26 VCCP71 VCCP163 AJ25 AL20 VSS27 VSS111 AJ29 R23 VSS196
AM29 VCCP72 VCCP164 AH9 D18 VSS28 P30 VSS197
M25 VCCP73 VCCP165 J29 AN2 VSS29 VSS113 AK27 V3 VSS198
M26 VCCP74 VCCP166 J11 AK16 VSS30 VSS114 AK28 P29 VSS199
L8 K25 AK20 B20 AF16 F6 IMPSEL
VCCP75 VCCP167 VSS31 VSS115 VSS200 RSVD26
U25 VCCP76 VCCP168 P8 AM27 VSS32 VSS116 AM20 AE10 VSS201
Y8 K23 AM1 H26 AF13 Y3 HCOMP6
VCCP77 VCCP169 VSS33 VSS117 VSS202 COMP6 HCOMP7
AJ12 VCCP78 VCCP170 AL19 AL13 VSS34 VSS118 B17 H6 VSS203 COMP7 AE3
AD27 VCCP79 VCCP171 AM8 AL17 VSS35 VSS119 H25 A18 VSS204
U23 VCCP80 VCCP172 T26 C19 VSS36 VSS120 H24 A2 VSS205 RSVD31 E7
M23 N28 E28 AA3 E2 B13 HCOMP8
B VCCP81 VCCP173 VSS37 VSS121 VSS206 COMP8 B
AG29 VCCP82 VCCP174 AH12 AH7 VSS38 VSS122 AA7 D9 VSS207 RSVD33 D14
N27 VCCP83 VCCP175 AL22 AK30 VSS39 VSS123 H23 C4 VSS208 RSVD34 E6
AM22 VCCP84 VCCP176 AN15 D24 VSS40 VSS124 AA6 A6 VSS209 RSVD35 D1
U28 VCCP85 VCCP177 AJ8 VSS125 H10 D6 VSS210 RSVD36 E5
K28 VCCP86 VCCP178 U26
U8 VCCP87 VCCP179 AJ19 CPU_Conroe_Rev1.0_LGA775 CPU_Conroe_Rev1.0_LGA775
AK18 T27 cpu_lga775
VCCP88 VCCP180
cpu_lga775 cpu_lga775
AD8 VCCP89 VCCP181 AK8
K24 VCCP90 VCCP182 AN12
AH28 VCCP91 VCCP183 AG9
AH21 VCCP92 VCCP184 N26
CPU_Conroe_Rev1.0_LGA775
VTT_OUT_RIGHT
A A
R310 dummy 49.9 +/-1% HCOMP6

R204 24.9 +/-1% HCOMP8 R302 51 IMPSEL
R312 49.9 +/-1% HCOMP7
dummy
10 mils width
7 mils spacing to low speed signals 15 mils width
FOXCONN PCEG
14mils spacing to high speed signals 7 mils spacing to low speed signals Title
max. 1200mils 14mils spacing to high speed signals
max. 1200mils LGA775 -2
C G33M03 C

5 4 3 2 1
5 4 3 2 1
U1MCH HDJ[63..0]
6 HAJ[35..3] HDJ[63..0] 6 Placed both Resistors close to GMCH
U16B
HAJ3 J42 R40 HDJ0 Within 750 mils
HAJ4 FSB_AB_3 FSB_DB_0 HDJ1 U16E W=4 mils, S=10 mils from GMCH to connector
L39 FSB_AB_4 FSB_DB_1 P41
HAJ5 J40 R41 HDJ2
HAJ6 FSB_AB_5 FSB_DB_2 HDJ3 U1MCH FSBSEL0_R HSYNC_P R195 39+/-1%
L37 FSB_AB_6 FSB_DB_3 N40 U16A G20 BSEL0 CRT_HSYNC C15 HSYNC 18
HAJ7 L36 R42 HDJ4 FSBSEL1_R J20 E15 VSYNC_P R196 39+/-1%
FSB_AB_7 FSB_DB_4 BSEL1 CRT_VSYNC VSYNC 18
HAJ8 K42 M39 HDJ5 EXP_RXP0 F13 D11 EXP_TXP0 FSBSEL2_R J18
FSB_AB_8 FSB_DB_5 17 EXP_RXP0 PEG_RXP_0 PEG_TXP_0 EXP_TXP0 17 BSEL2
HAJ9 N32 N41 HDJ6 EXP_RXN0 E13 D12 EXP_TXN0 TP10 TP_ALLZTEST K20 B18
FSB_AB_9 FSB_DB_6 17 EXP_RXN0 PEG_RXN_0 PEG_TXN_0 EXP_TXN0 17 ALLZTEST CRT_RED RED 18
HAJ10 N34 N42 HDJ7 EXP_RXP1 K15 B11 EXP_TXP1 TP7 TP_XORTEST F20 C19
FSB_AB_10 FSB_DB_7 17 EXP_RXP1 PEG_RXP_1 PEG_TXP_1 EXP_TXP1 17 XORTEST CRT_GREEN GREEN 18
HAJ11 M38 L41 HDJ8 EXP_RXN1 J15 A10 EXP_TXN1 G18 B20
FSB_AB_11 FSB_DB_8 17 EXP_RXN1 PEG_RXN_1 PEG_TXN_1 EXP_TXN1 17 RESERVED_11 CRT_BLUE BLUE 18
HAJ12 N37 J39 HDJ9 EXP_RXP2 F12 C10 EXP_TXP2 GMCH_EXP_SLR E18 C18
FSB_AB_12 FSB_DB_9 17 EXP_RXP2 PEG_RXP_2 PEG_TXP_2 EXP_TXP2 17 EXP_SLR CRT_REDB
HAJ13 HDJ10 EXP_RXN2 EXP_TXN2 R200 R201 R202
FSB
M36 FSB_AB_13 FSB_DB_10 L42 17 EXP_RXN2 E12 PEG_RXN_2 PEG_TXN_2 D9 EXP_TXN2 17 K17 RESERVED_12 CRT_GREENB D19
HAJ14 R34 J41 HDJ11 EXP_RXP3 J12 B9 EXP_TXP3 GMCH_EXP_EN_HDR J17 D20 150 150 150
D FSB_AB_14 FSB_DB_11 17 EXP_RXP3 PEG_RXP_3 PEG_TXP_3 EXP_TXP3 17 17
GMCH_EXP_EN_HDR EXP_EN CRT_BLUEB D
HAJ15 N35 K41 HDJ12 EXP_RXN3 H12 B7 EXP_TXN3 G15 +/-1% +/-1% +/-1%
FSB_AB_15 FSB_DB_12 17 EXP_RXN3 PEG_RXN_3 PEG_TXN_3 EXP_TXN3 17 RESERVED_13
HAJ16 N38 G40 HDJ13 EXP_RXP4 J11 D7 EXP_TXP4 L13 DDCA_DATA
FSB_AB_16 FSB_DB_13 17 EXP_RXP4 PEG_RXP_4 PEG_TXP_4 EXP_TXP4 17 CRT_DDC_DATA DDCA_DATA 18
VGA
HAJ17 U37 F41 HDJ14 EXP_RXN4 H11 D6 EXP_TXN4 L17 M13 DDCA_CLK
FSB_AB_17 FSB_DB_14 17 EXP_RXN4 PEG_RXN_4 PEG_TXN_4 EXP_TXN4 17 RESERVED_14 CRT_DDC_CLK DDCA_CLK 18
HAJ18 N39 F42 HDJ15 EXP_RXP5 F7 B5 EXP_TXP5 E20 Placed close to
FSB_AB_18 FSB_DB_15 17 EXP_RXP5 PEG_RXP_5 PEG_TXP_5 EXP_TXP5 17 Enable TLS TCEN GMCH within
HAJ19 R37 C42 HDJ16 EXP_RXN5 E7 B6 EXP_TXN5 N18 A20 REFSET
FSB_AB_19 FSB_DB_16 17 EXP_RXN5 PEG_RXN_5 PEG_TXN_5 EXP_TXN5 17 RESERVED_16 CRT_IREF 300 mils
HAJ20 P42 D41 HDJ17 EXP_RXP6 E5 B3 EXP_TXP6 R186 N15
FSB_AB_20 FSB_DB_17 17 EXP_RXP6 PEG_RXP_6 PEG_TXP_6 EXP_TXP6 17 RESERVED_17
HAJ21 R39 F38 HDJ18 EXP_RXN6 F6 B4 EXP_TXN6 1K N17 C14 CK_96M_P_GMCH
FSB_AB_21 FSB_DB_18 17 EXP_RXN6 PEG_RXN_6 PEG_TXN_6 EXP_TXN6 17 RESERVED_18 DPL_REFCLKINP CK_96M_P_GMCH 4
HAJ22 V36 G37 HDJ19 EXP_RXP7 C2 F2 EXP_TXP7 L15 D13 CK_96M_N_GMCH
FSB_AB_22 FSB_DB_19 17 EXP_RXP7 PEG_RXP_7 PEG_TXP_7 EXP_TXP7 17 RESERVED_19 DPL_REFCLKINN CK_96M_N_GMCH 4
HAJ23 R38 E42 HDJ20 EXP_RXN7 D2 E2 EXP_TXN7 L18
HAJ24 U36 E39 HDJ21 EXP_RXP8 G6 F4 EXP_TXP8 M18 M11
FSB_AB_24 FSB_DB_21 17 EXP_RXP8 PEG_RXP_8 PEG_TXP_8 EXP_TXP8 17 RESERVED_21 VSS
HAJ25 U33 E37 HDJ22 EXP_RXN8 G5 G4 EXP_TXN8 V31
HAJ26 R35 C39 HDJ23 EXP_RXP9 L9 J4 EXP_TXP9
PCIE
FSB_AB_26 FSB_DB_23 17 EXP_RXP9 PEG_RXP_9 PEG_TXP_9 EXP_TXP9 17
HAJ27 V33 B39 HDJ24 EXP_RXN9 L8 K3 EXP_TXN9
FSB_AB_27 FSB_DB_24 17 EXP_RXN9 PEG_RXN_9 PEG_TXN_9 EXP_TXN9 17
HAJ28 V35 G33 HDJ25 EXP_RXP10 M8 L2 EXP_TXP10 CL_DATA AD12 H18 TP_MCH_F13
FSB_AB_28 FSB_DB_25 17 EXP_RXP10 PEG_RXP_10 PEG_TXP_10 EXP_TXP10 17 20 CL_DATA CL_DATA RESERVED_34 TP9
HAJ29 Y34 A37 HDJ26 EXP_RXN10 M9 K1 EXP_TXN10 CL_CLK AD13 F17 TP_MCH_F17
FSB_AB_29 FSB_DB_26 17 EXP_RXN10 PEG_RXN_10 PEG_TXN_10 EXP_TXN10 17 20 CL_CLK CL_CLK RESERVED_35 TP5
HAJ30 V42 F33 HDJ27 EXP_RXP11 M4 N2 EXP_TXP11 CL_VREF_MCH AM5 A14 TP_MCH_A14
FSB_AB_30 FSB_DB_27 17 EXP_RXP11 PEG_RXP_11 PEG_TXP_11 EXP_TXP11 17 CL_VREF RESERVED_36 TP3
HAJ31 V38 E35 HDJ28 EXP_RXN11 L4 M2 EXP_TXN11 CL_RST AA12 AM18 ICH_PLTRSTJ
FSB_AB_31 FSB_DB_28 17 EXP_RXN11 PEG_RXN_11 PEG_TXN_11 EXP_TXN11 17 20 CL_RST CL_RSTB RSTINB ICH_PLTRSTJ 24,34
MISC
HAJ32 Y36 K32 HDJ29 EXP_RXP12 M5 P3 EXP_TXP12 PWRGD_3V AM15 AM17 PWRGD_3V
FSB_AB_32 FSB_DB_29 17 EXP_RXP12 PEG_RXP_12 PEG_TXP_12 EXP_TXP12 17 Controller Link Routing CL_PWROK PWROK PWRGD_3V 16,19,20
HAJ33 Y38 H32 HDJ30 EXP_RXN12 M6 N4 EXP_TXN12 J13 ICH_SYNCJ
FSB_AB_33 FSB_DB_30 17 EXP_RXN12 PEG_RXN_12 PEG_TXN_12 EXP_TXN12 17 1. width=4 mils, Spacing=7 mils ICH_SYNCB ICH_SYNCJ 19
HAJ34 Y39 B34 HDJ31 EXP_RXP13 R9 R2 EXP_TXP13
FSB_AB_34 FSB_DB_31 17 EXP_RXP13 PEG_RXP_13 PEG_TXP_13 EXP_TXP13 17 2. CL_CLK and CL_DATA should be length
HAJ35 AA37 J31 HDJ32 EXP_RXN13 R10 P1 EXP_TXN13 A42
FSB_AB_35 FSB_DB_32 17 EXP_RXN13 PEG_RXN_13 PEG_TXN_13 EXP_TXN13 17 matched to within 100 mils NC
F32 HDJ33 EXP_RXP14 T4 U2 EXP_TXP14 R20
FSB_DB_33 17 EXP_RXP14 PEG_RXP_14 PEG_TXP_14 EXP_TXP14 17 RESERVED_37
M31 HDJ34 EXP_RXN14 R4 T2 EXP_TXN14 AA10
6 HREQJ[4..0] FSB_DB_34 17 EXP_RXN14 PEG_RXN_14 PEG_TXN_14 EXP_TXN14 17 RESERVED_22
HREQJ0 F40 E31 HDJ35 EXP_RXP15 R6 V3 EXP_TXP15 AA9
FSB_REQB_0 FSB_DB_35 17 EXP_RXP15 PEG_RXP_15 PEG_TXP_15 EXP_TXP15 17 RESERVED_23
HREQJ1 L35 K31 HDJ36 EXP_RXN15 R7 U4 EXP_TXN15 AA11
FSB_REQB_1 FSB_DB_36 17 EXP_RXN15 PEG_RXN_15 PEG_TXN_15 EXP_TXN15 17 RESERVED_24
HREQJ2 L38 G31 HDJ37 Y12
HREQJ3 FSB_REQB_2 FSB_DB_37 HDJ38 DMI_RXP0 DMI_TXP0 RESERVED_25
G43 FSB_REQB_3 FSB_DB_38 K29 19 DMI_RXP0 W2 DMI_RXP_0 DMI_TXP_0 V7 DMI_TXP0 19
HREQJ4 J37 F31 HDJ39 DMI_RXN0 V1 V6 DMI_TXN0 U30
FSB_REQB_4 FSB_DB_39 19 DMI_RXN0 DMI_RXN_0 DMI_TXN_0 DMI_TXN0 19 RESERVED_26
J29 HDJ40 DMI_RXP1 Y8 W4 DMI_TXP1 U31
FSB_DB_40 19 DMI_RXP1 DMI_RXP_1 DMI_TXP_1 DMI_TXP1 19 RESERVED_27
M34 F29 HDJ41 DMI_RXN1 Y9 Y4 DMI_TXN1 R29
6 HADSTBJ0 FSB_ADSTBB_0 FSB_DB_41 19 DMI_RXN1 DMI_RXN_1 DMI_TXN_1 DMI_TXN1 19 RESERVED_28
U34 L27 HDJ42 DMI_RXP2 AA7 AC8 DMI_TXP2 R30
6 HADSTBJ1 FSB_ADSTBB_1 FSB_DB_42 19 DMI_RXP2 DMI_RXP_2 DMI_TXP_2 DMI_TXP2 19 RESERVED_29
K27 HDJ43 DMI_RXN2 AA6 AC9 DMI_TXN2
FSB_DB_43 19 DMI_RXN2 DMI_RXN_2 DMI_TXN_2 DMI_TXN2 19
DMI
M42 H26 HDJ44 DMI_RXP3 AB3 Y2 DMI_TXP3 U12
6 HDSTBPJ0 FSB_DSTBPB_0 FSB_DB_44 19 DMI_RXP3 DMI_RXP_3 DMI_TXP_3 DMI_TXP3 19 RESERVED_30
M43 L26 HDJ45 DMI_RXN3 AA4 AA2 DMI_TXN3 U11
6 HDSTBNJ0 FSB_DSTBNB_0 FSB_DB_45 19 DMI_RXN3 DMI_RXN_3 DMI_TXN_3 DMI_TXN3 19 RESERVED_31
HDBIJ0 M40 J26 HDJ46 R12
6 HDBIJ0 FSB_DINVB_0 FSB_DB_46 1D25V_MCH RESERVED_32
G35 M26 HDJ47 R13
6 HDSTBPJ1 FSB_DSTBPB_1 FSB_DB_47 RESERVED_33 5 OF 8
H33 C33 HDJ48 B12
6 HDSTBNJ1 FSB_DSTBNB_1 FSB_DB_48 4 CK_PE_100M_P_GMCH EXP_CLKINP
C HDBIJ1 J33 D35 HDJ49 B13 AC11 GMCH_EXP_COMP R235 24.9 C
6 HDBIJ1 FSB_DINVB_1 FSB_DB_49 4 CK_PE_100M_N_GMCH EXP_CLKINN EXP_COMPO
G27 E41 HDJ50 AC12 +/-1%
6 HDSTBPJ2 FSB_DSTBPB_2 FSB_DB_50 HDJ51 EXP_COMPI
6 HDSTBNJ2 H27 FSB_DSTBNB_2 FSB_DB_51 B41 17 SDVO_CTRLDATA G17 SDVO_CTRLDATA Bearlake G33
HDBIJ2 G29 D42 HDJ52 E17 width 10 mils, spacing 6 mils at breakout
6 HDBIJ2 FSB_DINVB_2 FSB_DB_52 17 SDVO_CTRLCLK SDVO_CTRLCLK 2 OF 8 10 mils after that
B38 C40 HDJ53
6 HDSTBPJ3 FSB_DSTBPB_3 FSB_DB_53 HDJ54
6 HDSTBNJ3 C38 FSB_DSTBNB_3 FSB_DB_54 C35
HDBIJ3 E33 B40 HDJ55 Bearlake G33
6 HDBIJ3 FSB_DINVB_3 FSB_DB_55
D38 HDJ56
FSB_DB_56 HDJ57 3D3V_SYS
6 HADSJ W40 FSB_ADSB FSB_DB_57 D37
Y40 B33 HDJ58
6 HTRDYJ FSB_TRDYB FSB_DB_58 HDJ59
6 HDRDYJ W41 FSB_DRDYB FSB_DB_59 D33
T43 C34 HDJ60 R184
6 HDEFERJ FSB_DEFERB FSB_DB_60 HDJ61 2.2K
6 HITMJ Y43 FSB_HITMB FSB_DB_61 B35
U42 A32 HDJ62
6 HITJ FSB_HITB FSB_DB_62 HDJ63
6 HLOCKJ V41 FSB_LOCKB FSB_DB_63 D32
AA42 DDCA_CLK
6 HBR0J FSB_BREQ0B HSWING
6 HBNRJ W42 FSB_BNRB FSB_SWING B25
G39 D23 HRCOMP 3D3V_SYS
6 HBPRIJ FSB_BPRIB FSB_RCOMP HSCOMP
6 HDBSYJ U40 FSB_DBSYB FSB_SCOMP C25
U41 D25 HSCOMPJ
6 HRSJ0 FSB_RSB_0 FSB_SCOMPB MCH_GTLREF R191
6 HRSJ1 AA41 FSB_RSB_1 FSB_DVREF D24
U39 B24 2.2K
6 HRSJ2 FSB_RSB_2 FSB_ACCVREF
6 HCPURSTJ C31 FSB_CPURSTB HPL_CLKINP R32 CK_200M_P_GMCH 4
U32 DDCA_DATA
HPL_CLKINN CK_200M_N_GMCH 4
1 OF 8
Bearlake G33 R192 1.3K +/-1% REFSET
HEATSINK
FSB_VTT placed close to GMCH within 500 mils U16_1

COMP SIGNAL TERMINATION 1 2
4 mils width 3 4
6 mils spacing to static signals 5 6 A D
FSB_VTT R182 49.9 HSCOMPJ 12 mils spacing to toppling signals 7 8
+/-1% C223
1
B
R177 * 2.7pF
50V, NPO, +/-0.25pF
Header_2X4
B
301 Resistor and Capacitor C0603
2
+/-1% next to each other. dummy R167 10K FSBSEL0_R

4,6 FSBSEL0
R181 49.9 HSCOMP
This part is just for its footprint of MCH (R)
R190 51 HSWING +/-1% C222 R168 10K FSBSEL1_R
4,6 FSBSEL1 FOXCONN
1
Del it in BOM
* 2.7pF
50V, NPO, +/-0.25pF
R176 C213 C0603 R185 10K FSBSEL2_R
2
4,6 FSBSEL2
1
100
+/-1% * 0.1uF
25V, Y5V, +80%/-20%
dummy 1D25V_MCH
r0603h6 C0603
2
HSWING voltage should be 0.25*FSB_VTT 4 mils width, 6 mils spacing in the breakout R263
10 mils width, 10 mils spacing 4 mils width, 14 mils spacing after the breakout 1K
max. 3 inches long max. 750 mils
routed on a single layer and matched within 50mils
+/-1%
B C
R183 1K dummy GMCH_EXP_SLR CL_VREF_MCH
HRCOMP R194 16.5 +/-1% r0603h6 -0.05 Heatsink
R262 C324 0.349V
1
ATX: dummy
BTX: pop
392 Ohm
+/-1% * 0.1uF
25V, Y5V, +80%/-20%
10 mils width, 7 mils spacing C0603
2
max. 500 mils Place close to VREF Pin
5 on 5 mils in breakout, max 250 mils
CLIP1N CLIP3N
min. 4 mils width
10 mils spacing
5 mils min. for max. of 300 mils in breakout
FSB_VTT Clip_2P Clip_2P
For GMCH heatsink hook

R173
100
+/-1%
A R189 51 MCH_GTLREF A
C208 R172 C221

1
* 1uF
C0603
200 Ohm
+/-1% * 220pF
50V, X7R, +/-10%
C0603
10V, Y5V, +80%/-20%
dummy
GTLREF voltage should be 0.67*VTT = 0.75V

FOXCONN PCEG
12 mils width, 15 mils spacing Title
divider should be within 1.5" of the GTLREF pin
220pF caps should be placed near MCH pin Bearlake GMCH -1
place series resistor as close to divider Size Document Number Rev
Resistor and Capacitor next to each other C G33M03 C

5 4 3 2 1
5 4 3 2 1
U16D U1MCH
U16C U1MCH
14,15 M_MAA_B[14..0] M_DQS_B[7..0] 14
M_MAA_B0 AW15 AV6 M_DQS_B0
12,13 M_MAA_A[14..0] M_DQS_A[7..0] 12 DDR_B_MA_0 DDR_B_DQS_0 M_DQS_BJ[7..0] 14
M_MAA_A0 BB30 AP2 M_DQS_A0 M_MAA_B1 BB15 AU5 M_DQS_BJ0
DDR_A_MA_0 DDR_A_DQS_0 M_DQS_AJ[7..0] 12 DDR_B_MA_1 DDR_B_DQSB_0 M_DQM_B[7..0] 14
M_MAA_A1 AY25 AP3 M_DQS_AJ0 M_MAA_B2 BA15 AR7 M_DQM_B0
DDR_A_MA_1 DDR_A_DQSB_0 M_DQM_A[7..0] 12 DDR_B_MA_2 DDR_B_DM_0 M_DATA_B[63..0] 14
M_MAA_A2 BA23 AN2 M_DQM_A0 M_MAA_B3 AY15
DDR_A_MA_2 DDR_A_DM_0 M_DATA_A[63..0] 12 DDR_B_MA_3
M_MAA_A3 BB23 M_MAA_B4 BA14 AN7 M_DATA_B0
M_MAA_A4 DDR_A_MA_3 M_DATA_A0 M_MAA_B5 DDR_B_MA_4 DDR_B_DQ_0 M_DATA_B1
AY23 DDR_A_MA_4 DDR_A_DQ_0 AM1 BB14 DDR_B_MA_5 DDR_B_DQ_1 AN8
M_MAA_A5 BB22 AN3 M_DATA_A1 M_MAA_B6 AW12 AW5 M_DATA_B2
M_MAA_A6 DDR_A_MA_5 DDR_A_DQ_1 M_DATA_A2 M_MAA_B7 DDR_B_MA_6 DDR_B_DQ_2 M_DATA_B3
BA22 DDR_A_MA_6 DDR_A_DQ_2 AR2 BA13 DDR_B_MA_7 DDR_B_DQ_3 AW7
M_MAA_A7 BB21 AR3 M_DATA_A3 M_MAA_B8 BB13 AN5 M_DATA_B4
AW21 DDR_A_MA_8 DDR_A_DQ_4 AL3 AY13 DDR_B_MA_9 DDR_B_DQ_5 AN6
M_MAA_A9 BA21 AM2 M_DATA_A5 M_MAA_B10 BA17 AN9 M_DATA_B6
BB31 DDR_A_MA_10 DDR_A_DQ_6 AR5 AY12 DDR_B_MA_11 DDR_B_DQ_7 AU7
M_MAA_A11 AY21 AR4 M_DATA_A7 M_MAA_B12 BA11
D DDR_A_MA_11 DDR_A_DQ_7 DDR_B_MA_12 M_DQS_B[7..0] 14 D
M_MAA_A12 BC20 M_MAA_B13 AY27 AR12 M_DQS_B1
DDR_A_MA_12 M_DQS_A[7..0] 12 DDR_B_MA_13 DDR_B_DQS_1 M_DQS_BJ[7..0] 14
M_MAA_A13 AY38 AW2 M_DQS_A1 M_MAA_B14 BB11 AP12 M_DQS_BJ1
DDR_A_MA_13 DDR_A_DQS_1 M_DQS_AJ[7..0] 12 DDR_B_MA_14 DDR_B_DQSB_1 M_DQM_B[7..0] 14
M_MAA_A14 BA19 AW1 M_DQS_AJ1 AW9 M_DQM_B1
DDR_A_MA_14 DDR_A_DQSB_1 M_DQM_A[7..0] 12 DDR_B_DM_1 M_DATA_B[63..0] 14
AW3 M_DQM_A1 BB25
DDR_A_DM_1 M_DATA_A[63..0] 12 14,15 M_WE_BJ DDR_B_WEB
BA33 AW26 AT11 M_DATA_B8
12,13 M_WE_AJ DDR_A_WEB M_DATA_A8 14,15 M_CAS_BJ DDR_B_CASB DDR_B_DQ_8 M_DATA_B9
12,13 M_CAS_AJ AW35 DDR_A_CASB DDR_A_DQ_8 AV4 14,15 M_RAS_BJ AY24 DDR_B_RASB DDR_B_DQ_9 AU11
AY33 AV3 M_DATA_A9 AP13 M_DATA_B10
12,13 M_RAS_AJ DDR_A_RASB DDR_A_DQ_9 M_DATA_A10 14,15 M_BS_B[2..0] M_BS_B0 DDR_B_DQ_10 M_DATA_B11
DDR_A_DQ_10 BA4 BB17 DDR_B_BS_0 DDR_B_DQ_11 AR13
M_BS_A0 BA31 BB3 M_DATA_A11 M_BS_B1 AY17 AR11 M_DATA_B12
M_BS_A1 DDR_A_BS_0 DDR_A_DQ_11 M_DATA_A12 M_BS_B2 DDR_B_BS_1 DDR_B_DQ_12 M_DATA_B13
AY31 DDR_A_BS_1 DDR_A_DQ_12 AU2 AY11 DDR_B_BS_2 DDR_B_DQ_13 AU9
M_BS_A2 AY20 AU1 M_DATA_A13 AV12 M_DATA_B14
DDR_A_BS_2 DDR_A_DQ_13 M_DATA_A14 DDR_B_DQ_14 M_DATA_B15
12,13 M_BS_A[2..0] DDR_A_DQ_14 AY2 14,15 M_SCS_B0J BA25 DDR_B_CSB_0 DDR_B_DQ_15 AU12
BA34 AY3 M_DATA_A15 BA29
12,15 M_SCS_A0J DDR_A_CSB_0 DDR_A_DQ_15 14,15 M_SCS_B1J DDR_B_CSB_1 M_DQS_B[7..0] 14
AY35 BA26 AP15 M_DQS_B2
12,15 M_SCS_A1J DDR_A_CSB_1 M_DQS_A[7..0] 12 14,15 M_SCS_B2J DDR_B_CSB_2 DDR_B_DQS_2 M_DQS_BJ[7..0] 14
BB33 AY7 M_DQS_A2 BA30 AR15 M_DQS_BJ2
12,15 M_SCS_A2J DDR_A_CSB_2 DDR_A_DQS_2 M_DQS_AJ[7..0] 12 14,15 M_SCS_B3J DDR_B_CSB_3 DDR_B_DQSB_2 M_DQM_B[7..0] 14
BB38 BA6 M_DQS_AJ2 AW13 M_DQM_B2
12,13 M_SCS_A3J DDR_A_CSB_3 DDR_A_DQSB_2 M_DQM_A[7..0] 12 14,15 M_SCKE_B[3..0] DDR_B_DM_2 M_DATA_B[63..0] 14
BB6 M_DQM_A2 M_SCKE_B0 AW11
12,13 M_SCKE_A[3..0] DDR_A_DM_2 M_DATA_A[63..0] 12 DDR_B_CKE_0
M_SCKE_A0 AY19 M_SCKE_B1 BC12 AU15 M_DATA_B16
M_SCKE_A1 DDR_A_CKE_0 M_DATA_A16 M_SCKE_B2 DDR_B_CKE_1 DDR_B_DQ_16 M_DATA_B17
AW18 DDR_A_CKE_1 DDR_A_DQ_16 BB5 BA10 DDR_B_CKE_2 DDR_B_DQ_17 AV13
M_SCKE_A2 BB19 AY6 M_DATA_A17 M_SCKE_B3 BB10 AU17 M_DATA_B18
M_SCKE_A3 DDR_A_CKE_2 DDR_A_DQ_17 M_DATA_A18 DDR_B_CKE_3 DDR_B_DQ_18 M_DATA_B19
BA18 DDR_A_CKE_3 DDR_A_DQ_18 BA9 DDR_B_DQ_19 AT17
BB9 M_DATA_A19 14,15 M_ODT_B[3..0] M_ODT_B0 BB27 AU13 M_DATA_B20
12,13,15 M_ODT_A[3..0] M_ODT_A0 DDR_A_DQ_19 M_DATA_A20 M_ODT_B1 DDR_B_ODT_0 DDR_B_DQ_20 M_DATA_B21
BB35 DDR_A_ODT_0 DDR_A_DQ_20 BA5 AW29 DDR_B_ODT_1 DDR_B_DQ_21 AM13
M_ODT_A1 BA38 BB4 M_DATA_A21 M_ODT_B2 BA27 AV15 M_DATA_B22
M_ODT_A2 DDR_A_ODT_1 DDR_A_DQ_21 M_DATA_A22 M_ODT_B3 DDR_B_ODT_2 DDR_B_DQ_22 M_DATA_B23
BA35 DDR_A_ODT_2 DDR_A_DQ_22 BC7 AY29 DDR_B_ODT_3 DDR_B_DQ_23 AW17
M_ODT_A3 BA39 AY9 M_DATA_A23
DDR_A_ODT_3 DDR_A_DQ_23 M_DQS_B[7..0] 14
AW31 AT24 M_DQS_B3
M_DQS_A[7..0] 12 14 CK_M_200M_P_DDR0_B DDR_B_CK_0 DDR_B_DQS_3 M_DQS_BJ[7..0] 14
AR31 AT20 M_DQS_A3 AV31 AU26 M_DQS_BJ3
12 CK_M_200M_P_DDR0_A DDR_A_CK_0 DDR_A_DQS_3 M_DQS_AJ[7..0] 12 14 CK_M_200M_N_DDR0_B DDR_B_CKB_0 DDR_B_DQSB_3 M_DQM_B[7..0] 14
AU31 AU18 M_DQS_AJ3 AU27 AP23 M_DQM_B3
12 CK_M_200M_N_DDR0_A DDR_A_CKB_0 DDR_A_DQSB_3 M_DQM_A[7..0] 12 14 CK_M_200M_P_DDR1_B DDR_B_CK_1 DDR_B_DM_3 M_DATA_B[63..0] 14
AP27 AN18 M_DQM_A3 AT27
12 CK_M_200M_P_DDR1_A DDR_A_CK_1 DDR_A_DM_3 M_DATA_A[63..0] 12 14 CK_M_200M_N_DDR1_B DDR_B_CKB_1
AN27 AV32 AV24 M_DATA_B24
12 CK_M_200M_N_DDR1_A DDR_A_CKB_1 M_DATA_A24 14 CK_M_200M_P_DDR2_B DDR_B_CK_2 DDR_B_DQ_24 M_DATA_B25
12 CK_M_200M_P_DDR2_A AV33 DDR_A_CK_2 DDR_A_DQ_24 AT18 14 CK_M_200M_N_DDR2_B AT32 DDR_B_CKB_2 DDR_B_DQ_25 AT23
AW33 AR18 M_DATA_A25 AR29 AT26 M_DATA_B26
12 CK_M_200M_N_DDR2_A DDR_A_CKB_2 DDR_A_DQ_25 M_DATA_A26 14 CK_M_200M_P_DDR3_B DDR_B_CK_3 DDR_B_DQ_26 M_DATA_B27
12 CK_M_200M_P_DDR3_A AP29 DDR_A_CK_3 DDR_A_DQ_26 AU21 14 CK_M_200M_N_DDR3_B AU29 DDR_B_CKB_3 DDR_B_DQ_27 AP26
AP31 AT21 M_DATA_A27 AV29 AU23 M_DATA_B28
12 CK_M_200M_P_DDR4_A AM26 DDR_A_CK_4 DDR_A_DQ_28 AP17 14 CK_M_200M_N_DDR4_B AW27 DDR_B_CKB_4 DDR_B_DQ_29 AW23
AM27 AN17 M_DATA_A29 AN33 AR24 M_DATA_B30
C
12 CK_M_200M_P_DDR5_A AT33 DDR_A_CK_5 DDR_A_DQ_30 AP20 14 CK_M_200M_N_DDR5_B AP32 DDR_B_CKB_5 DDR_B_DQ_31 AN26 C
AU33 AV20 M_DATA_A31
12 CK_M_200M_N_DDR5_A DDR_A_CKB_5 DDR_A_DQ_31 M_DQS_B[7..0] 14
AW39 M_DQS_B4
M_DQS_A[7..0] 12 DDR_B_DQS_4 M_DQS_BJ[7..0] 14
AR41 M_DQS_A4 AU39 M_DQS_BJ4
DDR_A_DQS_4 M_DQS_AJ[7..0] 12 DDR_B_DQSB_4 M_DQM_B[7..0] 14
AR40 M_DQS_AJ4 AU37 M_DQM_B4
DDR_A_DQSB_4 M_DQM_A[7..0] 12 DDR_B_DM_4 M_DATA_B[63..0] 14
AU43 M_DQM_A4
DDR_A_DM_4 M_DATA_A[63..0] 12
AW37 M_DATA_B32
M_DATA_A32 DDR_B_DQ_32 M_DATA_B33
DDR_A_DQ_32 AV42 DDR_B_DQ_33 AV38
AU40 M_DATA_A33 AN36 M_DATA_B34
DDR_A_DQ_33 M_DATA_A34 DDR_B_DQ_34 M_DATA_B35
DDR_A_DQ_34 AP42 BA2 RESERVED_2 DDR_B_DQ_35 AN37
AN39 M_DATA_A35 AW42 AU35 M_DATA_B36
DDR_A_DQ_35 M_DATA_A36 RESERVED_3 DDR_B_DQ_36 M_DATA_B37
DDR_A_DQ_36 AV40 AN32 RESERVED_4 DDR_B_DQ_37 AR35
AV41 M_DATA_A37 AM31 AN35 M_DATA_B38
DDR_A_DQ_37 M_DATA_A38 RESERVED_5 DDR_B_DQ_38 M_DATA_B39
DDR_A_DQ_38 AR42 AG32 RESERVED_6 DDR_B_DQ_39 AR37
AP41 M_DATA_A39 AF32
DDR_A_DQ_39 RESERVED_7 M_DQS_B[7..0] 14
TP_MCH_AP21 AP21 AL35 M_DQS_B5
M_DQS_A[7..0] 12 TP19 RESERVED_8 DDR_B_DQS_5 M_DQS_BJ[7..0] 14
AL41 M_DQS_A5 TP_MCH_AA39 AA39 AL34 M_DQS_BJ5
DDR_A_DQS_5 M_DQS_AJ[7..0] 12 TP14 RESERVED_9 DDR_B_DQSB_5 M_DQM_B[7..0] 14
AL40 M_DQS_AJ5 AM37 M_DQM_B5
DDR_A_DQSB_5 M_DQM_A[7..0] 12 DDR_B_DM_5 M_DATA_B[63..0] 14
AM43 M_DQM_A5
AM35 M_DATA_B40
DDR_A_DQ_40 AN41 DDR_B_DQ_41 AM38
AM39 M_DATA_A41 AJ34 M_DATA_B42
DDR_A_DQ_42 AK42 DDR_B_DQ_43 AL38
AK41 M_DATA_A43 AR39 M_DATA_B44
DDR_A_DQ_44 AN40 DDR_B_DQ_45 AM34
AN42 M_DATA_A45 AL37 M_DATA_B46
DDR_A_DQ_46 AL42 DDR_B_DQ_47 AL32
AL39 M_DATA_A47
DDR_A_DQ_47 M_DQS_B[7..0] 14
AG35 M_DQS_B6
AG42 M_DQS_A6 AG36 M_DQS_BJ6
DDR_A_DQS_6
DDR_A_DQSB_6 AG41 M_DQS_AJ6
M_DQS_AJ[7..0] 12
M_DQM_A[7..0] 12
DDR_BDDR_B_DQSB_6
DDR_B_DM_6 AG39 M_DQM_B6
M_DQM_B[7..0] 14
M_DATA_B[63..0] 14
AG40 M_DQM_A6
AG38 M_DATA_B48
DDR_A_DQ_48 AJ40 DDR_B_DQ_49 AJ38
AH43 M_DATA_A49 AF35 M_DATA_B50
DDR_A_DQ_50 AF39 DDR_B_DQ_51 AF33
AE40 M_DATA_A51 AJ37 M_DATA_B52
B DDR_A_DQ_52 AJ42 DDR_B_DQ_53 AJ35 B
AJ41 M_DATA_A53 TP_MCH_AM21 AM21 AG33 M_DATA_B54
DDR_A_DQ_53 TP17 RESERVED_10 DDR_B_DQ_54
AF41 M_DATA_A54 AF34 M_DATA_B55
DDR_A_DQ_54 M_DATA_A55 DDR_GMCH_VREF DDR_B_DQ_55
DDR_A_DQ_55 AF42 AM6 DDR_VREF M_DQS_B[7..0] 14
AC36 M_DQS_B7
AC42 M_DQS_A7 AC37 M_DQS_BJ7
DDR_A DDR_A_DQS_7
DDR_A_DQSB_7 AC41 M_DQS_AJ7
M_DQS_AJ[7..0] 12
M_DQM_A[7..0] 12
DDR_B_DQSB_7
DDR_B_DM_7 AD38 M_DQM_B7
M_DQM_B[7..0] 14
M_DATA_B[63..0] 14
AC40 M_DQM_A7
AD36 M_DATA_B56
TP_MCH_AN21 M_DATA_A56 COMPXPD DDR_B_DQ_56 M_DATA_B57
TP15 AN21 RESERVED_1 DDR_A_DQ_56 AD40 AL4 DDR_RCOMPXPDDDR_B_DQ_57 AC33
AD43 M_DATA_A57 COMPXPU AL2 AA34 M_DATA_B58
DDR_A_DQ_57 M_DATA_A58 COMPYPD DDR_RCOMPXPUDDR_B_DQ_58 M_DATA_B59
DDR_A_DQ_58 AB41 BB40 DDR_RCOMPYPDDDR_B_DQ_59 AA36
AA40 M_DATA_A59 COMPYPU BA40 AD34 M_DATA_B60
DDR_A_DQ_59 M_DATA_A60 SMRCOMPVOL DDR_RCOMPYPUDDR_B_DQ_60 M_DATA_B61
DDR_A_DQ_60 AE42 DDR2 Compensation Group Signals AM8 DDR_RCOMPVOLDDR_B_DQ_61 AF38
AE41 M_DATA_A61 SMRCOMPVOH AM10 AC34 M_DATA_B62
DDR_A_DQ_61 M_DATA_A62 DDR_RCOMPVOHDDR_B_DQ_62 M_DATA_B63
DDR_A_DQ_62 AC39 DDR_B_DQ_63 AA33
AB42 M_DATA_A63 R254 COMPXPD
19.1 Ohm
DDR_A_DQ_63 +/-1% 4 OF 8
3 OF 8
1D8V_STR Bearlake G33

Bearlake G33
R257 COMPXPU
19.1 Ohm
+/-1%
* C330
0.1uF
25V, Y5V, +80%/-20%
1D8V_STR C0603
R299 COMPYPD
19.1 Ohm
+/-1% 1D8V_STR
R261
1K 1D8V_STR R293
+/-1% 1K
* C335
0.1uF SMRCOMPVOH
R294 COMPYPU
19.1 Ohm
+/-1%
+/-1%
25V, Y5V, +80%/-20% C323

* C342 DDR_GMCH_VREF
1
A C0603 R252
3.01K * 10nF
C0603
0.1uF
25V, Y5V, +80%/-20% R284 C334
A
+/-1% 50V, X7R, +/-10% C0603 1K

* 0.1uF
2
+/-1% 25V, Y5V, +80%/-20%

SMRCOMPVOL C0603
R253
1K C317
1
5 mils width, 10 mils spacing, max 500 mils length for breakout region
+/-1%
* 10nF
C0603 Place CAP./RES. within 1" of GMCH package. width 10 mils, spacing 10 mils
50V, X7R, +/-10% 1D8V_STR: 10 mils width/10 mils spacing. 5 mils width/spacing minimum for max. of 300 mils FOXCONN PCEG
2
SMRCOMPVOH: 0.8 *VCCSM in GMCH break-out area

SMRCOMPVOL: 0.2 *VCCSM Placed close to GMCH pin
Title
Bearlake GMCH -2
C G33M03 C

5 4 3 2 1
5 4 3 2 1
1D25V_MCH
1D5V_ICH U16F
1D25V_MCH
VCC_80 AG7
FB20 AG8
* R193 1 VCCDQ_CRT VCC_81
AA13 VCC_1 VCC_82 AG9
AA14 VCC_2 VCC_83 AH1
AA15 VCC_3 VCC_84 AH2
FB L0603 600 Ohm C227 AA17 AH4
VCC_4 VCC_85
1
0603
* 1uF
10V, Y5V, +80%/-20%
AA19
AA21
VCC_5
VCC_6
VCC_86
VCC_87
AJ10
AJ11
C0603 AA23 AJ12
2
VCC_7 VCC_88
AA25 VCC_8 VCC_89 AJ5
D
AA26 VCC_9 VCC_90 AJ6 D
AB17 VCC_12 VCC_93 AJ9
AB18 VCC_13 VCC_94 C13
1D5V_ICH AB20 C9
VCC_14 VCC_95
AB22 VCC_15 VCC_96 D4
AB24 VCC_16 VCC_97 F11
AB26 VCC_17 VCC_98 F9
VCCD_CRT
POWER
AB27 VCC_18 VCC_99 G2
AC13 VCC_19 VCC_100 J2
C217 C226 AC14 J3
VCC_20 VCC_101
1
* 4.7uF
C0805 * 0.1uF
25V, Y5V, +80%/-20%
AC15
AC17
VCC_21
VCC_22
VCC_102
VCC_103
J6
L12
6.3V, X5R, +/-10% C0603 AC19 L6
2
VCC_23 VCC_104
AC21 VCC_24 VCC_105 N11
AC23 VCC_25 VCC_106 N12
AC25 VCC_26 VCC_107 N3
AD14 P14 3D3V_SYS
VCC_30 VCC_111
AD15 VCC_31 VCC_112 P15
AD17 P20 R197 1 VCCA_EXP
VCC_32 VCC_113
*
AD18 R14 FB21
VCC_33 VCC_114
AD20 VCC_34 VCC_115 R15 FB L0603 600 Ohm
AD22 VCC_35 VCC_116 R17 0603
AD24 VCC_36 VCC_117 R18
AD26 U10 R198 1 VCCA_DAC
VCC_37 VCC_118
AD27 VCC_38 VCC_119 U13
AE17 VCC_39 VCC_120 U14
C0603 1uF C225

AE19 VCC_40 VCC_121 U15
1
AE21
AE23
VCC_41
VCC_42
VCC_122
VCC_123
U17
U18
*
AE25 U19
10V, Y5V, +80%/-20%

2
VCC_43 VCC_124
AE26 VCC_44 VCC_125 U20
AE27 VCC_45 VCC_126 U21
AF1 VCC_46 VCC_127 U22
C 1D25V_MCH AF11 U23 C
VCC_47 VCC_128
AF12 VCC_48 VCC_129 U24
AF13 VCC_49 VCC_130 U25
AF14 VCC_50 VCC_131 U26
AF2 VCC_54 VCC_135 V10
AF20 VCC_55 VCC_136 V12
AF22 V13
*
L20 270nH VCCA_HPLL VCC_56 VCC_137

AF24 VCC_57 VCC_138 V14
0805h11 +/-20% C228 AF25 V15
VCC_58 VCC_139
1
* 2.2uF
6.3V, Y5V, +80%/-20%
AF26
AF3
VCC_59
VCC_60
VCC_140
VCC_141
V17
V18
C0603 AG10 V19
2
VCC_61 VCC_142
AG11 VCC_62 VCC_143 V20
AG12 VCC_63 VCC_144 V21
AG13 VCC_64 VCC_145 V22
AG14 V23
*
L17 2.2uH VCCA_MPLL VCC_65 VCC_146

AG15 VCC_66 VCC_147 V24
+/-20% 1206h13 AG17 V25
R180 1 VCC_67 VCC_148
AG18 VCC_68 VCC_149 V26
AG19 VCC_69 VCC_150 V27
AG2 VCC_70 VCC_151 V9
C210 AG20 W17
VCC_71 VCC_152
1
R179 1
* 10uF
10V, Y5V, +80%/-20%
AG21
AG22
VCC_72
VCC_73
VCC_153
VCC_154
W18
W19
C0805 AG23 W21
2
VCC_74 VCC_155
AG24 VCC_75 VCC_156 W23
AG3 VCC_76 VCC_157 W25
AG4 VCC_77 VCC_158 W26
1D25V_MCH AG5 W27
VCC_78 VCC_159
AG6 VCC_79 VCC_160 Y11
VCC_161 Y13
L0805 1uH Y14
L19 1 R188 1 VCCA_EXPPLL VCCDQ_CRT VCC_162
2 B21 VCCDQ_CRT VCC_163 Y15
0805h11+/-10% C234 C236 VCCD_CRT C21 Y17
VCCD_CRT VCC_164
1
B
R187 1 * 10uF
10V, Y5V, +80%/-20% *
0.1uF
25V, Y5V, +80%/-20%
VCCA_EXPPLL
VCCA_MPLL
B15
A24
VCCAPLL_EXP
VCCA_MPLL
VCC_165
VCC_166
Y18
Y20
B
C0805 C0603 VCCA_HPLL C23 Y22
2
VCCA_EXP VCCA_HPLL VCC_167

A16 VCCA_EXP VCC_168 Y24
3D3V_SYS Y26
VCC_169
B17 VCC3_3 VCC_170 Y27
VCC_171 Y6
A28 VTT_FSB_1
L0805 10uH FSB_VTT A30 R27 FSB_VTT
L16 1 VCCA_DPLLA VTT_FSB_2 VTT_FSB_46
2 B27 VTT_FSB_3 VTT_FSB_45 R26
0805h14+/-20% EC18 C239 B28 R24
VTT_FSB_4 VTT_FSB_44
1
* 220uF
6.3V, +/-20% * 0.1uF
25V, Y5V, +80%/-20% * C230
0.1uF
B29
B30
VTT_FSB_5 VTT_FSB_43 R23
P29
C0603 25V, Y5V, +80%/-20% VTT_FSB_6 VTT_FSB_42
C27 P27
2
C0603 VTT_FSB_7 VTT_FSB_41

C29 VTT_FSB_8 VTT_FSB_40 P26
L0805 10uH C30 P24
L18 1 VCCA_DPLLB VTT_FSB_9 VTT_FSB_39
2 D27 VTT_FSB_10 VTT_FSB_38 P23
0805h14+/-20% EC19 C233 D28 N29
1
* 220uF
6.3V, +/-20% * 0.1uF
25V, Y5V, +80%/-20%
D29
E23
VTT_FSB_12 VTT_FSB_36 N26
N24
1D8V_STR
C0603 VTT_FSB_13 VTT_FSB_35

E26 N23
2
E27 VTT_FSB_15 VTT_FSB_33 M29
2
E29 M24 L24
F23 VTT_FSB_17 VTT_FSB_31 M23 L0805 1uH
F24 VTT_FSB_18 VTT_FSB_30 L24 0805h11
F26 VTT_FSB_19 VTT_FSB_29 L23 +/-10%
G23 VTT_FSB_20 VTT_FSB_28 K24
G24
1
VTT_FSB_21
G26 VTT_FSB_22 VCC_CKDDR_1 AY42
H23 VTT_FSB_23 VCC_CKDDR_2 BA42
H24 VTT_FSB_24 VCC_CKDDR_3 BA43
1
J23
J24
VTT_FSB_25
VTT_FSB_26
VCC_CKDDR_4
VCC_CKDDR_5
BB41
BB42
* C327
0.1uF
R283
1
R286
1
K23 25V, Y5V, +80%/-20%
2
VTT_FSB_27 C0603
VCCA_DPLLB C22
VCCA_DPLLA VCCA_DPLLB
A22 VCCA_DPLLA
1
VCCA_DAC
A
B16
C17
VCCA_DAC_1
VCCA_DAC_2
* C338
10uF A
6 OF 8 C0805
2
10V, Y5V, +80%/-20%
Bearlake G33
FOXCONN PCEG
Title
Bearlake GMCH -3
C G33M03 C

5 4 3 2 1
5 4 3 2 1
A7
A5
A3
AB2
AB1
AA8
AA5
A39
A41
A34
A26
A18
A12
G1
G11
G12
G13
G21
G32
G38
G42
G7
G9
AB21
AB19
AA38
AA35
AA24
AA22
AA20
AA18
F3
F27
F35
F37
H13
H15
H17
U16G
1D25V_MCH U16H 1D25V_MCH
VSS_198 H20
VSS_21
VSS_20
VSS_19
VSS_18
VSS_17
VSS_16
VSS_15
VSS_14
VSS_13
VSS_12
VSS_11
VSS_10
VSS_9
VSS_8
VSS_7
VSS_6
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_199 H21 Y32 VCC_CL_PLL
VSS_200 H29 AA29 VCC_CL_1
VSS_201 H31 AA30 VCC_CL_2 DDR3_DRAMRST BC16
AB23 VSS_22 VSS_202 J21 AA31 VCC_CL_3 DDR3_DRAM_PWROK AN15
AB25 J27 AA32
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

VSS_23 VSS_203 VCC_CL_4
C0805 10uF C240
C0805 10uF C600

AB43 J32 AC29 AY37 R251 R295
VSS_24 VSS_204 VCC_CL_5 DDR3_A_CSB1
1
DDR3
AC10
AC18
VSS_25
VSS_26
VSS_205
VSS_206
J35
J38
AC30
AC31
VCC_CL_6
VCC_CL_7
DDR3_A_MA0
DDR3_A_WEB
BB29
BB34
0 0
dummy * *
AC20 J5 AC32 AW32
2
VSS_27 VSS_207 VCC_CL_8 DDR3_B_ODT3
D
AC22 VSS_28 VSS_208 J7 AD29 VCC_CL_9 D
AC24 VSS_29 VSS_209 J9 AD30 VCC_CL_10
AC35 VSS_30 VSS_210 K12 AD31 VCC_CL_11 RESERVED_39 BC43 TP22
AC38 VSS_31 VSS_211 K13 AD32 VCC_CL_12 RESERVED_40 BC1 TP23
GND
AC5 VSS_32 VSS_212 K18 AF27 VCC_CL_13 RESERVED_41 A43 TP2
AC7 K2 AF29 Place in the PCI-E power plane
VSS_33 VSS_213 VCC_CL_14 (less than 100 mils from the package)
AD19 VSS_34 VSS_214 K21 AF30 VCC_CL_15 NC_1 N20
AD21 VSS_35 VSS_215 K26 AF31 VCC_CL_16 NC_2 B2
AD23 VSS_36 VSS_216 K43 AG25 VCC_CL_17 NC_3 B42
AD25 VSS_37 VSS_217 L11 AG26 VCC_CL_18 NC_4 B43
AD33 VSS_38 VSS_218 L20 AG27 VCC_CL_19 NC_5 BB1
NC
AD39 VSS_41 VSS_221 L3 AG31 VCC_CL_22 NC_8 BC2
AD42 VSS_42 VSS_222 L31 AJ13 VCC_CL_23 NC_9 BC42
AE18 L32 AJ14 1D25V_MCH
AE2 VSS_44 VSS_224 L33 AJ15 VCC_CL_25 VCC_CL_77 Y31
AE20 L40 AJ17 Y30 FSB_VTT
VSS_45 VSS_225 VCC_CL_26 VCC_CL_76
AE22 VSS_46 VSS_226 L5 AJ18 VCC_CL_27 VCC_CL_75 Y29
AE24 VSS_47 VSS_227 L7 AJ2 VCC_CL_28
AE3 VSS_48 VSS_228 M1 AJ20 VCC_CL_29 VCC_CL_73 AL9
C0603 2.2uF C216
C0603 2.2uF C209
C0603 2.2uF C203

AE4 M10 AJ21 AL8
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%

1
AF10
AF19
VSS_50
VSS_51 VSS_231 M15
AJ23
AJ24
VCC_CL_31
VCC_CL_32
VCC_CL_71
VCC_CL_70
AL7
AL6
* * *
AF21 M17 AJ26 AL5
2
AF23 VSS_53 VSS_233 M20 AJ27 VCC_CL_34 VCC_CL_68 AL29
AF7 M7 AK1 AL20 Place in FSB_VTT plane as close to the GMCH as possible
VSS_59 VSS_239 VCC_CL_40 VCC_CL_62 (less than 100 mils from the package)
AF8 VSS_60 VSS_240 N10 AK14 VCC_CL_41 VCC_CL_61 AL18
AF9 VSS_61 VSS_241 N13 AK15 VCC_CL_42 VCC_CL_60 AL17
AG34 VSS_62 VSS_242 N21 AK17 VCC_CL_43 VCC_CL_59 AL15
AG37 VSS_63 VSS_243 N27 AK18 VCC_CL_44 VCC_CL_58 AL13
AH42 VSS_64 VSS_244 N31 AK2 VCC_CL_45 VCC_CL_57 AL12
AJ32 VSS_65 VSS_245 N33 AK20 VCC_CL_46 VCC_CL_56 AL11
C AJ33 N36 AK21 AL10 1D8V_STR Connect ground sides of caps with traces to GND balls C
VSS_66 VSS_246 VCC_CL_47 VCC_CL_55 (less than 100 mils from the package)
AJ36 VSS_67 VSS_247 N5 AK23 VCC_CL_48 VCC_CL_54 AK30
AJ39 N7 AK24 AK3
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%

VSS_68 VSS_248 VCC_CL_49 8 OF 8 VCC_CL_53
AK43 VSS_69 VSS_249 P17 VCC_CL_52 AK29
AL31 P18 1D8V_STR AK27
2.2uF C348
2.2uF C341
2.2uF C345
AL33 VSS_71 VSS_251 P2 AV18 VCC_DDR_1 VCC_CL_50 AK26
1
AL36
AM11
VSS_72
VSS_73
VSS_252
VSS_253
P21
P30
AV26
AW20
VCC_DDR_2
VCC_DDR_3 VCC_EXP_13 AD9 1D25V_MCH * * *
C0603
C0603
C0603
AM20 P43 AW24 AD8
2
VSS_74 VSS_254 VCC_DDR_4 VCC_EXP_12
AM23 VSS_75 VSS_255 R11 AY32 VCC_DDR_5 VCC_EXP_11 AD7
AM24 VSS_76 VSS_256 R21 BB12 VCC_DDR_6 VCC_EXP_10 AD6
AM33 R31 BB18 AD4
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%

2.2uF C347
2.2uF C346
2.2uF C344
1
AM4
AM40
VSS_80
VSS_81
VSS_260
VSS_261
R36
R5
BB24
BB26
VCC_DDR_10
VCC_DDR_11
VCC_EXP_6
VCC_EXP_5
AD11
AD10
* * *
C0603
C0603
C0603
AM42 R8 BB28 AD1
2
VSS_82 VSS_262 VCC_DDR_12 VCC_EXP_4 GMCH Memory Decoupling
AM7 VSS_83 VSS_263 T1 BB32 VCC_DDR_13 VCC_EXP_3 AC4
AM9 T42 BB37 AC3 1D8V_STR
AN11 VSS_85 VSS_265 U27 BB39 VCC_DDR_15 VCC_EXP_1 AC2
AN12 VSS_86 VSS_266 U29 BC14 VCC_DDR_16 VCC_DDR_22 BC39
AN23 VSS_89 VSS_269 U5 BC26 VCC_DDR_19
AN24 VSS_90 VSS_270 U7 VSS V30
AN29 VSS_91 VSS_271 U8
AN31 VSS_92 VSS_272 V11
AN38 VSS_93 VSS_273 V2
AN4 V29 1D25V_MCH
VSS_94 VSS_274
AP1 VSS_95 VSS_275 V32
AP18 V34
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

VSS_96 VSS_276
C0805 10uF C313
C0805 10uF C314

AP24 VSS_97 VSS_277 V37
1
AP43
AR17
VSS_98
VSS_99
VSS_278
VSS_279
V39
V43
1D25V_MCH 1D25V_MCH 1D25V_MCH
* *
AR20 V5
2
VSS_100 VSS_280
C0805 10uF C595
C0805 10uF C297

AR21 V8
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

VSS_101 VSS_281
C0805 10uF C300
C0805 10uF C597
C0805 10uF C290
C0805 10uF C274
C0805 10uF C599
C0805 10uF C601
C0603 1uF C598
C0603 1uF C596
C0603 1uF C594
C0603 1uF C301

AR23 W20
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

VSS_102 VSS_282
1
1
B
AR26
AR27
VSS_103
VSS_104
VSS_283
VSS_284
W22
W24
* * * * * * * * * * * * B
AR32 W3
2
2
VSS_105 VSS_285
AR33 VSS_106 VSS_286 Y1
AR38 VSS_107 VSS_287 Y10
AR6 VSS_108 VSS_288 Y19
AR9 Y21 Place in 1D25V_MCH_CL plane
VSS_109 VSS_289 (less than 100 mils from the package)
AT12 VSS_110 VSS_290 Y23
AT13 VSS_111 VSS_291 Y25
AT15 Y33 Place in 1D25V_MCH plane as close to GMCH as possible
VSS_112 VSS_292
AT29 VSS_113 VSS_293 Y35
AT31 VSS_114 VSS_294 Y37
AU20 Y42 1D25V_MCH
VSS_115 VSS_295
AU24 VSS_116 VSS_296 Y5
AU32 VSS_117 VSS_297 Y7
AU38 VSS_118 VSS_180 F21
AU4 VSS_119 VSS_179 F18
AU42 VSS_120 VSS_178 F15
AU6 E9
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

VSS_121 VSS_177
C0603 2.2uF C280
C0603 2.2uF C250
C0603 2.2uF C267
C0603 1uF C241
C0603 1uF C296
C0603 1uF C238
C0805 10uF C287
C0805 10uF C257

AV11 E43
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
6.3V, Y5V, +80%/-20%
VSS_122 VSS_176
1
AV17
AV2
VSS_123
VSS_124
VSS_175
VSS_174
E32
E3
* * * * * * * *
AV21 E24
2
VSS_125 VSS_173
AV23 VSS_126 VSS_172 E21
AV27 VSS_127 VSS_171 E11
AV35 VSS_128 VSS_170 E1
AV37 VSS_129 VSS_169 D40
AV7 VSS_130 VSS_168 D31
AV9 VSS_131 VSS_167 D3
AW41 VSS_132
AW43 VSS_133
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_150
VSS_151
VSS_152
AY4 VSS_134
B10
B14
B19
B22
B23
B26
B31
B32
B37
BA1
BB7
C5
C6
D15
D16
D17
D21
C1
C11
C26
C43
BC10
BC24
BC37
BC41
BC5
BC28
BC3
BC32
AY40
AY41
C4
A A
Bearlake G33
7 OF 8
FOXCONN PCEG
Title
Bearlake GMCH -4
C G33M03 C

5 4 3 2 1
5 4 3 2 1
DIMM1 DIMM2
1D8V_STR
2 VSS NC_1 68 2 VSS NC_1 68
5 VSS NC/TEST 102 5 VSS NC/TEST 102
8 VSS NC_2 19 M_ODT_A[3..0] 9,13,15 8 VSS NC_2 19 M_ODT_A[3..0] 9,13,15
11 VSS 11 VSS
14 VSS 14 VSS
17 77 M_ODT_A1 17 77 M_ODT_A3
VSS ODT1 M_ODT_A0 VSS ODT1 M_ODT_A2
20 VSS ODT0 195 20 VSS ODT0 195
23 VSS 23 VSS
EC42 EC34 EC33 26 26
VSS VSS
* 470uF
16V, +/-20%
* 470uF
16V, +/-20%
* 470uF
16V, +/-20%
29
32
VSS
42
29
32
VSS
42
ce35d80h125 ce35d80h125 ce35d80h125 VSS CB<0> VSS CB<0>
35 VSS CB<1> 43 35 VSS CB<1> 43
38 VSS CB<2> 48 38 VSS CB<2> 48
41 VSS CB<3> 49 41 VSS CB<3> 49
D
44 VSS CB<4> 161 44 VSS CB<4> 161 D
47 VSS CB<5> 162 47 VSS CB<5> 162
1D8V_STR 50 167 50 167
VSS CB<6> VSS CB<6>
65 VSS CB<7> 168 65 VSS CB<7> 168
66 VSS 66 VSS
79 VSS 79 VSS
EC32 EC43 82 82
VSS VSS
* 470uF
16V, +/-20%
* 470uF
16V, +/-20%
85
88
VSS M_DQS_AJ[7..0] 9 85
88
VSS
ce35d80h125 ce35d80h125 VSS M_DQS_A0 VSS M_DQS_A0
91 VSS DQS<0> 7 91 VSS DQS<0> 7
94 6 94 6 M_DQS_AJ0
VSS DQS#<0> M_DQS_AJ0 VSS DQS#<0>
97 VSS 97 VSS
100 16 M_DQS_A1 100 16 M_DQS_A1
VSS DQS<1> VSS DQS<1> M_DQS_AJ1
103 VSS DQS#<1> 15 103 VSS DQS#<1> 15
Place between Ch A DIMM II 106 M_DQS_AJ1 106
VSS M_DQS_A2 VSS M_DQS_A2
and Ch B DIMM 1 109 VSS DQS<2> 28 109 VSS DQS<2> 28
112 27 112 27 M_DQS_AJ2
115 VSS 115 VSS
118 37 M_DQS_A3 118 37 M_DQS_A3
121 VSS DQS#<3> 36 121 VSS DQS#<3> 36
124 M_DQS_AJ3 124 1D8V_STR
VSS M_DQS_A4 VSS M_DQS_A4
127 VSS DQS<4> 84 127 VSS DQS<4> 84
1D8V_STR 130 83 130 83 M_DQS_AJ4
133 VSS 133 VSS
136 93 M_DQS_A5 136 93 M_DQS_A5
139 VSS DQS#<5> 92 139 VSS DQS#<5> 92
EC27 142 M_DQS_AJ5 142 R410
VSS VSS
* 470uF
16V, +/-20%
145
148
VSS DQS<6> 105
104
M_DQS_A6 145
148
VSS DQS<6> 105
104
M_DQS_A6
M_DQS_AJ6
1K
+/-1%
ce35d80h125 VSS DQS#<6> M_DQS_AJ6 VSS DQS#<6>
151 VSS 151 VSS
154 114 M_DQS_A7 154 114 M_DQS_A7
Place between GMCH and DIMM 157 VSS DQS#<7> 113 157 VSS DQS#<7> 113
160 M_DQS_AJ7 160 SMVREF_A
VSS M_DQS_A[7..0] 9 VSS
163 VSS DQS<8> 46 163 VSS DQS<8> 46
166 VSS DQS#<8> 45 166 VSS DQS#<8> 45
169 169 R411 C428
VSS M_DQM_A0 VSS M_DQM_A0
198
201
VSS
VSS
DM0/DQS9
NC/DQS9#
125
126
198
201
VSS
VSS
DM0/DQS9
NC/DQS9#
125
126
1K
+/-1% * 0.1uF
25V, Y5V, +80%/-20%
C 204 204 C0603 C
1D8V_STR VSS M_DQM_A1 VSS M_DQM_A1
207 VSS DM1/DQS10 134 207 VSS DM1/DQS10 134
210 VSS NC/DQS10# 135 210 VSS NC/DQS10# 135
213 VSS 213 VSS
216 146 M_DQM_A2 216 146 M_DQM_A2
VSS DM2/DQS11 VSS DM2/DQS11
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
222 VSS 222 VSS

225 155 M_DQM_A3 225 155 M_DQM_A3 close to DIMM pin
C0603
C412
C0603
C409
C0603
C410
C0603
C411
228 156 228 156 Width 10 mils minimum, Spacing 10 mils minimum.
VSS NC/DQS12# VSS NC/DQS12#
231 VSS 231 VSS
234 202 M_DQM_A4 234 202 M_DQM_A4
* * * * 1D8V_STR 237
51
VSS
VDDQ
NC/DQS13# 203 1D8V_STR 237
51
VSS
VDDQ
NC/DQS13# 203
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
56 211 M_DQM_A5 56 211 M_DQM_A5

VDDQ DM5/DQS14 VDDQ DM5/DQS14
1uF
1uF
1uF
1uF
62 VDDQ NC/DQS14# 212 62 VDDQ NC/DQS14# 212

72 VDDQ 72 VDDQ
75 223 M_DQM_A6 75 223 M_DQM_A6
191 VDDQ 191 VDDQ
194 232 M_DQM_A7 194 232 M_DQM_A7
175 VDDQ M_DQM_A[7..0] 9 175 VDDQ
170 VDDQ DM8/DQS17 164 170 VDDQ DM8/DQS17 164
53 165 53 165 1D8V_STR
VDD NC/DQS17# VDD NC/DQS17#
59 VDD M_DATA_A[63..0] 9 59 VDD
64 3 M_DATA_A0 64 3 M_DATA_A0
VDD DQ<0> M_DATA_A1 VDD DQ<0> M_DATA_A1
197 VDD DQ<1> 4 197 VDD DQ<1> 4
69 9 M_DATA_A2 69 9 M_DATA_A2
VDD DQ<2> VDD DQ<2>
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
Channel A DIMM 1 1.8V high-frequency decoupling caps. 172 10 M_DATA_A3 172 10 M_DATA_A3
place as close to DIMM power pins as possible VDD DQ<3> M_DATA_A4 VDD DQ<3> M_DATA_A4
187 VDD DQ<4> 122 187 VDD DQ<4> 122
C0603
C452
C0603
C432
C0603
C427
C0603
C431
184 123 M_DATA_A5 184 123 M_DATA_A5
178 VDD DQ<6> 128 178 VDD DQ<6> 128
189 129 M_DATA_A7 189 129 M_DATA_A7
67 VDD DQ<8>
DQ<9>
12
13 M_DATA_A9
67 VDD DQ<8>
DQ<9>
12
13 M_DATA_A9 * * * *
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

21 M_DATA_A10 21 M_DATA_A10
DQ<10> DQ<10>
1uF
1uF
1uF
1uF
18 22 M_DATA_A11 18 22 M_DATA_A11
RC1 DQ<11> M_DATA_A12 RC1 DQ<11> M_DATA_A12
B
55 RC0 DQ<12> 131 55 RC0 DQ<12> 131 B
3D3V_SYS 238 132 M_DATA_A13 3D3V_SYS 238 132 M_DATA_A13
SMVREF_A VDDSPD DQ<13> M_DATA_A14 SMVREF_A VDDSPD DQ<13> M_DATA_A14
1 VREF DQ<14> 140 1 VREF DQ<14> 140
120 141 M_DATA_A15 SMB_CLK_RESUME 120 141 M_DATA_A15
14,16,17,19,25,26,27,29 SMB_CLK_RESUME SCL DQ<15> SCL DQ<15>
119 24 M_DATA_A16 SMB_DATA_RESUME 119 24 M_DATA_A16
14,16,17,19,25,26,27,29 SMB_DATA_RESUME SDA DQ<16> M_DATA_A17 SDA DQ<16> M_DATA_A17
DQ<17> 25 DQ<17> 25
101 30 M_DATA_A18 101 30 M_DATA_A18
SA2 DQ<18> M_DATA_A19 SA2 DQ<18> M_DATA_A19
240 SA1 DQ<19> 31 240 SA1 DQ<19> 31
239 143 M_DATA_A20 239 143 M_DATA_A20
SA2 SA1 SA0 SA0 DQ<20> M_DATA_A21 SA2 SA1 SA0 SA0 DQ<20> M_DATA_A21
DQ<21> 144 DQ<21> 144
0 0 0 190 149 M_DATA_A22 0 0 1 190 149 M_DATA_A22
9,13 M_BS_A[2..0] M_BS_A1 BA1 DQ<22> M_DATA_A23 9,13 M_BS_A[2..0] M_BS_A1 BA1 DQ<22> M_DATA_A23 Channel A DIMM II 1.8V high-frequency decoupling caps.
71 BA0 DQ<23> 150 71 BA0 DQ<23> 150
M_BS_A0 33 M_DATA_A24 M_BS_A0 33 M_DATA_A24 place as close to DIMM power pins as possible
DQ<24> M_DATA_A25 DQ<24> M_DATA_A25
DQ<25> 34 DQ<25> 34
9,13 M_SCKE_A[3..0] M_SCKE_A1 171 39 M_DATA_A26 9,13 M_SCKE_A[3..0] M_SCKE_A3 171 39 M_DATA_A26
M_SCKE_A0 CKE1 DQ<26> M_DATA_A27 M_SCKE_A2 52 CKE1 DQ<26> M_DATA_A27
52 CKE0 DQ<27> 40 CKE0 DQ<27> 40
DQ<29> 153 DQ<29> 153
76 S1# DQ<31> 159 76 S1# DQ<31> 159
9,15 M_SCS_A1J 193 80 M_DATA_A32 9,13 M_SCS_A3J 193 80 M_DATA_A32
9,15 M_SCS_A0J S0# DQ<32> M_DATA_A33 9,15 M_SCS_A2J S0# DQ<32> M_DATA_A33
DQ<33> 81 DQ<33> 81
221 86 M_DATA_A34 221 86 M_DATA_A34
9 CK_M_200M_N_DDR2_A CK2#/RFU DQ<34> M_DATA_A35 9 CK_M_200M_N_DDR5_A CK2#/RFU DQ<34> M_DATA_A35
220 CK2/RFU DQ<35> 87 220 CK2/RFU DQ<35> 87
9 CK_M_200M_P_DDR2_A 138 199 M_DATA_A36 9 CK_M_200M_P_DDR5_A 138 199 M_DATA_A36
9 CK_M_200M_N_DDR1_A CK1#/RFU DQ<36> M_DATA_A37 9 CK_M_200M_N_DDR4_A CK1#/RFU DQ<36> M_DATA_A37
137 CK1/RFU DQ<37> 200 137 CK1/RFU DQ<37> 200
9 CK_M_200M_P_DDR1_A 186 205 M_DATA_A38 9 CK_M_200M_P_DDR4_A 186 205 M_DATA_A38
9 CK_M_200M_N_DDR0_A CK0# DQ<38> M_DATA_A39 9 CK_M_200M_N_DDR3_A CK0# DQ<38> M_DATA_A39
185 CK0 DQ<39> 206 185 CK0 DQ<39> 206
9 CK_M_200M_P_DDR0_A 89 M_DATA_A40 9 CK_M_200M_P_DDR3_A 89 M_DATA_A40
9,13 M_MAA_A[14..0] M_MAA_A0 DQ<40> M_DATA_A41 9,13 M_MAA_A[14..0] M_MAA_A0 DQ<40> M_DATA_A41
188 A0 DQ<41> 90 188 A0 DQ<41> 90
M_MAA_A1 183 95 M_DATA_A42 M_MAA_A1 183 95 M_DATA_A42
M_MAA_A2 A1 DQ<42> M_DATA_A43 M_MAA_A2 A1 DQ<42> M_DATA_A43
63 A2 DQ<43> 96 63 A2 DQ<43> 96
61 A4 DQ<45> 209 61 A4 DQ<45> 209
180 A6 DQ<47> 215 180 A6 DQ<47> 215
179 A8 DQ<49> 99 179 A8 DQ<49> 99
A M_MAA_A9 177 107 M_DATA_A50 M_MAA_A9 177 107 M_DATA_A50 A
70 A10/AP DQ<51> 108 70 A10/AP DQ<51> 108
176 A12 DQ<53> 218 176 A12 DQ<53> 218
174 A14 DQ<55> 227 174 A14 DQ<55> 227
173 110 M_DATA_A56 173 110 M_DATA_A56
9,13 M_BS_A[2..0] M_BS_A2 A15 DQ<56> M_DATA_A57 9,13 M_BS_A[2..0] M_BS_A2 A15 DQ<56> M_DATA_A57
54 A16/BA2 DQ<57> 111 54 A16/BA2 DQ<57> 111
117 117
9,13 M_CAS_AJ 74 CAS#
DQ<59>
DQ<60> 229 M_DATA_A60
M_DATA_A61 9,13 M_CAS_AJ 74 CAS#
DQ<59>
DQ<60> 229 M_DATA_A60
M_DATA_A61
FOXCONN PCEG
9,13 M_RAS_AJ 192 RAS# DQ<61> 230 9,13 M_RAS_AJ 192 RAS# DQ<61> 230
73 235 M_DATA_A62 73 235 M_DATA_A62 Title
9,13 M_WE_AJ WE# DQ<62> M_DATA_A63 9,13 M_WE_AJ WE# DQ<62> M_DATA_A63
DQ<63> 236 DQ<63> 236 DDR2 Channel A DIMM 1, 2
DDR2_DIMM
CONN,DIMM,DDR II,1.8V,V/T,Blu,G/F,G,DIP-240
DDRII
CONN,DIMM,DDRII,1.8V,1mm,V/T,Yel,G/F,G,DIP-240
C G33M03 C
DDR240H260 ddr240h260 Date: Thursday, April 26, 2007 Sheet 12 of 37
5 4 3 2 1
5 4 3 2 1
VTT_DDR M_ODT_A[3..0] 9,12,15
M_SCKE_A[3..0] 9,12
M_BS_A[2..0] 9,12
R412 33 M_MAA_A1
M_MAA_A[14..0] 9,12
D D
RN31
*1 2 M_RAS_AJ
M_WE_AJ
9,12
9,12
3 4
5 6 M_CAS_AJ 9,12
M_MAA_A13
7 8
338P4R0402h6 VTT_DDR
RN28
*1 2 M_ODT_A2
M_SCS_A3J
9,12
9,12
3 4 M_ODT_A1
5 6 M_ODT_A3
7 8
43 8p4r0402h6
Ohm
RN24
*1 2
M_MAA_A0
M_MAA_A10
3 4 M_BS_A1
5 6 M_BS_A0
7 8
338P4R0402h6
VTT_DDR
RN30
C
*1 2
M_MAA_A6
M_MAA_A4 RN25
C
3 4
5 6
M_MAA_A3
M_MAA_A2
*1 2
M_SCKE_A3
M_SCKE_A1
7 8 3 4 M_SCKE_A0
338P4R0402h6 5 6 M_SCKE_A2
7 8
438p4r0402h6
Ohm
RN29
*1 2
M_MAA_A9
M_MAA_A7
3 4 M_MAA_A8
5 6 M_MAA_A5
7 8
338P4R0402h6
RN26
*1 2
M_MAA_A14
M_BS_A2
3 4 M_MAA_A12
5 6 M_MAA_A11
7 8
338P4R0402h6
B B
VTT_DDR
VTT_DDR
1D8V_STR
C0805
C448
C0805
C443
C0603
C442
C0603
C429
C0603
C430
C0603
C438
C0603
C457
C0603
C447
C0603
C445
C0603
C444
C0603
C435
C0603
C436
C0603
C437
C0603
C439
C0603
C433
C0603
C434
* * * * * * * * *
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%

* * * * * * *
4.7uF
4.7uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%

0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
VTT_DDR
Channel A VTT_0.9V high-frequency decoupling caps.

Channel A VTT_0.9V Mid Range decoupling caps. Place as close to termination resistors as possible
Placed in termination Island
A A
FOXCONN PCEG
Title
DDR2 Channel A Termination
C G33M03 C

5 4 3 2 1
5 4 3 2 1
DIMM3 DIMM4
2 VSS NC_1 68 2 VSS NC_1 68

5 VSS NC/TEST 102 5 VSS NC/TEST 102
8 VSS NC_2 19 M_ODT_B[3..0] 9,15 8 VSS NC_2 19 M_ODT_B[3..0] 9,15
11 VSS 11 VSS
14 VSS 14 VSS
17 77 M_ODT_B1 17 77 M_ODT_B3
VSS ODT1 M_ODT_B0 VSS ODT1 M_ODT_B2
20 VSS ODT0 195 20 VSS ODT0 195
23 VSS 23 VSS
26 VSS 26 VSS
29 VSS 29 VSS
32 VSS CB<0> 42 32 VSS CB<0> 42
35 VSS CB<1> 43 35 VSS CB<1> 43
38 VSS CB<2> 48 38 VSS CB<2> 48
41 VSS CB<3> 49 41 VSS CB<3> 49
44 VSS CB<4> 161 44 VSS CB<4> 161
D
47 VSS CB<5> 162 47 VSS CB<5> 162 D
50 VSS CB<6> 167 50 VSS CB<6> 167
65 VSS CB<7> 168 65 VSS CB<7> 168
66 VSS 66 VSS
79 VSS 79 VSS
82 VSS 82 VSS
85 VSS M_DQS_BJ[7..0] 9 85 VSS
88 VSS 88 VSS
91 7 M_DQS_B0 91 7 M_DQS_B0
VSS DQS<0> VSS DQS<0> M_DQS_BJ0 1D8V_STR
94 VSS DQS#<0> 6 94 VSS DQS#<0> 6
97 M_DQS_BJ0 97
VSS M_DQS_B1 VSS M_DQS_B1
100 VSS DQS<1> 16 100 VSS DQS<1> 16
103 15 103 15 M_DQS_BJ1
VSS DQS#<1> M_DQS_BJ1 VSS DQS#<1> R419
106 VSS 106 VSS
109 28 M_DQS_B2 109 28 M_DQS_B2 1K
VSS DQS<2> VSS DQS<2> M_DQS_BJ2 +/-1%
112 VSS DQS#<2> 27 112 VSS DQS#<2> 27
115 M_DQS_BJ2 115
118 VSS DQS<3> 37 118 VSS DQS<3> 37
121 36 121 36 M_DQS_BJ3
VSS DQS#<3> M_DQS_BJ3 VSS DQS#<3> SMVREF_B
124 VSS 124 VSS
127 84 M_DQS_B4 127 84 M_DQS_B4
VSS DQS<4> VSS DQS<4> M_DQS_BJ4
130 VSS DQS#<4> 83 130 VSS DQS#<4> 83
133 M_DQS_BJ4 133 R418 C449
1D8V_STR VSS M_DQS_B5 VSS M_DQS_B5
136
139
VSS
VSS
DQS<5>
DQS#<5>
93
92
136
139
VSS
VSS
DQS<5>
DQS#<5>
93
92 M_DQS_BJ5
1K
+/-1% * 0.1uF
25V, Y5V, +80%/-20%
142 M_DQS_BJ5 142 C0603
145 VSS DQS<6> 105 145 VSS DQS<6> 105
148 104 148 104 M_DQS_BJ6
VSS DQS#<6> VSS DQS#<6>
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
151 M_DQS_BJ6 151

154 VSS DQS<7> 114 154 VSS DQS<7> 114
C0603
C450
C0603
C454
C0603
C456
C0603
C192
157 113 157 113 M_DQS_BJ7 Placed close to DIMM pin

VSS DQS#<7> M_DQS_BJ7 VSS DQS#<7> Width 10 mils minimum, Spacing 10 mils minimum.
160 VSS M_DQS_B[7..0] 9 160 VSS
163 VSS DQS<8> 46 163 VSS DQS<8> 46
* * * * 166
169
VSS
VSS
DQS#<8> 45 166
169
VSS
VSS
DQS#<8> 45
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
198 125 M_DQM_B0 198 125 M_DQM_B0

1uF
1uF
1uF
1uF

204 VSS 204 VSS
C 207 134 M_DQM_B1 207 134 M_DQM_B1 C
213 VSS 213 VSS
216 146 M_DQM_B2 216 146 M_DQM_B2
222 VSS 222 VSS
225 155 M_DQM_B3 225 155 M_DQM_B3
231 VSS 231 VSS
234 202 M_DQM_B4 234 202 M_DQM_B4
1D8V_STR VSS DM4/DQS13 1D8V_STR VSS DM4/DQS13
Channel B DIMM1 1.8V high-frequency decoupling caps. 51 51
place as close to DIMM power pins as possible VDDQ M_DQM_B5 VDDQ M_DQM_B5
72 VDDQ 72 VDDQ
75 223 M_DQM_B6 75 223 M_DQM_B6
191 VDDQ 191 VDDQ
194 232 M_DQM_B7 194 232 M_DQM_B7
3D3V_SYS 175 175
VDDQ M_DQM_B[7..0] 9 VDDQ
53 VDD NC/DQS17# 165 53 VDD NC/DQS17# 165
59 VDD M_DATA_B[63..0] 9 59 VDD
1
C565
* 0.1uF
64
197
VDD
VDD
DQ<0>
DQ<1>
3
4
M_DATA_B0
M_DATA_B1
64
197
VDD
VDD
DQ<0>
DQ<1>
3
4
M_DATA_B0
M_DATA_B1
C0603 69 9 M_DATA_B2 69 9 M_DATA_B2
2
25V, Y5V, +80%/-20% VDD DQ<2> M_DATA_B3 VDD DQ<2> M_DATA_B3 1D8V_STR
172 VDD DQ<3> 10 172 VDD DQ<3> 10
dummy 187 122 M_DATA_B4 187 122 M_DATA_B4
VDD DQ<4> M_DATA_B5 VDD DQ<4> M_DATA_B5
184 VDD DQ<5> 123 184 VDD DQ<5> 123
EMI cap. 178 128 M_DATA_B6 178 128 M_DATA_B6
VDD DQ<6> VDD DQ<6>
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
CAP,1uF,+80%/-20%,Y5V,10V,G,SMD0603
189 129 M_DATA_B7 189 129 M_DATA_B7
VDD DQ<7> M_DATA_B8 VDD DQ<7> M_DATA_B8
67 VDD DQ<8> 12 67 VDD DQ<8> 12
C0603
C503
C0603
C502
C0603
C510
C0603
C505
13 M_DATA_B9 13 M_DATA_B9
DQ<9> M_DATA_B10 DQ<9> M_DATA_B10
DQ<10> 21 DQ<10> 21
18 22 M_DATA_B11 18 22 M_DATA_B11
RC1 DQ<11> M_DATA_B12 RC1 DQ<11> M_DATA_B12
B 3D3V_SYS
55
238
RC0
VDDSPD
DQ<12>
DQ<13>
131
132 M_DATA_B13 3D3V_SYS
55
238
RC0
VDDSPD
DQ<12>
DQ<13>
131
132 M_DATA_B13 * * * * B
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%
10V, Y5V, +80%/-20%

SMVREF_B 1 140 M_DATA_B14 SMVREF_B 1 140 M_DATA_B14
VREF DQ<14> VREF DQ<14>
1uF
1uF
1uF
1uF
7,19,25,26,27,29 SMB_CLK_RESUME 120 141 M_DATA_B15 SMB_CLK_RESUME 120 141 M_DATA_B15
SCL DQ<15> M_DATA_B16 SMB_DATA_RESUME SCL DQ<15> M_DATA_B16
7,19,25,26,27,29 SMB_DATA_RESUME 119 SDA DQ<16> 24 119 SDA DQ<16> 24
101 SA2 DQ<18> 30 101 SA2 DQ<18> 30
240 31 M_DATA_B19 240 31 M_DATA_B19
SA1 DQ<19> M_DATA_B20 SA1 DQ<19> M_DATA_B20
239 SA0 DQ<20> 143 239 SA0 DQ<20> 143
SA2 SA1 SA0 144 M_DATA_B21 SA2 SA1 SA0 144 M_DATA_B21
0 1 0 DQ<21> M_DATA_B22 0 1 1 DQ<21> M_DATA_B22
9,15 M_BS_B[2..0] 190 BA1 DQ<22> 149 9,15 M_BS_B[2..0] 190 BA1 DQ<22> 149
M_BS_B1 71 150 M_DATA_B23 M_BS_B1 71 150 M_DATA_B23
M_BS_B0 BA0 DQ<23> M_DATA_B24 M_BS_B0 BA0 DQ<23> M_DATA_B24
DQ<24> 33 DQ<24> 33
9,15 M_SCKE_B[3..0] M_SCKE_B1 DQ<25> M_DATA_B26 9,15 M_SCKE_B[3..0] M_SCKE_B3 DQ<25> M_DATA_B26
171 CKE1 DQ<26> 39 171 CKE1 DQ<26> 39
M_SCKE_B0 52 40 M_DATA_B27 M_SCKE_B2 52 40 M_DATA_B27
CKE0 DQ<27> M_DATA_B28 CKE0 DQ<27> M_DATA_B28
DQ<28> 152 DQ<28> 152
153 M_DATA_B29 153 M_DATA_B29 Channel B DIMM II 1.8V high-frequency decoupling caps.
DQ<29> M_DATA_B30 DQ<29> M_DATA_B30 place as close to DIMM power pins as possible
DQ<30> 158 DQ<30> 158
76 159 M_DATA_B31 76 159 M_DATA_B31
9,15 M_SCS_B1J S1# DQ<31> M_DATA_B32 9,15 M_SCS_B3J S1# DQ<31> M_DATA_B32
193 S0# DQ<32> 80 193 S0# DQ<32> 80
9,15 M_SCS_B0J 81 M_DATA_B33 9,15 M_SCS_B2J 81 M_DATA_B33
221 CK2#/RFU DQ<34> 86 221 CK2#/RFU DQ<34> 86
9 CK_M_200M_N_DDR2_B 220 87 M_DATA_B35 9 CK_M_200M_N_DDR5_B 220 87 M_DATA_B35
9 CK_M_200M_P_DDR2_B CK2/RFU DQ<35> M_DATA_B36 9 CK_M_200M_P_DDR5_B CK2/RFU DQ<35> M_DATA_B36
138 CK1#/RFU DQ<36> 199 138 CK1#/RFU DQ<36> 199
9 CK_M_200M_P_DDR1_B CK1/RFU DQ<37> M_DATA_B38 9 CK_M_200M_P_DDR4_B CK1/RFU DQ<37> M_DATA_B38
186 CK0# DQ<38> 205 186 CK0# DQ<38> 205
9 CK_M_200M_P_DDR0_B CK0 DQ<39> M_DATA_B40 9 CK_M_200M_P_DDR3_B CK0 DQ<39> M_DATA_B40
9,15 M_MAA_B[14..0] DQ<40> 89 9,15 M_MAA_B[14..0] DQ<40> 89
M_MAA_B0 188 90 M_DATA_B41 M_MAA_B0 188 90 M_DATA_B41
M_MAA_B1 A0 DQ<41> M_DATA_B42 M_MAA_B1 A0 DQ<41> M_DATA_B42
183 A1 DQ<42> 95 183 A1 DQ<42> 95
182 A3 DQ<44> 208 182 A3 DQ<44> 208
60 A5 DQ<46> 214 60 A5 DQ<46> 214
58 A7 DQ<48> 98 58 A7 DQ<48> 98
177 A9 DQ<50> 107 177 A9 DQ<50> 107
A M_MAA_B10 70 108 M_DATA_B51 M_MAA_B10 70 108 M_DATA_B51 A
M_MAA_B11 A10/AP DQ<51> M_DATA_B52 M_MAA_B11 A10/AP DQ<51> M_DATA_B52
57 A11 DQ<52> 217 57 A11 DQ<52> 217
196 A13 DQ<54> 226 196 A13 DQ<54> 226
A14 DQ<55> M_DATA_B56 A14 DQ<55> M_DATA_B56
9,15 M_BS_B[2..0] 173 A15 DQ<56> 110 9,15 M_BS_B[2..0] 173 A15 DQ<56> 110
M_BS_B2 54 111 M_DATA_B57 M_BS_B2 54 111 M_DATA_B57
A16/BA2 DQ<57> M_DATA_B58 A16/BA2 DQ<57> M_DATA_B58
DQ<58> 116 DQ<58> 116
74 229 74 229
9,15 M_CAS_BJ
9,15 M_RAS_BJ 192
CAS#
RAS#
DQ<60>
DQ<61> 230 M_DATA_B61
M_DATA_B62
9,15 M_CAS_BJ
9,15 M_RAS_BJ 192
CAS#
RAS#
DQ<60>
DQ<61> 230 M_DATA_B61
M_DATA_B62
FOXCONN PCEG
9,15 M_WE_BJ 73 WE# DQ<62> 235 9,15 M_WE_BJ 73 WE# DQ<62> 235
236 M_DATA_B63 236 M_DATA_B63 Title
DQ<63> DQ<63>
DDR2 Channel B DIMM 1, 2
DDR2_DIMM DDRII
CONN,DIMM,DDR II,1.8V,V/T,Blu,G/F,G,DIP-240
DDR240H260
CONN,DIMM,DDRII,1.8V,1mm,V/T,Yel,G/F,G,DIP-240
ddr240h260
C G33M03 C

5 4 3 2 1
5 4 3 2 1
M_SCKE_B[3..0] 9,14
M_BS_B[2..0] 9,14
M_MAA_B[14..0] 9,14
VTT_DDR M_ODT_B[3..0] 9,14
RN27
*1 2 M_SCS_A2J
M_SCS_A0J
9,12
9,12
D 3 4 D
5 6 M_ODT_A0 9,12
7 8 M_SCS_A1J 9,12 VTT_DDR
43 8p4r0402h6
Ohm
VTT_DDR
RN39
*1 2
M_ODT_B2
M_ODT_B1
3 4
5 6 M_SCS_B1J 9,14
7 8 M_SCS_B2J 9,14
R492 33 M_MAA_B13 43 8p4r0402h6
Ohm
R491 43
M_SCKE_B1 9,14
RN37
*1 2
M_MAA_B2
M_MAA_B0
3 4 M_BS_B1
RN40 5 6 M_MAA_B10
7 8
*1 2 M_SCS_B0J
M_SCS_B3J
9,14
9,14
338P4R0402h6
3 4 M_ODT_B3
5 6 M_ODT_B0
7 8
43 8p4r0402h6
Ohm
VTT_DDR
RN41
*1
RN42
M_BS_B2
*1 2
M_SCKE_B2
M_SCKE_B3
2 M_MAA_B14 3 4 M_SCKE_B0
3 4 M_MAA_B12 5 6
C C
5 6 M_MAA_B11 7 8
7 8 43 8p4r0402h6
Ohm
338P4R0402h6
RN43
*1 2
M_MAA_B9
M_MAA_B7
VTT_DDR
3 4 M_MAA_B8
5 6 M_MAA_B6 RN38
7 8
338P4R0402h6
*1 2
M_BS_B0
M_RAS_BJ 9,14
3 4
5 6 M_WE_BJ 9,14
7 8 M_CAS_BJ 9,14
338P4R0402h6
RN33
*1 2
M_MAA_B5
M_MAA_B4
3 4 M_MAA_B3
5 6 M_MAA_B1
7 8
338P4R0402h6
VTT_DDR
1D8V_STR
B VTT_DDR B
C0603
C506
C0603
C528
C0603
C519
C0603
C520
C0603
C522
C0603
C523
C0603
C524
C0603
C512
C0603
C508
C0603
C509
C0603
C514
C0603
C507
C0603
C513
C0603
C511
C0805
C525
C0805
C521
* * * * * * * * * * * * * *
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%

* *
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
6.3V, X5R, +/-10%
6.3V, X5R, +/-10%
VTT_DDR
4.7uF
4.7uF
Channel B VTT_0.9V high-frequency decoupling caps.

Channel B VTT_0.9V Mid Range decoupling caps. Place as close to termination resistors as possible
Placed in termination Island
A A
FOXCONN PCEG
Title
DDR2 Channel B Termination
C G33M03 C

5 4 3 2 1
5 4 3 2 1
5V_SB_SYS
5V_SB_SYS
12V_SYS
D
Q33 R520
R426 330
3D3V_SB G VDUAL3V_DRV 5V_SB_SYS 10 -0.05
AOD452 +/-5% r0603h6 5V_SYS
@CLONE
A
R519
A
D14 4.7K
D
D13 SD103AW D16 @CLONE
D D
Q30 SD103AW LED_Yel Q35
* EC39 5V_SB_SYS VCC_PWM
C
G VCC_GTAE C463 @CLONE G 1D25V_MCH
C
1
1000uF AOD452
* 4.7uF
25V,Y5V,+80/-20% * C464
0.1uF
2N7002
@CLONE
1D05V_ICH
S
S
C461 c0805h13
D
2
1
C566 0.1uF
* C462
1
* EC45
* 0.1uF
*1uF Q23
VPCIE_DRV
2
LR1_DRV
LR1_SEN
1000uF LR1_DRV G
2
Ver 1.2 update AOD452
3D3V_SYS 1D05V_ICH
S
12V_SYS R424 316 R0603 +/-1%
36
35
34
33
32
31
30
29
28
27
26
25
For VTT Power OCP U26 LR1_SEN
VPCIE_DRV
LR1_DRV
VSB5V
CP
LR2_DRV
LR3_DRV
C1
C2
LR1_SEN
GND
LR2_SEN
LR3_SEN
R480 3D3V_SYS 3D3V_SYS EC26
1
10K
+/-5%
R425
1K
* * C367
0.1uF * C363
4.7uF * C387
4.7uF
R474 R483 VPCIE_SEN 37 24 +/-1% 1000uF
2
4.7K 4.7K 3D3V_SB VPCIE_SEN SS FSBVTT_SEN
38 VDUAL3V_SEN VID_SEN 23
+/-5% +/-5% VDUAL3V_DRV 39 22 FSBVTT_DRV
R477 VCC_GTAE VDUAL3V_DRV VID_DRV VTT_OPS
40 VCCGATE VTT_OPS 21
3.3K USB_GATE 41 20
+/-5% DUAL_GTAE USBGATE GND VRAM_UGATE
42 19
43
DUALGATE
GND
VRAM_UGATE
VRAM_LGATE 18 VRAM_LGATE FSB VTT ICH 1D05V @ 2A
44 17 VCC_PWM
19 RSMRSTJ RSMRST# VCC_PWM VRAM_OPS 1D8V_STR
VBAT_SIO 45 16 Max --> 6A
FAULT#/TURBO2#
VBAT VRAM_OPS VRAM_FB
8,19,20 PWRGD_3V 46 PWOK VRAM_FB 15
47 14 VTT_COMP C480
VCC3V COMP
1
TURBO1 VTT_FB
48 TURBO# VTT_FB 13
* 0.1uF
PS_ONIN#
VTT_PWM
PWOKIN
5V_SB_SYS
VID_GD
SLP_S4J status C467
SDATA
VSB5V
SCLK5
2
1
VREF
AMT non-AMT
PLED
SLED
APM7313
* 0.22uF 16V, Y5V, +80%/-20%
S5#
5 4 USB_GATE S4 1 0 C487 C491 16V, Y5V, +80%/-20%
D
D2 G2
1
S5 1 0
6 3 0.1uF
** 0.1uF
2007 CPU=>1.1V
2
D2 S2 VCC_GTAE 16V, X7R, +/-10% 16V, Y5V, +80%/-20% FOXONE Q16
C 7 2 C
1
2
3
4
5
6
7
8
9
10
11
12
D1 G1 C0603
8 1 5V_SYS
Normal=>1.2V
2
2
D1 S1 FSBVTT_DRV G
5V_DUAL_USB Q34 VTT_PWM AOD452
VID => S0 ONLY
S5J
S
TURBO2 5V_SB_SYS
LR1 => STB POWER
28 ATXPWRGD
LR2 => STB POWER near acpi
24,28 PS_ONJ
0.8V
D
1
Q8
4,19 SLP_S4J
12,14,17,19,25,26,27,29 SMB_CLK_RESUME
+/-5% R486 0
* VR_EN 5,6
LR3 => STB POWER
FSB_VTT
FSBVTT_SEN R454 470 Ohm
2
VCC_GTAE 12,14,17,19,25,26,27,29 SMB_DATA_RESUME C494 +/-1%
G
1.2V@6A
1
AOD452
TP34
C493 * 0.1uF
16V, Y5V, +80%/-20%
R428
3.83K
R441
1.24K * EC15
S
rear USB 12V_SYS 1uF 5V_SB_SYS +/-1% +/-1% 1000uF

28 PUSLED
2
16V, Y5V, +80%/-20%
5V_SYS
* L28 * EC40
FSB_VTT
Choke Coil 1.2uH
D
1000uF R442
+/-5% R485 0 S5J Q36 680
19 SLP_S5J dummy
C
R429
3D3V_SYS R484 4.7K TURBO2 G DUAL_GTAE
+/-5% AOD452 B VTT_SEL 6
DS
1D25V_VIN 5V_DUAL MMBT3904_NL NC : 1.2V
E
4.7K 1.2V: 1.2V
Q28
C316 C371 EC24 Q37 Near VDIMM +/-5% Vss : 1.1V
1
* 0.1uF
16V, Y5V, +80%/-20% * 4.7uF
25V,Y5V,+80/-20%
* 330uF
16V, +/-20% G VCC_GTAE
c0805h13 AOD452
2
S
5V_SYS 1D8V_STR
D
12V_SYS
Q22
R226 20K VTT_OPS 1D25V_MCH
* EC22
1000uF
Q29
2
BAT54C
0 R227 G +/-5% FSB_VTT 3 1D5V_ICH
D
B B
+/-5% AOD452 1
C352 20.6A Q27
S
1
* 0.1uF
16V, Y5V, +80%/-20% U20 R347 C364
L22 5V_DUAL VPCIE_DRV G
*
7 PVCC BOOT 2 4.7 1 20.1uF 1D25V_PHASE AOD452

2
+/-5% 25V, Y5V, +80%/-20% 2.5uH@100KHz 1.5V and 1.2V power sequence
S
6 1 R211
VDIMM
D
VCC UGATE 2.2 +/-5%

VTT_PWM 3 PWM PHASE 8 Q21 * L40
4 5 0 R220 G Choke Coil 1.2uH
GND LGATE
1
ISL6612ACBZA-T
+/-5% AOD452
* C266
1nF * C235
4.7uF
* EC21 * EC17 * EC23
21.6A 0.8V
S
1000uF 1000uF 1000uF 1D5V_ICH

2
C492
R482 33 1 2 47nF VPCIE_SEN
*
+/-5% 1D8V_VIN
0.8V near ACPI R433
VTT_FB R479 2.2K EC38 EC37 R452 1.4K
1
R0603 +/-1% * 470uF * 470uF
* C497
* C496 1.6K +/-1%
1
R481 +/-20% +/-20% 4.7uF 0.1uF +/-1%
* C479
* C425 *EC31
D
3.9K ce35d80h90 ce35d80h90 R0603 4.7uF 0.1uF
2
VTT_COMP R475 11K C490 1 2 10nF +/-1% Q32 near ACPI 1000uF
2
*
+/-5% R0603
VRAM_UGATE R514 0 R513 20K VRAM_OPS
C488 1 2 68nF
DDR VTT Power +/-5%
G
AOD452 +/-5% 1D8V_STR
L39
*
*
S
1D8V_PHASE 2.5uH@100KHz I(R433)=0.8mA
D
R487
Q31 2.2
1
1D8V_STR VTT_DDR 1D8V_STR
3D3V_SB
VRAM_LGATE R515 0 G
+/-5%
* C495
0.1uF
+/-5% AOD452
2
1
U28
* C498 dummy
S
1 8 1nF
R502 VIN NC3 ICH 1D5V @ 2.75A
2
A 1K 2 7 A
+/-1% GND NC2
PADDLE
3 REFEN VCNTL 6
4 5 33 +/-5% C489 1 2 25V, X7R, +/-10%

*
R504 C529 VOUT NC1 R458 dummy 47nF dummy

1
1K
* 0.1uF EC44 R501 EC41 RT9173CPSP
9
+/-1% * 1000uF 1K * 1000uF C504 VRAM_FB R459 +/-1% R0603

1
16V, Y5V, +80%/-20% 6.3V, +/-20% +/-1% 6.3V, +/-20%

* 0.1uF 267
FOXCONN PCEG
2
dummy dummy 16V, Y5V, +80%/-20% R574 R472

2
2.4K 210 near acpi Title

+/-1%
ACPI FINTEK 72567
dummy +/-1% Size Document Number Rev
24 DDR_GPIO
C G33M03 A

5 4 3 2 1
5 4 3 2 1
12V_SYS 3D3V_SYS 3D3V_SB

3D3V_SB 3D3V_SYS 12V_SYS 12V_SYS 3D3V_SYS
C145 C153 C159

PCI-E1_16X
* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
B1 A1 C0603 C0603 C0603
12V PRSNT1#
B2 12V 12V A2
B3 RSVD1 12V A3
B4 GND GND A4
12,14,16,19,25,26,27,29 SMB_CLK_RESUME B5 SMCLK JTAG2 A5
12,14,16,19,25,26,27,29 SMB_DATA_RESUME B6 SMDAT JTAG3 A6
B7 GND JTAG4 A7
D
B8 3.3V JTAG5 A8 D
B9 JTAG1 3.3V A9
B10 A10 12V_SYS
WAKEJ 3.3VAUX 3.3V ICH_S_PLTRSTJ
19,25 WAKEJ B11 WAKE# PWRGD A11 ICH_S_PLTRSTJ 24,25
EC10
All AC Coupling caps. should be placed within 250 mils of the connector
B12
KEY
A12
* 470uF
16V, +/-20%
RSVD2 GND CK_PE_100M_P_16PORT ce35d80h125
B13 GND REFCLK+ A13 CK_PE_100M_P_16PORT 4
EXP_TXP0 C181 0.1uF EXP_TXP0_C B14 A14 CK_PE_100M_N_16PORT
8 EXP_TXP0 CK_PE_100M_N_16PORT 4
**
EXP_TXN0 C183 0.1uF EXP_TXN0_C HSOP0 REFCLK-
8 EXP_TXN0 B15 HSON0 GND A15
25V, Y5V, +80%/-20% B16 A16 EXP_RXP0
SDVO_CTRLCLK GND HSIP0 EXP_RXN0 EXP_RXP0 8
8 SDVO_CTRLCLK B17 PRSNT2_B17# HSIN0 A17 EXP_RXN0 8
B18 GND GND A18
EXP_TXP1 C190 0.1uF EXP_TXP1_C B19 A19

8 EXP_TXP1
** ** **
EXP_TXN1 C193 0.1uF EXP_TXN1_C HSOP1 RSVD3
25V, Y5V, +80%/-20% B21 A21 EXP_RXP1
GND HSIP1 EXP_RXN1 EXP_RXP1 8
B22 GND HSIN1 A22 EXP_RXN1 8
8 EXP_TXP2 HSOP2 GND
EXP_TXN2 C201 0.1uF EXP_TXN2_C B24 A24
8 EXP_TXN2 HSON2 GND
25V, Y5V, +80%/-20% B25 A25 EXP_RXP2
25V, Y5V, +80%/-20% B29 A29 EXP_RXP3
B30 RSVD4 HSIN3 A30 EXP_RXN3 8
SDVO_CTRLDATA B31 A31
8 SDVO_CTRLDATA PRSNT2_B31# GND
B32 GND RSVD5 A32

8 EXP_TXP4
** ** ** **
EXP_TXN4 C218 0.1uF EXP_TXN4_C HSOP4 RSVD
25V, Y5V, +80%/-20% B35 A35 EXP_RXP4
25V, Y5V, +80%/-20% B39 A39 EXP_RXP5
C B40 GND HSIN5 A40 EXP_RXN5 8
C
25V, Y5V, +80%/-20% B43 A43 EXP_RXP6
25V, Y5V, +80%/-20% B47 A47 EXP_RXP7
8 GMCH_EXP_EN_HDR B48 PRSNT2_B48# HSIN7 A48 EXP_RXN7 8
B49 GND GND A49

8 EXP_TXP8
** ** ** ** ** ** ** **
EXP_TXN8 C253 0.1uF EXP_TXN8_C HSOP8 RSVD6

25V, Y5V, +80%/-20% B52 A52 EXP_RXP8
25V, Y5V, +80%/-20% B56 A56 EXP_RXP9
25V, Y5V, +80%/-20% B60 A60 EXP_RXP10
25V, Y5V, +80%/-20% B64 A64 EXP_RXP11
25V, Y5V, +80%/-20% B68 A68 EXP_RXP12
25V, Y5V, +80%/-20% B72 A72 EXP_RXP13
B 8 EXP_TXN14 HSON14 GND B
25V, Y5V, +80%/-20% B76 A76 EXP_RXP14
25V, Y5V, +80%/-20% B80 A80 EXP_RXP15
B81 PRSNT2_B81# HSIN15 A81 EXP_RXN15 8
B82 RSVD7 GND A82
All AC Coupling caps. should be placed within 250 mils of the connector
pcie164_x16h150
2EG38211-D2G-4F
A A
FOXCONN PCEG
Title
PCI Express x16 Gfx Slot
C G33M03 C

5 4 3 2 1
5 4 3 2 1
*
L2
RED R28 0
8 RED 47nH 5V_SYS
5V_SYS 5V_SYS
R45
150
*
+/-1% C48 C23 C12
C537 C79
* 10pF
* 22pF
* 10pF F1
1
D D
* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
50V, NPO, +/-5% 50V, NPO, +/-5% 50V, NPO, +/-5%
C0603
Fuse 1.5A
C0603 C0603 dummy
*
L3 L_RED
EMI cap. for RGB layer change GREEN R29 0 L_GREEN
8 GREEN 47nH L_BLUE
R50 C58 C24 C13

VGA
150
+/-1% * 10pF
50V, NPO, +/-5% * 22pF
50V, NPO, +/-5% * 10pF
50V, NPO, +/-5% 5V_DDCA_CLK 15 SCL GND 5
C0603 5V_DDCA_DATA 10 GND
dummy 14 VSYNC ID0 4
9 NC
13 HSYNC B 3
RGB routing 8 GND
1. from GMCH to the first 150 ohm resistor: 7.5 mils(min. 6 mils spacing ) 12 SDA G 2
7 GND
2. from the first 150 ohm res. to the second 150 ohm resistor: 4 mils 11 ID1 R 1
3. from the second 150 ohm resistor to connector: 4 mils C64 6 GND
*
4. spacing minimum 6 mils, 30 mils spacing is recommended BLUE
L1
R9 0 * 0.1uF
25V, Y5V, +80%/-20%
VGA
DZ11AA1-HW7-4F
16
17
8 BLUE
5. R,G,B should be length matched to 700 mils, max. length is 8400 mils 47nH C0603 dsub3f15_1h128
6. R,G,B signals should be ground referenced
R34 C38 C11 C2
150
+/-1% * 10pF
50V, NPO, +/-5% * 22pF
50V, NPO, +/-5% * 10pF
50V, NPO, +/-5%
C0603
dummy
C C
The 150 Ohm resistors near VGA connector and

minimizing length to filter. The filters to VGA
connector maximum distance 800 mils.
5V_VSYNC
5V_HSYNC
R69 100K dummy
B B
R65 100K dummy
U2
1 16 5V_VSYNC
5V_SYS Vcc_sync SYNC_OUT2
3D3V_SYS 2 Vcc_video SYNC_IN2 15 VSYNC 8
* C43
0.22uF * C44
0.22uF RED 3 VIDEO_1 SYNC_OUT1 14 5V_HSYNC
16V, Y5V, +80%/-20% 16V, Y5V, +80%/-20%
C0603 C0603 GREEN 4 13
VIDOE_2 SYNC_IN1 HSYNC 8
BLUE 5 VIDEO_3 5V_DDCA_CLK
DDC_OUT2 12
6 11 DDCA_CLK
GND DDC_IN2 DDCA_CLK 8
7 9 5V_DDCA_DATA
3D3V_SYS Vcc_ddc DDC_OUT1
10 DDCA_DATA
DDC_IN1 DDCA_DATA 8
C45 8 BYP
* 0.1uF
25V, Y5V, +80%/-20%
*
C37
0.1uF
C0603 25V, Y5V, +80%/-20%
C0603 CM2009-00QR C77 C78
* 33pF
50V, NPO, +/-5% * 33pF
50V, NPO, +/-5%
C0603 C0603
dummy dummy
note: 1. CM2009 owns ESD+Level shifter function.
A 2. Should be close to VGA connector as possible! A
FOXCONN PCEG
Title
VGA Connector
C G33M03 C

5 4 3 2 1
5 4 3 2 1
3D3V_SYS R400 10K L_DRQ1J

dummy
R399 10K L_DRQ0J

dummy
ICH9
ICH9 24,33 L_AD[3..0]
L_DRQ1J J3
DMI_TXN0 USBP0N L_AD0 LDRQ1B_GP23 FP_AUD_DETECT
8 DMI_TXN0 W28 DMIORXN USBP0N AD6 USBP0N 32 K3 FWH0/LAD_0 GP0 N7 FP_AUD_DETECT 23
DMI_TXP0 W26 AD5 USBP0P L_AD1 H1
8 DMI_TXP0 DMIORXP USBP0P USBP0P 32 Front Panel 1 FWH1/LAD_1
DMI_RXN0 V30 AE3 USBP1N L_AD2 M7
D 8 DMI_RXN0 DMI_RXP0 DMIOTXN USBP1N USBP1P USBP1N 32 L_AD3 FWH2/LAD_2 D
8 DMI_RXP0 V29 DMIOTXP USBP1P AE2 USBP1P 32 J1 FWH3/LAD_3
DMI_TXN1 AA26 AD1 USBP2N L6 A20 ICH_GPIO8
8 DMI_TXN1 DMI1RXN USBP2N USBP2N 32 24 L_DRQ0J LDRQ0B GP8
LPC
DMI_TXP1 AA28 AD2 USBP2P L5 A18 WOL_ONLY
8 DMI_TXP1 DMI1RXP USBP2P USBP2P 32 24,33 L_FRAMEJ FWH4/LFRAMEB GP9_WOL_EN
DMI_RXN1 Y30 AB6 USBP3N Front Panel 2 C17 BOARDID0
8 DMI_RXN1 DMI_RXP1 DMI1TXN USBP3N USBP3P USBP3N 32 GP10/CLGPIO1
8 DMI_RXP1 Y29 DMI1TXP USBP3P AB5 USBP3P 32 GP12 A8
DMI_TXN2 AC26 AC3 USBP4N R438 33 AH3 A19 L_PMEJ L_PMEJ 24
8 DMI_TXN2 DMI2RXN USBP4N USBP4N 32 23 ICH_AUD_BCLK HDA_BIT_CLK GP13
DMI_TXP2 USBP4P R430 33 BOARDID1
DMI
8 DMI_TXP2 AC28 DMI2RXP USBP4P AC2 USBP4P 32 23 ICH_AUD_RSTJ AJ1 HDA_RSTB GP14_CLGPIO2 A9
DMI_RXN2 AB30 AB1 USBP5N Front Panel 3 AK3 C15
8 DMI_RXN2 DMI2TXN USBP5N USBP5N 32 HDA_SDI0 STP_PCIB/GP15
AUDIO
DMI_RXP2 AB29 AB2 USBP5P AH4 M2
8 DMI_RXP2 DMI2TXP USBP5P USBP5P 32 HDA_SDI1 GP16 BIOS_WP 33
DMI_TXN3 AF26 Y6 USBP6N AH1 K1
8 DMI_TXN3 DMI3RXN USBP6N USBP6N 30 23 ICH_AUD_SDIN2 HDA_SDI2 GP18
DMI_TXP3 AE26 Y5 USBP6P AJ3 AF5
8 DMI_TXP3 DMI3RXP USBP6P USBP6P 30 Back Panel HDA_SDI3 GP20
DMI_RXN3 AD29 AA3 USBP7N R436 33 ICH_AUD_SDOUT_R AJ2 A14
8 DMI_RXN3 DMI_RXP3 DMI3TXN USBP7N USBP7P USBP7N 30 23 ICH_AUD_SDOUT R451 33 ICH_AUD_SYNC_R HDA_SD0UT GP24/MEM_LED
8 DMI_RXP3 AD30 DMI3TXP USBP7P AA2 USBP7P 30 23 ICH_AUD_SYNC AK1 HDA_SYNC STP_CPUB/GP25 B18
Y1 USBP8N M5 C11
USBP8N USBP8P USBP8N 30 4 CK_14M_ICH CLK14 GP26_S4_STATEB
USBP8P Y2 USBP8P 30 GP27_QRT_STATE0 A11
D29 V6 USBP9N Back Panel with LAN G18
PER6N_GLAN_RXN USBP9N USBP9P USBP9N 30 GP28_QRT_STATE1
D30 PER6N_GLAN_RXP USBP9P V5 USBP9P 30 F25 GLAN_CLK GP32 K2
E26 W2 USB10N E14 AF6
PER6N_GLAN_TXN USBP10N USB10P USBP10N 30 LAN_PWROK LAN_RSTSYNC GP33
E28 PER6N_GLAN_TXP USBP10P W3 USBP10P 30 C21 LAN_RSTB GP34 AH5
P30 V1 USB11N Back Panel G15 L1
PER1N USBP11N USBP11N 30 LAN_RXD0 SATACLKREQB_GP35
USB
P29 V2 USB11P H14 F16 ICH_GPIO56
PER1P USBP11P USBP11P 30 LAN_RXD1 GP56
LAN
R26 E13 C12 BOARDID2
PET1N LAN_RXD2 CLGPIO5_GP57 CPU_PWRG
R28 PET1P F15 LAN_TXD0 CPUPWRGD AD23 CPU_PWRG 6
M30 F14 E21 ICH_LAN100SLP_EN
PER2N LAN_TXD1 LAN100_SLP ICH_THRM_UP
M29 PER2P G14 LAN_TXD2 THRMB AK26 ICH_THRM_UP 6,24
N26 P5 C22 VR_READY
PET2N OC0B_GP59 USB_OCJ_FRONT_1 32 VRMPWRGD VR_READY 5
N28 N3 ICH_RTCX1 A21 AH25 ICH_SYNCJ_R
PET2P OC1B_GP40 ICH_RTCX2 RTCX1 MCH_SYNCB PWRBTNJ
K30 PER3N OC2B_GP41 P7 USB_OCJ_FRONT_2 32 B21 RTCX2 PWRBTNB T3 PWRBTNJ 24
RTC
K29 R7 RTCRSTJ A25 G19 ICH_RIJ_PU
PER3P OC3B_GP42 20,28 RTCRSTJ RTCRSTB RIB
L26 N2 SRTCRSTB H20 R1 LPCPDJ
PET3N OC4B_GP43 USB_OCJ_FRONT_3 32 SRTCRSTB SUS_STATB/LPCPD LPCPDJ 33
TP_SUSCLK
MISC
L28 PET3P OC5B_GP29 N1 SUSCLK R5 TP31
HSI_N4 H30 N5 F19 FP_RSTJ
To PCI-E x1 Slot 25 HSI_N4 HSI_P4 PER4N OC6B_GP30 USB_OCJ_BACK1 30 SMB_ALERT_PU SYS_RESETB PLTRSTJ FP_RSTJ 4,6,28
25 HSI_P4 H29 PER4P OC7B_GP31 M1 C16 SMBALERTB_GP11 PLTRSTB C14 PLTRSTJ 24
HSO_N4 J26 P3 H16 E20 WAKEJ
PET4N OC8B_GP44 USB_OCJ_BACK2 30 12,14,16,17,25,26,27,29 SMB_CLK_RESUME SMBCLK WAKEB WAKEJ 17,25
HSO_P4 J28 R6 E16 G21 INTRUDERJ
PET4P OC9B_GP45 12,14,16,17,25,26,27,29 SMB_DATA_RESUME SMBDATA INTRUDERB INTRUDERJ 28
HSI_N5_JMB F30 T7 3D3V_SB R361 10K F18 C25 PWRGD_3V
To JMB368 34 HSI_N5_JMB HSI_P5_JMB PER5N OC10B_GP46 USB_OCJ_BACK_LAN 30 R383 10K SMLINK0 LINKALERTB/GP60/CLGPIO4 PWROK RSMRSTJ PWRGD_3V 8,16,20
F29 P1 A15 F22
PCI-E
34 HSI_P5_JMB PER5P OC11B_GP47 SMLINK0 RSMRSTB RSMRSTJ 16
SMB
C HSO_N5 G26 R382 10K SMLINK1 B15 E23 INTVRMEN C
HSO_P5 PET5N SMLINK1 INTVRMEN SPKR
G28 PET5P SPKR N8 SPKR 23,28
1D5V_PE_ICH 3D3V_SB
AG1 USBRBIAS_ICH R427 22.6 +/-1%
R422 24.9 DMI_COMP_ICH USBRBIASN ICH_SPI_MOSI R375 15 SLP_S3J
AF28 DMIRCOMPO USBRBIASP AG2 33 ICH_SPI_MOSI C26 SPI_MOSI SLP_S3B A13 SLP_S3J 24
+/-1% AF30 USBRBIAS connection ICH_SPI_MISO B26 B13 SLP_S4J R381
DMICOMPI 4 mils width, length no longer than 500 mils 33 ICH_SPI_MISO SPI_MISO SLP_S4B SLP_S4J 4,16
ICH_SPI_CS0J R290 15@CLONE&FD E25 G17 SLP_S5J 10K
33 ICH_SPI_CS0J SPI_CS0B SLP_S5B SLP_S5J 16
SP1
CK_DMI_N_ICH U26 Trace tied together close to pins. ICH_SPI_CLK R246 15 G23 F17 ICH_SLP_M
4 CK_DMI_N_ICH DMICLK100N 33 ICH_SPI_CLK SPI_CLK SL0_MB TP30
CK_DMI_P_ICH U25 AG3 CK_48M_ICH ICH_SPI_CS1J F23 T8 CK_PWRGD
4 CK_DMI_P_ICH DMICLK100P CLK48 CK_48M_ICH 4 TP24 SPI_CS1B/GPIO58/CLGP6 CK_PWRGD CK_PWRGD 4
C13 ICH9_TP0_PU
TP0 TP_ICH_1
2 OF 6 TP1
TP2
AK28
AE24 TP_ICH_2
TP33
TP32
F20 TP_ICH_3 TP29
3D3V_SB TP3
3D3V_SYS 4 of 6
06'MOW ww50 3D3V_SYS
R376 R449
10K 1K
3D3V_SYS dummy
dummy VCCRTC
R471 U9_1 R386 3D3V_SB
WOL_ONLY 10K R469 0 ICH_SYNCJ_R 8D 8 1K
8 ICH_SYNCJ 7 7 ICH_GPIO56 R360 10K
R389
100K VR_READY R372 ICH_GPIO8 R390 10K
+/-5% ICH_THRM_UP 180K
C400 PWRGD_3V R569 10K dummy
1
3D3V_SYS 0.1uF
C0603 * dummy
SRTCRSTB
3 3 25V, Y5V, +80%/-20%
2
4 B4 C378
ICH_AUD_SDOUT_R
R437 3.3K
dummy Heatsink
* 1uF
10V, X5R, +/-10% VCCRTC
ALL AC Coupling caps. should be close to ICH9 C0603
R432 3.3K ICH_AUD_SYNC_R
dummy R374 330K INTVRMEN
R373 330K ICH_LAN100SLP_EN

B ICH9 Hardware Straps B
LAN_PWROK
3D3V_SB INTVRMEN: enable internal VccSus1_05, VccSus1_5 and
1
VccCL1_5 regulators when connect to VccRTC
Check it CP12
COPPER LAN100_SLP: enable internal VccLAN1_05 and
R364 VccCL1_05 regulators when connect to VccRTC
2
4.7K
Stuff for non-Intel LAN SMLINK1 R387 0 SMB_DATA_RESUME 3D3V_SB

r0603h6dummy +/-5%
SMLINK0 R388 0 SMB_CLK_RESUME R362 1K WAKEJ

RSMRSTJ 16
r0603h6dummy +/-5%
C379 R384 10K SMB_ALERT_PU
* 1uF
C0603
X4_1
R377 10K L_PMEJ
10V, Y5V, +80%/-20%
HSO_N4_SLOT C417 0.1uF HSO_N4 dummy R363 10K ICH_RIJ_PU
* *
25 HSO_N4_SLOT C0603 25V, Y5V, +80%/-20%

To PCI-E x1 Slot Crystal Retainer 3D3V_SB 3D3V_SB
HSO_P4_SLOT C418 0.1uF HSO_P4 for reset issue when testing N/A
25 HSO_P4_SLOT C0603 25V, Y5V, +80%/-20% place near ICH9
All RTC-well inputs(RSMRST#,RTCRST#,INTRUDER#,PWROK)
This clip is for ICH9
R385 R379
HSO_N5_JMB C415 0.1uF HSO_N5 must either pull up to VccRTC or pulled down 32.768Khz Crystal clip. 10K 10K
* *
34 HSO_N5_JMB to ground while in G3 for preventing from

C0603 25V, Y5V, +80%/-20% floating in G3 and will prevent IccRTC leakage +/-5% +/-5%
To JMB368 that can cause excessive BOARDID0 BOARDID1
HSO_P5_JMB C416 0.1uF HSO_P5 coin-cell drain. @6jack ICH_AUD_BCLK
34 HSO_P5_JMB C0603 25V, Y5V, +80%/-20% ICH_RTCX2 VCCRTC
R565 R566
ICH_RTCX1
10K
+/-5%
10K
+/-5%
C469
22pF * R371
dummy C0603 1M
R391 10M @3jack 50V, NPO, +/-5%
A INTRUDERJ A
Place near ICH9 3D3V_SB
X4
XTAL-32.768kHz
X2ML XTAL,32.768kHz,+/-20ppm,12.5pF,G,DIP-2
* R380
10K
CLIP2S CLIP4S
C389 C388 +/-5%

* 10pF
50V, NPO, +/-5% * 10pF
50V, NPO, +/-5%
BOARDID2
C0603 C0603
R567
Clip_2P Clip_2P FOXCONN PCEG
10K For ICH9 heatsink hook Title
+/-5%
dummy ICH9 -1
Assume Capacitor CL value is 12.5 Size Document Number Rev
C G33M03 A

5 4 3 2 1
5 4 3 2 1
ICH9
AK17 SATA_RXN0
SATA0RXN SATA_RXP0 SATA_1
SATA0RXP AJ17 1
AK19 SATA_TXN0 SATA_TXP0 C499 10nF C0603 25V, X7R, +/-10% SATA_TXP0_C 2
** **
4 mils width, length no longer than 500 mils SATA0TXN SATA_TXP0 SATA_TXN0 C517 10nF C0603 25V, X7R, +/-10% SATA_TXN0_C
SATA0TXP AJ19 3 8
Trace tied together close to pins. AJ15 SATA_RXN1 4
SATA1RXN SATA_RXP1 SATA_RXN0 C526 10nF C0603 25V, X7R, +/-10% SATA_RXN0_C
SATA1RXP AK15 5 9
1D5V_PE_ICH AH16 SATA_TXN1 SATA_RXP0 C527 10nF C0603 25V, X7R, +/-10% SATA_RXP0_C 6
SATA1TXN SATA_TXP1
SATA1TXP AF16 7
AJ13 CONN_SATA
SATA2RXN SATA_2
SATA2RXP AK13 1
R394 24.9 +/-1% A29 AH14 SATA_TXP1 C556 10nF C0603 25V, X7R, +/-10% SATA_TXP1_C 2
** **
GLAN_COMPO SATA2TXN SATA_TXN1 C557 10nF C0603 25V, X7R, +/-10% SATA_TXN1_C
B29 GLAN_COMPI SATA2TXP AF14 3 8
D 8 CL_CLK G22 CL_CLK0 SATA3RXN AJ11 4 D
C18 AK11 SATA_RXN1 C567 10nF C0603 25V, X7R, +/-10% SATA_RXN1_C 5 9
TP26 TP5 SATA3RXP
H21 AF12 SATA_RXP1 C568 10nF C0603 25V, X7R, +/-10% SATA_RXP1_C 6
8 CL_DATA CL_DATA0 SATA3TXN
TP28 E19 TP4 SATA3TXP AH12 7
CL_VREF_ICH C27 AJ9 SATA_RXN4 CONN_SATA
SATA
CL_VREF0 SATA4RXN SATA_RXP4
TP27 A16 TP6 SATA4RXP AK9
T6 AF10 SATA_TXN4
8,16,19 PWRGD_3V CLPWROK SATA4TXN SATA_TXP4
TP25 B16 TP7 SATA4TXP AH9
CL_RST G20 AJ7 SATA_RXN5
8 CL_RST CL_RST0b SATA5RXN
AK7 SATA_RXP5
SATA5RXP SATA_TXN5
SATA5TXN AF8
AH7 SATA_TXP5
SATA5TXP CK_SATA_100M_N_ICH
SATACLKN AF18 CK_SATA_100M_N_ICH 4
AF19 CK_SATA_100M_P_ICH
SATACLKP CK_SATA_100M_P_ICH 4
AJ21 PWM0
AJ22 PWM1
AK22 AE7 SATA_LED
PWM2 SATALEDB SATARBIAS_ICH R440 24.9 +/-1%
SATARBIASN AK6
FANIN1_ICH AH21 AJ6 4 mils width, max. 500 mils length
FANIN2_ICH GP17_TACH0 SATABIASP Trace tied together close to pins.
AK21 GP1_TACH1
FANIN3_ICH AH22
ICH_GPIO7_PU GP6_TACH2 ICH_GPIO21_PU
AK23 GP7_TACH3 GP21_SATA0GP AK25
AE20 ICH_GPIO19_PU
Stuff when using ICH9 FSC GP19_SATA1GP ICH_GPIO36_PU
GP36_SATA2GP AE21
AE22 ICH_GPIO37_PU
GP37_SATA3GP SATA4GP_PU
SATA4GP AF22
C19 AD21 SATA5GP_PU
24 SST SST SATA5GP
A20GATE P8 A20GATE 24
AJ28 1 SATA_3
A20Mb A20MJ 6
SATA_TXP4 C482 10nF C0603 25V, X7R, +/-10% SATA_TXP4_C 2
** **
AC22 SATA_TXN4 C483 10nF C0603 25V, X7R, +/-10% SATA_TXN4_C 3 8
IGNNEb IGNNEJ 6
INT3_3VB M3 INITJ_3D3V 33 4
AE23 SATA_RXN4 C484 10nF C0603 25V, X7R, +/-10% SATA_RXN4_C 5 9
INTb INITJ 6
HOST
ICH_GPIO22_PU AJ24 AH27 SATA_RXP4 C485 10nF C0603 25V, X7R, +/-10% SATA_RXP4_C 6
GP22_SCLOCK INTR INTR 6
ICH_GPIO38_PU AK24 AJ27 7
GP38_SLOAD FERRb FERRJ 6
ICH_GPIO39_PD AH23 AF24 CONN_SATA
GP39_SDATAOUT0 NMI NMI 6
C ICH_GPIO48_PU AD20 L3 1 SATA_4 C
GP48_SDATAOUT1 RCINb KBRSTJ 24
R450 10K AJ25 N6 SATA_TXP5 C553 10nF C0603 25V, X7R, +/-10% SATA_TXP5_C 2
SERIRQ 24,33
** **
GPIO49 SERIRQ SATA_TXN5 C552 10nF C0603 25V, X7R, +/-10% SATA_TXN5_C
SMIb AH26 SMIJ 6 3 8
STPCLKb AJ29 STPCLKJ 6 4
THERMTRIPJ SATA_RXN5 C561 10nF C0603 25V, X7R, +/-10% SATA_RXN5_C
3 OF 6 THRMTRIPB
PECI
AD24
AC23 R468 0
THERMTRIPJ
PECI
6
6,24
SATA_RXP5 C560 10nF C0603 25V, X7R, +/-10% SATA_RXP5_C
5
6
9
7
CONN_SATA
3D3V_SYS
R395
3.24KOhm 0.405V
+/-1%
CL_VREF_ICH
R398 C414
1
453
+/-1% * 0.1uF
25V, Y5V, +80%/-20%
C0603
2
4 mils width, 10 mils spacing

place cap. near pin
3D3V_SYS
3D3V_SYS
R463 10K FANIN1_ICH R444 10K SATA4GP_PU

FSB_VTT
R462 10K FANIN2_ICH R466 10K SATA5GP_PU 3D3V_SYS 3D3V_SYS

B B
R578 10K R455 62 THERMTRIPJ
R464 10K FANIN3_ICH
R445 10K ICH_GPIO39_PD R439 R526
Place at ICH9 end of route 10K 10K
R446 10K ICH_GPIO7_PU dummy
R447 10K ICH_GPIO22_PU
SATA_LED 2 D17
R448 10K ICH_GPIO38_PU 3
IDE_LED HDD_LED 28
34 IDE_LED 1
BAT54A-7-F
R461 10K ICH_GPIO48_PU
3D3V_SYS
3D3V_SB
VCCRTC
ICH_GPIO19_PU R443 10K
BAT54C Q12
ICH_GPIO21_PU R470 10K VCCRTC_SIO 2 width 20 mils
D6
3
ICH_GPIO36_PU R465 10K C A 1
ICH_GPIO37_PU R467 10K R118

SD103AW 20K
+/-1%
BAT1_1 C154
A R109 * 1uF
10V, X5R, +/-10% A
LITHIUM BATT 1K C0603 RTCRSTJ
CR2032 RTCRSTJ 19,28
C134
FSB_VTT Battery
N/A
* 1uF
10V, X5R, +/-10%
1
C0603
For battery cell. BAT Battery Holder
BAT2_200D224
R434 62 FERRJ
FOXCONN PCEG
2
Place at ICH9 end of route Title

ICH9 -2
C G33M03 A

5 4 3 2 1
5 4 3 2 1
REF5V_SUS
REF5V 3D3V_SYS
ICH9
VccCL3_3_2 B23
ICH9 AD[31..0]
A6 V5REF VccCL3_3_1 C23
AD[31..0] 26,29,35
26,29,35 PAR PAR E3 PAR AD_0 C10 AD0 3D3V_SYS

3D3V_SB AF1 V5REF_Sus
Vcc1_5_A_25 AA7 1D5V_ICH * C402
0.1uF
26,29,35 DEVSELJ DEVSELJ C6 C8 AD1 VccCL1_5 A26 AA8 25V, Y5V, +80%/-20%
CK_33M_ICH DEVSELB AD_1 AD2 1D5V_ICH VccCL1_5 Vcc1_5_A_26 C0603
4 CK_33M_ICH B3 PCICLK AD_2 E9 Vcc1_5_A_27 AB7
26,29,35 PCIRSTJ PCIRSTJ R2 C9 AD3 VccCL1_05 A23 AB8
IRDYJ PCIRSTB AD_3 AD4 VccCL1_05 Vcc1_5_A_28
26,29,35 IRDYJ J8 IRDYB AD_4 A5 Vcc1_5_A_29 T1
PMEJ R3 E12 AD5 AC9 AC14
26,29,35 PMEJ PMEB AD_5 VccSusHDA Vcc1_5_A_30
3D3V_SB 26,29 SERRJ SERRJ K5 E10 AD6 AC15
D
STOPJ SERRB AD_6 AD7 Vcc1_5_A_31 1D05V_ICH D
26,29,35 STOPJ F10 STOPB AD_7 B7 AC10 VccHDA Vcc1_5_A_32 AC16
26 LOCKJ LOCKJ H8 B6 AD8
R570 TRDYJ PLOCKB AD_8 AD9 VccCL1_5 VCCSATAPLL
E6 B4 AK5 A24
* 4.7K
26,29,35 TRDYJ
26,29,35 PERRJ PERRJ F5
TRDYB
PERRB
AD_9
AD_10 E7 AD10 VccUSBPLL Vcc1_05_1
Vcc1_05_2 B24
FRAMEJ AD11
dummy 26,29,35 FRAMEJ G12 FRAMEB AD_11
AD_12
A4
H12 AD12 * C404
0.1uF
AK20 VccSATAPLL Vcc1_05_3
Vcc1_05_4
C24
E24
PMEJ F8 AD13 16V, X7R, +/-10% VCCDMIPLL T30 F24
26 GNT0J H5
A7
GNTB0
PCI AD_13
AD_14
AD_15
C5
D2
E5
AD14
AD15
AD16
C0603
VCCGLANPLL A28
VccDMIPLL
VccGLANPLL
Vcc1_05_5
Vcc1_05_6
Vcc1_05_7
G24
H23
H24
26 GNT1J GNTB1_GP51 AD_16 Vcc1_05_8
ICH9 internal pull up C7 G7 AD17 VccCL1_05 C397 B10 J23
29 GNT2J GNTB2_GP53 AD_17 VccLAN1_05_2 Vcc1_05_9
1
AD18
35 GNT3J F7 GNTB3_GP55 AD_18
AD_19
E11
G10 AD19
* C403 * 0.1uF
16V, X7R, +/-10%
A10 VccLAN1_05_1 Vcc1_05_10
Vcc1_05_11
M12
M13
G6 AD20 0.1uF M15
2
AD_20 AD21 25V, Y5V, +80%/-20% dummy Vcc1_05_12
26 PREQ0J K7 REQB_0 AD_21 D3 C30 VccGLAN1_5_1 Vcc1_05_13 M17
26 PREQ1J G13 H6 AD22 C0603 C29 M18
REQB1_GP50 AD_22 AD23 VccGLAN1_5_2 Vcc1_05_14
26,29 PREQ2J F13 REQB2_GP52 AD_23 G5 1D5V_PE_ICH C28 VccGLAN1_5_3 Vcc1_05_15 M19
26,35 PREQ3J G8 C1 AD24 B30 N12
REQB3_GP54 AD_24 AD25 VccGLAN1_5_4 Vcc1_05_16
AD_25 C2 Vcc1_05_17 N19
C3 AD26 R12
AD_26 AD27 1D5V_PE_ICH Vcc1_05_18
26 INTAJ J5 PIRQAB AD_27 D1 Vcc1_05_19 R19
26 INTBJ E1 J7 AD28 U12
GNT0J PIRQBB AD_28 AD29 1D25V_MCH 1D25V_ICH Vcc1_05_20
26 INTCJ F1 PIRQCB AD_29 F3 AA23 Vcc1_5_B_1 Vcc1_05_21 U19
26 INTDJ A3 G1 AD30 AA24 V12
PIRQDB AD_30 AD31 Vcc1_5_B_2 Vcc1_05_22
26,35 INTEJ K6 GP2_PIRQEB AD_31 H3 AA25 Vcc1_5_B_3 Vcc1_05_23 V19
26 INTFJ L7 GP3_PIRQFB AB24 Vcc1_5_B_4 Vcc1_05_24 W12
26,29 INTGJ F2 F11 CBEJ0 R423 0 AB25 W13
R141 GP4_PIRQGB CXBEB_0 CBEJ1 CBEJ0 26,29,35 r0805h6 Vcc1_5_B_5 Vcc1_05_25
26 INTHJ G2 GP5_PIRQHB CXBEB_1 G9 CBEJ1 26,29,35 AC25 Vcc1_5_B_7 Vcc1_05_26 W15
1K C4 CBEJ2 AD25 W17
@TF CXBEB_2 CBEJ3 CBEJ2 26,29,35 Vcc1_5_B_8 Vcc1_05_27
CXBEB_3 E8 CBEJ3 26,29,35 AD26 Vcc1_5_B_9 Vcc1_05_28 W18
AD28 W19 FSB_VTT
1 OF 6 Vcc1_5_B_10 Vcc1_05_29
AE28 Vcc1_5_B_11
Boot Device *GNT0 *SPI_CS1# AE29 AH28
SPI 0 X Vcc1_5_B_12 V_CPU_IO_1
AE30 Vcc1_5_B_13 V_CPU_IO_2 AJ30
PCI 1 0 J24
FWH 1 1 Vcc1_5_B_14
J25 Vcc1_5_B_15
K23 Vcc1_5_B_16
C *internal pull-up K24 C
Vcc1_5_B_17 3D3V_SYS
K25 Vcc1_5_B_18
1D5V_ICH L24 Vcc1_5_B_19
VccSATAPLL LC Filter L25
M23
Vcc1_5_B_20
A27
L36 Vcc1_5_B_21 VccGLAN3_3 3D3V_SYS
M24
*
R460 0 VCCSATAPLL Vcc1_5_B_22

M25 Vcc1_5_B_23 VccLAN3_3_1 A12
L0805 10uH N24 B12
0805h14 C475 C472 Vcc1_5_B_24 VccLAN3_3_2 5V_SB_SYS 3D3V_SB
N25 Vcc1_5_B_25
1
* 10uF
C0805 * 1uF
C0603
P23
P24
Vcc1_5_B_26
Vcc1_5_B_27
3D3V_SYS
10V, Y5V, +80%/-20% 10V, Y5V, +80%/-20% P25 AH24
A
2
Vcc1_5_B_28 Vcc3_3_5 R414

R24 Vcc1_5_B_29 Vcc3_3_4 AF21
10 D15
1D5V_ICH VccGLANPLL LRC Filter R25
T23
Vcc1_5_B_30 Vcc3_3_3 AC21
AC19 SD103AW
Vcc1_5_B_31 Vcc3_3_2 SOD123A
T24 Vcc1_5_B_32 Vcc3_3_1 AD10
T25 AH30 dummy
L29
C
Vcc1_5_B_33 Vcc3_3_6 REF5V_SUS
Place LC near pin AK20 T26 Vcc1_5_B_34 Vcc3_3_7 AK4
1 2 R392 0 VCCGLANPLL T28 A2 REF5V_SUS
Vcc1_5_B_35 Vcc3_3_8 C453
U24 Vcc1_5_B_36 Vcc3_3_9 B1
1
1D05V_ICH
1uH@10MHz
1206h14
*
C407
10uF
*
C406
0.1uF
U28
U29
Vcc1_5_B_37
Vcc1_5_B_38
Vcc3_3_10
Vcc3_3_11
B9
G11
* 0.1uF
25V, Y5V, +80%/-20%
Rated at least 100mA C0805 25V, Y5V, +80%/-20% U30 G3
2
10V, Y5V, +80%/-20% C0603 Vcc1_5_B_39 Vcc3_3_12
V23 Vcc1_5_B_40 Vcc3_3_13 H7 place cap. near pin AF1
V24 Vcc1_5_B_41 Vcc3_3_14 J2
C0603
V25 Vcc1_5_B_42 Vcc3_3_15 K8
C392 C386
50V, X7R, +/-10%
W24 Vcc1_5_B_43 Vcc3_3_16 L8

1
* 22nF
C0603 * 0.1uF
16V, X7R, +/-10%
W25
Y23
Vcc1_5_B_44
Vcc1_5_B_45
3D3V_SB V5REF_SUS / 3D3V_SB Power Sequencing
Place LRC near pin A25 Y24 AF2
2
1D25V_ICH Vcc1_5_B_46 VccSus3_3

Y25 Vcc1_5_B_47 VccSus3_3_1 U1
VccSus3_3_2 U2
AG29 VccDMI_1 VccSus3_3_3 U3
1D5V_ICH
1D5V_ICH VccDMIPLL LRC Filter AG30 VccDMI_2 VccSus3_3_4 U5
U6
VccSus3_3_5
H10 Vcc1_5_A_1 VccSus3_3_6 U7
L32 H11 Vcc1_5_A_2 VccSus3_3_7 U8
B
AC11 Vcc1_5_A_3 VccSus3_3_8 V8 B
1 2 R401 0 VCCDMIPLL AB23 W7
Vcc1_5_A_4 VccSus3_3_9
ICH8 Core decoupling caps. 1uH@10MHz C419 C422
AC18
AC20
Vcc1_5_A_5 VccSus3_3_10 W8
Y8
1
1206h14
Rated at least 100mA * 10uF
C0805 * 10nF
C0603
AC13
AD11
Vcc1_5_A_7
Vcc1_5_A_8
VccSus3_3_12
VccSus3_3_13
A17
B20
10V, Y5V, +80%/-20% 50V, X7R, +/-10% AD12 C20
2
AD13 Vcc1_5_A_10 VccSus3_3_15 E17
AE11 Vcc1_5_A_11 VccSus3_3_16 H15
AF11 VCCRTC
3D3V_SYS Vcc1_5_A_12
AH10 Vcc1_5_A_13
AH11 Vcc1_5_A_14 VccRTC A22
Place LRC near pin T30 AJ10 3D3V_SYS
Vcc1_5_A_15
AK10 Vcc1_5_A_16
C405 AC17 AC7 1D05V_ICH_SB
* 0.1uF
25V, Y5V, +80%/-20%
AD17
AE17
Vcc1_5_A_18
Vcc1_5_A_19
VccSus1_05_2 H17
C0603 0.1uF C460

C0603 1D5V_ICH
PCI-E (VCC1_5_B) Filter AF17
25V, Y5V, +80%/-20%

Vcc1_5_A_20
1
1D5V_ICH_SB
L33
AH17
AH18
Vcc1_5_A_21
Vcc1_5_A_22
VccSus1_5_1
VccSus1_5_2
H18
AD8
*
1D5V_PE_ICH AJ18 C477
2
Vcc1_5_A_23
1
1D5V_PE_ICH
1 2 AK18 Vcc1_5_A_24 * C476
1
L1206 0.47uH 5 OF 6 C0603
0.1uF * C0603
2
1206h13 * EC30 C441 25V, Y5V, +80%/-20% 0.1uF
2
1
PCI-E decoupling caps. +/-20% 100uF

+/-20% * C426
10uF * C440
10uF * 1uF
C0603
25V, Y5V, +80%/-20%
C0805 C0805 10V, Y5V, +80%/-20%

2
dummy
10V, Y5V, +80%/-20% 10V, Y5V, +80%/-20%

5V_SYS 3D3V_SYS
1D25V_ICH
A
R378 D12
10 SD103AW
SOD123A
A A
C
1
5V_SYS
* C458
10uF REF5V
C0805 REF5V
2
10V, Y5V, +80%/-20%

C395
1
* 1
C307 C189
1
C0603
0.1uF * C0603 * C0603
2
25V, Y5V, +80%/-20% 0.1uF 0.1uF

FOXCONN PCEG
2
2
Placed near AG30 25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20%
place cap. near pin A15
Title
DMI decoupling caps. V5REF / 3D3V_SYS Power Sequencing ICH9 -3
C G33M03 A

5 4 3 2 1
5 4 3 2 1
ICH9 3D3V_SB 3D3V_SYS FSB_VTT FSB_VTT
G30 H13 1D5V_ICH 1D5V_ICH

VSS_100 VSS_099
G29 VSS_101 VSS_098 H19
G25 VSS_102 VSS_097 H2
G16 VSS_103 VSS_096 H22
F9 H25 C468 C481 C459 C394
VSS_104 VSS_095
1
F6 H26
* 1uF
* 1uF
* 0.1uF
* 0.1uF C466 C220 C465
6.3V, X5R, +/-10%

VSS_105 VSS_094
1
F28
F26
VSS_106 VSS_093 H28
H9
10V, Y5V, +80%/-20%
C0603
10V, Y5V, +80%/-20%
C0603
16V, X7R, +/-10% 16V, X7R, +/-10%
* 0.1uF
* 0.1uF
16V, X7R, +/-10%
16V, X7R, +/-10% * 4.7uF
C0805
2
VSS_107 VSS_092
F21 J29
2
D VSS_108 VSS_091 D
F12 VSS_109 VSS_090 J30
E30 VSS_110 VSS_089 J6
E29 VSS_111 VSS_088 K26
E22 VSS_112 VSS_087 K28
E2 VSS_113 VSS_086 L2
E18 VSS_114 VSS_085 L23
E15 VSS_115 VSS_084 L29 Placed near AH28 and AJ30
D28 L30 3D3V_SYS
VSS_116 VSS_083
B8 VSS_117 VSS_082 M14
B5 VSS_118 VSS_081 M16 Audio decoupling caps.
B28
B25
VSS_119 VSS_080 M26
M28 C470 CPU decoupling caps.
VSS_120 VSS_079
1
B22
B2
VSS_121
VSS_122
VSS_078
VSS_077
M6
M8
* 0.1uF
16V, X7R, +/-10%
B19 N13
2
VSS_123 VSS_076
B17 VSS_124 VSS_075 N14
B14 N15 1D5V_ICH 1D5V_ICH
VSS_125 VSS_074
B11 VSS_126 VSS_073 N16
AK8 VSS_127 VSS_072 N17 SATA decoupling caps.
AK30 VSS_128 VSS_071 N18
AK29 N23 C471 C421
VSS_129 VSS_070
1
AK2
AK16
VSS_130
VSS_131
VSS_069
VSS_068
N29
N30
VCCRTC VCCRTC
* 0.1uF
16V, X7R, +/-10% * 0.1uF
16V, X7R, +/-10%
AK14 P12
2
VSS_132 VSS_067
AK12 VSS_133 VSS_066 P13
AJ8 P14 3D3V_SYS
VSS_134 VSS_065 C401 C391 C390
AJ5 VSS_135 VSS_064 P15
1
AJ26
AJ23
VSS_136
VSS_137
VSS_063
VSS_062
P16
P17
* 0.1uF
* 0.1uF
* 1uF
AJ20 P18 16V, X7R, +/-10% C0603
2
VSS_138 VSS_061 16V, X7R, +/-10% 10V, X5R, +/-10%
AJ16 VSS_139 VSS_060 P19
AJ14 P2 3D3V_SYS C398 3D3V_SB
VSS_140 VSS_059
1
AJ12
AH8
VSS_141
VSS_142
VSS_058
VSS_057
P26
P28
* 0.1uF
16V, X7R, +/-10%
AH6 P6
2
VSS_143 VSS_056
AH20 VSS_144 VSS_055 R13
AH2 VSS_145 VSS_054 R14
C AH19 VSS_146 VSS_053 R15 Placed near A22 C
AH15 VSS_147 VSS_052 R16
AH13 R17 C486 C423 C399
VSS_148 VSS_051
1
1
AG28
AF9
VSS_149
VSS_150
VSS_050
VSS_049
R18
R23
* 0.1uF
16V, X7R, +/-10%
RTC decoupling caps.
* 0.1uF
* 0.47uF
16V, X7R, +/-10%10V, X5R, +/-10%
AF7 R29
2
2
VSS_151 VSS_048
AF29 VSS_152 VSS_047 R30 LAN decoupling caps.
AF25 VSS_153 VSS_046 R8
AF23 VSS_154 VSS_045 T12
AF20 VSS_155 VSS_044 T13
AF15 VSS_156 VSS_043 T14
AF13 VSS_157 VSS_042 T15
AE9 VSS_158 VSS_041 T16
AE8 VSS_159 VSS_040 T17
AE6 VSS_160 VSS_039 T18
AE5
AE25
VSS_161 VSS_038 T19
T2
USB decoupling caps.
AE19
VSS_162 VSS_037
T29
PCI decoupling caps.
VSS_163 VSS_036
AE18 VSS_164 VSS_035 T5
AE16 VSS_165 VSS_034 U13
AE15 VSS_166 VSS_033 U14
AE14 VSS_167 VSS_032 U15
AE13 VSS_168 VSS_031 U16
AE12 VSS_169 VSS_030 U17
AE10 VSS_170 VSS_029 U18
AE1 VSS_171 VSS_028 U23
AD9 VSS_172 VSS_027 V13
AD7 VSS_173 VSS_026 V14
AD3 VSS_174 VSS_025 V15
AD22 VSS_175 VSS_024 V16
AD19 VSS_176 VSS_023 V17
AD18 VSS_177 VSS_022 V18
AD16 VSS_178 VSS_021 V26
AD15 VSS_179 VSS_020 V28
AD14 VSS_180 VSS_019 V3
AC8 VSS_181 VSS_018 V7
AC6 VSS_182 VSS_017 W1
B
AC5 VSS_183 VSS_016 W14 B
AC30 VSS_184 VSS_015 W16
AC29 VSS_185 VSS_014 W23
AC24 VSS_186 VSS_013 W29
AC12 VSS_187 VSS_012 W30
AC1 VSS_188 VSS_011 W5
AB3 VSS_189 VSS_010 W6
AB28 VSS_190 VSS_009 Y26
AB26 VSS_191 VSS_008 Y28
AA6 VSS_192 VSS_007 Y3
AA5 VSS_193 VSS_006 Y7
VSS_005 AA30
AK27 VSS_194 VSS_004 AA29
AH29 VSS_195 VSS_003 AA1
AJ4 VSS_196 VSS_002 A30
AF3 VSS_197 VSS_001 A1
B27 VSS_198
6 OF 6
A A
FOXCONN PCEG
Title
KB/MS Connector
C G33M03 A

5 4 3 2 1
5 4 3 2 1
3D3V_SYS +5VA
25
38
U1
1
9 DVDD-IO
AVDD1
AVDD2
DVDD
ALC888 LINE1-R
6.3V, X5R, +/-10%
C21 1 2 22uF FB1
* FB L0603 600 Ohm LINE1_R5 LINE1_L2 32
AUDIOC
* *
3 LINE1-JD 33
FIO_PRESENCEJ GPIO1/DMIC-DATA 6.3V, X5R, +/-10%
2 GPIO0/DMIC-CLK LINE1-L C22 1 2 22uF FB6 FB L0603 600 Ohm LINE1_L2 LINE1_R5
34 Line IN
19 ICH_AUD_RSTJ 11 RESET# FRONT-L (Port-D) 35 FRONT_L * 35
31
R76 22 AUDIO_BCLK 6 36 FRONT_R R10 R1 C72 C74
19 ICH_AUD_BCLK BCLK FRONT-R (Port-D)
1
19 ICH_AUD_SYNC
19 ICH_AUD_SDIN2
R61 33
+/-5% 10
8
SYNC
SDATA-IN
PIN37-VREFO
NC
37
33 AUD_VREF33 R25
@883
10K +5VA
22K
+/-5%
22K
+/-5%
50V, X7R, +/-10%
100pF * * 100pF
50V, X7R, +/-10%
CONN-JACK
audio5x3x2s_2h355
+/-5% 5 34 SENSEB +/-5% @6jack
19 ICH_AUD_SDOUT
2
SDATA_OUT Sense B SURR_L
SURR-L (Port-A-L) 39
JD_REF
D
PCBEEP 12
ALC888-GR JDREF 40
41 SURR_R C18 dummy dummy FB4 D
SENSEA PCBEEP SURR-R (Port-A-R) CEN
LINE2_L
13
14
Sense A
LINE2-L (Port-E-L)
CENTER (Port-G-L)
LFE (Port-G-R)
43
44 LFE * 10uF
10V, Y5V, +80%/-20% R33
FB L0603 300 Ohm
0603 +/-25% AUDIOB
LINE2_R 15 45 SIDESURR_L 20K FRONT_R EC48 100uF R24 75 1 2 FRONT_R_HDR FRONT_L_HDR 22
LINE2-R (Port-E-R) SIDE-L (Port-H-L)
**
MIC2_L 16 46 SIDESURR_R dummy +/-1% +/-20% +/-5% FRONT_JD 23
MIC2_R MIC2-L (Port-F-L) SIDE-R (port-H-R) stuff for ALC885 FRONT_L EC49 100uF R3 75 FRONT_L_HDR
CD_IN_L
17
18
MIC2-R (Port-F-R)
28 MIC1-VREFO-L Near the codec +/-20% +/-5%
1 2
FRONT_R_HDR
24
25
Line Out
CD_GND CD-L MIC1-VREFO-L CODEC_VREF FB5 C70 C71
19 CD-GND VREF 27 21
1
CD_IN_R
MIC1-L
20
21
CD-R
MIC1-L (Port-B-L)
LINE1-VREFO
MIC2-VREFO
29
30 MIC2_VREFO
R5
22K
R6 FB L0603 300 Ohm 100pF
22K 0603 +/-25% * * 100pF
CONN-JACK
MIC1-R 22 31 LINE2_VREFO +/-5% +/-5% 50V, X7R, +/-10% 50V, X7R, +/-10% audio5x3x2s_2h355
2
LINE1-L MIC1-R (Port-B-R) LINE2-VREFO MIC1-VREFO-R @6jack
23 LINE1-L (Port-C-L) MIC1-VREFO-R 32
LINE1-R 24 MIC1-VREFO-L
AVSS1
AVSS2
LINE1-R (Port-C-R)
DVSS
DVSS
5V_SYS 47
AUD_SPDIF_OUT SPDIFI/EAPD C8 C19 MIC1-VREFO-R
48 SPDIFO
SPDIF_OUT
1 ALC888-GR
* 10uF
* 0.1uF
R35 R40
4
7
26
42
1
10V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%

4.7K 4.7K
3 AUD_SPDIF_OUT +/-5% +/-5%
3 C179 6.3V, X5R, +/-10% AUDIOA
4 4
1
100pF
* MIC1-R C42 1 2 22uF FB7
* FB L0603 600 Ohm MIC1_R5 MIC1_L2 2
* *
Header_1X3 MIC1-JD 3
@CLONE 50V, X7R, +/-10% 6.3V, X5R, +/-10% 4 MIC IN
2
dummy MIC1-L C47 1 2 22uF FB10 FB L0603 600 Ohm MIC1_L2 MIC1_R5
* 5
1
5V_SYS 5V_SYS R26 R43 C69 C73
1
AUDIO_BCLK
22K
+/-5%
22K
+/-5%
50V, X7R, +/-10%
100pF * * 100pF
50V, X7R, +/-10%
CONN-JACK
audio5x3x2s_2h355
R77 10K C88 1uF PCBEEP @6jack Left Side
*
19,28 SPKR
2
+/-5% C100 10V, Y5V, +80%/-20% C83 C125 C86
1
1
R78
1K
* 100pF
* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 10pF
50V, NPO, +/-5% dummy dummy
-0.05 50V, X7R, +/-10%
2
2
Place near codec FB8
C EMI Caps. FB L0603 300 Ohm C
+5VA +5VA Audio Jack 0603 +/-25% AUDIOE
C36
10V, Y5V, +80%/-20%
C41
25V, Y5V, +80%/-20%
LFE EC50 100uF 1 2 LFE_HDR CEN_HDR 52
**
　腹 : JAS3331-H1K2 +/-20% CEN_JD 53
* * * * 3D3V_SYS CEN EC51 100uF
+/-20%
1
FB9
2 CEN_HDR
LFE_HDR
54
55
CEN/LFE
C17
10V, Y5V, +80%/-20%
C20
25V, Y5V, +80%/-20%
10uF
0.1uF
LINE IN SURR OUT FB L0603 300 Ohm C40 C68 51
1
* * *
C (UAJ) F (UAJ) R41 R42
0603 +/-25%
*100pF *100pF CONN-JACK
22K 22K 50V, X7R, +/-10% 50V, X7R, +/-10% audio5x3x2s_2h355
2
10uF
0.1uF
C96
10V, Y5V, +80%/-20%
C85
25V, Y5V, +80%/-20%
C87
25V, Y5V, +80%/-20%
LINE OUT CEN/LFE +/-5% +/-5% @6jack

B (UAJ) E (UAJ)
Place near Pin 38
10uF
0.1uF
0.1uF
MIC IN SIDE SURR OUT

A (UAJ) D (UAJ)
Place near Pin 25
CP11 FB2
2 1 FB L0603 300 Ohm 0603+/-25% AUDIOF
SURR_R EC52 100uF 1 2 SURR_R_HDR SURR_L_HDR 62
*
COPPER Place near Pin 1,9 +/-20% SURR_JD 63
FB3 64
FB L0603 300 Ohm 0603+/-25% SURR_R_HDR 65
SURR
RN9
75 +/-5% SURR_L EC53 100uF 1 2 SURR_L_HDR 61
*
MIC2_L_HDR MIC2_L_HD D1 2 R51 2.2K LINE2_R_HDR +/-20% C52 C67
8 7
1
MIC2_R_HDR MIC2_R_HD LINE2_VREFO
LINE2_R_HDR 6
4
5
3
LINE2_R_HD
3D3V_SYS 3
1 R56
+/-5%
2.2K LINE2_L_HDR *
100pF
* 100pF CONN-JACK
audio5x3x2s_2h355
LINE2_L_HDR * LINE2_L_HD +/-5% R22 R23 50V, X7R, +/-10% 50V, X7R, +/-10% @6jack
2
2 1 BAT54A-7-F 22K 22K
8P4R0603 FIO_PRESENCEJ +/-5% +/-5%
R96
R99 0
10K +/-5%
F_AUDIO +/-5% D4 2 R57 2.2K MIC2_R_HDR
MIC2_L_HD 1 2 dummy MIC2_VREFO 3 +/-5%
MIC2_R_HD 3 4 1 R70 2.2K MIC2_L_HDR FB12
LINE2_R_HD MIC2_JD FP_AUD_DETECT 19 +/-5% FB L0603 300 Ohm 0603+/-25%
5 6
FRONT-IO-SENSE 7 BAT54A-7-F SIDESURR_R EC54 100uF 1 2 SIDESURR_R_HDR AUDIOD
X
*
B B
LINE2_L_HD 9 10 LINE2_JD +/-20% SIDESURR_L_HDR 42
FB11 SIDESURR_JD 43
Header_2X5_K8 FB L0603 300 Ohm 0603+/-25%
R108 FRONT PANEL SIDESURR_L EC55 100uF 1 2 SIDESURR_L_HDR SIDESURR_R_HDR
44
45
SIDE SURR
*
RN10 20K +/-20% C14 C7 41
2
4
6
8
1
22K
8P4R0603 R111 +/-1% MIC2_R C53 10uF MIC2_R_HDR *
100pF
*100pF CONN-JACK
* *
* 13
5
7
39.2K Ohm 6.3V, X5R, +/-10% R54 R49 50V, X7R, +/-10% 50V, X7R, +/-10% audio5x3x2s_2h355
2
+/-5% +/-1% MIC II 22K 22K @6jack
MIC2_L C61 10uF MIC2_L_HDR +/-5% +/-5%
6.3V, X5R, +/-10%
AUDIO1 Right Side
LINE1_L2 32 INSULATOR
C98 0.1uF LINE2_R EC1 100uF LINE2_R_HDR LINE1-JD 33
* * * * * *
* *
25V, Y5V, +80%/-20% +/-20% SENSEA R63 5.1K +/-1% FRONT_JD 34

LINE II LINE1_R5 35
C116 0.1uF LINE2_L EC2 100uF LINE2_L_HDR
25V, Y5V, +80%/-20% +/-20% R64 10K LINE1-JD
R0603 +/-1%
C89 0.1uF 36
25V, Y5V, +80%/-20% R62 20K MIC1-JD FRONT_L_HDR 22 37
+/-1% FRONT_JD 23 38
C127 0.1uF 24 39
25V, Y5V, +80%/-20% R55 39.2K Ohm SURR_JD FRONT_R_HDR 25
+/-1%
C157 0.1uF +5VA 5V_SB_SYS 12V_SYS
25V, Y5V, +80%/-20%
SENSEB R4 0 +/-5% FRONT-IO-SENSE MIC1_L2 2
A
C1 0.1uF MIC1-JD 3
25V, Y5V, +80%/-20% D3 D5 4
SD103AW 1N4148W R8 10K R0603 +/-1% CEN_JD MIC1_R5 5
1
EMI Caps.
C
R7 5.1K +/-1% SIDESURR_JD CONN-JACK @3jack

R88
10
A +/-5% All JD resistors should be placed near CODEC A
U8 LM78L05ACZ-NOPB r0603h6
1 OUT IN 3
C84
25V, Y5V, +80%/-20%
C90
10V, Y5V, +80%/-20%
C107
GND
1
CD IN CD_IN * * * 4.7uF
25V,Y5V,+80/-20%
0.1uF
10uF
CD_IN_L C143 1uF 10V, Y5V, +80%/-20% 1 c0805h13

2
2
***
2 5
CD_GND C142 1uF 10V, Y5V, +80%/-20% 3
CD_IN_R C141 1uF 10V, Y5V, +80%/-20%

4 FOXCONN PCEG
Header_1X5 Title
hf2404e_p1h136
12V to 5V Power Regulator HDA Codec ALC883H/ALC888
C G33M03 A

5 4 3 2 1
5 4 3 2 1
Power On Strapping Options
SIOVREF
TMPIN2 R552 10K +/-1% SIOVREF Symbol value Description
C591 C581 RT2 DTR1#/JP1 1 Disable
1
R551
* 0.1uF
* 0.1uF 10K
(pin 121) Flashseg1_EN
25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20% 0 Flash I/F Address Segment1 is enable
30.1K
T +/-1%
+/-1% C0603 C0603 *
2
dummy dummy RTS1#/JP2 1 Disable VIDOUT pins(except VIDO6 & VIDO7)
(pin 122) VIDO_SEL
0 Enable VIDOUT pins
TMPIN1 R550 0
THERMDA 6
GND_IO placed near SIO SOUT1/JP3 CHIP_SEL
(pin 124) -- Chip selection in configuration.
C582 The output buffers of PCIRST1#, PCIRST2#, PCIRST3#, and PCIRST4# are
1
D D
* 3.3nF R549 0
THERMDC 6 1 enhanced open-drain. It will drive high about 10~20ns when the signal transits
50V, X7R, +/-10% DTR2#/JP4 BUF_SEL
2 C0603
(pin 1) from low to high, and then Hi-Z.
GND_IO GND_IO
CPU temperature sensing System temperature sensing 0 The output buffers are push-pull.
RTS2#/JP5 1 The default of EC index 15h/16h/17h is 00h
(pin 2) FAN_CTL_SEL
0 The default of EC index 15h/16h/17h is 40h
5V_SB_SYS SOUT2/JP6 1 The threshold voltage of VID is 2.0/0.8V
12V_SYS R553 30K R554 10K +/-1%
5V_SYS (pin 5) VID_ISEL
+/-1% 0 The threshold voltage of VID is 0.4/0.8V
VIN4 VTT_OUT_RIGHT 5V_SYS
RN35
1
* C584
0.1uF
*1 2
VIDO5
VIDO4 C516 C501 FB22
3 4 *
1
VIDO3
C0603 C534
* 0.1uF
* 0.1uF
2
5 6
1
VIDO2
25V, Y5V, +80%/-20%
7 8 * 0.1uF C0603 C0603 FB L0603 80 Ohm C577 C592 C578 C574
1
C0603 25V, Y5V, +80%/-20% 25V, Y5V, +80%/-20%
* 10uF
* 1uF
* 0.1uF
* 22uF
2
4.7K 25V, Y5V, +80%/-20% C0805 C0603 6.3V, X5R, +/-10%
2
+/-5% 8p4r0603h7 C0603 25V, Y5V, +80%/-20%
2
R557 10K +/-1% VIN2 VTT_OUT_RIGHT closed to pin99
3D3V_SYS
RN34
*
1 2
VIDO1 3D3V_SYS
1
C586 placed near pin4,35,99

* VIDO0 U29
35
99
67
3 4
4
0.1uF VIDO6
C0603 5 6 VIDO7
VCC
VCC
AVCC
VCCH
2
25V, Y5V, +80%/-20% 7 8

4.7K *R490
+/-5% 8p4r0603h7 DCDAJ 118 116 4.7K
RIAJ DCD1# PD7 PD7 31
119 RI1# PD6 115 PD6 31
5V_SYS R555 6.81K VIN3 CTSAJ 120 114
+/-1% R505 2.2K DTRAJ DTRAJ CTS1# PD5 PD5 31 SIO_PWRGD
5V_SYS 121 DTR1#/JP1 PD4 113 PD4 31
Parallel Port
R500 2.2K dummy RTSAJ Enable VIDOUT pins RTSAJ 122 112
C585 DSRAJ RTS1#/JP2 PD3 PD3 31
123 DSR1# PD2 111 PD2 31
1
C R556
10K * 0.1uF
C0603
5V_SYS R498
R496
2.2K
2.2K
DTRBJ
RTSBJ
SOUTA
SINA
124
125
SOUT1/JP3 PD1 110
109
PD1 31 3D3V_SYS
C
Serial Port 1/2

+/-1% 25V, Y5V, +80%/-20% @CLONE Fan half speed DCDBJ SIN1 PD0 PD0 31 RN51
126 108
2
DCD2#/GP67 STB# STBJ 31

R497
R495
680 dummy
680 @TF&FD
RIBJ
CTSBJ
127
128
RI2#/GP66 AFD# 107
106
AFDJ 31 *1 2
ICH_F_PLTRSTJ
ICH_PLTRSTJ
R488 680 DTRBJ CTS2#/GP65 ERR# ERRJ 31 3 4 ICH_S_PLTRSTJ
1 DTR2#/JP4 INIT# 105 INIT 31 5 6
RTSBJ 2 104 5V_SB_SYS
DSRBJ RTS2#/JP5 SLIN# SLINJ 31 7 8
3 DSR2#/GP64 ACK# 103 ACKJ 31
SOUTB 5 102 4.7K
SINB SOUT2/JP6 BUSY BUSY 31 +/-5% 8p4r0603h7
VCCP 6 SIN2/GP63 PE 101 PE 31
R559 10K +/-1% VIN0 100
5V_SYS IT8718F-S/GX-L SLCT SLCT 31 R560
VID_ISEL(0.4~0.8) R494 29 4.7K
GP16/SO
1
C588 5V_SYS
* 680 25
*
GP22/SCK/VGP1
Control
Power-on
0.1uF 3D3V_SYS R575 10K 24 78 R538 10K
C0603 RN47 GP23/SI/VGP2 PWROK2/GP41 R359 0
77
2
16 DDR_GPIO SUSC#/GP53 ICH_THRM_UP 6,19

25V, Y5V, +80%/-20% DSKCHGJ
*1 20 76 R537 0
SPI
2 5 VIDO5 VIDO5/GP27 PSON#/GP42 PS_ONJ 16,28
WPJ 21 75 R562 33+/-5%
3 4 5 VIDO4 VIDO4/GP26 PANSWH#/GP43 PBTNJ_SIO 28
INDEXJ 26 72
5 6 5 VIDO1 VIDO1/GP21/VGP0 PWRON#GP44 PWRBTNJ 19 power button input
TRAK0J 27 71
7 8 5 VIDO0 VIDO0/GP20 SUSB#
28
*
R558 10K +/-1% VIN1 150 5 VIDO6 VIDO6/GP17 R521 10K C580
1D8V_STR 5V_SYS
CIRTX
RESETCON#/CIRTX/CE_N
RSMRST#/CIRRX/GP55
30
85 CIRRX * 1uF
10V, Y5V, +80%/-20%
MISC.
51 66 IRTX C0603
DENSEL# IRTX/GP47
1
C587 VCCRTC_SIO
* 0.1uF RDATAJ R522 150
INDEXJ 63
52
INDEX#
MTRA#
IRRX/GP46
COPEN#
70
68 R561
IRRX
10M
C0603 R516 0 dummy 55 79 3D3V_SB
6,20 PECI
2
25V, Y5V, +80%/-20% r0603h6 +/-5% PECI/AMDSI_C/DRVB# GP40 R489 330

54 DRVA# 5V_SYS
3D3V_SYS 53 84 +-5%
20 SST SST/AMDSI_D/MTRB# PCIRST4#/GP10 HD_RST# ICH_S_PLTRSTJ 17,25
57 DIR# PCIRST3#/GP11 34 HD_RST# 34
Floppy I/F
58 STEP# PCIRST2#/GP12 33 ICH_PLTRSTJ 8,34
56 32 SIO_PWRGD R536
3D3V_SYS WDATA# PWROK1/GP13
*R503 *R508
10K TRAK0J
60
62
WGATE#
TRK0#
PCIRST1#/GP14/I_STPCLK 31 ICH_F_PLTRSTJ 33
3D3V_SYS
4.7K
10K WPJ 64 98 VIN0

RDATAJ WPT# VIN0 VIN1
61 RDATA# VIN1 97
59 96 VIN2
B A20GATE 20 HDSEL# VIN2 B
DSKCHGJ VIN3
*R499
10K
65 DSKCHG# VIN3/ATXPG
VIN4
95
94 VIN4 *R571
4.7K
SLP_S3J 19
KBRSTJ 20 VIN5/VID7 93 VID7 6
Hardware Monitoring
VIN6/VID6 92 VID6 6
19 PLTRSTJ 37 LRESET# VIN7/PCIRSTIN# 91
+12VCOM C59 1 20.1uF -12VCOM C80 1 20.1uF 38 90 SIOVREF
*
C0603 25V, Y5V, +80%/-20% C0603 25V, Y5V, +80%/-20% 19 L_DRQ0J LDRQ# VREF TMPIN1 C583
20,33 SERIRQ 39 SERIRQ TMPIN1 89
L_FRAMEJ TMPIN2
SERIAL PORT 1
SERIAL PORT 2
19,33 L_FRAMEJ L_AD0
40
41
LFRAME#
LAD0
TMPIN2
TMPIN3
88
87
* 1uF
10V, Y5V, +80%/-20%
C1511 20.1uF L_AD1 42 23 C0603
*
C0603 L_AD2 LAD1 VIDO2/FAN_TAC5/GP24 VIDO2 5 closed to pin 90

43 LAD2 VIDO3/FAN_TAC4/GP25 22 VIDO3 5
U3 D8 U13 L_AD3 44 12
LPC I/F
+12VCOM +12VCOM LAD3 FAN_CTL3/GP36 FANOUT3_CPU 27
5V_SYS 20 VCC +12V 1 C A 12V_SYS 5V_SYS 20 VCC +12V 1 4 CK_33M_SIO 47 PCICLK FAN_TAC3/GP37 11 FANIN3_CPU 27
5 VIDO7 48 VIDO7/GP50 FAN_CTL2/GP51 10 FANOUT2_SYS 27
RTSAJ 16 5 NRTSA 1N4148W RTSBJ 16 5 NRTSB 49 9
DTRAJ DA1 DY1 NDTRA DTRBJ DA1 DY1 NDTRB 4 CK_24M_SIO CLKIN FAN_TAC2/GP52 FANIN2_SYS 27
15 DA2 DY2 6 15 DA2 DY2 6 19 L_PMEJ 73 PME#/GP54 FAN_CTL1 8 FANOUT1_CPU 27
SOUTA 13 8 NSOUTA SOUTB 13 8 NSOUTB 7
RIAJ DA3 DY3 NRIAJ RIBJ DA3 DY3 NRIBJ FAN_TAC1 FANIN1_CPU 27
19 RY1 RA1 2 19 RY1 RA1 2 GP30/VID0 19 VID0 6
CTSAJ 18 3 NCTSAJ CTSBJ 18 3 NCTSBJ KBRSTJ 45 18
DSRAJ RY2 RA2 NDSRAJ DSRBJ RY2 RA2 NDSRBJ A20GATE KRST#/GP62 GP31/VID1 VID1 6
17 RY3 RA3 4 17 RY3 RA3 4 46 GA20/JP7 GP32/VID2 17 VID2 6
SINA 14 7 NSINA SINB 14 7 NSINB KBDATA 80 16
DCDAJ RY4 RA4 NDCDAJ DCDBJ RY4 RA4 NDCDBJ 31 KBDATA KBCLK KDAT/GP61 GP33/VID3 VID3 6
12 RY5 RA5 9 12 RY5 RA5 9 31 KBCLK 81 KCLK/GP60 GP34/VID4 14 VID4 6
D7 1N4148W MSDATA 82 13 VCCRTC_SIO
-12VCOM -12VCOM 31 MSDATA MSCLK MDAT/GP57 GP35/VID5 VID5 6
11 10 A C 11 10 83
KB/MS
GND -12V -12V_SYS GND -12V 31 MSCLK MCLK/GP56 5V_SYS
GNDA(D-)
69 IR
GD75232 GD75232 VBAT
VIDVCC 36 3D3V_SYS 1
GNDD
GNDD
GNDD
GNDD
C1501 20.1uF C579

*
C0603
* 1uF
10V, X5R, +/-10%
IRRX
3
4
CN2 220pF C0603 IRTX
15
50
74
117
86 5
*
NRIAJ 8P4C0603h12 CN9 220pF L_AD[3..0]

19,33 L_AD[3..0]
*
NDCDBJ 8p4c0603h12 5V_SYS Header_1X5_K2

COM2 HEADER
NCTSAJ 50V, NPO, +/-10% COM1 CP10 H5MO2
10 NSOUTB 2 1 @CLONE&FD
NDSRAJ dummy COM2
5 NSINB COPPER
NRTSA NRIAJ 9 NDCDBJ 1 2 NSINB C518
NDTRA NDTRB NSOUTB NDTRB
A
CN1 220pF NCTSAJ
4
8
3
5
4
6 NDSRBJ
GND_IO 0.1uF
25V, Y5V, +80%/-20% * A
*
NDTRA 8P4C0603h12 NSOUTA 3 CN8 220pF NRTSB 7 8 NCTSBJ RN36 C0603 CIR
*
NSINA
NRTSA
NSINA
50V, NPO, +/-10%
7
2
NRTSB 8p4c0603h12 NRIBJ 9 X VIDO5
VIDO4
*1 2
VID5
VID4
1
X
2
4 CIRRX
NDSRAJ NDSRBJ dummy VIDO3 3 4 VID3 IRRX
6 5 6 5 6
NSOUTA NDCDAJ 1 Header_2X5_K10 3D3V_SYS VIDO2 VID2 7 8 CIRTX
NCTSBJ 510-90-10GU02 7 8 dummy IRTX 9 X
NDCDAJ 11 4.7K
NRIBJ +/-5% 8p4r0603h7 Header_2X5_K3K10
FOXCONN PCEG
1
C500
CONN-COM PORT
* 0.1uF VIDO1
RN32
*1 2
VID1 C541 C558
@TF
VIDO0 VID0
C0603 470pF
* * 470pF Title
2
25V, Y5V, +80%/-20% VIDO6 3 4 VID6 50V, X7R, +/-10% 50V, X7R, +/-10%
dummy VIDO7 5 6 VID7 C0603 C0603 Super I/O IT8718F
7 8 dummy dummy dummy Size Document Number Rev
4.7K
+/-5% 8p4r0603h7
C G33M03 A

5 4 3 2 1
5 4 3 2 1
D D
C138 C185 C158

* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
C0603 C0603 C0603
12V_SYS
3D3V_SB 3D3V_SYS 12V_SYS EC9
1
12V_SYS 3D3V_SYS 470uF
16V, +/-20%
ce35d80h125
2
PCI-E1_1X
C B1 12V PRSNT1# A1 C
B2 12V 12V A2
B3 RSVD_1 12V A3
B4 GND GND A4
12,14,16,17,19,26,27,29 SMB_CLK_RESUME B5 SMCLK JTAG2 A5
12,14,16,17,19,26,27,29 SMB_DATA_RESUME B6 SMDAT JTAG3 A6
B7 GND JTAG4 A7
B8 3.3V JTAG5 A8
B9 JTAG1 3.3V A9
B10 3.3VAUX 3.3V A10
17,19 WAKEJ B11 WAKE# PWRGD A11 ICH_S_PLTRSTJ 17,24
KEY
B12 RSVD_2 GND A12

B13 GND REFCLK+ A13 CK_PE_100M_P_1PORT 4
19 HSO_P4_SLOT B14 HSOP0 REFCLK- A14 CK_PE_100M_N_1PORT 4
19 HSO_N4_SLOT B15 HSON0 GND A15
B16 GND HSIP0 A16 HSI_P4 19
B17 PRSNT2# HSIN0 A17 HSI_N4 19
B18 GND GND A18
PCIE-X1_SLOT
PCIE36_X1
PCI-E x1 Slot 1

B B
C137 C164 C166

* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
C0603 C0603 C0603
12V_SYS
EC11
1
470uF
16V, +/-20%
ce35d80h125
A A
FOXCONN PCEG
Title
PCI Express x1 Slot
C G33M03 A

5 4 3 2 1
5 4 3 2 1
5V_SYS 5V_SYS
3D3V_SYS 3D3V_SYS 3D3V_SYS 3D3V_SYS
-12V_SYS 5V_SYS 12V_SYS -12V_SYS 5V_SYS 12V_SYS
Note: 20-24 mils PCI1 Note: 20-24 mils PCI2

B1 -12V TRST# A1 B1 -12V TRST# A1
B2 TCK +12V A2 B2 TCK +12V A2
B3 GND1 TMS A3 B3 GND1 TMS A3
B4 TDO TDI A4 B4 TDO TDI A4
D
B5 +5V1 +5V2 A5 B5 +5V1 +5V2 A5 D
B6 A6 INTAJ INTAJ 21 B6 A6 INTBJ
INTBJ +5V3 INTA# INTCJ INTCJ +5V3 INTA# INTAJ
21 INTBJ B7 INTB# INTC# A7 INTCJ 21 B7 INTB# INTC# A7
21 INTDJ INTDJ B8 A8 INTDJ B8 A8
INTD# +5V4 3D3V_SB INTD# +5V4 3D3V_SB
B9 PRSNT1# RSV1 A9 B9 PRSNT1# RSV1 A9
B10 RSV2 +5V5 A10 B10 RSV2 +5V5 A10
B11 PRSNT2# RSV3 A11 B11 PRSNT2# RSV3 A11
B12 GND2 GND3 A12 B12 GND2 GND3 A12
B13 GND4 GND5 A13 B13 GND4 GND5 A13
B14 RSV4 SB3V A14 B14 RSV4 SB3V A14
B15 A15 B15 A15 PCIRSTJ
GND6 RESET# PCIRSTJ 21,29,35 GND6 RESET#
4 CK_33M_PCI1 B16 CLK +5V6 A16 4 CK_33M_PCI2 B16 CLK +5V6 A16
B17 GND7 GNT# A17 GNT0J 21 B17 GND7 GNT# A17 GNT1J 21
PREQ0J B18 A18 PREQ1J B18 A18
REQ# GND8 REQ# GND8 PMEJ
B19 +5V7 PCI_PME# A19 PMEJ 21,29,35 B19 +5V7 PCI_PME# A19
AD31 B20 A20 AD30 AD31 B20 A20 AD30
AD29 AD(31) AD(30) AD29 AD(31) AD(30)
B21 AD(29) +3.3V1 A21 B21 AD(29) +3.3V1 A21
B22 A22 AD28 B22 A22 AD28
AD27 GND9 AD(28) AD26 AD27 GND9 AD(28) AD26
B23 AD(27) AD(26) A23 B23 AD(27) AD(26) A23
AD25 B24 A24 AD25 B24 A24
AD(25) GND10 AD24 AD(25) GND10 AD24
B25 +3.3V2 AD(24) A25 B25 +3.3V2 AD(24) A25
CBEJ3 B26 A26 IDSEL1 CBEJ3 B26 A26 IDSEL2
21,29,35 CBEJ3 C/BE#(3) IDSEL C/BE#(3) IDSEL
AD23 B27 A27 AD23 B27 A27
AD(23) +3.3V3 AD22 AD(23) +3.3V3 AD22
B28 GND11 AD(22) A28 B28 GND11 AD(22) A28
AD21 B29 A29 AD20 AD21 B29 A29 AD20
AD19 AD(21) AD(20) AD19 AD(21) AD(20)
B30 AD(19) GND12 A30 B30 AD(19) GND12 A30
B31 A31 AD18 B31 A31 AD18
AD17 +3.3V4 AD(18) AD16 AD17 +3.3V4 AD(18) AD16
B32 AD(17) AD(16) A32 B32 AD(17) AD(16) A32
B33 A33 CBEJ2 B33 A33
C/BE#(2) +3.3V5 FRAMEJ C/BE#(2) +3.3V5 FRAMEJ
21,29,35 CBEJ2 B34 GND13 FRAME# A34 FRAMEJ 21,29,35 B34 GND13 FRAME# A34
IRDYJ B35 A35 IRDYJ B35 A35
21,29,35 IRDYJ IRDY# GND14 IRDY# GND14
B36 A36 TRDYJ B36 A36 TRDYJ
+3.3V6 TRDY# TRDYJ 21,29,35 +3.3V6 TRDY#
DEVSELJ B37 A37 DEVSELJ B37 A37
21,29,35 DEVSELJ DEVSEL# GND15 DEVSEL# GND15
B38 A38 STOPJ B38 A38 STOPJ
GND16 STOP# STOPJ 21,29,35 GND16 STOP#
LOCKJ B39 A39 LOCKJ B39 A39
21 LOCKJ LOCK# +3.3V7 LOCK# +3.3V7
PERRJ B40 A40 PERRJ B40 A40 SMB_CLK_RESUME
21,29,35 PERRJ PERR# SDONE SMB_CLK_RESUME 12,14,16,17,19,25,27,29 PERR# SDONE
B41 A41 B41 A41 SMB_DATA_RESUME
+3.3V8 SBO# SMB_DATA_RESUME 12,14,16,17,19,25,27,29 +3.3V8 SBO#
SERRJ B42 A42 SERRJ B42 A42
21,29 SERRJ SERR# GND17 SERR# GND17
C B43 A43 PAR B43 A43 PAR C
+3.3V9 PAR PAR 21,29,35 +3.3V9 PAR
CBEJ1 B44 A44 AD15 CBEJ1 B44 A44 AD15
21,29,35 CBEJ1 AD14 C/BE#(1) AD(15) AD14 C/BE#(1) AD(15)
B45 AD(14) +3.3V10 A45 B45 AD(14) +3.3V10 A45
B46 A46 AD13 B46 A46 AD13
B47 AD(12) AD(11) A47 B47 AD(12) AD(11) A47
AD10 B48 A48 AD10 B48 A48
AD(10) GND19 AD9 AD(10) GND19 AD9
B49 GND20 AD(9) A49 B49 GND20 AD(9) A49
AD8 B52 A52 CBEJ0 AD8 B52 A52 CBEJ0

AD(8) C/BE#(0) CBEJ0 21,29,35 AD(8) C/BE#(0)
AD7 B53 A53 AD7 B53 A53
AD(7) +3.3V11 AD6 AD(7) +3.3V11 AD6
B54 +3.3V12 AD(6) A54 B54 +3.3V12 AD(6) A54
AD5 B55 A55 AD4 AD5 B55 A55 AD4
AD3 AD(5) AD(4) AD3 AD(5) AD(4)
B56 AD(3) GND21 A56 B56 AD(3) GND21 A56
B57 A57 AD2 B57 A57 AD2
B58 AD(1) AD(0) A58 B58 AD(1) AD(0) A58
B59 +5V8 +5V9 A59 B59 +5V8 +5V9 A59
ACK64J B60 A60 REQ64_1J ACK64J B60 A60 REQ64_2J
ACK64# REQ64# ACK64# REQ64#
B61 +5V10 +5V11 A61 B61 +5V10 +5V11 A61
B62 +5V12 +5V13 A62 B62 +5V12 +5V13 A62
Slot,PCI CONN Slot,PCI CONN
AD[31..0]
AD[31..0] 21,29,35
5V_SYS 3D3V_SYS -12V_SYS

12V_SYS IDSEL1 R178 330 AD16
IDSEL2 R175 330 AD17

B B
C148 C147 EC20 C131
*
EC47
470uF * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
* 470uF
16V, +/-20% * C204
0.1uF * 0.1uF
25V, Y5V, +80%/-20%
16V, +/-20% C0603 C0603 25V, Y5V, +80%/-20% C0603
C0603
5V_SYS
3D3V_SYS
3D3V_SYS
RN23
*1 2
INTBJ
INTCJ
INTBJ
INTCJ
21
21
R233 2.7K REQ64_1J
C252
3 4
1
INTDJ REQ64_2J
5
7
6
8
INTAJ
INTDJ
INTAJ
21
21
R229 2.7K
* 0.1uF
25V, Y5V, +80%/-20%
C0603
2
8.2K R224 2.7K ACK64J
RN12
*1 2
INTHJ
INTHJ
PREQ0J
21 PCI Slot
21
EMI cap, placed near PCI Slot
for 33M clock layer change
3 4 3D3V_SYS
5 6 PREQ3J 21,35
INTEJ
7 8 INTEJ 21,35
RN17
8.2K
*1 2
STOPJ
LOCKJ
RN11 3 4 PERRJ
5 6
*1 2 INTFJ
PREQ2J
INTFJ
21,29
21
7 8
SERRJ
3 4 8.2K
A A
5 6 PREQ1J 21
INTGJ 5V_SYS 5V_SYS 5V_SYS
7 8 INTGJ 21,29
8.2K
RN16 C146 C291 C144
1
1
*1 2
FRAMEJ
IRDYJ * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
3 4 TRDYJ C0603 C0603 C0603
2
2
5 6 DEVSELJ
7 8
8.2K FOXCONN PCEG
Placed near EC9 Placed DIMM4 Placed near Codec Title
PCI Slot
EMI CAP. C
G33M03 A

5 4 3 2 1
5 4 3 2 1
5V_SYS
D D
12V_SYS
12V_SYS
R210
4.7K
+/-5%
C
D9
R209 100 1N4148W
24 FANOUT2_SYS
SM Bus Bridge r0603h6 +/-5% R199

3.3K
SOD123A
SYS_FAN1
A
4 4
15K R208 3 3
3D3V_SB 24 FANIN2_SYS
2 2
C246 R205 1 1
1
470pF
* 6.2K C229
1
50V, NPO, +/-5%
C0603
0.1uF
25V, Y5V, +80%/-20% * Header_1X4(FAN4P)
2
dummy C0603
2
3D3V_SYS R119 2.7K SMB_DATA_RESUME
use another values for SIO AFSC

R128 2.7K SMB_CLK_RESUME
R126 8.2K SMB_DATA_MAIN

dummy System FAN 1
R127 8.2K SMB_CLK_MAIN
dummy
R122 0
4,33 SMB_DATA_MAIN SMB_DATA_RESUME 12,14,16,17,19,25,26,29
C C
for Clock Generator/TPM

for PCI-E x16/ICH9/LAN/PCI/PCI-E x1/Fox one
R125 0
4,33 SMB_CLK_MAIN SMB_CLK_RESUME 12,14,16,17,19,25,26,29
5V_SYS 5V_SYS
R568 R579
4.7K 4.7K
+/-5% +/-5%
r0603h6 r0603h6
R370 100 dummy
24 FANOUT1_CPU
r0603h6 +/-5% 12V_SYS
C455
* 1nF
50V, X7R, +/-10%
C0603
B B
5V_SYS R417
1K
-0.05
R413 r0603h6 R409
4.7K 12V_SYS @CLONE&TF 0
+/-5% +/-5%
@CLONE&TF U32 r0805h6
R415 1 8 @FD
15K OUT1 V+ 12V_SYS
24 FANOUT3_CPU 2
S
r0603h6 +/-5% IN1- @CLONE&TF R420

3 IN1+ OUT2 7
@CLONE&TF 5 470 G
IN2+ +/-5%
4 V- IN2- 6
r0603h6 AP3310H
C
Q26 R369 D11
LM358A @CLONE&TF 3.3K 1N4148W
D
* C451
10uF
@CLONE&TF SOD123A
@CLONE&TF
A
R416 36K R493 0
CPU FAN FANIN3_CPU 24
*
+/-5% r0603
@CLONE&TF r0603h6 CPU_FAN
4 4 F-3 F-3 15K R367
3 3 F-2 FANIN1_CPU 24
R421 2 2
22K 1 1 C384 R366
1
+/-1% C376 EC28 470pF
* 6.2K
1
r0603h6
@CLONE&TF for 3 PIN smart FAN
Header_1X4(FAN4P)
* 0.1uF
25V, Y5V, +80%/-20%
* 100uF
16V, +/-20%
50V, NPO, +/-5%
C0603
2
C0603 CE20D50H110 dummy

2
4-pin FAN Header Definition

A A
pin1. GND
pin2. +12V
pin3. Sense
pin4. Control
Peak fan current draw: 1.5A

Average fan current draw: 1.1A FOXCONN PCEG
Fan start-up current draw: 2.2A Title
Fan start-up current draw maximum duration: 1.0 second CPU / System Fan
Fan header voltage: 12V +/- 10% Size Document Number Rev
C G33M03 A

5 4 3 2 1
5 4 3 2 1
5V_SB_SYS
-12V_SYS 3D3V_SYS 3D3V_SYS 12V_SYS 5V_SB_SYS 5V_SYS

R512
4.7K 5V_SYS
5V_SYS PWR1
13
14
+3.3V3 +3.3V1 1
-12V +3.3V2 2
*R511
10K
15 GND4 GND1 3
16,24 PS_ONJ 16 PSON +5V1 4
D
17 GND5 GND2 5 D
18 GND6 +5V2 6
19 GND7 GND3 7
C538 20 RSVD PWR0K 8 ATXPWRGD 16
* 0.1uF
25V, Y5V, +80%/-20%
21
22
+5V3 +5V_AUX 9
+5V4 +12V_1 10
C0603 23 C536
+5V5 +12V_2 11
24 GND8 +3.3V4 12 * 0.1uF
25V, Y5V, +80%/-20%
HM1512E-EP1 C0603
CLR_CMOS(2-3)
3D3V_SYS 5V_SB_SYS
C214 C540 C535 Jumper
1
* 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
C0603 C0603 C0603
2
Clear CMOS
5V_SYS CLR_CMOS CLR_CMOS CMOS
1 1
-12V_SYS 12V_SYS 2
C533 19,20 RTCRSTJ 2
3 3 Clear (1-2)
C539 C551 C515
* 0.1uF
1
0.1uF
* 25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20% * 0.1uF
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
C0603
Header_1X3 Normal (2-3) Default
C0603 C0603 C0603
2
R110
C 1K C
Chassis Intruder Header

INTR
19 INTRUDERJ 1
2
Header_1X2
@CLONE
SPEAKER HEADER
SPEAKER
1 1
5V_SYS
3 3
4 4 @CLONE
Header_1X3
RN14 BUZ
*1 2 +
3 4
BUZZER
5 6
B 7 8 - B
100 Ohm Buzzer
5V_SYS 5V_SB_SYS
C
R149 2.2K B Q17 C176
19,23 SPKR MMBT3904_NL
5V_SYS 3D3V_SB
* 0.1uF
25V, Y5V, +80%/-20%
E
R547 R572 C0603
330 330
R518 R524 dummy
330 8.2K
FP1
1 2 PUSLED 16
HDD_LED 3 4
20 HDD_LED
5 6 PBTNJ_SIO 24
4,6,19 FP_RSTJ 7 8
9 X C589
1
C593
* 470pF
1
C548 C562
Header_2X5_K10
* 470pF
50V, X7R, +/-10%
50V, NPO, +/-5%
C0603
5V_SYS
2
* 470pF
* 470pF C0603 dummy
2
50V, X7R, +/-10% 50V, X7R, +/-10% dummy 1 1

C0603 C0603 2 2
dummy dummy
IMPEDANCE_1 IMPEDANCE_2
Header_1X2 Header_1X2
T1 T1
A dummy dummy A
Front Panel Switch/LED

HD_LED+ 1 2 Power
HD_LED- 3 4 Power LED(Green)
GND 5 6 Power button
Reset button 7 8 Power
NC 9 10 Key FOXCONN PCEG
Title
Power / MISC Connectors
C G33M03 A

5 4 3 2 1
5 4 3 2 1
PCI LAN RTL8010S/8110SC
LAN_LINK_UP 30 R80 0
LINK_100_C 30 r0603h6 +/-5%
LINK_1000 30 3D3V_SB
VDD33 R79 0
stuff 10K for 93C56 LAN EEPROM VDD33 r0603h6 +/-5%
PIN127[RSET]: 5.6K for 8100C VDD33
R72 10K+/-5%
2.49K for 8110S r0603h6 dummy U9 AT93C46-2.7V Update 03/09/07
NEAR XTAL LAN_X1 LAN_EECS 1 8100C install
CS VCC 8
1
D VDD33 D
R67 LAN_X2
LAN_EESK
LAN_EEDI
2
3
SK NC 7
ORG 6
* C92
8100C install R32 FOR RTL8110SC ONLY 8110SC dummy
FOR 8100C DUMMY
*
0 LAN_EEDO DI 0.1uF DVDD V_12P

4 GND 5
2
+/-5% CLK_25M_LAN 4 DO C0603 @8100C
*
LAN_LINK_UP
r0603h6 DVDD_A CTRL25 R38 0 +/-5% DVDD_A R2 0 @8100C
LINK_100_C
E
R44 2.49K LAN_RSET r0603h6 +/-5% r0603h6
LINK_1000
1
VDD33
LAN_X1 @8110S +/-1% r0603h6 CTRL18 R39 0 Q2
* C32
DVDD_A
B
CTRL18
AD0
AD1
R46 R85 3.6K R416 use 3.6k for 3.3v Voltage. r0603h6 +/-5% BCP69T1G R32 0.1uF
*
LAN_X2 0 dummy AVDDH R0603 +/-1% DVDD 5.6k for 5v voltage @8110S 0 C0603
2
+/-5% r0805h6
4
C
X1r0603h6 8110SC install +/-5% Place at pin 24,32,45,54,64,78,99,110,116
+/-50PPM 1 2 @8110S
8110SC install R813,Do not install R812
1
XTAL-25MHz
* C101
* C76
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
1
1
C54 * X2O
dummy * C66
22pF
U5
6.3V, X5R, +/-20%
10uF
C0805
0.1uF
C0603 * C27
0.1uF * C25
0.1uF * C55
0.1uF * C82
0.1uF * C111
0.1uF * C120
0.1uF * C123
0.1uF * C99
0.1uF
2
22pF dummy AVDDL dummy C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603
NC26
NC27
XTAL2
XTAL1
NC25
NC24
LED0
NC23
LED1
LED2
NC22
NC21
EESK
NC20
EEDO
VDD33
EECS
LWAKE
AD0
AD1
GND
RSET
GND
GND
GND
AUX/EEDI
2
2
dummy dummy dummy dummy
MX0+ 1 102 AD2

30 MX0+ MX0- TX+ AD2 VDD33
30 MX0- 2 101 8100C 2.5V Control Q13 8100C DUMMY
TX- GND
3 AVDD33 GND 100 8110SC 1.5V Control 8110SC INSTALL
4 99
E
MX1+ GND VDD25 AD3
RTL8100C DUMMY 30 MX1+ 5 RX+ AD3 98 8100C install
5V_SYS MX1- 6 97 AD4 CTRL25 B Q1 8110SC Dummy 8100C Dummy
RTL8110SC INSTALL30 MX1-
7
RX- AD4
96 AD5 BCP69T1G 3.3V 8110SC install
CTRL25 AVDD33 AD5 AD6 @8110S
8 CTRL25 AD6 95
R11 9 94 AVDDL VDD33 Place at pin AVDDH
4
C
1K NC1 VDD33 AD7 Place at pin 3,7,16,20
10 93 10,120
*
*
-0.05 3D3V_SB R17 0 @8110S NC2 AD7 CBEJ0 R27 0 @8100C R66 0
11 NC3 CBEB0 92 CBEJ0 21,26,35
r0603h6 r0603h6 +/-5% V_12P 12 91 r0603h6 +/-5% r0603h6 +/-5%
*
R16 0 @8110S AVDD25 GND AD8 @8110S

13 NC4 AD8 90
1
C C
LAN_ISO r0603h6 +/-5% MX2+ 14 89 AD9
* * * * * * * C39
* C57
* C33
RTL8110SC-GR
30 MX2+ MX2- NC5 AD9 C9 C35 C34 C31 C28 C10 0.1uF 0.1uF 0.1uF
30 MX2- 15 NC6 NC19 88
R31 16 87 AD10 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C0603 C0603 C0603
2
15K NC7 AD10 AD11 C0805 C0603 C0603 C0603 C0603 C0603 dummy dummy
8110SC install 17 GND AD11 86
+/-5% MX3+ 18 85 AD12 dummy dummy dummy
r0603h6 30 MX3+ MX3- NC8 AD12 6.3V, X5R, +/-20%
30 MX3- 19 NC9 VDD33 84
20 83 AD13
AVDD33(REG) AD13 AD14 VDD33
21 GND AD14 82
22 NC10 GND 81 Place at pin 26,41,56,71,84,94,107
LAN_ISO 23 80
ISOLATEB GND AD15
24 NC11 AD15 79
1
Update 03/09/07 21,26 INTGJ R30
r0603h6
100
+/-5%
25
26
INTAB
VDD33
VDD25
CBEB1
78
77 CBEJ1
CBEJ1 21,26,35
* C26 * C50 * C94 * C119 * C121* C122 * C115 * C46
27 76 PAR 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
21,26,35 PCIRSTJ
2
PCIRSTB PAR SERRJ PAR 21,26,35 C0603 C0603 C0603 C0603 C0603 C0603 C0603 C0603
4 CK_33M_LAN 28 75
**
PCICLK SERRB R98 SERRJ
0 dummy 21,26 dummy dummy
21 GNT2J 29 GNTB NC18 74 SMB_DATA_RESUME 12,14,16,17,19,25,26,27
21,26 PREQ2J 30 73 +/-5% r0603h6
PMEJ REQB NC17 R97 0 dummy
31 PMEB NC16 72 SMB_CLK_RESUME 12,14,16,17,19,25,26,27
21,26,35 PMEJ 32 71 +/-5% r0603h6
AD31 VDD25 VDD33 PERRJ
33 AD31 PERRB 70 PERRJ 21,26,35
AD30 34 69 STOPJ
AD30 STOPB DEVSELJ STOPJ 21,26,35
35 GND DEVSELB 68 DEVSELJ 21,26,35
AD29 36 67 TRDYJ
AD28 AD29 TRDYB TRDYJ 21,26,35
37 AD28 GND 66
38 65
FRAMEB
GND CLKRUNB
CBEB3
CBEB2
VDD33
VDD25
VDD33
IRDYB
IDSEL
NC12
NC13
NC14
NC15
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
GND
GND
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
HHPN
AD[31..0]
B AD[31..0] 21,26,35 B
8110SC 21-02900053-00-G 1G RTL8100C RTL8110SC
8100C 21-02900028-00-G 10/100M
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
@8110S
MX3+
MX2+
MX1+
MX0+
AVDDH 3.3AVDD
MX3-
MX2-
MX1-
MX0-
IRDYJ N/A
IDSEL =18 FRAMEJ IRDYJ 21,26,35
FRAMEJ 21,26,35
MASTER = PREQ#2 CBEJ3 CBEJ2 R12 R13 R14 R15 R18 R19 R20 R21 V_12P 2.5AVDD 3.3AVDD
21,26,35 CBEJ3 CBEJ2 21,26,35 49.9 49.9 49.9 49.9 49.9 49.9 49.9 49.9
INT = G +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% +/-1% 1.8AVDD
AD18 R52 100 LAN_IDSEL r0603h6 r0603h6 r0603h6 r0603h6 r0603h6 r0603h6 r0603h6 r0603h6
AVDDL 3.3AVDD
r0603h6 +/-5% LINK_1000 dummy dummy dummy dummy @8100C @8100C @8100C @8100C
LAN_LINK_UP
V_DAC N/A N/A
LINK_100_C DVDD 2.5VDD 1.5VDD

C81 C62 C91
1
* 0.1uF
C0603 * 0.1uF
C0603 * 0.1uF
C0603 C3 C4 C5 C6 DVDD_A N/A 1.5AVDD
1
1- MDIO+ & MDIO- pairs should be dummy dummy dummy
* 0.1uF
* 0.1uF
* 0.1uF
* 0.1uF
2
100-ohm differential impedance. C0603 C0603 C0603 C0603

Route equal length and dummy dummy @8100C @8100C
2
symmetrically. Separate every
pairs. Update 03/09/07
A A
FOXCONN PCEG
Title
LAN-BCM5789
Custom G33M03 A

5 4 3 2 1
5 4 3 2 1
BACK PANEL ( LAN + 2 USB Connector ) Stuff if OC resistor divider unstuff.

D USE CONNECTOR(Foxconn P/N: JFM38U1A-21U5-4N) WITH GIGABIT DESIGN D
AVDDL
3D3V_SB
SPEED LED
3D3V_SB R576 8100 Dummy 5V_DUAL_USB
LINK 10M OFF 0
dummy 8110 Install * R90
10K
LINK 100M GREEN +/-5%
r0603h6
LINK 1000M YELLOW R87
330 * C105
10nF
dummy
-0.05 25V, X7R, +/-10% R89 10K

USB_OCJ_BACK_LAN 19
r0603h6 C0603
@8110S Update 03/09/07
*
R91 C118
LINK_1000
29 LINK_1000 CONN-USBx2_RJ45 F3
Fuse 1.5A
15K
* 0.1uF
25V, Y5V, +80%/-20%
LANUSBPWR C0603
LINK_100_C
29 LINK_100_C
27
C106 C114 22 28
GRN_LED
YLW_LED
470pF
50V, X7R, +/-10% * * 470pF
50V, X7R, +/-10%
21 29 L6
USB-2
USB-1
30 1 2
C0603 C0603
2
4 3
9 1
10 5 120 Ohm@100MHz
29 MX0+
11 dummy
29 MX0-
RJ45-MJ2
12 2 R58 0
29 MX1+ USBP7N 19
29 MX1- 13 6
14 R53 0
29 MX2+ USBP7P 19
29 MX2- 15 3
29 MX3+ 16 7
29 MX3- 17
C R573 0 18 4 R71 0 C
3D3V_SB USBP6N 19
8
@8110S R60 0
USBP6P 19
GRN_LED
Update 03/09/07
20 23 EC7 C104
1
R82
330
19 24
25
* 470uF
6.3V, +/-20% * 470pF
50V, X7R, +/-10% 1
L7
2
-0.05 26 CE25D60H110 C0603
2
r0603h6 4 3
NIC_USB 120 Ohm@100MHz

@8110S dummy
LAN_LINK_UP
29 LAN_LINK_UP Place as close as possible
C102 C103 to USB connector.
1
1
470pF
50V, X7R, +/-10% * * 470pF
50V, X7R, +/-10% ACTIVE LED
C0603 C0603
GREEN = LINK UP
2
5V_DUAL_USB
BLINKING = TX/RX ACTIVITY
U6
USBP6N 1 6 USBP6P
LANUSBPWR
3D3V_SB 2 5
*
3D3V_SB 5V_DUAL_USB
F2 USBP7N 3 4 USBP7P
Fuse 1.5A
IP4220CZ6
*
R94
10K
* R84
10K
* F4
+/-5% +/-5% Fuse 1.5A U7
r0603h6 r0603h6
dummy dummy USBP9N 1 6 USBP9P
BACKUSBPWR1
R93 10K BACKUSBPWR1 R83 10K BACKUSBPWR2 2 5
B 19 USB_OCJ_BACK1 19 USB_OCJ_BACK2 B
EC3 C113 EC8 USBP8N 3 4 USBP8P
1
C117 R95 * 470uF

* 470pF C112 R75 * 470uF
0.1uF
25V, Y5V, +80%/-20% * 15K 6.3V, +/-20%
CE25D60H110
50V, X7R, +/-10%
C0603
0.1uF
25V, Y5V, +80%/-20% * 15K 6.3V, +/-20%
CE25D60H110
IP4220CZ6
2
C0603 C0603
U4
USBP11N 1 6 USBP11P
BACKUSBPWR2
2 5
R86 0 USB8N USBP10N 3 4 USBP10P

19 USBP8N R81 0 USB8P USB
U10 19 USBP8P
MX0- MX0- L9 IP4220CZ6
1 8 BACKUSBPWR1
1 2 41 VCC1
MX0+ MX0+ USB8N 42
2 7 USB8P USB0-
4 3 43
MX1-
3 6
MX1-
120 Ohm@100MHz
dummy 44
USB0+
GND1 UP
MX1+ MX1+
4 5 R73 0 USB9N
@TF SLVU2.8-4.TBT 19 USBP9N R68 0 USB9P
19 USBP9P 31 VCC2
USB9N 32
L8 USB9P USB1-
33
MX2-
U11
MX2-
1 2 34
USB+
GND2 Second
1 8
4 3
MX2+ MX2+
2 7 120 Ohm@100MHz BACKUSBPWR2 21 VCC3
MX3- MX3- dummy USB10N 22
MX3+
3 6
MX3+ R47 0 USB10N
USB10P 23
24
USB2-
USB2+ Third
4 5 19 USBP10N R48 0 USB10P GND3
@TF SLVU2.8-4.TBT 19 USBP10P L5
1 2 GND5 45
11 VCC4 GND6 46
A 4 3 USB11N 12 47 A
Add ESD protection IC U65,U66 for 120 Ohm@100MHz

dummy USB11P 13
14
USB3-
USB3+ Down GND7
GND8 48
49
GND4 GND9
50
TF SPEC R36 0 USB11N GND10
19 USBP11N R37 0 USB11P
19 USBP11P CONN-USBx4
L4
1 2
4 3 FOXCONN PCEG
120 Ohm@100MHz Title
dummy
LAN / USB Connectors
Place as close as possible Size Document Number Rev
to USB connector. C G33M03 A

5 4 3 2 1
5 4 3 2 1
LANUSBPWR
LANUSBPWR
D D
1
CP1 FB13
RN8 COPPER 300 Ohm@100MHz
2
4
6
8
*
2.2K dummy
2
* 13
5
7
KB/MS
1 2 16
CP4 COPPER 13
FB16 CLK_NET03
24 KBCLK
80 Ohm@100MHz* dummy
5
3
11
9
1 7
2 17
1 2 4 8
CP5 COPPER 6 10
12
FB17
24 KBDATA
80 Ohm@100MHz * dummy
14
UP DOWN 15
1 2 PS2X2
CP2 COPPER PWR_NET02 ps2x2h286
FB14 CLK_NET02
24 MSCLK
5V_SYS
D2 1 2
C C A CP3 COPPER C63 C60 C
1
C93
* 0.1uF
* 0.1uF
1
SD103AW
* 0.1uF
25V, X7R, +/-10%
24 MSDATA
FB15
16V, Y5V, +80%/-20%
C0603
16V, Y5V, +80%/-20%
C0603
2
RN4 2K C0603
2
INIT1-
8 7 P_D2
6 5 For EMI issue
SLIN1-
4 3 * P_D3
2 1
*
*
BCN1
RN2 RN1 R59 180pF
7
5
3
1
7
5
3
1
RN6 2K 2K 50V, NPO, +/-10%

8 7
P_D4
2K 2K
* 8p4C0603h12
8
6
4
2
8
6
4
2
P_D5
6 5 P_D6
4 3 * P_D7
2 1
RN5 22
AFD1-
P_D0
STB-
P_D1
24 PD3 *1 2
P_D3
SLIN1-
24 SLINJ 3 4 P_D2
24 PD2 5 6 INIT1-
24 INIT 7 8
RN7 22
24 PD7 *1 2
P_D7
P_D6
24 PD6 3 4 P_D5
24 PD5 5 6 P_D4
24 PD4 7 8
24 ERRJ RN3 22
24 AFDJ *1 2
24 PD0 3 4
24 STBJ 5 6
B 24 PD1 7 8 B
PRT PORT 3D3V_SYS
PRT
STB- 1
AFD1- 14
P_D0 2
ERRJ 15 C273 C396 C393
1
P_D1
INIT1-
3
16
* 10nF
25V, Y5V, +80%/-20% * 10nF
25V, Y5V, +80%/-20% * 10nF
25V, Y5V, +80%/-20%
P_D2 4
2
SLIN1- 17
P_D3 5
18
P_D4 6
19
P_D5 7 28
20 27
P_D6 8 26
21
P_D7 9
22
ACKJ 10
24 ACKJ
23
BUSY 11
24 BUSY
24
PE 12
24 PE
25
SLCT 13
24 SLCT
CONN-D-SUB
A dsub2f25kh320 A
50V, X7R, +/-20%

* 8P4R0603* * *
1
CN6
220pF 220pF
C65
220pF * CN7
220pF
CN3
220pF
8P4R0603 CN4 C0603 8P4R0603 8P4R0603
FOXCONN PCEG
2
50V, X7R, +/-20% 50V, NPO, +/-5% 50V, X7R, +/-20% 50V, X7R, +/-20%
Title
Parallel Port
C G33M03 C

5 4 3 2 1
5 4 3 2 1
D D
5V_DUAL_USB
*
Stuff if OC resistor divider unstuff.
F7
Fuse 1.5A
3D3V_SB
R393
10K
dummy
R396 10K
USB_OCJ_FRONT_3 19
R397
15K * C408
0.1uF
25V, Y5V, +80%/-20%
C0603
EC29 C413
* 470uF
16V, +/-20% * 0.1uF
25V, Y5V, +80%/-20%
ce35d80h125 C0603
C C
F_USB3
USBPWR_FP3 1 2
R403 0 3 4 R404 0
19 USBP5N R402 0 R405 0 USBP4N 19
19 USBP5P 5 6 USBP4P 19
7 8
L30 X 10 L31
1 2 1 2
Header_2X5_K9
4 3 4 3
120 Ohm@100MHz 120 Ohm@100MHz

dummy dummy
USB Front Header 3
U23
USBP5N 1 6 USBP5P
USBPWR_FP3
2 5
USBP4N 3 4 USBP4P
IP4220CZ6
B B
5V_DUAL_USB 5V_DUAL_USB
U27 U25
USBP1N 1 6 USBP1P Stuff if OC resistor divider unstuff. USBP3N 1 6 USBP3P
USBPWR_FP1 USBPWR_FP2
2 5 2 5 Stuff if OC resistor divider unstuff.
*
*
USBP0N 3 4 USBP0P F9 3D3V_SB USBP2N 3 4 USBP2P F8
Fuse 1.5A Fuse 1.5A
IP4220CZ6 IP4220CZ6
3D3V_SB
tsop6qih11 tsop6qih11
* R510
10K
dummy
*
EC36 C530
* R408
470uF
16V, +/-20% * 0.1uF
25V, Y5V, +80%/-20%
R506 10K
USB_OCJ_FRONT_1 19
*
EC35
470uF
*
C446
0.1uF
10K
dummy
ce35d80h125 C0603 16V, +/-20% 25V, Y5V, +80%/-20%
ce35d80h125 C0603 R406 10K
USB_OCJ_FRONT_2 19
R507 C531
15K
* 0.1uF
25V, Y5V, +80%/-20% R407
* C424
C0603 15K 0.1uF
25V, Y5V, +80%/-20%
C0603
F_USB1
USBPWR_FP1 1 2 F_USB2
R473 0 3 4 R476 0 USBPWR_FP2 1 2
USBP1N USBP0N 19
A R457 0 5 6 R478 0 R453 0 3 4 R431 0 A
USBP1P USBP0P 19 19 USBP3N USBP2N 19
7 8 R456 0 5 6 R435 0
19 USBP3P USBP2P 19
L37 X 10 L38 7 8
1 2 1 2 L35 X 10 L34
Header_2X5_K9 1 2 1 2
4 3 4 3 Header_2X5_K9
4 3 4 3
120 Ohm@100MHz 120 Ohm@100MHz
dummy dummy 120 Ohm@100MHz 120 Ohm@100MHz
USB Front Header 1 dummy USB Front Header 2 dummy
FOXCONN PCEG
Title
Front USB Connector
C G33M03 A

5 4 3 2 1
5 4 3 2 1
BIOS_WP BIOS WP# 3D3V_SYS
Normal (1-2) Default

Protect (2-3)
C563
C532
1
1
* *
16V, Y5V, +80%/-20%
16V, Y5V, +80%/-20%

BIOS_WP(1-2)
2
0.1uF
0.1uF
3D3V_SYS 3D3V_SYS
D
Jumper U24 D
@FD
BIOS_WP C559 C554 C564
1
Header_1X3 10uF
* 0.1uF
* * 0.1uF U24_1
25
32
27
@FD 6.3V, Y5V, +80%/-20% 16V, Y5V, +80%/-20%
3
2
1
dummy W39V080FAPZ place near pin25, 27, 32
VCCA
VCC_2
VCC_1
2
2
@TF
3
2
1
3D3V_SYS 1 24 INITJ_3D3V
VPP INITJ INITJ_3D3V 20
31 22 U19_1
4 CK_33M_FWH CLK RFU_1
RFU_2 21
29 IC RFU_3 20
R509 R548 19
4.7K 4.7K RFU_4 3D3V_SYS
30 FGPI4 RFU_5 18
+/-5% +/-5%
@TF 2
24 ICH_F_PLTRSTJ RSTJ
1
FWH4
FWH3
23
17 L_AD3
L_FRAMEJ 19,24
W25X80VDAIZ
@CLONE&FD
C310
0.1uF *
3 15 L_AD2 C0603 R247
2
FGPI3 FWH2 L_AD1 25V, Y5V, +80%/-20% 1K
4 FGPI2 FWH1 14
5 13 L_AD0 U19 @CLONE&FD
19 BIOS_WP FGPI1 FWH0
6 1 8 @CLONE&FD
FGPI0 19 ICH_SPI_CS0J CS VCC
7 12 R277 15 ICH_SPI_MISO_R 2 ICH_SPI_HOLDJ
WPJ ID0 19 ICH_SPI_MISO
BIOS_WP DO HOLD 7
8 TBLJ ID1 11 L_AD[3..0] 19,24 3 WP CLK 6 ICH_SPI_CLK 19
ID2 10 4 GND DIO 5 ICH_SPI_MOSI 19
ID3 9
GND3
GND2
GND1
Socket
@CLONE&FD
@TF
16
26
28
R525 PLCC-32-SKT
8.2K RN44 PLCC32J
2
4
6
8
+/-5% 8.2K
C 8p4r0603h7 C
* 13
5
7
+/-5%
@TF
@TF
FWH
EMI
TPM
5V_SYS Reserved for Sinosun solution

3D3V_SYS
3D3V_SYS
TPM
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%
25V, Y5V, +80%/-20%

1
*C569 *C572 *C602 *C603 *C606 *C607 *C608 *C609 *C610 *C605 *C604 *C611 4 CK_33M_TPM 1 LCLK GND 2
C0603 0.1uF
C0603 0.1uF
C0603 0.1uF
C0603 0.1uF
C0603 0.1uF
C0603 0.1uF
C0603 0.1uF
C0603 0.1uF
C0603 0.1uF
C0603 0.1uF
C0603 0.1uF
C0603 0.1uF
3 KEY
2
19,24 L_FRAMEJ @TF LFRAMEn
*
ICH_F_PLTRSTJ R531 100 5 6 R530 0
B LRESETn NC_3 SMB_DATA_MAIN 4,27 B
r0603h6 +/-5% @TF
L_AD3 7 8 L_AD2
LAD3 LAD2
9 10 L_AD1
VDD LAD1
L_AD0 11 12
dummy dummy dummy dummy dummy dummy dummy dummy dummy dummy LAD0 GND
Rev-B 13 14
NC_1 NC_4
3D3V_SB 15 NC_2 SERIRQ 16 SERIRQ 20,24
17 GND CLKRUNin 18
*
19 20 R534 0
19 LPCPDJ LPCPDn NC_5 SMB_CLK_MAIN 4,27
@TF
Header_2X10_4 (TPM)
@TF
H15 H13 H4 H1 H14

FMARK FMARK FMARK FMARK FMARK
FD40 FD40 FD40 FD40 FD40
H12 H2 H3 H10 H8
1
Mounting Hole Mounting Hole Mounting Hole Mounting Hole Mounting Hole
6
5
6
5
6
5
6
5
6
5
For Board Top side For Board Bottom side 7
8
4
3
7
8
4
3
7
8
4
3
7
8
4
3
7
8
4
3
9 2 9 2 9 2 9 2 9 2
1
1
mh40x80_8 mh40x80_8 mh40x80_8 mh40x80_8 mh40x80_8
A A
H7
H16 H17 Mounting Hole H5 H6 H11
FMARK FMARK H9 Mounting Hole Mounting Hole Mounting Hole
FD40 FD40 FMARK
6
5
FD40
6
5
6
5
6
5
7 4
8 3 7 4 7 4 7 4
1
9 2 8 3 8 3 8 3
1
9 2 9 2 9 2
FOXCONN PCEG
1
mh40x80_8
mh40x80_8 mh40x80_8 mh40x80_8 Title
For CPU
XDP/TPM
C G33M03 A

5 4 3 2 1
5 4 3 2 1
RN46
DD7A0
DD8A0
*1 2
DD7A
DD8A
DD6A0 3 4 DD6A
DD9A0 5 6 DD9A
7 8 @JMB368
33 +/-5%
8p4r0603h7
RN49
D D
DD5A0
DD10A0
*1 2
DD5A
DD10A
3D3V_SYS DVDD_3.3V DVDD_2.0V APVDD_2.0V DD4A0 3 4 DD4A
DD11A0 5 6 DD11A
7 8 @JMB368
close to IC close to IC CLOSE PIN4,9
33 +/-5%
C576 C547 C544 8p4r0603h7
1
* C571
0.1uF * C573
*
0.1uF
10uF
* C590
*
0.1uF
10uF
*10uF
*
C546
0.1uF
C549
1nF * DD13A0
*
RN45
1 2
DD13A
C0805 C0805 C0805 DD2A0 DD2A
2
@JMB368@JMB368 @JMB368 @JMB368@JMB368 @JMB368 @JMB368 @JMB368 DD12A0 3 4 DD12A
DD3A0 5 6 DD3A
7 8 @JMB368
33 +/-5%
3D3V_SYS DVDD_2.0V 8p4r0603h7
RN48
DD15A0
* 1 2
DD15A
4
DVDD_2.0V
DD0A0 DD0A
DMACKnA
3 4
PDIAGnA
DD14A0 DD14A
* C570
DIOWnA
DIORnA
IORDYA
INTRQA
Vout 4
5 6
CS0nA
CS1nA
0.1uF U30 @JMB368 DD1A0 DD1A
DA1A
DA0A
DA2A
7 8 @JMB368
ADJ
@JMB368
Vin
DVDD_2.0V AME1117ACGTZ 33 +/-5%

SUGGEST CLOSING TO IC RIGHT SIDE 8p4r0603h7
3
Update 03/09/07
36
35
34
33
32
31
30
29
28
27
26
25
U31 CS0nA0 R540 33 CS0nA
r0603h6 +/-5%@JMB368
YIDMACKnA
XIIORDYA
YIDIORnA
YIDIOWnA
XINTRQA
XICBLIDA
YIDA1A
YIDA0A
YIDA2A
YICS0nA
YICS1nA
DV18
R528 RN50
220
+/-1%
@JMB368 CS1nA0
DA2A0
* 1 2
CS1nA
DA2A
EC46 R0603 DMARQA DD3A DA0A0 3 4 DA0A
37 XIDMRAQA ZIDD3A 24 5 6
* 470uF
6.3V, +/-20% * C555
0.1uF
DD15A
DVDD_3.3V
38
39
ZIDD15A ZIDD11A 23
22
DD11A
DVDD_3.3V
DA1A0
7
DA1A
8 @JMB368
CE25D60H110 @JMB368 DV33 DV33 DD4A
@JMB368 *R529
150 @JMB368
40
41
DGND33
DGND33
ZIDD4A
ZIDD10A
21
20 DD10A
33 +/-5%
8p4r0603h7
+/-1% 42 19 DD5A
r0603h6
8,24 ICH_PLTRSTJ
DD0A
DD14A
43
44
XRSTn
ZIDD0A
JMB368 ZIDD5A
ZIDD9A 18
17
DD9A
DD6A
DD1A ZIDD14A ZIDD6A DD8A
C 45 ZIDD1A ZIDD8A 16 C
DD13A 46 15 DD7A
DD2A ZIDD13A ZIDD7A
47 ZIDD2A YROMCSn 14
DD12A 48 13
ZIDD12A DGND33
ACPLKN
APREXT
ACPLKP
APRXN
APRXP
APTXN
APTXP
APG18
APG18
APV18
APV18
DG33
IDE Connector
* * *
DMARQA0 R527 82.5 +/-1% DMARQA
PIDE R0603 @JMB368
1
2
3
4
5
PCIE_REXT1 6
7
8
APVDD_2.0V 9
10
11
12
3D3V_SYS JMB368-LGGZ0A HD_RST# 1 2
@JMB368 24 HD_RST# DD7A0 DD8A0 IORDYA0 R544 82.5 +/-1% IORDYA
3 4
APVDD_2.0V
IORDYA R563 4.7K +/-5% DD6A0 5 6 DD9A0 R0603 @JMB368
r0603h6 @JMB368 DD5A0 7 8 DD10A0
DD4A0 9 10 DD11A0 INTRQA0 R564 82.5 +/-1% INTRQA
DD3A0 11 12 DD12A0 R0603 @JMB368
*
CSELA R545 0 +/-5% DD2A0 13 14 DD13A0

PCIE_REXT1
r0603h6 DD1A0 15 16 DD14A0 DIOWnA0 R542 22 +/-5% DIOWnA

@JMB368 DD0A0 17 18 DD15A0 r0603h6 @JMB368
DMARQAR533 5.6K +/-5% 19 (#20 key-pin)
4 CK_PE_100M_N_JMB X
r0603h6 DMARQA0 21 22 DIORnA0 R543 22 +/-5% DIORnA
4 CK_PE_100M_P_JMB
@JMB368 DIOWnA0 23 24 r0603h6 @JMB368
INTRQA R541 10K +/-5% DIORnA0 25 26 (#28 CSEL)
r0603h6 R517 19 HSO_P5_JMB IORDYA0 CSELA DMACKnA0 R546 22 +/-5% DMACKnA
19 HSO_N5_JMB 27 28
@JMB368 12K DMACKnA0 29 30 r0603h6 @JMB368
DD7A R523 10K +/-5% +/-1% @JMB368 INTRQA0 31 32 (#32 IOCS16)
**
r0603h6 r0603h6 C542 0.1uF DA1A0 33 34 PDIAGnA

@JMB368 19 HSI_N5_JMB DA0A0 DA2A0
@JMB368 35 36
C550 0.1uF CS0nA0 37 38 CS1nA0
19 HSI_P5_JMB IDE_LED
Near to PIN 20 IDE_LED 39 40
@JMB368
Header_2X20_20
@JMB368
CP9
DVDD_2.0V 1 2APVDD_2.0V
COPPER
B B
A A
FOXCONN PCEG
Title
JMB368 & IDE
C G33M03 A

5 4 3 2 1
5 4 3 2 1
R291 54.9 +/-1% 1394_TPB0P 50V, NPO, +/-5% AD[31..0]

AD[31..0] 21,26,29
@6308 C326 1 222pFC0603 R270 0
*
R287 54.9 +/-1% 1394_TPB0N R0603 +/-5% CK_24M_1394 4
@6308 @6308 3D3V_1394 3D3V_1394 3D3V_1394
@6308
2
R288 4.99K +/-1% R282
@6308 X3 10M 3D3V_SB
C3401 2270pF 24.576MHz +/-5%
*
@6308 50V, NPO, +/-5% 1394_POW_CON_A dummy dummy VDD_1394 R272 R274 R273
1
4.7K
* C303 4.7K 4.7K
*
C325 2 1 10pF +/-5% R241 0.1uF +/-5% +/-5%
dummy R0603 U18 510 Ohm @6308 @6308 @6308
2
R300 54.9 +/-1% 1394_TPA0P R255 50V, NPO, +/-5% @6308 R271 1 8 +/-5%
A0 VCC
2
D @6308 11K C332 4.7K 2 7 D
R298 54.9 +/-1% 1394_TPA0N +/-1% VCCA_1394 * +/-5% A1 WP/NC VT6307_SCL
3 A2/NC SCL 6 @6308
@6308 @6308 0.1uF R0603 Update 03/09/07 4 5 VT6307_SDA
1
C351 VSS/GNDSDA
1 2 0.33uF @6308 dummy
*
@6308 10V, X7R, +/-10% AT24C02BN-10SU-1.8

R276 @6308
TPBIAS0 1K
+/-1%
@6308
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
VCCA_1394 U21
GNDARX0
XCPS
VCCATX0
XO
GNDATX0
VCCSUS
XI
PHYRST#
NC_2
NC_3
NC/PHYPC1
NC/PHYPC0
NC/PHYPC2
NC/PHYCMC
NC_4
GNDSUS
NC/I2CFAST
NC/CARDBUSENA
NC/I2CEEENA
NC_5
NC_6
MODE0
MODE1
GNDSUS
NC_7
VCCSUS
R314 54.9 +/-1% 1394_TPB1P
*
@6308 C3332 1 47pF 50V, NPO, +/-5%
R313 54.9 +/-1% 1394_TPB1N @6308 65 38
@6308 R260 6.34K +/-1% VCCARX0 NC_1 R265 0 R0603 +/-5%
66 XRES PME# 37 PMEJ 21,26,29
R301 4.99K +/-1% @6308 67 36 @6308
@6308 NC_8 GND PWRDET R275 4.7K
68 GNDARX1 VCC 35 3D3V_1394
C3591 2270pF 69 34 R0603 +/-5%
*
@6308 50V, NPO, +/-5% 1394_TPB0N GNDATX1 GND

70 XTPB0M VCC 33 VDD_1394 @6308
1394_TPB0P 71 32 VT6307_SCL C337 1 20.1uF
*
1394_TPA0N XTPB0P SCL/EECK VT6307_SDA dummy
72 XTPA0M SDA/EEDI 31
R329 54.9 +/-1% 1394_TPA1P 1394_TPA0P 73 30
@6308 TPBIAS0 XTPA0P EEDO
74 XTPBIAS0 EECS 29
R321 54.9 +/-1% 1394_TPA1N VCCA_1394 75 28 AD0
@6308 VCCARX1 AD0 AD1
76 VCCATX1 AD1 27
C368 1 2 0.33uF 1394_TPB1N 77 26
*
@6308 10V, X7R, +/-10% 1394_TPB1P XTPB1M GND

78 XTPB1P GNDRAM 25
1394_TPA1N 79 24 12V_SYS 1394_POW_CON_A
XTPA1M VCCRAM VDD_1394
TPBIAS1 1394_TPA1P 80 23 AD2
C TPBIAS1 XTPA1P AD2 AD3 D10 @6308 C
81 22 F5
XTPBIAS1 AD3 AD4
3D3V_1394 VDD_1394 dummy
82
83
GNDARX2
GNDATX2
AD4
VCC
21
20 3D3V_1394
A C
*
1
3D3V_1394 4.7K R0603 +/-5% R337 84 XTPB2M AD5 19 AD5 EC25 B340B-13-F Fuse 1.5A@6308 C276
*
1
85
86
XTPB2P AD6 18
17
AD6
AD7
* 100uF
16V, +/-20%
C349
0.1uF * 0.1uF
@6308
E
2
REG_FB XTPA2M AD7 CE20D50H110 dummy
87 16
2
REG_OUT Q25 REG_OUT XTPA2P GND dummy
B 88 XTPBIAS2 CBE0# 15 CBEJ0 21,26,29
BCP69T1G 89 14 AD8
VCCA_1394 VCCARX2 AD8
dummy 90 13 AD9
VCCATX2 AD9 AD10 1394_POW_CON_B
21,26 INTEJ 91 12
C
4
INTA# AD10 AD11

21,26,29 PCIRSTJ 92 PCIRST# AD11 11
REG_FB R341 0 93 10 AD12 F6
4 CK_33M_1394 PCICLK AD12
r0805h6
21 GNT3J
94
95
GND
PGNT#
GND
VCC
9
8 3D3V_1394
*
1
21,26 PREQ3J
AD31
96
97
PREQ#
AD31
AD13
AD14
7
6
AD13
AD14
Fuse 1.5A@6308 C357
0.1uF *
AD30 98 5 AD15 @6308
2
3D3V_SYS VCCA_1394 AD29 AD30 AD15
99 AD29 CBE1# 4 CBEJ1 21,26,29
AD28 100 3
AD28 PAR PAR 21,26,29
AD27 101 2
AD27 PERR# PERRJ 21,26,29
C372 3D3V_1394 102 1
R346 0 4.7uF C0805 @6308 VCC GND
1 2
DEVSEL#
*
FRAME#
r0805h6 +/-5% 10V, Y5V, +80%/-20%
TRDY#
STOP#
CBE3#
CBE2#
IRDY#
IDSEL
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
GND
GND
GND
GND
@6308
VCC
VCC
VCC
C331 1 2 0.1uF @6308
*
16V, Y5V, +80%/-20% PCIRSTJ VT6308P

103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
@6308 @6308
C374 R296 0 +/-5% 1394_TPA0P
1
B B
C328 1 2 0.1uF @6308
* 33pF
STOPJ 21,26,29
R0603
*
16V, Y5V, +80%/-20% 50V, NPO, +/-5% Common Choke 90 Ohm_2L dummy
DEVSELJ 21,26,29 1394_POW_CON_A 1394_POW_CON_A
C0603 4 3
VT6307_IDSEL
TRDYJ 21,26,29
2
dummy
AD26
AD25
AD24
AD23
AD22
AD21
C353 1 3D3V_1394
2 0.1uF @6308 Please close to 1394 chipset 1 2
*
16V, Y5V, +80%/-20% F_1394_1

AD20
AD19
AD18
AD17
AD16
IRDYJ 21,26,29 L25
FRAMEJ 21,26,29
1 2 R297 0 +/-5% 1394_TPA0N
CBEJ2 21,26,29
C370 1 2 0.1uF @6308 3 4 R0603 @6308
*
16V, Y5V, +80%/-20% 3D3V_1394 5 6 R264 0 +/-5% 1394_TPB0N

21,26,29 CBEJ3
VDD_1394 7 8 R0603 @6308
X 10 L23
AD19 100 R368 1 2
+/-5% R0603 C339 dummy
1
@6308 * 0.1uF
C0603
Header_2X5_K9
@6308
4 3
@6308 Update 03/09/07 Common Choke 90 Ohm_2L
2
3D3V_SYS 3D3V_1394 R269 0 +/-5% 1394_TPB0P
R0603 @6308
@6308
R355 0 +/-5% 1394_TPA1P
CP8 2 1 COPPER R0603
Common Choke 90 Ohm_2L dummy
C380 C383 C369 C358 1394_POW_CON_B 1394_POW_CON_B 4 3
1
10uF
C0805 * * C385
0.1uF * C377
0.1uF * C381
0.1uF * 10nF
C0603 * 10nF
C0603 * 10nF
C0603 * C329
0.1uF 1 2
10V, Y5V, +80%/-20% @6308 @6308 @6308 @6308 @6308 @6308 dummy F_1394_2
2
dummy L27
1 2 R354 0 +/-5% 1394_TPA1N
A 3 4 R0603 @6308 A
5 6 R330 0 +/-5% 1394_TPB1N
VDD_1394 7 8 R0603 @6308
X 10 L26
1 2
C373 C360 dummy
FOXCONN PCEG
1
10uF
* * C319
* 0.1uF @6308 Header_2X5_K9 4 3
1
C0805
10V, Y5V, +80%/-20%
0.1uF
@6308 * C343
0.1uF * C382
0.1uF * C350
0.1uF
C0603
@6308
Update 03/09/07
Common Choke 90 Ohm_2L Title
2
@6308 @6308 @6308 @6308 R331 0 +/-5% 1394_TPB1P IEEE 1394-V6307/6308

2
R0603 @6308
Custom G33M03 A

5 4 3 2 1
5 4 3 2 1
8/21 Initial schematics according to USA CRB v0.7 12/22 Fab C schematics initial
8/22 Add AMT_LED function in Reserved page Change the library symbol of MCH(Change V30 to VSS
,add V31-RSVD)(According to DG1.0)
8/23 Change ALC 883 to 888 in HDA Codec page
8/25 Change ICH_SYNC,ICH_SDIN2,ICH_SDOUT,ICH_SDOUT_R,
ICH_SYNC_R net name to ICH_AUD_SYNC,ICH_AUD_SDIN2, Change the name of C17 to GPIO10/CLGPIO1,C15 to STP_PCI#/GP15,
ICH_AUD_SDOUT,ICH_AUD_SDOUT_R,ICH_AUD_SYNC_R B18 to STP_CPU#/GP25,A14 to GP24/MEM_LED
in ICH9-1 and HDA Codec page
Modify the AMT_LED circuit in page 37(del R272,R273,R571,R567,

Del VID0 to VID 7 in IT8718 page R609,R589,R569,Q60,Q61,Q65)
D D
Add VID_SELECT(AN7) connect to 0 ohm to VRD6321 in

LGA775-1 and VRD 6312 page 12/25 Change C92 to 0.1uF(schematic wrong)
Change SATA cap to 10nF(schematic wrong)

8/30 Change the MLCC cap connected to tha audio jack
to EC in HDA Codec page for Vista Modify SMBus bridge circuit in page 29(change Q43,Q44
8/31 Change routing to MMBT3904,stuff R442,R443,Q45,Q46,R437,R438,dummy R444
,R446,add R148)
Add the fourth phase in VRD 6312 page For supporting CPU before Conroe,dummy R532, sutff R131,
connect MSID to VSS(R149,R272)
9/2 Add S4_STATE circuit in reserved-2 page
Pull up WOL_EN via R567, dummy R266(MOW ww50)
Modify 5V_DUAL circuit in page 17
EC18,EC19 change to 220uF(schematic wrong)
Modify the USB power circuit from 5V_DUAL to USB_DUAL
Modify VCCA_EXP and VCCA_DAC(add R273)
9/5 Modify IT8718 seperating the analog GND and digital GND PCI clock 33MHz resistors change to 33 ohm
Del net CK_CPU_STOP and CK_PCI_STOP in CK505 page

12/28 Modify USB_DUAL circuit in page 38(add R569)
C 9/6 Add 1000uF to 5V_SB_SYS in page 30 C

Change CP7,CP8,CP9 to R571,R589,R609(0 ohm)
9/7 Del PATA, add SRTCRST 180k pull up to VccRTC
Add 2 SPI(8 pins), add DDR3 PWRGD circuit Change CP7,CP8,CP9 to R571,R589,R609(0 ohm)
9/18 Modify the values of page 29(Fan parts)
Add 3 pin Fan controll circuit Change EC28,EC29 to 1500uF
9/22 Modify the values of memory termination resistors 1/2 Del R644
Change 74LV132 to 5V_SB
1/3 Change Q32 to ADO452, Q30 to ADO472 ,add Q60,change R233
9/27 Del COM port to 910 ohm, R237 to 1.15k,R229 to 15k ohm(power team
suggestion for 1.8V issue)
10/4 Add the circuit for DDR voltage without AMT
Add C45 for EMI
10/9 Add the fourth phase for verify
1/4 Release FAB C Gerber
10/12 Modify the resistor values of MCH_CLPWROK
Change the inductor values in VRD
10/17 Fab A Gerber Out

Change the values of VRD parts by power team
10/24 GPIO49 pull down by INTEL suggestion

B B
10/26 Release new Gerber(Fab A1)
10/30 Change the level(12V) of R606 or the MOS will cut off
11/6 Stuff R161,R368 for power sequencing
11/7 Change the resistor values for power level

Modify the VTT_SEL circuit
11/9 Change the footprint of Fan connectors

One GPIO(SPI_CS1) pin pull up(BOM issue)
11/10 Del BIOS_SEL header

R563 pull to 5V_SB_SYS
11/13 Stuff LAN Xtal

Modify SATA circuit
11/14 Modify SPI circuit
11/15 Add R642 pulling down for TLS disable
11/17 Add MFG header(GPIO33) for MFG
11/20 Update BOM for spec

A A
Fab B gerber out
11/21 Stuff components for Kentsfield support

Modify BOM and schematics for dual SPI
11/27 Modify BOM and schematics in power part

(R83 to 39.2k, R55 to 681, R61 to 55, R219 to 6.8k) FOXCONN PCEG
Title
11/29 Q54,Q34 change to AOD452 for USB issue History
C G33M03 A

5 4 3 2 1
5 4 3 2 1
ICH9 GPIO Summary

Name Power Well Type Description
D D
GPIO0 3.3V I/O FP_AUD_DETECT
GPIO1 3.3V I/O TACH_1
GPIO2 5V I/OD PIRQE#
GPIO3 5V I/OD PIRQF#
GPIO4 5V I/OD PIRQG#
GPIO5 5V I/OD PIRQH#
GPIO6
GPIO7
GPIO8
3.3V
3.3V
3.3V_SB
I/O
I/O
I/O
TACH_2
TACH_3
Unused(pull up)
PCI Routing Summary
GPIO9 3.3V_SB I/O WOL_ONLY PCI1
GPIO10 3.3V_SB I/O Unused(pull-up) INTAJ F
GPIO11 3.3V_SB I/O SMBALERT# INTBJ G
GPIO12 3.3V_SB I/O LAN_DISABLE# INTCJ H
GPIO13 3.3V_SB I/O L_PME# INTDJ E
GPIO14 3.3V_SB I/O Unused(pull-up) INTEJ
GPIO15 3.3V_SB I/O CK_PCI_STOP INTFJ
GPIO16 3.3V I/O Unused(NC) INTGJ
GPIO17 3.3V I/O TACH_0 INTHJ
GPIO18 3.3V I/O Unused(NC) REG#/GNT# 0
C C
GPIO19 3.3V I/O SATA_1GP IDSEL 16
GPIO20 3.3V I/O Unused(NC)
GPIO21 3.3V I/O SATA_0GP
GPIO22 3.3V I/O Unused(pull-up)
GPIO23 3.3V I/O LDRQ1#
GPIO24 3.3V_SB I/O AMT_LED
GPIO25 3.3V_SB I/O CK_CPU_STOP
GPIO26 3.3V_SB I/O S4_STATE#
GPIO27 3.3V_SB I/O QRT_STATE0
GPIO28 3.3V_SB I/O QRT_STATE1
GPIO29 3.3V_SB I/O USB_OC3_FRONT#
GPIO33 3.3V I/O MFG
GPIO36 3.3V I/O SATA_2GP
B GPIO37 3.3V I/O SATA_3GP B

GPIO39 3.3V I/O Unused(pull-down)
GPIO44 3.3V_SB N/A USB_OC_BACK#
GPIO45 3.3V_SB N/A USB_OC_BACK#
GPIO46 3.3V_SB N/A USB_OC_BACK_LAN#
GPIO47 3.3V_SB N/A USB_OC_BACK_LAN#
GPIO49 3.3V I/O DMI_STRAP(pull-down)
GPIO50 5.5V I/O REQ_1#
A
GPIO56 3.3V_SB I/O Unused(pull-up) A
GPIO57 3.3V_SB I/O Unused(pull-up)

FOXCONN PCEG
Title
GPIO / IRQ / IDSEL Map
C G33M03 A

5 4 3 2 1

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5 4 3 2 1

Foxconn Precision Co. Inc.

06. LGA775 -1 25. PCI Express x1 Slot

15. DDR2 Channel B Termination 34. JMB368 & IDE B

16. ACPI FOX ONE 35. IEEE 1394 - V6308

Date: Thursday, April 26, 2007 Sheet 1 of 37

MCH 200/266/333 MHz Diff Pair

DDR2 4 Slots 12 Diff CLKs

Channel B DDR2 DDR2 667/800

PCI Express/DMI 100 MHz Diff Pair

80 Port 33MHz 80 Port

PCI Express 100 Mhz Diff Pair PCI Express x1 Slot 1

PCI Express 100 Mhz Diff Pair PCI Express x1 Slot 2

XDP 100MHz Diff Pair XDP FOXCONN PCEG

Date: Thursday, April 26, 2007 Sheet 2 of 37

3.3V Super I/O

1.2V FSB 5VSB

GMCH 1.25 V Vcore (Core Logic) PCI Express X16

Nineveh GbE Lan

1.8V ANALOG 418.2mA BJT

Date: Thursday, April 26, 2007 Sheet 3 of 37

+/-5% 33 R136 3D3V_CLK_REF_A

CP6 2 1 COPPER SMB_DATA_MAIN 27,33

200M_P_CPU +/-5% 33 R130

PCI-E x16 Slot

Add for SI FS_C FS_B FS_A FSB Frequency

Date: Thursday, April 26, 2007 Sheet 4 of 37

L10 Choke 1.1uH VIN

+/-1% r0603h6 +/-1% 13 27 R223 2.2 1 2 r0805h6 +/-5% AOD452

Place * +/-1% C0603 14 26 OS-CON * 3300uF * 3300uF * 3300uF

C C336 680pF +/-1% 16 Q20 Q19 r0805h6 TC2 TC1 C

r0603h6 C309 r0805h6 C0603 25V, X7R, +/-10% VIN

R0603 C295 0.1uF R101 0 G G 4V,+/-20% 4V,+/-20% 4V,+/-20%

C0805 16V, X7R, +/-10% VCC UGATE

AOD472 AOD472 C0603

Date: Thursday, April 26, 2007 Sheet 5 of 37

VTT_OUT_RIGHT C420 C478

max. 1200mils VTT_OUT_RIGHT

25V, Y5V, +80%/-20% 8p4r0603h7 HBPM1J R351 0 H_TEST R358

C0603 +/-1% C0603 C0603 +/-1% C0603 dummy 680

dummy dummy RN18

Date: Thursday, April 26, 2007 Sheet 6 of 37

FSB_VTT PLL Supply Filter

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%

6.3V, X5R, +/-10%