MD780&MD780G Hytera Service Manual R3.5
MD780&MD780G Hytera Service Manual R3.5
MD780&MD780G Hytera Service Manual R3.5
Preface
This manual describes information related with product repair. To repair the product properly, please
read this manual carefully.
Contents
1. Revision History ............................................................................................................................................... 1
2. Copyright Information...................................................................................................................................... 2
3. Disclaimer........................................................................................................................................................ 3
4. Product Overview ............................................................................................................................................ 4
5. Product Controls .............................................................................................................................................. 5
6. Front Panel ...................................................................................................................................................... 7
7. Baseband Section............................................................................................................................................. 9
7.1 Power Section .......................................................................................................................................................... 9
7.2 Power On/Off......................................................................................................................................................... 10
7.3 Clock ....................................................................................................................................................................... 11
7.4 Interface Distribution............................................................................................................................................. 11
7.5 Audio Section ......................................................................................................................................................... 15
7.6 PCB Difference ....................................................................................................................................................... 19
8. GPS Circuit ..................................................................................................................................................... 20
8.1 Circuit Description.................................................................................................................................................. 20
8.2 Schematic Diagram ................................................................................................................................................ 20
8.3 Parts List ................................................................................................................................................................. 21
8.4 Troubleshooting Flow Chart .................................................................................................................................. 22
9. Tuning Description ......................................................................................................................................... 23
11.1 Transmitter Circuit ............................................................................................................................................... 27
11.2 Receiver Circuit .................................................................................................................................................... 29
11.3 Frequency Generation Unit (FGU) ....................................................................................................................... 30
11.4 PCB View .............................................................................................................................................................. 33
11.5 Block Diagram ...................................................................................................................................................... 37
11.6 Schematic Diagram .............................................................................................................................................. 40
11.7 Parts List ............................................................................................................................................................... 54
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11.8 Troubleshooting Flow Chart ................................................................................................................................ 89
12.1 Transmitter Circuit ............................................................................................................................................... 95
12.2 Receiver Circuit .................................................................................................................................................... 97
12.3 Frequency Generation Unit (FGU) ....................................................................................................................... 98
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1. Revision History
Version Date Description
R2.0 09-2010 Initial Release
R3.5 05-2011 Add descriptions on VHF, UHF2 and UHF3.
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2. Copyright Information
Hytera is the trademark or registered trademark of Hytera Communications Co., Ltd. (the Company) in
PRC and/or other countries or areas. The Company retains the ownership of its trademarks and product
names. All other trademarks and/or product names that may be used in this manual are properties of
The product described in this manual may include the Company’s computer programs stored in memory
or other media. Laws in PRC and/or other countries or areas protect the exclusive rights of the Company
with respect to its computer programs. The purchase of this product shall not be deemed to grant, either
directly or by implication, any rights to the purchaser regarding the Company’s computer programs. Any
of the Company’s computer programs may not be copied, modified, distributed, decompiled, or
reverse-engineered in any manner without the prior written consent of the Company.
The AMBE+2TM voice coding technology embodied in this product is protected by intellectual property
rights including patent rights, copyrights and trade secrets of Digital Voice Systems, Inc. This voice
coding technology is licensed solely for use within this product. The user of this technology is explicitly
prohibited from attempting to decompile, reverse engineer, or disassemble the Object Code or in any
other way convert the Object Code into a human readable form.
U.S. Patent No: #6,912,495 B2, #6,199,037 B1, #5,870,405, #5,826,222, #5,754,974, #5,701,390,
#5,195,166.
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3. Disclaimer
The Company endeavors to achieve the accuracy and completeness of this manual, but no warranty of
accuracy or reliability is given. All the specifications and designs are subject to change without notice
due to continuous technology development. No part of this manual may be copied, modified, translated,
If you have any suggestions or would like to learn more details, please visit our website at:
http://www.hytera.com.
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4. Product Overview
Intended User
This manual is intended for use by qualified technicians only.
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5. Product Controls
Front Panel
○
3 LCD Display ○
4 OK/Menu Key
○
5 Back Key ○
6 Power On/Off Key
○
7 Up Key ○
8 Down Key
○
9 Speaker ○
10 Programmable Keys
Microphone Installation
○
11 Microphone Jack ○
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Index
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Rear Panel
○
1 RF Antenna Connector ○
2 Power Inlet
○
3 Accessory Jack ○
4 GPS Antenna Connector
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6. Front Panel
The front panel contains the speaker, keys, power switch, volume control knob, LCD display and other
parts. The block diagram is shown as the figure below.
CONTROL HEAD
Keys Matrix
R0 R1 R2 R1
C0 Back P2 P5 R2
C1 P6 P3 Switch
C2 p1 Down Menu
R3
C3 EMER Keyboard C1 Keyboard
UP P4 3*4 KEY
C2 Interface
C3
C4
U302
QA
BACK LIGHT& BL_LED QB \RESET CS
RX_LED QC U1 SHIFT_CLK CLOCK
SIGNAL LIGHT TX_LED QD A DATA
SPK- SPK+
MMP ACC_ID
GPIO3&PTT GPIO
SPK U231
GPIO_2 / D- USB.DP
GPIO_1 / D+ FILTER USB.DM
USB_Vbus 5VD
INT_MIC U231 McBSP
MIC_GROUND
GPIO_4 / Hook GPIO
GPIO_0 / PwrOn GPIO
A
U7 UART2
B
S GPIO
can be powered up. Then the power is further fed to U5, so as to supply LCD and U1 (serial-to-parallel
converter IC).
2) Keys
The front panel has ten keys: programmable keys (S2, S3, S7, S8, S9, S10 and S12), Up/Down key (S5,
S11), OK/Menu key (S4), Back key (S6), and Power On/Off key (S1).
3) LCD Display
The TFT LCD transfers data via the bus EMIFS of U302. The control signals contain write/read enable,
memory chip select, LCD chip select and reset signal, each of which is pulled up by R36, R35, R34, R33
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and R6 respectively. The 5V voltage is converted to 3.3V by U5, in order to supply the LCD module.
The backlight is also supplied by a 5V voltage and controlled by Q1. Control signals are output via U1.
5) MMC
For details, please refer to Interface Definition.
6) Audio output
The front panel provides two audio outputs: Handset_audio and SPK±. Handset_audio is the output of
received audio via MMC, and SPK± is the output by the audio PA (U201) as audio signal for the front
panel speaker.
7) Volume Control
The volume control is facilitated by the encoder switch (U7), which generates signals to be fed to U302
by GPIO17 and GPIO18.
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7. Baseband Section
Both the baseband control IC and the RF section can convert the supplied voltage to an appropriate one
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2) Ignition Signal
3) Emergency
Power on the radio: As the Power On/Off Key is pressed, R944 becomes grounded and Q910 is on.
Then Q905 outputs high-level signal, causing U902 and Q920 to start working. Afterwards the processor
U302 executes user routines to maintain a high-level power control signal (PWR_CTR). In this case, the
radio starts to work properly after the Power On/Off Key is released. Power off the radio: As the Power
On/Off Key is pressed, LQ910 is on and a low-level signal (PWB) to turn off the radio is detected by
U302, which then controls PWR_CTRL to output low level. Afterwards, the radio becomes off.
When the voltage of ignition signal exceeds 7V, Q1 will be turned on by C933, R955 and R956. As a
result, the PNP transistor of Q905 will be further turned on to supply power. Meanwhile, Q401 will also be
turned on, and U302 will identify ignition signals by detecting the signal from Q401; afterwards, the level
7.2.3 Emergency
When the emergency alarm pin is at low level, R940 is grounded, and Q906 is turned on to supply power.
Meanwhile, Q908 is also turned on. When low level is detected from Q908 but the radio is powered off,
U302 will output the level PWR_CTRL and send emergency signal. If the radio is powered on then, U302
1) Power on the radio using one of the three methods (Power On/Off key, Ignition Signal, or
Emergency);
2) U917 generates reset signal and remains low level for 1.25 seconds, allowing the processor to
start;
4) After receiving the signal, the processor generates the level of PWR_CTRL. Then the power-up
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7.3 Clock
The 32K clock provided by X375 is mainly used for timing and sleeping of the system. Its frequency
(32.768 kHz) is divided by U302 (32768 times in all) to 1Hz for counting seconds. The system clock
U302
PE SPIF.CS2
U701
PC SPIF.SCK
PD SPIF.DOUT
SPI of U302 operates in Master Mode, and is controlled by MPU or DMA. In this case, U302 can provide
4 chip select signals, of which CS2 is used to control the IF processor U701.
When U302 is communicating with U100, it works in Master Mode with clock frequency of up to 9.6MHz.
U100 uses MCSI synchronization as chip select signal and MCSI1.DOUT as data cable to configure its
register.
The MICROWIRE interface can accommodate 4 external devices at most, generally transmitting control
and status messages of external devices, and reading data from ROM. Its maximum clock frequency is a
quarter of system clock frequency. In this case, MICROWIRE is used to configure or read from the audio
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U302 has a total of three McBSP interfaces: McBSP1, McBSP2 and McBSP3, compatible with various
interfaces. McBSP1 is connected with I2C of the audio processor, to realize two-way transmission of
digital voice and data. McBSP2 uses independent clock and frame synchronization for transmitting and
receiving. The SSI of the receiver processor is connected with the RX end of McBSP2, and U500 with
the TX end of McBSP2. U302 works in Master Mode. McBSP3 is connected with the Option Board
The radio has two USB interfaces, which are connected to the same USB signal port of the processor.
REF CLOCK is the reference frequency in specified mode. It should be 12MHz in high rate mode or
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U302 has a total of three UART interfaces, which are utilized to communicate with different external
devices. UART2 is used for communication with front panel and serial port on PC, while UART3 with
Mobile accessory connector contains audio interface, programmable I/O port, serial port, USB port,
accessory identifier port and etc, which are applied for further development. For details, please refer for
J400, an option board interface, is used to achieve specific function by connecting with the designated
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I/O
Relative
Pin Voltage
Signal Function to Remarks
No. (VDD=3.3V)
Option
Board
GPIO5: output
signal of the option
board (reset);
1 GPIO1 GPIO I/O
GPIO4 and GPIO5:
3 GPIO2 GPIO I/O
uni-directional
5 GPIO3 GPIO I/O
output interfaces.
7 GPIO4 GPIO O
They require their
9 GPIO5 RESET-OUT O
input resistance is
above or equal to
VIH MIN=0.7VDD
47KΩ.
VIL MAX=0. 3VDD
11 UART-TX O VOH MIN=0.8VDD
13 UART-RX I VOL
UART UART
15 UART-CTS I MAX=0.22VDD
17 UART-RTS O
6 MCBSP-DR I
McBSP:
8 MCBSP-WCLK I/O
MCBSP Multichannel
10 MCBSP-DX O
Buffered Serial Port
12 MCBSP-FSX I/O
14 AGND AGND
80mv (standard
output from the
16 AF OB TO MB AF I MAX:700mV
option board to the
main board)
80mv (standard
output from the
18 AF MB TO OB AF O MAX:700mV
main board to the
option board)
19 DGND DGND
Power supply:
20 3V6 or 5V Power O
5.0V
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U302 sends digital audio to the audio processor codec via the SSI bus of MCBSP1. This bus is
composed of CLKX, FSX, DX and DR. It sends the demodulated PCM audio signal to the codec, and
adjusts the signal to appropriate amplitude according to the volume (RMS should be 80mv when
frequency is 1 KHz and deviation is 3 KHz). Then the codec converts PCM data into analog audio data
via DAC. U231 provides two outputs: SPK1 and SPK2. SPK1 is amplified by U238 and then is fed to the
PA U201, to derive two outputs of received audio, which will be applied to the front panel speaker and
further development interface respectively. SPK2 is amplified and divided into the four paths of signal
HANDSET_AUDIO, RX_AUDIO, PUB_ADDESS1 and PUB_ADDESS2. The first two paths are
amplified by U235, and the last two paths are amplified by U236. Output of HANDSET_AUDIO,
PUB_ADDESS1 and PUB_ADDESS2 are controlled by Q231, Q235 and Q233 respectively.
The audio processor U231 has two MIC inputs: the internal MIC and external MIC. The internal MIC is
connected to the MICIN_HND of U231, and is combined with AUX1 to provide differential input. After
9.3V is divided by R255 and R264, a bias voltage of about 7V is provided to the front panel MIC. The
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external MIC is connected to the MIC_HED of the codec as a unit-directional input. Both MICs are
controlled by Q232. When the internal MIC is active, EXT_MIC_EN is at low level, bias voltage of
external MIC is disconnected, and the ADC in U231 senses voltage at the MICIN_HND. When the
external MIC is active, EXT_MIC_EN is at high level, Q232 is turned on, bias voltage is connected, and
Audio signals input from the MMP interface or the accessory jack, are fed to the codec (gain of codec is
programmable via the CPS) and then are converted by the ADC into 16-bit PCM digital audio, which will
When the radio is set to operate in loudspeaker mode, audio signal is generated by the internal MIC, and
then feeds to U231, and finally is output via SPK2. The output audio signal is amplified, and then is
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3V3D
6
U910
R932
/PRST1
VDD
4.7K
5 D913
SENCE 1 2 1
RSET /PRST
1
3
C937 MR
GND MBRM120LT1G
1000p 4
CT
C941
2
0.15u
D912
2 1
R920 0 MBRM120LT1G
U906
1 8
R923 0 2 MR WDO 7
3V3D VCC /RST R983 0
3 6
C978 GND WDI RST_CTRL
4 5
PFI PFO
0.1u RESET IC
Watchdog circuit
The watchdog circuit is used to prevent the radio from damage due to OMAP malfunction. If the program
works properly, U302 feeds pulse signal (25ms) to the watchdog circuit through RST_CTRL. Otherwise,
this pulse signal will be terminated and delayed for more than 1.6s so that U906 generates the reset
Compared with version D & F, the difference in version G lies with the audio amplifier, which applies
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8. GPS Circuit
GPS Power
Antenna
GPS UART
OMAP
module
REB-1315LPx
LCD
GPS positioning information can be acquired via the programmed GPS key on the front panel. The GPS
function is realized via REB-1315LPx module, which integrates GPS baseband processor circuits.
The GPS signal (1.57542GHz), received via the GPS active antenna (with a built-in LNA), goes to the
GPS module for processing, and then enters U302 via the UART port. Meanwhile, U302 sends control
command to the GPS module and forwards processed GPS information to the LCD.
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Replace the
GPS
module.
Yes
Antenna No
works Replace the
Start
normally? antenna.
Yes
Peripheral No Replace
components work defective
normally? components.
Yes
Yes
The radio can position RX signal is
Replace U901. normally? weak?
Replace
`
connector
No W321.
No
The PC-based
No Yes No
U901 outputs 3.3V software (e.g.SiRF Connector works
normally? Demo) shows GPS normally?
communication?
Yes
Yes
Active antenna is
damaged?
Check UART.
Yes
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9. Tuning Description
For details about radio tuning, please refer to the help file of DMR Tuner Software supplied by the
Company.
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used to amplify the VCO signal to the desired output power level, while the latter can keep the output
power at the desired level, so as to protect the power amplifier from damage caused by over heat,
antenna mismatch, and out-of-range voltage (over voltage or under voltage may result in damage to
first stage is a buffer amplifier circuit with fixed gain; the second stage is a pre-driver power amplifier
circuit with variable gain (formed by Q805); the third stage is a driver power amplifier circuit with variable
gain (formed by Q804); and the final stage is the final power amplifier circuit with fixed gain (formed by
Q802 and Q803). In addition, this power amplifier contains a TX/RX switch and a low-pass filter.
Note: only a final power amplifier (Q803) is available in later versions (including version H).
The first stage (Q801) provides about 16dB power gain, and adjusts its bias circuit to get a quiescent
bias current of 28mA (for Q801). Power supply for the switching transistor Q810 is controlled by TX
signal (enabled by antenna switch) so as to further control the power supply for the whole circuit.
The pre-driver power amplifier is formed by Q805, with variable gain controlled by voltage VGG. The
input matching circuit is composed of C826, L826, L814, C843 and R824.
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The driver power amplifier is formed by Q804, with variable gain controlled by voltage VGG. The
maximum output power is 38.5dBm, and the maximum variable gain is 11dB.
The final power amplifier comprises Q802 and Q803, with the maximum output power of 48.5dBm, and
the maximum variable gain of 10dB. The input matching circuit is composed of C815, C839, R804, R806,
R807, R813, R818 and R861, while the power combining circuit is composed of C820, C8330, C831,
The antenna switch is used to switch between the transmitter circuit and the receiver circuit.
In TX mode, TX signal controls the switching transistor Q810, to further control the power supply 9V 3A
for the PIN diodes D801 and D802. Quiescent bias current of the PIN diode is controlled by the resistors
R821 and R825. In this mode, D801 and D802 are turned on; RF signals are applied to the low-pass
filter (composed of C871, C816, C836, C837, C838, L809, L813, and L810) and then transmitted via the
antenna port.
In RX mode, TX signal controls the switching transistor Q810, to further control the power supply for the
PIN diodes D801 and D802, which are not applied with DC bias current. When the two PIN diodes are
turned off, signals feed into the RX path through the low-pass filter (composed of L871, C852 and C862).
A low-pass filter that consists of inductors L809, L813 and L810, and capacitors C836, C837, C830, is
A directional coupler that consists of microstrip directional coupler, D803, D804 and etc, is used to detect
both forward and reverse directed power of the transmitter. The forward power is coupled to the diode
D803, and the voltage is applied to the power control circuit (U801). Then the voltage VGG is output to
control the gate voltage of pre-driver and driver PA, ensuring a constant power output.
The directional coupler can adjust the TX power and detect the VSWR load. The reverse power is
coupled to D804. The voltage is applied to U802 and then feeds into U302 for detection
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The TX power is controlled by U801. The forward power is applied to the directional coupler, to output a
voltage that can represent the forward power. The voltage together with the preset voltage feeds to U801
to output a voltage VGG, which can control both gate voltage and gain of Q804 and Q805, ensuring a
The circuit consists of thermistor RT804 and resistor R884. The output voltage is proportional to the
detected temperature. Both the voltage used for temperature detection and the threshold voltage are fed
into the operational amplifier U803, to output a voltage signal that is in proportion to the detected
temperature. Afterwards, the voltage is applied to software for judgment, and then the preset voltage will
be subsequently changed to reduce the TX power, and to protect the PA from over-heating.
The power control circuit includes a pressure pad switch SW1, which is controlled by the conductive
rubber part mounted on the top cover. If the switch is turned off, VGG will become low, and no power will
second IF is 2.25MHz. The first local oscillator signal is from the PLL circuit U100, and the second local
oscillator signal (71.1MHz) from the PLL circuit U701. The major units are BPF, LNA, mixer, IF filter, IF
RF signals feed to the low-pass filter to remove out-of-band signals, and are applied to the two-stage
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Service Manual
electrically tunable band-pass filter to get useful signals. After passing through the RF band-pass filter
and LNA (Q6102), the RF signals together with the first LO signal feed to the mixer for the first frequency
conversion, to generate the first IF signal (73.35MHz). The mixer that employs the passive diode can
ensure good dynamic range and port isolation. The LO signal (3-5dBm) from the VCO feeds to Q6103
to get a gain (17dB). The first LO signals (73.35MHz) pass through the crystal filter (Z6100) to remove
out-of-band spurious signals, and then feed to the two-stage IF amplifier circuit (composed of Q6133 and
Q6134) for amplification. Finally the amplified signals go to the IF IC for processing
The first IF signal (73.35MHz) output by the IF amplifier goes into IF IC via Pin 47, where the signal is
converted to the second IF signal (2.25MHz). Then the un-demodulated digital I/Q signal output from the
SSI interface is sent to U302 for demodulation. IF IC employs a reference frequency of 19.2MHz and
shares the crystal with U302. The second LO VCO consists of the external transistor, varactor and some
other components, to provide the second LO signal. The 18MHz clock frequency is generated by the LC
DSP (U302) gets the audio signal from IF IC (U701). Then this signal goes through U302 to output data
signal, which is sent to U231 and PIN44 (SSI_DI) for digital-to-analog conversion. Finally, the output
analog audio signal will be subjected to gain control, and then fed to the speaker.
The PLL synthesizer that consists of the reference oscillator (X100), PLL IC (U100) and VCO, is utilized
to supply excitation signal source to the transmitter, and local oscillator signal to the receiver.
X100 is a 19.2MHz TCXO, and its reference frequency is calibrated by the digital-to-analog converter
11.3.3 PLL IC
The PLL IC (U100) is a fractional frequency divider. The logic IC U101 and U102 work with the PLL IC
The 19.2MHz frequency generated by the reference oscillator goes into the PLL IC for division,
generating the reference frequency. Meanwhile, the frequency generated by VCO goes into PLL IC
(U100) for frequency division. The resulting frequency will be compared with the reference frequency in
terms of phase difference in the phase detector. After comparison, the resulting frequency is converted
to CV voltage via the loop filter, to control and lock the frequency.
11.3.4 VCO
The VCO is composed of transistors (Q100, Q103, Q106 and Q110), varactors and four Colpitts
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oscillators. There are four VCOs in all: two VCOs (Q100 and Q103) used to transmit excitation signals
and the other two VCOs (Q106 and Q110) to receive LO signals. U302 controls the operating frequency
of the VCO. Q102 and Q107 constitute the buffer amplifiers for the transmitter circuit, while Q111 and
Q109 for the receiver circuit. The digital-to-analog converter (U500) modulates the TX oscillator signal.
TX_L_VCO MOD
Q103
TX PA
Q107 Q102
Q100
TX_H_VCO
RX_L_VCO
Q110
RX Lo
Q109 Q111
Q106
RX_H_VCO
32
11.4 PCB View
MD78X/MD78XG PCB View (Front Panel)
Top Layer
33
MD78X/MD78XG PCB View (Front Panel)
Bottom Layer
34
MD78X/MD78XG PCB View (Main Board)
Top Layer
35
MD78X/MD78XG PCB View (Main Board)
Bottom Layer
36
11.5 Block Diagram
Q804\Q805
9V3A 9V1A
Q920\Q921\U914 Q801 Q801
Q6102
9V1A
Q902 Q6103
U6000
U703
Q6105
5VA U701
U702
U701
U915
4V3A
Q104 Q100\Q103\Q106\Q110
5VA
U100
U918 3V3A
X100
5VA
ON\OFF KEY PWB U905 U500
IGN_SENCE
EMERGENCY 3V3A U231
U909
X302
U302
1V6D
U401 USB
U919
Control Head
U231
1V8D
U903 U232
U302
3VRTC U323
U912
U326
37
MD78X/MD78XG Block Diagram (RF Section)
High
Temperature
Protection
9V1A_TX
B+ ADC
TXC ANT
Gain:10 dB
Gain:15 dB Gain:11dB
Tx/Rx
Gain:-6 dB Gain:16 dB Switch
Tx_PORT
Microstrip
Attenuator Match Match Match
Matcher Microstrip Dual
Q805 Q804 Harmonic
Q801 Driver Rx_PORT Filter Directional Coupler
PreDriver
Firststage Switchÿs Power
9.1V
Q802ǃQ803 Forward Reflect
Finalstage Detector Detector
RX
Alarm to ADC
B+ VSWR Protection
Final_Bias
Temperature
compensation TV_APC
TX_L_VCO
MOD H TV_APC
TX_VCO_L U500
Q103 MOD L DAC Final_Bias
TX LO:3dBm
Q107 Q102
TX_VCO_H
TX_H_VCO Q100 X100
19.2MHZ
CLK
MCSI
C STB
SPI
LPF PLL U100
DATA
LD
RX_VCO_H
RX_H_VCO Q106
C
VCO_Feed
back LPF
LPF
X100
1 2 19.2MHZ
Q6103
Attenuator
3dB
1
Attenuator
1dB Attenuator Control
10dB
2
U701 Q6104
Z6100 Q6102
IF IC Q6105
Mixer
IF Filter D6106
IF Processor TV
38
MD78X/MD78XG Block Diagram (BB Section)
PLL IF processor DAC
RF Unit
BB Schematic Block Diagram SPI SSI SSI TXǃRX CTL
PowerǃIO CTL
McBSP2_TX
McBSP2 RX
SPI(CS1 )
SPI(CS2)
AUX MCSI1 SPI McBSP2 GPIOs
TEMP_DET ADC
Audio Codec
EMIFS
Headset Nor FLASH and pSRAM
Driver IIS McBSP1 DSP datax16 FLASH: 8Mx16
TMS320C55x pSRAM:2Mx16
MCLK
Mic CP
AMP Driver SPI BELL
EMIFF
Speed:96MHz(max)
Mobile SDRAM
McBSP3 datax16
128Mb:8Mx16
JTAG JTAG
TXAF_DI
MCLK19.2MHz OMAP5912
19.2MHz 19.2MHz
RXAF_DO CLK AD9864
32KHz TCXO
PWM0/
PWT
CS3
uWire
RTC 32.768KHz
20ppm
IIC
UART3 MPU
IIC
IIC
LTR/OPTION GPIOs
ARM926EJ-S Accelero
meter
BOARD/BLUETOOTH
Audio PA
IIC
EMERGENCY
UART1 GPS
IGN_SENSE
UART2 IGN_SENSE
KEY GPIOs EMERGENCY
USB1 GPIOs
Trax or GPIO PWB User Program
PRGM IO out
EMERGENCY
IGN_SENSE
CLK/DATA/CS
AUX Audio DC Supply 74hc595
PRGM GPIOS
GPIO 74hc595
USB Expand
Rear
ACC_ID GPIO
Accessory(MAP) PRGM UART or
USB TX_RX Keytrax
GPIOs light/LED/LCD
IO Expand LED 3X4 Volume
ACC_ID backlight
MMP
MIC TFT LCD datax8 EMIFS
SPKr
Control Head
39
5 4 3 2 1
TP4012
TP4016
R245 1R
EXT_SPKR+
R253 1R
D EXT_SPKR- D
R293 1R
SPKR1+
CODEC_SSI_WCLK
CODEC_SSI_BCLK
R294 1R
CODEC_SSI_DO
SPKR1-
CODEC_SSI_DI
CODEC_MOSI
CODEC_SCLK
CODEC_MISO
/CODEC_DAV
CODEC_/SS
CODEC_CLK
L232
9V3 BLM18PG300SN1 9d3V
B+
C232
C233
1
0.1u C285 C284
0.1u C234 +
C235
19
16
15
11
20
10
13
10uF/25V
2
5
1
0.01u 0.1u 47uF/25V
U201
OUT1+
OUT2+
OUT1-
OUT2-
VCC
VCC
GND
GND
GND
GND
SGND
TP232 1
AUDIO PA
TP233 1
TP234 1
TP235 1
1
MUTE
STBY
1V8D TP236
NC1
NC2
NC3
NC4
NC5
IN2-
SPK_SEL
IN1
R288 47K C268 0.47u R289 0
R230 3V3A
C236 0 9d3V
14
9
8
3
4
12
17
18
4
3
2
1
33
33
R2876.8K
0.1u RN230 C245 220p
R238
100*4 VAG
R232
0
R231
6
7
8
C283 R295 1K 9d3V
B- B
B OUT
B+
V+
C289 0.1u Q230
3V3D R237 120K
5
6
7
8
-+
R233 C293 C237
1
0.1u 4 3
49
48
47
46
45
44
43
42
41
40
39
38
37
C520 10uF/16V 0.47u
A OUT
0 C240 +
+-
R292
A
C239 U238 C294 R241
V-
DVSS
BCLK
WCLK
MCLK
SCLK
MOSI
SS
DAV
SDOUT
MISO
A+
A-
T-PAD
DVDD
SDIN
3
2
1
3V3A
1 36 C291
IOVDD DRVSS2 C288 5 1
2 PWR_DN OUT8P 35 U237 R286 47K
3 34 C243 1u 100p
/CODEC_RST RESET BVDD SWITCH IC UMC4N
1 R242 0 4 33 R239 6.8K
TP238 GPIO2 OUT8N 0.1u 5 VCC 6 C242 220p
TP239 1 5 32 S
GPIO1 DRVSS1 2 GND B1 1
6 AVDD2 VGND/CP_OUTN 31 C290 1u
4 A B0 3 LOW_LEVEL_MUTE
C
R243 7 AVSS2 SPKFC 30 C
8 29 Q231
3V3A AVDD1 DRVDD C247 220p
BUZZ_IN/CP_INN
C251 1u
1
0 9 NC9 SPK2 28 3 4
C248 R246 22K
MICBIAS_HND
10 27
MICBIAS_HED
MICIN_HED
12 NC12 MIC_DET 25 2
100K
2
CP_INP
AVSS1
VREF
AUX2
AUX1
VBAT
11
NC R296 1 5
U231 OP AMP
11
BB IC 13 -
UMC4N
13
14
15
16
17
18
19
20
21
22
23
24
14 C252 1u OP AMP
VAG 12 + R250 15K
R249 6 - C253 1u/25V
1V8D R251 600mV
U235D 7 HANDSET_AUDIO
0 C255 VAG 5 +
C292 100
1
C256
4
NEW 1u C295 R202 C254 220p
0.01u C262 C259 R236 100P
1u 100P R252 100K U235B
NC R280 10K 10K 9d3V
TEMP_DET TP237 1u
4
D230 ESD IC
1K R290
NC R254 9d3V
11
TEMP_DET2
C238 C200 OP AMP
30K R257 C263
R284 1u 1u C257 1u 9 - 1u
10K R258 C258 0.1u R285 R260 330mV
15k 8 RX_AUDIO
CODEC_PWT 15k
R259 10K 9d3V VAG 10 +
100
R261 R279 R283
RXAF_DO
TXAF_DI
C260 C261
10K 0.01u 0.01u 30k 30k U235C PUB_ADDRESS2_EN
C264 C265 220p
1
C266 R255 1u
4
1u 470 R262 100K
L233 C298 C299 Q232
9d3V
MIC_GROUND 3 4 R263
11
1
B INT_MIC VAG 3 +
Q233 B
BLM18BD601SN1D 1 5
C271 R264 1K
C270 U235A
5
TP4029 220P 220P UMC4N
4
R269
L235
9d3V 100K
11
EXT_MIC R268
C272 BLM18BD601SN1D C273 R267 1K C274 100K OP AMP C277
220P 220P 0.1u C276 1u
6 -
R271
1u
7 PUB_ADDRESS2
VAG R272 47K 5 +
100
EXT_MIC_EN C278
1u U236B
D231 ESD IC
4
C281
Q234 Q235 1u 9d3V
VAG
3 4 C279 1u C280 220p 3 4
11
R273 24K
R274 100K OP AMP
R276 C282
2 R275 2 R277
100K 1u
100K 47K 9 -
R278
11
8 PUB_ADDRESS1
1 5 OP AMP 1 5 10 +
100
13
11
-
UMC4N 14 UMC4N U236C
OP AMP
4
VAG 12
+
2 - VAG
9d3V R265
R266 47K 1 U236D 9d3V
3 +
1.8K
4
PUB_ADDRESS1_EN
1
U236A 9d3V
R270
+ C275 PUB_ADDRESS_MIC_EN
47K
4
10uF/16V
2
9d3V
A A
DESIGNER: LHY
Title
<Title> AUDIO
40
Size Document Number Rev
C <Doc> <RevCode>
5 4 3 2 1
5 4 3 2 1
C6100 R6100
D C6102 C6185 R6101 D
1u 0
470p 1uF 680
R6102
10
TRANSISTOR
4
L6101 3 4
Q6101
BLM18PG600SN1
2 5
RF_ATTEN 2 1 2 TRANSISTOR
C6103 1 5
3
220p TX TP
Q6100 TP6101
C6104 C6105 TP6100
R6103
GND
27K 220p
0.1u L6102
220n L6103
1
10n
C6106
TP6102
220p R6104
C6107 2.7K
C6108
220p
R6105 1000p
5.6K
TP6103 C6114
R6106 TP6104
TX TP 5p R6108
680
L6104 C6119 C6120 C6109 C6110 C6121 C6122 C6111 C6112 L6106 C6125 C6126 C6116 C6117 C6127 C6124
4.7K
Micr-L N2 1.5p 1p 6p 1p 1p
N3
2.2p 6p 6p
R6107 Micr-L N6 NC 1p 6p 1p 1.5p 1p
N7
L6107
C6113 Micr-R
D6100 1.2k C6128
2
C6123 0.1u C6115 L6217 L6216
C6118 HVC131 N17
0 N18 N19 0 220p 220p 470p
470pF D6101 D6102 Q6102 D6103 D6104
RX_in 1 2 3 1SV279 1SV279 3 N4 2 Micr-L 1 2 Micr-L 1 2 TRANSISTOR 3N5 1SV279 1SV279 3 RX_ONE
2
N1 R6123 L6105
C6194 C6132 L6214 L6215 C6129 C6130
L6114 0 C6131
2
10NH NC Micr-L 18p 100p C6244
BLM18PG600SN1 NC C6246
1
3
4
1
9V1A_RX R6109 C6133 C6245
C TP6110 D6105 R6110 6p nc C
2 1 390 4p nc
RX CV L6110 1.2K
HSM88AS
3
C6134 C6135 C6136 C6137 C6138 15n C6139 C6140 C6141 C6142C6143
C6144 C6145 RX_AFTER 56p 56p 56p 47P 47P 56p 56p 56p 47P 47P
220p 1u
U6000
OPAMP R6127
TV_APC 1 IN+ VCC 5 10K R6111 R6112
100K 100K
R6116 +
2 R6114 R6140
0 VEE
- 33
0
3 4
IN- OUT
R6113
TUHF_TONE C6146 C6147
270K 470P 0.01u
R6115
100K
L6115
9V1A_RX
1 2
C6148 C6149
470p 1u
BLM18PG600SN1 R6126 R6117
TP6105 82 82
RX TP
TP6106
C6151 C6152 C6153 C6154
C6150 470p 1.5p 1p 2p
R6118
NC L6116 R6119 MIX IC
3.3K
C6155 18n 1.2K C6157
D6106 R6120
B 0.01u R6121
C6193 L6117 L6119 L6118 100p 3 T6100 4 51 B
3
5.6
22n 22n 18n T6101
RX_LO 4 3 2 5
R6122 C6159
1
4
330
TRANSISTOR
3
4
C6172 R6138
0 0
TP6107
GND
5VA_RX 2 1
1
L6121
BLM18PG600SN1
C6190
R6131
1uF R6130
1.2K
5.1K TX TP
TX TP TP6109
TP6108
C6169
C6168
R6132 0.1u
0.1u C6170
51
R6133 9p
L6122
C6171 330
0.1uF
0.1uF C6173 R6135 C6175 C6177
L6126 C6176 C6178
3
0.1u 4.7K 0.1u 15p
IF-out C6179 0 0.01u
3
C6180 4 OUT IN 1
R6134 0.1u
0.1u
30k 0.1uF GND GND
1
3
C6174 L6123
C6182 C6181 Q6104 C6187 C6192 C6188
2
3
Q6105
R6139
56K
Title
<Title>
41
Date: Wednesday, December 08, 2010 Sheet 1 of 2
5 4 3 2 1
5 4 3 2 1
1
C471 + C405
0.1u 10uF/10V
2
R570 5VA
10k R542 0
1
C484 1000p + C509
C483 8 OUT 1 C508 C510
VCC R528
8200p 10u/16v 0.1u 100P 68K
2
7 OUT +- IN- 2
R568 R574
IN+
12k NC
6 IN- 3
R575 R577 -+ R513
2.7k 6.8k C404
0.1u
5 VEE 4 100K
1000p
R529 33K
IN+
C406
1200p OP AMP
C515
U501
R503 1K R564 0 R566 0 Final_bias
C502
C C500 C501 3300p R504 1K R565 0 R567 0 TV_APC C
33p R500 330p R501 R502 C506 C507 C521 C522 C523 C524
100K 10K 1K 0.01uF 0.01uF NC NC NC NC
MOD_H
R505 R506 R507
0 10K 0 R514 100K
MOD_L_RFCS
16
15
14
13
12
11
10
9
U500
PD REFINAB
LDAC OUTA
OUTB
DVDD AVDD
SCLK OUTC
OUTD
FS REFINCD
DGND AGND
D/A IC
DIN
CS
3V3D
1
2
3
4
5
6
7
8
1
B R508 0 B
+ C512 R509 10k
C511 C513
10u/16v 0.1u 1000P R512 10k
2
R510 10k
1 8
DAC_DIN 2 7
DAC_SCLK 3 6
DAC_FS 4 5
RN500 33*4
C516 C517 C518
100P 100P 100P
A A
Title
<Title>
42
5 4 3 2 1
D D
TP4044
TP4047
TP4051
TP4045
TP4050
TP4043
TP4054
TP4049
TP4046
TP4048
TP4053
TP4052
F_D0 R487 33
F_D1 R489 33 F_D0_LCD
F_D2 R490 33 F_D1_LCD
F_D3 R492 33 F_D2_LCD
F_D4 R515 33 F_D3_LCD
F_D5 R516 33 F_D4_LCD
F_D6 R517 33 F_D5_LCD
F_D7 R518 33 F_D6_LCD
/OE R519 33 F_D7_LCD
/WE R520 33 /OE_LCD
CS2 R521 33 /WE_LCD
F_A1 R522 33 CS2_LCD
F_A1_LCD
U302A U233
SDR_A0 A2 J8 F_A1
SDRAM.A0 FLASH.A1 F_A1 G1
SDR_A1 B2 D3 F_A2 A0
SDRAM.A1 FLASH.A2 F_A2 F1
SDR_A2 B6 C1 F_A3 A1
SDRAM.A2 FLASH.A3 F_A3 E1 J2 F_D0
SDR_A3 A1 E4 F_A4 A2 DQ0
SDRAM.A3 FLASH.A4 F_A4 D1 G3 F_D1
SDR_A4 G10 D2 F_A5 A3 DQ1
SDRAM.A4 FLASH.A5 F_A5 F2 K3 F_D2
SDR_A5 B9 F4 F_A6 A4 DQ2
SDRAM.A5 FLASH.A6 F_A6 E2 H4 F_D3
SDR_A6 G12 E3 F_A7 A5 DQ3
SDRAM.A6 FLASH.A7 F_A7 D2 H5 F_D4
SDR_A7 G11 J7 F_A8 A6 DQ4
SDRAM.A7 FLASH.A8 F_A8 C2 K6 F_D5
SDR_A8 G9 F3 F_A9 A7 DQ5
SDRAM.A8 FLASH.A9 F_A9 C6 G6 F_D6
0 SDR_A9 B12 G4 F_A10 A8 DQ6
R484 1V8D SDRAM.A9 FLASH.A10 F_A10 E6 J7 F_D7
SDR_A10 B8 G3 F_A11 A9 DQ7
SDRAM.A10 FLASH.A11 F_A11 F6 K2 F_D8
C SDR_A11 H10 G2 F_A12 A10 DQ8 C
C311 C305 C306 C307 SDRAM.A11 FLASH.A12 F_A12 C7 H3 F_D9
SDR_A12 H9 K8 F_A13 A11 DQ9
SDRAM.A12 FLASH.A13 F_A13 D7 J3 F_D10
0.1u 1u 0.01u 100p H11 H4 F_A14 A12 DQ10
SDRAM.A13 FLASH.A14 F_A14 E7 K4 F_D11
H3 F_A15 A13 DQ11
FLASH.A15 F_A15 F7 J6 F_D12
SDR_D0 D6 K7 F_A16 A14 DQ12
U232 SDRAM.D0 FLASH.A16 F_A16 D8 H6 F_D13
SDR_D1 C6 J2 F_A17 A15 DQ13
SDRAM.D1 FLASH.A17 F_A17 G8 K7 F_D14
SDRAM
D3
C7
SDR_D2 F_A18
E7
A9
B3
A7
C5 J4 A16 DQ14
J9
R441 10K
R326 10K
R353 10K
R536 SDR_A10 A9 DQ9 SDR_D10 SDR_D14 SDRAM.D13 FLASH.D2 F_D3 B2
H9 D1 D12 P2 /WE NC6
0 SDR_A11 A10 DQ10 SDR_D11 SDR_D15 SDRAM.D14 FLASH.D3 F_D4 R359 C5 L2
G2 C2 C12 P4 CS1_SRAMJ1 WE NC7
SDR_A12 A11 DQ11 SDR_D12 SDRAM.D15 FLASH.D4 F_D5 NC TP302 1 B3
G1 C1 P7 /OE CE1-ps NC8
SDR_BA0 A12 DQ12 SDR_D13 FLASH.D5 F_D6 H2 L3
G7 B2 C14 R2 OE NC9
SDR_BA1 BA0 DQ13 SDR_D14 SDRAM.DQSH FLASH.D6 F_D7
TP303 1 /CS3_FLASH H1 CEf NC10 B4
G8 BA1 DQ14 B1 D4 SDRAM.DQSL FLASH.D7 R3 RDY R356 0
SDR_D15 /SDR_CS F_D8 E4 RY/BYf NC11 F4
DQ15 A2 G8 SDRAM.CS FLASH.D8 R4 /RST_OUTR440 0
/SDR_CAS F_D9 D4 RESET NC12 G4
F7 CAS D9 SDRAM.CLKX FLASH.D9 T2 /WP R399 0
/SDR_RAS R544 SDR_BA0 F_D10 C4 WP/ACC NC13 L4
F8 RAS B3 SDRAM.BA0 FLASH.D10 T3 R442 10K
SDR_DQML 0 SDR_BA1 F_D11 3V3D D5 CE2ps NC14 B5
E8 LDQM C3 SDRAM.BA1 FLASH.D11 P8
SDR_DQMU SDR_CLK F_D12 NC16 G5
F1 UDQM NC E2 1 TP308 C9 SDRAM.CLK FLASH.D12 U1
/SDR_WE SDR_CKE F_D13 J4 VCCf NC17 K5
CK1 F9 WE H12 SDRAM.CKE FLASH.D13 U3 R444 0
VFLASH J5 L5
1 SDR_CLK F2 CLK
SDR_DQMU D10 SDRAM.DQMU FLASH.D14 T4 F_D14 VCCps NC18
SDR_CKE SDR_DQML F_D15 NC19 B6
F3 CKE C8 SDRAM.DQML FLASH.D15 V3 C310 C308 C309
VSSQC3
VSSQD7
L6
VSSQA3
VSSQB7
VSSE3
VSSJ1
CS /SDR_RAS SDRAM.WE B7
H7 U4 /OE 1U 0.1u 100P NC21
10K
SDRAM.RAS FLASH.OE G7
10K
/SDR_CAS W2 /WE
10K
10K
10K
10K
NC22
10K
FLASH.RDY/GPIO10 B8
L4 NC25
FLASH.ADV H8
M7 1 TP310 NC26
FLASH.CS0/GPIO62
R481
B L8 B
M3 CS1_SRAM
R322
R316
R482
R483
NC27
R453
R351
FLASH.CS1/FLASH.CS1L G2
Y1 VSS1
FLASH.CS1U/GPIO16 /CODEC_RST J8 M8
FLASH.CS2/FLASH.BAA/FLASH.CS2L M4 CS2 VSS2 NC28
FLASH.CS2U/GPIO5 P3 PWB
FLASH.CS3/GPIO3 N8 /CS3_FLASH
FLASH.RP/FLASH.CS2UWE W1
1V8D N3
FLASH.CLK/FLASH.CS2UOE FLASH
RST_OUT/GPIO41 AA20 /RST_OUT
M8 BE1
FLASH.BE1/FLASH.CS2UWE/GPIO60 BE0
FLASH.BE0/FLASH.CS2UOE/GPIO59 L3
OMAP
3V3D 1V8D VFLASH
NC R281
0R R282
A A
DESIGNER: LHY
Title
<Title> MEMO
43
C <Doc> <RevCode>
5 4 3 2 1
5 4 3 2 1
D D
19.2_OMAP 3V3A
1
R414 10
R419
+
C338 nc C336 C401
1000p 0.1u 10u/16V
TP309 C364 39p X302
2
CLK 4 1
TP377 VCC VT
L151 C337 R426
C375 C376 OSC 0
3 2
3
12p
1
OUT GND
12p L147 470n
X375 470n
1000p
1
C365 19.2MHz TCXO
SSP-T7-F C362 C363
R375 82p
82p 82p
4
0 R374
OSC32
1 0
AA13
V13
P13
W3
U302C
Y2
OMAP
1V6D
OSC32K_OUT
OSC1_OUT
OSC32K_IN
CLK32K_IN
OSC1_IN
Y13 VSS CVDD A15
3V3D CVDD M2
J374 R382 10K 1V6D 1V6D
R19 GPIO1 CVDD Y9
1 3V3D J20 MPU_BOOT CVDD Y20
2 GPIO13 R377 10K AA3
CVDD1 C382 C383 C384 C385 C379 C380 C381 C378
N19 GPIO13/LCD.BLUE0 CVDD2 A3
CON2 R378 10K A9 0.1u 0.1u 0.01u 100p 0.1u 0.1u 0.01u 100p
CVDD2
C 3V3D W19 BFAIL CVDD2 E2 C
TP374 1LOW-PWR R379 10K T20
R380 33 LOW_PWR
U20 MPU_RST CVDD3 B13
/PRST R12 PWRON_RESET CVDD3 B20 1V6D
C356 0.1u R381 33 J21
R383 1K CVDD3
V18 CONF CVDD3 R20
VOTG_DET W15 GPIO40/BCLKREQ 1V6A 1V6D
CVDDRTC W12
3V3D R385 10K R10 L913
GPIO23/MCLKREQ R386 10
CVDDDLL A11
RTC_ALARMB P12 C386 BLM18PG300SN1
VSS 0.1u MMBZ5V6ALT1G
TP375 CVDDA Y21
C339 100p TP376 3V3D_OMAP
MCLK BCLK D236
DVDD1 A19 R388 10
R387 33
1
V5 E21
1
1
VBUS_DEC W10 MPUIO11 DVDD4 B10
B14 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u MMBZ5V6ALT1G
DVDD4 100p + C402
W9 VFLASH 10uF/16V D234
RESET_BT/SYSTEM_SYNC GPIO25/MCSI2.DOUT
DVDD5 C2
2
JTAG DVDD5 H2
DVDD5 R1
/TRST Y18 3V3D_OMAP
TMS TRST
2 1 V17 TMS DVDD6 AA11 VFLASH
TDI 1V8D
4 3 Y19 TDI DVDD7 Y16
R391 6 5 L21
TDO DVDD8
10K 8 7 AA19 TDO DVDD9 U21 C400 C341
RTCK C398 C399 C335
10 9 Y17 RTCK DVDDRTC V12 0.1u 100p
TCK 0.1u 0.01u 100p MMBZ5V6ALT1G
12 11 W18 TCK
14 13 EMU0 V16 J1 D239
EMU1 EMU0 LDO.FILTER
W17 EMU1 C396
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1u
J375
R392 R393 R394 R395 R396
B B
10K 10K 10K 4.7K 4.7K
A13
A21
B1
B5
B7
B16
F20
G1
K2
K20
N1
R21
U2
W20
Y3
AA1
AA7
AA21
3V3D
C334
0.1u
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
44
C <Doc> <RevCode>
5 4 3 2 1
5 4 3 2 1
TP326
100p C326
100p C342
C343
R323 R325 U302B
OMAP
10K 10K
100p
1
D 3V3D N15 MPUIO2/SPIF.CS1/UWIRE.CS1 LCD.P0 D18 D
U322 R357 33 T19 B21
R329 R330 98_PE 33 MPUIO4/SPIF.CS2/UWIRE.CS2/LED2 LCD.P1
0 1 14 33 R327 U19 C19
DVDD_IO SLC/SPC I2C_SCL 98_PC R324 33 MPUIO1/SPIF.SCK LCD.P2
2 13 W21 G14
R334 10K GND SDA/SDI/SDO I2C_SDA 98_PD R347 33 GPIO46/SPIF.DOUT/UWIRE.SDO LCD.P3
4 IADDR0 SDO 12 33 U18 GPIO47/SPIF.DIN/UWIRE.SDI LCD.P4 H13
C321 5 11 R332 C355 100p 98_DOUTB C358 100p V19 A20
GND RESERVED MAP_GPIO_6 MPUIO1/UWIRE.SCLK LCD.P5
0.1u 6 9 1 B19
AVDD INT2 TP321 100 LCD.P6
7 8 ACCEL_INT1 R346 M14 C18
NC1
NC2
CS INT1/DRDY PLL_LD 100 GPIO2 LCD.P7
PLL_CLK R337 M15 D17 R403 100
R335 10K 33 100 GPIO7/MCSI1.CLK LCD.P8/GPIO29 FL_Control
R336 PLL_STB R338 W8 D16 R404 100
GPIO9/MCSI1.SYNC LCD.P9/GPIO30 R406 100 LP_Control
NC MAP_GPIO_2 V15 C17
3
10
R339 100 GPIO56/MCSI1.DIN LCD.P10/GPIO31 R410 100 TX_VCO_H
PLL_DATA W14 GPIO18/MCSI1.DOUT LCD.P11/GPIO32 B17 TX_VCO_L
G13 R411 100
LCD.P12/GPIO33 RX_VCO_H
R14 A17
C346 100p
C344 100p
100p
C351 100p
C349 100p
100p
C354 100p
C352 100p
GPS_UART1_TXD GPIO38/UART1-IRSEL LCD.P13/GPIO34
Y14 UART1.TX/UART1.IRTX LCD.P14/GPIO35 C16
GPS_UART1_RXD V14 D15
GPIO37/UART1.RX/UART1.IRRX LCD.P15/GPIO2
AA15 B15
C345
C350
MMP_GPIO_0/PwrOn GPIO39/UART1-IRSHDN LCD.AC
LCD.HS C20
UART2_TXD V6 GPIO17/UART2.TX LCD.PCLK C15
R9 B18 3V3D
UART2_RXD GPIO18/UART2.RX LCD.VS R413 33
LCD.RED0/GPIO14 N21 RF_ATTEN
100p
3V3D 3V3D WAKE_BT/OPT_GPIO1 N14 GPIO45/UART3.TX/SPIF.CS0/MCBSP3.CLKX
CODEC_/SS P15 GPIO44/UART3.RX/SPIF.CS3/UWIRE.CS3
C353
R488 R511 R499
C322 12p T18
R340 10K
10K
R342 10K
R343 10K
I2C_SDA GPIO48/I2C.SDA KP.R4/MPUIO15 /CODEC_DAV
X321 KP.R3/MPUIO13 E20 ACCEL_INT1
33
R341
100p
100p
100p
MAP_GPIO_3 GPIO0/USB.VBUS KB.C3/GPIO63 KB_C3
NC W5 C21
MAP_GPIO_8 MPUIO5/MPUIO12 KB.C4/GPIO27
MAP_GPIO_7 V8 MPUIO3/MMC2.DAT1 KB.C5/GPIO28 G19 S/P_CLOCK
V9
C359
C360
C361
GPIO7/MCSI2.SYNC 33 R402
C
RST_CTRL V10 MPUIO10/MPUIO7 GPIO62/MCBSP1.CLKS G20 RX
C
V11 G21
C347 100p
MMP_GPIO_3/PTT GPIO57/MMC.CLK GPIO54/MCBSP1.CLKX CODEC_SSI_BCLK
TDMASLOT_OUT Y8 GPIO8/TRST GPIO53/MCBSP1.FSX H15 CODEC_SSI_WCLK
EXT_PTT AA9 GPIO26/MCSI2.DIN GPIO51/MCBSP1.DR H20 CODEC_SSI_DO
ACC_IO3 Y10 GPIO27 GPIO52/MCBSP1.DX H18 CODEC_SSI_DI
3V3D P11
IGN_SENSE GPIO55/MMC.CMD
1 2 R422 1K MPUIO6 W11 L19
MPUIO9/MPUIO6 CAM.D0/MPUIO12 SPK_SEL
D601 LED OPT_BRD_PTT P18 GPIO3/MCBSP3.FSX/LED1 CAM.D1/GPIO29 K14 UART3_RTS_BT
R11 K15 UART3_CTS_BT
TP4027
EMERGENCY GPIO58 CAM.D2/GPIO30
MMP_GPIO_4/HOOK R13 GPIO36/CLK32K_OUT/MPUIO0/UART1-TX CAM.D3/GPIO31 K19 UART3_RXD_BT
TP325 1 Y4 UART2.BCLK/SYS_CLK_IN CAM.D4/GPIO32 K18 UART3_TXD_BT
CAM.D5/UWIRE.SDI/GPIO33 J14 CODEC_MISO
MCBSP3_CLKX W16 GPIO42/MCBSP3.CLKX CAM.D6/UWIRE.CS3/GPIO34 J19 S/P_CSLED
MCBSP3_FSX N18 GPIO12/TIMER.EXTCLKMCBSP3.FSX CAM.D7/UWIRE.CS0/GPIO35 J18 S/P_CS2
MCBSP3_DR AA17 MCSI1.SYNC/MCBSP3.DR
P14 H19 R354 33
MCBSP3_DX GPIO43/MCSI1.CLK/MCBSP3.DX CAM.EXCLK/UWIRE.SDO/GPIO57 CODEC_MOSI
CAM.HS/GPIO38 L15 S/P_DATA
P19 J15 R355 33
S/P_CS1 GPIO6/MCSI1.DIN/TIMER.EVENT3 CAM.LCLK/UWIRE.SCLK/GPIO39 CODEC_SCLK
WAKE_HOST/OPT_GPIO2 P20 GPIO4/SPIF.DIN/TIMER.EVENT4 CAM.RSTZ/GPIO37 M19 ACC_IO1
L18 C357 100p
R358 10 CAM.VS/MPUIO14 AUDIO_PA_EN
USB_D- R8 USB.DM/I2C.SCL/UART1.TX/Z
USB_D+ P9 USB.DP/I2C.SDA/UART1.RX GPIO50/PWTTIMER.PWM0 M18 CODEC_PWT
R360 10 M20 R421 100
PUEN GPIO15/TIMER.PWM2 R376 33 RX_VCO_L
W4 L14
R361 15K
R362 15K
USB.PUEN GPIO49/PWL/TIMER.PWM1 TX
R401 1.5k GPIO11/HDQ N20 ACC_IO2
L1 NC2 GPIO7/UART2.RCV Y5 PWR_CTRL
E5 NC1
C348 100p
W321
ANTENNA
TP4038
TP4014
TP4026
B B
2 3
3V3D
1
U327
3V3D C329 0.1u
5Oohm䍄㒓 LOW_LEVEL_MUTE 1 16
QB VCC
PUB_ADDRESS_MIC_EN 2 QC QA 15
3V3D R363 0 R364 0 R367 33
3 14 S/P_DATA
TP4033
TP4034
R366 10K
+
TXB RF_IN L321 LOGIC IC 1 2
3 3 PPS GND 18
R349 33 GPS_UART1_RXD R368 33
2 4 TXA RF_OUT 17
R350 33 GPS_UART1_TXD R384 NC C330 3V3D
CON5 1 33
5 RXA BOOT 16 39nH+/-0.3nH
R370 21 GND GND 22
6 15 0.1u
GPIO[10] GPIO[13] R397 NC L322
GPS_UART1_RXD 7 GPIO[0] GPIO[15] 14
8 13 BLM18PG300SN1 3V3DP
GPIO[1] GPIO[14] R532 R531 R530
GPS_UART1_TXD 9 12 10K 10K 10K
RF_PWR VIN_3V3
10 ON_OFF V_RTC_3V3 11
1
100
0
3VRTC
2
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
5 4 3 2 1
5 4 3 2 1
R539 10K
R538 10K
R541 10K
R540 10K
R543 10K
C482 C481 C409 C410 C411 C412
C413 C414 C415 C416
100p 100p 100p 100p 100p 100p J400
22 21 100p 100p 100p 100p
R456 33 2 1 R423 33
I2C_SDA R457 33 R424 33 WAKE_HOST/OPT_GPIO2
I2C_SCL 4 3 WAKE_BT/OPT_GPIO1
MCBSP3_DR R425 33 6 5 R431 33
D RESET_BT/SYSTEM_SYNC D
MCBSP3_CLKX R412 33 8 7 R408 33 OPT_BRD_PTT R400 10K
MCBSP3_DX R430 33 10 9 R415 33 3V3D
MCBSP3_FSX R420 33 12 11 R416 33 UART3_TXD_BT
14 13 R409 33 UART3_RXD_BT 3
16 15 R432 33 UART3_CTS_BT
TXAF_DI
RXAF_DO 18 17 R433 33 UART3_RTS_BT 1 R460 1K
AUX_C
5VD R407 0 20 19
24 23
Q323
C480 C479 2 DTC114EE
C407 CON2X10
C417 C418 C477 C478
100p 100p
0.1u 100p 100p 100p 100p
3V3D
R461 10K
R462 10K
R463 10K
R464 10K
R465 10K
MAP_GPIO_8
MAP_GPIO_7
MAP_GPIO_3
MAP_GPIO_6
MAP_GPIO_2 3V3D
3
2
3V3D U328 PRGM_OUT8
PRGM_OUT7 EMERGENCY_IN
16 VCC QB 1 R439 100
R477 1K 15 2 PRGM_OUT3 IGN_SENSE
R474 33 QA QC PRGM_OUT6
C S/P_DATA 14 A QD 3 ALARM C
3V3D R475 nc 13 4
R473 33 OUT EN QE
S/P_CS2 12 LATCH CLK QF 5 ALARM 5VD 5VD
R467 33 11 6
S/P_CLOCK SHIFT CLK QG VBUS_EN R4964.7K 5VD 5VD 5VD EXT_SWB+
3V3D R466 10K 10 7 5VD
RESET QH
9 SQH GND 8
R446
NC
R472
LOGIC IC 5VD
4.7K
3 R471 R469
R443 10K 3
R447 10K R468 4.7K
R470 4.7K
3V3D 1 4.7K R449
1
2
R445 100 4.7K Q400
EXT_PTT
1
1.0V 1.5K
1
Q406 MUN5214DW1T1
Q407 MUN5214DW1T1
5VD Q405 R448 4.7K
Q409 MUN5214DW1T1
Q410 MUN5214DW1T1
1
Q408 MUN5214DW1T1
2 DTC114EE R1 R1 Q401
R2 R2
R1 R1 R1 2 DTC114EE
R437 4.7K R2 R2 R2 R450 2SA1362
1
2 3
2.7K
3
MUN5214DW1T1
1
R428 4.7K
R1 R2 R2
3V3D 1 R563 33k R2 R2 R2
R2 R1 R1 3
R1 R1 R1
Q404 Q402 1
R427 10K
6
R2 DTC114EE
6
Q411
R547470
R55933k
R1 R551 R546 470
R548 470
R558 33k
R549 470
R560 33k
470 2
R56133k
R562 R550
R557 100
33k
6
ACC_IO3 470
5VD D405
C434 C436
1
MMBZ20VALT1G
R435 4.7K
R2
R1 D233
MMBZ20VALT1G
B B
R556 100
6
D409
ACC_IO2
3V3D 5VD
R452 10K U401 USB_VBUS D404
C421
3 2 220p MMBZ33VALT1G
R451 10K FAULT GND MMBZ20VALT1G
VBUS_EN 4 ON
5 IN OUT 1
VBUS_DEC SMART SWITCH
PUB_ADDRESS2
RX_AUDIO
PUB_ADDRESS1 7.0V R455 100K
EXT_MIC
EXT_SPKR+ IGN_SENSE_IN
EXT_ALARM_OUT
EXT_SPKR-
PUB_ADDRESS1
PUB_ADDRESS2
EMERGENCY_IN
1 2 L417 BLM15AG121SN1
IGN_SENSE_IN
PRGM_IN_PTT
USB_D-
EXT_SWB+
PRGM_IO2
PRGM_IO3
PRGM_IO7
PRGM_IO8
CM2-2012MCIN-181T
R478 nc
UART3_TXD_BT D450
2
R480 nc
UART3_RXD_BT PRTR5V0U2X
GND I/O1
VCC I/O2
C476 C474 C426 C427 C428 C429 C430 C431 D240 D238
NC NC 100p 100p 100p 100p 100p 100p
MMBZ20VALT1G MMBZ6V8ALT1G
1
19
10
11
13
15
18
17
16
24
23
25
12
21
22
14
20
26
27
28
1
4
6
9
8
7
2
5
USB_D+
V_BUS
EXT_SWB+
EXT_SPKR+
PRGM_IN_4_EMERGENCY
PRGM_IN_PTT
PRGM_IN_5_IGN_SENSE
PRGM_OUT_9_EXT_ALARM
USB_D-
USB_GROUDN
ACC_MAP_ID_2
ACC_MAP_ID_3
AUX_AUDIO_OUT_1
PRGM_IO_6
AUX_AUDIO_OUT_2
TX_AUDIO
POWER GROUND
EXT_SPKR-
Audio Ground
RX_AUDIO
GROUND2
GROUND3
PRGM_IO_3_CHAN_ACT
PRGM_IO_7
PRGM_IO_8
GND1
GND2
PRGM_IO_2_MONITOR
5VD
R476 10k
A J403 A
MAP26
DESIGNER: LHY
Title
<Title>: peripheral
46
Size Document Number Rev
C <Doc>
<RevCode>
Date: Wednesday, December 08, 2010 Sheet 6 of 14
5 4 3 2 1
5 4 3 2 1
D D
C465
TP4015
100p
SPK+
TP4001
TP4002
TP4005
TP4006
TP4009
TP4010
TP4011
TP4041
TP4013
TP4017
TP4019
TP4020
TP4021
TP4022
TP4023
TP4024
TP4025
3V3D
C464
C460
C461
C462
100p C463
C470
C472
C473
TP4007
TP4008
C468 C439 C438 C441 C440 C435 C420 C419
USB_VBUS R494
NC
NC
NC
NC
NC
NC
100p 0.47u 0.47u 100p 100p 100p 100p 100p R555
0.1U
J404 NC 10k
1 INT_MIC_MMP INT_MIC
2 MIC_GND MIC_GROUND
3 ACC_IO1_MMP R554 1k ACC_IO1
4 USB_VBUS
5 HOOK_MMP HOOK
6 PTT_MMP PTT
7 USB_D- L414 BLM15AG121SN1 3 4 USB_D-
8 USB_D+ L415 BLM15AG121SN1 L413 1 CM2-2012MCIN-181T
2 USB_D+
C 9 Pwron_MMP Pwron C
10 UART2_RXD R534 10K
UART2_RXD
11 UART_TXD R535 10K UART2_TXD
12 SPKR1+ HANDSET_AUDIO
13 SPKR1- SPKR1+
14 HANDSET_AUDIO SPKR1-
15 5V 5VD TP4030
16 /RST_OUT R495 33 /RST_OUT
17 KB_C0 R498 33 KB_C0
18 KB_C1 R486 33 KB_C1
19 KB_C2 R491 33 KB_C2
20 KB_C3 R485 33 KB_C3
21 KB_R0 R523 33
KB_R0
22 KB_R1 R524 33
KB_R1
23 KB_R2 R525 33
KB_R2
24 S/P_CSLED R526 33 S/P_CSLED
25 S/P_CLOCK R527 33 S/P_CLOCK
26 S/P_DATA R533 33 S/P_DATA
27 /OE_LCD L411 BLM18PG300SN1 /OE_LCD
28 /WE_LCD L412 BLM18PG300SN1 /WE_LCD
29 CS2_LCD L410 BLM18PG300SN1 CS2_LCD
30 F_A1_LCD L407 BLM18PG300SN1 F_A1_LCD
31 F_D7_LCD L409 BLM18PG300SN1 F_D7_LCD
32 F_D6_LCD L408 BLM18PG300SN1 F_D6_LCD
33 F_D5_LCD L406 BLM18PG300SN1 F_D5_LCD
34 F_D4_LCD L405 BLM18PG300SN1 F_D4_LCD
35 F_D3_LCD L404 BLM18PG300SN1 F_D3_LCD
36 F_D2_LCD L403 BLM18PG300SN1 F_D2_LCD
37 F_D1_LCD L402 BLM18PG300SN1 F_D1_LCD
38 F_D0_LCD L401 BLM18PG300SN1 F_D0_LCD
39 GND
40 PWR_KEY PWB_IN
41
4
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
NC
NC
NC
42
C469
CONTROL HEAD 100p
C446
C444
C449
C451
C450
C448
C445
C447
C442
C443
C453
C454
C455
C456
C452
C457
C458
C459
C466
C467
D408 D407
TP4028
B B
3
TP4018
TP4055
GND
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
47 Size
C
Date:
Document Number
<Doc>
5 4 3 2 1
5 4 3 2 1
2
U901
BLM41PG600SN1
C902 + D900 TP4035 RP102N331B 3V3DP
2
C903
470p/50V 1 5
VDD VOUT
L900
470uF/25V 2
MR2835SKG
2
D
C905 GND C906 D
B901 5VA 3 4
1
1u CE NC 1u
1
9V3 L904 U905
BLM18PG181SN1D XC6209F502PR C925 U903
1
L930 10uH 4 XC6209F182PR L901 1V8D
U902 D901 Vin Vout 5
1
3
BST C907
2
14 IN R924 1K 1u
1
2
3
0.1u 3 CE Nc 1
17 BP L902 3 CE Nc 1
16
CE
5 VOUT VDD
GND
LX7
RP102N331D
2
LX6 15
10uH C911
7 EN LX5 5
4 C960
LX4 D902 330p
U909
R911
4 NC
1
1
47uF/25V LX1 1 R912 L931
2.2u/25V 1 10 4.7uH 1V6D
VIN PGND
1
C947 0.1u 510 C951 C915 4.7uH
2
1
0.1u 4 7
22uF/10V
10uF/25V
0.1u 10uF/16V 0.1u 4.7K PG SYNC
2.2u/10V 9 R951 1.5K + C946 5 6 +
C917 C918 C919 C932
2
OS 1u FB LBI R917
10uF/16V 2.2u
11 R981 NC TPS62050 22p 330K 1% 10uF/16V
2
FB R918
C921 220p
10 6.04K 1%
GND
C928 C910
1
10u/16v 1000p
R952 + R906
PWR_ON 47k R908
1
24K
2
3
1 2 4.7K
D918 Q920 RX 1
C C
NC D45H8G 9V3 Q903
L940 L916 DTC114EE
BLM41PG600SN1
1 2 3 2 1 2
1
1
C980 2
C950 + + BLM41PG600SN1 +
C956 C957
0.1u D915 C955 C958
10uF/25V 10uF/25V 10uF/25V
1SS372 0.1u 0.1u
2
2
R958 U915 U918
1
3V3D
R953 XC6209F502PR 5VA_FGU XC6209F332PR 3V3A_FGU
680 R962 R964
4 Vin Vout 5 4 Vin Vout 5
10
1
R961 0 2.2K 1%
1u 2 C963 2 C965
6
R963 C952 0.01U R971 2.74K 1% Vss C926
+ Vss U910
330 0 R972 C962 2.2u
0.1u R932
VDD
2.2k 10uF/16V /PRST1
2
3 1 3 1 4.7K
CE Nc CE Nc 5 D913
2
2
3
R954 1K SENCE
1 2 1 /PRST
1
RSET
A-
A+
V-
3
A OUT
Q921 R965 0
+-
C937 MR MBRM120LT1G
A
GND
PZT2222AT1 U914 R982 100k 1000p 4
-+
CT
B- B
B OUT
NJM2904V
V+
C941
B+
3
TPS3808G33DBVT
2
D917 0.15u
3V3D
8
7
6
UDZSTE(175.1B)
1
R969
R966 3
47k
150
R970 1k 1 R950
3
10K
R968 2.2k
1 R948 R967
PWR_ON Q923 3 VOTG_DET
2 D910
DTC114EE 100 0
Q922 2 1 1
DTC114EE Q913 U906
2 R949 C945
UDZSTE(1715B)15V DTC114EE 1 8 D912
47K 470p MR WDO
R931 3V3D 2 VCC /RST 7 2 1
47K 2 3 6
B C978 GND WDI MBRM120LT1G B
U917 4 PFI PFO 5
0.1u R983 0
2 TPS3705-33D RST_CTRL
VDD R929 100
OUT 1
4
GND
R934 NC
5 NC1
47K
R3111N421A 3 R977
nc
Q905
R930
3 4 PWR_ON
PWR_CTRL_594 1 2 R984 220 15k C942 M7 M8 M9 M10 M11 M12 M13
D914 HVC131TRF-E 0.1u
PWR_CTRL R978 1K 1 2 R933 220 2
1
D909 HVC131TRF-E
2
2
C967 R957
U913 D904 1 5
0.1u R976
EDZTE613.6B
3VRTC
EDZTE613.6B
D235
LM317L(nc) RB521S30T1G(nc) 1K
D241
10K
1 2 1 2 3V3D
IN OUT1 UMC4N
OUT2 3 R975
2
6
1
NC1
NC2
OUT3 20K
ADJ
3
4
5
8
2 3 1 2
R941 Q1
1
+
R939 2SK1824 1 2 1 IGN_SENSE_IN
0.1u 4.7K 1 180k
1
R940 Q908
1
2
1k 22uF/16V
EMERGENCY_IN DTC114EE 3V3D
2
R956 R959
U912 22K D911
R979 2 180K 47k
ML414RF9AE ℸ໘㒓ᬍ HVC131TRF-E
10K
2
Q910
A A
MMBT3906LT1 D907 R945
1
Q909
F900 L917 EXT_SWB+ 2 3 1 2 10K
2SB1184
3 2 1 2
HVC131TRF-E R947
C969 3
LITTELFUSE04662 R942 PWB
C944 0.1u
4.7K 1K
R943
1
48
2 C <Doc>
<RevCode>
Date: Tuesday, May 10, 2011 Sheet 8 of 14
5 4 3 2 1
5 4 3 2 1
5VA_FGU
L156
3.3UH R175
10
1
C82 C89
C1010 + C1009 1000p 0.1u
1000p 1u/16V
L8
2
3V3A_FGU
601SN1
2 1
L7
C80 601SN1 C83
0.01U 1 2 0.1u
1
L6
601SN1
C86 C121
0.1u 100p
2
PLLLD U100
R177
TP121 sky72310 R109 TP116 TP118 TP120
10K C93 10 PLLDATA PLLSTB PLLCLK
100p 1 24
R181 VCCecl/cml Mux_out
1
Fin 2 Fvco_main NC23 23
1K
1
C PLL_LD 3 C
Fvco_main R167 33
C90 Clock 22 PLL_CLK
1
C95 100p 4 LD/PS_main CS 21 PLL_STB
5 20 R178 33 PLL_DATA
0.01u D100 VCCcp_main Data
6 R1110 33
BA277 CPout_main
VCCdigital 19 C1320 C77 C76
R171 R187 C1002 7 NC7 NC18 18 100p 100p 100p
2
0 82 1000p 8 17
Xtalacgnd/OSC NC17
PowerPAD
TP124 CV 9 16
C124 C132 Xtalin/OSC NC16
CV C122 C1017 C1016 10 15
nc 0.1uf R111 C123 0.1uF Xtalout/NC NC15
R180 NC 0.1uF 11 VCCxtal NC14 14 C98
100 0.1uF
10k 12 GNDXtal NC13 13 0.1u
C97 C96
1
25
C87 FSA66P5X
0.1u
5 Vcc Vin 1
OUT 2
FL_Control 4 ON/OFF GND 3
R183 C75 R3 R6 R182 R114
1K 1000P 0 0 nc 56 L149
NC
19.2_AD9864 3V3A_FGU
R5 R4
5VA_FGU C65 100
0 U102 NC
FSA66P5X R188
1
0
5 1 L150 C85 C1013
Vcc Vin +
R168 2 NC 0.1u 10u/16V
NC OUT 19.2_OMAP
LP_control 4 ON/OFF GND 3 TP119
2
C79 C81 R166 MOD_L
1000P C1004 NC NC
TP110 33P R174 R2
X100
REF
1
0 0
4 VCC VCONT 1 MOD_L_RFCS
1
3 2
L154 OUT GND R184
5VA_FGU 4V3A C1000 0.56u C99 DSA535SD NC
220p 270p
B REF OSC B
C1006
1
NC NC C1005 C78 C94 C1007 C91 C88 C70 C74 C84 C72 C67 C69 C68 C66 C64 C103 C105 C104
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U nc nc nc
2
C1001 + C71
470p 1u/16V
2
A A
DESIGNER: ZDW
Title
<Title> PLL
49 Size
C
Document Number
<Doc>
<RevCode>
Rev
5 4 3 2 1
5 4 3 2 1
3
D101 C198 C196
3.6p 7p
1SV305
21 2
Q100
C13 C27 C193 2SC5010
L108 D116
0.5p
1
470nH 1SV305 3.6p C26 33p C185 R185
21 3.6p 56p 5VA_FGU nc
L105 Q117
8n TX
EMD22
C184 D127
220p D111 4V3A 3 4 DAN222
L106 R157 Q105
1SV305 L107 EMD22
2 2 27n 2 1 5 1
D102 470n 601SN1 TX_VCO_H
D117 C191 3 4 2 3
1SV305
1SV305 18p 2 TX_VCO_L
5
1
4V3A 2 TX_VCO_L 6 1
R139
C136 82
2
4.7u R128 R117 6 1
82K 39K L131
601SN1
R149 R147
C145 C143 NC 100
C144 R120
1
NC NC 39K NC
220p
R163 R164 R146
2
C147 C199 C1 C101 C2
C163 NC NC 100 L132 3P TP111
R151 1.5P
MOD_H 0.1u L148 0.01U 1000p 27NH TX_LO
R131 15k
1
NC
3.3k
TP108 L4 C107 C11 L2 L136
C8
1
MOD_H C40 C41 R191 nc 4P 15NH 15NH
1
470n 470p nc
C37 C38 NC NC R152 L135 TX_LO
36K
3
C186 R140 NC NC 27NH C14
220p C106 C17
C141 C142 100 R173 nc 10p 12P C16
R138 nc 1 C15 TP114
470p Q107 6P GND
3
0.1u 8.2k U105 10p
C C166 C34 C35 C39 R141 PBR941 C
L110 5p R122 100P 1 8 NC
470n 27 NC Vcc1 Vcc2 47
1
2 7 1 Q102
2
C181 IN OUT C19 R155
3 IN SW2 6 2SC5108Y L138
3
0.5p 4 5 NC 20k
D105 C152 C151 GND SW1 R150 R162 27nH
9p C36 C21 R156
1SV305 4p R129 R135 L168 NC NC 470P 68
2
21 2 220 27NH NC NC R161
220 18K
Q103
C159 2SC5010
L112 D112 C153 C157
1
R137
82
Q108
R179 EMD22 4V3A
601SN1
3 4
CV C29
C30 5
R158 0.1u
6.8k L117 220p 2 RX_VCO_H C178 C179
470n 2P 1P
C46 6 1
R160
220p
C7 100
C6 L128 L122 L123
0.1u R159 15NH
220p 15n 15NH
7.5k Fin
L121 C32
5p
470n C190 C192
C189 NC
12P NC
3
R144
120
2
L9
R154 601SN1
R190
NC 100
1
C150 C167
R169 R165 R148
220p 0.1u
2
1
C43 C45 15k 6P 18NH 220p
1
3
C52 1.5P NC NC R199 27NH C20 C59
220p R196 TP122
100 120K 10p 12P
C149 C148 C61 C22 GND
R194 1 8P
0.1u 470p Q109
3
7.5k U107 12p
C33 C48 C47 PBR941
L134 C168 R123
1
5p 100P NC 1 8 NC R1
470n 27 Vcc1 Vcc2 47
2 7 1 Q111 C54
2
IN OUT L166 R195
3 IN SW2 6 2SC5108Y
3
C155 NC 20k
D109 C164 C51 4 GND SW1 5
R170 R172 27nH R197
5p 12p R136 L167 C57
1SV305 R130 NC 0
2
21 NC NC NC
A 2 220 220 27NH NC R189 A
NC
Q110
C165 2SC5010
L133 D125 C154 C161
4p
1
<Title> VCO
R192
50
120 Size Document Number Rev
Custom<Doc>
<RevCode>
Date: Wednesday, May 11, 2011 Sheet 10 of 14
5 4 3 2 1
5 4 3 2 1
D D
TP703
TP702 IF
GND
1
1
TP704
C701
330n C703 2FLO
0.01u
3P
TP701 IF-out
1
L716
C743
TEST POINT
47p
C702
1
0.01u
L701 L702 601S
1 2
1 2
L703 C742
R724 0 C704
1 601S 2 C705 1u
0.1u 220P
R701 C706 9V3A
51 601S
470p
C707 TP709
2
R703 L717
0.1u 5VA_RX
2.2k 5VA_RX L706
C709
C708 601S
0.1u C710 1000p C718 C717
0.1u TP705 Q702 U703
1
L704 L705 C711 6.8uH
R704 CV2 1u 470p 2SC4617 POWER IC
10u 10u C712 NC C713
1
0.1u 560 3900p 1 3 5 Vout Vin 4
48
47
46
45
44
43
42
41
40
39
38
37
C716
1
R727
1
R708 Vss 2 C752
47k 10u/16v +
VDDI
GNDI
LOP
VDDP
GNDP
CXIF
CXVM
CXVL
VDDL
IOUTL
IFIN
LON
C715 R709 4.7k C746
180p 0.47u R707
2
10k 470p
180 1 3
2
Nc CE
1 MXOP GNDL 36 Q701
1
C C
C720 0.1u
3
2 MXON FREF 35 C723 C724 TRANSISTOR C725
3 34 + C726 R728
C721 GNDF GNDS R705 10K 15p 18p 10u/16v C727
C722 4 33 47k
L707 100p IF2N SYNCB 2 0.01u 470p
100p 5 32
601S
2
IF2P GNDH R711 33
U701 3198_FS1
1
1 2 C728 6 VDDF FS 98_FS C731 C730
1000p 7 GCP DOUTB 3098_DOUTB1 R717 33 6p L708 22p C732 3V3D
C729 IF IC 2998_DOUTA1 98_DOUTA 3V3D_RX
1
8 GCN DOUTA D701 220n(HQ) R710 22p TP710
0.1u 9 2898_CLKOUT1 R715 33 98_CLKOUT HVC350B 8.2k
10
VDDA CLKOUT
27 1 2 3V3D_RX 3V3A_RX 3V3A_RX U702
GNDA VDDH R730 R726 POWER IC
2
11 VREFP VDDD 26 C719 C735 C734 R712 NC NC
2
L709
1
C736 12 VREFN PE 25 30p 2 1 5 VOUT VDD 1
L711 1u 601S 270
1 2 49 2
IOUTC
0.1u L712
GNDQ
PowerPAD GND
GNDC
GNDD
GNDS
VDDQ
VDDC
RREF
CLKN
CLKP
601S C737 4 3
L710 601S NC CE
0.1u
PC
PD
601S L718
100k
470n
C749
1 2 39P
1
TP707 L713
18M 0.56u
C747 22P C751 10p C714
L715 3.3u
10p
1
C744 98_FS1
0.1uF R716 5.6k C745 98_DOUTB1 R725 33
98_DOUTB
56p 98_DOUTA1
1
98_CLKOUT1
C748 98_PE1
0.1u R718 98_PD1
510 D702 98_PC1
HVC376B
2
A A
DESIGNER YYF
Title
<Title> IF
51
C <Doc> <RevCode>
5 4 3 2 1
5 4 3 2 1
2 1
C909 C889 C913 C888 C825 C885 L801
C855 47pF 470p BLM41PG600SN1 W801
1
100p 3300p 0.018uF
33p
33pF 2 1 C916 C930 C931 C940 C943 ANTENNA
C801 C802 C803 + C804
L803 47u/25V 3300p 0.018uF 33p 33p 3300p
R812 Gate_1
D L804 BLM41PG600SN1 1000p 3300p 33pF TP801 D
NC
2
3T/16nH 1 4
R807 C820 2 3
C833
C810 4.7 12pF
1
C815 4pF
47pF C821 C816
W= 3mm 220pF R804
5
NC 2p Directional Couple
4.7
1
L= 5.5mm
w=3mm,
C8330 C841 L807 C817
M801
L=5.5mm R806 Q802 3
Z= 8ohm
Z=8 4.7 MOSFET
22pF 8pF
C823 C824 C856 C876 C879
100nH 470pF
C827 Fcouple 4 4
2 L809 L813 L810
10pF NC 8pF NC NC 470p
L808 3T/16nH 3T/16nH 3T/16nH
C893 1 2 1 2
R813
33
0 470pF Pin Pout
4.7
2 D801 R815
C832 C834 C870 C874 C835 C836 C837 C830 C838 L828 C884
Q803 MA4P1250 5 6
R818 C842 C831 NC NC NC NC 2pF 2p 5p 5p 3p 5 Rcouple 27k 1uH NC
C839 MOSFET
4.7 22pF 4pF
220pF L833 R848
C840 L816
1
R860 47pF NC
47pF 11T/113nH L832 R840
NC L817
C819 C873 C882 10nH NC
C812 C848 C847
R861 8pF NC NC
1
12pF C850 3T/16nH 150p 150p
4.7
470p R816 R817
Gate_2 C851 D802 C852
220 220
3p MA4P1250 100p R819 R820
C846 82 NC
D804
33pF R821 C858
2
RX_in RB706F
L815 33 NC
BLM18AG601SN1 2
C860 C828 R825 C861
2 1 C862 3
NC NC 33 68pF
1.5p 1 C891
R823
C849 120p
100
NC
C857 R852 R853
L829 L830 TP809 22pF 470 470
0 0
TP806
Gate_2 M6 M5 M1 M2 M3 M4
Final_bias R859
1
Final_bias D803
1
RB706F
1k R856
C892 R822
1
C 51 2 C
220p Gate_1 0 3
GND TP807
1 C899
C869 APC
R855 120p
15pF RT803 R871
C886 C887 R858 51 9V3A R850
TP808 NC t NC R851
NC 220p 9.1k 1 2 NC
9V3A TV_APC
1
NC
1 R900 R834 R836
1
R832 R833
R841 NC NC
R847 NC NC
L802 33k
NC 47K
BLM41PG600SN1 Q810 L821
TRANSISTOR BLM18AG601SN1
2
3 2 2 1 APC_COMP
C859
U801
15pF
C854 C853 C807 C868
1
IN+
L819 0.1u 220p 10u/25V C829 C845 0.1u R873 5 VEE 4 R837 R838
W= 3mm w=3mm,
8T/47n 0.1uF 220p
L822 R831
NC C894 0 33k
1
+-
L=3mm L820 BLM18AG601SN1 10k R839 R870 6 3
L= 3mm Z=8 1uH
R877
VGG 3.3K 10K
0.1uf IN- IN+
R881 47K
Z= 8 ohm 4.7K 7 2
2
OUT + IN- -
L827 TX 3 R880 R842 C875
3
2
39nH 4.7K 8 VCC
OUT 1 12k 150P
R826 C866 C864 1 C904
C867 R830 R896 R857
1 0 L823 18pF Q811 NC
NC 47 NC D805 OPAMP 0
1 C863 TRANSISTOR
C809 UDZS5.1B
Q804 0
4700pF 220p 2
MOSFET
1
R828 R827 R866
2
C871
3
B C822 B
C813 R805 R809
IN+
C814 220p 5 VEE 4 R863
C880 C844 NC NC 82 NC
18p R882 0
1
C881 0.047uF NC 2 TX_LO
+-
C878 R845 C877 R846 R893 150k 6 IN- IN+ 3
NC R844 R843 R808
220p 20K 220p 10K C818 R865
10k 5.6K Q801 10 7 2
R811 15p OUT + IN- -
TRANSISTOR L811 R814 R810 R892
4
3
0 8 VCC
OUT 1
220p
C811 R862
L824 L825
470p 56 R872 1k
BLM18AG601SN1 BLM18AG601SN1
TP812 180k
2
1
VGG TP811 NC 1K 3
9V3A TEMP_DET2
1
driver 2
3 3 R875 R886
R904 33K DAN222 R888 R884
1 1 220k
0 18k TP810
NC
REV_TEMP_DET TEMP
R867
R889 R891 R885 L806
Q812 Q813 8.2k
2 2 DTC114EE TEMP_DET NC 0 10k 1uH
DTC114EE 2 1
SW1
11
PAD SW D129
R905 MA2S077 C896
C898 R890 220p R883
33K
220p 3.3k 56k
RT804
t
100k
2
R868
NC
R876
C897
C954 R897 56k
220p
NC 470k
U804
TV_APC
A R864 OPAMP A
IN+
470k 5 VEE 4
+-
REV_TEMP_DET 6 IN- IN+ 3
R898
470k 7 OUT + IN- - 2
R899
470k 8 VCC
OUT 1
52
<RevCode>
Date: Wednesday, December 08, 2010 Sheet 14 of 14
5 4 3 2 1
2 1
MD78X/MD78XG Schematic Diagram
(Front Panel)
5VD
M1 M2 M3 M4
3V3A TP1 TP10TP11TP4 TP5 TP12TP13TP2 TP6 TP3 TP7 TP14TP15TP8 TP16TP9 TP17
1
5VD 5VD
1
TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP D3
BLM18PG300SN1
5VD 5VD 5VD MMBZ6V8ALT1G
L2
C2
KPT-1608SGC
D4
100pf
1
KPT-1608SGC
KPT-1608SGC
D2
UP MENU C1 C3
D1 R4 R3 R2 R5
100pf 0.1uf
3
DOWN 56 56 56 56 R6
B3
B2
B1
U2
EMI FILTER
42
P4 10K J1
12
12
12
U1
16
C1 A1
GND3
GND2
GND1
A Y1 X1 UART2_RXD
LOGIC IC C2 A2 PRST
GND2
KPT-1608SGC
D7
B UART2_TXD
D6
D5 p1 BACK Y2 X2
15 11 C3 A3 CLOCK 25
VCC
KPT-1608SGC
KPT-1608SGC
Q0 SHCP Y3 X3 S/P_CLOCK
4
p3 p2 D8 D9 1 12 C4 A4 CSLED 24
Q1 STCP Y4 X4 U3 DATA S/P_CSLED
2 10 C5 A5 26
B 2 KAA-3528RG KAA-3528RG Q2 SHR Y5 X5 EMI FILTER CS2_LCD S/P_DATA
B
2
2
3 Q3 STR 13 PRST C6 Y6 X6 A6 29 CS2_LCD
1
4 C1 A1 F_A1_LCD 30
Q4 C4 D10 Y1 X1 WE_LCD F_A1_LCD
5 C2 A2 28
3
R1 Q5 0.1uf Y2 X2 OE_LCD WE_LCD
R7 R8 6 Q6 DS 14 MMBZ5V6ALT1G C3 Y3 X3 A3 27 OE_LCD
33 J2 R9 33 F_D0
7 C4 A4 38
GND
33 33 Q7 Y4 X4 F_D0_LCD
4
17 18
GND1
GND2
GND3
D11 D12 9 DB7 DB8 C5 A5 F_D1 37
Q7S 16 19 Y5 X5 F_D2 F_D1_LCD
DB6 DB9 C6 A6 36
3
KAA-3528RG KAA-3528RG 15 20 Y6 X6 F_D3 F_D2_LCD
DB5 DB10 U4 35
8
14 21 F_D4 F_D3_LCD
DB4 DB11 EMI FILTER 34
B1
B2
B3
13 22 F_D5 F_D4_LCD
R10 33 DB3 DB12 33
3
12 23 C1 A1 F_D6 F_D5_LCD
DB2 DB13 Y1 X1 32 F_D6_LCD
3
11 DB1 DB14 24 C2 Y2 X2 A2 F_D7
3 1V8A 31 F_D7_LCD
Q1 10 DB0 DB15 25 C3 Y3 X3 A3 R11 33 PRST
R12 33 16 PRST
9 RD DB16 26 C4 Y4 X4 A4
2 10
GND1
GND2
GND3
8 27 C5 A5 UART2_RXD UART2_RXD
2 Q2 WR DB17 Y5 X5 UART2_TXD 11
R13 7 28 C6 A6 R14 NC(47) UART2_TXD
DTC114EE 3 RS RESET 3V3A Y6 X6 39
6 29 1V8A GND
2SK1824 CS IM3 R15 0 15
1
B1
B2
B3
RED 2 3V3A R18 0 FLM IM0 14
Q3 4 IOVCC LED_A 31 R19 0 C5 SPKR1-
R20 10 100p 13 SPKR1+
DTC114EE 3 VCI2 LED_K1 32 PWB_IN
R21 10 C7 40 PWB_IN
2 VCI1 LED_K2 33 C8
C6 R22 10 17 KB_C0
1 C9 1 GND LED_K3 34
100p 0.1uf 100p 18 KB_C1
0.1uf 36 GND2 GND1 35
C10 C11 C12 19 KB_C2
3
20 KB_C3
FPC CONNECTER 100p 100p 100p 21
Q4 KB_R0
22 KB_R1
U5 23 KB_R2
5VD 2 2SK1824 ACC_IO1
POWER IC 3V3A 3 ACC_IO1
L1 PTT 6
4 5 R23 0 PTT_MMP
HANDSET_AUDIO
1
Vin Vout 12
USB_D- HANDSET_AUDIO
BLM18PG300SN1 7
2 C14 MIC_GROUND USB_D-
Vss TP18TP19 2 MIC_GROUND
3
C13 1uf TP TP USB_VBUS 4
1uf D13 INT_MIC USB_VBUS
1 INT_MIC
3 CE Nc 1 USB_D+
MMBZ20VALT1G 8 USB_D+
HOOK 5 HOOK_MMP
GND1
ACC_IO2 9
TP20 TP21TP22TP23 TP24 ACC_IO2
2
C15 C16 CON40_MAIN
5VD U6
POWER IC 1V8A 0.01uf
0.01uf
41
L3 R24 NC S1 TP TP TP TP TP J3
4 Vin Vout 5
SKQMBBE010 SPKR
NC(BLM18PG300SN1) SPKR1-
2 Vss C18 1 2 SPKR- 2
1 SPKR1+
C17 nc(1uf) SPKR+
1uf
3 1 C19 470PF
CE Nc
KB_C0
KB_C1
A1 KB_C2
ANTENNA
3V3A TP25 TP26
C20 KB_C3
470pf KB_R0
1 2 C21
10K 10K
KB_R1
R25 R26 TP TP 470pf C22
S2 S3 S4 S5 S6 KB_R2
3
C B B TP29
R29 0 TP27
0 S8 S9 S10 S11 S12 TP
E27 C23 C24 PF1 PF1 PF1 PF1 PF1 TP
6
7
W1 TP28
R30 0 0.1uf 0.1uf 1 2 1 2 1 2 1 2 1 2
TP
FIXER P5 p2 p1 DOWN P4
C28 C29 C30
C25 C26 C27
NC NC 470pf 470pf 470pf
470pf
3
3
D14 D15 D16
D17 D18 D19 D20
MMBZ5V6ALT1G MMBZ5V6ALT1G MMBZ5V6ALT1G
MMBZ5V6ALT1G MMBZ5V6ALT1G MMBZ20VALT1G MMBZ5V6ALT1G
3V3A
1
2
A R31
0
C31
470PF
C32
470pf
C33
470pf
C34
470pf
C35 C36
470pf 470pf
C37
470pf A
R36 R35 R34 R33 J4
ACC_I00 1
10K 10K 10K 10K 2
PTT
HANDSET_AUDIO 3
CS2_LCD 4
USB_D-
MIC_GROUND 5
F_A1_LCD 6
USB_VBUS
INT_MIC 7
WE_LCD 8
USB_D+
HOOK 9
OE_LCD 10
ACC_IO1
5VD
U8
2
CON10_MMP R32
10k 4 2 D21 TP30TP31TP32TP33TP34TP35TP36TP37TP38TP39
VCC IO1
MMBZ6V8ALT1G
1 GND IO2 3
PRTR5V0U2X
3
TP TP TP TP TP TP TP TP TP TP
53 V1.0
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FGU
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used to amplify the VCO signal to the desired output power level, while the latter can keep the output
power at the desired level, so as to protect the power amplifier from damage caused by over heat,
antenna mismatch, and out-of-range voltage (over voltage or under voltage may result in damage to
first stage is a buffer amplifier circuit with fixed gain; the second stage is a pre-driver power amplifier
circuit with variable gain (formed by Q805); the third stage is a driver power amplifier circuit with variable
gain (formed by Q804); and the final stage is the final power amplifier circuit with fixed gain (formed by
Q802 and Q803). In addition, this power amplifier contains a TX/RX switch and a low-pass filter.
bias current of 28mA (for Q801). Power supply for the switching transistor Q810 is controlled by TX
signal (enabled by antenna switch) so as to further control the power supply for the whole circuit.
input matching circuit is composed of C826, L826, L814, C843 and R824.
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Service Manual
maximum output power is 38.5dBm, and the maximum variable gain is 11dB.
the maximum variable gain of 10dB. The input matching circuit is composed of C815, C839, R804, R806,
R807, R813, R818 and R861, while the power combining circuit is composed of C820, C8330, C831,
PIN diodes D801 and D802, which are not applied with DC bias current. When the two PIN diodes are
turned off, signals feed into the RX path through the low-pass filter (composed of L871, C852 and C862).
both forward and reverse directed power of the transmitter. The forward power is coupled to the diode
D803, and the voltage is applied to the power control circuit (U801). Then the voltage VGG is output to
control the gate voltage of pre-driver and driver PA, ensuring a constant power output.
The directional coupler can adjust the TX power and detect the VSWR load. The reverse power is
coupled to D804. The voltage is applied to U802 and then feeds into U302 for detection
voltage that can represent the forward power. The voltage together with the preset voltage feeds to U801
to output a voltage VGG, which can control both gate voltage and gain of Q804 and Q805, ensuring a
The circuit consists of thermistor RT804 and resistor R884. The output voltage is proportional to the
detected temperature. Both the voltage used for temperature detection and the threshold voltage are fed
into the operational amplifier U803, to output a voltage signal that is in proportion to the detected
temperature. Afterwards, the voltage is applied to software for judgment, and then the preset voltage will
be subsequently changed to reduce the TX power, and to protect the PA from over-heating.
rubber part mounted on the top cover. If the switch is turned off, VGG will become low, and no power will
second IF is 2.25MHz. The first local oscillator signal is from the PLL circuit U100, and the second local
oscillator signal (71.1MHz) from the PLL circuit U701. The major units are BPF, LNA, mixer, IF filter, IF
electrically tunable band-pass filter to get useful signals. After passing through the RF band-pass filter
and LNA (Q6102), the RF signals together with the first LO signal feed to the mixer for the first frequency
conversion, to generate the first IF signal (73.35MHz). The mixer that employs the passive diode can
ensure good dynamic range and port isolation. The LO signal (3-5dBm) from the VCO feeds to Q6103
to get a gain (17dB). The first LO signals (73.35MHz) pass through the crystal filter (Z6100) to remove
out-of-band spurious signals, and then feed to the two-stage IF amplifier circuit (composed of Q6133 and
Q6134) for amplification. Finally the amplified signals go to the IF IC for processing
The first IF signal (73.35MHz) output by the IF amplifier goes into IF IC via Pin 47, where the signal is
converted to the second IF signal (2.25MHz). Then the un-demodulated digital I/Q signal output from the
SSI interface is sent to U302 for demodulation. IF IC employs a reference frequency of 19.2MHz and
shares the crystal with U302. The second LO VCO consists of the external transistor, varactor and some
other components, to provide the second LO signal. The 18MHz clock frequency is generated by the LC
DSP (U302) gets the audio signal from IF IC (U701). Then this signal goes through U302 to output data
signal, which is sent to U231 and PIN44 (SSI_DI) for digital-to-analog conversion. Finally, the output
analog audio signal will be subjected to gain control, and then fed to the speaker.
to supply excitation signal source to the transmitter, and local oscillator signal to the receiver.
12.3.3 PLL IC
The PLL IC (U100) is a fractional frequency divider. The logic IC U101 and U102 work with the PLL IC
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Service Manual
The 19.2MHz frequency generated by the reference oscillator goes into the PLL IC for division,
generating the reference frequency. Meanwhile, the frequency generated by VCO goes into PLL IC
(U100) for frequency division. The resulting frequency will be compared with the reference frequency in
terms of phase difference in the phase detector. After comparison, the resulting frequency is converted
to CV voltage via the loop filter, to control and lock the frequency.
12.3.4 VCO
The VCO is composed of transistors (Q100, Q103, Q106 and Q110), varactors and four Colpitts
oscillators. There are four VCOs in all: two VCOs (Q100 and Q103) used to transmit excitation signals
and the other two VCOs (Q106 and Q110) to receive LO signals. U302 controls the operating frequency
of the VCO. Q102 and Q107 constitute the buffer amplifiers for the transmitter circuit, while Q111 and
Q109 for the receiver circuit. The digital-to-analog converter (U500) modulates the TX oscillator signal.
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TX_L_VCO MOD
Q103
TX PA
Q107 Q102
Q100
TX_H_VCO
RX_L_VCO
Q110
RX Lo
Q109 Q111
Q106
RX_H_VCO
100
12.4 PCB View
MD78X/MD78XG PCB View (Front Panel)
Top Layer
101
MD78X/MD78XG PCB View (Front Panel)
Bottom Layer
102
MD78X/MD78XG PCB View (Main Board)
Top Layer
103
MD78X/MD78XG PCB View (Main Board)
Bottom Layer
104
12.5 Block Diagram
Q804\Q805
9V3A 9V1A
Q920\Q921\U914 Q801 Q801
Q6102
9V1A
Q902 Q6103
U6000
U703
Q6105
5VA U701
U702
U701
U915
4V3A
Q104 Q100\Q103\Q106\Q110
5VA
U100
U918 3V3A
X100
5VA
ON\OFF KEY PWB U905 U500
IGN_SENCE
EMERGENCY 3V3A U231
U909
X302
U302
1V6D
U401 USB
U919
Control Head
U231
1V8D
U903 U232
U302
3VRTC U323
U912
U326
105
MD78X/MD78XG Block Diagram (RF Section)
High
Temperature
Protection
9V1A_TX
B+ ADC
TXC ANT
Gain:10 dB
Gain:15 dB Gain:11dB
Tx/Rx
Gain:-6 dB Gain:16 dB Switch
Tx_PORT
Microstrip
Attenuator Match Match Match
Matcher Microstrip Dual
Q805 Q804 Harmonic
Q801 Driver Rx_PORT Filter Directional Coupler
PreDriver
Firststage Switchÿs Power
9.1V
Q802ǃQ803 Forward Reflect
Finalstage Detector Detector
RX
Alarm to ADC
B+ VSWR Protection
Final_Bias
Temperature
compensation TV_APC
TX_L_VCO
MOD H TV_APC
TX_VCO_L U500
Q103 MOD L DAC Final_Bias
TX LO:3dBm
Q107 Q102
TX_VCO_H
TX_H_VCO Q100 X100
19.2MHZ
CLK
MCSI
C STB
SPI
LPF PLL U100
DATA
LD
RX_VCO_H
RX_H_VCO Q106
C
VCO_Feed
back LPF
LPF
X100
1 2 19.2MHZ
Q6103
Attenuator
3dB
1
Attenuator
1dB Attenuator Control
10dB
2
U701 Q6104
Z6100 Q6102
IF IC Q6105
Mixer
IF Filter D6106
IF Processor TV
106
MD78X/MD78XG Block Diagram (BB Section)
PLL IF processor DAC
RF Unit
BB Schematic Block Diagram SPI SSI SSI TXǃRX CTL
PowerǃIO CTL
McBSP2_TX
McBSP2 RX
SPI(CS1 )
SPI(CS2)
AUX MCSI1 SPI McBSP2 GPIOs
TEMP_DET ADC
Audio Codec
EMIFS
Headset Nor FLASH and pSRAM
Driver IIS McBSP1 DSP datax16 FLASH: 8Mx16
TMS320C55x pSRAM:2Mx16
MCLK
Mic CP
AMP Driver SPI BELL
EMIFF
Speed:96MHz(max)
Mobile SDRAM
McBSP3 datax16
128Mb:8Mx16
JTAG JTAG
TXAF_DI
MCLK19.2MHz OMAP5912
19.2MHz 19.2MHz
RXAF_DO CLK AD9864
32KHz TCXO
PWM0/
PWT
CS3
uWire
RTC 32.768KHz
20ppm
IIC
UART3 MPU
IIC
IIC
LTR/OPTION GPIOs
ARM926EJ-S Accelero
meter
BOARD/BLUETOOTH
Audio PA
IIC
EMERGENCY
UART1 GPS
IGN_SENSE
UART2 IGN_SENSE
KEY GPIOs EMERGENCY
USB1 GPIOs
Trax or GPIO PWB User Program
PRGM IO out
EMERGENCY
IGN_SENSE
CLK/DATA/CS
AUX Audio DC Supply 74hc595
PRGM GPIOS
GPIO 74hc595
USB Expand
Rear
ACC_ID GPIO
Accessory(MAP) PRGM UART or
USB TX_RX Keytrax
GPIOs light/LED/LCD
IO Expand LED 3X4 Volume
ACC_ID backlight
MMP
MIC TFT LCD datax8 EMIFS
SPKr
Control Head
107
5 4 3 2 1
TP4012
TP4016
R245 1R
EXT_SPKR+
R253 1R
D EXT_SPKR- D
R293 1R
SPKR1+
CODEC_SSI_WCLK
CODEC_SSI_BCLK
R294 1R
CODEC_SSI_DO
SPKR1-
CODEC_SSI_DI
CODEC_MOSI
CODEC_SCLK
CODEC_MISO
/CODEC_DAV
CODEC_/SS
CODEC_CLK
L232
9V3 BLM18PG300SN1 9d3V
B+
C232
C233
1
0.1u C285 C284
0.1u C234 +
C235
19
16
15
11
20
10
13
10uF/25V
2
5
1
0.01u 0.1u 47uF/25V
U201
OUT1+
OUT2+
OUT1-
OUT2-
VCC
VCC
GND
GND
GND
GND
SGND
TP232 1
AUDIO PA
TP233 1
TP234 1
TP235 1
1
MUTE
STBY
1V8D TP236
NC1
NC2
NC3
NC4
NC5
IN2-
SPK_SEL
IN1
R288 47K C268 0.47u R289 0
R230 3V3A
C236 0 9d3V
14
9
8
3
4
12
17
18
4
3
2
1
33
33
R2876.8K
0.1u RN230 C245 220p
R238
100*4 VAG
R232
0
R231
6
7
8
C283 R295 1K 9d3V
B- B
B OUT
B+
V+
C289 0.1u Q230
3V3D R237 120K
5
6
7
8
-+
R233 C293 C237
1
0.1u 4 3
49
48
47
46
45
44
43
42
41
40
39
38
37
C520 10uF/16V 0.47u
A OUT
0 C240 +
+-
R292
A
C239 U238 C294 R241
V-
DVSS
BCLK
WCLK
MCLK
SCLK
MOSI
SS
DAV
SDOUT
MISO
A+
A-
T-PAD
DVDD
SDIN
3
2
1
3V3A
1 36 C291
IOVDD DRVSS2 C288 5 1
2 PWR_DN OUT8P 35 U237 R286 47K
3 34 C243 1u 100p
/CODEC_RST RESET BVDD SWITCH IC UMC4N
1 R242 0 4 33 R239 6.8K
TP238 GPIO2 OUT8N 0.1u 5 VCC 6 C242 220p
TP239 1 5 32 S
GPIO1 DRVSS1 2 GND B1 1
6 AVDD2 VGND/CP_OUTN 31 C290 1u
4 A B0 3 LOW_LEVEL_MUTE
C
R243 7 AVSS2 SPKFC 30 C
8 29 Q231
3V3A AVDD1 DRVDD C247 220p
BUZZ_IN/CP_INN
C251 1u
1
0 9 NC9 SPK2 28 3 4
C248 R246 22K
MICBIAS_HND
10 27
MICBIAS_HED
MICIN_HED
12 NC12 MIC_DET 25 2
100K
2
CP_INP
AVSS1
VREF
AUX2
AUX1
VBAT
11
NC R296 1 5
U231 OP AMP
11
BB IC 13 -
UMC4N
13
14
15
16
17
18
19
20
21
22
23
24
14 C252 1u OP AMP
VAG 12 + R250 15K
R249 6 - C253 1u/25V
1V8D R251 600mV
U235D 7 HANDSET_AUDIO
0 C255 VAG 5 +
C292 100
1
C256
4
NEW 1u C295 R202 C254 220p
0.01u C262 C259 R236 100P
1u 100P R252 100K U235B
NC R280 10K 10K 9d3V
TEMP_DET TP237 1u
4
D230 ESD IC
1K R290
NC R254 9d3V
11
TEMP_DET2
C238 C200 OP AMP
30K R257 C263
R284 1u 1u C257 1u 9 - 1u
10K R258 C258 0.1u R285 R260 330mV
15k 8 RX_AUDIO
CODEC_PWT 15k
R259 10K 9d3V VAG 10 +
100
R261 R279 R283
RXAF_DO
TXAF_DI
C260 C261
10K 0.01u 0.01u 30k 30k U235C PUB_ADDRESS2_EN
C264 C265 220p
1
C266 R255 1u
4
1u 470 R262 100K
L233 C298 C299 Q232
9d3V
MIC_GROUND 3 4 R263
11
1
B INT_MIC VAG 3 +
Q233 B
BLM18BD601SN1D 1 5
C271 R264 1K
C270 U235A
5
TP4029 220P 220P UMC4N
4
R269
L235
9d3V 100K
11
EXT_MIC R268
C272 BLM18BD601SN1D C273 R267 1K C274 100K OP AMP C277
220P 220P 0.1u C276 1u
6 -
R271
1u
7 PUB_ADDRESS2
VAG R272 47K 5 +
100
EXT_MIC_EN C278
1u U236B
D231 ESD IC
4
C281
Q234 Q235 1u 9d3V
VAG
3 4 C279 1u C280 220p 3 4
11
R273 24K
R274 100K OP AMP
R276 C282
2 R275 2 R277
100K 1u
100K 47K 9 -
R278
11
8 PUB_ADDRESS1
1 5 OP AMP 1 5 10 +
100
13
11
-
UMC4N 14 UMC4N U236C
OP AMP
4
VAG 12
+
2 - VAG
9d3V R265
R266 47K 1 U236D 9d3V
3 +
1.8K
4
PUB_ADDRESS1_EN
1
U236A 9d3V
R270
+ C275 PUB_ADDRESS_MIC_EN
47K
4
10uF/16V
2
9d3V
A A
DESIGNER: LHY
Title
<Title> AUDIO
108
Size Document Number Rev
C <Doc> <RevCode>
5 4 3 2 1
5 4 3 2 1
C6100 R6100
D C6102 C6185 R6101 D
1u 0
470p 1uF 680
R6102
10
TRANSISTOR
4
L6101 3 4
Q6101
BLM18PG600SN1
2 5
RF_ATTEN 2 1 2 TRANSISTOR
C6103 1 5
3
220p TX TP
Q6100 TP6101
C6104 C6105 TP6100
R6103
GND
27K 220p
0.1u L6102
220n L6103
1
10n
C6106
TP6102
220p R6104
C6107 2.7K
C6108
220p
R6105 1000p
5.6K
TP6103 C6114
R6106 TP6104
TX TP 5p R6108
680
L6104 C6119 C6120 C6109 C6110 C6121 C6122 C6111 C6112 L6106 C6125 C6126 C6116 C6117 C6127 C6124
4.7K
Micr-L N2 1.5p 1p 6p 1p 1p
N3
2.2p 6p 6p
R6107 Micr-L N6 NC 1p 6p 1p 1.5p 1p
N7
L6107
C6113 Micr-R
D6100 1.2k C6128
2
C6123 0.1u C6115 L6217 L6216
C6118 HVC131 N17
0 N18 N19 0 220p 220p 470p
470pF D6101 D6102 Q6102 D6103 D6104
RX_in 1 2 3 1SV279 1SV279 3 N4 2 Micr-L 1 2 Micr-L 1 2 TRANSISTOR 3N5 1SV279 1SV279 3 RX_ONE
2
N1 R6123 L6105
C6194 C6132 L6214 L6215 C6129 C6130
L6114 0 C6131
2
10NH NC Micr-L 18p 100p C6244
BLM18PG600SN1 NC C6246
1
3
4
1
9V1A_RX R6109 C6133 C6245
C TP6110 D6105 R6110 6p nc C
2 1 390 4p nc
RX CV L6110 1.2K
HSM88AS
3
C6134 C6135 C6136 C6137 C6138 15n C6139 C6140 C6141 C6142C6143
C6144 C6145 RX_AFTER 56p 56p 56p 47P 47P 56p 56p 56p 47P 47P
220p 1u
U6000
OPAMP R6127
TV_APC 1 IN+ VCC 5 10K R6111 R6112
100K 100K
R6116 +
2 R6114 R6140
0 VEE
- 33
0
3 4
IN- OUT
R6113
TUHF_TONE C6146 C6147
270K 470P 0.01u
R6115
100K
L6115
9V1A_RX
1 2
C6148 C6149
470p 1u
BLM18PG600SN1 R6126 R6117
TP6105 82 82
RX TP
TP6106
C6151 C6152 C6153 C6154
C6150 470p 1.5p 1p 2p
R6118
NC L6116 R6119 MIX IC
3.3K
C6155 18n 1.2K C6157
D6106 R6120
B 0.01u R6121
C6193 L6117 L6119 L6118 100p 3 T6100 4 51 B
3
5.6
22n 22n 18n T6101
RX_LO 4 3 2 5
R6122 C6159
1
4
330
TRANSISTOR
3
4
C6172 R6138
0 0
TP6107
GND
5VA_RX 2 1
1
L6121
BLM18PG600SN1
C6190
R6131
1uF R6130
1.2K
5.1K TX TP
TX TP TP6109
TP6108
C6169
C6168
R6132 0.1u
0.1u C6170
51
R6133 9p
L6122
C6171 330
0.1uF
0.1uF C6173 R6135 C6175 C6177
L6126 C6176 C6178
3
0.1u 4.7K 0.1u 15p
IF-out C6179 0 0.01u
3
C6180 4 OUT IN 1
R6134 0.1u
0.1u
30k 0.1uF GND GND
1
3
C6174 L6123
C6182 C6181 Q6104 C6187 C6192 C6188
2
3
Q6105
R6139
56K
Title
<Title>
109
Date: Wednesday, December 08, 2010 Sheet 1 of 2
5 4 3 2 1
5 4 3 2 1
1
C471 + C405
0.1u 10uF/10V
2
R570 5VA
10k R542 0
1
C484 1000p + C509
C483 8 OUT 1 C508 C510
VCC R528
8200p 10u/16v 0.1u 100P 68K
2
7 OUT +- IN- 2
R568 R574
IN+
12k NC
6 IN- 3
R575 R577 -+ R513
2.7k 6.8k C404
0.1u
5 VEE 4 100K
1000p
R529 33K
IN+
C406
1200p OP AMP
C515
U501
R503 1K R564 0 R566 0 Final_bias
C502
C C500 C501 3300p R504 1K R565 0 R567 0 TV_APC C
33p R500 330p R501 R502 C506 C507 C521 C522 C523 C524
100K 10K 1K 0.01uF 0.01uF NC NC NC NC
MOD_H
R505 R506 R507
0 10K 0 R514 100K
MOD_L_RFCS
16
15
14
13
12
11
10
9
U500
PD REFINAB
LDAC OUTA
OUTB
DVDD AVDD
SCLK OUTC
OUTD
FS REFINCD
DGND AGND
D/A IC
DIN
CS
3V3D
1
2
3
4
5
6
7
8
1
B R508 0 B
+ C512 R509 10k
C511 C513
10u/16v 0.1u 1000P R512 10k
2
R510 10k
1 8
DAC_DIN 2 7
DAC_SCLK 3 6
DAC_FS 4 5
RN500 33*4
C516 C517 C518
100P 100P 100P
A A
Title
<Title>
110
5 4 3 2 1
D D
TP4044
TP4047
TP4051
TP4045
TP4050
TP4043
TP4054
TP4049
TP4046
TP4048
TP4053
TP4052
F_D0 R487 33
F_D1 R489 33 F_D0_LCD
F_D2 R490 33 F_D1_LCD
F_D3 R492 33 F_D2_LCD
F_D4 R515 33 F_D3_LCD
F_D5 R516 33 F_D4_LCD
F_D6 R517 33 F_D5_LCD
F_D7 R518 33 F_D6_LCD
/OE R519 33 F_D7_LCD
/WE R520 33 /OE_LCD
CS2 R521 33 /WE_LCD
F_A1 R522 33 CS2_LCD
F_A1_LCD
U302A U233
SDR_A0 A2 J8 F_A1
SDRAM.A0 FLASH.A1 F_A1 G1
SDR_A1 B2 D3 F_A2 A0
SDRAM.A1 FLASH.A2 F_A2 F1
SDR_A2 B6 C1 F_A3 A1
SDRAM.A2 FLASH.A3 F_A3 E1 J2 F_D0
SDR_A3 A1 E4 F_A4 A2 DQ0
SDRAM.A3 FLASH.A4 F_A4 D1 G3 F_D1
SDR_A4 G10 D2 F_A5 A3 DQ1
SDRAM.A4 FLASH.A5 F_A5 F2 K3 F_D2
SDR_A5 B9 F4 F_A6 A4 DQ2
SDRAM.A5 FLASH.A6 F_A6 E2 H4 F_D3
SDR_A6 G12 E3 F_A7 A5 DQ3
SDRAM.A6 FLASH.A7 F_A7 D2 H5 F_D4
SDR_A7 G11 J7 F_A8 A6 DQ4
SDRAM.A7 FLASH.A8 F_A8 C2 K6 F_D5
SDR_A8 G9 F3 F_A9 A7 DQ5
SDRAM.A8 FLASH.A9 F_A9 C6 G6 F_D6
0 SDR_A9 B12 G4 F_A10 A8 DQ6
R484 1V8D SDRAM.A9 FLASH.A10 F_A10 E6 J7 F_D7
SDR_A10 B8 G3 F_A11 A9 DQ7
SDRAM.A10 FLASH.A11 F_A11 F6 K2 F_D8
C SDR_A11 H10 G2 F_A12 A10 DQ8 C
C311 C305 C306 C307 SDRAM.A11 FLASH.A12 F_A12 C7 H3 F_D9
SDR_A12 H9 K8 F_A13 A11 DQ9
SDRAM.A12 FLASH.A13 F_A13 D7 J3 F_D10
0.1u 1u 0.01u 100p H11 H4 F_A14 A12 DQ10
SDRAM.A13 FLASH.A14 F_A14 E7 K4 F_D11
H3 F_A15 A13 DQ11
FLASH.A15 F_A15 F7 J6 F_D12
SDR_D0 D6 K7 F_A16 A14 DQ12
U232 SDRAM.D0 FLASH.A16 F_A16 D8 H6 F_D13
SDR_D1 C6 J2 F_A17 A15 DQ13
SDRAM.D1 FLASH.A17 F_A17 G8 K7 F_D14
SDRAM
D3
C7
SDR_D2 F_A18
E7
A9
B3
A7
C5 J4 A16 DQ14
J9
R441 10K
R326 10K
R353 10K
R536 SDR_A10 A9 DQ9 SDR_D10 SDR_D14 SDRAM.D13 FLASH.D2 F_D3 B2
H9 D1 D12 P2 /WE NC6
0 SDR_A11 A10 DQ10 SDR_D11 SDR_D15 SDRAM.D14 FLASH.D3 F_D4 R359 C5 L2
G2 C2 C12 P4 CS1_SRAMJ1 WE NC7
SDR_A12 A11 DQ11 SDR_D12 SDRAM.D15 FLASH.D4 F_D5 NC TP302 1 B3
G1 C1 P7 /OE CE1-ps NC8
SDR_BA0 A12 DQ12 SDR_D13 FLASH.D5 F_D6 H2 L3
G7 B2 C14 R2 OE NC9
SDR_BA1 BA0 DQ13 SDR_D14 SDRAM.DQSH FLASH.D6 F_D7
TP303 1 /CS3_FLASH H1 CEf NC10 B4
G8 BA1 DQ14 B1 D4 SDRAM.DQSL FLASH.D7 R3 RDY R356 0
SDR_D15 /SDR_CS F_D8 E4 RY/BYf NC11 F4
DQ15 A2 G8 SDRAM.CS FLASH.D8 R4 /RST_OUTR440 0
/SDR_CAS F_D9 D4 RESET NC12 G4
F7 CAS D9 SDRAM.CLKX FLASH.D9 T2 /WP R399 0
/SDR_RAS R544 SDR_BA0 F_D10 C4 WP/ACC NC13 L4
F8 RAS B3 SDRAM.BA0 FLASH.D10 T3 R442 10K
SDR_DQML 0 SDR_BA1 F_D11 3V3D D5 CE2ps NC14 B5
E8 LDQM C3 SDRAM.BA1 FLASH.D11 P8
SDR_DQMU SDR_CLK F_D12 NC16 G5
F1 UDQM NC E2 1 TP308 C9 SDRAM.CLK FLASH.D12 U1
/SDR_WE SDR_CKE F_D13 J4 VCCf NC17 K5
CK1 F9 WE H12 SDRAM.CKE FLASH.D13 U3 R444 0
VFLASH J5 L5
1 SDR_CLK F2 CLK
SDR_DQMU D10 SDRAM.DQMU FLASH.D14 T4 F_D14 VCCps NC18
SDR_CKE SDR_DQML F_D15 NC19 B6
F3 CKE C8 SDRAM.DQML FLASH.D15 V3 C310 C308 C309
VSSQC3
VSSQD7
L6
VSSQA3
VSSQB7
VSSE3
VSSJ1
CS /SDR_RAS SDRAM.WE B7
H7 U4 /OE 1U 0.1u 100P NC21
10K
SDRAM.RAS FLASH.OE G7
10K
/SDR_CAS W2 /WE
10K
10K
10K
10K
NC22
10K
FLASH.RDY/GPIO10 B8
L4 NC25
FLASH.ADV H8
M7 1 TP310 NC26
FLASH.CS0/GPIO62
R481
B L8 B
M3 CS1_SRAM
R322
R316
R482
R483
NC27
R453
R351
FLASH.CS1/FLASH.CS1L G2
Y1 VSS1
FLASH.CS1U/GPIO16 /CODEC_RST J8 M8
FLASH.CS2/FLASH.BAA/FLASH.CS2L M4 CS2 VSS2 NC28
FLASH.CS2U/GPIO5 P3 PWB
FLASH.CS3/GPIO3 N8 /CS3_FLASH
FLASH.RP/FLASH.CS2UWE W1
1V8D N3
FLASH.CLK/FLASH.CS2UOE FLASH
RST_OUT/GPIO41 AA20 /RST_OUT
M8 BE1
FLASH.BE1/FLASH.CS2UWE/GPIO60 BE0
FLASH.BE0/FLASH.CS2UOE/GPIO59 L3
OMAP
3V3D 1V8D VFLASH
NC R281
0R R282
A A
DESIGNER: LHY
Title
<Title> MEMO
111 Size
C
Document Number
<Doc>
Rev
<RevCode>
5 4 3 2 1
5 4 3 2 1
19.2_OMAP 3V3A
1
R414 10
R419
+
C338 nc C336 C401
1000p 0.1u 10u/16V
TP309 C364 39p X302
2
CLK 4 1
TP377 VCC VT
L151 C337 R426
C375 C376 OSC 0
3 2
3
12p
1
OUT GND
12p L147 470n
X375 470n
1000p
1
C365 19.2MHz TCXO
SSP-T7-F C362 C363
R375 82p
82p 82p
4
0 R374
OSC32
1 0
AA13
V13
P13
W3
U302C
Y2
OMAP
1V6D
OSC32K_OUT
OSC1_OUT
OSC32K_IN
CLK32K_IN
OSC1_IN
Y13 VSS CVDD A15
3V3D CVDD M2
J374 R382 10K 1V6D 1V6D
R19 GPIO1 CVDD Y9
1 3V3D J20 MPU_BOOT CVDD Y20
2 GPIO13 R377 10K AA3
CVDD1 C382 C383 C384 C385 C379 C380 C381 C378
N19 GPIO13/LCD.BLUE0 CVDD2 A3
CON2 R378 10K A9 0.1u 0.1u 0.01u 100p 0.1u 0.1u 0.01u 100p
CVDD2
C 3V3D W19 BFAIL CVDD2 E2 C
TP374 1LOW-PWR R379 10K T20
R380 33 LOW_PWR
U20 MPU_RST CVDD3 B13
/PRST R12 PWRON_RESET CVDD3 B20 1V6D
C356 0.1u R381 33 J21
R383 1K CVDD3
V18 CONF CVDD3 R20
VOTG_DET W15 GPIO40/BCLKREQ 1V6A 1V6D
CVDDRTC W12
3V3D R385 10K R10 L913
GPIO23/MCLKREQ R386 10
CVDDDLL A11
RTC_ALARMB P12 C386 BLM18PG300SN1
VSS 0.1u MMBZ5V6ALT1G
TP375 CVDDA Y21
C339 100p TP376 3V3D_OMAP
MCLK BCLK D236
DVDD1 A19 R388 10
R387 33
1
V5 E21
1
1
VBUS_DEC W10 MPUIO11 DVDD4 B10
B14 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u MMBZ5V6ALT1G
DVDD4 100p + C402
W9 VFLASH 10uF/16V D234
RESET_BT/SYSTEM_SYNC GPIO25/MCSI2.DOUT
DVDD5 C2
2
JTAG DVDD5 H2
DVDD5 R1
/TRST Y18 3V3D_OMAP
TMS TRST
2 1 V17 TMS DVDD6 AA11 VFLASH
TDI 1V8D
4 3 Y19 TDI DVDD7 Y16
R391 6 5 L21
TDO DVDD8
10K 8 7 AA19 TDO DVDD9 U21 C400 C341
RTCK C398 C399 C335
10 9 Y17 RTCK DVDDRTC V12 0.1u 100p
TCK 0.1u 0.01u 100p MMBZ5V6ALT1G
12 11 W18 TCK
14 13 EMU0 V16 J1 D239
EMU1 EMU0 LDO.FILTER
W17 EMU1 C396
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1u
J375
R392 R393 R394 R395 R396
B B
10K 10K 10K 4.7K 4.7K
A13
A21
B1
B5
B7
B16
F20
G1
K2
K20
N1
R21
U2
W20
Y3
AA1
AA7
AA21
3V3D
C334
0.1u
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
112 Size
C
Document Number
<Doc>
Rev
<RevCode>
5 4 3 2 1
5 4 3 2 1
TP326
100p C326
100p C342
C343
R323 R325 U302B
OMAP
10K 10K
100p
1
D 3V3D N15 MPUIO2/SPIF.CS1/UWIRE.CS1 LCD.P0 D18 D
U322 R357 33 T19 B21
R329 R330 98_PE 33 MPUIO4/SPIF.CS2/UWIRE.CS2/LED2 LCD.P1
0 1 14 33 R327 U19 C19
DVDD_IO SLC/SPC I2C_SCL 98_PC R324 33 MPUIO1/SPIF.SCK LCD.P2
2 13 W21 G14
R334 10K GND SDA/SDI/SDO I2C_SDA 98_PD R347 33 GPIO46/SPIF.DOUT/UWIRE.SDO LCD.P3
4 IADDR0 SDO 12 33 U18 GPIO47/SPIF.DIN/UWIRE.SDI LCD.P4 H13
C321 5 11 R332 C355 100p 98_DOUTB C358 100p V19 A20
GND RESERVED MAP_GPIO_6 MPUIO1/UWIRE.SCLK LCD.P5
0.1u 6 9 1 B19
AVDD INT2 TP321 100 LCD.P6
7 8 ACCEL_INT1 R346 M14 C18
NC1
NC2
CS INT1/DRDY PLL_LD 100 GPIO2 LCD.P7
PLL_CLK R337 M15 D17 R403 100
R335 10K 33 100 GPIO7/MCSI1.CLK LCD.P8/GPIO29 FL_Control
R336 PLL_STB R338 W8 D16 R404 100
GPIO9/MCSI1.SYNC LCD.P9/GPIO30 R406 100 LP_Control
NC MAP_GPIO_2 V15 C17
3
10
R339 100 GPIO56/MCSI1.DIN LCD.P10/GPIO31 R410 100 TX_VCO_H
PLL_DATA W14 GPIO18/MCSI1.DOUT LCD.P11/GPIO32 B17 TX_VCO_L
G13 R411 100
LCD.P12/GPIO33 RX_VCO_H
R14 A17
C346 100p
C344 100p
100p
C351 100p
C349 100p
100p
C354 100p
C352 100p
GPS_UART1_TXD GPIO38/UART1-IRSEL LCD.P13/GPIO34
Y14 UART1.TX/UART1.IRTX LCD.P14/GPIO35 C16
GPS_UART1_RXD V14 D15
GPIO37/UART1.RX/UART1.IRRX LCD.P15/GPIO2
AA15 B15
C345
C350
MMP_GPIO_0/PwrOn GPIO39/UART1-IRSHDN LCD.AC
LCD.HS C20
UART2_TXD V6 GPIO17/UART2.TX LCD.PCLK C15
R9 B18 3V3D
UART2_RXD GPIO18/UART2.RX LCD.VS R413 33
LCD.RED0/GPIO14 N21 RF_ATTEN
100p
3V3D 3V3D WAKE_BT/OPT_GPIO1 N14 GPIO45/UART3.TX/SPIF.CS0/MCBSP3.CLKX
CODEC_/SS P15 GPIO44/UART3.RX/SPIF.CS3/UWIRE.CS3
C353
R488 R511 R499
C322 12p T18
R340 10K
10K
R342 10K
R343 10K
I2C_SDA GPIO48/I2C.SDA KP.R4/MPUIO15 /CODEC_DAV
X321 KP.R3/MPUIO13 E20 ACCEL_INT1
33
R341
100p
100p
100p
MAP_GPIO_3 GPIO0/USB.VBUS KB.C3/GPIO63 KB_C3
NC W5 C21
MAP_GPIO_8 MPUIO5/MPUIO12 KB.C4/GPIO27
MAP_GPIO_7 V8 MPUIO3/MMC2.DAT1 KB.C5/GPIO28 G19 S/P_CLOCK
V9
C359
C360
C361
GPIO7/MCSI2.SYNC 33 R402
C
RST_CTRL V10 MPUIO10/MPUIO7 GPIO62/MCBSP1.CLKS G20 RX
C
V11 G21
C347 100p
MMP_GPIO_3/PTT GPIO57/MMC.CLK GPIO54/MCBSP1.CLKX CODEC_SSI_BCLK
TDMASLOT_OUT Y8 GPIO8/TRST GPIO53/MCBSP1.FSX H15 CODEC_SSI_WCLK
EXT_PTT AA9 GPIO26/MCSI2.DIN GPIO51/MCBSP1.DR H20 CODEC_SSI_DO
ACC_IO3 Y10 GPIO27 GPIO52/MCBSP1.DX H18 CODEC_SSI_DI
3V3D P11
IGN_SENSE GPIO55/MMC.CMD
1 2 R422 1K MPUIO6 W11 L19
MPUIO9/MPUIO6 CAM.D0/MPUIO12 SPK_SEL
D601 LED OPT_BRD_PTT P18 GPIO3/MCBSP3.FSX/LED1 CAM.D1/GPIO29 K14 UART3_RTS_BT
R11 K15 UART3_CTS_BT
TP4027
EMERGENCY GPIO58 CAM.D2/GPIO30
MMP_GPIO_4/HOOK R13 GPIO36/CLK32K_OUT/MPUIO0/UART1-TX CAM.D3/GPIO31 K19 UART3_RXD_BT
TP325 1 Y4 UART2.BCLK/SYS_CLK_IN CAM.D4/GPIO32 K18 UART3_TXD_BT
CAM.D5/UWIRE.SDI/GPIO33 J14 CODEC_MISO
MCBSP3_CLKX W16 GPIO42/MCBSP3.CLKX CAM.D6/UWIRE.CS3/GPIO34 J19 S/P_CSLED
MCBSP3_FSX N18 GPIO12/TIMER.EXTCLKMCBSP3.FSX CAM.D7/UWIRE.CS0/GPIO35 J18 S/P_CS2
MCBSP3_DR AA17 MCSI1.SYNC/MCBSP3.DR
P14 H19 R354 33
MCBSP3_DX GPIO43/MCSI1.CLK/MCBSP3.DX CAM.EXCLK/UWIRE.SDO/GPIO57 CODEC_MOSI
CAM.HS/GPIO38 L15 S/P_DATA
P19 J15 R355 33
S/P_CS1 GPIO6/MCSI1.DIN/TIMER.EVENT3 CAM.LCLK/UWIRE.SCLK/GPIO39 CODEC_SCLK
WAKE_HOST/OPT_GPIO2 P20 GPIO4/SPIF.DIN/TIMER.EVENT4 CAM.RSTZ/GPIO37 M19 ACC_IO1
L18 C357 100p
R358 10 CAM.VS/MPUIO14 AUDIO_PA_EN
USB_D- R8 USB.DM/I2C.SCL/UART1.TX/Z
USB_D+ P9 USB.DP/I2C.SDA/UART1.RX GPIO50/PWTTIMER.PWM0 M18 CODEC_PWT
R360 10 M20 R421 100
PUEN GPIO15/TIMER.PWM2 R376 33 RX_VCO_L
W4 L14
R361 15K
R362 15K
USB.PUEN GPIO49/PWL/TIMER.PWM1 TX
R401 1.5k GPIO11/HDQ N20 ACC_IO2
L1 NC2 GPIO7/UART2.RCV Y5 PWR_CTRL
E5 NC1
C348 100p
W321
ANTENNA
TP4038
TP4014
TP4026
B B
2 3
3V3D
1
U327
3V3D C329 0.1u
5Oohm䍄㒓 LOW_LEVEL_MUTE 1 16
QB VCC
PUB_ADDRESS_MIC_EN 2 QC QA 15
3V3D R363 0 R364 0 R367 33
3 14 S/P_DATA
TP4033
TP4034
R366 10K
+
TXB RF_IN L321 LOGIC IC 1 2
3 3 PPS GND 18
R349 33 GPS_UART1_RXD R368 33
2 4 TXA RF_OUT 17
R350 33 GPS_UART1_TXD R384 NC C330 3V3D
CON5 1 33
5 RXA BOOT 16 39nH+/-0.3nH
R370 21 GND GND 22
6 15 0.1u
GPIO[10] GPIO[13] R397 NC L322
GPS_UART1_RXD 7 GPIO[0] GPIO[15] 14
8 13 BLM18PG300SN1 3V3DP
GPIO[1] GPIO[14] R532 R531 R530
GPS_UART1_TXD 9 12 10K 10K 10K
RF_PWR VIN_3V3
10 ON_OFF V_RTC_3V3 11
1
100
0
3VRTC
2
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
113
C <Doc>
<RevCode>
Date: Tuesday, November 30, 2010 Sheet 5 of 14
5 4 3 2 1
5 4 3 2 1
R539 10K
R538 10K
R541 10K
R540 10K
R543 10K
C482 C481 C409 C410 C411 C412
C413 C414 C415 C416
100p 100p 100p 100p 100p 100p J400
22 21 100p 100p 100p 100p
R456 33 2 1 R423 33
I2C_SDA R457 33 R424 33 WAKE_HOST/OPT_GPIO2
I2C_SCL 4 3 WAKE_BT/OPT_GPIO1
MCBSP3_DR R425 33 6 5 R431 33
D RESET_BT/SYSTEM_SYNC D
MCBSP3_CLKX R412 33 8 7 R408 33 OPT_BRD_PTT R400 10K
MCBSP3_DX R430 33 10 9 R415 33 3V3D
MCBSP3_FSX R420 33 12 11 R416 33 UART3_TXD_BT
14 13 R409 33 UART3_RXD_BT 3
16 15 R432 33 UART3_CTS_BT
TXAF_DI
RXAF_DO 18 17 R433 33 UART3_RTS_BT 1 R460 1K
AUX_C
5VD R407 0 20 19
24 23
Q323
C480 C479 2 DTC114EE
C407 CON2X10
C417 C418 C477 C478
100p 100p
0.1u 100p 100p 100p 100p
3V3D
R461 10K
R462 10K
R463 10K
R464 10K
R465 10K
MAP_GPIO_8
MAP_GPIO_7
MAP_GPIO_3
MAP_GPIO_6
MAP_GPIO_2 3V3D
3
2
3V3D U328 PRGM_OUT8
PRGM_OUT7 EMERGENCY_IN
16 VCC QB 1 R439 100
R477 1K 15 2 PRGM_OUT3 IGN_SENSE
R474 33 QA QC PRGM_OUT6
C S/P_DATA 14 A QD 3 ALARM C
3V3D R475 nc 13 4
R473 33 OUT EN QE
S/P_CS2 12 LATCH CLK QF 5 ALARM 5VD 5VD
R467 33 11 6
S/P_CLOCK SHIFT CLK QG VBUS_EN R4964.7K 5VD 5VD 5VD EXT_SWB+
3V3D R466 10K 10 7 5VD
RESET QH
9 SQH GND 8
R446
NC
R472
LOGIC IC 5VD
4.7K
3 R471 R469
R443 10K 3
R447 10K R468 4.7K
R470 4.7K
3V3D 1 4.7K R449
1
2
R445 100 4.7K Q400
EXT_PTT
1
1.0V 1.5K
1
Q406 MUN5214DW1T1
Q407 MUN5214DW1T1
5VD Q405 R448 4.7K
Q409 MUN5214DW1T1
Q410 MUN5214DW1T1
1
Q408 MUN5214DW1T1
2 DTC114EE R1 R1 Q401
R2 R2
R1 R1 R1 2 DTC114EE
R437 4.7K R2 R2 R2 R450 2SA1362
1
2 3
2.7K
3
MUN5214DW1T1
1
R428 4.7K
R1 R2 R2
3V3D 1 R563 33k R2 R2 R2
R2 R1 R1 3
R1 R1 R1
Q404 Q402 1
R427 10K
6
R2 DTC114EE
6
Q411
R547470
R55933k
R1 R551 R546 470
R548 470
R558 33k
R549 470
R560 33k
470 2
R56133k
R562 R550
R557 100
33k
6
ACC_IO3 470
5VD D405
C434 C436
1
MMBZ20VALT1G
R435 4.7K
R2
R1 D233
MMBZ20VALT1G
B B
R556 100
6
D409
ACC_IO2
3V3D 5VD
R452 10K U401 USB_VBUS D404
C421
3 2 220p MMBZ33VALT1G
R451 10K FAULT GND MMBZ20VALT1G
VBUS_EN 4 ON
5 IN OUT 1
VBUS_DEC SMART SWITCH
PUB_ADDRESS2
RX_AUDIO
PUB_ADDRESS1 7.0V R455 100K
EXT_MIC
EXT_SPKR+ IGN_SENSE_IN
EXT_ALARM_OUT
EXT_SPKR-
PUB_ADDRESS1
PUB_ADDRESS2
EMERGENCY_IN
1 2 L417 BLM15AG121SN1
IGN_SENSE_IN
PRGM_IN_PTT
USB_D-
EXT_SWB+
PRGM_IO2
PRGM_IO3
PRGM_IO7
PRGM_IO8
CM2-2012MCIN-181T
R478 nc
UART3_TXD_BT D450
2
R480 nc
UART3_RXD_BT PRTR5V0U2X
GND I/O1
VCC I/O2
C476 C474 C426 C427 C428 C429 C430 C431 D240 D238
NC NC 100p 100p 100p 100p 100p 100p
MMBZ20VALT1G MMBZ6V8ALT1G
1
19
10
11
13
15
18
17
16
24
23
25
12
21
22
14
20
26
27
28
1
4
6
9
8
7
2
5
USB_D+
V_BUS
EXT_SWB+
EXT_SPKR+
PRGM_IN_4_EMERGENCY
PRGM_IN_PTT
PRGM_IN_5_IGN_SENSE
PRGM_OUT_9_EXT_ALARM
USB_D-
USB_GROUDN
ACC_MAP_ID_2
ACC_MAP_ID_3
AUX_AUDIO_OUT_1
PRGM_IO_6
AUX_AUDIO_OUT_2
TX_AUDIO
POWER GROUND
EXT_SPKR-
Audio Ground
RX_AUDIO
GROUND2
GROUND3
PRGM_IO_3_CHAN_ACT
PRGM_IO_7
PRGM_IO_8
GND1
GND2
PRGM_IO_2_MONITOR
5VD
R476 10k
A J403 A
MAP26
DESIGNER: LHY
Title
<Title>: peripheral
114 Size
C
Document Number
<Doc>
<RevCode>
Rev
5 4 3 2 1
5 4 3 2 1
C465
TP4015
100p
SPK+
TP4001
TP4002
TP4005
TP4006
TP4009
TP4010
TP4011
TP4041
TP4013
TP4017
TP4019
TP4020
TP4021
TP4022
TP4023
TP4024
TP4025
3V3D
C464
C460
C461
C462
100p C463
C470
C472
C473
TP4007
TP4008
C468 C439 C438 C441 C440 C435 C420 C419
USB_VBUS R494
NC
NC
NC
NC
NC
NC
100p 0.47u 0.47u 100p 100p 100p 100p 100p R555
0.1U
J404 NC 10k
1 INT_MIC_MMP INT_MIC
2 MIC_GND MIC_GROUND
3 ACC_IO1_MMP R554 1k ACC_IO1
4 USB_VBUS
5 HOOK_MMP HOOK
6 PTT_MMP PTT
7 USB_D- L414 BLM15AG121SN1 3 4 USB_D-
8 USB_D+ L415 BLM15AG121SN1 L413 1 CM2-2012MCIN-181T
2 USB_D+
C 9 Pwron_MMP Pwron C
10 UART2_RXD R534 10K
UART2_RXD
11 UART_TXD R535 10K UART2_TXD
12 SPKR1+ HANDSET_AUDIO
13 SPKR1- SPKR1+
14 HANDSET_AUDIO SPKR1-
15 5V 5VD TP4030
16 /RST_OUT R495 33 /RST_OUT
17 KB_C0 R498 33 KB_C0
18 KB_C1 R486 33 KB_C1
19 KB_C2 R491 33 KB_C2
20 KB_C3 R485 33 KB_C3
21 KB_R0 R523 33
KB_R0
22 KB_R1 R524 33
KB_R1
23 KB_R2 R525 33
KB_R2
24 S/P_CSLED R526 33 S/P_CSLED
25 S/P_CLOCK R527 33 S/P_CLOCK
26 S/P_DATA R533 33 S/P_DATA
27 /OE_LCD L411 BLM18PG300SN1 /OE_LCD
28 /WE_LCD L412 BLM18PG300SN1 /WE_LCD
29 CS2_LCD L410 BLM18PG300SN1 CS2_LCD
30 F_A1_LCD L407 BLM18PG300SN1 F_A1_LCD
31 F_D7_LCD L409 BLM18PG300SN1 F_D7_LCD
32 F_D6_LCD L408 BLM18PG300SN1 F_D6_LCD
33 F_D5_LCD L406 BLM18PG300SN1 F_D5_LCD
34 F_D4_LCD L405 BLM18PG300SN1 F_D4_LCD
35 F_D3_LCD L404 BLM18PG300SN1 F_D3_LCD
36 F_D2_LCD L403 BLM18PG300SN1 F_D2_LCD
37 F_D1_LCD L402 BLM18PG300SN1 F_D1_LCD
38 F_D0_LCD L401 BLM18PG300SN1 F_D0_LCD
39 GND
40 PWR_KEY PWB_IN
41
4
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
NC
NC
NC
42
C469
CONTROL HEAD 100p
C446
C444
C449
C451
C450
C448
C445
C447
C442
C443
C453
C454
C455
C456
C452
C457
C458
C459
C466
C467
D408 D407
TP4028
B B
3
TP4018
TP4055
GND
A A
DESIGNER: LHY
Title
115 Size
<Title> OMAP CORE
5 4 3 2 1
5 4 3 2 1
2
U901
BLM41PG600SN1
C902 + D900 TP4035 RP102N331B 3V3DP
2
C903
470p/50V 1 5
VDD VOUT
L900
470uF/25V 2
MR2835SKG
2
D
C905 GND C906 D
B901 5VA 3 4
1
1u CE NC 1u
1
9V3 L904 U905
BLM18PG181SN1D XC6209F502PR C925 U903
1
L930 10uH 4 XC6209F182PR L901 1V8D
U902 D901 Vin Vout 5
1
3
BST C907
2
14 IN R924 1K 1u
1
2
3
0.1u 3 CE Nc 1
17 BP L902 3 CE Nc 1
16
CE
5 VOUT VDD
GND
LX7
RP102N331D
2
LX6 15
10uH C911
7 EN LX5 5
4 C960
LX4 D902 330p
U909
R911
4 NC
1
1
47uF/25V LX1 1 R912 L931
2.2u/25V 1 10 4.7uH 1V6D
VIN PGND
1
C947 0.1u 510 C951 C915 4.7uH
2
1
0.1u 4 7
22uF/10V
10uF/25V
0.1u 10uF/16V 0.1u 4.7K PG SYNC
2.2u/10V 9 R951 1.5K + C946 5 6 +
C917 C918 C919 C932
2
OS 1u FB LBI R917
10uF/16V 2.2u
11 R981 NC TPS62050 22p 330K 1% 10uF/16V
2
FB R918
C921 220p
10 6.04K 1%
GND
C928 C910
1
10u/16v 1000p
R952 + R906
PWR_ON 47k R908
1
24K
2
3
1 2 4.7K
D918 Q920 RX 1
C C
NC D45H8G 9V3 Q903
L940 L916 DTC114EE
BLM41PG600SN1
1 2 3 2 1 2
1
1
C980 2
C950 + + BLM41PG600SN1 +
C956 C957
0.1u D915 C955 C958
10uF/25V 10uF/25V 10uF/25V
1SS372 0.1u 0.1u
2
2
R958 U915 U918
1
3V3D
R953 XC6209F502PR 5VA_FGU XC6209F332PR 3V3A_FGU
680 R962 R964
4 Vin Vout 5 4 Vin Vout 5
10
1
R961 0 2.2K 1%
1u 2 C963 2 C965
6
R963 C952 0.01U R971 2.74K 1% Vss C926
+ Vss U910
330 0 R972 C962 2.2u
0.1u R932
VDD
2.2k 10uF/16V /PRST1
2
3 1 3 1 4.7K
CE Nc CE Nc 5 D913
2
2
3
R954 1K SENCE
1 2 1 /PRST
1
RSET
A-
A+
V-
3
A OUT
Q921 R965 0
+-
C937 MR MBRM120LT1G
A
GND
PZT2222AT1 U914 R982 100k 1000p 4
-+
CT
B- B
B OUT
NJM2904V
V+
C941
B+
3
TPS3808G33DBVT
2
D917 0.15u
3V3D
8
7
6
UDZSTE(175.1B)
1
R969
R966 3
47k
150
R970 1k 1 R950
3
10K
R968 2.2k
1 R948 R967
PWR_ON Q923 3 VOTG_DET
2 D910
DTC114EE 100 0
Q922 2 1 1
DTC114EE Q913 U906
2 R949 C945
UDZSTE(1715B)15V DTC114EE 1 8 D912
47K 470p MR WDO
R931 3V3D 2 VCC /RST 7 2 1
47K 2 3 6
B C978 GND WDI MBRM120LT1G B
U917 4 PFI PFO 5
0.1u R983 0
2 TPS3705-33D RST_CTRL
VDD R929 100
OUT 1
4
GND
R934 NC
5 NC1
47K
R3111N421A 3 R977
nc
Q905
R930
3 4 PWR_ON
PWR_CTRL_594 1 2 R984 220 15k C942 M7 M8 M9 M10 M11 M12 M13
D914 HVC131TRF-E 0.1u
PWR_CTRL R978 1K 1 2 R933 220 2
1
D909 HVC131TRF-E
2
2
C967 R957
U913 D904 1 5
0.1u R976
EDZTE613.6B
3VRTC
EDZTE613.6B
D235
LM317L(nc) RB521S30T1G(nc) 1K
D241
10K
1 2 1 2 3V3D
IN OUT1 UMC4N
OUT2 3 R975
2
6
1
NC1
NC2
OUT3 20K
ADJ
3
4
5
8
2 3 1 2
R941 Q1
1
+
R939 2SK1824 1 2 1 IGN_SENSE_IN
0.1u 4.7K 1 180k
1
R940 Q908
1
2
1k 22uF/16V
EMERGENCY_IN DTC114EE 3V3D
2
R956 R959
U912 22K D911
R979 2 180K 47k
ML414RF9AE ℸ໘㒓ᬍ HVC131TRF-E
10K
2
Q910
A A
MMBT3906LT1 D907 R945
1
Q909
F900 L917 EXT_SWB+ 2 3 1 2 10K
2SB1184
3 2 1 2
HVC131TRF-E R947
C969 3
LITTELFUSE04662 R942 PWB
C944 0.1u
4.7K 1K
R943
1
116
2 C <Doc>
<RevCode>
Date: Tuesday, May 10, 2011 Sheet 8 of 14
5 4 3 2 1
5 4 3 2 1
5VA_FGU
L156
3.3UH R175
10
1
C82 C89
C1010 + C1009 1000p 0.1u
1000p 1u/16V
L8
2
3V3A_FGU
601SN1
2 1
L7
C80 601SN1 C83
0.01U 1 2 0.1u
1
L6
601SN1
C86 C121
0.1u 100p
2
PLLLD U100
R177
TP121 sky72310 R109 TP116 TP118 TP120
10K C93 10 PLLDATA PLLSTB PLLCLK
100p 1 24
R181 VCCecl/cml Mux_out
1
Fin 2 Fvco_main NC23 23
1K
1
C PLL_LD 3 C
Fvco_main R167 33
C90 Clock 22 PLL_CLK
1
C95 100p 4 LD/PS_main CS 21 PLL_STB
5 20 R178 33 PLL_DATA
0.01u D100 VCCcp_main Data
6 R1110 33
BA277 CPout_main
VCCdigital 19 C1320 C77 C76
R171 R187 C1002 7 NC7 NC18 18 100p 100p 100p
2
0 82 1000p 8 17
Xtalacgnd/OSC NC17
PowerPAD
TP124 CV 9 16
C124 C132 Xtalin/OSC NC16
CV C122 C1017 C1016 10 15
nc 0.1uf R111 C123 0.1uF Xtalout/NC NC15
R180 NC 0.1uF 11 VCCxtal NC14 14 C98
100 0.1uF
10k 12 GNDXtal NC13 13 0.1u
C97 C96
1
25
C87 FSA66P5X
0.1u
5 Vcc Vin 1
OUT 2
FL_Control 4 ON/OFF GND 3
R183 C75 R3 R6 R182 R114
1K 1000P 0 0 nc 56 L149
NC
19.2_AD9864 3V3A_FGU
R5 R4
5VA_FGU C65 100
0 U102 NC
FSA66P5X R188
1
0
5 1 L150 C85 C1013
Vcc Vin +
R168 2 NC 0.1u 10u/16V
NC OUT 19.2_OMAP
LP_control 4 ON/OFF GND 3 TP119
2
C79 C81 R166 MOD_L
1000P C1004 NC NC
TP110 33P R174 R2
X100
REF
1
0 0
4 VCC VCONT 1 MOD_L_RFCS
1
3 2
L154 OUT GND R184
5VA_FGU 4V3A C1000 0.56u C99 DSA535SD NC
220p 270p
B REF OSC B
C1006
1
NC NC C1005 C78 C94 C1007 C91 C88 C70 C74 C84 C72 C67 C69 C68 C66 C64 C103 C105 C104
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U nc nc nc
2
C1001 + C71
470p 1u/16V
2
A A
DESIGNER: ZDW
Title
<Title> PLL
117
Size Document Number Rev
C <Doc>
<RevCode>
Date: Sunday, September 19, 2010 Sheet 9 of 14
5 4 3 2 1
5 4 3 2 1
3
D101 C198 C196
3.6p 7p
1SV305
21 2
Q100
C13 C27 C193 2SC5010
L108 D116
0.5p
1
470nH 1SV305 3.6p C26 33p C185 R185
21 3.6p 56p 5VA_FGU nc
L105 Q117
8n TX
EMD22
C184 D127
220p D111 4V3A 3 4 DAN222
L106 R157 Q105
1SV305 L107 EMD22
2 2 27n 2 1 5 1
D102 470n 601SN1 TX_VCO_H
D117 C191 3 4 2 3
1SV305
1SV305 18p 2 TX_VCO_L
5
1
4V3A 2 TX_VCO_L 6 1
R139
C136 82
2
4.7u R128 R117 6 1
82K 39K L131
601SN1
R149 R147
C145 C143 NC 100
C144 R120
1
NC NC 39K NC
220p
R163 R164 R146
2
C147 C199 C1 C101 C2
C163 NC NC 100 L132 3P TP111
R151 1.5P
MOD_H 0.1u L148 0.01U 1000p 27NH TX_LO
R131 15k
1
NC
3.3k
TP108 L4 C107 C11 L2 L136
C8
1
MOD_H C40 C41 R191 nc 4P 15NH 15NH
1
470n 470p nc
C37 C38 NC NC R152 L135 TX_LO
36K
3
C186 R140 NC NC 27NH C14
220p C106 C17
C141 C142 100 R173 nc 10p 12P C16
R138 nc 1 C15 TP114
470p Q107 6P GND
3
0.1u 8.2k U105 10p
C C166 C34 C35 C39 R141 PBR941 C
L110 5p R122 100P 1 8 NC
470n 27 NC Vcc1 Vcc2 47
1
2 7 1 Q102
2
C181 IN OUT C19 R155
3 IN SW2 6 2SC5108Y L138
3
0.5p 4 5 NC 20k
D105 C152 C151 GND SW1 R150 R162 27nH
9p C36 C21 R156
1SV305 4p R129 R135 L168 NC NC 470P 68
2
21 2 220 27NH NC NC R161
220 18K
Q103
C159 2SC5010
L112 D112 C153 C157
1
R137
82
Q108
R179 EMD22 4V3A
601SN1
3 4
CV C29
C30 5
R158 0.1u
6.8k L117 220p 2 RX_VCO_H C178 C179
470n 2P 1P
C46 6 1
R160
220p
C7 100
C6 L128 L122 L123
0.1u R159 15NH
220p 15n 15NH
7.5k Fin
L121 C32
5p
470n C190 C192
C189 NC
12P NC
3
R144
120
2
L9
R154 601SN1
R190
NC 100
1
C150 C167
R169 R165 R148
220p 0.1u
2
1
C43 C45 15k 6P 18NH 220p
1
3
C52 1.5P NC NC R199 27NH C20 C59
220p R196 TP122
100 120K 10p 12P
C149 C148 C61 C22 GND
R194 1 8P
0.1u 470p Q109
3
7.5k U107 12p
C33 C48 C47 PBR941
L134 C168 R123
1
5p 100P NC 1 8 NC R1
470n 27 Vcc1 Vcc2 47
2 7 1 Q111 C54
2
IN OUT L166 R195
3 IN SW2 6 2SC5108Y
3
C155 NC 20k
D109 C164 C51 4 GND SW1 5
R170 R172 27nH R197
5p 12p R136 L167 C57
1SV305 R130 NC 0
2
21 NC NC NC
A 2 220 220 27NH NC R189 A
NC
Q110
C165 2SC5010
L133 D125 C154 C161
4p
1
<Title> VCO
118
R192
120 Size Document Number Rev
Custom<Doc>
<RevCode>
Date: Wednesday, May 11, 2011 Sheet 10 of 14
5 4 3 2 1
5 4 3 2 1
D D
TP703
TP702 IF
GND
1
1
TP704
C701
330n C703 2FLO
0.01u
3P
TP701 IF-out
1
L716
C743
TEST POINT
47p
C702
1
0.01u
L701 L702 601S
1 2
1 2
L703 C742
R724 0 C704
1 601S 2 C705 1u
0.1u 220P
R701 C706 9V3A
51 601S
470p
C707 TP709
2
R703 L717
0.1u 5VA_RX
2.2k 5VA_RX L706
C709
C708 601S
0.1u C710 1000p C718 C717
0.1u TP705 Q702 U703
1
L704 L705 C711 6.8uH
R704 CV2 1u 470p 2SC4617 POWER IC
10u 10u C712 NC C713
1
0.1u 560 3900p 1 3 5 Vout Vin 4
48
47
46
45
44
43
42
41
40
39
38
37
C716
1
R727
1
R708 Vss 2 C752
47k 10u/16v +
VDDI
GNDI
LOP
VDDP
GNDP
CXIF
CXVM
CXVL
VDDL
IOUTL
IFIN
LON
C715 R709 4.7k C746
180p 0.47u R707
2
10k 470p
180 1 3
2
Nc CE
1 MXOP GNDL 36 Q701
1
C C
C720 0.1u
3
2 MXON FREF 35 C723 C724 TRANSISTOR C725
3 34 + C726 R728
C721 GNDF GNDS R705 10K 15p 18p 10u/16v C727
C722 4 33 47k
L707 100p IF2N SYNCB 2 0.01u 470p
100p 5 32
601S
2
IF2P GNDH R711 33
U701 3198_FS1
1
1 2 C728 6 VDDF FS 98_FS C731 C730
1000p 7 GCP DOUTB 3098_DOUTB1 R717 33 6p L708 22p C732 3V3D
C729 IF IC 2998_DOUTA1 98_DOUTA 3V3D_RX
1
8 GCN DOUTA D701 220n(HQ) R710 22p TP710
0.1u 9 2898_CLKOUT1 R715 33 98_CLKOUT HVC350B 8.2k
10
VDDA CLKOUT
27 1 2 3V3D_RX 3V3A_RX 3V3A_RX U702
GNDA VDDH R730 R726 POWER IC
2
11 VREFP VDDD 26 C719 C735 C734 R712 NC NC
2
L709
1
C736 12 VREFN PE 25 30p 2 1 5 VOUT VDD 1
L711 1u 601S 270
1 2 49 2
IOUTC
0.1u L712
GNDQ
PowerPAD GND
GNDC
GNDD
GNDS
VDDQ
VDDC
RREF
CLKN
CLKP
601S C737 4 3
L710 601S NC CE
0.1u
PC
PD
601S L718
100k
470n
C749
1 2 39P
1
TP707 L713
18M 0.56u
C747 22P C751 10p C714
L715 3.3u
10p
1
C744 98_FS1
0.1uF R716 5.6k C745 98_DOUTB1 R725 33
98_DOUTB
56p 98_DOUTA1
1
98_CLKOUT1
C748 98_PE1
0.1u R718 98_PD1
510 D702 98_PC1
HVC376B
2
A A
DESIGNER YYF
Title
<Title> IF
119
C <Doc> <RevCode>
5 4 3 2 1
5 4 3 2 1
2 1
C909 C889 C913 C888 C825 C885 L801
C855 47pF 470p BLM41PG600SN1 W801
1
100p 3300p 0.018uF
33p
33pF 2 1 C916 C930 C931 C940 C943 ANTENNA
C801 C802 C803 + C804
L803 47u/25V 3300p 0.018uF 33p 33p 3300p
R812 Gate_1
D L804 BLM41PG600SN1 1000p 3300p 33pF TP801 D
NC
2
3T/16nH 1 4
R807 C820 2 3
C833
C810 4.7 12pF
1
C815 4pF
47pF C821 C816
W= 3mm 220pF R804
5
NC 2p Directional Couple
4.7
1
L= 5.5mm
w=3mm,
C8330 C841 L807 C817
M801
L=5.5mm R806 Q802 3
Z= 8ohm
Z=8 4.7 MOSFET
22pF 8pF
C823 C824 C856 C876 C879
100nH 470pF
C827 Fcouple 4 4
2 L809 L813 L810
10pF NC 8pF NC NC 470p
L808 3T/16nH 3T/16nH 3T/16nH
C893 1 2 1 2
R813
33
0 470pF Pin Pout
4.7
2 D801 R815
C832 C834 C870 C874 C835 C836 C837 C830 C838 L828 C884
Q803 MA4P1250 5 6
R818 C842 C831 NC NC NC NC 2pF 2p 5p 5p 3p 5 Rcouple 27k 1uH NC
C839 MOSFET
4.7 22pF 4pF
220pF L833 R848
C840 L816
1
R860 47pF NC
47pF 11T/113nH L832 R840
NC L817
C819 C873 C882 10nH NC
C812 C848 C847
R861 8pF NC NC
1
12pF C850 3T/16nH 150p 150p
4.7
470p R816 R817
Gate_2 C851 D802 C852
220 220
3p MA4P1250 100p R819 R820
C846 82 NC
D804
33pF R821 C858
2
RX_in RB706F
L815 33 NC
BLM18AG601SN1 2
C860 C828 R825 C861
2 1 C862 3
NC NC 33 68pF
1.5p 1 C891
R823
C849 120p
100
NC
C857 R852 R853
L829 L830 TP809 22pF 470 470
0 0
TP806
Gate_2 M6 M5 M1 M2 M3 M4
Final_bias R859
1
Final_bias D803
1
RB706F
1k R856
C892 R822
1
C 51 2 C
220p Gate_1 0 3
GND TP807
1 C899
C869 APC
R855 120p
15pF RT803 R871
C886 C887 R858 51 9V3A R850
TP808 NC t NC R851
NC 220p 9.1k 1 2 NC
9V3A TV_APC
1
NC
1 R900 R834 R836
1
R832 R833
R841 NC NC
R847 NC NC
L802 33k
NC 47K
BLM41PG600SN1 Q810 L821
TRANSISTOR BLM18AG601SN1
2
3 2 2 1 APC_COMP
C859
U801
15pF
C854 C853 C807 C868
1
IN+
L819 0.1u 220p 10u/25V C829 C845 0.1u R873 5 VEE 4 R837 R838
W= 3mm w=3mm,
8T/47n 0.1uF 220p
L822 R831
NC C894 0 33k
1
+-
L=3mm L820 BLM18AG601SN1 10k R839 R870 6 3
L= 3mm Z=8 1uH
R877
VGG 3.3K 10K
0.1uf IN- IN+
R881 47K
Z= 8 ohm 4.7K 7 2
2
OUT + IN- -
L827 TX 3 R880 R842 C875
3
2
39nH 4.7K 8 VCC
OUT 1 12k 150P
R826 C866 C864 1 C904
C867 R830 R896 R857
1 0 L823 18pF Q811 NC
NC 47 NC D805 OPAMP 0
1 C863 TRANSISTOR
C809 UDZS5.1B
Q804 0
4700pF 220p 2
MOSFET
1
R828 R827 R866
2
C871
3
B C822 B
C813 R805 R809
IN+
C814 220p 5 VEE 4 R863
C880 C844 NC NC 82 NC
18p R882 0
1
C881 0.047uF NC 2 TX_LO
+-
C878 R845 C877 R846 R893 150k 6 IN- IN+ 3
NC R844 R843 R808
220p 20K 220p 10K C818 R865
10k 5.6K Q801 10 7 2
R811 15p OUT + IN- -
TRANSISTOR L811 R814 R810 R892
4
3
0 8 VCC
OUT 1
220p
C811 R862
L824 L825
470p 56 R872 1k
BLM18AG601SN1 BLM18AG601SN1
TP812 180k
2
1
VGG TP811 NC 1K 3
9V3A TEMP_DET2
1
driver 2
3 3 R875 R886
R904 33K DAN222 R888 R884
1 1 220k
0 18k TP810
NC
REV_TEMP_DET TEMP
R867
R889 R891 R885 L806
Q812 Q813 8.2k
2 2 DTC114EE TEMP_DET NC 0 10k 1uH
DTC114EE 2 1
SW1
11
PAD SW D129
R905 MA2S077 C896
C898 R890 220p R883
33K
220p 3.3k 56k
RT804
t
100k
2
R868
NC
R876
C897
C954 R897 56k
220p
NC 470k
U804
TV_APC
A R864 OPAMP A
IN+
470k 5 VEE 4
+-
REV_TEMP_DET 6 IN- IN+ 3
R898
470k 7 OUT + IN- - 2
R899
470k 8 VCC
OUT 1
120
18k C <Doc>
<RevCode>
Date: Wednesday, December 08, 2010 Sheet 14 of 14
5 4 3 2 1
2 1
MD78X/MD78XG Schematic Diagram
(Front Panel)
5VD
M1 M2 M3 M4
3V3A TP1 TP10TP11TP4 TP5 TP12TP13TP2 TP6 TP3 TP7 TP14TP15TP8 TP16TP9 TP17
1
5VD 5VD
1
TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP D3
BLM18PG300SN1
5VD 5VD 5VD MMBZ6V8ALT1G
L2
C2
KPT-1608SGC
D4
100pf
1
KPT-1608SGC
KPT-1608SGC
D2
UP MENU C1 C3
D1 R4 R3 R2 R5
100pf 0.1uf
3
DOWN 56 56 56 56 R6
B3
B2
B1
U2
EMI FILTER
42
P4 10K J1
12
12
12
U1
16
C1 A1
GND3
GND2
GND1
A Y1 X1 UART2_RXD
LOGIC IC C2 A2 PRST
GND2
KPT-1608SGC
D7
B UART2_TXD
D6
D5 p1 BACK Y2 X2
15 11 C3 A3 CLOCK 25
VCC
KPT-1608SGC
KPT-1608SGC
Q0 SHCP Y3 X3 S/P_CLOCK
4
p3 p2 D8 D9 1 12 C4 A4 CSLED 24
Q1 STCP Y4 X4 U3 DATA S/P_CSLED
2 10 C5 A5 26
B 2 KAA-3528RG KAA-3528RG Q2 SHR Y5 X5 EMI FILTER CS2_LCD S/P_DATA
B
2
2
3 Q3 STR 13 PRST C6 Y6 X6 A6 29 CS2_LCD
1
4 C1 A1 F_A1_LCD 30
Q4 C4 D10 Y1 X1 WE_LCD F_A1_LCD
5 C2 A2 28
3
R1 Q5 0.1uf Y2 X2 OE_LCD WE_LCD
R7 R8 6 Q6 DS 14 MMBZ5V6ALT1G C3 Y3 X3 A3 27 OE_LCD
33 J2 R9 33 F_D0
7 C4 A4 38
GND
33 33 Q7 Y4 X4 F_D0_LCD
4
17 18
GND1
GND2
GND3
D11 D12 9 DB7 DB8 C5 A5 F_D1 37
Q7S 16 19 Y5 X5 F_D2 F_D1_LCD
DB6 DB9 C6 A6 36
3
KAA-3528RG KAA-3528RG 15 20 Y6 X6 F_D3 F_D2_LCD
DB5 DB10 U4 35
8
14 21 F_D4 F_D3_LCD
DB4 DB11 EMI FILTER 34
B1
B2
B3
13 22 F_D5 F_D4_LCD
R10 33 DB3 DB12 33
3
12 23 C1 A1 F_D6 F_D5_LCD
DB2 DB13 Y1 X1 32 F_D6_LCD
3
11 DB1 DB14 24 C2 Y2 X2 A2 F_D7
3 1V8A 31 F_D7_LCD
Q1 10 DB0 DB15 25 C3 Y3 X3 A3 R11 33 PRST
R12 33 16 PRST
9 RD DB16 26 C4 Y4 X4 A4
2 10
GND1
GND2
GND3
8 27 C5 A5 UART2_RXD UART2_RXD
2 Q2 WR DB17 Y5 X5 UART2_TXD 11
R13 7 28 C6 A6 R14 NC(47) UART2_TXD
DTC114EE 3 RS RESET 3V3A Y6 X6 39
6 29 1V8A GND
2SK1824 CS IM3 R15 0 15
1
B1
B2
B3
RED 2 3V3A R18 0 FLM IM0 14
Q3 4 IOVCC LED_A 31 R19 0 C5 SPKR1-
R20 10 100p 13 SPKR1+
DTC114EE 3 VCI2 LED_K1 32 PWB_IN
R21 10 C7 40 PWB_IN
2 VCI1 LED_K2 33 C8
C6 R22 10 17 KB_C0
1 C9 1 GND LED_K3 34
100p 0.1uf 100p 18 KB_C1
0.1uf 36 GND2 GND1 35
C10 C11 C12 19 KB_C2
3
20 KB_C3
FPC CONNECTER 100p 100p 100p 21
Q4 KB_R0
22 KB_R1
U5 23 KB_R2
5VD 2 2SK1824 ACC_IO1
POWER IC 3V3A 3 ACC_IO1
L1 PTT 6
4 5 R23 0 PTT_MMP
HANDSET_AUDIO
1
Vin Vout 12
USB_D- HANDSET_AUDIO
BLM18PG300SN1 7
2 C14 MIC_GROUND USB_D-
Vss TP18TP19 2 MIC_GROUND
3
C13 1uf TP TP USB_VBUS 4
1uf D13 INT_MIC USB_VBUS
1 INT_MIC
3 CE Nc 1 USB_D+
MMBZ20VALT1G 8 USB_D+
HOOK 5 HOOK_MMP
GND1
ACC_IO2 9
TP20 TP21TP22TP23 TP24 ACC_IO2
2
C15 C16 CON40_MAIN
5VD U6
POWER IC 1V8A 0.01uf
0.01uf
41
L3 R24 NC S1 TP TP TP TP TP J3
4 Vin Vout 5
SKQMBBE010 SPKR
NC(BLM18PG300SN1) SPKR1-
2 Vss C18 1 2 SPKR- 2
1 SPKR1+
C17 nc(1uf) SPKR+
1uf
3 1 C19 470PF
CE Nc
KB_C0
KB_C1
A1 KB_C2
ANTENNA
3V3A TP25 TP26
C20 KB_C3
470pf KB_R0
1 2 C21
10K 10K
KB_R1
R25 R26 TP TP 470pf C22
S2 S3 S4 S5 S6 KB_R2
3
C B B TP29
R29 0 TP27
0 S8 S9 S10 S11 S12 TP
E27 C23 C24 PF1 PF1 PF1 PF1 PF1 TP
6
7
W1 TP28
R30 0 0.1uf 0.1uf 1 2 1 2 1 2 1 2 1 2
TP
FIXER P5 p2 p1 DOWN P4
C28 C29 C30
C25 C26 C27
NC NC 470pf 470pf 470pf
470pf
3
3
D14 D15 D16
D17 D18 D19 D20
MMBZ5V6ALT1G MMBZ5V6ALT1G MMBZ5V6ALT1G
MMBZ5V6ALT1G MMBZ5V6ALT1G MMBZ20VALT1G MMBZ5V6ALT1G
3V3A
1
2
A R31
0
C31
470PF
C32
470pf
C33
470pf
C34
470pf
C35 C36
470pf 470pf
C37
470pf A
R36 R35 R34 R33 J4
ACC_I00 1
10K 10K 10K 10K 2
PTT
HANDSET_AUDIO 3
CS2_LCD 4
USB_D-
MIC_GROUND 5
F_A1_LCD 6
USB_VBUS
INT_MIC 7
WE_LCD 8
USB_D+
HOOK 9
OE_LCD 10
ACC_IO1
5VD
U8
2
CON10_MMP R32
10k 4 2 D21 TP30TP31TP32TP33TP34TP35TP36TP37TP38TP39
VCC IO1
MMBZ6V8ALT1G
1 GND IO2 3
PRTR5V0U2X
3
TP TP TP TP TP TP TP TP TP TP
121 V1.0
2 1
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FGU
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used to amplify the VCO signal to the desired output power level, while the latter can keep the output
power at the desired level, so as to protect the power amplifier from damage caused by over heat,
antenna mismatch, and out-of-range voltage (over voltage or under voltage may result in damage to
first stage is a buffer amplifier circuit with fixed gain; the second stage is a pre-driver power amplifier
circuit with variable gain (formed by Q805); the third stage is a driver power amplifier circuit with variable
gain (formed by Q804); and the final stage is the final power amplifier circuit with fixed gain (formed by
Q802 and Q803). In addition, this power amplifier contains a TX/RX switch and a low-pass filter.
Note: only a final power amplifier (Q803) is available in later versions (including version H).
13.1.2 TX Buffer Amplifier
The first stage (Q801) provides about 16dB power gain, and adjusts its bias circuit to get a quiescent
bias current of 28mA (for Q801). Power supply for the switching transistor Q810 is controlled by TX
signal (enabled by antenna switch) so as to further control the power supply for the whole circuit.
input matching circuit is composed of C826, L826, L814, C843 and R824.
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Service Manual
The driver power amplifier is formed by Q804, with variable gain controlled by voltage VGG. The
maximum output power is 38.5dBm, and the maximum variable gain is 11dB.
the maximum variable gain of 10dB. The input matching circuit is composed of C815, C839, R804, R806,
R807, R813, R818 and R861, while the power combining circuit is composed of C820, C8330, C831,
In TX mode, the switching transistor Q810 is controlled by TX signal, so as to supply 9V 3A to the PIN
diodes D801 and D802. Quiescent bias current of the PIN diode is controlled by the resistors R821 and
R825. In this mode, D801 and D802 are turned on; RF signals are applied to the low-pass filter
(composed of C871, C816, C836, C837, C838, L809, L813, and L810) and then transmitted via the
antenna port.
In RX mode, TX signal controls the switching transistor Q810, to further control the power supply for the
PIN diodes D801 and D802, which are not applied with DC bias current. When the two PIN diodes are
turned off, signals feed into the RX path through the low-pass filter (composed of L871, C852 and C862).
both forward and reverse directed power of the transmitter. The forward power is coupled to the diode
D803, and the voltage is applied to the power control circuit (U801). Then the voltage VGG is output to
control the gate voltage of pre-driver and driver PA, ensuring a constant power output.
The directional coupler can adjust the TX power and detect the VSWR load. The reverse power is
coupled to D804. The voltage is applied to U802 and then feeds into U302 for detection
voltage that can represent the forward power. The voltage together with the preset voltage feeds to U801
164
Service Manual
to output a voltage VGG, which can control both gate voltage and gain of Q804 and Q805, ensuring a
detected temperature. Both the voltage used for temperature detection and the threshold voltage are fed
into the operational amplifier U803, to output a voltage signal that is in proportion to the detected
temperature. Afterwards, the voltage is applied to software for judgment, and then the preset voltage will
be subsequently changed to reduce the TX power, and to protect the PA from over-heating.
rubber part mounted on the top cover. If the switch is turned off, VGG will become low, and no power will
second IF is 2.25MHz. The first local oscillator signal is from the PLL circuit U100, and the second local
oscillator signal (71.1MHz) from the PLL circuit U701. The major units are BPF, LNA, mixer, IF filter, IF
electrically tunable band-pass filter to get useful signals. After passing through the RF band-pass filter
and LNA (Q6102), the RF signals together with the first LO signal feed to the mixer for the first frequency
conversion, to generate the first IF signal (73.35MHz). The mixer that employs the passive diode can
ensure good dynamic range and port isolation. The LO signal (3-5dBm) from the VCO feeds to Q6103
to get a gain (17dB). The first LO signals (73.35MHz) pass through the crystal filter (Z6100) to remove
165
Service Manual
out-of-band spurious signals, and then feed to the two-stage IF amplifier circuit (composed of Q6133 and
Q6134) for amplification. Finally the amplified signals go to the IF IC for processing
The first IF signal (73.35MHz) output by the IF amplifier goes into IF IC via Pin 47, where the signal is
converted to the second IF signal (2.25MHz). Then the un-demodulated digital I/Q signal output from the
SSI interface is sent to U302 for demodulation. IF IC employs a reference frequency of 19.2MHz and
shares the crystal with U302. The second LO VCO consists of the external transistor, varactor and some
other components, to provide the second LO signal. The 18MHz clock frequency is generated by the LC
DSP (U302) gets the audio signal from IF IC (U701). Then this signal goes through U302 to output data
signal, which is sent to U231 and PIN44 (SSI_DI) for digital-to-analog conversion. Finally, the output
analog audio signal will be subjected to gain control, and then fed to the speaker.
to supply excitation signal source to the transmitter, and local oscillator signal to the receiver.
166
Service Manual
13.3.3 PLL IC
The PLL IC (U100) is a fractional frequency divider. The logic IC U101 and U102 work with the PLL IC
The 19.2MHz frequency generated by the reference oscillator goes into the PLL IC for division,
generating the reference frequency. Meanwhile, the frequency generated by VCO goes into PLL IC
(U100) for frequency division. The resulting frequency will be compared with the reference frequency in
terms of phase difference in the phase detector. After comparison, the resulting frequency is converted
to CV voltage via the loop filter, to control and lock the frequency.
13.3.4 VCO
The VCO is composed of transistors (Q100, Q103, Q106 and Q110), varactors and four Colpitts
oscillators. There are four VCOs in all: two VCOs (Q100 and Q103) used to transmit excitation signals
and the other two VCOs (Q106 and Q110) to receive LO signals. U302 controls the operating frequency
of the VCO. Q102 and Q107 constitute the buffer amplifiers for the transmitter circuit, while Q111 and
Q109 for the receiver circuit. The digital-to-analog converter (U500) modulates the TX oscillator signal.
167
Service Manual
TX_L_VCO MOD
Q103
TX PA
Q107 Q102
Q100
TX_H_VCO
RX_L_VCO
Q110
RX Lo
Q109 Q111
Q106
RX_H_VCO
168
13.4 PCB View
Top Layer
169
MD78X/MD78XG PCB View (Front Panel)
Bottom Layer
170
MD78X/MD78XG PCB View (Main Board)
Top Layer
171
MD78X/MD78XG PCB View (Main Board)
Bottom Layer
172
13.5 Block Diagram
Q804\Q805
9V3A 9V1A
Q920\Q921\U914 Q801 Q801
Q6102
9V1A
Q902 Q6103
U6000
U703
Q6105
5VA U701
U702
U701
U915
4V3A
Q104 Q100\Q103\Q106\Q110
5VA
U100
U918 3V3A
X100
5VA
ON\OFF KEY PWB U905 U500
IGN_SENCE
EMERGENCY 3V3A U231
U909
X302
U302
1V6D
U401 USB
U919
Control Head
U231
1V8D
U903 U232
U302
3VRTC U323
U912
U326
173
MD78X/MD78XG Block Diagram (RF Section)
High
Temperature
Protection
9V1A_TX
B+ ADC
TXC ANT
Gain:10 dB
Gain:15 dB Gain:11dB
Tx/Rx
Gain:-6 dB Gain:16 dB Switch
Tx_PORT
Microstrip
Attenuator Match Match Match
Matcher Microstrip Dual
Q805 Q804 Harmonic
Q801 Driver Rx_PORT Filter Directional Coupler
PreDriver
Firststage Switchÿs Power
9.1V
Q802ǃQ803 Forward Reflect
Finalstage Detector Detector
RX
Alarm to ADC
B+ VSWR Protection
Final_Bias
Temperature
compensation TV_APC
TX_L_VCO
MOD H TV_APC
TX_VCO_L U500
Q103 MOD L DAC Final_Bias
TX LO:3dBm
Q107 Q102
TX_VCO_H
TX_H_VCO Q100 X100
19.2MHZ
CLK
MCSI
C STB
SPI
LPF PLL U100
DATA
LD
RX_VCO_H
RX_H_VCO Q106
C
VCO_Feed
back LPF
LPF
X100
1 2 19.2MHZ
Q6103
Attenuator
3dB
1
Attenuator
1dB Attenuator Control
10dB
2
U701 Q6104
Z6100 Q6102
IF IC Q6105
Mixer
IF Filter D6106
IF Processor TV
174
MD78X/MD78XG Block Diagram (BB Section)
PLL IF processor DAC
RF Unit
BB Schematic Block Diagram SPI SSI SSI TXǃRX CTL
PowerǃIO CTL
McBSP2_TX
McBSP2 RX
SPI(CS1 )
SPI(CS2)
AUX MCSI1 SPI McBSP2 GPIOs
TEMP_DET ADC
Audio Codec
EMIFS
Headset Nor FLASH and pSRAM
Driver IIS McBSP1 DSP datax16 FLASH: 8Mx16
TMS320C55x pSRAM:2Mx16
MCLK
Mic CP
AMP Driver SPI BELL
EMIFF
Speed:96MHz(max)
Mobile SDRAM
McBSP3 datax16
128Mb:8Mx16
JTAG JTAG
TXAF_DI
MCLK19.2MHz OMAP5912
19.2MHz 19.2MHz
RXAF_DO CLK AD9864
32KHz TCXO
PWM0/
PWT
CS3
uWire
RTC 32.768KHz
20ppm
IIC
UART3 MPU
IIC
IIC
LTR/OPTION GPIOs
ARM926EJ-S Accelero
meter
BOARD/BLUETOOTH
Audio PA
IIC
EMERGENCY
UART1 GPS
IGN_SENSE
UART2 IGN_SENSE
KEY GPIOs EMERGENCY
USB1 GPIOs
Trax or GPIO PWB User Program
PRGM IO out
EMERGENCY
IGN_SENSE
CLK/DATA/CS
AUX Audio DC Supply 74hc595
PRGM GPIOS
GPIO 74hc595
USB Expand
Rear
ACC_ID GPIO
Accessory(MAP) PRGM UART or
USB TX_RX Keytrax
GPIOs light/LED/LCD
IO Expand LED 3X4 Volume
ACC_ID backlight
MMP
MIC TFT LCD datax8 EMIFS
SPKr
Control Head
175
5 4 3 2 1
TP4012
TP4016
(Audio Circuit)
R245 1R
EXT_SPKR+
R253 1R
D EXT_SPKR- D
R293 1R
SPKR1+
CODEC_SSI_WCLK
CODEC_SSI_BCLK
R294 1R
CODEC_SSI_DO
SPKR1-
CODEC_SSI_DI
CODEC_MOSI
CODEC_SCLK
CODEC_MISO
/CODEC_DAV
CODEC_/SS
CODEC_CLK
L232
9V3 BLM18PG300SN1 9d3V
B+
C232
C233
1
0.1u C285 C284
0.1u C234 +
C235
19
16
15
11
20
10
13
10uF/25V
2
5
1
0.01u 0.1u 47uF/25V
U201
OUT1+
OUT2+
OUT1-
OUT2-
VCC
VCC
GND
GND
GND
GND
SGND
TP232 1
AUDIO PA
TP233 1
TP234 1
TP235 1
1
MUTE
STBY
1V8D TP236
NC1
NC2
NC3
NC4
NC5
IN2-
SPK_SEL
IN1
R288 47K C268 0.47u R289 0
R230 3V3A
C236 0 9d3V
14
9
8
3
4
12
17
18
4
3
2
1
33
33
R2876.8K
0.1u RN230 C245 220p
R238
100*4 VAG
R232
0
R231
6
7
8
C283 R295 1K 9d3V
B- B
B OUT
B+
V+
C289 0.1u Q230
3V3D R237 120K
5
6
7
8
-+
R233 C293 C237
1
0.1u 4 3
49
48
47
46
45
44
43
42
41
40
39
38
37
C520 10uF/16V 0.47u
A OUT
0 C240 +
+-
R292
A
C239 U238 C294 R241
V-
DVSS
BCLK
WCLK
MCLK
SCLK
MOSI
SS
DAV
SDOUT
MISO
A+
A-
T-PAD
DVDD
SDIN
3
2
1
3V3A
1 36 C291
IOVDD DRVSS2 C288 5 1
2 PWR_DN OUT8P 35 U237 R286 47K
3 34 C243 1u 100p
/CODEC_RST RESET BVDD SWITCH IC UMC4N
1 R242 0 4 33 R239 6.8K
TP238 GPIO2 OUT8N 0.1u 5 VCC 6 C242 220p
TP239 1 5 32 S
GPIO1 DRVSS1 2 GND B1 1
6 AVDD2 VGND/CP_OUTN 31 C290 1u
4 A B0 3 LOW_LEVEL_MUTE
C
R243 7 AVSS2 SPKFC 30 C
8 29 Q231
3V3A AVDD1 DRVDD C247 220p
BUZZ_IN/CP_INN
C251 1u
1
0 9 NC9 SPK2 28 3 4
C248 R246 22K
MICBIAS_HND
10 27
MICBIAS_HED
MICIN_HED
12 NC12 MIC_DET 25 2
100K
2
CP_INP
AVSS1
VREF
AUX2
AUX1
VBAT
11
NC R296 1 5
U231 OP AMP
11
BB IC 13 -
UMC4N
13
14
15
16
17
18
19
20
21
22
23
24
14 C252 1u OP AMP
VAG 12 + R250 15K
R249 6 - C253 1u/25V
1V8D R251 600mV
U235D 7 HANDSET_AUDIO
0 C255 VAG 5 +
C292 100
1
C256
4
NEW 1u C295 R202 C254 220p
0.01u C262 C259 R236 100P
1u 100P R252 100K U235B
NC R280 10K 10K 9d3V
TEMP_DET TP237 1u
4
D230 ESD IC
1K R290
NC R254 9d3V
11
TEMP_DET2
C238 C200 OP AMP
30K R257 C263
R284 1u 1u C257 1u 9 - 1u
10K R258 C258 0.1u R285 R260 330mV
15k 8 RX_AUDIO
CODEC_PWT 15k
R259 10K 9d3V VAG 10 +
100
R261 R279 R283
RXAF_DO
TXAF_DI
C260 C261
10K 0.01u 0.01u 30k 30k U235C PUB_ADDRESS2_EN
C264 C265 220p
1
C266 R255 1u
4
1u 470 R262 100K
L233 C298 C299 Q232
9d3V
MIC_GROUND 3 4 R263
11
1
B INT_MIC VAG 3 +
Q233 B
BLM18BD601SN1D 1 5
C271 R264 1K
C270 U235A
5
TP4029 220P 220P UMC4N
4
R269
L235
9d3V 100K
11
EXT_MIC R268
C272 BLM18BD601SN1D C273 R267 1K C274 100K OP AMP C277
220P 220P 0.1u C276 1u
6 -
R271
1u
7 PUB_ADDRESS2
VAG R272 47K 5 +
100
EXT_MIC_EN C278
1u U236B
D231 ESD IC
4
C281
Q234 Q235 1u 9d3V
VAG
3 4 C279 1u C280 220p 3 4
11
R273 24K
R274 100K OP AMP
R276 C282
2 R275 2 R277
100K 1u
100K 47K 9 -
R278
11
8 PUB_ADDRESS1
1 5 OP AMP 1 5 10 +
100
13
11
-
UMC4N 14 UMC4N U236C
OP AMP
4
VAG 12
+
2 - VAG
9d3V R265
R266 47K 1 U236D 9d3V
3 +
1.8K
4
PUB_ADDRESS1_EN
1
U236A 9d3V
R270
+ C275 PUB_ADDRESS_MIC_EN
47K
4
10uF/16V
2
9d3V
A A
DESIGNER: LHY
Title
<Title> AUDIO
5 4 3 2 1
5 4 3 2 1
C6100 R6100
D C6102 C6185 R6101 D
1u 0
470p 1uF 680
R6102
10
TRANSISTOR
4
L6101 3 4
Q6101
BLM18PG600SN1
2 5
RF_ATTEN 2 1 2 TRANSISTOR
C6103 1 5
3
220p TX TP
Q6100 TP6101
C6104 C6105 TP6100
R6103
GND
27K 220p
0.1u L6102
220n L6103
1
10n
C6106
TP6102
220p R6104
C6107 2.7K
C6108
220p
R6105 1000p
5.6K
TP6103 C6114
R6106 TP6104
TX TP 5p R6108
680
L6104 C6119 C6120 C6109 C6110 C6121 C6122 C6111 C6112 L6106 C6125 C6126 C6116 C6117 C6127 C6124
4.7K
Micr-L N2 1.5p 1p 6p 1p 1p
N3
2.2p 6p 6p
R6107 Micr-L N6 NC 1p 6p 1p 1.5p 1p
N7
L6107
C6113 Micr-R
D6100 1.2k C6128
2
C6123 0.1u C6115 L6217 L6216
C6118 HVC131 N17
0 N18 N19 0 220p 220p 470p
470pF D6101 D6102 Q6102 D6103 D6104
RX_in 1 2 3 1SV279 1SV279 3 N4 2 Micr-L 1 2 Micr-L 1 2 TRANSISTOR 3N5 1SV279 1SV279 3 RX_ONE
2
N1 R6123 L6105
C6194 C6132 L6214 L6215 C6129 C6130
L6114 0 C6131
2
10NH NC Micr-L 18p 100p C6244
BLM18PG600SN1 NC C6246
1
3
4
1
9V1A_RX R6109 C6133 C6245
C TP6110 D6105 R6110 6p nc C
2 1 390 4p nc
RX CV L6110 1.2K
HSM88AS
3
C6134 C6135 C6136 C6137 C6138 15n C6139 C6140 C6141 C6142C6143
C6144 C6145 RX_AFTER 56p 56p 56p 47P 47P 56p 56p 56p 47P 47P
220p 1u
U6000
OPAMP R6127
TV_APC 1 IN+ VCC 5 10K R6111 R6112
100K 100K
R6116 +
2 R6114 R6140
0 VEE
- 33
0
3 4
IN- OUT
R6113
TUHF_TONE C6146 C6147
270K 470P 0.01u
R6115
100K
L6115
9V1A_RX
1 2
C6148 C6149
470p 1u
BLM18PG600SN1 R6126 R6117
TP6105 82 82
RX TP
TP6106
C6151 C6152 C6153 C6154
C6150 470p 1.5p 1p 2p
R6118
NC L6116 R6119 MIX IC
3.3K
C6155 18n 1.2K C6157
D6106 R6120
B 0.01u R6121
C6193 L6117 L6119 L6118 100p 3 T6100 4 51 B
3
5.6
22n 22n 18n T6101
RX_LO 4 3 2 5
R6122 C6159
1
4
330
TRANSISTOR
3
4
C6172 R6138
0 0
TP6107
GND
5VA_RX 2 1
1
L6121
BLM18PG600SN1
C6190
R6131
1uF R6130
1.2K
5.1K TX TP
TX TP TP6109
TP6108
C6169
C6168
R6132 0.1u
0.1u C6170
51
R6133 9p
L6122
C6171 330
0.1uF
0.1uF C6173 R6135 C6175 C6177
L6126 C6176 C6178
3
0.1u 4.7K 0.1u 15p
IF-out C6179 0 0.01u
3
C6180 4 OUT IN 1
R6134 0.1u
0.1u
30k 0.1uF GND GND
1
3
C6174 L6123
C6182 C6181 Q6104 C6187 C6192 C6188
2
3
Q6105
R6139
56K
Title
<Title>
177
Date: Wednesday, December 08, 2010 Sheet 1 of 2
5 4 3 2 1
5 4 3 2 1
1
C471 + C405
0.1u 10uF/10V
2
R570 5VA
10k R542 0
1
C484 1000p + C509
C483 8 OUT 1 C508 C510
VCC R528
8200p 10u/16v 0.1u 100P 68K
2
7 OUT +- IN- 2
R568 R574
IN+
12k NC
6 IN- 3
R575 R577 -+ R513
2.7k 6.8k C404
0.1u
5 VEE 4 100K
1000p
R529 33K
IN+
C406
1200p OP AMP
C515
U501
R503 1K R564 0 R566 0 Final_bias
C502
C C500 C501 3300p R504 1K R565 0 R567 0 TV_APC C
33p R500 330p R501 R502 C506 C507 C521 C522 C523 C524
100K 10K 1K 0.01uF 0.01uF NC NC NC NC
MOD_H
R505 R506 R507
0 10K 0 R514 100K
MOD_L_RFCS
16
15
14
13
12
11
10
9
U500
PD REFINAB
LDAC OUTA
OUTB
DVDD AVDD
SCLK OUTC
OUTD
FS REFINCD
DGND AGND
D/A IC
DIN
CS
3V3D
1
2
3
4
5
6
7
8
1
B R508 0 B
+ C512 R509 10k
C511 C513
10u/16v 0.1u 1000P R512 10k
2
R510 10k
1 8
DAC_DIN 2 7
DAC_SCLK 3 6
DAC_FS 4 5
RN500 33*4
C516 C517 C518
100P 100P 100P
A A
Title
<Title>
178
5 4 3 2 1
D D
TP4044
TP4047
TP4051
TP4045
TP4050
TP4043
TP4054
TP4049
TP4046
TP4048
TP4053
TP4052
F_D0 R487 33
F_D1 R489 33 F_D0_LCD
F_D2 R490 33 F_D1_LCD
F_D3 R492 33 F_D2_LCD
F_D4 R515 33 F_D3_LCD
F_D5 R516 33 F_D4_LCD
F_D6 R517 33 F_D5_LCD
F_D7 R518 33 F_D6_LCD
/OE R519 33 F_D7_LCD
/WE R520 33 /OE_LCD
CS2 R521 33 /WE_LCD
F_A1 R522 33 CS2_LCD
F_A1_LCD
U302A U233
SDR_A0 A2 J8 F_A1
SDRAM.A0 FLASH.A1 F_A1 G1
SDR_A1 B2 D3 F_A2 A0
SDRAM.A1 FLASH.A2 F_A2 F1
SDR_A2 B6 C1 F_A3 A1
SDRAM.A2 FLASH.A3 F_A3 E1 J2 F_D0
SDR_A3 A1 E4 F_A4 A2 DQ0
SDRAM.A3 FLASH.A4 F_A4 D1 G3 F_D1
SDR_A4 G10 D2 F_A5 A3 DQ1
SDRAM.A4 FLASH.A5 F_A5 F2 K3 F_D2
SDR_A5 B9 F4 F_A6 A4 DQ2
SDRAM.A5 FLASH.A6 F_A6 E2 H4 F_D3
SDR_A6 G12 E3 F_A7 A5 DQ3
SDRAM.A6 FLASH.A7 F_A7 D2 H5 F_D4
SDR_A7 G11 J7 F_A8 A6 DQ4
SDRAM.A7 FLASH.A8 F_A8 C2 K6 F_D5
SDR_A8 G9 F3 F_A9 A7 DQ5
SDRAM.A8 FLASH.A9 F_A9 C6 G6 F_D6
0 SDR_A9 B12 G4 F_A10 A8 DQ6
R484 1V8D SDRAM.A9 FLASH.A10 F_A10 E6 J7 F_D7
SDR_A10 B8 G3 F_A11 A9 DQ7
SDRAM.A10 FLASH.A11 F_A11 F6 K2 F_D8
C SDR_A11 H10 G2 F_A12 A10 DQ8 C
C311 C305 C306 C307 SDRAM.A11 FLASH.A12 F_A12 C7 H3 F_D9
SDR_A12 H9 K8 F_A13 A11 DQ9
SDRAM.A12 FLASH.A13 F_A13 D7 J3 F_D10
0.1u 1u 0.01u 100p H11 H4 F_A14 A12 DQ10
SDRAM.A13 FLASH.A14 F_A14 E7 K4 F_D11
H3 F_A15 A13 DQ11
FLASH.A15 F_A15 F7 J6 F_D12
SDR_D0 D6 K7 F_A16 A14 DQ12
U232 SDRAM.D0 FLASH.A16 F_A16 D8 H6 F_D13
SDR_D1 C6 J2 F_A17 A15 DQ13
SDRAM.D1 FLASH.A17 F_A17 G8 K7 F_D14
SDRAM
D3
C7
SDR_D2 F_A18
E7
A9
B3
A7
C5 J4 A16 DQ14
J9
R441 10K
R326 10K
R353 10K
R536 SDR_A10 A9 DQ9 SDR_D10 SDR_D14 SDRAM.D13 FLASH.D2 F_D3 B2
H9 D1 D12 P2 /WE NC6
0 SDR_A11 A10 DQ10 SDR_D11 SDR_D15 SDRAM.D14 FLASH.D3 F_D4 R359 C5 L2
G2 C2 C12 P4 CS1_SRAMJ1 WE NC7
SDR_A12 A11 DQ11 SDR_D12 SDRAM.D15 FLASH.D4 F_D5 NC TP302 1 B3
G1 C1 P7 /OE CE1-ps NC8
SDR_BA0 A12 DQ12 SDR_D13 FLASH.D5 F_D6 H2 L3
G7 B2 C14 R2 OE NC9
SDR_BA1 BA0 DQ13 SDR_D14 SDRAM.DQSH FLASH.D6 F_D7
TP303 1 /CS3_FLASH H1 CEf NC10 B4
G8 BA1 DQ14 B1 D4 SDRAM.DQSL FLASH.D7 R3 RDY R356 0
SDR_D15 /SDR_CS F_D8 E4 RY/BYf NC11 F4
DQ15 A2 G8 SDRAM.CS FLASH.D8 R4 /RST_OUTR440 0
/SDR_CAS F_D9 D4 RESET NC12 G4
F7 CAS D9 SDRAM.CLKX FLASH.D9 T2 /WP R399 0
/SDR_RAS R544 SDR_BA0 F_D10 C4 WP/ACC NC13 L4
F8 RAS B3 SDRAM.BA0 FLASH.D10 T3 R442 10K
SDR_DQML 0 SDR_BA1 F_D11 3V3D D5 CE2ps NC14 B5
E8 LDQM C3 SDRAM.BA1 FLASH.D11 P8
SDR_DQMU SDR_CLK F_D12 NC16 G5
F1 UDQM NC E2 1 TP308 C9 SDRAM.CLK FLASH.D12 U1
/SDR_WE SDR_CKE F_D13 J4 VCCf NC17 K5
CK1 F9 WE H12 SDRAM.CKE FLASH.D13 U3 R444 0
VFLASH J5 L5
1 SDR_CLK F2 CLK
SDR_DQMU D10 SDRAM.DQMU FLASH.D14 T4 F_D14 VCCps NC18
SDR_CKE SDR_DQML F_D15 NC19 B6
F3 CKE C8 SDRAM.DQML FLASH.D15 V3 C310 C308 C309
VSSQC3
VSSQD7
L6
VSSQA3
VSSQB7
VSSE3
VSSJ1
CS /SDR_RAS SDRAM.WE B7
H7 U4 /OE 1U 0.1u 100P NC21
10K
SDRAM.RAS FLASH.OE G7
10K
/SDR_CAS W2 /WE
10K
10K
10K
10K
NC22
10K
FLASH.RDY/GPIO10 B8
L4 NC25
FLASH.ADV H8
M7 1 TP310 NC26
FLASH.CS0/GPIO62
R481
B L8 B
M3 CS1_SRAM
R322
R316
R482
R483
NC27
R453
R351
FLASH.CS1/FLASH.CS1L G2
Y1 VSS1
FLASH.CS1U/GPIO16 /CODEC_RST J8 M8
FLASH.CS2/FLASH.BAA/FLASH.CS2L M4 CS2 VSS2 NC28
FLASH.CS2U/GPIO5 P3 PWB
FLASH.CS3/GPIO3 N8 /CS3_FLASH
FLASH.RP/FLASH.CS2UWE W1
1V8D N3
FLASH.CLK/FLASH.CS2UOE FLASH
RST_OUT/GPIO41 AA20 /RST_OUT
M8 BE1
FLASH.BE1/FLASH.CS2UWE/GPIO60 BE0
FLASH.BE0/FLASH.CS2UOE/GPIO59 L3
OMAP
3V3D 1V8D VFLASH
NC R281
0R R282
A A
DESIGNER: LHY
Title
<Title> MEMO
179
Size Document Number Rev
C <Doc> <RevCode>
5 4 3 2 1
5 4 3 2 1
19.2_OMAP 3V3A
1
R414 10
R419
+
C338 nc C336 C401
1000p 0.1u 10u/16V
TP309 C364 39p X302
2
CLK 4 1
TP377 VCC VT
L151 C337 R426
C375 C376 OSC 0
3 2
3
12p
1
OUT GND
12p L147 470n
X375 470n
1000p
1
C365 19.2MHz TCXO
SSP-T7-F C362 C363
R375 82p
82p 82p
4
0 R374
OSC32
1 0
AA13
V13
P13
W3
U302C
Y2
OMAP
1V6D
OSC32K_OUT
OSC1_OUT
OSC32K_IN
CLK32K_IN
OSC1_IN
Y13 VSS CVDD A15
3V3D CVDD M2
J374 R382 10K 1V6D 1V6D
R19 GPIO1 CVDD Y9
1 3V3D J20 MPU_BOOT CVDD Y20
2 GPIO13 R377 10K AA3
CVDD1 C382 C383 C384 C385 C379 C380 C381 C378
N19 GPIO13/LCD.BLUE0 CVDD2 A3
CON2 R378 10K A9 0.1u 0.1u 0.01u 100p 0.1u 0.1u 0.01u 100p
CVDD2
C 3V3D W19 BFAIL CVDD2 E2 C
TP374 1LOW-PWR R379 10K T20
R380 33 LOW_PWR
U20 MPU_RST CVDD3 B13
/PRST R12 PWRON_RESET CVDD3 B20 1V6D
C356 0.1u R381 33 J21
R383 1K CVDD3
V18 CONF CVDD3 R20
VOTG_DET W15 GPIO40/BCLKREQ 1V6A 1V6D
CVDDRTC W12
3V3D R385 10K R10 L913
GPIO23/MCLKREQ R386 10
CVDDDLL A11
RTC_ALARMB P12 C386 BLM18PG300SN1
VSS 0.1u MMBZ5V6ALT1G
TP375 CVDDA Y21
C339 100p TP376 3V3D_OMAP
MCLK BCLK D236
DVDD1 A19 R388 10
R387 33
1
V5 E21
1
1
VBUS_DEC W10 MPUIO11 DVDD4 B10
B14 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u MMBZ5V6ALT1G
DVDD4 100p + C402
W9 VFLASH 10uF/16V D234
RESET_BT/SYSTEM_SYNC GPIO25/MCSI2.DOUT
DVDD5 C2
2
JTAG DVDD5 H2
DVDD5 R1
/TRST Y18 3V3D_OMAP
TMS TRST
2 1 V17 TMS DVDD6 AA11 VFLASH
TDI 1V8D
4 3 Y19 TDI DVDD7 Y16
R391 6 5 L21
TDO DVDD8
10K 8 7 AA19 TDO DVDD9 U21 C400 C341
RTCK C398 C399 C335
10 9 Y17 RTCK DVDDRTC V12 0.1u 100p
TCK 0.1u 0.01u 100p MMBZ5V6ALT1G
12 11 W18 TCK
14 13 EMU0 V16 J1 D239
EMU1 EMU0 LDO.FILTER
W17 EMU1 C396
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1u
J375
R392 R393 R394 R395 R396
B B
10K 10K 10K 4.7K 4.7K
A13
A21
B1
B5
B7
B16
F20
G1
K2
K20
N1
R21
U2
W20
Y3
AA1
AA7
AA21
3V3D
C334
0.1u
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
180
Size Document Number Rev
C <Doc> <RevCode>
5 4 3 2 1
5 4 3 2 1
TP326
100p C326
100p C342
C343
R323 R325 U302B
OMAP
10K 10K
100p
1
D 3V3D N15 MPUIO2/SPIF.CS1/UWIRE.CS1 LCD.P0 D18 D
U322 R357 33 T19 B21
R329 R330 98_PE 33 MPUIO4/SPIF.CS2/UWIRE.CS2/LED2 LCD.P1
0 1 14 33 R327 U19 C19
DVDD_IO SLC/SPC I2C_SCL 98_PC R324 33 MPUIO1/SPIF.SCK LCD.P2
2 13 W21 G14
R334 10K GND SDA/SDI/SDO I2C_SDA 98_PD R347 33 GPIO46/SPIF.DOUT/UWIRE.SDO LCD.P3
4 IADDR0 SDO 12 33 U18 GPIO47/SPIF.DIN/UWIRE.SDI LCD.P4 H13
C321 5 11 R332 C355 100p 98_DOUTB C358 100p V19 A20
GND RESERVED MAP_GPIO_6 MPUIO1/UWIRE.SCLK LCD.P5
0.1u 6 9 1 B19
AVDD INT2 TP321 100 LCD.P6
7 8 ACCEL_INT1 R346 M14 C18
NC1
NC2
CS INT1/DRDY PLL_LD 100 GPIO2 LCD.P7
PLL_CLK R337 M15 D17 R403 100
R335 10K 33 100 GPIO7/MCSI1.CLK LCD.P8/GPIO29 FL_Control
R336 PLL_STB R338 W8 D16 R404 100
GPIO9/MCSI1.SYNC LCD.P9/GPIO30 R406 100 LP_Control
NC MAP_GPIO_2 V15 C17
3
10
R339 100 GPIO56/MCSI1.DIN LCD.P10/GPIO31 R410 100 TX_VCO_H
PLL_DATA W14 GPIO18/MCSI1.DOUT LCD.P11/GPIO32 B17 TX_VCO_L
G13 R411 100
LCD.P12/GPIO33 RX_VCO_H
R14 A17
C346 100p
C344 100p
100p
C351 100p
C349 100p
100p
C354 100p
C352 100p
GPS_UART1_TXD GPIO38/UART1-IRSEL LCD.P13/GPIO34
Y14 UART1.TX/UART1.IRTX LCD.P14/GPIO35 C16
GPS_UART1_RXD V14 D15
GPIO37/UART1.RX/UART1.IRRX LCD.P15/GPIO2
AA15 B15
C345
C350
MMP_GPIO_0/PwrOn GPIO39/UART1-IRSHDN LCD.AC
LCD.HS C20
UART2_TXD V6 GPIO17/UART2.TX LCD.PCLK C15
R9 B18 3V3D
UART2_RXD GPIO18/UART2.RX LCD.VS R413 33
LCD.RED0/GPIO14 N21 RF_ATTEN
100p
3V3D 3V3D WAKE_BT/OPT_GPIO1 N14 GPIO45/UART3.TX/SPIF.CS0/MCBSP3.CLKX
CODEC_/SS P15 GPIO44/UART3.RX/SPIF.CS3/UWIRE.CS3
C353
R488 R511 R499
C322 12p T18
R340 10K
10K
R342 10K
R343 10K
I2C_SDA GPIO48/I2C.SDA KP.R4/MPUIO15 /CODEC_DAV
X321 KP.R3/MPUIO13 E20 ACCEL_INT1
33
R341
100p
100p
100p
MAP_GPIO_3 GPIO0/USB.VBUS KB.C3/GPIO63 KB_C3
NC W5 C21
MAP_GPIO_8 MPUIO5/MPUIO12 KB.C4/GPIO27
MAP_GPIO_7 V8 MPUIO3/MMC2.DAT1 KB.C5/GPIO28 G19 S/P_CLOCK
V9
C359
C360
C361
GPIO7/MCSI2.SYNC 33 R402
C
RST_CTRL V10 MPUIO10/MPUIO7 GPIO62/MCBSP1.CLKS G20 RX
C
V11 G21
C347 100p
MMP_GPIO_3/PTT GPIO57/MMC.CLK GPIO54/MCBSP1.CLKX CODEC_SSI_BCLK
TDMASLOT_OUT Y8 GPIO8/TRST GPIO53/MCBSP1.FSX H15 CODEC_SSI_WCLK
EXT_PTT AA9 GPIO26/MCSI2.DIN GPIO51/MCBSP1.DR H20 CODEC_SSI_DO
ACC_IO3 Y10 GPIO27 GPIO52/MCBSP1.DX H18 CODEC_SSI_DI
3V3D P11
IGN_SENSE GPIO55/MMC.CMD
1 2 R422 1K MPUIO6 W11 L19
MPUIO9/MPUIO6 CAM.D0/MPUIO12 SPK_SEL
D601 LED OPT_BRD_PTT P18 GPIO3/MCBSP3.FSX/LED1 CAM.D1/GPIO29 K14 UART3_RTS_BT
R11 K15 UART3_CTS_BT
TP4027
EMERGENCY GPIO58 CAM.D2/GPIO30
MMP_GPIO_4/HOOK R13 GPIO36/CLK32K_OUT/MPUIO0/UART1-TX CAM.D3/GPIO31 K19 UART3_RXD_BT
TP325 1 Y4 UART2.BCLK/SYS_CLK_IN CAM.D4/GPIO32 K18 UART3_TXD_BT
CAM.D5/UWIRE.SDI/GPIO33 J14 CODEC_MISO
MCBSP3_CLKX W16 GPIO42/MCBSP3.CLKX CAM.D6/UWIRE.CS3/GPIO34 J19 S/P_CSLED
MCBSP3_FSX N18 GPIO12/TIMER.EXTCLKMCBSP3.FSX CAM.D7/UWIRE.CS0/GPIO35 J18 S/P_CS2
MCBSP3_DR AA17 MCSI1.SYNC/MCBSP3.DR
P14 H19 R354 33
MCBSP3_DX GPIO43/MCSI1.CLK/MCBSP3.DX CAM.EXCLK/UWIRE.SDO/GPIO57 CODEC_MOSI
CAM.HS/GPIO38 L15 S/P_DATA
P19 J15 R355 33
S/P_CS1 GPIO6/MCSI1.DIN/TIMER.EVENT3 CAM.LCLK/UWIRE.SCLK/GPIO39 CODEC_SCLK
WAKE_HOST/OPT_GPIO2 P20 GPIO4/SPIF.DIN/TIMER.EVENT4 CAM.RSTZ/GPIO37 M19 ACC_IO1
L18 C357 100p
R358 10 CAM.VS/MPUIO14 AUDIO_PA_EN
USB_D- R8 USB.DM/I2C.SCL/UART1.TX/Z
USB_D+ P9 USB.DP/I2C.SDA/UART1.RX GPIO50/PWTTIMER.PWM0 M18 CODEC_PWT
R360 10 M20 R421 100
PUEN GPIO15/TIMER.PWM2 R376 33 RX_VCO_L
W4 L14
R361 15K
R362 15K
USB.PUEN GPIO49/PWL/TIMER.PWM1 TX
R401 1.5k GPIO11/HDQ N20 ACC_IO2
L1 NC2 GPIO7/UART2.RCV Y5 PWR_CTRL
E5 NC1
C348 100p
W321
ANTENNA
TP4038
TP4014
TP4026
B B
2 3
3V3D
1
U327
3V3D C329 0.1u
5Oohm䍄㒓 LOW_LEVEL_MUTE 1 16
QB VCC
PUB_ADDRESS_MIC_EN 2 QC QA 15
3V3D R363 0 R364 0 R367 33
3 14 S/P_DATA
TP4033
TP4034
R366 10K
+
TXB RF_IN L321 LOGIC IC 1 2
3 3 PPS GND 18
R349 33 GPS_UART1_RXD R368 33
2 4 TXA RF_OUT 17
R350 33 GPS_UART1_TXD R384 NC C330 3V3D
CON5 1 33
5 RXA BOOT 16 39nH+/-0.3nH
R370 21 GND GND 22
6 15 0.1u
GPIO[10] GPIO[13] R397 NC L322
GPS_UART1_RXD 7 GPIO[0] GPIO[15] 14
8 13 BLM18PG300SN1 3V3DP
GPIO[1] GPIO[14] R532 R531 R530
GPS_UART1_TXD 9 12 10K 10K 10K
RF_PWR VIN_3V3
10 ON_OFF V_RTC_3V3 11
1
100
0
3VRTC
2
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
181
<RevCode>
Date: Tuesday, November 30, 2010 Sheet 5 of 14
5 4 3 2 1
5 4 3 2 1
R539 10K
R538 10K
R541 10K
R540 10K
R543 10K
C482 C481 C409 C410 C411 C412
C413 C414 C415 C416
100p 100p 100p 100p 100p 100p J400
22 21 100p 100p 100p 100p
R456 33 2 1 R423 33
I2C_SDA R457 33 R424 33 WAKE_HOST/OPT_GPIO2
I2C_SCL 4 3 WAKE_BT/OPT_GPIO1
MCBSP3_DR R425 33 6 5 R431 33
D RESET_BT/SYSTEM_SYNC D
MCBSP3_CLKX R412 33 8 7 R408 33 OPT_BRD_PTT R400 10K
MCBSP3_DX R430 33 10 9 R415 33 3V3D
MCBSP3_FSX R420 33 12 11 R416 33 UART3_TXD_BT
14 13 R409 33 UART3_RXD_BT 3
16 15 R432 33 UART3_CTS_BT
TXAF_DI
RXAF_DO 18 17 R433 33 UART3_RTS_BT 1 R460 1K
AUX_C
5VD R407 0 20 19
24 23
Q323
C480 C479 2 DTC114EE
C407 CON2X10
C417 C418 C477 C478
100p 100p
0.1u 100p 100p 100p 100p
3V3D
R461 10K
R462 10K
R463 10K
R464 10K
R465 10K
MAP_GPIO_8
MAP_GPIO_7
MAP_GPIO_3
MAP_GPIO_6
MAP_GPIO_2 3V3D
3
2
3V3D U328 PRGM_OUT8
PRGM_OUT7 EMERGENCY_IN
16 VCC QB 1 R439 100
R477 1K 15 2 PRGM_OUT3 IGN_SENSE
R474 33 QA QC PRGM_OUT6
C S/P_DATA 14 A QD 3 ALARM C
3V3D R475 nc 13 4
R473 33 OUT EN QE
S/P_CS2 12 LATCH CLK QF 5 ALARM 5VD 5VD
R467 33 11 6
S/P_CLOCK SHIFT CLK QG VBUS_EN R4964.7K 5VD 5VD 5VD EXT_SWB+
3V3D R466 10K 10 7 5VD
RESET QH
9 SQH GND 8
R446
NC
R472
LOGIC IC 5VD
4.7K
3 R471 R469
R443 10K 3
R447 10K R468 4.7K
R470 4.7K
3V3D 1 4.7K R449
1
2
R445 100 4.7K Q400
EXT_PTT
1
1.0V 1.5K
1
Q406 MUN5214DW1T1
Q407 MUN5214DW1T1
5VD Q405 R448 4.7K
Q409 MUN5214DW1T1
Q410 MUN5214DW1T1
1
Q408 MUN5214DW1T1
2 DTC114EE R1 R1 Q401
R2 R2
R1 R1 R1 2 DTC114EE
R437 4.7K R2 R2 R2 R450 2SA1362
1
2 3
2.7K
3
MUN5214DW1T1
1
R428 4.7K
R1 R2 R2
3V3D 1 R563 33k R2 R2 R2
R2 R1 R1 3
R1 R1 R1
Q404 Q402 1
R427 10K
6
R2 DTC114EE
6
Q411
R547470
R55933k
R1 R551 R546 470
R548 470
R558 33k
R549 470
R560 33k
470 2
R56133k
R562 R550
R557 100
33k
6
ACC_IO3 470
5VD D405
C434 C436
1
MMBZ20VALT1G
R435 4.7K
R2
R1 D233
MMBZ20VALT1G
B B
R556 100
6
D409
ACC_IO2
3V3D 5VD
R452 10K U401 USB_VBUS D404
C421
3 2 220p MMBZ33VALT1G
R451 10K FAULT GND MMBZ20VALT1G
VBUS_EN 4 ON
5 IN OUT 1
VBUS_DEC SMART SWITCH
PUB_ADDRESS2
RX_AUDIO
PUB_ADDRESS1 7.0V R455 100K
EXT_MIC
EXT_SPKR+ IGN_SENSE_IN
EXT_ALARM_OUT
EXT_SPKR-
PUB_ADDRESS1
PUB_ADDRESS2
EMERGENCY_IN
1 2 L417 BLM15AG121SN1
IGN_SENSE_IN
PRGM_IN_PTT
USB_D-
EXT_SWB+
PRGM_IO2
PRGM_IO3
PRGM_IO7
PRGM_IO8
CM2-2012MCIN-181T
R478 nc
UART3_TXD_BT D450
2
R480 nc
UART3_RXD_BT PRTR5V0U2X
GND I/O1
VCC I/O2
C476 C474 C426 C427 C428 C429 C430 C431 D240 D238
NC NC 100p 100p 100p 100p 100p 100p
MMBZ20VALT1G MMBZ6V8ALT1G
1
19
10
11
13
15
18
17
16
24
23
25
12
21
22
14
20
26
27
28
1
4
6
9
8
7
2
5
USB_D+
V_BUS
EXT_SWB+
EXT_SPKR+
PRGM_IN_4_EMERGENCY
PRGM_IN_PTT
PRGM_IN_5_IGN_SENSE
PRGM_OUT_9_EXT_ALARM
USB_D-
USB_GROUDN
ACC_MAP_ID_2
ACC_MAP_ID_3
AUX_AUDIO_OUT_1
PRGM_IO_6
AUX_AUDIO_OUT_2
TX_AUDIO
POWER GROUND
EXT_SPKR-
Audio Ground
RX_AUDIO
GROUND2
GROUND3
PRGM_IO_3_CHAN_ACT
PRGM_IO_7
PRGM_IO_8
GND1
GND2
PRGM_IO_2_MONITOR
5VD
R476 10k
A J403 A
MAP26
DESIGNER: LHY
Title
<Title>: peripheral
182
Size Document Number Rev
C <Doc>
<RevCode>
Date: Wednesday, December 08, 2010 Sheet 6 of 14
5 4 3 2 1
5 4 3 2 1
D D
C465
TP4015
100p
SPK+
TP4001
TP4002
TP4005
TP4006
TP4009
TP4010
TP4011
TP4041
TP4013
TP4017
TP4019
TP4020
TP4021
TP4022
TP4023
TP4024
TP4025
3V3D
C464
C460
C461
C462
100p C463
C470
C472
C473
TP4007
TP4008
C468 C439 C438 C441 C440 C435 C420 C419
USB_VBUS R494
NC
NC
NC
NC
NC
NC
100p 0.47u 0.47u 100p 100p 100p 100p 100p R555
0.1U
J404 NC 10k
1 INT_MIC_MMP INT_MIC
2 MIC_GND MIC_GROUND
3 ACC_IO1_MMP R554 1k ACC_IO1
4 USB_VBUS
5 HOOK_MMP HOOK
6 PTT_MMP PTT
7 USB_D- L414 BLM15AG121SN1 3 4 USB_D-
8 USB_D+ L415 BLM15AG121SN1 L413 1 CM2-2012MCIN-181T
2 USB_D+
C 9 Pwron_MMP Pwron C
10 UART2_RXD R534 10K
UART2_RXD
11 UART_TXD R535 10K UART2_TXD
12 SPKR1+ HANDSET_AUDIO
13 SPKR1- SPKR1+
14 HANDSET_AUDIO SPKR1-
15 5V 5VD TP4030
16 /RST_OUT R495 33 /RST_OUT
17 KB_C0 R498 33 KB_C0
18 KB_C1 R486 33 KB_C1
19 KB_C2 R491 33 KB_C2
20 KB_C3 R485 33 KB_C3
21 KB_R0 R523 33
KB_R0
22 KB_R1 R524 33
KB_R1
23 KB_R2 R525 33
KB_R2
24 S/P_CSLED R526 33 S/P_CSLED
25 S/P_CLOCK R527 33 S/P_CLOCK
26 S/P_DATA R533 33 S/P_DATA
27 /OE_LCD L411 BLM18PG300SN1 /OE_LCD
28 /WE_LCD L412 BLM18PG300SN1 /WE_LCD
29 CS2_LCD L410 BLM18PG300SN1 CS2_LCD
30 F_A1_LCD L407 BLM18PG300SN1 F_A1_LCD
31 F_D7_LCD L409 BLM18PG300SN1 F_D7_LCD
32 F_D6_LCD L408 BLM18PG300SN1 F_D6_LCD
33 F_D5_LCD L406 BLM18PG300SN1 F_D5_LCD
34 F_D4_LCD L405 BLM18PG300SN1 F_D4_LCD
35 F_D3_LCD L404 BLM18PG300SN1 F_D3_LCD
36 F_D2_LCD L403 BLM18PG300SN1 F_D2_LCD
37 F_D1_LCD L402 BLM18PG300SN1 F_D1_LCD
38 F_D0_LCD L401 BLM18PG300SN1 F_D0_LCD
39 GND
40 PWR_KEY PWB_IN
41
4
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
NC
NC
NC
42
C469
CONTROL HEAD 100p
C446
C444
C449
C451
C450
C448
C445
C447
C442
C443
C453
C454
C455
C456
C452
C457
C458
C459
C466
C467
D408 D407
TP4028
B B
3
TP4018
TP4055
GND
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
183 Size
C
Document Number
<Doc>
<RevCode>
Rev
5 4 3 2 1
5 4 3 2 1
2
U901
BLM41PG600SN1
C902 + D900 TP4035 RP102N331B 3V3DP
2
C903
470p/50V 1 5
VDD VOUT
L900
470uF/25V 2
MR2835SKG
2
D
C905 GND C906 D
B901 5VA 3 4
1
1u CE NC 1u
1
9V3 L904 U905
BLM18PG181SN1D XC6209F502PR C925 U903
1
L930 10uH 4 XC6209F182PR L901 1V8D
U902 D901 Vin Vout 5
1
3
BST C907
2
14 IN R924 1K 1u
1
2
3
0.1u 3 CE Nc 1
17 BP L902 3 CE Nc 1
16
CE
5 VOUT VDD
GND
LX7
RP102N331D
2
LX6 15
10uH C911
7 EN LX5 5
4 C960
LX4 D902 330p
U909
R911
4 NC
1
1
47uF/25V LX1 1 R912 L931
2.2u/25V 1 10 4.7uH 1V6D
VIN PGND
1
C947 0.1u 510 C951 C915 4.7uH
2
1
0.1u 4 7
22uF/10V
10uF/25V
0.1u 10uF/16V 0.1u 4.7K PG SYNC
2.2u/10V 9 R951 1.5K + C946 5 6 +
C917 C918 C919 C932
2
OS 1u FB LBI R917
10uF/16V 2.2u
11 R981 NC TPS62050 22p 330K 1% 10uF/16V
2
FB R918
C921 220p
10 6.04K 1%
GND
C928 C910
1
10u/16v 1000p
R952 + R906
PWR_ON 47k R908
1
24K
2
3
1 2 4.7K
D918 Q920 RX 1
C C
NC D45H8G 9V3 Q903
L940 L916 DTC114EE
BLM41PG600SN1
1 2 3 2 1 2
1
1
C980 2
C950 + + BLM41PG600SN1 +
C956 C957
0.1u D915 C955 C958
10uF/25V 10uF/25V 10uF/25V
1SS372 0.1u 0.1u
2
2
R958 U915 U918
1
3V3D
R953 XC6209F502PR 5VA_FGU XC6209F332PR 3V3A_FGU
680 R962 R964
4 Vin Vout 5 4 Vin Vout 5
10
1
R961 0 2.2K 1%
1u 2 C963 2 C965
6
R963 C952 0.01U R971 2.74K 1% Vss C926
+ Vss U910
330 0 R972 C962 2.2u
0.1u R932
VDD
2.2k 10uF/16V /PRST1
2
3 1 3 1 4.7K
CE Nc CE Nc 5 D913
2
2
3
R954 1K SENCE
1 2 1 /PRST
1
RSET
A-
A+
V-
3
A OUT
Q921 R965 0
+-
C937 MR MBRM120LT1G
A
GND
PZT2222AT1 U914 R982 100k 1000p 4
-+
CT
B- B
B OUT
NJM2904V
V+
C941
B+
3
TPS3808G33DBVT
2
D917 0.15u
3V3D
8
7
6
UDZSTE(175.1B)
1
R969
R966 3
47k
150
R970 1k 1 R950
3
10K
R968 2.2k
1 R948 R967
PWR_ON Q923 3 VOTG_DET
2 D910
DTC114EE 100 0
Q922 2 1 1
DTC114EE Q913 U906
2 R949 C945
UDZSTE(1715B)15V DTC114EE 1 8 D912
47K 470p MR WDO
R931 3V3D 2 VCC /RST 7 2 1
47K 2 3 6
B C978 GND WDI MBRM120LT1G B
U917 4 PFI PFO 5
0.1u R983 0
2 TPS3705-33D RST_CTRL
VDD R929 100
OUT 1
4
GND
R934 NC
5 NC1
47K
R3111N421A 3 R977
nc
Q905
R930
3 4 PWR_ON
PWR_CTRL_594 1 2 R984 220 15k C942 M7 M8 M9 M10 M11 M12 M13
D914 HVC131TRF-E 0.1u
PWR_CTRL R978 1K 1 2 R933 220 2
1
D909 HVC131TRF-E
2
2
C967 R957
U913 D904 1 5
0.1u R976
EDZTE613.6B
3VRTC
EDZTE613.6B
D235
LM317L(nc) RB521S30T1G(nc) 1K
D241
10K
1 2 1 2 3V3D
IN OUT1 UMC4N
OUT2 3 R975
2
6
1
NC1
NC2
OUT3 20K
ADJ
3
4
5
8
2 3 1 2
R941 Q1
1
+
R939 2SK1824 1 2 1 IGN_SENSE_IN
0.1u 4.7K 1 180k
1
R940 Q908
1
2
1k 22uF/16V
EMERGENCY_IN DTC114EE 3V3D
2
R956 R959
U912 22K D911
R979 2 180K 47k
ML414RF9AE ℸ໘㒓ᬍ HVC131TRF-E
10K
2
Q910
A A
MMBT3906LT1 D907 R945
1
Q909
F900 L917 EXT_SWB+ 2 3 1 2 10K
2SB1184
3 2 1 2
HVC131TRF-E R947
C969 3
LITTELFUSE04662 R942 PWB
C944 0.1u
4.7K 1K
R943
1
Date:
<Doc>
5 4 3 2 1
5 4 3 2 1
5VA_FGU
L156
3.3UH R175
10
1
C82 C89
C1010 + C1009 1000p 0.1u
1000p 1u/16V
L8
2
3V3A_FGU
601SN1
2 1
L7
C80 601SN1 C83
0.01U 1 2 0.1u
1
L6
601SN1
C86 C121
0.1u 100p
2
PLLLD U100
R177
TP121 sky72310 R109 TP116 TP118 TP120
10K C93 10 PLLDATA PLLSTB PLLCLK
100p 1 24
R181 VCCecl/cml Mux_out
1
Fin 2 Fvco_main NC23 23
1K
1
C PLL_LD 3 C
Fvco_main R167 33
C90 Clock 22 PLL_CLK
1
C95 100p 4 LD/PS_main CS 21 PLL_STB
5 20 R178 33 PLL_DATA
0.01u D100 VCCcp_main Data
6 R1110 33
BA277 CPout_main
VCCdigital 19 C1320 C77 C76
R171 R187 C1002 7 NC7 NC18 18 100p 100p 100p
2
0 82 1000p 8 17
Xtalacgnd/OSC NC17
PowerPAD
TP124 CV 9 16
C124 C132 Xtalin/OSC NC16
CV C122 C1017 C1016 10 15
nc 0.1uf R111 C123 0.1uF Xtalout/NC NC15
R180 NC 0.1uF 11 VCCxtal NC14 14 C98
100 0.1uF
10k 12 GNDXtal NC13 13 0.1u
C97 C96
1
25
C87 FSA66P5X
0.1u
5 Vcc Vin 1
OUT 2
FL_Control 4 ON/OFF GND 3
R183 C75 R3 R6 R182 R114
1K 1000P 0 0 nc 56 L149
NC
19.2_AD9864 3V3A_FGU
R5 R4
5VA_FGU C65 100
0 U102 NC
FSA66P5X R188
1
0
5 1 L150 C85 C1013
Vcc Vin +
R168 2 NC 0.1u 10u/16V
NC OUT 19.2_OMAP
LP_control 4 ON/OFF GND 3 TP119
2
C79 C81 R166 MOD_L
1000P C1004 NC NC
TP110 33P R174 R2
X100
REF
1
0 0
4 VCC VCONT 1 MOD_L_RFCS
1
3 2
L154 OUT GND R184
5VA_FGU 4V3A C1000 0.56u C99 DSA535SD NC
220p 270p
B REF OSC B
C1006
1
NC NC C1005 C78 C94 C1007 C91 C88 C70 C74 C84 C72 C67 C69 C68 C66 C64 C103 C105 C104
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U nc nc nc
2
C1001 + C71
470p 1u/16V
2
A A
DESIGNER: ZDW
Title
<Title> PLL
185
Size Document Number Rev
C <Doc>
<RevCode>
Date: Sunday, September 19, 2010 Sheet 9 of 14
5 4 3 2 1
5 4 3 2 1
3
D101 C198 C196
3.6p 7p
1SV305
21 2
Q100
C13 C27 C193 2SC5010
L108 D116
0.5p
1
470nH 1SV305 3.6p C26 33p C185 R185
21 3.6p 56p 5VA_FGU nc
L105 Q117
8n TX
EMD22
C184 D127
220p D111 4V3A 3 4 DAN222
L106 R157 Q105
1SV305 L107 EMD22
2 2 27n 2 1 5 1
D102 470n 601SN1 TX_VCO_H
D117 C191 3 4 2 3
1SV305
1SV305 18p 2 TX_VCO_L
5
1
4V3A 2 TX_VCO_L 6 1
R139
C136 82
2
4.7u R128 R117 6 1
82K 39K L131
601SN1
R149 R147
C145 C143 NC 100
C144 R120
1
NC NC 39K NC
220p
R163 R164 R146
2
C147 C199 C1 C101 C2
C163 NC NC 100 L132 3P TP111
R151 1.5P
MOD_H 0.1u L148 0.01U 1000p 27NH TX_LO
R131 15k
1
NC
3.3k
TP108 L4 C107 C11 L2 L136
C8
1
MOD_H C40 C41 R191 nc 4P 15NH 15NH
1
470n 470p nc
C37 C38 NC NC R152 L135 TX_LO
36K
3
C186 R140 NC NC 27NH C14
220p C106 C17
C141 C142 100 R173 nc 10p 12P C16
R138 nc 1 C15 TP114
470p Q107 6P GND
3
0.1u 8.2k U105 10p
C C166 C34 C35 C39 R141 PBR941 C
L110 5p R122 100P 1 8 NC
470n 27 NC Vcc1 Vcc2 47
1
2 7 1 Q102
2
C181 IN OUT C19 R155
3 IN SW2 6 2SC5108Y L138
3
0.5p 4 5 NC 20k
D105 C152 C151 GND SW1 R150 R162 27nH
9p C36 C21 R156
1SV305 4p R129 R135 L168 NC NC 470P 68
2
21 2 220 27NH NC NC R161
220 18K
Q103
C159 2SC5010
L112 D112 C153 C157
1
R137
82
Q108
R179 EMD22 4V3A
601SN1
3 4
CV C29
C30 5
R158 0.1u
6.8k L117 220p 2 RX_VCO_H C178 C179
470n 2P 1P
C46 6 1
R160
220p
C7 100
C6 L128 L122 L123
0.1u R159 15NH
220p 15n 15NH
7.5k Fin
L121 C32
5p
470n C190 C192
C189 NC
12P NC
3
R144
120
2
L9
R154 601SN1
R190
NC 100
1
C150 C167
R169 R165 R148
220p 0.1u
2
1
C43 C45 15k 6P 18NH 220p
1
3
C52 1.5P NC NC R199 27NH C20 C59
220p R196 TP122
100 120K 10p 12P
C149 C148 C61 C22 GND
R194 1 8P
0.1u 470p Q109
3
7.5k U107 12p
C33 C48 C47 PBR941
L134 C168 R123
1
5p 100P NC 1 8 NC R1
470n 27 Vcc1 Vcc2 47
2 7 1 Q111 C54
2
IN OUT L166 R195
3 IN SW2 6 2SC5108Y
3
C155 NC 20k
D109 C164 C51 4 GND SW1 5
R170 R172 27nH R197
5p 12p R136 L167 C57
1SV305 R130 NC 0
2
21 NC NC NC
A 2 220 220 27NH NC R189 A
NC
Q110
C165 2SC5010
L133 D125 C154 C161
4p
1
<Title> VCO
186
R192
120 Size Document Number Rev
Custom<Doc>
<RevCode>
Date: Wednesday, May 11, 2011 Sheet 10 of 14
5 4 3 2 1
5 4 3 2 1
1
1
TP704
C701
330n C703 2FLO
0.01u
3P
TP701 IF-out
1
L716
C743
TEST POINT
47p
C702
1
0.01u
L701 L702 601S
1 2
1 2
L703 C742
R724 0 C704
1 601S 2 C705 1u
0.1u 220P
R701 C706 9V3A
51 601S
470p
C707 TP709
2
R703 L717
0.1u 5VA_RX
2.2k 5VA_RX L706
C709
C708 601S
0.1u C710 1000p C718 C717
0.1u TP705 Q702 U703
1
L704 L705 C711 6.8uH
R704 CV2 1u 470p 2SC4617 POWER IC
10u 10u C712 NC C713
1
0.1u 560 3900p 1 3 5 Vout Vin 4
48
47
46
45
44
43
42
41
40
39
38
37
C716
1
R727
1
R708 Vss 2 C752
47k 10u/16v +
VDDI
GNDI
LOP
VDDP
GNDP
CXIF
CXVM
CXVL
VDDL
IOUTL
IFIN
LON
C715 R709 4.7k C746
180p 0.47u R707
2
10k 470p
180 1 3
2
Nc CE
1 MXOP GNDL 36 Q701
1
C C
C720 0.1u
3
2 MXON FREF 35 C723 C724 TRANSISTOR C725
3 34 + C726 R728
C721 GNDF GNDS R705 10K 15p 18p 10u/16v C727
C722 4 33 47k
L707 100p IF2N SYNCB 2 0.01u 470p
100p 5 32
601S
2
IF2P GNDH R711 33
U701 3198_FS1
1
1 2 C728 6 VDDF FS 98_FS C731 C730
1000p 7 GCP DOUTB 3098_DOUTB1 R717 33 6p L708 22p C732 3V3D
C729 IF IC 2998_DOUTA1 98_DOUTA 3V3D_RX
1
8 GCN DOUTA D701 220n(HQ) R710 22p TP710
0.1u 9 2898_CLKOUT1 R715 33 98_CLKOUT HVC350B 8.2k
10
VDDA CLKOUT
27 1 2 3V3D_RX 3V3A_RX 3V3A_RX U702
GNDA VDDH R730 R726 POWER IC
2
11 VREFP VDDD 26 C719 C735 C734 R712 NC NC
2
L709
1
C736 12 VREFN PE 25 30p 2 1 5 VOUT VDD 1
L711 1u 601S 270
1 2 49 2
IOUTC
0.1u L712
GNDQ
PowerPAD GND
GNDC
GNDD
GNDS
VDDQ
VDDC
RREF
CLKN
CLKP
601S C737 4 3
L710 601S NC CE
0.1u
PC
PD
601S L718
100k
470n
C749
1 2 39P
1
TP707 L713
18M 0.56u
C747 22P C751 10p C714
L715 3.3u
10p
1
C744 98_FS1
0.1uF R716 5.6k C745 98_DOUTB1 R725 33
98_DOUTB
56p 98_DOUTA1
1
98_CLKOUT1
C748 98_PE1
0.1u R718 98_PD1
510 D702 98_PC1
HVC376B
2
A A
DESIGNER YYF
Title
<Title> IF
187 C
Date:
<Doc>
14
5 4 3 2 1
5 4 3 2 1
2 1
C909 C889 C913 C888 C825 C885 L801
C855 47pF 470p BLM41PG600SN1 W801
1
100p 3300p 0.018uF
33p
33pF 2 1 C916 C930 C931 C940 C943 ANTENNA
C801 C802 C803 + C804
L803 47u/25V 3300p 0.018uF 33p 33p 3300p
R812 Gate_1
D L804 BLM41PG600SN1 1000p 3300p 33pF TP801 D
NC
2
3T/16nH 1 4
R807 C820 2 3
C833
C810 4.7 12pF
1
C815 4pF
47pF C821 C816
W= 3mm 220pF R804
5
NC 2p Directional Couple
4.7
1
L= 5.5mm
w=3mm,
C8330 C841 L807 C817
M801
L=5.5mm R806 Q802 3
Z= 8ohm
Z=8 4.7 MOSFET
22pF 8pF
C823 C824 C856 C876 C879
100nH 470pF
C827 Fcouple 4 4
2 L809 L813 L810
10pF NC 8pF NC NC 470p
L808 3T/16nH 3T/16nH 3T/16nH
C893 1 2 1 2
R813
33
0 470pF Pin Pout
4.7
2 D801 R815
C832 C834 C870 C874 C835 C836 C837 C830 C838 L828 C884
Q803 MA4P1250 5 6
R818 C842 C831 NC NC NC NC 2pF 2p 5p 5p 3p 5 Rcouple 27k 1uH NC
C839 MOSFET
4.7 22pF 4pF
220pF L833 R848
C840 L816
1
R860 47pF NC
47pF 11T/113nH L832 R840
NC L817
C819 C873 C882 10nH NC
C812 C848 C847
R861 8pF NC NC
1
12pF C850 3T/16nH 150p 150p
4.7
470p R816 R817
Gate_2 C851 D802 C852
220 220
3p MA4P1250 100p R819 R820
C846 82 NC
D804
33pF R821 C858
2
RX_in RB706F
L815 33 NC
BLM18AG601SN1 2
C860 C828 R825 C861
2 1 C862 3
NC NC 33 68pF
1.5p 1 C891
R823
C849 120p
100
NC
C857 R852 R853
L829 L830 TP809 22pF 470 470
0 0
TP806
Gate_2 M6 M5 M1 M2 M3 M4
Final_bias R859
1
Final_bias D803
1
RB706F
1k R856
C892 R822
1
C 51 2 C
220p Gate_1 0 3
GND TP807
1 C899
C869 APC
R855 120p
15pF RT803 R871
C886 C887 R858 51 9V3A R850
TP808 NC t NC R851
NC 220p 9.1k 1 2 NC
9V3A TV_APC
1
NC
1 R900 R834 R836
1
R832 R833
R841 NC NC
R847 NC NC
L802 33k
NC 47K
BLM41PG600SN1 Q810 L821
TRANSISTOR BLM18AG601SN1
2
3 2 2 1 APC_COMP
C859
U801
15pF
C854 C853 C807 C868
1
IN+
L819 0.1u 220p 10u/25V C829 C845 0.1u R873 5 VEE 4 R837 R838
W= 3mm w=3mm,
8T/47n 0.1uF 220p
L822 R831
NC C894 0 33k
1
+-
L=3mm L820 BLM18AG601SN1 10k R839 R870 6 3
L= 3mm Z=8 1uH
R877
VGG 3.3K 10K
0.1uf IN- IN+
R881 47K
Z= 8 ohm 4.7K 7 2
2
OUT + IN- -
L827 TX 3 R880 R842 C875
3
2
39nH 4.7K 8 VCC
OUT 1 12k 150P
R826 C866 C864 1 C904
C867 R830 R896 R857
1 0 L823 18pF Q811 NC
NC 47 NC D805 OPAMP 0
1 C863 TRANSISTOR
C809 UDZS5.1B
Q804 0
4700pF 220p 2
MOSFET
1
R828 R827 R866
2
C871
3
B C822 B
C813 R805 R809
IN+
C814 220p 5 VEE 4 R863
C880 C844 NC NC 82 NC
18p R882 0
1
C881 0.047uF NC 2 TX_LO
+-
C878 R845 C877 R846 R893 150k 6 IN- IN+ 3
NC R844 R843 R808
220p 20K 220p 10K C818 R865
10k 5.6K Q801 10 7 2
R811 15p OUT + IN- -
TRANSISTOR L811 R814 R810 R892
4
3
0 8 VCC
OUT 1
220p
C811 R862
L824 L825
470p 56 R872 1k
BLM18AG601SN1 BLM18AG601SN1
TP812 180k
2
1
VGG TP811 NC 1K 3
9V3A TEMP_DET2
1
driver 2
3 3 R875 R886
R904 33K DAN222 R888 R884
1 1 220k
0 18k TP810
NC
REV_TEMP_DET TEMP
R867
R889 R891 R885 L806
Q812 Q813 8.2k
2 2 DTC114EE TEMP_DET NC 0 10k 1uH
DTC114EE 2 1
SW1
11
PAD SW D129
R905 MA2S077 C896
C898 R890 220p R883
33K
220p 3.3k 56k
RT804
t
100k
2
R868
NC
R876
C897
C954 R897 56k
220p
NC 470k
U804
TV_APC
A R864 OPAMP A
IN+
470k 5 VEE 4
+-
REV_TEMP_DET 6 IN- IN+ 3
R898
470k 7 OUT + IN- - 2
R899
470k 8 VCC
OUT 1
188
NC C953
Size Document Number Rev
18k C <Doc>
<RevCode>
Date: Wednesday, December 08, 2010 Sheet 14 of 14
5 4 3 2 1
2 1
5VD
M1 M2 M3 M4
3V3A TP1 TP10TP11TP4 TP5 TP12TP13TP2 TP6 TP3 TP7 TP14TP15TP8 TP16TP9 TP17
1
5VD 5VD
1
TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP D3
BLM18PG300SN1
5VD 5VD 5VD MMBZ6V8ALT1G
L2
C2
KPT-1608SGC
D4
100pf
1
KPT-1608SGC
KPT-1608SGC
D2
UP MENU C1 C3
D1 R4 R3 R2 R5
100pf 0.1uf
3
DOWN 56 56 56 56 R6
B3
B2
B1
U2
EMI FILTER
42
P4 10K J1
12
12
12
U1
16
C1 A1
GND3
GND2
GND1
A Y1 X1 UART2_RXD
LOGIC IC C2 A2 PRST
GND2
KPT-1608SGC
D7
B UART2_TXD
D6
D5 p1 BACK Y2 X2
15 11 C3 A3 CLOCK 25
VCC
KPT-1608SGC
KPT-1608SGC
Q0 SHCP Y3 X3 S/P_CLOCK
4
p3 p2 D8 D9 1 12 C4 A4 CSLED 24
Q1 STCP Y4 X4 U3 DATA S/P_CSLED
2 10 C5 A5 26
B 2 KAA-3528RG KAA-3528RG Q2 SHR Y5 X5 EMI FILTER CS2_LCD S/P_DATA
B
2
2
3 Q3 STR 13 PRST C6 Y6 X6 A6 29 CS2_LCD
1
4 C1 A1 F_A1_LCD 30
Q4 C4 D10 Y1 X1 WE_LCD F_A1_LCD
5 C2 A2 28
3
R1 Q5 0.1uf Y2 X2 OE_LCD WE_LCD
R7 R8 6 Q6 DS 14 MMBZ5V6ALT1G C3 Y3 X3 A3 27 OE_LCD
33 J2 R9 33 F_D0
7 C4 A4 38
GND
33 33 Q7 Y4 X4 F_D0_LCD
4
17 18
GND1
GND2
GND3
D11 D12 9 DB7 DB8 C5 A5 F_D1 37
Q7S 16 19 Y5 X5 F_D2 F_D1_LCD
DB6 DB9 C6 A6 36
3
KAA-3528RG KAA-3528RG 15 20 Y6 X6 F_D3 F_D2_LCD
DB5 DB10 U4 35
8
14 21 F_D4 F_D3_LCD
DB4 DB11 EMI FILTER 34
B1
B2
B3
13 22 F_D5 F_D4_LCD
R10 33 DB3 DB12 33
3
12 23 C1 A1 F_D6 F_D5_LCD
DB2 DB13 Y1 X1 32 F_D6_LCD
3
11 DB1 DB14 24 C2 Y2 X2 A2 F_D7
3 1V8A 31 F_D7_LCD
Q1 10 DB0 DB15 25 C3 Y3 X3 A3 R11 33 PRST
R12 33 16 PRST
9 RD DB16 26 C4 Y4 X4 A4
2 10
GND1
GND2
GND3
8 27 C5 A5 UART2_RXD UART2_RXD
2 Q2 WR DB17 Y5 X5 UART2_TXD 11
R13 7 28 C6 A6 R14 NC(47) UART2_TXD
DTC114EE 3 RS RESET 3V3A Y6 X6 39
6 29 1V8A GND
2SK1824 CS IM3 R15 0 15
1
B1
B2
B3
RED 2 3V3A R18 0 FLM IM0 14
Q3 4 IOVCC LED_A 31 R19 0 C5 SPKR1-
R20 10 100p 13 SPKR1+
DTC114EE 3 VCI2 LED_K1 32 PWB_IN
R21 10 C7 40 PWB_IN
2 VCI1 LED_K2 33 C8
C6 R22 10 17 KB_C0
1 C9 1 GND LED_K3 34
100p 0.1uf 100p 18 KB_C1
0.1uf 36 GND2 GND1 35
C10 C11 C12 19 KB_C2
3
20 KB_C3
FPC CONNECTER 100p 100p 100p 21
Q4 KB_R0
22 KB_R1
U5 23 KB_R2
5VD 2 2SK1824 ACC_IO1
POWER IC 3V3A 3 ACC_IO1
L1 PTT 6
4 5 R23 0 PTT_MMP
HANDSET_AUDIO
1
Vin Vout 12
USB_D- HANDSET_AUDIO
BLM18PG300SN1 7
2 C14 MIC_GROUND USB_D-
Vss TP18TP19 2 MIC_GROUND
3
C13 1uf TP TP USB_VBUS 4
1uf D13 INT_MIC USB_VBUS
1 INT_MIC
3 CE Nc 1 USB_D+
MMBZ20VALT1G 8 USB_D+
HOOK 5 HOOK_MMP
GND1
ACC_IO2 9
TP20 TP21TP22TP23 TP24 ACC_IO2
2
C15 C16 CON40_MAIN
5VD U6
POWER IC 1V8A 0.01uf
0.01uf
41
L3 R24 NC S1 TP TP TP TP TP J3
4 Vin Vout 5
SKQMBBE010 SPKR
NC(BLM18PG300SN1) SPKR1-
2 Vss C18 1 2 SPKR- 2
1 SPKR1+
C17 nc(1uf) SPKR+
1uf
3 1 C19 470PF
CE Nc
KB_C0
KB_C1
A1 KB_C2
ANTENNA
3V3A TP25 TP26
C20 KB_C3
470pf KB_R0
1 2 C21
10K 10K
KB_R1
R25 R26 TP TP 470pf C22
S2 S3 S4 S5 S6 KB_R2
3
C B B TP29
R29 0 TP27
0 S8 S9 S10 S11 S12 TP
E27 C23 C24 PF1 PF1 PF1 PF1 PF1 TP
6
7
W1 TP28
R30 0 0.1uf 0.1uf 1 2 1 2 1 2 1 2 1 2
TP
FIXER P5 p2 p1 DOWN P4
C28 C29 C30
C25 C26 C27
NC NC 470pf 470pf 470pf
470pf
3
3
D14 D15 D16
D17 D18 D19 D20
MMBZ5V6ALT1G MMBZ5V6ALT1G MMBZ5V6ALT1G
MMBZ5V6ALT1G MMBZ5V6ALT1G MMBZ20VALT1G MMBZ5V6ALT1G
3V3A
1
2
A R31
0
C31
470PF
C32
470pf
C33
470pf
C34
470pf
C35 C36
470pf 470pf
C37
470pf A
R36 R35 R34 R33 J4
ACC_I00 1
10K 10K 10K 10K 2
PTT
HANDSET_AUDIO 3
CS2_LCD 4
USB_D-
MIC_GROUND 5
F_A1_LCD 6
USB_VBUS
INT_MIC 7
WE_LCD 8
USB_D+
HOOK 9
OE_LCD 10
ACC_IO1
5VD
U8
2
CON10_MMP R32
10k 4 2 D21 TP30TP31TP32TP33TP34TP35TP36TP37TP38TP39
VCC IO1
MMBZ6V8ALT1G
1 GND IO2 3
PRTR5V0U2X
3
TP TP TP TP TP TP TP TP TP TP
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Transmitter Circuit
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FGU
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Service Manual
used to amplify the VCO signal to the desired output power level, while the latter can keep the output
power at the desired level, so as to protect the power amplifier from damage caused by over heat,
antenna mismatch, and out-of-range voltage (over voltage or under voltage may result in damage to
first stage is a buffer amplifier circuit with fixed gain; the second stage is a pre-driver power amplifier
circuit with variable gain (formed by Q805); the third stage is a driver power amplifier circuit with variable
gain (formed by Q804); and the final stage is the final power amplifier circuit with fixed gain (formed by
Q802 and Q803). In addition, this power amplifier contains a TX/RX switch and a low-pass filter.
bias current of 28mA (for Q801). Power supply for the switching transistor Q810 is controlled by TX
signal (enabled by antenna switch) so as to further control the power supply for the whole circuit.
input matching circuit is composed of C826, L826, L814, C843 and R824.
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Service Manual
maximum output power is 38.5dBm, and the maximum variable gain is 11dB.
the maximum variable gain of 10dB. The input matching circuit is composed of C815, C839, R804, R806,
R807, R813, R818 and R861, while the power combining circuit is composed of C820, C8330, C831,
In TX mode, the switching transistor Q810 is controlled by TX signal, so as to supply 9V 3A to the PIN
diodes D801 and D802. Quiescent bias current of the PIN diode is controlled by the resistors R821 and
R825. In this mode, D801 and D802 are turned on; RF signals are applied to the low-pass filter
(composed of C871, C816, C836, C837, C838, L809, L813, and L810) and then transmitted via the
antenna port.
In RX mode, TX signal controls the switching transistor Q810, to further control the power supply for the
PIN diodes D801 and D802, which are not applied with DC bias current. When the two PIN diodes are
turned off, signals feed into the RX path through the low-pass filter (composed of L871, C852 and C862).
both forward and reverse directed power of the transmitter. The forward power is coupled to the diode
D803, and the voltage is applied to the power control circuit (U801). Then the voltage VGG is output to
control the gate voltage of pre-driver and driver PA, ensuring a constant power output.
The directional coupler can adjust the TX power and detect the VSWR load. The reverse power is
coupled to D804. The voltage is applied to U802 and then feeds into U302 for detection
voltage that can represent the forward power. The voltage together with the preset voltage feeds to U801
to output a voltage VGG, which can control both gate voltage and gain of Q804 and Q805, ensuring a
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Service Manual
detected temperature. Both the voltage used for temperature detection and the threshold voltage are fed
into the operational amplifier U803, to output a voltage signal that is in proportion to the detected
temperature. Afterwards, the voltage is applied to software for judgment, and then the preset voltage will
be subsequently changed to reduce the TX power, and to protect the PA from over-heating.
rubber part mounted on the top cover. If the switch is turned off, VGG will become low, and no power will
second IF is 2.25MHz. The first local oscillator signal is from the PLL circuit U100, and the second local
oscillator signal (71.1MHz) from the PLL circuit U701. The major units are BPF, LNA, mixer, IF filter, IF
electrically tunable band-pass filter to get useful signals. After passing through the RF band-pass filter
and LNA (Q6102), the RF signals together with the first LO signal feed to the mixer for the first frequency
conversion, to generate the first IF signal (73.35MHz). The mixer that employs the passive diode can
ensure good dynamic range and port isolation. The LO signal (3-5dBm) from the VCO feeds to Q6103
to get a gain (17dB). The first LO signals (73.35MHz) pass through the crystal filter (Z6100) to remove
out-of-band spurious signals, and then feed to the two-stage IF amplifier circuit (composed of Q6133 and
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Q6134) for amplification. Finally the amplified signals go to the IF IC for processing
The first IF signal (73.35MHz) output by the IF amplifier goes into IF IC via Pin 47, where the signal is
converted to the second IF signal (2.25MHz). Then the un-demodulated digital I/Q signal output from the
SSI interface is sent to U302 for demodulation. IF IC employs a reference frequency of 19.2MHz and
shares the crystal with U302. The second LO VCO consists of the external transistor, varactor and some
other components, to provide the second LO signal. The 18MHz clock frequency is generated by the LC
DSP (U302) gets the audio signal from IF IC (U701). Then this signal goes through U302 to output data
signal, which is sent to U231 and PIN44 (SSI_DI) for digital-to-analog conversion. Finally, the output
analog audio signal will be subjected to gain control, and then fed to the speaker.
to supply excitation signal source to the transmitter, and local oscillator signal to the receiver.
14.3.3 PLL IC
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Service Manual
The PLL IC (U100) is a fractional frequency divider. The logic IC U101 and U102 work with the PLL IC
The 19.2MHz frequency generated by the reference oscillator goes into the PLL IC for division,
generating the reference frequency. Meanwhile, the frequency generated by VCO goes into PLL IC
(U100) for frequency division. The resulting frequency will be compared with the reference frequency in
terms of phase difference in the phase detector. After comparison, the resulting frequency is converted
to CV voltage via the loop filter, to control and lock the frequency.
14.3.4 VCO
The VCO is composed of transistors (Q100, Q103, Q106 and Q110), varactors and four Colpitts
oscillators. There are four VCOs in all: two VCOs (Q100 and Q103) used to transmit excitation signals
and the other two VCOs (Q106 and Q110) to receive LO signals. U302 controls the operating frequency
of the VCO. Q102 and Q107 constitute the buffer amplifiers for the transmitter circuit, while Q111 and
Q109 for the receiver circuit. The digital-to-analog converter (U500) modulates the TX oscillator signal.
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TX_L_VCO MOD
Q103
TX PA
Q107 Q102
Q100
TX_H_VCO
RX_L_VCO
Q110
RX Lo
Q109 Q111
Q106
RX_H_VCO
237
14.4 PCB View
Top Layer
237
238
MD78X/MD78XG PCB View (Front Panel)
Bottom Layer
239
238
MD78X/MD78XG PCB View (Main Board)
Top Layer
240
239
MD78X/MD78XG PCB View (Main Board)
Bottom Layer
241
240
14.5 Block Diagram
Q804\Q805
9V3A 9V1A
Q920\Q921\U914 Q801 Q801
Q6102
9V1A
Q902 Q6103
U6000
U703
Q6105
5VA U701
U702
U701
U915
4V3A
Q104 Q100\Q103\Q106\Q110
5VA
U100
U918 3V3A
X100
5VA
ON\OFF KEY PWB U905 U500
IGN_SENCE
EMERGENCY 3V3A U231
U909
X302
U302
1V6D
U401 USB
U919
Control Head
U231
1V8D
U903 U232
U302
3VRTC U323
U912
U326
242
241
MD78X/MD78XG Block Diagram (RF Section)
High
Temperature
Protection
9V1A_TX
B+ ADC
TXC ANT
Gain:10 dB
Gain:15 dB Gain:11dB
Tx/Rx
Gain:-6 dB Gain:16 dB Switch
Tx_PORT
Microstrip
Attenuator Match Match Match
Matcher Microstrip Dual
Q805 Q804 Harmonic
Q801 Driver Rx_PORT Filter Directional Coupler
PreDriver
Firststage Switchÿs Power
9.1V
Q802ǃQ803 Forward Reflect
Finalstage Detector Detector
RX
Alarm to ADC
B+ VSWR Protection
Final_Bias
Temperature
compensation TV_APC
TX_L_VCO
MOD H TV_APC
TX_VCO_L U500
Q103 MOD L DAC Final_Bias
TX LO:3dBm
Q107 Q102
TX_VCO_H
TX_H_VCO Q100 X100
19.2MHZ
CLK
MCSI
C STB
SPI
LPF PLL U100
DATA
LD
RX_VCO_H
RX_H_VCO Q106
C
VCO_Feed
back LPF
LPF
X100
1 2 19.2MHZ
Q6103
Attenuator
3dB
1
Attenuator
1dB Attenuator Control
10dB
2
U701 Q6104
Z6100 Q6102
IF IC Q6105
Mixer
IF Filter D6106
IF Processor TV
243
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MD78X/MD78XG Block Diagram (BB Section)
PLL IF processor DAC
RF Unit
BB Schematic Block Diagram SPI SSI SSI TXǃRX CTL
PowerǃIO CTL
McBSP2_TX
McBSP2 RX
SPI(CS1 )
SPI(CS2)
AUX MCSI1 SPI McBSP2 GPIOs
TEMP_DET ADC
Audio Codec
EMIFS
Headset Nor FLASH and pSRAM
Driver IIS McBSP1 DSP datax16 FLASH: 8Mx16
TMS320C55x pSRAM:2Mx16
MCLK
Mic CP
AMP Driver SPI BELL
EMIFF
Speed:96MHz(max)
Mobile SDRAM
McBSP3 datax16
128Mb:8Mx16
JTAG JTAG
TXAF_DI
MCLK19.2MHz OMAP5912
19.2MHz 19.2MHz
RXAF_DO CLK AD9864
32KHz TCXO
PWM0/
PWT
CS3
uWire
RTC 32.768KHz
20ppm
IIC
UART3 MPU
IIC
IIC
LTR/OPTION GPIOs
ARM926EJ-S Accelero
meter
BOARD/BLUETOOTH
Audio PA
IIC
EMERGENCY
UART1 GPS
IGN_SENSE
UART2 IGN_SENSE
KEY GPIOs EMERGENCY
USB1 GPIOs
Trax or GPIO PWB User Program
PRGM IO out
EMERGENCY
IGN_SENSE
CLK/DATA/CS
AUX Audio DC Supply 74hc595
PRGM GPIOS
GPIO 74hc595
USB Expand
Rear
ACC_ID GPIO
Accessory(MAP) PRGM UART or
USB TX_RX Keytrax
GPIOs light/LED/LCD
IO Expand LED 3X4 Volume
ACC_ID backlight
MMP
MIC TFT LCD datax8 EMIFS
SPKr
Control Head
243
244
5 4 3 2 1
TP4012
TP4016
R245 1R
EXT_SPKR+
R253 1R
D EXT_SPKR- D
R293 1R
SPKR1+
CODEC_SSI_WCLK
CODEC_SSI_BCLK
R294 1R
CODEC_SSI_DO
SPKR1-
CODEC_SSI_DI
CODEC_MOSI
CODEC_SCLK
CODEC_MISO
/CODEC_DAV
CODEC_/SS
CODEC_CLK
L232
9V3 BLM18PG300SN1 9d3V
B+
C232
C233
1
0.1u C285 C284
0.1u C234 +
C235
19
16
15
11
20
10
13
10uF/25V
2
5
1
0.01u 0.1u 47uF/25V
U201
OUT1+
OUT2+
OUT1-
OUT2-
VCC
VCC
GND
GND
GND
GND
SGND
TP232 1
AUDIO PA
TP233 1
TP234 1
TP235 1
1
MUTE
STBY
1V8D TP236
NC1
NC2
NC3
NC4
NC5
IN2-
SPK_SEL
IN1
R288 47K C268 0.47u R289 0
R230 3V3A
C236 0 9d3V
14
9
8
3
4
12
17
18
4
3
2
1
33
33
R2876.8K
0.1u RN230 C245 220p
R238
100*4 VAG
R232
0
R231
6
7
8
C283 R295 1K 9d3V
B- B
B OUT
B+
V+
C289 0.1u Q230
3V3D R237 120K
5
6
7
8
-+
R233 C293 C237
1
0.1u 4 3
49
48
47
46
45
44
43
42
41
40
39
38
37
C520 10uF/16V 0.47u
A OUT
0 C240 +
+-
R292
A
C239 U238 C294 R241
V-
DVSS
BCLK
WCLK
MCLK
SCLK
MOSI
SS
DAV
SDOUT
MISO
A+
A-
T-PAD
DVDD
SDIN
3
2
1
3V3A
1 36 C291
IOVDD DRVSS2 C288 5 1
2 PWR_DN OUT8P 35 U237 R286 47K
3 34 C243 1u 100p
/CODEC_RST RESET BVDD SWITCH IC UMC4N
1 R242 0 4 33 R239 6.8K
TP238 GPIO2 OUT8N 0.1u 5 VCC 6 C242 220p
TP239 1 5 32 S
GPIO1 DRVSS1 2 GND B1 1
6 AVDD2 VGND/CP_OUTN 31 C290 1u
4 A B0 3 LOW_LEVEL_MUTE
C
R243 7 AVSS2 SPKFC 30 C
8 29 Q231
3V3A AVDD1 DRVDD C247 220p
BUZZ_IN/CP_INN
C251 1u
1
0 9 NC9 SPK2 28 3 4
C248 R246 22K
MICBIAS_HND
10 27
MICBIAS_HED
MICIN_HED
12 NC12 MIC_DET 25 2
100K
2
CP_INP
AVSS1
VREF
AUX2
AUX1
VBAT
11
NC R296 1 5
U231 OP AMP
11
BB IC 13 -
UMC4N
13
14
15
16
17
18
19
20
21
22
23
24
14 C252 1u OP AMP
VAG 12 + R250 15K
R249 6 - C253 1u/25V
1V8D R251 600mV
U235D 7 HANDSET_AUDIO
0 C255 VAG 5 +
C292 100
1
C256
4
NEW 1u C295 R202 C254 220p
0.01u C262 C259 R236 100P
1u 100P R252 100K U235B
NC R280 10K 10K 9d3V
TEMP_DET TP237 1u
4
D230 ESD IC
1K R290
NC R254 9d3V
11
TEMP_DET2
C238 C200 OP AMP
30K R257 C263
R284 1u 1u C257 1u 9 - 1u
10K R258 C258 0.1u R285 R260 330mV
15k 8 RX_AUDIO
CODEC_PWT 15k
R259 10K 9d3V VAG 10 +
100
R261 R279 R283
RXAF_DO
TXAF_DI
C260 C261
10K 0.01u 0.01u 30k 30k U235C PUB_ADDRESS2_EN
C264 C265 220p
1
C266 R255 1u
4
1u 470 R262 100K
L233 C298 C299 Q232
9d3V
MIC_GROUND 3 4 R263
11
1
B INT_MIC VAG 3 +
Q233 B
BLM18BD601SN1D 1 5
C271 R264 1K
C270 U235A
5
TP4029 220P 220P UMC4N
4
R269
L235
9d3V 100K
11
EXT_MIC R268
C272 BLM18BD601SN1D C273 R267 1K C274 100K OP AMP C277
220P 220P 0.1u C276 1u
6 -
R271
1u
7 PUB_ADDRESS2
VAG R272 47K 5 +
100
EXT_MIC_EN C278
1u U236B
D231 ESD IC
4
C281
Q234 Q235 1u 9d3V
VAG
3 4 C279 1u C280 220p 3 4
11
R273 24K
R274 100K OP AMP
R276 C282
2 R275 2 R277
100K 1u
100K 47K 9 -
R278
11
8 PUB_ADDRESS1
1 5 OP AMP 1 5 10 +
100
13
11
-
UMC4N 14 UMC4N U236C
OP AMP
4
VAG 12
+
2 - VAG
9d3V R265
R266 47K 1 U236D 9d3V
3 +
1.8K
4
PUB_ADDRESS1_EN
1
U236A 9d3V
R270
+ C275 PUB_ADDRESS_MIC_EN
47K
4
10uF/16V
2
9d3V
A A
DESIGNER: LHY
Title
<Title> AUDIO
245
244
C <Doc> <RevCode>
5 4 3 2 1
5 4 3 2 1
C6100 R6100
D C6102 C6185 R6101 D
1u 0
470p 1uF 680
R6102
10
TRANSISTOR
4
L6101 3 4
Q6101
BLM18PG600SN1
2 5
RF_ATTEN 2 1 2 TRANSISTOR
C6103 1 5
3
220p TX TP
Q6100 TP6101
C6104 C6105 TP6100
R6103
GND
27K 220p
0.1u L6102
220n L6103
1
10n
C6106
TP6102
220p R6104
C6107 2.7K
C6108
220p
R6105 1000p
5.6K
TP6103 C6114
R6106 TP6104
TX TP 5p R6108
680
L6104 C6119 C6120 C6109 C6110 C6121 C6122 C6111 C6112 L6106 C6125 C6126 C6116 C6117 C6127 C6124
4.7K
Micr-L N2 1.5p 1p 6p 1p 1p
N3
2.2p 6p 6p
R6107 Micr-L N6 NC 1p 6p 1p 1.5p 1p
N7
L6107
C6113 Micr-R
D6100 1.2k C6128
2
C6123 0.1u C6115 L6217 L6216
C6118 HVC131 N17
0 N18 N19 0 220p 220p 470p
470pF D6101 D6102 Q6102 D6103 D6104
RX_in 1 2 3 1SV279 1SV279 3 N4 2 Micr-L 1 2 Micr-L 1 2 TRANSISTOR 3N5 1SV279 1SV279 3 RX_ONE
2
N1 R6123 L6105
C6194 C6132 L6214 L6215 C6129 C6130
L6114 0 C6131
2
10NH NC Micr-L 18p 100p C6244
BLM18PG600SN1 NC C6246
1
3
4
1
9V1A_RX R6109 C6133 C6245
C TP6110 D6105 R6110 6p nc C
2 1 390 4p nc
RX CV L6110 1.2K
HSM88AS
3
C6134 C6135 C6136 C6137 C6138 15n C6139 C6140 C6141 C6142C6143
C6144 C6145 RX_AFTER 56p 56p 56p 47P 47P 56p 56p 56p 47P 47P
220p 1u
U6000
OPAMP R6127
TV_APC 1 IN+ VCC 5 10K R6111 R6112
100K 100K
R6116 +
2 R6114 R6140
0 VEE
- 33
0
3 4
IN- OUT
R6113
TUHF_TONE C6146 C6147
270K 470P 0.01u
R6115
100K
L6115
9V1A_RX
1 2
C6148 C6149
470p 1u
BLM18PG600SN1 R6126 R6117
TP6105 82 82
RX TP
TP6106
C6151 C6152 C6153 C6154
C6150 470p 1.5p 1p 2p
R6118
NC L6116 R6119 MIX IC
3.3K
C6155 18n 1.2K C6157
D6106 R6120
B 0.01u R6121
C6193 L6117 L6119 L6118 100p 3 T6100 4 51 B
3
5.6
22n 22n 18n T6101
RX_LO 4 3 2 5
R6122 C6159
1
4
330
TRANSISTOR
3
4
C6172 R6138
0 0
TP6107
GND
5VA_RX 2 1
1
L6121
BLM18PG600SN1
C6190
R6131
1uF R6130
1.2K
5.1K TX TP
TX TP TP6109
TP6108
C6169
C6168
R6132 0.1u
0.1u C6170
51
R6133 9p
L6122
C6171 330
0.1uF
0.1uF C6173 R6135 C6175 C6177
L6126 C6176 C6178
3
0.1u 4.7K 0.1u 15p
IF-out C6179 0 0.01u
3
C6180 4 OUT IN 1
R6134 0.1u
0.1u
30k 0.1uF GND GND
1
3
C6174 L6123
C6182 C6181 Q6104 C6187 C6192 C6188
2
3
Q6105
R6139
56K
Title
<Title>
245
246
Date: Wednesday, December 08, 2010 Sheet 1 of 2
5 4 3 2 1
5 4 3 2 1
D L500 5VA D
BLM18PG600SN1
2 1
1
C471 + C405
0.1u 10uF/10V
2
R570 5VA
10k R542 0
1
C484 1000p + C509
C483 8 OUT 1 C508 C510
VCC R528
8200p 10u/16v 0.1u 100P 68K
2
7 OUT +- IN- 2
R568 R574
IN+
12k NC
6 IN- 3
R575 R577 -+ R513
2.7k 6.8k C404
0.1u
5 VEE 4 100K
1000p
R529 33K
IN+
C406
1200p OP AMP
C515
U501
R503 1K R564 0 R566 0 Final_bias
C502
C C500 C501 3300p R504 1K R565 0 R567 0 TV_APC C
33p R500 330p R501 R502 C506 C507 C521 C522 C523 C524
100K 10K 1K 0.01uF 0.01uF NC NC NC NC
MOD_H
R505 R506 R507
0 10K 0 R514 100K
MOD_L_RFCS
16
15
14
13
12
11
10
9
U500
PD REFINAB
LDAC OUTA
OUTB
DVDD AVDD
SCLK OUTC
OUTD
FS REFINCD
DGND AGND
D/A IC
DIN
CS
3V3D
1
2
3
4
5
6
7
8
1
B R508 0 B
+ C512 R509 10k
C511 C513
10u/16v 0.1u 1000P R512 10k
2
R510 10k
1 8
DAC_DIN 2 7
DAC_SCLK 3 6
DAC_FS 4 5
RN500 33*4
C516 C517 C518
100P 100P 100P
A A
Title
<Title>
246
247
5 4 3 2 1
D D
TP4044
TP4047
TP4051
TP4045
TP4050
TP4043
TP4054
TP4049
TP4046
TP4048
TP4053
TP4052
F_D0 R487 33
F_D1 R489 33 F_D0_LCD
F_D2 R490 33 F_D1_LCD
F_D3 R492 33 F_D2_LCD
F_D4 R515 33 F_D3_LCD
F_D5 R516 33 F_D4_LCD
F_D6 R517 33 F_D5_LCD
F_D7 R518 33 F_D6_LCD
/OE R519 33 F_D7_LCD
/WE R520 33 /OE_LCD
CS2 R521 33 /WE_LCD
F_A1 R522 33 CS2_LCD
F_A1_LCD
U302A U233
SDR_A0 A2 J8 F_A1
SDRAM.A0 FLASH.A1 F_A1 G1
SDR_A1 B2 D3 F_A2 A0
SDRAM.A1 FLASH.A2 F_A2 F1
SDR_A2 B6 C1 F_A3 A1
SDRAM.A2 FLASH.A3 F_A3 E1 J2 F_D0
SDR_A3 A1 E4 F_A4 A2 DQ0
SDRAM.A3 FLASH.A4 F_A4 D1 G3 F_D1
SDR_A4 G10 D2 F_A5 A3 DQ1
SDRAM.A4 FLASH.A5 F_A5 F2 K3 F_D2
SDR_A5 B9 F4 F_A6 A4 DQ2
SDRAM.A5 FLASH.A6 F_A6 E2 H4 F_D3
SDR_A6 G12 E3 F_A7 A5 DQ3
SDRAM.A6 FLASH.A7 F_A7 D2 H5 F_D4
SDR_A7 G11 J7 F_A8 A6 DQ4
SDRAM.A7 FLASH.A8 F_A8 C2 K6 F_D5
SDR_A8 G9 F3 F_A9 A7 DQ5
SDRAM.A8 FLASH.A9 F_A9 C6 G6 F_D6
0 SDR_A9 B12 G4 F_A10 A8 DQ6
R484 1V8D SDRAM.A9 FLASH.A10 F_A10 E6 J7 F_D7
SDR_A10 B8 G3 F_A11 A9 DQ7
SDRAM.A10 FLASH.A11 F_A11 F6 K2 F_D8
C SDR_A11 H10 G2 F_A12 A10 DQ8 C
C311 C305 C306 C307 SDRAM.A11 FLASH.A12 F_A12 C7 H3 F_D9
SDR_A12 H9 K8 F_A13 A11 DQ9
SDRAM.A12 FLASH.A13 F_A13 D7 J3 F_D10
0.1u 1u 0.01u 100p H11 H4 F_A14 A12 DQ10
SDRAM.A13 FLASH.A14 F_A14 E7 K4 F_D11
H3 F_A15 A13 DQ11
FLASH.A15 F_A15 F7 J6 F_D12
SDR_D0 D6 K7 F_A16 A14 DQ12
U232 SDRAM.D0 FLASH.A16 F_A16 D8 H6 F_D13
SDR_D1 C6 J2 F_A17 A15 DQ13
SDRAM.D1 FLASH.A17 F_A17 G8 K7 F_D14
SDRAM
D3
C7
SDR_D2 F_A18
E7
A9
B3
A7
C5 J4 A16 DQ14
J9
R441 10K
R326 10K
R353 10K
R536 SDR_A10 A9 DQ9 SDR_D10 SDR_D14 SDRAM.D13 FLASH.D2 F_D3 B2
H9 D1 D12 P2 /WE NC6
0 SDR_A11 A10 DQ10 SDR_D11 SDR_D15 SDRAM.D14 FLASH.D3 F_D4 R359 C5 L2
G2 C2 C12 P4 CS1_SRAMJ1 WE NC7
SDR_A12 A11 DQ11 SDR_D12 SDRAM.D15 FLASH.D4 F_D5 NC TP302 1 B3
G1 C1 P7 /OE CE1-ps NC8
SDR_BA0 A12 DQ12 SDR_D13 FLASH.D5 F_D6 H2 L3
G7 B2 C14 R2 OE NC9
SDR_BA1 BA0 DQ13 SDR_D14 SDRAM.DQSH FLASH.D6 F_D7
TP303 1 /CS3_FLASH H1 CEf NC10 B4
G8 BA1 DQ14 B1 D4 SDRAM.DQSL FLASH.D7 R3 RDY R356 0
SDR_D15 /SDR_CS F_D8 E4 RY/BYf NC11 F4
DQ15 A2 G8 SDRAM.CS FLASH.D8 R4 /RST_OUTR440 0
/SDR_CAS F_D9 D4 RESET NC12 G4
F7 CAS D9 SDRAM.CLKX FLASH.D9 T2 /WP R399 0
/SDR_RAS R544 SDR_BA0 F_D10 C4 WP/ACC NC13 L4
F8 RAS B3 SDRAM.BA0 FLASH.D10 T3 R442 10K
SDR_DQML 0 SDR_BA1 F_D11 3V3D D5 CE2ps NC14 B5
E8 LDQM C3 SDRAM.BA1 FLASH.D11 P8
SDR_DQMU SDR_CLK F_D12 NC16 G5
F1 UDQM NC E2 1 TP308 C9 SDRAM.CLK FLASH.D12 U1
/SDR_WE SDR_CKE F_D13 J4 VCCf NC17 K5
CK1 F9 WE H12 SDRAM.CKE FLASH.D13 U3 R444 0
VFLASH J5 L5
1 SDR_CLK F2 CLK
SDR_DQMU D10 SDRAM.DQMU FLASH.D14 T4 F_D14 VCCps NC18
SDR_CKE SDR_DQML F_D15 NC19 B6
F3 CKE C8 SDRAM.DQML FLASH.D15 V3 C310 C308 C309
VSSQC3
VSSQD7
L6
VSSQA3
VSSQB7
VSSE3
VSSJ1
CS /SDR_RAS SDRAM.WE B7
H7 U4 /OE 1U 0.1u 100P NC21
10K
SDRAM.RAS FLASH.OE G7
10K
/SDR_CAS W2 /WE
10K
10K
10K
10K
NC22
10K
FLASH.RDY/GPIO10 B8
L4 NC25
FLASH.ADV H8
M7 1 TP310 NC26
FLASH.CS0/GPIO62
R481
B L8 B
M3 CS1_SRAM
R322
R316
R482
R483
NC27
R453
R351
FLASH.CS1/FLASH.CS1L G2
Y1 VSS1
FLASH.CS1U/GPIO16 /CODEC_RST J8 M8
FLASH.CS2/FLASH.BAA/FLASH.CS2L M4 CS2 VSS2 NC28
FLASH.CS2U/GPIO5 P3 PWB
FLASH.CS3/GPIO3 N8 /CS3_FLASH
FLASH.RP/FLASH.CS2UWE W1
1V8D N3
FLASH.CLK/FLASH.CS2UOE FLASH
RST_OUT/GPIO41 AA20 /RST_OUT
M8 BE1
FLASH.BE1/FLASH.CS2UWE/GPIO60 BE0
FLASH.BE0/FLASH.CS2UOE/GPIO59 L3
OMAP
3V3D 1V8D VFLASH
NC R281
0R R282
A A
DESIGNER: LHY
Title
<Title> MEMO
248
Size Document Number Rev
247
C <Doc> <RevCode>
5 4 3 2 1
5 4 3 2 1
19.2_OMAP 3V3A
1
R414 10
R419
+
C338 nc C336 C401
1000p 0.1u 10u/16V
TP309 C364 39p X302
2
CLK 4 1
TP377 VCC VT
L151 C337 R426
C375 C376 OSC 0
3 2
3
12p
1
OUT GND
12p L147 470n
X375 470n
1000p
1
C365 19.2MHz TCXO
SSP-T7-F C362 C363
R375 82p
82p 82p
4
0 R374
OSC32
1 0
AA13
V13
P13
W3
U302C
Y2
OMAP
1V6D
OSC32K_OUT
OSC1_OUT
OSC32K_IN
CLK32K_IN
OSC1_IN
Y13 VSS CVDD A15
3V3D CVDD M2
J374 R382 10K 1V6D 1V6D
R19 GPIO1 CVDD Y9
1 3V3D J20 MPU_BOOT CVDD Y20
2 GPIO13 R377 10K AA3
CVDD1 C382 C383 C384 C385 C379 C380 C381 C378
N19 GPIO13/LCD.BLUE0 CVDD2 A3
CON2 R378 10K A9 0.1u 0.1u 0.01u 100p 0.1u 0.1u 0.01u 100p
CVDD2
C 3V3D W19 BFAIL CVDD2 E2 C
TP374 1LOW-PWR R379 10K T20
R380 33 LOW_PWR
U20 MPU_RST CVDD3 B13
/PRST R12 PWRON_RESET CVDD3 B20 1V6D
C356 0.1u R381 33 J21
R383 1K CVDD3
V18 CONF CVDD3 R20
VOTG_DET W15 GPIO40/BCLKREQ 1V6A 1V6D
CVDDRTC W12
3V3D R385 10K R10 L913
GPIO23/MCLKREQ R386 10
CVDDDLL A11
RTC_ALARMB P12 C386 BLM18PG300SN1
VSS 0.1u MMBZ5V6ALT1G
TP375 CVDDA Y21
C339 100p TP376 3V3D_OMAP
MCLK BCLK D236
DVDD1 A19 R388 10
R387 33
1
V5 E21
1
1
VBUS_DEC W10 MPUIO11 DVDD4 B10
B14 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u MMBZ5V6ALT1G
DVDD4 100p + C402
W9 VFLASH 10uF/16V D234
RESET_BT/SYSTEM_SYNC GPIO25/MCSI2.DOUT
DVDD5 C2
2
JTAG DVDD5 H2
DVDD5 R1
/TRST Y18 3V3D_OMAP
TMS TRST
2 1 V17 TMS DVDD6 AA11 VFLASH
TDI 1V8D
4 3 Y19 TDI DVDD7 Y16
R391 6 5 L21
TDO DVDD8
10K 8 7 AA19 TDO DVDD9 U21 C400 C341
RTCK C398 C399 C335
10 9 Y17 RTCK DVDDRTC V12 0.1u 100p
TCK 0.1u 0.01u 100p MMBZ5V6ALT1G
12 11 W18 TCK
14 13 EMU0 V16 J1 D239
EMU1 EMU0 LDO.FILTER
W17 EMU1 C396
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1u
J375
R392 R393 R394 R395 R396
B B
10K 10K 10K 4.7K 4.7K
A13
A21
B1
B5
B7
B16
F20
G1
K2
K20
N1
R21
U2
W20
Y3
AA1
AA7
AA21
3V3D
C334
0.1u
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
249
248
C
Date:
<Doc>
5 4 3 2 1
5 4 3 2 1
TP326
100p C326
100p C342
C343
R323 R325 U302B
OMAP
10K 10K
100p
1
D 3V3D N15 MPUIO2/SPIF.CS1/UWIRE.CS1 LCD.P0 D18 D
U322 R357 33 T19 B21
R329 R330 98_PE 33 MPUIO4/SPIF.CS2/UWIRE.CS2/LED2 LCD.P1
0 1 14 33 R327 U19 C19
DVDD_IO SLC/SPC I2C_SCL 98_PC R324 33 MPUIO1/SPIF.SCK LCD.P2
2 13 W21 G14
R334 10K GND SDA/SDI/SDO I2C_SDA 98_PD R347 33 GPIO46/SPIF.DOUT/UWIRE.SDO LCD.P3
4 IADDR0 SDO 12 33 U18 GPIO47/SPIF.DIN/UWIRE.SDI LCD.P4 H13
C321 5 11 R332 C355 100p 98_DOUTB C358 100p V19 A20
GND RESERVED MAP_GPIO_6 MPUIO1/UWIRE.SCLK LCD.P5
0.1u 6 9 1 B19
AVDD INT2 TP321 100 LCD.P6
7 8 ACCEL_INT1 R346 M14 C18
NC1
NC2
CS INT1/DRDY PLL_LD 100 GPIO2 LCD.P7
PLL_CLK R337 M15 D17 R403 100
R335 10K 33 100 GPIO7/MCSI1.CLK LCD.P8/GPIO29 FL_Control
R336 PLL_STB R338 W8 D16 R404 100
GPIO9/MCSI1.SYNC LCD.P9/GPIO30 R406 100 LP_Control
NC MAP_GPIO_2 V15 C17
3
10
R339 100 GPIO56/MCSI1.DIN LCD.P10/GPIO31 R410 100 TX_VCO_H
PLL_DATA W14 GPIO18/MCSI1.DOUT LCD.P11/GPIO32 B17 TX_VCO_L
G13 R411 100
LCD.P12/GPIO33 RX_VCO_H
R14 A17
C346 100p
C344 100p
100p
C351 100p
C349 100p
100p
C354 100p
C352 100p
GPS_UART1_TXD GPIO38/UART1-IRSEL LCD.P13/GPIO34
Y14 UART1.TX/UART1.IRTX LCD.P14/GPIO35 C16
GPS_UART1_RXD V14 D15
GPIO37/UART1.RX/UART1.IRRX LCD.P15/GPIO2
AA15 B15
C345
C350
MMP_GPIO_0/PwrOn GPIO39/UART1-IRSHDN LCD.AC
LCD.HS C20
UART2_TXD V6 GPIO17/UART2.TX LCD.PCLK C15
R9 B18 3V3D
UART2_RXD GPIO18/UART2.RX LCD.VS R413 33
LCD.RED0/GPIO14 N21 RF_ATTEN
100p
3V3D 3V3D WAKE_BT/OPT_GPIO1 N14 GPIO45/UART3.TX/SPIF.CS0/MCBSP3.CLKX
CODEC_/SS P15 GPIO44/UART3.RX/SPIF.CS3/UWIRE.CS3
C353
R488 R511 R499
C322 12p T18
R340 10K
10K
R342 10K
R343 10K
I2C_SDA GPIO48/I2C.SDA KP.R4/MPUIO15 /CODEC_DAV
X321 KP.R3/MPUIO13 E20 ACCEL_INT1
33
R341
100p
100p
100p
MAP_GPIO_3 GPIO0/USB.VBUS KB.C3/GPIO63 KB_C3
NC W5 C21
MAP_GPIO_8 MPUIO5/MPUIO12 KB.C4/GPIO27
MAP_GPIO_7 V8 MPUIO3/MMC2.DAT1 KB.C5/GPIO28 G19 S/P_CLOCK
V9
C359
C360
C361
GPIO7/MCSI2.SYNC 33 R402
C
RST_CTRL V10 MPUIO10/MPUIO7 GPIO62/MCBSP1.CLKS G20 RX
C
V11 G21
C347 100p
MMP_GPIO_3/PTT GPIO57/MMC.CLK GPIO54/MCBSP1.CLKX CODEC_SSI_BCLK
TDMASLOT_OUT Y8 GPIO8/TRST GPIO53/MCBSP1.FSX H15 CODEC_SSI_WCLK
EXT_PTT AA9 GPIO26/MCSI2.DIN GPIO51/MCBSP1.DR H20 CODEC_SSI_DO
ACC_IO3 Y10 GPIO27 GPIO52/MCBSP1.DX H18 CODEC_SSI_DI
3V3D P11
IGN_SENSE GPIO55/MMC.CMD
1 2 R422 1K MPUIO6 W11 L19
MPUIO9/MPUIO6 CAM.D0/MPUIO12 SPK_SEL
D601 LED OPT_BRD_PTT P18 GPIO3/MCBSP3.FSX/LED1 CAM.D1/GPIO29 K14 UART3_RTS_BT
R11 K15 UART3_CTS_BT
TP4027
EMERGENCY GPIO58 CAM.D2/GPIO30
MMP_GPIO_4/HOOK R13 GPIO36/CLK32K_OUT/MPUIO0/UART1-TX CAM.D3/GPIO31 K19 UART3_RXD_BT
TP325 1 Y4 UART2.BCLK/SYS_CLK_IN CAM.D4/GPIO32 K18 UART3_TXD_BT
CAM.D5/UWIRE.SDI/GPIO33 J14 CODEC_MISO
MCBSP3_CLKX W16 GPIO42/MCBSP3.CLKX CAM.D6/UWIRE.CS3/GPIO34 J19 S/P_CSLED
MCBSP3_FSX N18 GPIO12/TIMER.EXTCLKMCBSP3.FSX CAM.D7/UWIRE.CS0/GPIO35 J18 S/P_CS2
MCBSP3_DR AA17 MCSI1.SYNC/MCBSP3.DR
P14 H19 R354 33
MCBSP3_DX GPIO43/MCSI1.CLK/MCBSP3.DX CAM.EXCLK/UWIRE.SDO/GPIO57 CODEC_MOSI
CAM.HS/GPIO38 L15 S/P_DATA
P19 J15 R355 33
S/P_CS1 GPIO6/MCSI1.DIN/TIMER.EVENT3 CAM.LCLK/UWIRE.SCLK/GPIO39 CODEC_SCLK
WAKE_HOST/OPT_GPIO2 P20 GPIO4/SPIF.DIN/TIMER.EVENT4 CAM.RSTZ/GPIO37 M19 ACC_IO1
L18 C357 100p
R358 10 CAM.VS/MPUIO14 AUDIO_PA_EN
USB_D- R8 USB.DM/I2C.SCL/UART1.TX/Z
USB_D+ P9 USB.DP/I2C.SDA/UART1.RX GPIO50/PWTTIMER.PWM0 M18 CODEC_PWT
R360 10 M20 R421 100
PUEN GPIO15/TIMER.PWM2 R376 33 RX_VCO_L
W4 L14
R361 15K
R362 15K
USB.PUEN GPIO49/PWL/TIMER.PWM1 TX
R401 1.5k GPIO11/HDQ N20 ACC_IO2
L1 NC2 GPIO7/UART2.RCV Y5 PWR_CTRL
E5 NC1
C348 100p
W321
ANTENNA
TP4038
TP4014
TP4026
B B
2 3
3V3D
1
U327
3V3D C329 0.1u
5Oohm䍄㒓 LOW_LEVEL_MUTE 1 16
QB VCC
PUB_ADDRESS_MIC_EN 2 QC QA 15
3V3D R363 0 R364 0 R367 33
3 14 S/P_DATA
TP4033
TP4034
R366 10K
+
TXB RF_IN L321 LOGIC IC 1 2
3 3 PPS GND 18
R349 33 GPS_UART1_RXD R368 33
2 4 TXA RF_OUT 17
R350 33 GPS_UART1_TXD R384 NC C330 3V3D
CON5 1 33
5 RXA BOOT 16 39nH+/-0.3nH
R370 21 GND GND 22
6 15 0.1u
GPIO[10] GPIO[13] R397 NC L322
GPS_UART1_RXD 7 GPIO[0] GPIO[15] 14
8 13 BLM18PG300SN1 3V3DP
GPIO[1] GPIO[14] R532 R531 R530
GPS_UART1_TXD 9 12 10K 10K 10K
RF_PWR VIN_3V3
10 ON_OFF V_RTC_3V3 11
1
100
0
3VRTC
2
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
250
249 Date: Tuesday, November 30, 2010 Sheet 5 of 14
5 4 3 2 1
5 4 3 2 1
R539 10K
R538 10K
R541 10K
R540 10K
R543 10K
C482 C481 C409 C410 C411 C412
C413 C414 C415 C416
100p 100p 100p 100p 100p 100p J400
22 21 100p 100p 100p 100p
R456 33 2 1 R423 33
I2C_SDA R457 33 R424 33 WAKE_HOST/OPT_GPIO2
I2C_SCL 4 3 WAKE_BT/OPT_GPIO1
MCBSP3_DR R425 33 6 5 R431 33
D RESET_BT/SYSTEM_SYNC D
MCBSP3_CLKX R412 33 8 7 R408 33 OPT_BRD_PTT R400 10K
MCBSP3_DX R430 33 10 9 R415 33 3V3D
MCBSP3_FSX R420 33 12 11 R416 33 UART3_TXD_BT
14 13 R409 33 UART3_RXD_BT 3
16 15 R432 33 UART3_CTS_BT
TXAF_DI
RXAF_DO 18 17 R433 33 UART3_RTS_BT 1 R460 1K
AUX_C
5VD R407 0 20 19
24 23
Q323
C480 C479 2 DTC114EE
C407 CON2X10
C417 C418 C477 C478
100p 100p
0.1u 100p 100p 100p 100p
3V3D
R461 10K
R462 10K
R463 10K
R464 10K
R465 10K
MAP_GPIO_8
MAP_GPIO_7
MAP_GPIO_3
MAP_GPIO_6
MAP_GPIO_2 3V3D
3
2
3V3D U328 PRGM_OUT8
PRGM_OUT7 EMERGENCY_IN
16 VCC QB 1 R439 100
R477 1K 15 2 PRGM_OUT3 IGN_SENSE
R474 33 QA QC PRGM_OUT6
C S/P_DATA 14 A QD 3 ALARM C
3V3D R475 nc 13 4
R473 33 OUT EN QE
S/P_CS2 12 LATCH CLK QF 5 ALARM 5VD 5VD
R467 33 11 6
S/P_CLOCK SHIFT CLK QG VBUS_EN R4964.7K 5VD 5VD 5VD EXT_SWB+
3V3D R466 10K 10 7 5VD
RESET QH
9 SQH GND 8
R446
NC
R472
LOGIC IC 5VD
4.7K
3 R471 R469
R443 10K 3
R447 10K R468 4.7K
R470 4.7K
3V3D 1 4.7K R449
1
2
R445 100 4.7K Q400
EXT_PTT
1
1.0V 1.5K
1
Q406 MUN5214DW1T1
Q407 MUN5214DW1T1
5VD Q405 R448 4.7K
Q409 MUN5214DW1T1
Q410 MUN5214DW1T1
1
Q408 MUN5214DW1T1
2 DTC114EE R1 R1 Q401
R2 R2
R1 R1 R1 2 DTC114EE
R437 4.7K R2 R2 R2 R450 2SA1362
1
2 3
2.7K
3
MUN5214DW1T1
1
R428 4.7K
R1 R2 R2
3V3D 1 R563 33k R2 R2 R2
R2 R1 R1 3
R1 R1 R1
Q404 Q402 1
R427 10K
6
R2 DTC114EE
6
Q411
R547470
R55933k
R1 R551 R546 470
R548 470
R558 33k
R549 470
R560 33k
470 2
R56133k
R562 R550
R557 100
33k
6
ACC_IO3 470
5VD D405
C434 C436
1
MMBZ20VALT1G
R435 4.7K
R2
R1 D233
MMBZ20VALT1G
B B
R556 100
6
D409
ACC_IO2
3V3D 5VD
R452 10K U401 USB_VBUS D404
C421
3 2 220p MMBZ33VALT1G
R451 10K FAULT GND MMBZ20VALT1G
VBUS_EN 4 ON
5 IN OUT 1
VBUS_DEC SMART SWITCH
PUB_ADDRESS2
RX_AUDIO
PUB_ADDRESS1 7.0V R455 100K
EXT_MIC
EXT_SPKR+ IGN_SENSE_IN
EXT_ALARM_OUT
EXT_SPKR-
PUB_ADDRESS1
PUB_ADDRESS2
EMERGENCY_IN
1 2 L417 BLM15AG121SN1
IGN_SENSE_IN
PRGM_IN_PTT
USB_D-
EXT_SWB+
PRGM_IO2
PRGM_IO3
PRGM_IO7
PRGM_IO8
CM2-2012MCIN-181T
R478 nc
UART3_TXD_BT D450
2
R480 nc
UART3_RXD_BT PRTR5V0U2X
GND I/O1
VCC I/O2
C476 C474 C426 C427 C428 C429 C430 C431 D240 D238
NC NC 100p 100p 100p 100p 100p 100p
MMBZ20VALT1G MMBZ6V8ALT1G
1
19
10
11
13
15
18
17
16
24
23
25
12
21
22
14
20
26
27
28
1
4
6
9
8
7
2
5
USB_D+
V_BUS
EXT_SWB+
EXT_SPKR+
PRGM_IN_4_EMERGENCY
PRGM_IN_PTT
PRGM_IN_5_IGN_SENSE
PRGM_OUT_9_EXT_ALARM
USB_D-
USB_GROUDN
ACC_MAP_ID_2
ACC_MAP_ID_3
AUX_AUDIO_OUT_1
PRGM_IO_6
AUX_AUDIO_OUT_2
TX_AUDIO
POWER GROUND
EXT_SPKR-
Audio Ground
RX_AUDIO
GROUND2
GROUND3
PRGM_IO_3_CHAN_ACT
PRGM_IO_7
PRGM_IO_8
GND1
GND2
PRGM_IO_2_MONITOR
5VD
R476 10k
A J403 A
MAP26
DESIGNER: LHY
Title
<Title>: peripheral
251
Size Document Number Rev
250 C
Date:
<Doc>
5 4 3 2 1
5 4 3 2 1
D D
C465
TP4015
100p
SPK+
TP4001
TP4002
TP4005
TP4006
TP4009
TP4010
TP4011
TP4041
TP4013
TP4017
TP4019
TP4020
TP4021
TP4022
TP4023
TP4024
TP4025
3V3D
C464
C460
C461
C462
100p C463
C470
C472
C473
TP4007
TP4008
C468 C439 C438 C441 C440 C435 C420 C419
USB_VBUS R494
NC
NC
NC
NC
NC
NC
100p 0.47u 0.47u 100p 100p 100p 100p 100p R555
0.1U
J404 NC 10k
1 INT_MIC_MMP INT_MIC
2 MIC_GND MIC_GROUND
3 ACC_IO1_MMP R554 1k ACC_IO1
4 USB_VBUS
5 HOOK_MMP HOOK
6 PTT_MMP PTT
7 USB_D- L414 BLM15AG121SN1 3 4 USB_D-
8 USB_D+ L415 BLM15AG121SN1 L413 1 CM2-2012MCIN-181T
2 USB_D+
C 9 Pwron_MMP Pwron C
10 UART2_RXD R534 10K
UART2_RXD
11 UART_TXD R535 10K UART2_TXD
12 SPKR1+ HANDSET_AUDIO
13 SPKR1- SPKR1+
14 HANDSET_AUDIO SPKR1-
15 5V 5VD TP4030
16 /RST_OUT R495 33 /RST_OUT
17 KB_C0 R498 33 KB_C0
18 KB_C1 R486 33 KB_C1
19 KB_C2 R491 33 KB_C2
20 KB_C3 R485 33 KB_C3
21 KB_R0 R523 33
KB_R0
22 KB_R1 R524 33
KB_R1
23 KB_R2 R525 33
KB_R2
24 S/P_CSLED R526 33 S/P_CSLED
25 S/P_CLOCK R527 33 S/P_CLOCK
26 S/P_DATA R533 33 S/P_DATA
27 /OE_LCD L411 BLM18PG300SN1 /OE_LCD
28 /WE_LCD L412 BLM18PG300SN1 /WE_LCD
29 CS2_LCD L410 BLM18PG300SN1 CS2_LCD
30 F_A1_LCD L407 BLM18PG300SN1 F_A1_LCD
31 F_D7_LCD L409 BLM18PG300SN1 F_D7_LCD
32 F_D6_LCD L408 BLM18PG300SN1 F_D6_LCD
33 F_D5_LCD L406 BLM18PG300SN1 F_D5_LCD
34 F_D4_LCD L405 BLM18PG300SN1 F_D4_LCD
35 F_D3_LCD L404 BLM18PG300SN1 F_D3_LCD
36 F_D2_LCD L403 BLM18PG300SN1 F_D2_LCD
37 F_D1_LCD L402 BLM18PG300SN1 F_D1_LCD
38 F_D0_LCD L401 BLM18PG300SN1 F_D0_LCD
39 GND
40 PWR_KEY PWB_IN
41
4
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
NC
NC
NC
42
C469
CONTROL HEAD 100p
C446
C444
C449
C451
C450
C448
C445
C447
C442
C443
C453
C454
C455
C456
C452
C457
C458
C459
C466
C467
D408 D407
TP4028
B B
3
TP4018
TP4055
GND
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
251
252 Size
C
Document Number
<Doc>
<RevCode>
Rev
5 4 3 2 1
5 4 3 2 1
2
U901
BLM41PG600SN1
C902 + D900 TP4035 RP102N331B 3V3DP
2
C903
470p/50V 1 5
VDD VOUT
L900
470uF/25V 2
MR2835SKG
2
D
C905 GND C906 D
B901 5VA 3 4
1
1u CE NC 1u
1
9V3 L904 U905
BLM18PG181SN1D XC6209F502PR C925 U903
1
L930 10uH 4 XC6209F182PR L901 1V8D
U902 D901 Vin Vout 5
1
3
BST C907
2
14 IN R924 1K 1u
1
2
3
0.1u 3 CE Nc 1
17 BP L902 3 CE Nc 1
16
CE
5 VOUT VDD
GND
LX7
RP102N331D
2
LX6 15
10uH C911
7 EN LX5 5
4 C960
LX4 D902 330p
U909
R911
4 NC
1
1
47uF/25V LX1 1 R912 L931
2.2u/25V 1 10 4.7uH 1V6D
VIN PGND
1
C947 0.1u 510 C951 C915 4.7uH
2
1
0.1u 4 7
22uF/10V
10uF/25V
0.1u 10uF/16V 0.1u 4.7K PG SYNC
2.2u/10V 9 R951 1.5K + C946 5 6 +
C917 C918 C919 C932
2
OS 1u FB LBI R917
10uF/16V 2.2u
11 R981 NC TPS62050 22p 330K 1% 10uF/16V
2
FB R918
C921 220p
10 6.04K 1%
GND
C928 C910
1
10u/16v 1000p
R952 + R906
PWR_ON 47k R908
1
24K
2
3
1 2 4.7K
D918 Q920 RX 1
C C
NC D45H8G 9V3 Q903
L940 L916 DTC114EE
BLM41PG600SN1
1 2 3 2 1 2
1
1
C980 2
C950 + + BLM41PG600SN1 +
C956 C957
0.1u D915 C955 C958
10uF/25V 10uF/25V 10uF/25V
1SS372 0.1u 0.1u
2
2
R958 U915 U918
1
3V3D
R953 XC6209F502PR 5VA_FGU XC6209F332PR 3V3A_FGU
680 R962 R964
4 Vin Vout 5 4 Vin Vout 5
10
1
R961 0 2.2K 1%
1u 2 C963 2 C965
6
R963 C952 0.01U R971 2.74K 1% Vss C926
+ Vss U910
330 0 R972 C962 2.2u
0.1u R932
VDD
2.2k 10uF/16V /PRST1
2
3 1 3 1 4.7K
CE Nc CE Nc 5 D913
2
2
3
R954 1K SENCE
1 2 1 /PRST
1
RSET
A-
A+
V-
3
A OUT
Q921 R965 0
+-
C937 MR MBRM120LT1G
A
GND
PZT2222AT1 U914 R982 100k 1000p 4
-+
CT
B- B
B OUT
NJM2904V
V+
C941
B+
3
TPS3808G33DBVT
2
D917 0.15u
3V3D
8
7
6
UDZSTE(175.1B)
1
R969
R966 3
47k
150
R970 1k 1 R950
3
10K
R968 2.2k
1 R948 R967
PWR_ON Q923 3 VOTG_DET
2 D910
DTC114EE 100 0
Q922 2 1 1
DTC114EE Q913 U906
2 R949 C945
UDZSTE(1715B)15V DTC114EE 1 8 D912
47K 470p MR WDO
R931 3V3D 2 VCC /RST 7 2 1
47K 2 3 6
B C978 GND WDI MBRM120LT1G B
U917 4 PFI PFO 5
0.1u R983 0
2 TPS3705-33D RST_CTRL
VDD R929 100
OUT 1
4
GND
R934 NC
5 NC1
47K
R3111N421A 3 R977
nc
Q905
R930
3 4 PWR_ON
PWR_CTRL_594 1 2 R984 220 15k C942 M7 M8 M9 M10 M11 M12 M13
D914 HVC131TRF-E 0.1u
PWR_CTRL R978 1K 1 2 R933 220 2
1
D909 HVC131TRF-E
2
2
C967 R957
U913 D904 1 5
0.1u R976
EDZTE613.6B
3VRTC
EDZTE613.6B
D235
LM317L(nc) RB521S30T1G(nc) 1K
D241
10K
1 2 1 2 3V3D
IN OUT1 UMC4N
OUT2 3 R975
2
6
1
NC1
NC2
OUT3 20K
ADJ
3
4
5
8
2 3 1 2
R941 Q1
1
+
R939 2SK1824 1 2 1 IGN_SENSE_IN
0.1u 4.7K 1 180k
1
R940 Q908
1
2
1k 22uF/16V
EMERGENCY_IN DTC114EE 3V3D
2
R956 R959
U912 22K D911
R979 2 180K 47k
ML414RF9AE ℸ໘㒓ᬍ HVC131TRF-E
10K
2
Q910
A A
MMBT3906LT1 D907 R945
1
Q909
F900 L917 EXT_SWB+ 2 3 1 2 10K
2SB1184
3 2 1 2
HVC131TRF-E R947
C969 3
LITTELFUSE04662 R942 PWB
C944 0.1u
4.7K 1K
R943
1
252
Size Document Number Rev
2
253 C
Date:
<Doc>
5 4 3 2 1
5 4 3 2 1
D D
5VA_FGU
L156
3.3UH R175
10
1
C82 C89
C1010 + C1009 1000p 0.1u
1000p 1u/16V
L8
2
3V3A_FGU
601SN1
2 1
L7
C80 601SN1 C83
0.01U 1 2 0.1u
1
L6
601SN1
C86 C121
0.1u 100p
2
PLLLD U100
R177
TP121 sky72310 R109 TP116 TP118 TP120
10K C93 10 PLLDATA PLLSTB PLLCLK
100p 1 24
R181 VCCecl/cml Mux_out
1
Fin 2 Fvco_main NC23 23
1K
1
C PLL_LD 3 C
Fvco_main R167 33
C90 Clock 22 PLL_CLK
1
C95 100p 4 LD/PS_main CS 21 PLL_STB
5 20 R178 33 PLL_DATA
0.01u D100 VCCcp_main Data
6 R1110 33
BA277 CPout_main
VCCdigital 19 C1320 C77 C76
R171 R187 C1002 7 NC7 NC18 18 100p 100p 100p
2
0 82 1000p 8 17
Xtalacgnd/OSC NC17
PowerPAD
TP124 CV 9 16
C124 C132 Xtalin/OSC NC16
CV C122 C1017 C1016 10 15
nc 0.1uf R111 C123 0.1uF Xtalout/NC NC15
R180 NC 0.1uF 11 VCCxtal NC14 14 C98
100 0.1uF
10k 12 GNDXtal NC13 13 0.1u
C97 C96
1
25
C87 FSA66P5X
0.1u
5 Vcc Vin 1
OUT 2
FL_Control 4 ON/OFF GND 3
R183 C75 R3 R6 R182 R114
1K 1000P 0 0 nc 56 L149
NC
19.2_AD9864 3V3A_FGU
R5 R4
5VA_FGU C65 100
0 U102 NC
FSA66P5X R188
1
0
5 1 L150 C85 C1013
Vcc Vin +
R168 2 NC 0.1u 10u/16V
NC OUT 19.2_OMAP
LP_control 4 ON/OFF GND 3 TP119
2
C79 C81 R166 MOD_L
1000P C1004 NC NC
TP110 33P R174 R2
X100
REF
1
0 0
4 VCC VCONT 1 MOD_L_RFCS
1
3 2
L154 OUT GND R184
5VA_FGU 4V3A C1000 0.56u C99 DSA535SD NC
220p 270p
B REF OSC B
C1006
1
NC NC C1005 C78 C94 C1007 C91 C88 C70 C74 C84 C72 C67 C69 C68 C66 C64 C103 C105 C104
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U nc nc nc
2
C1001 + C71
470p 1u/16V
2
A A
DESIGNER: ZDW
Title
<Title> PLL
254
253 Size
C
Document Number
<Doc>
<RevCode>
Rev
5 4 3 2 1
5 4 3 2 1
3
D101 C198 C196
3.6p 7p
1SV305
21 2
Q100
C13 C27 C193 2SC5010
L108 D116
0.5p
1
470nH 1SV305 3.6p C26 33p C185 R185
21 3.6p 56p 5VA_FGU nc
L105 Q117
8n TX
EMD22
C184 D127
220p D111 4V3A 3 4 DAN222
L106 R157 Q105
1SV305 L107 EMD22
2 2 27n 2 1 5 1
D102 470n 601SN1 TX_VCO_H
D117 C191 3 4 2 3
1SV305
1SV305 18p 2 TX_VCO_L
5
1
4V3A 2 TX_VCO_L 6 1
R139
C136 82
2
4.7u R128 R117 6 1
82K 39K L131
601SN1
R149 R147
C145 C143 NC 100
C144 R120
1
NC NC 39K NC
220p
R163 R164 R146
2
C147 C199 C1 C101 C2
C163 NC NC 100 L132 3P TP111
R151 1.5P
MOD_H 0.1u L148 0.01U 1000p 27NH TX_LO
R131 15k
1
NC
3.3k
TP108 L4 C107 C11 L2 L136
C8
1
MOD_H C40 C41 R191 nc 4P 15NH 15NH
1
470n 470p nc
C37 C38 NC NC R152 L135 TX_LO
36K
3
C186 R140 NC NC 27NH C14
220p C106 C17
C141 C142 100 R173 nc 10p 12P C16
R138 nc 1 C15 TP114
470p Q107 6P GND
3
0.1u 8.2k U105 10p
C C166 C34 C35 C39 R141 PBR941 C
L110 5p R122 100P 1 8 NC
470n 27 NC Vcc1 Vcc2 47
1
2 7 1 Q102
2
C181 IN OUT C19 R155
3 IN SW2 6 2SC5108Y L138
3
0.5p 4 5 NC 20k
D105 C152 C151 GND SW1 R150 R162 27nH
9p C36 C21 R156
1SV305 4p R129 R135 L168 NC NC 470P 68
2
21 2 220 27NH NC NC R161
220 18K
Q103
C159 2SC5010
L112 D112 C153 C157
1
R137
82
Q108
R179 EMD22 4V3A
601SN1
3 4
CV C29
C30 5
R158 0.1u
6.8k L117 220p 2 RX_VCO_H C178 C179
470n 2P 1P
C46 6 1
R160
220p
C7 100
C6 L128 L122 L123
0.1u R159 15NH
220p 15n 15NH
7.5k Fin
L121 C32
5p
470n C190 C192
C189 NC
12P NC
3
R144
120
2
L9
R154 601SN1
R190
NC 100
1
C150 C167
R169 R165 R148
220p 0.1u
2
1
C43 C45 15k 6P 18NH 220p
1
3
C52 1.5P NC NC R199 27NH C20 C59
220p R196 TP122
100 120K 10p 12P
C149 C148 C61 C22 GND
R194 1 8P
0.1u 470p Q109
3
7.5k U107 12p
C33 C48 C47 PBR941
L134 C168 R123
1
5p 100P NC 1 8 NC R1
470n 27 Vcc1 Vcc2 47
2 7 1 Q111 C54
2
IN OUT L166 R195
3 IN SW2 6 2SC5108Y
3
C155 NC 20k
D109 C164 C51 4 GND SW1 5
R170 R172 27nH R197
5p 12p R136 L167 C57
1SV305 R130 NC 0
2
21 NC NC NC
A 2 220 220 27NH NC R189 A
NC
Q110
C165 2SC5010
L133 D125 C154 C161
4p
1
<Title> VCO
254
255
R192
120 Size Document Number Rev
Custom<Doc>
<RevCode>
Date: Wednesday, May 11, 2011 Sheet 10 of 14
5 4 3 2 1
5 4 3 2 1
D D
TP703
TP702 IF
GND
1
1
TP704
C701
330n C703 2FLO
0.01u
3P
TP701 IF-out
1
L716
C743
TEST POINT
47p
C702
1
0.01u
L701 L702 601S
1 2
1 2
L703 C742
R724 0 C704
1 601S 2 C705 1u
0.1u 220P
R701 C706 9V3A
51 601S
470p
C707 TP709
2
R703 L717
0.1u 5VA_RX
2.2k 5VA_RX L706
C709
C708 601S
0.1u C710 1000p C718 C717
0.1u TP705 Q702 U703
1
L704 L705 C711 6.8uH
R704 CV2 1u 470p 2SC4617 POWER IC
10u 10u C712 NC C713
1
0.1u 560 3900p 1 3 5 Vout Vin 4
48
47
46
45
44
43
42
41
40
39
38
37
C716
1
R727
1
R708 Vss 2 C752
47k 10u/16v +
VDDI
GNDI
LOP
VDDP
GNDP
CXIF
CXVM
CXVL
VDDL
IOUTL
IFIN
LON
C715 R709 4.7k C746
180p 0.47u R707
2
10k 470p
180 1 3
2
Nc CE
1 MXOP GNDL 36 Q701
1
C C
C720 0.1u
3
2 MXON FREF 35 C723 C724 TRANSISTOR C725
3 34 + C726 R728
C721 GNDF GNDS R705 10K 15p 18p 10u/16v C727
C722 4 33 47k
L707 100p IF2N SYNCB 2 0.01u 470p
100p 5 32
601S
2
IF2P GNDH R711 33
U701 3198_FS1
1
1 2 C728 6 VDDF FS 98_FS C731 C730
1000p 7 GCP DOUTB 3098_DOUTB1 R717 33 6p L708 22p C732 3V3D
C729 IF IC 2998_DOUTA1 98_DOUTA 3V3D_RX
1
8 GCN DOUTA D701 220n(HQ) R710 22p TP710
0.1u 9 2898_CLKOUT1 R715 33 98_CLKOUT HVC350B 8.2k
10
VDDA CLKOUT
27 1 2 3V3D_RX 3V3A_RX 3V3A_RX U702
GNDA VDDH R730 R726 POWER IC
2
11 VREFP VDDD 26 C719 C735 C734 R712 NC NC
2
L709
1
C736 12 VREFN PE 25 30p 2 1 5 VOUT VDD 1
L711 1u 601S 270
1 2 49 2
IOUTC
0.1u L712
GNDQ
PowerPAD GND
GNDC
GNDD
GNDS
VDDQ
VDDC
RREF
CLKN
CLKP
601S C737 4 3
L710 601S NC CE
0.1u
PC
PD
601S L718
100k
470n
C749
1 2 39P
1
TP707 L713
18M 0.56u
C747 22P C751 10p C714
L715 3.3u
10p
1
C744 98_FS1
0.1uF R716 5.6k C745 98_DOUTB1 R725 33
98_DOUTB
56p 98_DOUTA1
1
98_CLKOUT1
C748 98_PE1
0.1u R718 98_PD1
510 D702 98_PC1
HVC376B
2
A A
DESIGNER YYF
Title
<Title> IF
256
255
C
Date:
<Doc>
14
5 4 3 2 1
5 4 3 2 1
2 1
C909 C889 C913 C888 C825 C885 L801
C855 47pF 470p BLM41PG600SN1 W801
1
100p 3300p 0.018uF
33p
33pF 2 1 C916 C930 C931 C940 C943 ANTENNA
C801 C802 C803 + C804
L803 47u/25V 3300p 0.018uF 33p 33p 3300p
R812 Gate_1
D L804 BLM41PG600SN1 1000p 3300p 33pF TP801 D
NC
2
3T/16nH 1 4
R807 C820 2 3
C833
C810 4.7 12pF
1
C815 4pF
47pF C821 C816
W= 3mm 220pF R804
5
NC 2p Directional Couple
4.7
1
L= 5.5mm
w=3mm,
C8330 C841 L807 C817
M801
L=5.5mm R806 Q802 3
Z= 8ohm
Z=8 4.7 MOSFET
22pF 8pF
C823 C824 C856 C876 C879
100nH 470pF
C827 Fcouple 4 4
2 L809 L813 L810
10pF NC 8pF NC NC 470p
L808 3T/16nH 3T/16nH 3T/16nH
C893 1 2 1 2
R813
33
0 470pF Pin Pout
4.7
2 D801 R815
C832 C834 C870 C874 C835 C836 C837 C830 C838 L828 C884
Q803 MA4P1250 5 6
R818 C842 C831 NC NC NC NC 2pF 2p 5p 5p 3p 5 Rcouple 27k 1uH NC
C839 MOSFET
4.7 22pF 4pF
220pF L833 R848
C840 L816
1
R860 47pF NC
47pF 11T/113nH L832 R840
NC L817
C819 C873 C882 10nH NC
C812 C848 C847
R861 8pF NC NC
1
12pF C850 3T/16nH 150p 150p
4.7
470p R816 R817
Gate_2 C851 D802 C852
220 220
3p MA4P1250 100p R819 R820
C846 82 NC
D804
33pF R821 C858
2
RX_in RB706F
L815 33 NC
BLM18AG601SN1 2
C860 C828 R825 C861
2 1 C862 3
NC NC 33 68pF
1.5p 1 C891
R823
C849 120p
100
NC
C857 R852 R853
L829 L830 TP809 22pF 470 470
0 0
TP806
Gate_2 M6 M5 M1 M2 M3 M4
Final_bias R859
1
Final_bias D803
1
RB706F
1k R856
C892 R822
1
C 51 2 C
220p Gate_1 0 3
GND TP807
1 C899
C869 APC
R855 120p
15pF RT803 R871
C886 C887 R858 51 9V3A R850
TP808 NC t NC R851
NC 220p 9.1k 1 2 NC
9V3A TV_APC
1
NC
1 R900 R834 R836
1
R832 R833
R841 NC NC
R847 NC NC
L802 33k
NC 47K
BLM41PG600SN1 Q810 L821
TRANSISTOR BLM18AG601SN1
2
3 2 2 1 APC_COMP
C859
U801
15pF
C854 C853 C807 C868
1
IN+
L819 0.1u 220p 10u/25V C829 C845 0.1u R873 5 VEE 4 R837 R838
W= 3mm w=3mm,
8T/47n 0.1uF 220p
L822 R831
NC C894 0 33k
1
+-
L=3mm L820 BLM18AG601SN1 10k R839 R870 6 3
L= 3mm Z=8 1uH
R877
VGG 3.3K 10K
0.1uf IN- IN+
R881 47K
Z= 8 ohm 4.7K 7 2
2
OUT + IN- -
L827 TX 3 R880 R842 C875
3
2
39nH 4.7K 8 VCC
OUT 1 12k 150P
R826 C866 C864 1 C904
C867 R830 R896 R857
1 0 L823 18pF Q811 NC
NC 47 NC D805 OPAMP 0
1 C863 TRANSISTOR
C809 UDZS5.1B
Q804 0
4700pF 220p 2
MOSFET
1
R828 R827 R866
2
C871
3
B C822 B
C813 R805 R809
IN+
C814 220p 5 VEE 4 R863
C880 C844 NC NC 82 NC
18p R882 0
1
C881 0.047uF NC 2 TX_LO
+-
C878 R845 C877 R846 R893 150k 6 IN- IN+ 3
NC R844 R843 R808
220p 20K 220p 10K C818 R865
10k 5.6K Q801 10 7 2
R811 15p OUT + IN- -
TRANSISTOR L811 R814 R810 R892
4
3
0 8 VCC
OUT 1
220p
C811 R862
L824 L825
470p 56 R872 1k
BLM18AG601SN1 BLM18AG601SN1
TP812 180k
2
1
VGG TP811 NC 1K 3
9V3A TEMP_DET2
1
driver 2
3 3 R875 R886
R904 33K DAN222 R888 R884
1 1 220k
0 18k TP810
NC
REV_TEMP_DET TEMP
R867
R889 R891 R885 L806
Q812 Q813 8.2k
2 2 DTC114EE TEMP_DET NC 0 10k 1uH
DTC114EE 2 1
SW1
11
PAD SW D129
R905 MA2S077 C896
C898 R890 220p R883
33K
220p 3.3k 56k
RT804
t
100k
2
R868
NC
R876
C897
C954 R897 56k
220p
NC 470k
U804
TV_APC
A R864 OPAMP A
IN+
470k 5 VEE 4
+-
REV_TEMP_DET 6 IN- IN+ 3
R898
470k 7 OUT + IN- - 2
R899
470k 8 VCC
OUT 1
256
257
18k C <Doc>
<RevCode>
Date: Wednesday, December 08, 2010 Sheet 14 of 14
5 4 3 2 1
2 1
MD78X/MD78XG Schematic Diagram
(Front Panel)
5VD
M1 M2 M3 M4
3V3A TP1 TP10TP11TP4 TP5 TP12TP13TP2 TP6 TP3 TP7 TP14TP15TP8 TP16TP9 TP17
1
5VD 5VD
1
TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP TP D3
BLM18PG300SN1
5VD 5VD 5VD MMBZ6V8ALT1G
L2
C2
KPT-1608SGC
D4
100pf
1
KPT-1608SGC
KPT-1608SGC
D2
UP MENU C1 C3
D1 R4 R3 R2 R5
100pf 0.1uf
3
DOWN 56 56 56 56 R6
B3
B2
B1
U2
EMI FILTER
42
P4 10K J1
12
12
12
U1
16
C1 A1
GND3
GND2
GND1
A Y1 X1 UART2_RXD
LOGIC IC C2 A2 PRST
GND2
KPT-1608SGC
D7
B UART2_TXD
D6
D5 p1 BACK Y2 X2
15 11 C3 A3 CLOCK 25
VCC
KPT-1608SGC
KPT-1608SGC
Q0 SHCP Y3 X3 S/P_CLOCK
4
p3 p2 D8 D9 1 12 C4 A4 CSLED 24
Q1 STCP Y4 X4 U3 DATA S/P_CSLED
2 10 C5 A5 26
B 2 KAA-3528RG KAA-3528RG Q2 SHR Y5 X5 EMI FILTER CS2_LCD S/P_DATA
B
2
2
3 Q3 STR 13 PRST C6 Y6 X6 A6 29 CS2_LCD
1
4 C1 A1 F_A1_LCD 30
Q4 C4 D10 Y1 X1 WE_LCD F_A1_LCD
5 C2 A2 28
3
R1 Q5 0.1uf Y2 X2 OE_LCD WE_LCD
R7 R8 6 Q6 DS 14 MMBZ5V6ALT1G C3 Y3 X3 A3 27 OE_LCD
33 J2 R9 33 F_D0
7 C4 A4 38
GND
33 33 Q7 Y4 X4 F_D0_LCD
4
17 18
GND1
GND2
GND3
D11 D12 9 DB7 DB8 C5 A5 F_D1 37
Q7S 16 19 Y5 X5 F_D2 F_D1_LCD
DB6 DB9 C6 A6 36
3
KAA-3528RG KAA-3528RG 15 20 Y6 X6 F_D3 F_D2_LCD
DB5 DB10 U4 35
8
14 21 F_D4 F_D3_LCD
DB4 DB11 EMI FILTER 34
B1
B2
B3
13 22 F_D5 F_D4_LCD
R10 33 DB3 DB12 33
3
12 23 C1 A1 F_D6 F_D5_LCD
DB2 DB13 Y1 X1 32 F_D6_LCD
3
11 DB1 DB14 24 C2 Y2 X2 A2 F_D7
3 1V8A 31 F_D7_LCD
Q1 10 DB0 DB15 25 C3 Y3 X3 A3 R11 33 PRST
R12 33 16 PRST
9 RD DB16 26 C4 Y4 X4 A4
2 10
GND1
GND2
GND3
8 27 C5 A5 UART2_RXD UART2_RXD
2 Q2 WR DB17 Y5 X5 UART2_TXD 11
R13 7 28 C6 A6 R14 NC(47) UART2_TXD
DTC114EE 3 RS RESET 3V3A Y6 X6 39
6 29 1V8A GND
2SK1824 CS IM3 R15 0 15
1
B1
B2
B3
RED 2 3V3A R18 0 FLM IM0 14
Q3 4 IOVCC LED_A 31 R19 0 C5 SPKR1-
R20 10 100p 13 SPKR1+
DTC114EE 3 VCI2 LED_K1 32 PWB_IN
R21 10 C7 40 PWB_IN
2 VCI1 LED_K2 33 C8
C6 R22 10 17 KB_C0
1 C9 1 GND LED_K3 34
100p 0.1uf 100p 18 KB_C1
0.1uf 36 GND2 GND1 35
C10 C11 C12 19 KB_C2
3
20 KB_C3
FPC CONNECTER 100p 100p 100p 21
Q4 KB_R0
22 KB_R1
U5 23 KB_R2
5VD 2 2SK1824 ACC_IO1
POWER IC 3V3A 3 ACC_IO1
L1 PTT 6
4 5 R23 0 PTT_MMP
HANDSET_AUDIO
1
Vin Vout 12
USB_D- HANDSET_AUDIO
BLM18PG300SN1 7
2 C14 MIC_GROUND USB_D-
Vss TP18TP19 2 MIC_GROUND
3
C13 1uf TP TP USB_VBUS 4
1uf D13 INT_MIC USB_VBUS
1 INT_MIC
3 CE Nc 1 USB_D+
MMBZ20VALT1G 8 USB_D+
HOOK 5 HOOK_MMP
GND1
ACC_IO2 9
TP20 TP21TP22TP23 TP24 ACC_IO2
2
C15 C16 CON40_MAIN
5VD U6
POWER IC 1V8A 0.01uf
0.01uf
41
L3 R24 NC S1 TP TP TP TP TP J3
4 Vin Vout 5
SKQMBBE010 SPKR
NC(BLM18PG300SN1) SPKR1-
2 Vss C18 1 2 SPKR- 2
1 SPKR1+
C17 nc(1uf) SPKR+
1uf
3 1 C19 470PF
CE Nc
KB_C0
KB_C1
A1 KB_C2
ANTENNA
3V3A TP25 TP26
C20 KB_C3
470pf KB_R0
1 2 C21
10K 10K
KB_R1
R25 R26 TP TP 470pf C22
S2 S3 S4 S5 S6 KB_R2
3
C B B TP29
R29 0 TP27
0 S8 S9 S10 S11 S12 TP
E27 C23 C24 PF1 PF1 PF1 PF1 PF1 TP
6
7
W1 TP28
R30 0 0.1uf 0.1uf 1 2 1 2 1 2 1 2 1 2
TP
FIXER P5 p2 p1 DOWN P4
C28 C29 C30
C25 C26 C27
NC NC 470pf 470pf 470pf
470pf
3
3
D14 D15 D16
D17 D18 D19 D20
MMBZ5V6ALT1G MMBZ5V6ALT1G MMBZ5V6ALT1G
MMBZ5V6ALT1G MMBZ5V6ALT1G MMBZ20VALT1G MMBZ5V6ALT1G
3V3A
1
2
A R31
0
C31
470PF
C32
470pf
C33
470pf
C34
470pf
C35 C36
470pf 470pf
C37
470pf A
R36 R35 R34 R33 J4
ACC_I00 1
10K 10K 10K 10K 2
PTT
HANDSET_AUDIO 3
CS2_LCD 4
USB_D-
MIC_GROUND 5
F_A1_LCD 6
USB_VBUS
INT_MIC 7
WE_LCD 8
USB_D+
HOOK 9
OE_LCD 10
ACC_IO1
5VD
U8
2
CON10_MMP R32
10k 4 2 D21 TP30TP31TP32TP33TP34TP35TP36TP37TP38TP39
VCC IO1
MMBZ6V8ALT1G
1 GND IO2 3
PRTR5V0U2X
3
TP TP TP TP TP TP TP TP TP TP
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Transmitter Circuit
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FGU
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used to amplify the VCO signal to the desired output power level, while the latter can keep the output
power at the desired level, so as to protect the power amplifier from damage caused by over heat,
antenna mismatch, and out-of-range voltage (over voltage or under voltage may result in damage to
first stage is a buffer amplifier circuit with fixed gain; the second stage is a pre-driver power amplifier
circuit with variable gain (formed by Q805); the third stage is a driver power amplifier circuit with variable
gain (formed by Q804); and the final stage is the final power amplifier circuit with fixed gain (formed by
Q802 and Q803). In addition, this power amplifier contains a TX/RX switch and a low-pass filter.
Note: only a final power amplifier (Q803) is available in later versions (including version H).
bias current of 28mA (for Q801). Power supply for the switching transistor Q810 is controlled by TX
signal (enabled by antenna switch) so as to further control the power supply for the whole circuit.
input matching circuit is composed of C826, L826, L814, C843 and R824.
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maximum output power is 38.5dBm, and the maximum variable gain is 11dB.
the maximum variable gain of 10dB. The input matching circuit is composed of C815, C839, R804, R806,
R807, R813, R818 and R861, while the power combining circuit is composed of C820, C8330, C831,
In TX mode, the switching transistor Q810 is controlled by TX signal, so as to supply 9V 3A to the PIN
diodes D801 and D802. Quiescent bias current of the PIN diode is controlled by the resistors R821 and
R825. In this mode, D801 and D802 are turned on; RF signals are applied to the low-pass filter
(composed of C871, C816, C836, C837, C838, L809, L813, and L810) and then transmitted via the
antenna port.
In RX mode, TX signal controls the switching transistor Q810, to further control the power supply for the
PIN diodes D801 and D802, which are not applied with DC bias current. When the two PIN diodes are
turned off, signals feed into the RX path through the low-pass filter (composed of L871, C852 and C862).
both forward and reverse directed power of the transmitter. The forward power is coupled to the diode
D803, and the voltage is applied to the power control circuit (U801). Then the voltage VGG is output to
control the gate voltage of pre-driver and driver PA, ensuring a constant power output.
The directional coupler can adjust the TX power and detect the VSWR load. The reverse power is
coupled to D804. The voltage is applied to U802 and then feeds into U302 for detection
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voltage that can represent the forward power. The voltage together with the preset voltage feeds to U801
to output a voltage VGG, which can control both gate voltage and gain of Q804 and Q805, ensuring a
detected temperature. Both the voltage used for temperature detection and the threshold voltage are fed
into the operational amplifier U803, to output a voltage signal that is in proportion to the detected
temperature. Afterwards, the voltage is applied to software for judgment, and then the preset voltage will
be subsequently changed to reduce the TX power, and to protect the PA from over-heating.
rubber part mounted on the top cover. If the switch is turned off, VGG will become low, and no power will
second IF is 2.25MHz. The first local oscillator signal is from the PLL circuit U100, and the second LO
signal (71.1MHz) is generated by the PLL circuit U701. The major units are BPF, LNA, mixer, IF filter, IF
electrically tunable band-pass filter to get useful signals. After passing through the RF band-pass filter
and LNA (Q6102), the RF signals together with the first LO signal feed to the mixer for the first frequency
conversion, to generate the first IF signal (73.35MHz). The mixer that employs the passive diode can
ensure good dynamic range and port isolation. The LO signal (3-5dBm) from the VCO feeds to Q6103
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to get a gain (17dB). The first LO signals (73.35MHz) pass through the crystal filter (Z6100) to remove
out-of-band spurious signals, and then feed to the two-stage IF amplifier circuit (composed of Q6133 and
Q6134) for amplification. Finally the amplified signals go to the IF IC for processing
The first IF signal (73.35MHz) output by the IF amplifier goes into IF IC via Pin 47, where the signal is
converted to the second IF signal (2.25MHz). Then the un-demodulated digital I/Q signal output from the
SSI interface is sent to U302 for demodulation. IF IC employs a reference frequency of 19.2MHz and
shares the crystal with U302. The second LO VCO consists of the external transistor, varactor and some
other components, to provide the second LO signal. The 18MHz clock frequency is generated by the LC
DSP (U302) gets the audio signal from IF IC (U701). Then this signal goes through U302 to output data
signal, which is sent to U231 and PIN44 (SSI_DI) for digital-to-analog conversion. Finally, the output
analog audio signal will be subjected to gain control, and then fed to the speaker.
to supply excitation signal source to the transmitter, and local oscillator signal to the receiver.
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15.3.3 PLL IC
The PLL IC (U100) is a fractional frequency divider. The logic IC U101 and U102 work with the PLL IC
The 19.2MHz frequency generated by the reference oscillator goes into the PLL IC for division,
generating the reference frequency. Meanwhile, the frequency generated by VCO goes into PLL IC
(U100) for frequency division. The resulting frequency will be compared with the reference frequency in
terms of phase difference in the phase detector. After comparison, the resulting frequency is converted
to CV voltage via the loop filter, to control and lock the frequency.
15.3.4 VCO
The VCO is composed of transistors (Q100, Q103, Q106 and Q110), varactors and four Colpitts
oscillators. There are four VCOs in all: two VCOs (Q100 and Q103) used to transmit excitation signals
and the other two VCOs (Q106 and Q110) to receive LO signals. U302 controls the operating frequency
of the VCO. Q102 and Q107 constitute the buffer amplifiers for the transmitter circuit, while Q111 and
Q109 for the receiver circuit. The digital-to-analog converter (U500) modulates the TX oscillator signal.
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TX_L_VCO MOD
Q103
TX PA
Q107 Q102
Q100
TX_H_VCO
RX_L_VCO
Q110
RX Lo
Q109 Q111
Q106
RX_H_VCO
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15.4 PCB View
MD78X/MD78XG PCB View (Front Panel)
Top Layer
305
307
MD78X/MD78XG PCB View (Front Panel)
Bottom Layer
308
306
MD78X/MD78XG PCB View (Main Board)
Top Layer
309
307
MD78X/MD78XG PCB View (Main Board)
Bottom Layer
310
308
15.5 Block Diagram
Q804\Q805
9V3A 9V1A
Q920\Q921\U914 Q801 Q801
Q6102
9V1A
Q902 Q6103
U6000
U703
Q6105
5VA U701
U702
U701
U915
4V3A
Q104 Q100\Q103\Q106\Q110
5VA
U100
U918 3V3A
X100
5VA
ON\OFF KEY PWB U905 U500
IGN_SENCE
EMERGENCY 3V3A U231
U909
X302
U302
1V6D
U401 USB
U919
Control Head
U231
1V8D
U903 U232
U302
3VRTC U323
U912
U326
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309
MD78X/MD78XG Block Diagram (RF Section)
High
Temperature
Protection
9V1A_TX
B+ ADC
TXC ANT
Gain:10 dB
Gain:15 dB Gain:11dB
Tx/Rx
Gain:-6 dB Gain:16 dB Switch
Tx_PORT
Microstrip
Attenuator Match Match Match
Matcher Microstrip Dual
Q805 Q804 Harmonic
Q801 Driver Rx_PORT Filter Directional Coupler
PreDriver
Firststage Switchÿs Power
9.1V
Q802ǃQ803 Forward Reflect
Finalstage Detector Detector
RX
Alarm to ADC
B+ VSWR Protection
Final_Bias
Temperature
compensation TV_APC
TX_L_VCO
MOD H TV_APC
TX_VCO_L U500
Q103 MOD L DAC Final_Bias
TX LO:3dBm
Q107 Q102
TX_VCO_H
TX_H_VCO Q100 X100
19.2MHZ
CLK
MCSI
C STB
SPI
LPF PLL U100
DATA
LD
RX_VCO_H
RX_H_VCO Q106
C
VCO_Feed
back LPF
LPF
X100
1 2 19.2MHZ
Q6103
Attenuator
3dB
1
Attenuator
1dB Attenuator Control
10dB
2
U701 Q6104
Z6100 Q6102
IF IC Q6105
Mixer
IF Filter D6106
IF Processor TV
312310
MD78X/MD78XG Block Diagram (BB Section)
PLL IF processor DAC
RF Unit
BB Schematic Block Diagram SPI SSI SSI TXǃRX CTL
PowerǃIO CTL
McBSP2_TX
McBSP2 RX
SPI(CS1 )
SPI(CS2)
AUX MCSI1 SPI McBSP2 GPIOs
TEMP_DET ADC
Audio Codec
EMIFS
Headset Nor FLASH and pSRAM
Driver IIS McBSP1 DSP datax16 FLASH: 8Mx16
TMS320C55x pSRAM:2Mx16
MCLK
Mic CP
AMP Driver SPI BELL
EMIFF
Speed:96MHz(max)
Mobile SDRAM
McBSP3 datax16
128Mb:8Mx16
JTAG JTAG
TXAF_DI
MCLK19.2MHz OMAP5912
19.2MHz 19.2MHz
RXAF_DO CLK AD9864
32KHz TCXO
PWM0/
PWT
CS3
uWire
RTC 32.768KHz
20ppm
IIC
UART3 MPU
IIC
IIC
LTR/OPTION GPIOs
ARM926EJ-S Accelero
meter
BOARD/BLUETOOTH
Audio PA
IIC
EMERGENCY
UART1 GPS
IGN_SENSE
UART2 IGN_SENSE
KEY GPIOs EMERGENCY
USB1 GPIOs
Trax or GPIO PWB User Program
PRGM IO out
EMERGENCY
IGN_SENSE
CLK/DATA/CS
AUX Audio DC Supply 74hc595
PRGM GPIOS
GPIO 74hc595
USB Expand
Rear
ACC_ID GPIO
Accessory(MAP) PRGM UART or
USB TX_RX Keytrax
GPIOs light/LED/LCD
IO Expand LED 3X4 Volume
ACC_ID backlight
MMP
MIC TFT LCD datax8 EMIFS
SPKr
Control Head
313
311
5 4 3 2 1
TP4012
TP4016
(Audio Circuit)
R245 1R
EXT_SPKR+
R253 1R
D EXT_SPKR- D
R293 1R
SPKR1+
CODEC_SSI_WCLK
CODEC_SSI_BCLK
R294 1R
CODEC_SSI_DO
SPKR1-
CODEC_SSI_DI
CODEC_MOSI
CODEC_SCLK
CODEC_MISO
/CODEC_DAV
CODEC_/SS
CODEC_CLK
L232
9V3 BLM18PG300SN1 9d3V
B+
C232
C233
1
0.1u C285 C284
0.1u C234 +
C235
19
16
15
11
20
10
13
10uF/25V
2
5
1
0.01u 0.1u 47uF/25V
U201
OUT1+
OUT2+
OUT1-
OUT2-
VCC
VCC
GND
GND
GND
GND
SGND
TP232 1
AUDIO PA
TP233 1
TP234 1
TP235 1
1
MUTE
STBY
1V8D TP236
NC1
NC2
NC3
NC4
NC5
IN2-
SPK_SEL
IN1
R288 47K C268 0.47u R289 0
R230 3V3A
C236 0 9d3V
14
9
8
3
4
12
17
18
4
3
2
1
33
33
R2876.8K
0.1u RN230 C245 220p
R238
100*4 VAG
R232
0
R231
6
7
8
C283 R295 1K 9d3V
B- B
B OUT
B+
V+
C289 0.1u Q230
3V3D R237 120K
5
6
7
8
-+
R233 C293 C237
1
0.1u 4 3
49
48
47
46
45
44
43
42
41
40
39
38
37
C520 10uF/16V 0.47u
A OUT
0 C240 +
+-
R292
A
C239 U238 C294 R241
V-
DVSS
BCLK
WCLK
MCLK
SCLK
MOSI
SS
DAV
SDOUT
MISO
A+
A-
T-PAD
DVDD
SDIN
3
2
1
3V3A
1 36 C291
IOVDD DRVSS2 C288 5 1
2 PWR_DN OUT8P 35 U237 R286 47K
3 34 C243 1u 100p
/CODEC_RST RESET BVDD SWITCH IC UMC4N
1 R242 0 4 33 R239 6.8K
TP238 GPIO2 OUT8N 0.1u 5 VCC 6 C242 220p
TP239 1 5 32 S
GPIO1 DRVSS1 2 GND B1 1
6 AVDD2 VGND/CP_OUTN 31 C290 1u
4 A B0 3 LOW_LEVEL_MUTE
C
R243 7 AVSS2 SPKFC 30 C
8 29 Q231
3V3A AVDD1 DRVDD C247 220p
BUZZ_IN/CP_INN
C251 1u
1
0 9 NC9 SPK2 28 3 4
C248 R246 22K
MICBIAS_HND
10 27
MICBIAS_HED
MICIN_HED
12 NC12 MIC_DET 25 2
100K
2
CP_INP
AVSS1
VREF
AUX2
AUX1
VBAT
11
NC R296 1 5
U231 OP AMP
11
BB IC 13 -
UMC4N
13
14
15
16
17
18
19
20
21
22
23
24
14 C252 1u OP AMP
VAG 12 + R250 15K
R249 6 - C253 1u/25V
1V8D R251 600mV
U235D 7 HANDSET_AUDIO
0 C255 VAG 5 +
C292 100
1
C256
4
NEW 1u C295 R202 C254 220p
0.01u C262 C259 R236 100P
1u 100P R252 100K U235B
NC R280 10K 10K 9d3V
TEMP_DET TP237 1u
4
D230 ESD IC
1K R290
NC R254 9d3V
11
TEMP_DET2
C238 C200 OP AMP
30K R257 C263
R284 1u 1u C257 1u 9 - 1u
10K R258 C258 0.1u R285 R260 330mV
15k 8 RX_AUDIO
CODEC_PWT 15k
R259 10K 9d3V VAG 10 +
100
R261 R279 R283
RXAF_DO
TXAF_DI
C260 C261
10K 0.01u 0.01u 30k 30k U235C PUB_ADDRESS2_EN
C264 C265 220p
1
C266 R255 1u
4
1u 470 R262 100K
L233 C298 C299 Q232
9d3V
MIC_GROUND 3 4 R263
11
1
B INT_MIC VAG 3 +
Q233 B
BLM18BD601SN1D 1 5
C271 R264 1K
C270 U235A
5
TP4029 220P 220P UMC4N
4
R269
L235
9d3V 100K
11
EXT_MIC R268
C272 BLM18BD601SN1D C273 R267 1K C274 100K OP AMP C277
220P 220P 0.1u C276 1u
6 -
R271
1u
7 PUB_ADDRESS2
VAG R272 47K 5 +
100
EXT_MIC_EN C278
1u U236B
D231 ESD IC
4
C281
Q234 Q235 1u 9d3V
VAG
3 4 C279 1u C280 220p 3 4
11
R273 24K
R274 100K OP AMP
R276 C282
2 R275 2 R277
100K 1u
100K 47K 9 -
R278
11
8 PUB_ADDRESS1
1 5 OP AMP 1 5 10 +
100
13
11
-
UMC4N 14 UMC4N U236C
OP AMP
4
VAG 12
+
2 - VAG
9d3V R265
R266 47K 1 U236D 9d3V
3 +
1.8K
4
PUB_ADDRESS1_EN
1
U236A 9d3V
R270
+ C275 PUB_ADDRESS_MIC_EN
47K
4
10uF/16V
2
9d3V
A A
DESIGNER: LHY
Title
<Title> AUDIO
314
312 Date: Monday, November 29, 2010 Sheet 1 of 14
5 4 3 2 1
5 4 3 2 1
C6100 R6100
D C6102 C6185 R6101 D
1u 0
470p 1uF 680
R6102
10
TRANSISTOR
4
L6101 3 4
Q6101
BLM18PG600SN1
2 5
RF_ATTEN 2 1 2 TRANSISTOR
C6103 1 5
3
220p TX TP
Q6100 TP6101
C6104 C6105 TP6100
R6103
GND
27K 220p
0.1u L6102
220n L6103
1
10n
C6106
TP6102
220p R6104
C6107 2.7K
C6108
220p
R6105 1000p
5.6K
TP6103 C6114
R6106 TP6104
TX TP 5p R6108
680
L6104 C6119 C6120 C6109 C6110 C6121 C6122 C6111 C6112 L6106 C6125 C6126 C6116 C6117 C6127 C6124
4.7K
Micr-L N2 1.5p 1p 6p 1p 1p
N3
2.2p 6p 6p
R6107 Micr-L N6 NC 1p 6p 1p 1.5p 1p
N7
L6107
C6113 Micr-R
D6100 1.2k C6128
2
C6123 0.1u C6115 L6217 L6216
C6118 HVC131 N17
0 N18 N19 0 220p 220p 470p
470pF D6101 D6102 Q6102 D6103 D6104
RX_in 1 2 3 1SV279 1SV279 3 N4 2 Micr-L 1 2 Micr-L 1 2 TRANSISTOR 3N5 1SV279 1SV279 3 RX_ONE
2
N1 R6123 L6105
C6194 C6132 L6214 L6215 C6129 C6130
L6114 0 C6131
2
10NH NC Micr-L 18p 100p C6244
BLM18PG600SN1 NC C6246
1
3
4
1
9V1A_RX R6109 C6133 C6245
C TP6110 D6105 R6110 6p nc C
2 1 390 4p nc
RX CV L6110 1.2K
HSM88AS
3
C6134 C6135 C6136 C6137 C6138 15n C6139 C6140 C6141 C6142C6143
C6144 C6145 RX_AFTER 56p 56p 56p 47P 47P 56p 56p 56p 47P 47P
220p 1u
U6000
OPAMP R6127
TV_APC 1 IN+ VCC 5 10K R6111 R6112
100K 100K
R6116 +
2 R6114 R6140
0 VEE
- 33
0
3 4
IN- OUT
R6113
TUHF_TONE C6146 C6147
270K 470P 0.01u
R6115
100K
L6115
9V1A_RX
1 2
C6148 C6149
470p 1u
BLM18PG600SN1 R6126 R6117
TP6105 82 82
RX TP
TP6106
C6151 C6152 C6153 C6154
C6150 470p 1.5p 1p 2p
R6118
NC L6116 R6119 MIX IC
3.3K
C6155 18n 1.2K C6157
D6106 R6120
B 0.01u R6121
C6193 L6117 L6119 L6118 100p 3 T6100 4 51 B
3
5.6
22n 22n 18n T6101
RX_LO 4 3 2 5
R6122 C6159
1
4
330
TRANSISTOR
3
4
C6172 R6138
0 0
TP6107
GND
5VA_RX 2 1
1
L6121
BLM18PG600SN1
C6190
R6131
1uF R6130
1.2K
5.1K TX TP
TX TP TP6109
TP6108
C6169
C6168
R6132 0.1u
0.1u C6170
51
R6133 9p
L6122
C6171 330
0.1uF
0.1uF C6173 R6135 C6175 C6177
L6126 C6176 C6178
3
0.1u 4.7K 0.1u 15p
IF-out C6179 0 0.01u
3
C6180 4 OUT IN 1
R6134 0.1u
0.1u
30k 0.1uF GND GND
1
3
C6174 L6123
C6182 C6181 Q6104 C6187 C6192 C6188
2
3
Q6105
R6139
56K
Title
<Title>
315
Date: Wednesday, December 08, 2010 Sheet 1 of 2
313
5 4 3 2 1
5 4 3 2 1
1
C471 + C405
0.1u 10uF/10V
2
R570 5VA
10k R542 0
1
C484 1000p + C509
C483 8 OUT 1 C508 C510
VCC R528
8200p 10u/16v 0.1u 100P 68K
2
7 OUT +- IN- 2
R568 R574
IN+
12k NC
6 IN- 3
R575 R577 -+ R513
2.7k 6.8k C404
0.1u
5 VEE 4 100K
1000p
R529 33K
IN+
C406
1200p OP AMP
C515
U501
R503 1K R564 0 R566 0 Final_bias
C502
C C500 C501 3300p R504 1K R565 0 R567 0 TV_APC C
33p R500 330p R501 R502 C506 C507 C521 C522 C523 C524
100K 10K 1K 0.01uF 0.01uF NC NC NC NC
MOD_H
R505 R506 R507
0 10K 0 R514 100K
MOD_L_RFCS
16
15
14
13
12
11
10
9
U500
PD REFINAB
LDAC OUTA
OUTB
DVDD AVDD
SCLK OUTC
OUTD
FS REFINCD
DGND AGND
D/A IC
DIN
CS
3V3D
1
2
3
4
5
6
7
8
1
B R508 0 B
+ C512 R509 10k
C511 C513
10u/16v 0.1u 1000P R512 10k
2
R510 10k
1 8
DAC_DIN 2 7
DAC_SCLK 3 6
DAC_FS 4 5
RN500 33*4
C516 C517 C518
100P 100P 100P
A A
Title
<Title>
316
314
5 4 3 2 1
D D
TP4044
TP4047
TP4051
TP4045
TP4050
TP4043
TP4054
TP4049
TP4046
TP4048
TP4053
TP4052
F_D0 R487 33
F_D1 R489 33 F_D0_LCD
F_D2 R490 33 F_D1_LCD
F_D3 R492 33 F_D2_LCD
F_D4 R515 33 F_D3_LCD
F_D5 R516 33 F_D4_LCD
F_D6 R517 33 F_D5_LCD
F_D7 R518 33 F_D6_LCD
/OE R519 33 F_D7_LCD
/WE R520 33 /OE_LCD
CS2 R521 33 /WE_LCD
F_A1 R522 33 CS2_LCD
F_A1_LCD
U302A U233
SDR_A0 A2 J8 F_A1
SDRAM.A0 FLASH.A1 F_A1 G1
SDR_A1 B2 D3 F_A2 A0
SDRAM.A1 FLASH.A2 F_A2 F1
SDR_A2 B6 C1 F_A3 A1
SDRAM.A2 FLASH.A3 F_A3 E1 J2 F_D0
SDR_A3 A1 E4 F_A4 A2 DQ0
SDRAM.A3 FLASH.A4 F_A4 D1 G3 F_D1
SDR_A4 G10 D2 F_A5 A3 DQ1
SDRAM.A4 FLASH.A5 F_A5 F2 K3 F_D2
SDR_A5 B9 F4 F_A6 A4 DQ2
SDRAM.A5 FLASH.A6 F_A6 E2 H4 F_D3
SDR_A6 G12 E3 F_A7 A5 DQ3
SDRAM.A6 FLASH.A7 F_A7 D2 H5 F_D4
SDR_A7 G11 J7 F_A8 A6 DQ4
SDRAM.A7 FLASH.A8 F_A8 C2 K6 F_D5
SDR_A8 G9 F3 F_A9 A7 DQ5
SDRAM.A8 FLASH.A9 F_A9 C6 G6 F_D6
0 SDR_A9 B12 G4 F_A10 A8 DQ6
R484 1V8D SDRAM.A9 FLASH.A10 F_A10 E6 J7 F_D7
SDR_A10 B8 G3 F_A11 A9 DQ7
SDRAM.A10 FLASH.A11 F_A11 F6 K2 F_D8
C SDR_A11 H10 G2 F_A12 A10 DQ8 C
C311 C305 C306 C307 SDRAM.A11 FLASH.A12 F_A12 C7 H3 F_D9
SDR_A12 H9 K8 F_A13 A11 DQ9
SDRAM.A12 FLASH.A13 F_A13 D7 J3 F_D10
0.1u 1u 0.01u 100p H11 H4 F_A14 A12 DQ10
SDRAM.A13 FLASH.A14 F_A14 E7 K4 F_D11
H3 F_A15 A13 DQ11
FLASH.A15 F_A15 F7 J6 F_D12
SDR_D0 D6 K7 F_A16 A14 DQ12
U232 SDRAM.D0 FLASH.A16 F_A16 D8 H6 F_D13
SDR_D1 C6 J2 F_A17 A15 DQ13
SDRAM.D1 FLASH.A17 F_A17 G8 K7 F_D14
SDRAM
D3
C7
SDR_D2 F_A18
E7
A9
B3
A7
C5 J4 A16 DQ14
J9
R441 10K
R326 10K
R353 10K
R536 SDR_A10 A9 DQ9 SDR_D10 SDR_D14 SDRAM.D13 FLASH.D2 F_D3 B2
H9 D1 D12 P2 /WE NC6
0 SDR_A11 A10 DQ10 SDR_D11 SDR_D15 SDRAM.D14 FLASH.D3 F_D4 R359 C5 L2
G2 C2 C12 P4 CS1_SRAMJ1 WE NC7
SDR_A12 A11 DQ11 SDR_D12 SDRAM.D15 FLASH.D4 F_D5 NC TP302 1 B3
G1 C1 P7 /OE CE1-ps NC8
SDR_BA0 A12 DQ12 SDR_D13 FLASH.D5 F_D6 H2 L3
G7 B2 C14 R2 OE NC9
SDR_BA1 BA0 DQ13 SDR_D14 SDRAM.DQSH FLASH.D6 F_D7
TP303 1 /CS3_FLASH H1 CEf NC10 B4
G8 BA1 DQ14 B1 D4 SDRAM.DQSL FLASH.D7 R3 RDY R356 0
SDR_D15 /SDR_CS F_D8 E4 RY/BYf NC11 F4
DQ15 A2 G8 SDRAM.CS FLASH.D8 R4 /RST_OUTR440 0
/SDR_CAS F_D9 D4 RESET NC12 G4
F7 CAS D9 SDRAM.CLKX FLASH.D9 T2 /WP R399 0
/SDR_RAS R544 SDR_BA0 F_D10 C4 WP/ACC NC13 L4
F8 RAS B3 SDRAM.BA0 FLASH.D10 T3 R442 10K
SDR_DQML 0 SDR_BA1 F_D11 3V3D D5 CE2ps NC14 B5
E8 LDQM C3 SDRAM.BA1 FLASH.D11 P8
SDR_DQMU SDR_CLK F_D12 NC16 G5
F1 UDQM NC E2 1 TP308 C9 SDRAM.CLK FLASH.D12 U1
/SDR_WE SDR_CKE F_D13 J4 VCCf NC17 K5
CK1 F9 WE H12 SDRAM.CKE FLASH.D13 U3 R444 0
VFLASH J5 L5
1 SDR_CLK F2 CLK
SDR_DQMU D10 SDRAM.DQMU FLASH.D14 T4 F_D14 VCCps NC18
SDR_CKE SDR_DQML F_D15 NC19 B6
F3 CKE C8 SDRAM.DQML FLASH.D15 V3 C310 C308 C309
VSSQC3
VSSQD7
L6
VSSQA3
VSSQB7
VSSE3
VSSJ1
CS /SDR_RAS SDRAM.WE B7
H7 U4 /OE 1U 0.1u 100P NC21
10K
SDRAM.RAS FLASH.OE G7
10K
/SDR_CAS W2 /WE
10K
10K
10K
10K
NC22
10K
FLASH.RDY/GPIO10 B8
L4 NC25
FLASH.ADV H8
M7 1 TP310 NC26
FLASH.CS0/GPIO62
R481
B L8 B
M3 CS1_SRAM
R322
R316
R482
R483
NC27
R453
R351
FLASH.CS1/FLASH.CS1L G2
Y1 VSS1
FLASH.CS1U/GPIO16 /CODEC_RST J8 M8
FLASH.CS2/FLASH.BAA/FLASH.CS2L M4 CS2 VSS2 NC28
FLASH.CS2U/GPIO5 P3 PWB
FLASH.CS3/GPIO3 N8 /CS3_FLASH
FLASH.RP/FLASH.CS2UWE W1
1V8D N3
FLASH.CLK/FLASH.CS2UOE FLASH
RST_OUT/GPIO41 AA20 /RST_OUT
M8 BE1
FLASH.BE1/FLASH.CS2UWE/GPIO60 BE0
FLASH.BE0/FLASH.CS2UOE/GPIO59 L3
OMAP
3V3D 1V8D VFLASH
NC R281
0R R282
A A
DESIGNER: LHY
Title
<Title> MEMO
317
315
C
Date:
<Doc>
5 4 3 2 1
5 4 3 2 1
19.2_OMAP 3V3A
1
R414 10
R419
+
C338 nc C336 C401
1000p 0.1u 10u/16V
TP309 C364 39p X302
2
CLK 4 1
TP377 VCC VT
L151 C337 R426
C375 C376 OSC 0
3 2
3
12p
1
OUT GND
12p L147 470n
X375 470n
1000p
1
C365 19.2MHz TCXO
SSP-T7-F C362 C363
R375 82p
82p 82p
4
0 R374
OSC32
1 0
AA13
V13
P13
W3
U302C
Y2
OMAP
1V6D
OSC32K_OUT
OSC1_OUT
OSC32K_IN
CLK32K_IN
OSC1_IN
Y13 VSS CVDD A15
3V3D CVDD M2
J374 R382 10K 1V6D 1V6D
R19 GPIO1 CVDD Y9
1 3V3D J20 MPU_BOOT CVDD Y20
2 GPIO13 R377 10K AA3
CVDD1 C382 C383 C384 C385 C379 C380 C381 C378
N19 GPIO13/LCD.BLUE0 CVDD2 A3
CON2 R378 10K A9 0.1u 0.1u 0.01u 100p 0.1u 0.1u 0.01u 100p
CVDD2
C 3V3D W19 BFAIL CVDD2 E2 C
TP374 1LOW-PWR R379 10K T20
R380 33 LOW_PWR
U20 MPU_RST CVDD3 B13
/PRST R12 PWRON_RESET CVDD3 B20 1V6D
C356 0.1u R381 33 J21
R383 1K CVDD3
V18 CONF CVDD3 R20
VOTG_DET W15 GPIO40/BCLKREQ 1V6A 1V6D
CVDDRTC W12
3V3D R385 10K R10 L913
GPIO23/MCLKREQ R386 10
CVDDDLL A11
RTC_ALARMB P12 C386 BLM18PG300SN1
VSS 0.1u MMBZ5V6ALT1G
TP375 CVDDA Y21
C339 100p TP376 3V3D_OMAP
MCLK BCLK D236
DVDD1 A19 R388 10
R387 33
1
V5 E21
1
1
VBUS_DEC W10 MPUIO11 DVDD4 B10
B14 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u MMBZ5V6ALT1G
DVDD4 100p + C402
W9 VFLASH 10uF/16V D234
RESET_BT/SYSTEM_SYNC GPIO25/MCSI2.DOUT
DVDD5 C2
2
JTAG DVDD5 H2
DVDD5 R1
/TRST Y18 3V3D_OMAP
TMS TRST
2 1 V17 TMS DVDD6 AA11 VFLASH
TDI 1V8D
4 3 Y19 TDI DVDD7 Y16
R391 6 5 L21
TDO DVDD8
10K 8 7 AA19 TDO DVDD9 U21 C400 C341
RTCK C398 C399 C335
10 9 Y17 RTCK DVDDRTC V12 0.1u 100p
TCK 0.1u 0.01u 100p MMBZ5V6ALT1G
12 11 W18 TCK
14 13 EMU0 V16 J1 D239
EMU1 EMU0 LDO.FILTER
W17 EMU1 C396
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1u
J375
R392 R393 R394 R395 R396
B B
10K 10K 10K 4.7K 4.7K
A13
A21
B1
B5
B7
B16
F20
G1
K2
K20
N1
R21
U2
W20
Y3
AA1
AA7
AA21
3V3D
C334
0.1u
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
316
318
C <Doc> <RevCode>
5 4 3 2 1
5 4 3 2 1
TP326
100p C326
100p C342
C343
R323 R325 U302B
OMAP
10K 10K
100p
1
D 3V3D N15 MPUIO2/SPIF.CS1/UWIRE.CS1 LCD.P0 D18 D
U322 R357 33 T19 B21
R329 R330 98_PE 33 MPUIO4/SPIF.CS2/UWIRE.CS2/LED2 LCD.P1
0 1 14 33 R327 U19 C19
DVDD_IO SLC/SPC I2C_SCL 98_PC R324 33 MPUIO1/SPIF.SCK LCD.P2
2 13 W21 G14
R334 10K GND SDA/SDI/SDO I2C_SDA 98_PD R347 33 GPIO46/SPIF.DOUT/UWIRE.SDO LCD.P3
4 IADDR0 SDO 12 33 U18 GPIO47/SPIF.DIN/UWIRE.SDI LCD.P4 H13
C321 5 11 R332 C355 100p 98_DOUTB C358 100p V19 A20
GND RESERVED MAP_GPIO_6 MPUIO1/UWIRE.SCLK LCD.P5
0.1u 6 9 1 B19
AVDD INT2 TP321 100 LCD.P6
7 8 ACCEL_INT1 R346 M14 C18
NC1
NC2
CS INT1/DRDY PLL_LD 100 GPIO2 LCD.P7
PLL_CLK R337 M15 D17 R403 100
R335 10K 33 100 GPIO7/MCSI1.CLK LCD.P8/GPIO29 FL_Control
R336 PLL_STB R338 W8 D16 R404 100
GPIO9/MCSI1.SYNC LCD.P9/GPIO30 R406 100 LP_Control
NC MAP_GPIO_2 V15 C17
3
10
R339 100 GPIO56/MCSI1.DIN LCD.P10/GPIO31 R410 100 TX_VCO_H
PLL_DATA W14 GPIO18/MCSI1.DOUT LCD.P11/GPIO32 B17 TX_VCO_L
G13 R411 100
LCD.P12/GPIO33 RX_VCO_H
R14 A17
C346 100p
C344 100p
100p
C351 100p
C349 100p
100p
C354 100p
C352 100p
GPS_UART1_TXD GPIO38/UART1-IRSEL LCD.P13/GPIO34
Y14 UART1.TX/UART1.IRTX LCD.P14/GPIO35 C16
GPS_UART1_RXD V14 D15
GPIO37/UART1.RX/UART1.IRRX LCD.P15/GPIO2
AA15 B15
C345
C350
MMP_GPIO_0/PwrOn GPIO39/UART1-IRSHDN LCD.AC
LCD.HS C20
UART2_TXD V6 GPIO17/UART2.TX LCD.PCLK C15
R9 B18 3V3D
UART2_RXD GPIO18/UART2.RX LCD.VS R413 33
LCD.RED0/GPIO14 N21 RF_ATTEN
100p
3V3D 3V3D WAKE_BT/OPT_GPIO1 N14 GPIO45/UART3.TX/SPIF.CS0/MCBSP3.CLKX
CODEC_/SS P15 GPIO44/UART3.RX/SPIF.CS3/UWIRE.CS3
C353
R488 R511 R499
C322 12p T18
R340 10K
10K
R342 10K
R343 10K
I2C_SDA GPIO48/I2C.SDA KP.R4/MPUIO15 /CODEC_DAV
X321 KP.R3/MPUIO13 E20 ACCEL_INT1
33
R341
100p
100p
100p
MAP_GPIO_3 GPIO0/USB.VBUS KB.C3/GPIO63 KB_C3
NC W5 C21
MAP_GPIO_8 MPUIO5/MPUIO12 KB.C4/GPIO27
MAP_GPIO_7 V8 MPUIO3/MMC2.DAT1 KB.C5/GPIO28 G19 S/P_CLOCK
V9
C359
C360
C361
GPIO7/MCSI2.SYNC 33 R402
C
RST_CTRL V10 MPUIO10/MPUIO7 GPIO62/MCBSP1.CLKS G20 RX
C
V11 G21
C347 100p
MMP_GPIO_3/PTT GPIO57/MMC.CLK GPIO54/MCBSP1.CLKX CODEC_SSI_BCLK
TDMASLOT_OUT Y8 GPIO8/TRST GPIO53/MCBSP1.FSX H15 CODEC_SSI_WCLK
EXT_PTT AA9 GPIO26/MCSI2.DIN GPIO51/MCBSP1.DR H20 CODEC_SSI_DO
ACC_IO3 Y10 GPIO27 GPIO52/MCBSP1.DX H18 CODEC_SSI_DI
3V3D P11
IGN_SENSE GPIO55/MMC.CMD
1 2 R422 1K MPUIO6 W11 L19
MPUIO9/MPUIO6 CAM.D0/MPUIO12 SPK_SEL
D601 LED OPT_BRD_PTT P18 GPIO3/MCBSP3.FSX/LED1 CAM.D1/GPIO29 K14 UART3_RTS_BT
R11 K15 UART3_CTS_BT
TP4027
EMERGENCY GPIO58 CAM.D2/GPIO30
MMP_GPIO_4/HOOK R13 GPIO36/CLK32K_OUT/MPUIO0/UART1-TX CAM.D3/GPIO31 K19 UART3_RXD_BT
TP325 1 Y4 UART2.BCLK/SYS_CLK_IN CAM.D4/GPIO32 K18 UART3_TXD_BT
CAM.D5/UWIRE.SDI/GPIO33 J14 CODEC_MISO
MCBSP3_CLKX W16 GPIO42/MCBSP3.CLKX CAM.D6/UWIRE.CS3/GPIO34 J19 S/P_CSLED
MCBSP3_FSX N18 GPIO12/TIMER.EXTCLKMCBSP3.FSX CAM.D7/UWIRE.CS0/GPIO35 J18 S/P_CS2
MCBSP3_DR AA17 MCSI1.SYNC/MCBSP3.DR
P14 H19 R354 33
MCBSP3_DX GPIO43/MCSI1.CLK/MCBSP3.DX CAM.EXCLK/UWIRE.SDO/GPIO57 CODEC_MOSI
CAM.HS/GPIO38 L15 S/P_DATA
P19 J15 R355 33
S/P_CS1 GPIO6/MCSI1.DIN/TIMER.EVENT3 CAM.LCLK/UWIRE.SCLK/GPIO39 CODEC_SCLK
WAKE_HOST/OPT_GPIO2 P20 GPIO4/SPIF.DIN/TIMER.EVENT4 CAM.RSTZ/GPIO37 M19 ACC_IO1
L18 C357 100p
R358 10 CAM.VS/MPUIO14 AUDIO_PA_EN
USB_D- R8 USB.DM/I2C.SCL/UART1.TX/Z
USB_D+ P9 USB.DP/I2C.SDA/UART1.RX GPIO50/PWTTIMER.PWM0 M18 CODEC_PWT
R360 10 M20 R421 100
PUEN GPIO15/TIMER.PWM2 R376 33 RX_VCO_L
W4 L14
R361 15K
R362 15K
USB.PUEN GPIO49/PWL/TIMER.PWM1 TX
R401 1.5k GPIO11/HDQ N20 ACC_IO2
L1 NC2 GPIO7/UART2.RCV Y5 PWR_CTRL
E5 NC1
C348 100p
W321
ANTENNA
TP4038
TP4014
TP4026
B B
2 3
3V3D
1
U327
3V3D C329 0.1u
5Oohm䍄㒓 LOW_LEVEL_MUTE 1 16
QB VCC
PUB_ADDRESS_MIC_EN 2 QC QA 15
3V3D R363 0 R364 0 R367 33
3 14 S/P_DATA
TP4033
TP4034
R366 10K
+
TXB RF_IN L321 LOGIC IC 1 2
3 3 PPS GND 18
R349 33 GPS_UART1_RXD R368 33
2 4 TXA RF_OUT 17
R350 33 GPS_UART1_TXD R384 NC C330 3V3D
CON5 1 33
5 RXA BOOT 16 39nH+/-0.3nH
R370 21 GND GND 22
6 15 0.1u
GPIO[10] GPIO[13] R397 NC L322
GPS_UART1_RXD 7 GPIO[0] GPIO[15] 14
8 13 BLM18PG300SN1 3V3DP
GPIO[1] GPIO[14] R532 R531 R530
GPS_UART1_TXD 9 12 10K 10K 10K
RF_PWR VIN_3V3
10 ON_OFF V_RTC_3V3 11
1
100
0
3VRTC
2
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
319
317 Date: Tuesday, November 30, 2010 Sheet 5 of 14
5 4 3 2 1
5 4 3 2 1
R539 10K
R538 10K
R541 10K
R540 10K
R543 10K
C482 C481 C409 C410 C411 C412
C413 C414 C415 C416
100p 100p 100p 100p 100p 100p J400
22 21 100p 100p 100p 100p
R456 33 2 1 R423 33
I2C_SDA R457 33 R424 33 WAKE_HOST/OPT_GPIO2
I2C_SCL 4 3 WAKE_BT/OPT_GPIO1
MCBSP3_DR R425 33 6 5 R431 33
D RESET_BT/SYSTEM_SYNC D
MCBSP3_CLKX R412 33 8 7 R408 33 OPT_BRD_PTT R400 10K
MCBSP3_DX R430 33 10 9 R415 33 3V3D
MCBSP3_FSX R420 33 12 11 R416 33 UART3_TXD_BT
14 13 R409 33 UART3_RXD_BT 3
16 15 R432 33 UART3_CTS_BT
TXAF_DI
RXAF_DO 18 17 R433 33 UART3_RTS_BT 1 R460 1K
AUX_C
5VD R407 0 20 19
24 23
Q323
C480 C479 2 DTC114EE
C407 CON2X10
C417 C418 C477 C478
100p 100p
0.1u 100p 100p 100p 100p
3V3D
R461 10K
R462 10K
R463 10K
R464 10K
R465 10K
MAP_GPIO_8
MAP_GPIO_7
MAP_GPIO_3
MAP_GPIO_6
MAP_GPIO_2 3V3D
3
2
3V3D U328 PRGM_OUT8
PRGM_OUT7 EMERGENCY_IN
16 VCC QB 1 R439 100
R477 1K 15 2 PRGM_OUT3 IGN_SENSE
R474 33 QA QC PRGM_OUT6
C S/P_DATA 14 A QD 3 ALARM C
3V3D R475 nc 13 4
R473 33 OUT EN QE
S/P_CS2 12 LATCH CLK QF 5 ALARM 5VD 5VD
R467 33 11 6
S/P_CLOCK SHIFT CLK QG VBUS_EN R4964.7K 5VD 5VD 5VD EXT_SWB+
3V3D R466 10K 10 7 5VD
RESET QH
9 SQH GND 8
R446
NC
R472
LOGIC IC 5VD
4.7K
3 R471 R469
R443 10K 3
R447 10K R468 4.7K
R470 4.7K
3V3D 1 4.7K R449
1
2
R445 100 4.7K Q400
EXT_PTT
1
1.0V 1.5K
1
Q406 MUN5214DW1T1
Q407 MUN5214DW1T1
5VD Q405 R448 4.7K
Q409 MUN5214DW1T1
Q410 MUN5214DW1T1
1
Q408 MUN5214DW1T1
2 DTC114EE R1 R1 Q401
R2 R2
R1 R1 R1 2 DTC114EE
R437 4.7K R2 R2 R2 R450 2SA1362
1
2 3
2.7K
3
MUN5214DW1T1
1
R428 4.7K
R1 R2 R2
3V3D 1 R563 33k R2 R2 R2
R2 R1 R1 3
R1 R1 R1
Q404 Q402 1
R427 10K
6
R2 DTC114EE
6
Q411
R547470
R55933k
R1 R551 R546 470
R548 470
R558 33k
R549 470
R560 33k
470 2
R56133k
R562 R550
R557 100
33k
6
ACC_IO3 470
5VD D405
C434 C436
1
MMBZ20VALT1G
R435 4.7K
R2
R1 D233
MMBZ20VALT1G
B B
R556 100
6
D409
ACC_IO2
3V3D 5VD
R452 10K U401 USB_VBUS D404
C421
3 2 220p MMBZ33VALT1G
R451 10K FAULT GND MMBZ20VALT1G
VBUS_EN 4 ON
5 IN OUT 1
VBUS_DEC SMART SWITCH
PUB_ADDRESS2
RX_AUDIO
PUB_ADDRESS1 7.0V R455 100K
EXT_MIC
EXT_SPKR+ IGN_SENSE_IN
EXT_ALARM_OUT
EXT_SPKR-
PUB_ADDRESS1
PUB_ADDRESS2
EMERGENCY_IN
1 2 L417 BLM15AG121SN1
IGN_SENSE_IN
PRGM_IN_PTT
USB_D-
EXT_SWB+
PRGM_IO2
PRGM_IO3
PRGM_IO7
PRGM_IO8
CM2-2012MCIN-181T
R478 nc
UART3_TXD_BT D450
2
R480 nc
UART3_RXD_BT PRTR5V0U2X
GND I/O1
VCC I/O2
C476 C474 C426 C427 C428 C429 C430 C431 D240 D238
NC NC 100p 100p 100p 100p 100p 100p
MMBZ20VALT1G MMBZ6V8ALT1G
1
19
10
11
13
15
18
17
16
24
23
25
12
21
22
14
20
26
27
28
1
4
6
9
8
7
2
5
USB_D+
V_BUS
EXT_SWB+
EXT_SPKR+
PRGM_IN_4_EMERGENCY
PRGM_IN_PTT
PRGM_IN_5_IGN_SENSE
PRGM_OUT_9_EXT_ALARM
USB_D-
USB_GROUDN
ACC_MAP_ID_2
ACC_MAP_ID_3
AUX_AUDIO_OUT_1
PRGM_IO_6
AUX_AUDIO_OUT_2
TX_AUDIO
POWER GROUND
EXT_SPKR-
Audio Ground
RX_AUDIO
GROUND2
GROUND3
PRGM_IO_3_CHAN_ACT
PRGM_IO_7
PRGM_IO_8
GND1
GND2
PRGM_IO_2_MONITOR
5VD
R476 10k
A J403 A
MAP26
DESIGNER: LHY
Title
<Title>: peripheral
320
318
Size Document Number Rev
C <Doc>
<RevCode>
Date: Wednesday, December 08, 2010 Sheet 6 of 14
5 4 3 2 1
5 4 3 2 1
C465
TP4015
100p
SPK+
TP4001
TP4002
TP4005
TP4006
TP4009
TP4010
TP4011
TP4041
TP4013
TP4017
TP4019
TP4020
TP4021
TP4022
TP4023
TP4024
TP4025
3V3D
C464
C460
C461
C462
100p C463
C470
C472
C473
TP4007
TP4008
C468 C439 C438 C441 C440 C435 C420 C419
USB_VBUS R494
NC
NC
NC
NC
NC
NC
100p 0.47u 0.47u 100p 100p 100p 100p 100p R555
0.1U
J404 NC 10k
1 INT_MIC_MMP INT_MIC
2 MIC_GND MIC_GROUND
3 ACC_IO1_MMP R554 1k ACC_IO1
4 USB_VBUS
5 HOOK_MMP HOOK
6 PTT_MMP PTT
7 USB_D- L414 BLM15AG121SN1 3 4 USB_D-
8 USB_D+ L415 BLM15AG121SN1 L413 1 CM2-2012MCIN-181T
2 USB_D+
C 9 Pwron_MMP Pwron C
10 UART2_RXD R534 10K
UART2_RXD
11 UART_TXD R535 10K UART2_TXD
12 SPKR1+ HANDSET_AUDIO
13 SPKR1- SPKR1+
14 HANDSET_AUDIO SPKR1-
15 5V 5VD TP4030
16 /RST_OUT R495 33 /RST_OUT
17 KB_C0 R498 33 KB_C0
18 KB_C1 R486 33 KB_C1
19 KB_C2 R491 33 KB_C2
20 KB_C3 R485 33 KB_C3
21 KB_R0 R523 33
KB_R0
22 KB_R1 R524 33
KB_R1
23 KB_R2 R525 33
KB_R2
24 S/P_CSLED R526 33 S/P_CSLED
25 S/P_CLOCK R527 33 S/P_CLOCK
26 S/P_DATA R533 33 S/P_DATA
27 /OE_LCD L411 BLM18PG300SN1 /OE_LCD
28 /WE_LCD L412 BLM18PG300SN1 /WE_LCD
29 CS2_LCD L410 BLM18PG300SN1 CS2_LCD
30 F_A1_LCD L407 BLM18PG300SN1 F_A1_LCD
31 F_D7_LCD L409 BLM18PG300SN1 F_D7_LCD
32 F_D6_LCD L408 BLM18PG300SN1 F_D6_LCD
33 F_D5_LCD L406 BLM18PG300SN1 F_D5_LCD
34 F_D4_LCD L405 BLM18PG300SN1 F_D4_LCD
35 F_D3_LCD L404 BLM18PG300SN1 F_D3_LCD
36 F_D2_LCD L403 BLM18PG300SN1 F_D2_LCD
37 F_D1_LCD L402 BLM18PG300SN1 F_D1_LCD
38 F_D0_LCD L401 BLM18PG300SN1 F_D0_LCD
39 GND
40 PWR_KEY PWB_IN
41
4
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
100p
NC
NC
NC
42
C469
CONTROL HEAD 100p
C446
C444
C449
C451
C450
C448
C445
C447
C442
C443
C453
C454
C455
C456
C452
C457
C458
C459
C466
C467
D408 D407
TP4028
B B
3
TP4018
TP4055
GND
A A
DESIGNER: LHY
Title
<Title> OMAP CORE
321
319 Size
C
Document Number
<Doc>
<RevCode>
Rev
5 4 3 2 1
5 4 3 2 1
2
U901
BLM41PG600SN1
C902 + D900 TP4035 RP102N331B 3V3DP
2
C903
470p/50V 1 5
VDD VOUT
L900
470uF/25V 2
MR2835SKG
2
D
C905 GND C906 D
B901 5VA 3 4
1
1u CE NC 1u
1
9V3 L904 U905
BLM18PG181SN1D XC6209F502PR C925 U903
1
L930 10uH 4 XC6209F182PR L901 1V8D
U902 D901 Vin Vout 5
1
3
BST C907
2
14 IN R924 1K 1u
1
2
3
0.1u 3 CE Nc 1
17 BP L902 3 CE Nc 1
16
CE
5 VOUT VDD
GND
LX7
RP102N331D
2
LX6 15
10uH C911
7 EN LX5 5
4 C960
LX4 D902 330p
U909
R911
4 NC
1
1
47uF/25V LX1 1 R912 L931
2.2u/25V 1 10 4.7uH 1V6D
VIN PGND
1
C947 0.1u 510 C951 C915 4.7uH
2
1
0.1u 4 7
22uF/10V
10uF/25V
0.1u 10uF/16V 0.1u 4.7K PG SYNC
2.2u/10V 9 R951 1.5K + C946 5 6 +
C917 C918 C919 C932
2
OS 1u FB LBI R917
10uF/16V 2.2u
11 R981 NC TPS62050 22p 330K 1% 10uF/16V
2
FB R918
C921 220p
10 6.04K 1%
GND
C928 C910
1
10u/16v 1000p
R952 + R906
PWR_ON 47k R908
1
24K
2
3
1 2 4.7K
D918 Q920 RX 1
C C
NC D45H8G 9V3 Q903
L940 L916 DTC114EE
BLM41PG600SN1
1 2 3 2 1 2
1
1
C980 2
C950 + + BLM41PG600SN1 +
C956 C957
0.1u D915 C955 C958
10uF/25V 10uF/25V 10uF/25V
1SS372 0.1u 0.1u
2
2
R958 U915 U918
1
3V3D
R953 XC6209F502PR 5VA_FGU XC6209F332PR 3V3A_FGU
680 R962 R964
4 Vin Vout 5 4 Vin Vout 5
10
1
R961 0 2.2K 1%
1u 2 C963 2 C965
6
R963 C952 0.01U R971 2.74K 1% Vss C926
+ Vss U910
330 0 R972 C962 2.2u
0.1u R932
VDD
2.2k 10uF/16V /PRST1
2
3 1 3 1 4.7K
CE Nc CE Nc 5 D913
2
2
3
R954 1K SENCE
1 2 1 /PRST
1
RSET
A-
A+
V-
3
A OUT
Q921 R965 0
+-
C937 MR MBRM120LT1G
A
GND
PZT2222AT1 U914 R982 100k 1000p 4
-+
CT
B- B
B OUT
NJM2904V
V+
C941
B+
3
TPS3808G33DBVT
2
D917 0.15u
3V3D
8
7
6
UDZSTE(175.1B)
1
R969
R966 3
47k
150
R970 1k 1 R950
3
10K
R968 2.2k
1