Chapter 2 Diode Applications PDF

Electric Circuit & Electronics
Chapter 2 Diode Applications

Basil Hamed
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OBJECTIVES
• Understand the concept of load-line analysis and how it
is applied to diode networks.
• Become familiar with the use of equivalent circuits to
analyze series, parallel, and series-parallel diode
networks.
• Understand the process of rectification to establish a dc
level from a sinusoidal ac input.
• Be able to predict the output response of a clipper and
clamper diode configuration.
• Become familiar with the analysis of and the range of
applications for Zener diodes.
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2.1 INTRODUCTION
• This chapter will develop a working knowledge of the

diode in a variety of configurations using models
appropriate for the area of application
• By chapter’s end, the fundamental behavior pattern
of diodes in dc and ac networks should be clearly
understood.
• The analysis of electronic circuits can follow one of
two paths: using the actual characteristics or
applying an approximate model for the device.
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2.2 LOAD-LINE ANALYSIS
The circuit of Fig. 2.1 is the simplest of diode
configurations. It will be used to describe the analysis of a
diode circuit using its actual characteristics
In the next section we

will replace the
characteristics by an
approximate model for
the diode and compare
solutions.
Solving the circuit of Fig. 2.1 is all about finding the current and voltage
levels that will satisfy both the characteristics of the diode and the chosen
network parameters at the same time. Basil Hamed 4
Load-Line Analysis
The straight line is called a load
line because the intersection on
the vertical axis is defined by the
applied load R. The load line
plots all possible combinations of
diode current (ID) and voltage
(VD) for a given circuit. The
maximum ID equals E/R, and the
maximum VD equals E.
The point where the load line and the characteristic curve intersect is the
Q-point, which identifies ID and VD for a particular diode in a given circuit.
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The intersections of the load line on the characteristics of
Fig. 2.2 can be determined by first applying Kirchhoff’s
voltage law
If we set VD=0 V in Eq. (2.1) and solve for ID , we have the

magnitude of ID on the vertical axis. Therefore, with VD=0 V,
Eq. (2.1) becomes
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as shown in Fig. 2.2 . If we set ID= 0 A in Eq. (2.1) and
solve for VD, we have the magnitude of VD on the
horizontal axis. Therefore, with ID=0 A, Eq. (2.1) becomes
As shown in Fig. 2.2 . A straight line drawn between the

two points will define the load line as depicted in Fig. 2.2 .
Change the level of R (the load) and the intersection on
the vertical axis will change
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We now have a load line defined by the network and a
characteristic curve defined by the device. The point of
intersection between the two is the point of operation for
this circuit.
By simply drawing a line down to the horizontal axis, we
can determine the diode voltage VDQ, whereas a
horizontal line from the point of intersection to the vertical
axis will provide the level of IDQ .The current ID is actually
the current through the entire series configuration
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EXAMPLE 2.1 For the series diode configuration of Fig.
2.3a , employing the diode characteristics of Fig. 2.3b ,
determine:
a. VDQ and IDQ.
b. VR .
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Solution:
The resulting load line appears in Fig.

2.4 . The intersection between the
load line and the characteristic curve
defines the Q -point as
The level of VD is certainly an estimate, and the accuracy of ID is

limited by the chosen scale. A higher degree of accuracy would
require a plot that would be much larger and perhaps unwieldy.
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Using the Q-point values, the dc resistance for Example
2.1 is
An equivalent network (for these operating conditions

only) can then be drawn as shown in Fig. 2.5
The current
matching the results of Example 2.1 .

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EXAMPLE 2.2 Repeat Example 2.1 using the approximate
equivalent model for the silicon semiconductor diode
Solution: The load line is redrawn as shown in Fig. 2.6
with the same intersections as defined in Example 2.1 .
The characteristics of the approximate equivalent circuit
for the diode have also been sketched on the same graph.
The resulting Q-point is
For this situation the dc resistance

of the Q -point is
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EXAMPLE 2.3 Repeat Example 2.1 using the ideal diode
model.
Solution: As shown in Fig. 2.7 , the load line is the same,
but the ideal characteristics now intersect the load line on
the vertical axis. The Q-point is therefore defined by
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2.3 SERIES DIODE CONFIGURATIONS
Since the use of the approximate model normally results in

a reduced expenditure of time and effort to obtain the
desired results, it is the approach that will be employed in
this book unless otherwise specified.
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2.3 Series Diode Configurations
Forward Bias
Constants
Silicon Diode: VD = 0.7 V
Germanium Diode: VD = 0.3 V
Analysis (for silicon)

VD = 0.7 V (or VD = E if E < 0.7 V)
VR = E – VD
ID = IR = IT = VR / R
2.3 Series Diode Configurations
Reverse Bias
Diodes ideally behave as

open circuits
Analysis
VD = E
VR = 0 V
ID = 0 A
EXAMPLE 2.4 For the series diode configuration of Fig.

2.13 , determine VD , VR , and ID .
Solution: Since the applied voltage

establishes a current in the
clockwise direction to match the
arrow of the symbol and the diode
is in the “on” state,
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EXAMPLE 2.5 Repeat Example 2.4 with the diode reversed.

Solution: Removing the diode, we find that the direction of
I is opposite to the arrow in the diode symbol and the
diode equivalent is the open circuit. The result is the
network of Fig. 2.14 , where ID= 0 A due to the open
circuit. Since VR= IRR, we have VR = (0)R = 0 V. Applying
Kirchhoff’s voltage law around
the closed loop yields
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EXAMPLE 2.6 For the series diode configuration

of Fig. 2.16 , determine VD , VR , and ID .
Solution: The level of applied voltage is
insufficient to turn the silicon diode “on.” The
point of operation on the characteristics is
shown in Fig. 2.17 , establishing the open
circuit equivalent as the appropriate
approximation, as shown in Fig. 2.18 . The
resulting voltage and current levels are
therefore the following:
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EXAMPLE 2.7 Determine Vo and ID for the series circuit of

Fig. 2.19 .
Solution
The network of Fig. 2.20 results
because E =12V ›(0.7 V +1.8V
[Table 1.8])= 2.5V. Note the
redrawn supply of 12 V and the
polarity of Vo across the 680Ω
resistor. The resulting voltage is
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EXAMPLE 2.8 Determine ID , VD2, and Vo for the circuit of

Fig. 2.21 .
Solution: Removing the diodes and
determining the direction of the
resulting current I result in the
circuit of Fig. 2.22
ID=0A and VD1 = 0 V are indicated
in Fig. 2.24
22
Applying Kirchhoff’s voltage law in a clockwise direction

gives
= 20 V
Vo = 0 V
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2.4 PARALLEL AND SERIES–PARALLEL
CONFIGURATIONS
The methods applied in Section 2.3 can be extended to
the analysis of parallel and series– parallel configurations.
For each area of application, simply match the sequential
series of steps applied to series diode configurations.
EXAMPLE 2.10 Determine Vo , I1 , ID1, and ID2 for the
parallel diode configuration of Fig. 2.28 .
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CONFIGURATIONS
Solution: For the applied voltage
the “pressure” of the source acts
to establish a current through
each diode in the same direction
as shown in Fig. 2.29 . Vo = 0.7 V
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CONFIGURATIONS
EXAMPLE 2.11 there are two LEDs that
can be used as a polarity detector.
Apply a positive source voltage and a
green light results. Negative supplies
result in a red light. Packages of such
combinations are commercially
available. Find the resistor R to ensure a
current of 20 mA through the “on”
diode for the configuration of Fig. 2.30.
Both diodes have a reverse breakdown
voltage of 3 V and an average turn-on
voltage of 2 V.
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CONFIGURATIONS
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CONFIGURATIONS
EXAMPLE 2.12 Determine the voltage Vo for the network
of Fig. 2.35 .
Solution: Initially, it might appear the
applied voltage will turn both diodes “on”
because the applied voltage is trying to
establish a conventional current through
each diode that would suggest the “on”
state. However, if both were on, there
would be more than one voltage across
the parallel diodes, violating one of the
basic rules of network analysis: The
voltage must be the same across parallel
elements.
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CONFIGURATIONS
the silicon diode will turn “on” and maintain the level of
0.7 V since the characteristic is vertical at this voltage the
current of the silicon diode will simply rise to the defined
level. The result is that the voltage across the green LED
will never rise above 0.7 V and will
remain in the equivalent open-circuit
state as shown in Fig. 2.36 .
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CONFIGURATIONS
EXAMPLE 2.13 Determine the currents I1 , I2 , and ID2 for
the network of Fig. 2.37
Solution:
The applied voltage is such as to
turn both diodes on, as indicated
by the resulting current
directions in the network of Fig.
2.38. The solution is obtained
through an application of
techniques applied to dc series–
parallel networks.
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CONFIGURATIONS
Applying Kirchhoff’s voltage law around the indicated loop

in the clockwise direction yields
At the bottom node a
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2.6 SINUSOIDAL INPUTS; HALF-WAVE
RECTIFICATION
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RECTIFICATION
The diode analysis will now be expanded to include time-
varying functions such as the sinusoidal waveform and the
square wave. The simplest of networks to examine with a
time-varying signal appears in Fig. 2.44.
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RECTIFICATION
• Over one full cycle, defined by the period T of Fig. 2.44,
the average value (the algebraic sum of the areas above
and below the axis) is zero. The circuit of Fig. 2.44 ,
called a half-wave rectifier , will generate a waveform vo
that will have an average value of particular use in the
ac-to-dc conversion process.
• When employed in the rectification process, a diode is
typically referred to as a rectifier. Its power and current
ratings are typically much higher than those of diodes
employed in other applications, such as computers and
communication systems.
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RECTIFICATION
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RECTIFICATION
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RECTIFICATION
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Half-Wave Rectification
The diode
conducts only
when it is
forward biased,
therefore only
half of the AC
cycle passes
through the
diode to the
output.
The DC output voltage is 0.318Vm, where Vm = the peak AC voltage.
RECTIFICATION
The input vi and the
output vo are sketched
together in Fig. 2.47 for
comparison purposes.
The output signal vo now
has a net positive area
above the axis over a full
period and an average
value determined by
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RECTIFICATION
The effect of using a silicon diode with VK =0.7V is
demonstrated in Fig. 2.48 for the forward-bias region. The
applied signal must now be at least 0.7 V before the diode
can turn “on.” For levels of vi less than 0.7 V, the diode is
still in an open-circuit state and vo =0 V
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RECTIFICATION
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RECTIFICATION
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RECTIFICATION
EXAMPLE 2.16
A. Sketch the output vo and determine the dc level of the
output for the network of Fig. 2.49 .
B. Repeat part(a) if the ideal diode is replaced by a silicon
diode.
C. Repeat parts (a) and (b) if Vm is increased to 200 V,
and compare solutions using Eqs.(2.7) and (2.8).
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RECTIFICATION
Solution:
A. In this situation the diode will conduct during the
negative part of the input as shown in Fig. 2.50, and
vo will appear as shown in the same figure. For the full
period, the dc level is
Vdc = -0.318Vm = -0.318(20 V) =- 6.36 V
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RECTIFICATION
B. For a silicon diode, the output has the appearance of
Fig. 2.51, and Vdc ≈-0.318(Vm - 0.7 V) = -0.318(19.3
V)= -6.14 V The resulting drop in dc level is 0.22 V, or
about 3.5%.
C. Eq. (2.7): Vdc = -0.318 Vm = -0.318(200 V) =- 63.6 V
Eq. (2.8): Vdc = -0.318(Vm - VK)= -0.318(200 V - 0.7 V)=
-(0.318)(199.3V) =- 63.38 V
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RECTIFICATION
The peak inverse voltage (PIV) [or PRV (peak reverse voltage)]
rating of the diode is of primary importance in the design of
rectification systems. Recall that it is the voltage rating that
must not be exceeded in the reverse-bias region or the diode
will enter the Zener avalanche region. The required PIV rating
for the half-wave rectifier can be determined from Fig. 2.52 ,
which displays the reverse-biased diode of Fig. 2.44 with
maximum applied voltage. Applying KVL, it is fairly obvious that
the PIV rating of the diode must equal or exceed the peak value
of the applied voltage. Therefore,
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RECTIFICATION
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2.7 Full-Wave Rectification
The rectification process can be

improved by using a full-wave
rectifier circuit.
Full-wave rectification produces a

greater DC output:
Half-wave: Vdc = 0.318Vm

Full-wave: Vdc = 0.636Vm
2.7 FULL-WAVE RECTIFICATION
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Bridge Network
The dc level obtained from a sinusoidal input can be
improved 100% using a process called full-wave
rectification. The most familiar network for performing
such a function appears in Fig. 2.53 with its four diodes in
a bridge configuration.
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During the period t=0 to T>2 the polarity of the input is

as shown in Fig. 2.54 . The resulting polarities across the
ideal diodes are also shown in Fig. 2.54 to reveal that D2
and D3 are conducting, whereas D1 and D4 are in the “off”
state.
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The net result is the configuration of Fig. 2.55 , with its

indicated current and polarity across R. Since the diodes
are ideal, the load voltage is vo = vi, as shown in the
same figure.
For the negative region of the input the conducting diodes are D1 and D4 ,
resulting in the configuration of Fig. 2.56 . The important result is that the
polarity across the load resistor R is the same as in Fig. 2.54 , establishing
a second positive pulse, as shown in Fig. 2.56 . Over one full cycle the
input and output voltages will appear as shown in Fig. 2.57 . 53
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Since the area above the axis for one full cycle is now
twice that obtained for a half-wave system, the dc level
has also been doubled and
If silicon rather than ideal

diodes are employed as shown
in Fig. 2.58 , the application of
Kirchhoff’s voltage law around
the conduction path results in
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The peak value of the output voltage vo is therefore
For situations where Vm ˃˃ 2VK, the following equation
can be applied for the average value with a relatively high
level of accuracy:
Then again, if Vm is sufficiently greater than 2 VK , then Eq.

(2.10) is often applied as a first approximation for Vdc
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PIV The required PIV of each diode (ideal) can be
determined from Fig. 2.59 obtained at the peak of the
positive region of the input signal. For the indicated loop
the maximum voltage across R is Vm and the PIV rating is
defined by
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Center-Tapped Transformer
A second popular full-wave rectifier appears in Fig. 2.60
with only two diodes but requiring a center-tapped (CT)
transformer to establish the input signal across each
section of the secondary of the transformer
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During the positive portion of vi applied to the primary of
the transformer, the network will appear as shown in Fig.
2.61 with a positive pulse across each section of the
secondary coil. D1 assumes the short-circuit equivalent
and D2 the open-circuit equivalent, as determined by the
secondary voltages and the resulting current directions.
The output voltage appears as shown in Fig. 2.61 .
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During the negative portion of the input the network
appears as shown in Fig. 2.62 , reversing the roles of the
diodes but maintaining the same polarity for the voltage
across the load resistor R. The net effect is the same
output as that appearing in Fig. 2.57 with the same dc
levels.
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PIV The network of Fig. 2.63 will help us determine the
net PIV for each diode for this full-wave rectifier. Inserting
the maximum voltage for the secondary voltage and Vm
as established by the adjoining loop results in
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EXAMPLE 2.17 Determine the output waveform for the
network of Fig. 2.64 and calculate the output dc level and
the required PIV of each diode.
Solution: The network

appears as shown in Fig.
2.65 for the positive region
of the input voltage.
Redrawing the network
results in the configuration
of Fig. 2.66, where
Vo=(1/2)Vi or Vomax=(1/2)Vimax = 1/2(10 V) = 5 V,

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as shown in Fig. 2.66 . For the

negative part of the input, the
roles of the diodes are
interchanged and vo appears as
shown in Fig. 2.67.
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The effect of removing two diodes from the bridge
configuration is therefore to reduce the available dc level to
the following:
However, the PIV as determined from Fig. 2.59 is equal to

the maximum voltage across R , which is 5 V, or half of that
required for a half-wave rectifier with the same input.
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2.11 ZENER DIODES
The analysis of networks
employing Zener diodes is
quite similar to the analysis
of semiconductor diodes in
previous sections. Figure
2.108 reviews the
approximate equivalent
circuits for each region of a
Zener diode assuming the
straight-line approximations
at each break point.
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2.11 Zener Diodes
The Zener is a diode that is

operated in reverse bias at
the Zener Voltage (Vz).
When Vi  VZ
• The Zener is on
• Voltage across the Zener is VZ
• Zener current: IZ = IR – IRL
• The Zener Power: PZ = VZIZ
When Vi < VZ
• The Zener is off
• The Zener acts as an open circuit
2.11 Zener Resistor Values
If R is too large, the Zener diode cannot

conduct because IZ < IZK. The minimum
current is given by:
ILmin  I R  IZK
The maximum value RLmax 

VZ
of resistance is: ILmin
:If R is too small, IZ > IZM . The maximum VL VZ

IL max  
allowable current for the circuit is given RL RL min
by
RVZ
The minimum value of resistance is: RL min 
Vi  VZ
2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
EXAMPLE 2.24 Determine the reference
voltages provided by the network of Fig.
2.109 , which uses a white LED to indicate
that the power is on. What is the level of
current through the LED and the power
delivered by the supply? How does the power
absorbed by the LED compare to that of the
6-V Zener diode?
Solution: First we have to check that there is
sufficient applied voltage to turn on all the
series diode elements. The white LED will
have a drop of about 4 V across it, the 6-V
and 3.3-V Zener diodes have a total of 9.3 V,
and the forward-biased silicon diode has 0.7
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V, for a total of 14 V.
2.11 ZENER DIODES
The applied 40 V is then sufficient to turn on all the
elements and, one hopes, establish a proper operating
current
Note that the silicon diode was used to create a reference
voltage of 4 V because
Vo1 = VZ2 + VK = 3.3 V + 0.7 V = 4.0 V
Combining the voltage of the 6-V Zener diode with the 4 V results in
Vo2 = Vo1 + VZ1 = 4 V + 6 V = 10 V
Finally, the 4 V across the white LED will leave a voltage of
40 V – 14 V = 26 V across the resistor, and
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2.11 ZENER DIODES
which should establish the proper brightness for the LED.
The power delivered by the supply is simply the product
of the supply voltage and current drain as follows:
The power absorbed by the Zener diode exceeds that of

the LED by 40 mW.
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2.11 ZENER DIODES
EXAMPLE 2.25 The network of Fig. 2.110 is designed to
limit the voltage to 20 V during the positive portion of the
applied voltage and to 0 V for a negative excursion of the
applied voltage. Check its operation and plot the
waveform of the voltage across the system for the
applied signal. Assume the system has a very high input
resistance so it will not affect the behavior of the network
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2.11 ZENER DIODES
Solution: For positive applied voltages less than the Zener
potential of 20 V the Zener diode will be in its approximate
open-circuit state, and the input signal will simply distribute
itself across the elements, with the majority going to the
system because it has such a high resistance level.
Once the voltage across the Zener diode reaches 20 V the
Zener diode will turn on as shown in Fig. 2.111a and the
voltage across the system will lock in at 20 V.
For the negative region of the applied signal the silicon diode
is reverse biased and presents an open circuit to the series
combination of elements. The result is that the full negatively
applied signal will appear across the open-circuited diode and
the negative voltage across the system locked in at 0 V, as
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2.11 ZENER DIODES
The voltage across the system will therefore appear as shown

in Fig. 2.111c .
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
The use of the Zener diode as a regulator is so common
that three conditions surrounding the analysis of the basic
Zener regulator are considered. The analysis provides an
excellent opportunity to become better acquainted with
the response of the Zener diode to different operating
conditions. The basic configuration appears in Fig. 2.112 .
The analysis is first for fixed quantities, followed by a fixed
supply voltage and a variable load, and finally a fixed load
and a variable supply
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2.11 ZENER DIODES
Vi and R Fixed
The simplest of Zener diode regulator networks appears
in Fig. 2.112 . The applied dc voltage is fixed, as is the
load resistor. The analysis can fundamentally be broken
down into two steps
1. Determine the state of the Zener diode by removing it
from the network and calculating the voltage across
the resulting open circuit.
Applying step 1 to the network of Fig.
2.112 results in the network of Fig. 2.113 ,
where an application of the voltage divider
rule results in
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2.11 ZENER DIODES
If V ≥ VZ, the Zener diode is on, and the appropriate
equivalent model can be substituted.
If V ˂ VZ, the diode is off, and the open-circuit
equivalence is substituted.
2. Substitute the appropriate equivalent circuit and solve
for the desired unknowns.
For the network of Fig. 2.112 , the “on” state will result in
the equivalent network of Fig. 2.114 . Since voltages
across parallel elements must be the same, we find that
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2.11 ZENER DIODES
The Zener diode current must be
determined by an application of
Kirchhoff’s current law. That is,
The power dissipated by the Zener diode is determined by
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2.11 ZENER DIODES
EXAMPLE 2.26
a) For the Zener diode network of Fig. 2.115 , determine
VL , VR , IZ , and PZ .
b) Repeat part (a) with RL = 3 kΩ
Solution:
a. Following the suggested
procedure, we redraw the
network as shown in Fig. 2.116
Applying Eq. (2.16) gives
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2.11 ZENER DIODES
Since V =8.73 V is less than VZ = 10 V, the diode is in the
“off” state, as shown on the characteristics of Fig. 2.117 .
Substituting the open-circuit equivalent results in the same
network as in Fig. 2.116 , where we find that
b. Applying Eq. (2.16) results in
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2.11 ZENER DIODES
Since V=12 V is greater than VZ= 10 V, the diode is in
the “on” state and the network of Fig. 2.118 results.
Applying Eq. (2.17) yields
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2.11 ZENER DIODES
The power dissipated is
which is less than the specified PZM = 30 mW.
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2.11 ZENER DIODES
Fixed Vi , Variable RL
Due to the offset voltage VZ , there is a specific range of
resistor values (and therefore load current) that will ensure
that the Zener is in the “on” state. Too small a load
resistance RL will result in a voltage VL across the load
resistor less than VZ , and the Zener device will be in the
“off” state.
To determine the minimum load resistance of Fig. 2.112
that will turn the Zener diode on, simply calculate the
value of RL that will result in a load voltage VL =VZ. That
is,
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2.11 ZENER DIODES
Solving for RL , we have
Any load resistance value greater than the RL obtained

from Eq. (2.20) will ensure that the Zener diode is in the
“on” state and the diode can be replaced by its VZ source
equivalent. The condition defined by Eq. (2.20) establishes
the minimum RL , but in turn specifies the maximum IL as
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2.11 ZENER DIODES
Once the diode is in the “on” state, the voltage across R
remains fixed at
and IR remains fixed at
The Zener current
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2.11 ZENER DIODES
resulting in a minimum IZ when IL is a maximum and a
maximum IZ when IL is a minimum value, since IR is
constant.
Since IZ is limited to IZM as provided on the data sheet, it
does affect the range of RL and therefore IL. Substituting
IZM for IZ establishes the minimum IL as
and the maximum load resistance as
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
EXAMPLE 2.27
a) For the network of Fig. 2.119, determine the range of
RL and IL that will result in VRL being maintained at 10V.
b) Determine the maximum wattage rating of the diode.
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
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2.11 ZENER DIODES
Fixed RL , Variable Vi
For fixed values of RL in Fig. 2.112 , the voltage Vi must
be sufficiently large to turn the Zener diode on. The
minimum turn-on voltage Vi = Vimin is determined by
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2.11 ZENER DIODES
Since IL is fixed at VZ = RL and IZM is the maximum value
of IZ , the maximum Vi is defined by
EXAMPLE 2.28 Determine the

range of values of Vi that will
maintain the Zener diode of
Fig. 2.121 in the “on” state.
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2.11 ZENER DIODES
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Electric Circuit & Electronics

Chapter 2 Diode Applications

• This chapter will develop a working knowledge of the

In the next section we

If we set VD=0 V in Eq. (2.1) and solve for ID , we have the

As shown in Fig. 2.2 . A straight line drawn between the

The resulting load line appears in Fig.

The level of VD is certainly an estimate, and the accuracy of ID is

An equivalent network (for these operating conditions

matching the results of Example 2.1 .

For this situation the dc resistance

Since the use of the approximate model normally results in

Analysis (for silicon)

Diodes ideally behave as

EXAMPLE 2.4 For the series diode configuration of Fig.

Solution: Since the applied voltage

EXAMPLE 2.5 Repeat Example 2.4 with the diode reversed.

EXAMPLE 2.6 For the series diode configuration

EXAMPLE 2.7 Determine Vo and ID for the series circuit of

EXAMPLE 2.8 Determine ID , VD2, and Vo for the circuit of

Applying Kirchhoff’s voltage law in a clockwise direction

Applying Kirchhoff’s voltage law around the indicated loop

At the bottom node a

The DC output voltage is 0.318Vm, where Vm = the peak AC voltage.

The rectification process can be

Full-wave rectification produces a

Half-wave: Vdc = 0.318Vm

During the period t=0 to T>2 the polarity of the input is

The net result is the configuration of Fig. 2.55 , with its

If silicon rather than ideal

Then again, if Vm is sufficiently greater than 2 VK , then Eq.

Solution: The network

Vo=(1/2)Vi or Vomax=(1/2)Vimax = 1/2(10 V) = 5 V,

as shown in Fig. 2.66 . For the

However, the PIV as determined from Fig. 2.59 is equal to

The Zener is a diode that is

If R is too large, the Zener diode cannot

The maximum value RLmax 

:If R is too small, IZ > IZM . The maximum VL VZ

The power absorbed by the Zener diode exceeds that of

The voltage across the system will therefore appear as shown

The power dissipated by the Zener diode is determined by

b. Applying Eq. (2.16) results in

The power dissipated is

which is less than the specified PZM = 30 mW.

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Any load resistance value greater than the RL obtained

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and IR remains fixed at

The Zener current

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and the maximum load resistance as

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