Zaaa Serials Skylake-U System Block Diagram: Sky Lake Ult 15W

5 4 3 2 1
ZAAA Serials SkyLake-U SYSTEM BLOCK DIAGRAM

BOM
D
VRAM X32 D
GPU GDDR5/ 1.35V

SKY LAKE ULT 15W PCIE1-4 P19
N16P-GT
MCP 1356pins PCI-E x4 N16S-GTR
TX/RX X4
N16S-GT1-KA
DDR4-SODIMM CHA Dual Channel DDR4 IMC N16S-GT1-KB
X'TAL 27MHz
P12
CLK
P14~P18
DDR4-SODIMM CHB EDP

eDP eDP Conn.
P13 X4 P21
DC+GT3e
DDI2
42 mm X 24 mm RTD2166 VGA Conn.
DP-2 X2 P22
SATA0 P21
SATA HDD
P26 SATA
+5V_S5 TPS25810RVCR
SATA ODD SATA1 P20
P26 Type-C connector
USB3.0 PTN36242LBS
C USB2-8 P20 C
P20
USB2-9
Finger print
P26 DDI1
DP-1 PTN3366BS HDMI Conn.
X4 P23
USB2-7 Integrated PCH P23
CCD(Camera) USB3-1 & USB3-2
P22
USB3.0/2.0
USB2-6 USB2-1 & USB2-2 USB3 Port MB side
Touch Screen USB3 port 2
P22 USB3 port 1 P29
USB2.0 PCI-E x1 M.2 SSD
USB2-5
Blue Tooth X1 P27
P27
I/O board CLK
USB2-4
PCIE-6
USB2 IO*2 I/O Board Conn. USB2-3
PCI-E x2 MINI CARD
P29 X1
WLAN+BT
P27
X'TAL
32.768KHz Cardreader
PCIE-5 CONN. 2in 1 P24
RTL8411B
DMIC_CLK0 X1 10/100/1G
B DMIC_DATA0 X'TAL 24MHz P24 RJ45 B
P24
CLK
P6 BATTERY RTC
Azalia P2~P10 I2C_0
IHDA
SPI X'TAL 25MHz
LPC
SPI ROM
8M+4M P7
EC
Int. D-MIC ALC255 TPM(option) BQ24780S RT8231BGQW UP1658RQKF
D-MIC Batery Charger P31 +1.2VSUS P35 +VGPU_CORE P36
AUDIO CODEC IT8987 P26
P25 P25 P30
RT6575AGQW ISL95859HRTZ-T RT8068AZQW
+3V/+5V P32 +VCORE/VCCSA/VCCGT +1.05V_GFX P41
P36
G5335QT2U G5335QT2U
+1V_S5 P33 Thermal Protection +1.35V_GFX P41
Discharger P39
HALL
NB681GD-Z
Universal HP Speaker*2 LED K/B Con. K/B BL Touch PAD Fan Driver +VCCOPC/+VCCEOPIO
Con. SENSOR (Fan signal)
A P25 P25 P28 P34 A
P28 P28 P28 P22 P28
5
Dr-Bios.com 4 3 2
Size
Date:
P7
Document Number
Quanta Computer Inc.
PROJECT : ZAA
Block Diagram
Monday, March 28, 2016
1
Sheet 1 of 48
Rev
1A
5 4 3 2 1
Skylake ULT (DISPLAY,eDP)

+3V
SKL_ULT
U35A
E55 C47 DDI2_AUXN R533 *100K_4

23 INT_HDMITX2N DDI1_TXN[0] EDP_TXN[0] EDP_TXN0 22
F55 C46
D 23 INT_HDMITX2P
E58 DDI1_TXP[0] EDP_TXP[0] D46
EDP_TXP0 22 eDP Panel DDI2_AUXP R532 *100K_4
D
HDMI
23 INT_HDMITX1P F58 C45 EDP_TXP1 22
F53 DDI1_TXP[1] EDP_TXP[1] A45
G53 B45
23
23
INT_HDMITX0P
INT_HDMICLK-
F56 DDI1_TXP[2] EDP_TXP[2] A47
EDP_TXP2
EDP_TXN3
22
22
For 4K
G56 DDI1_TXN[3] EDP_TXN[3] B47
23 INT_HDMICLK+ DDI1_TXP[3] EDP_TXP[3] EDP_TXP3 22 +3V
21 DDI2_TXN0 C50 E45 EDP_AUXN 22
D50 DDI2_TXN[0] DDI EDP EDP_AUXN F45
21 DDI2_TXP0 DDI2_TXP[0] EDP_AUXP EDP_AUXP 22
C52
21 DDI2_TXN1 DDI2_TXN[1] DP_UTIL PCH_BRIGHT SIO_EXT_SCI#
21 DDI2_TXP1 D52 B52 R546 *0_4 R781 20K/F_4
A50 DDI2_TXP[1] EDP_DISP_UTIL R553 *0_4
To PS8338 iC TP4395
B50 DDI2_TXN[2] G50
TP4394 DDI2_TXP[2] DDI1_AUXN +3V_S5
D51 F50
TP4392 DDI2_TXN[3] DDI1_AUXP DDI2_AUXN
C51 E48
TP4393 DDI2_TXP[3] DDI2_AUXN DDI2_AUXP DDI2_AUXN 21
F48
DDI2_AUXP G46
DDI2_AUXP 21 12/23 Modify
DISPLAY SIDEBANDS DDI3_AUXN F46 CRT_CLK R577 *2.2K_4
L13 DDI3_AUXP CRT_DATA R152 2.2K_4
23 HDMI_DDCCLK_SW
L12 GPP_E18/DDPB_CTRLCLK +3V_S5 L9
23 HDMI_DDCDATA_SW GPP_E19/DDPB_CTRLDATA +3V_S5 +3V_S5 GPP_E13/DDPB_HPD0 PCH_DP_HPD INT_HDMI_HPD 23
+3V_S5 L7 PCH_DP_HPD 21
CRT_CLK N7 GPP_E14/DDPC_HPD1 L6 PCH_TypeC_UPFb#
CRT_DATA N8 GPP_E20/DDPC_CTRLCLK +3V_S5 +3V_S5 GPP_E15/DDPD_HPD2 N9 R571 *short_4 SIO_EXT_SCI#
PCH_TypeC_UPFb# 20
GPP_E21/DDPC_CTRLDATA +3V_S5 +3V_S5 GPP_E16/DDPE_HPD3 L10 EDP_HPD
SIO_EXT_SCI# 30 +3V_S5
+3V_S5 GPP_E17/EDP_HPD EDP_HPD 22
N11
TP4390 GPP_E22/DDPD_CTRLCLK +3V_S5
26 PCH_ODD_EN N12
GPP_E23/DDPD_CTRLDATA +3V_S5 EDP_BKLTEN
R12 PCH_BLON 22 Type C change
R11 PCH_BRIGHT
EDP_BKLTCTL PCH_BRIGHT 22
24.9/F_4 R154 EDP_RCOMP E52 U13 PCH_TypeC_UPFb# R11251 20K/F_4
+VCCIO EDP_RCOMP EDP_VDDEN EDP_VDD_EN 22
1 OF 20
eDP_RCOMP SP@SKL_ULT/BGA
Trace length < 100 mils
Trace width = 20 mils
Trace spacing = 25 mils PCH_DP_HPD R564 100K_4
EDP_HPD R563 100K_4
C C
+1V_VCCST
100k pull-down on PCH side
1K_4 R529 CPU_THRMTRIP# H_PECI (50ohm)
Route on microstrip only
49.9/F_4 R788 CATERR#
Spacing >18 mils U35D SKL_ULT
Trace Length: 0.4~6.125 iches
Rev:E Stuff only for C2 build Debug
CATERR# D63
Ramp will remove H_PECI TP65
A54 CATERR#
30 H_PECI PECI
H_PROCHOT# R531 499/F_4 H_PROCHOT#_R C65
30,31,36 H_PROCHOT# PROCHOT# JTAG
THRMTRIP# R530 100/F_4 CPU_THRMTRIP# C63
Avoid 125Mhz A65 THERMTRIP# B61 XDP_TCK0
SKTOCC#
CPU MISC
PROC_TCK D60 XDP_TDI_CPU PCH JTAG
XDP_BPM#0 C55 PROC_TDI A61 XDP_TDO_CPU
+VCCIO TP89 XDP_BPM#1 BPM#[0] PROC_TDO XDP_TMS_CPU
JTAG_TCK,JTAG_TMS
BPM#[0:7] D55 C60
TP90 XDP_BPM#2 B54 BPM#[1] PROC_TMS B59 PCH_TRST# Trace Length < 9000mils +1V_VCCST
Trace Length 1~6 inches TP64 XDP_BPM#3 C56 BPM#[2] PROC_TRST# Change to +1V_VCCST 11/6
R465 1K_4 H_PROCHOT# Length match < 300 mils TP62 BPM#[3] B56 XDP_TCK1
A6 PCH_JTAG_TCK D59 XDP_TDI XDP_TDI_CPU
GPP_E3/CPU_GP0 +3V_S5 PCH_JTAG_TDI
R796 *short_4
A7 +3V_S5 A56 XDP_TDO R795 *short_4 XDP_TDO_CPU
BA5 GPP_E7/CPU_GP1 PCH_JTAG_TDO C59 XDP_TMS XDP_TMS_CPU XDP_TDO
4 DGPU_PW_CTRL# GPP_B3/CPU_GP2 +3V_S5 PCH_JTAG_TMS
R797 *short_4 R559 51_4
AY5 +3V_S5 C61 PCH_TRST# XDP_TMS R514 51_4
GPP_B4/CPU_GP3 PCH_TRST# A59 XDP_TCK0 XDP_TDI R515 51_4
JTAGX If use Intel DCI USB 3.0 fixture need to short
SM_RCOMP[0:2] R635 49.9/F_4 AT16 1. XDP_TDO <--> XDP_TDO_CPU
R646 49.9/F_4 AU16 PROC_POPIRCOMP XDP_TCK0 R513 *1K_4
Trace length < 500 mils PCH_OPIRCOMP 2. XDP_TDI <--> XDP_TDI_CPU
R158 49.9/F_4 H66
Trace width = 12~15 mils R162 49.9/F_4 H65 OPCE_RCOMP 3. XDP_TMS <--> XDP_TMS_CPU
Trace spacing = 20 mils OPC_RCOMP
4 OF 20
XDP_TCK0 R558 51_4
SP@SKL_ULT/BGA XDP_TCK1 R537 *51_4
PCH_TRST# R534 51_4
B B
2/16
,XDP_TCK1,XDP_TMS
don't need pull up or pull down
5/29 XDP_TCK0 R558 Stuff
+1V_VCCST
CPU thermal trip

+VCCIO 5,8,31,33,36,39
3
+1V_VCCST 5,8,9,36
IMVP_PWRGD_3V 2 Q31
U33 +1V_VCCST +3V FDV301N
1 5
1
NC VCC
1
R485 +1V_VCCST
2 C628 10K_4 R74
36 IMVP_PWRGD A *0.1u/16V_4 1K_4
A A
2
3 4 R488
Dr-Bios.com
GND Y IMVP_PWRGD_3V 8
2
*1K_4
*74AUP1G07GW
THRMTRIP# 1 3
SYS_SHDN# 30,32,39
Q5 MMBT3904-7-F
R478 *0_4

PROJECT : ZAA
Size Document Number Rev
1A
Skylake 1/4 (DDI/eDP)
Date: Monday, March 28, 2016 Sheet 2 of 48
5 4 3 2 1
5 4 3 2 1
Change Data and DQS to interleave.
SKL ULT (DDR3L) SKL ULT (DDR3L)

SKL_ULT
12 M_A_DQ[63:0] U35B SKL_ULT
13 M_B_DQ[63:0] U35C
D AU53 D
DDR0_CKN[0] M_A_CLK0# 12
M_A_DQ0 AL71 AT53
DDR0_DQ[0] DDR0_CKP[0] M_A_CLK0 12
M_A_DQ1 AL68 AU55 M_B_DQ0 AF65 AN45
DDR0_DQ[1] DDR0_CKN[1] M_A_CLK1# 12 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] M_B_CLK0# 13
M_A_DQ2 AN68 AT55 M_B_DQ1 AF64 AN46
DDR0_DQ[2] DDR0_CKP[1] M_A_CLK1 12 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] M_B_CLK1# 13
M_A_DQ3 AN69 M_B_DQ2 AK65 AP45
DDR0_DQ[3] DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] M_B_CLK0 13
M_A_DQ4 AL70 BA56 M_B_DQ3 AK64 AP46
DDR0_DQ[4] DDR0_CKE[0] M_A_CKE0 12 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] M_B_CLK1 13
M_A_DQ5 AL69 BB56 M_B_DQ4 AF66
DDR0_DQ[5] DDR0_CKE[1] M_A_CKE1 12 DDR1_DQ[4]/DDR0_DQ[20]
M_A_DQ6 AN70 AW56 M_B_DQ5 AF67 AN56
DDR0_DQ[6] DDR0_CKE[2] DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] M_B_CKE0 13
M_A_DQ7 AN71 AY56 M_B_DQ6 AK67 AP55
DDR0_DQ[7] DDR0_CKE[3] DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] M_B_CKE1 13
M_A_DQ8 AR70 M_B_DQ7 AK66 AN55
M_A_DQ9 AR68 DDR0_DQ[8] AU45 M_B_DQ8 AF70 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] AP53
DDR0_DQ[9] DDR0_CS#[0] M_A_CS#0 12 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3]
M_A_DQ10 AU71 AU43 M_B_DQ9 AF68
DDR0_DQ[10] DDR0_CS#[1] M_A_CS#1 12 DDR1_DQ[9]/DDR0_DQ[25]
M_A_DQ11 AU68 AT45 M_B_DQ10 AH71 BB42
DDR0_DQ[11] DDR0_ODT[0] M_A_ODT0_DIMM 12 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] M_B_CS#0 13
M_A_DQ12 AR71 AT43 M_B_DQ11 AH68 AY42
DDR0_DQ[12] DDR0_ODT[1] M_A_ODT1_DIMM 12 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1] M_B_CS#1 13
M_A_DQ13 AR69 M_B_DQ12 AF71 BA42
DDR0_DQ[13] DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] M_B_ODT0_DIMM 13
M_A_DQ14 AU70 BA51 M_A_A5 M_B_DQ13 AF69 AW42
DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1] M_B_ODT1_DIMM 13
M_A_DQ15 AU69 BB54 M_A_A9 M_B_DQ14 AH70
M_A_DQ16 BB65 DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] BA52 M_A_A6 M_B_DQ15 AH69 DDR1_DQ[14]/DDR0_DQ[30] AY48 M_B_A5
M_A_DQ17 AW65 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AY52 M_A_A8 M_B_DQ16 AT66 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AP50 M_B_A9
M_A_DQ18 AW63 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AW52M_A_A7 M_B_DQ17 AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BA48 M_B_A6
M_A_DQ19 AY63 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AY55 M_B_DQ18 AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] BB48 M_B_A8
DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_A_BG#0 12 DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
M_A_DQ20 BA65 AW54M_A_A12 M_B_DQ19 AN65 AP48 M_B_A7
M_A_DQ21 AY65 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] BA54 M_A_A11 M_B_DQ20 AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AP52
DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BG#0 13
M_A_DQ22 BA63 BA55 M_B_DQ21 AP66 AN50 M_B_A12
DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# M_A_ACT# 12 DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
M_A_DQ23 BB63 AY54 M_B_DQ22 AT65 AN48 M_B_A11
DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_BG#1 12 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
M_A_DQ24 BA61 M_B_DQ23 AU65 AN53
DDR0_DQ[24]/DDR0_DQ[40] DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# M_B_ACT# 13
M_A_DQ25 AW61 AU46 M_A_A13 M_B_DQ24 AT61 AN52
DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG#1 13
M_A_DQ26 BB59 AU48 M_B_DQ25 AU61
DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] M_A_CAS# 12 DDR1_DQ[25]/DDR0_DQ[57]
M_A_DQ27 AW59 AT46 M_B_DQ26 AP60 BA43 M_B_A13
DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] M_A_WE# 12 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
M_A_DQ28 BB61 AU50 M_B_DQ27 AN60 AY43
DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] M_A_RAS# 12 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] M_B_CAS# 13
M_A_DQ29 AY61 AU52 M_B_DQ28 AN61 AY44
DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] M_A_BA#0 12 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] M_B_WE# 13
M_A_DQ30 BA59 AY51 M_A_A2 M_B_DQ29 AP61 AW44
DDR0_DQ[30]/DDR0_DQ[46] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] M_B_RAS# 13
C M_A_DQ31 AY59 AT48 M_B_DQ30 AT60 BB44 C
DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] M_A_BA#1 12 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_BA#0 13
M_A_DQ32 AY39 AT50 M_A_A10 M_B_DQ31 AU60 AY47 M_B_A2
M_A_DQ33 AW39 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] BB50 M_A_A1 M_B_DQ32 AU40 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] BA44
DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_BA#1 13
M_A_DQ34 AY37 AY50 M_A_A0 M_B_DQ33 AT40 AW46M_B_A10
M_A_DQ35 AW37 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] BA50 M_A_A3 M_B_DQ34 AT37 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AY46 M_B_A1
M_A_DQ36 BB39 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] BB52 M_A_A4 M_B_DQ35 AU37 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] BA46 M_B_A0
M_A_DQ37 BA39 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] M_B_DQ36 AR40 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] BB46 M_B_A3
M_A_DQ38 BA37 DDR0_DQ[37]/DDR1_DQ[5] AM70 M_B_DQ37 AP40 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3] BA47 M_B_A4
DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] M_A_DQS#0 12 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4]
M_A_DQ39 BB37 AM69 M_B_DQ38 AP37
DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] M_A_DQS0 12 DDR1_DQ[38]/DDR1_DQ[22]
M_A_DQ40 AY35 AT69 M_B_DQ39 AR37 AH66
DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] M_A_DQS#1 12 DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] M_B_DQS#0 13
M_A_DQ41 AW35 AT70 M_B_DQ40 AT33 AH65
DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] M_A_DQS1 12 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] M_B_DQS0 13
M_A_DQ42 AY33 BA64 M_B_DQ41 AU33 AG69
DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] M_A_DQS#2 12 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] M_B_DQS#1 13
M_A_DQ43 AW33 AY64 M_B_DQ42 AU30 AG70
DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] M_A_DQS2 12 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] M_B_DQS1 13
M_A_DQ44 BB35 AY60 M_B_DQ43 AT30 AR66
M_A_DQ45 BA35 BA60 M_B_DQ44 AR33 AR65
M_A_DQ46 BA33 BA38 M_B_DQ45 AP33 AR61
M_A_DQ47 BB33 AY38 M_B_DQ46 AR30 AR60
M_A_DQ48 AY31 AY34 M_B_DQ47 AP30 AT38
M_A_DQ49 AW31 BA34 M_B_DQ48 AU27 AR38
DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] M_A_DQS5 12 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] M_B_DQS4 13
M_A_DQ50 AY29 BA30 M_B_DQ49 AT27 AT32
DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] M_A_DQS#6 12 DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] M_B_DQS#5 13
M_A_DQ51 AW29 AY30 M_B_DQ50 AT25 AR32
DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] M_A_DQS6 12 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] M_B_DQS5 13
M_A_DQ52 BB31 AY26 M_B_DQ51 AU25 AR25
DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] M_A_DQS#7 12 DDR1_DQ[51] DDR1_DQSN[6] M_B_DQS#6 13
M_A_DQ53 BA31 BA26 M_B_DQ52 AP27 AR27
DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] M_A_DQS7 12 DDR1_DQ[52] DDR1_DQSP[6] M_B_DQS6 13
M_A_DQ54 BA29 M_B_DQ53 AN27 AR22
DDR0_DQ[54]/DDR1_DQ[38] DDR1_DQ[53] DDR1_DQSN[7] M_B_DQS#7 13
M_A_DQ55 BB29 AW50 M_A_ALERT# M_B_DQ54 AN25 AR21
DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# M_A_ALERT# 12 DDR1_DQ[54] DDR1_DQSP[7] M_B_DQS7 13
M_A_DQ56 AY27 AT52 M_B_DQ55 AP25
DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR M_A_PARITY 12 DDR1_DQ[55]
M_A_DQ57 AW27 M_B_DQ56 AT22 AN43 M_B_ALERT#
DDR0_DQ[57]/DDR1_DQ[41] DDR1_DQ[56] DDR1_ALERT# M_B_ALERT# 13
M_A_DQ58 AY25 AY67 M_B_DQ57 AU22 AP43
DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA +VREF_CA_CPU DDR1_DQ[57] DDR1_PAR M_B_PARITY 13
M_A_DQ59 AW25 AY68 +VREFDQ_SA_M3 M_B_DQ58 AU21 AT13 CPU_DRAMRST#
M_A_DQ60 BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR CH - A
DDR0_VREF_DQ BA67 TP4344 For GDDR5 remove M_B_DQ59 AT21 DDR1_DQ[58] DRAM_RESET# AR18 SM_RCOMP_0
DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ +VREFDQ_SB_M3 DDR1_DQ[59] DDR_RCOMP[0]
M_A_DQ61 BA27 M_B_DQ60 AN22 AT18 SM_RCOMP_1
M_A_DQ62 BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR_VTT_CTRL M_B_DQ61 AP22 DDR1_DQ[60] DDR_RCOMP[1] AU18 SM_RCOMP_2
B M_A_DQ63 BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL +3V_S5 M_B_DQ62 AP21 DDR1_DQ[61] DDR_RCOMP[2] B
DDR0_DQ[63]/DDR1_DQ[47] M_B_DQ63 AN21 DDR1_DQ[62] DDR CH - B
2 OF 20 +1.2VSUS DDR1_DQ[63] 3 OF 20
SP@SKL_ULT/BGA
SP@SKL_ULT/BGA
R682
2
M_A_A[13:0] M_B_A[13:0]
M_A_A[13:0] 12 *100K_4 M_B_A[13:0] 13
R621 *10K_4 1 3 DDR_VTTT_PG_CTRL 35

M_A_ALERT# R11043 *0_4
Q35 M_B_ALERT# R11044 *0_4
*DTC144EU
REV:E connect to GND

For Sx ,stuff Q? in DDR_VTT_CNTL
DRAM COMP
+3V_S5 2,4,6,7,8,9,11,20,24,26,27,28,30,32,34,35,40
+1.2VSUS 5,12,13,35
SM_RCOMP_0 121/F_4 R685

DRAMRST SM_RCOMP_1 80.6/F_4 R678
+1.2VSUS
1 SM_RCOMP_2 100/F_4 R681
A R679 A
470_4
CPU DRAM
2
CPU_DRAMRST# R670 *short_4 DDR3_DRAMRST# 12,13
Dr-Bios.com 1
C750
*0.1u/16V_4
2
PROJECT : ZAA
Skylake 2/3 (DDR3 I/F) 1A

5 4 3 2 1
5 4 3 2 1
SKL ULT (SIDEBAND ) GPIO

H_PECI (50ohm)
Route on microstrip only SKL_ULT
Spacing >18 mils U35F
Trace Length: 0.4~6.125 iches Add GPU Power Control Siganls LPSS ISH
H_PWRGOOD (50ohm) TP4398 VGPU_EN AN8 +3V_S5

DGPU_HOLD_RST# GPP_B15/GSPI0_CS# P2
Trace Length: 1~11.25 inches 14 DGPU_HOLD_RST# AP7
GPP_B16/GSPI0_CLK
+3V_S5 +3V_S5 GPP_D9 P3
DGPU_PWR_EN AP8 +3V_S5 +3V_S5 GPP_D10
41 DGPU_PWR_EN GSPI0_MOSI GPP_B17/GSPI0_MISO P4
D
AR7
GPP_B18/GSPI0_MOSI
+3V_S5 +3V_S5 GPP_D11 P1 D
+3V_S5 GPP_D12
AM5 +3V_S5
16 DGPU_PWROK GC6_FB_EN GPP_B19/GSPI1_CS# M4
14,17 GC6_FB_EN AN7
GPP_B20/GSPI1_CLK
+3V_S5 +3V_S5 GPP_D5/ISH_I2C0_SDA N3
AP5 +3V_S5 +3V_S5 GPP_D6/ISH_I2C0_SCL
+3V_S5 17 DGPU_EVENT# GSPI1_MOSI GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
+3V_S5 N1
+3V_S5 GPP_D7/ISH_I2C1_SDA N2
AB1 +3V_S5 +3V_S5 GPP_D8/ISH_I2C1_SCL
I2C0_SDA 28 ACCEL_INTA GPP_C8/UART0_RXD
2.2K_4 R167 Touch PAD 26 ODD_PRSNT# AB2
GPP_C9/UART0_TXD
+3V_S5 AD11
2.2K_4 R166 I2C0_SCL TPD_INT#_D W4 +3V_S5 +1.8V_S5 GPP_F10/I2C5_SDA/ISH_I2C2_SDA
I2C1_SDA GPP_C10/UART0_RTS# AD12
*2.2K_4 R165 22 TP_INT_PCH AB3
GPP_C11/UART0_CTS#
+3V_S5 +1.8V_S5 GPP_F11/I2C5_SCL/ISH_I2C2_SCL
*2.2K_4 R169 I2C1_SCL
Touch Screen UART2_RXD AD1
GPP_C20/UART2_RXD +3V_S5 U1 Reserve UART FFC connector for Win 7 debug
UART2_TXD AD2 +3V_S5 +3V_S5 GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
UART2_RTS# GPP_C21/UART2_TXD U2 +3V_S5
PU 2.2K for touch pad I2C bus(400 KHz) UART2 for RMT AD3
GPP_C22/UART2_RTS# +3V_S5 +3V_S5 GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL U3
UART2_CTS# AD4 +3V_S5 +3V_S5 GPP_D15/ISH_UART0_RTS#
GPP_C23/UART2_CTS# U4
+3V_S5 GPP_D16/ISH_UART0_CTS#/SML0BALERT#
+3V GPU Control PU/PD I2C0_SDA AC1 UART2_RXD
28 I2C0_SDA U7
GPP_C16/I2C0_SDA
+3V_S5 +3V_S5 GPP_C12/UART1_RXD/ISH_UART1_RXD AC2
R275 *49.9K/F_4
I2C0_SCL U6 +3V_S5 +3V_S5 UART2_TXD R280 *49.9K/F_4
Touch PAD 28 I2C0_SCL GPP_C17/I2C0_SCL
GPP_C13/UART1_TXD/ISH_UART1_TXD AC3 UART2_RTS#
+3V_S5 GPP_C14/UART1_RTS#/ISH_UART1_RTS# AB4
R283 *49.9K/F_4
I2C1_SDA U8 +3V_S5 +3V_S5 GPP_C15/UART1_CTS#/ISH_UART1_CTS# UART2_CTS# R290 *49.9K/F_4
22 I2C1_SDA I2C1_SCL GPP_C18/I2C1_SDA
Touch Screen U9 +3V_S5
22 I2C1_SCL GPP_C19/I2C1_SCL AY8
*EV@10K_4 R257 DGPU_PWR_EN *EV@100K_4 R256 +3V_S5 GPP_A18/ISH_GP0 BA8
AH9 +1.8V_S5 +3V_S5 GPP_A19/ISH_GP1
GC6_FB_EN GPP_F4/I2C2_SDA BB7
*GC6@10K_4 R204 *GC6@10K_4 R199 AH10
GPP_F5/I2C2_SCL
+1.8V_S5 +3V_S5 GPP_A20/ISH_GP2 BA7
+3V_S5 GPP_A21/ISH_GP3 AY7
1A-1 20131015 For GC6 NV DG GC6_FB_EN PD. AH11
GPP_F6/I2C3_SDA +1.8V_S5 +3V_S5 GPP_A22/ISH_GP4 AW7
AH12
GPP_F7/I2C3_SCL
+1.8V_S5 +3V_S5 GPP_A23/ISH_GP5 AP13
+3V +3V_S5 GPP_A12/BM_BUSY#/ISH_GP6
AF11 +1.8V_S5 UART2_RXD
AF12 GPP_F8/I2C4_SDA UART2_TXD TP4354
GPP_F9/I2C4_SCL +1.8V_S5 TP4355
R208 EV@10K_4 DGPU_HOLD_RST# UART2_RTS#
6 OF 20 UART2_CTS# TP4356
TP4357
SP@SKL_ULT/BGA
high UMA Only

C DGPU_PW_CTRL# GPU power is control by PCH SKL_ULT
C
U35G
low GPIO (Discrete, SG or Optimize)
HDA C742 *10p/50V_4 AUDIO
+3V R667 33_4 HDA_SYNC_R BA22

25 PCH_AZ_CODEC_SYNC HDA_BCLK_R HDA_SYNC/I2S0_SFRM
R644 33_4 AY22
2 DGPU_PW_CTRL# 25 PCH_AZ_CODEC_BITCLK HDA_SDO_R HDA_BLK/I2S0_SCLK
25 PCH_AZ_CODEC_SDOUT R645 33_4 BB22 SDIO/SDXC
BA21 HDA_SDO/I2S0_TXD
DGPU_PW_CTRL# 25 PCH_AZ_CODEC_SDIN0 HDA_SDI0/I2S0_RXD
R127 EV@100K_4 R115 IV@1K_4 AY21 +3V_S5 AB11
DGPU_PWROK HDA_RST#_R HDA_SDI1/I2S1_RXD SD GPI GPP_G0/SD_CMD
R110 *EV@10K_4 25 PCH_AZ_CODEC_RST# R660 33_4 AW22
HDA_RST#/I2S1_SCLK
+3V_S5 SD GPI GPP_G1/SD_DATA0
AB13
J5 +3V_S5 AB12
DGPU_PWROK PD on GPU side AY20 GPP_D23/I2S_MCLK +3V_S5 +3V_S5 SD GPI GPP_G2/SD_DATA1 W12
AW20 I2S1_SFRM SD GPI GPP_G3/SD_DATA2 W11
C739
I2S1_TXD +3V_S5 SD GPI GPP_G4/SD_DATA3
22p/50V_4 +3V_S5 W10
SD GPI GPP_G5/SD_CD#
AK7
GPP_F1/I2S2_SFRM
+1.8V_S5 +3V_S5 SD GPI GPP_G6/SD_CLK
W8
AK6 +1.8V_S5 +3V_S5 W7
VGA H/W Setup GPP_F0/I2S2_SCLK SD GPI GPP_G7/SD_WP
DGPU_PW_CTRL# AK9
GPP_F2/I2S2_TXD
+1.8V_S5
Signal Menu AK10 +1.8V_S5 BA9
GPP_F3/I2S2_RXD +3V_S5 GPP_A17/SD_PWR_EN#/ISH_GP7 BB9
UMA Only 1 UMA Hidden UMA boot +3V_S5 GPP_A16/SD_1P8_SEL
TP4372 DMIC_CLK0_R H5 AB7 200/F_4 R174
TP4373 DMIC_DATA0_R D7 GPP_D19/DMIC_CLK0 +3V_S5 SD_RCOMP
SG/Optimise 0 GPU Hidden GPU boot GPP_D20/DMIC_DATA0 +3V_S5
D8 AF13
Strapping C8 GPP_D17/DMIC_CLK1 +3V_S5 +1.8V_S5 GPP_F23
SPKR R624 *20K_4 GPP_D18/DMIC_DATA1 +3V_S5
SPKR AW5
545659-103
25 SPKR GPP_B14/SPKR +3V_S5
7 OF 20
Skylake-U Strapping Table SP@SKL_ULT/BGA Touchpad INT +3V_S5
Pin Name Strap description Sampled Configuration note TPD_INT#_D 10K_4 R177
0 = *Disable Top Swap (iPD 20K) R625 *1K_4 SPKR
B GPP_B14 (SPKR) Top-Block Swap override PCH_PWROK +3V B
1 = Enable Top Swap Mode
0 = *Disable No Reboot (iPD 20K) GSPI0_MOSI +3V
GPP_B18 No reboot PCH_PWROK +3V R619 *1K_4
(GSPI0_MOSI) 1 = Enable No Reboot Mode S5 S5
2
0 = *Disable Intel ME Cryp to TLS(iPD 20K) R160 *10K_4 1 3 TPD_INT#_D
GPP_C2 TLS Confidentiality RSMRST# +3V_S5 SMBALERT# 7 28,30 TPD_INT#
(SMBALERT#) 1 = Enable Intel ME Cryp to TLS Q20
0 = *SPI (iPD 20K) *TDI@2N7002K
R207 *1K_4 GSPI1_MOSI
GPP_B22 Boot BIOS Strap Bit (BBS) PCH_PWROK +3V
R164 *short_4
(GSPI1_MOSI) 1 = LPC
0 = *LPC is selected for EC (iPD 20K)
GPP_C5 eSPI or LPC RSMRST# +3V_S5 R586 *1K_4 SML0ALERT# 7 Rev:D change to
(SML0ALERT#) 1 = eSPI selected for EC shortpad
SPI0_MOSI Reserved RSMRST# (iPU 15 ~ 40K)
SPI0_MISO Reserved RSMRST# (iPU 15 ~ 40K)
GPP_B23
(SML1ALERT# Reserved RSMRST# (iPD 20K) +3V_S5 2,3,6,7,8,9,11,20,24,26,27,28,30,32,34,35,40
+3V 2,6,7,8,9,12,13,14,16,21,22,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41
/PCHHOT#)
SPI0_IO2 Reserved RSMRST# (iPU 15 ~ 40K)
A SPI0_IO3 Reserved RSMRST# (iPU 15 ~ 40K) A
Dr-Bios.com
0 = *Enable security in the Flash
HDA_SDO / Flash Descriptor Security
Description (iPD 20K) change location to near CPU to prevent impact HDA_SDO signal
I2S_TXD0 Override / Intel ME Debug Mode PCH_PWROK HDA_SDO_R
1 = Disable Flash Descriptor Security (Override) R737 1K_4
ME_WR# 30
GPP_E19 0 = *Port B is not detected (iPD 20K)

Display Port B Detected PCH_PWROK
(DDPB_CTRLDATA) 1 =Port B is detected Quanta Computer Inc.
GPP_E21
0 = *Port C is not detected (iPD 20K) PROJECT : ZAA
Display Port C Detected PCH_PWROK 1 =Port C is detected Size Document Number Rev
(DDPC_CTRLDATA) 1A
Skylake 6/7 (PEG/DMI/FDI)
5 4 3 2 1
5 4 3 2 1
+VCCCORE
U35L SKL_ULT +VCCCORE
Backside cap A30

CPU POWER 1 OF 4
G32 Primary side cap

VCC_A30 VCC_G32
A34
VCC_A34 S0 VCC VCC_G33
G33
C184
C243 C233 C226 C203 C219 C224 C236 C255 C251
A39
A44 VCC_A39 0.55V~1.5V VCC_G35
G35
G37 C666 C645 C144 C650 C659 C150
VCC_A44 VCC_G37
1U/6.3V_4 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 AK33
VCC_AK33 2+2 peak 24A VCC_G38
G38 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8
AK35
VCC_AK35 2+2 TPY 17A VCC_G40
G40
Backside cap Primary side cap

AK37 G42
VCC_AK37 VCC_G42
AK38
VCC_AK38 2+3e peak 24A VCC_J30
J30
AK40
VCC_AK40 2+3e TPY 17A VCC_J33
J33
AL33 J37
C214 C245 AL37 VCC_AL33 VCC_J37 J40 C679 C667 C674 C664 C673 C675 C663 C678
C676 C258 C259 C647 C651 C657 C257 AL40 VCC_AL37 VCC_J40 K33 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4
1U/6.3V_4 1U/6.3V_2 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 AM32 VCC_AL40 VCC_K33 K35
AM33 VCC_AM32 VCC_K35 K37
VCC_AM33 VCC_K37
Backside cap
AM35 K38
AM37 VCC_AM35 VCC_K38 K40 +VCCCORE
D AM38 VCC_AM37 VCC_K40 K42 D
VCC_AM38 VCC_K42
R96 100/F_4 100 ohm Near CPU
G30 K43 VCORE_SENSE 36
C189 C252 C222 C235 VCC_G30 VCC_K43
VCORESS_SENSE 36
C273 C272 C282 C289 TP12 K32 E32 +1V_VCCST
22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_2 RSVD_K32 VCC_SENSE E33 R98 100/F_4 SVID Layout note: need routing together
TP20 AK32 VSS_SENSE and ALERT need between CLK and DATA.
RSVD_AK32 H_CPU_SVIDART#
Backside cap +VCCOPC B63
VIDALERT# H_CPU_SVIDCLK
AB62
P62 VCCOPC_AB62S0 1.0V 3A VIDSCK
A63
D64 H_CPU_SVIDDAT R138 C814 C815 C816 C817 C818 C819
For 2+3e CPU V62 VCCOPC_P62 VIDSOUT 100/F_4 1000P/50V_4 *1000P/50V_4 *1000P/50V_4 *1000P/50V_4 *1000P/50V_4 *1000P/50V_4
C212 C196 C201 C262 C215 C227 C246 VCCOPC_V62 G20
+1.8V_PRIM VCCSTG_G20 +VCCSTG
+1.8V_PRIM H63
VCC_OPC_1P8_H63
1U/6.3V_4 1U/6.3V_2 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
Sx C174
H_CPU_SVIDDAT
+VCCOPC R172 GT3@100/F_4 G61
VCC_OPC_1P8_G61 1.8V 50mA H_CPU_SVIDDAT 36
Backside cap
1U/6.3V_4
34 +VCCOPC_SRC R634 GT3@0_4 AC63 Place PU resistor
R636 GT3@0_4 AE63 VCCOPC_SENSE
34 681_AGND VSSOPC_SENSE GT3 CPU close to CPU +1V_VCCST
C181 C228 C269 C237 C209 C285 C200 R176 GT3@100/F_4 AE62 DATA & CLK
VCCEOPIO
AG62
VCCEOPIO S0 1.0V 3A must be equal (± 0.1 inch).
1U/6.3V_4 1U/6.3V_4 1U/6.3V_2 1U/6.3V_4 1U/6.3V_4 1U/6.3V_2 1U/6.3V_4 Place PU resistor
+VCCEOPIO AL63 close to CPU R134
AJ62 VCCEOPIO_SENSE 54.9/F_4
VSSEOPIO_SENSE
100 ohm near CPU
For 2+3e CPU 12 OF 20 H_CPU_SVIDART# R552 220_4 VR_SVID_ALERT#_VCORE 36
+VCCEOPIO Backside cap +VCCOPC_SRC

681_AGND
R633
R632
GT3@0_4
GT3@0_4
SP@SKL_ULT/BGA
U35M SKL_ULT +VCCGT H_CPU_SVIDCLK

C708 C709 For 2+3e CPU H_CPU_SVIDCLK 36
Primary side cap

GT3@10u/6.3V_4 GT3@10u/6.3V_4 CPU POWER 2 OF 4
N70
A48 VCCGT N71
+VCCOPC VCCGT VCCGT
Backside cap 1.0V_CPU 3A A53 R63
VCCGT VCCGT
A58
VCCGT S0 VCCGT VCCGT
R64 C199 C190 C702 C690 C248 C697 C696
+VCCOPC A62
VCCGT 0.55~1.5V VCCGT
R65 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8 47u/6.3V_8
Backside cap
+1.8V_PRIM A66 R66
VCCGT VCCGT
2+2 peak 31A
Primary side cap
C688 C684 C681 C685 C683 C689 AA63 R67
VCCGT VCCGT
C682 AA64
VCCGT 2+2 TPY 15A VCCGT
R68
C687 C686 GT3@10u/6.3V_4
GT3@1U/6.3V_4
GT3@1U/6.3V_4
GT3@1U/6.3V_4
GT3@1U/6.3V_4
GT3@1U/6.3V_4
GT3@1U/6.3V_4 AA66 R69
GT3@10u/6.3V_4 GT3@10u/6.3V_4 For 2+3e CPU AA67 VCCGT
2+3e peak 56A
VCCGT R70
VCCGT VCCGT
AA69
VCCGT 2+3e TPY 17A VCCGT
R71 C693 C705 C178 C706 C171 C707 C210
AA70 T62 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
For 2+3e CPU AA71 VCCGT VCCGT U65
C VCCGT VCCGT C
Primary side cap

R565 AC64 U68
GT3@0_6 AC65 VCCGT VCCGT U71
+1.8V_S5 +1.8V_PRIM +VCCGT VCCGT VCCGT
Backside cap
AC66 W63
AC67 VCCGT VCCGT W64
AC68 VCCGT VCCGT W65
AC69 VCCGT VCCGT W66 C692 C704 C202 C694 C691 C703
AC70 VCCGT VCCGT W67 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6 22u/6.3V_6
C186 C185 C155 C158 C232 C218 C151 C161 C223 C148 AC71 VCCGT VCCGT W68
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 J43 VCCGT VCCGT W69
J45 VCCGT VCCGT W70
J46 VCCGT VCCGT W71
VCCGT VCCGT
Backside cap
J48 Y62
VCCGT VCCGT +VCCGT
Primary side cap
J50
VCCGT
J52
VCCGT S0 VCCGTX
C197 C194 C193 C188 C241 C240 C239 C198 C204 C206 J53
J55 VCCGT 0.55~1.5V VCCGTX_AK42
AK42
AK43
VCCGT VCCGTX_AK43
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 J56
VCCGT 2+2 X VCCGTX_AK45
AK45
J58 AK46 C303 C310 C277 C302 C307 C274 C275 C276
VCCGT VCCGTX_AK46
J60
VCCGT 2+3e peak 6A VCCGTX_AK48 AK48 GT3@22u/6.3V_6
GT3@22u/6.3V_6
GT3@22u/6.3V_6
GT3@22u/6.3V_6
GT3@22u/6.3V_6
GT3@22u/6.3V_6
GT3@22u/6.3V_6
GT3@22u/6.3V_6
K48
VCCGT 2+3e TPY 4A VCCGTX_AK50 AK50
K50 AK52
C205 C195 K52 VCCGT VCCGTX_AK52 AK53
K53 VCCGT VCCGTX_AK53 AK55
VCCGT VCCGTX_AK55
Backside cap
1U/6.3V_4 1U/6.3V_4 K55 AK56
L62 VCCGT VCCGTX_AK70 AL43
L63 VCCGT VCCGTX_AL43 AL46 C291 C279 C281 C324 C316 C280 C290 C317
L64 VCCGT VCCGTX_AL46 AL50 GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
GT3@10u/6.3V_4
L65 VCCGT VCCGTX_AL50 AL53
+VCCCORE 36,37 VCCGT VCCGTX_AL60
L68 AM48
+VCCOPC 34
L69 VCCGT VCCGTX_AM48 AM50 For 2+3e CPU
L70 VCCGT VCCGTX_AM50 AM52
+VCCEOPIO 34 +VCCGT VCCGT VCCGTX_AM52
L71 AM53
M62 VCCGT VCCGTX_AM53 AM56
N63 VCCGT VCCGTX_AM56 AM58
N64 VCCGT VCCGTX_AM58 AU58
R155 N66 VCCGT VCCGTX_AU58 AU63
+1.8V_S5 8,9,10,39 VCCGT VCCGTX_AU63
100 ohm Near CPU 100/F_4 N67 BB57
+VCCGT 36,37 VCCGT VCCGTX_BB57
N69 BB66
VCCGT VCCGTX_BB66
B +1V_VCCST 2,8,9,36 B
36 VCCGT_SENSE J70 AK62
J69 VCCGT_SENSE VCCGTX_SENSE AL61
36 VSSGT_SENSE VSSGT_SENSE VSSGTX_SENSE
13 OF 20
R161
+VCCIO 2,8,31,33,36,39 SP@SKL_ULT/BGA
100/F_4
+VCCSA 36,38
+1.2VSUS 3,12,13,35
+1V_SUS 33 +1.2VSUS U35N SKL_ULT
+VCCIO
S0
Backside cap S3
CPU POWER 3 OF 4
0.85V/0.95V
Backside cap Imax 3(A)
VDDQ_AU23 DDR3L
AU23 AK28
VCCIO
AU28
VDDQ_AU28 1.35V 3.0A VCCIO
AK30
AU35 AL30
VDDQ_AU35 VCCIO
VDDQ_AU42 2A
C313 C308 C311 C312 AU42 AL42 C266 C297 C264 C298
C318 C328 BB23 VCCIO AM28 C284 C283
10u/6.3V_4 10u/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 BB32 VDDQ_BB23 VCCIO AM30 10u/6.3V_4 10u/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
BB41 VDDQ_BB32 VCCIO AM42
VDDQ_BB41 VCCIO
Primary side cap
BB47
VDDQ_BB47
S0 1.15V
Primary side cap
BB51 AK23
VDDQ_BB51 VCCSA
2+2 peak 5A VCCSA
AK25
2+2 TPY 4A VCCSA
G23
AM40
VDDQC 2+3e peak 5.1A VCCSA
G25 C701 C710 C700 C711
2+3e TPY 5A VCCSA
G27
A18 G28 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
C326 C323 C325 C327 VCCST S3 1.0V 120mA VCCSA J22
10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 A22 VCCSA J23 +VCCSA
VCCSTG_A221.0V 40mA VCCSA
Backside cap
J27
AL23 S0 VCCSA K23
+VDDQC VCCPLL_OC VCCSA K25
K20 S0 1.0V 260mA VCCSA K27
R194 *short_4 K21 VCCPLL_K20 VCCSA K28 C254 C238 C247 C229 C221 C263 C288
+1.2VSUS VCCPLL_K21 VCCSA
Backside cap
K30 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4
C299 +1V_VCCST S3 1.0V 120mA VCCSA
C286 AM23 TP17
VCCIO_SENSE
Backside cap
1U/6.3V_4 10u/6.3V_4 AM22 TP14
VSSIO_SENSE
C677 H21
R550 *short_6 +VCCSTG VSSSA_SENSE H20 C207 C278 C216 C242 C260 C267 C249
+1V_SUS VCCSA_SENSE
1U/6.3V_4 R109 100/F_4
Primary side cap SP@SKL_ULT/BGA

14 OF 20
VSASS_SENSE 36
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
C176 VSA_SENSE 36
Primary side cap

A +VCCIO R135 *short_6 A
Backside cap
1U/6.3V_4 +VCCSA
+VCCPLL R122 100/F_4
C114 C643 C641 C165 C642 C157
Dr-Bios.com
+1V_SUS R112 *short_6 100 ohm near CPU 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4
C172
Rev:D change to shortpad
Primary side cap
1U/6.3V_4

PROJECT : ZAA
1A
Skylake 12/13/14 (POWER)
5 4 3 2 1
5 4 3 2 1
+3V 2,4,7,8,9,12,13,14,16,21,22,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41
+3V_S5
+3VPCU
2,3,4,7,8,9,11,20,24,26,27,28,30,32,34,35,40
9,11,22,24,25,26,27,28,30,31,32,39,40,41 Skylake ULT (GPU, SATA , ODD, CLK ,USB2&3)
+3V_RTC 8,9,30
+1V_S5 9,33
SKL_ULT
U35H
SSIC / USB3
PCIE/USB3/SATA
H8
USB3_1_RXN G8
USB3_RXN0
USB3_RXP0
29
29
PCH PU/PD +3V_S5
H13 USB3_1_RXP C13
14 PEG_RX#0
G13 PCIE1_RXN/USB3_5_RXN USB3_1_TXN D13
USB3_TXN0 29 MB USB3.0 ( Charger IC )
14 PEG_RX0 C_PEG_TX#0 PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB3_TXP0 29
14 PEG_TX#0 C653 [email protected]/10V_4 B17
D
C652 [email protected]/10V_4 C_PEG_TX0 A17 PCIE1_TXN/USB3_5_TXN J6 USB_OC0# R541 10K_4
D
14 PEG_TX0 PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN USB3_RXN1 29 USB_OC1#
H6 R540 10K_4
USB3_2_RXP/SSIC_1_RXP USB3_RXP1 29 USB_OC2#
14 PEG_RX#1 G11 B13 USB3_TXN1 29 MB USB3.0 R543 10K_4
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN A13 USB_OC3# R542 10K_4
14 PEG_RX1 C_PEG_TX#1 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP USB3_TXP1 29
14 PEG_TX#1 C656 [email protected]/10V_4 D16
C655 [email protected]/10V_4 C_PEG_TX1 C16 PCIE2_TXN/USB3_6_TXN J10
dGPU PEG*4 14 PEG_TX1 PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN H10
USB3_RXN2 20
USB3_3_RXP/SSIC_2_RXP USB3_RXP2 20
14 PEG_RX#2 H16 B15 USB3_TXN2 20
G16 PCIE3_RXN USB3_3_TXN/SSIC_2_TXN A15 +3V
14 PEG_RX2 C_PEG_TX#2 PCIE3_RXP USB3_3_TXP/SSIC_2_TXP USB3_TXP2 20
14 PEG_TX#2 C661 [email protected]/10V_4 D17 For TYPE-C
C662 [email protected]/10V_4 C_PEG_TX2 C17 PCIE3_TXN E10
14 PEG_TX2 PCIE3_TXP USB3_4_RXN USB3_RXN3 20
F10
USB3_4_RXP USB3_RXP3 20 SATA_DEVSLP0
14 PEG_RX#3 G15 C15 USB3_TXN3 20 R573 *10K_4
F15 PCIE4_RXN USB3_4_TXN D15 SATA_DEVSLP1 R574 *10K_4
14 PEG_RX3 C_PEG_TX#3 PCIE4_RXP USB3_4_TXP USB3_TXP3 20 SATA_DEVSLP2
14 PEG_TX#3 C654 [email protected]/10V_4 B19 R575 *10K_4
C660 [email protected]/10V_4 C_PEG_TX3 A19 PCIE4_TXN AB9 PIRQA# R631 *10K_4
14 PEG_TX3 PCIE4_TXP USB2N_1 USBP0- 29
AB10 MB USB3.0 ( Charger IC )
USB2P_1 USBP0+ 29
F16
E16 PCIE5_RXN AD6 SATAGP1 R569 *10K_4
PCIE5_RXP USB2N_2 USBP1- 29
C19 AD7 USBP1+ 29 MB USB3.0
D19 PCIE5_TXN USB2P_2
PCIE5_TXP AH3
USB2N_3 USBP2- 29
For Thunderbolt G18 AJ3 DB USB2.0
F18 PCIE6_RXN USB2P_3 USBP2+ 29
D20 PCIE6_RXP AD9
PCIE6_TXN USB2N_4 USBP3- 29
C20 AD10 For 17" DB use
PCIE6_TXP USB2P_4 USBP3+ 29 +3V_S5
Add SSD ID 1/14
F20 AJ1 USBP4- 27
26 SATA_RXN0 E20 PCIE7_RXN/SATA0_RXN USB2N_5 AJ2
26 SATA_RXP0
B21 PCIE7_RXP/SATA0_RXP USB2P_5 USBP4+ 27 BT Hight is SSD , Low is ODD
HDD 26 SATA_TXN0
A21 PCIE7_TXN/SATA0_TXN
USB2
AF6
26 SATA_TXP0 PCIE7_TXP/SATA0_TXP USB2N_6 AF7 USBP5- 22
USBP5+ 22 Touch Screen 26 SSD_ID R568 10K_4 SATAGP0 R570 100K_4
G21 USB2P_6
26 SATA_RXN1 F21 PCIE8_RXN/SATA1A_RXN AH1
26 SATA_RXP1 PCIE8_RXP/SATA1A_RXP USB2N_7 USBP6- 22
ODD D21 AH2 USBP6+ 22 CCD
26 SATA_TXN1 PCIE8_TXN/SATA1A_TXN USB2P_7
C21
26 SATA_TXP1 PCIE8_TXP/SATA1A_TXP AF8
USB2N_8 USBP7- 20
C 24 PCIE_RX5-_LAN E22 AF9 USBP7+ 20 For TYPE-C C
E23 PCIE9_RXN USB2P_8
24 PCIE_RX5+_LAN PCIE_TX5- PCIE9_RXP
LAN 24 PCIE_TX5-_LAN C668 0.1u/16V_4 B23 AG1 USBP8- 26
C669 0.1u/16V_4 PCIE_TX5+ A23 PCIE9_TXN USB2N_9 AG2
24 PCIE_TX5+_LAN PCIE9_TXP USB2P_9 USBP8+ 26 POA Skylake-U userd 24 MHz (50 Ohm ESR) XTAL
27 PCIE_RX6-_WLAN F25 AH7 TP4377
E25 PCIE10_RXN USB2N_10 AH8 TP4378
27 PCIE_RX6+_WLAN PCIE_TX6- PCIE10_RXP USB2P_10 USBCOMP
WIFI C648 0.1u/16V_4 D23 C665 10P/50V_4
27 PCIE_TX6-_WLAN
C649 0.1u/16V_4 PCIE_TX6+ C23 PCIE10_TXN AB6 USBCOMP R178 113/F_4
Impedance = 50 ohm
27 PCIE_TX6+_WLAN PCIE10_TXP USB2_COMP Trace length < 500 mils 24MHz: BG624000078
AG3 USB2_ID R587 1K_4
USB2_ID
3
4
R562 100/F_4 PCIE_RCOMPN F5 AG4 R778 1K_4 Trace spacing = 15 mils 38.4MHz : ?
PCIE_RCOMPP E5 PCIE_RCOMPN USB2_VBUSSENSE Y4
PCIE_RCOMPP +3V_S5 A9 USB_OC0# R536
XDP_PRDY# D56 GPP_E9/USB2_OC0# C9 USB_OC1# USB_OC0# 29 MB U3 24MHz
TP91 PROC_PRDY# +3V_S5 GPP_E10/USB2_OC1# USB_OC1# 29 MB U3 1M_4
XDP_PREQ# D61 D9 USB_OC2#
TP92 +3V_S5 USB_OC2# 29 DB U2
1
2
PROC_PREQ# GPP_E11/USB2_OC2# USB_OC3# XTAL24_IN
PIRQA# BB11
GPP_A7/PIRQA#
+3V_S5 +3V_S5 GPP_E12/USB2_OC3#
B9 USB_OC3# 20 TYPE C XTAL24_OUT C658 10P/50V_4
E28 +3V_S5 J1 SATA_DEVSLP0
27 SATA_RXN3/PEG_RXN9_L0 PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 SATA_DEVSLP1 DEVSLP0 26
E27 J2
27 SATA_RXP3/PEG_RXP9_L0 D24 PCIE11_RXP/SATA1B_RXP +3V_S5 GPP_E5/DEVSLP1 J3 SATA_DEVSLP2
For M.2 SSD -NA 27 SATA_TXN3/PEG_TXN9_L0
C24 PCIE11_TXN/SATA1B_TXN +3V_S5 GPP_E6/DEVSLP2 DEVSLP2 27
27 SATA_TXP3/PEG_TXP9_L0 E30 PCIE11_TXP/SATA1B_TXP H2 SATAGP0
27 SATA_RXN3/PEG_RXN10_L1
F30 PCIE12_RXN/SATA2_RXN +3V_S5 GPP_E0/SATAXPCIE0/SATAGP0 H3 SATAGP1 Note: Change Y4 to 38.4 MHz(ESR 30 ohm) for Cannonlake U
27 SATA_RXP3/PEG_RXP10_L1
A25 PCIE12_RXP/SATA2_RXP +3V_S5 GPP_E1/SATAXPCIE1/SATAGP1 G4
For M.2 SSD -1 27 SATA_TXN3/PEG_TXN10_L1 B25 PCIE12_TXN/SATA2_TXN +3V_S5 GPP_E2/SATAXPCIE2/SATAGP2 NGFF_SATA_DET 27
27 SATA_TXP3/PEG_TXP10_L1 PCIE12_TXP/SATA2_TXP H1
+3V_S5 GPP_E8/SATALED#
CH01006JB08 -> 10p
8 OF 20
RTC Clock 32.768KHz (RTC) CH01506JB06 -> 15p
SP@SKL_ULT/BGA CH-6806TB01 -> 6.8p
C351 15p/50V_4 RTC_X1
1
Trace length < 1000 mils BG332768453 -> SEG
Y2 R255 BG332768104 -> TXC
32.768KHZ 10M_4
U35J SKL_ULT
B RTC_X2
ZAAA 2nd BG332768111 B
C362 15p/50V_4
2
N16 VGA
CLOCK SIGNALS
D42
14 CLK_PCIE_VGA# CLKOUT_PCIE_N0
14 CLK_PCIE_VGA C42
R235 *short_4 CLK_PCIE_REQ0# AR10 CLKOUT_PCIE_P0
14 CLK_PEGA_REQ# GPP_B5/SRCCLKREQ0# +3V_S5
R11112 *short_4 NGFF_SSD_CLK#_C B42
27 NGFF_SSD_CLK# NGFF_SSD_CLK_C CLKOUT_PCIE_N1 CLK_PCIE_XDPN
M.2 SSD R11113 *short_4 A42 F43
27 NGFF_SSD_CLK CLK_PCIE_REQ1# CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N CLK_PCIE_XDPP TP93
R11111 *short_4 AT7 E43
27 PCIE_CLKREQ_NGFF_SSD# GPP_B6/SRCCLKREQ1# +3V_S5 CLKOUT_ITPXDP_P TP94 RTC Circuitry (RTC)
D41 BA17 SUSCLK_R R11279 *0_4
CLKOUT_PCIE_N2 +3V_S5 GPD8/SUSCLK SUSCLK 27 +3VPCU
C41 1B-1
For Thunderbolt CLK_PCIE_REQ2# AT8 CLKOUT_PCIE_P2 E37 XTAL24_IN
GPP_B7/SRCCLKREQ2# +3V_S5 XTAL24_IN E35 XTAL24_OUT On SKL voltage at VCCRTC does not exceed 3.2V
D40 XTAL24_OUT
C40 CLKOUT_PCIE_N3 E42 XCLK_BIASREF R512 2.7K/F_4
CLK_PCIE_REQ3# AT10 CLKOUT_PCIE_P3 XCLK_BIASREF +1V_S5
TP22 R304
GPP_B8/SRCCLKREQ3# +3V_S5 AM18 RTC_X1 1.5K/F_4 +3V_RTC
B40 RTCX1 AM20 RTC_X2 +3V_RTC
LAN
24 CLK_PCIE_LANN
A40 CLKOUT_PCIE_N4 RTCX2 D7
Trace width = 30 mils
24 CLK_PCIE_LANP CLK_PCIE_REQ4# AU8 CLKOUT_PCIE_P4
R229 *short_4 AN18 SRTC_RST# +3V_RTC_2 R299
24 CLK_PCIE_LAN_REQ# GPP_B9/SRCCLKREQ4# +3V_S5 SRTCRST# AM16 RTC_RST# RTC_RST# 11
RTC_RST#
E40 RTCRST# R308 1K_4 +3V_RTC_1
WLAN
27 CLK_PCIE_WLANN CLKOUT_PCIE_N5 VCCRTC_2
1
27 CLK_PCIE_WLANP E38 20K/F_4
R224 *short_4 CLK_PCIE_REQ5# AU7 CLKOUT_PCIE_P5 R301 BAT54C
27 PCIE_CLKREQ_WLAN# GPP_B10/SRCCLKREQ5# +3V_S5 1V power plane 45.3K/F_4 C380 J1
+3V_RTC_[0:2] 1u/6.3V_4 *JUMP
0.71 checklist p14
2
Rev:D change to shortpad Trace width = 20 mils
10 OF 20 R300
1
BT1 SRTC_RST#
SP@SKL_ULT/BGA
20K/F_4
BAT_CONN
2
C381 C382
+3V Rev:D add for EC reset RTC 1u/6.3V_4 1u/6.3V_4
A SRTC_RST# RTC_RST# A
1A-2 2013/10/16 Chage +3V_RTC_0 to VCCTC_2.
CLK_PCIE_REQ0# R234 EV@10K_4
Dr-Bios.com
3
CLK_PCIE_REQ1# R215 10K_4

CLK_PCIE_REQ2# R227 *10K_4
CLK_PCIE_REQ3#
1. AHL03003057 DBV CR2032
R618 *10K_4
CLK_PCIE_REQ4# R228 10K_4 CLR_CMOS 2 CLR_CMOS 2
CLK_PCIE_REQ5# 30 CLR_CMOS 2. AHL03003003 VDE CR2032
R223 10K_4
Q6059 Q6060
*2N7002K 2N7002K
R786
1
100K_4 Rev:E Reserve only Rev:E Reserve only

PROJECT : ZAA
1A
Skylake 9/10 (PEG/USB/CLK)
5 4 3 2 1
5 4 3 2 1
SKL_ULT
U35E
SPI - FLASH
PCH_SPI_CLK AV2
SMBUS, SMLINK
R7 PCH_MBCLK0_R
Strapping
PCH_SPI_SO AW 3 SPI0_CLK +3V_S5 GPP_C0/SMBCLK R8 PCH_MBDAT0_R
PCH_SPI_SI AV3 SPI0_MISO +3V_S5 GPP_C1/SMBDATA R10 SMBALERT# +3V
PCH_SPI_IO2 SPI0_MOSI +3V_S5 GPP_C2/SMBALERT# SMBALERT# 4
D AW 2 +3V_S5 D
PCH_SPI_IO3 AU4 SPI0_IO2 R9 VGA_MBCLK
PCH_SPI_CS0# AU3 SPI0_IO3 +3V_S5 GPP_C3/SML0CLK W2 VGA_MBDATA CLKRUN# R630 8.2K/F_4
AU2 SPI0_CS0# +3V_S5 GPP_C4/SML0DATA W1 SML0ALERT# IRQ_SERIRQ R629 10K_4
SPI0_CS1# GPP_C5/SML0ALERT# SML0ALERT# 4
AU1 +3V_S5 EC_RCIN# R639 10K_4
SPI0_CS2# W 3 SMB_ME1_CLK
+3V_S5 GPP_C6/SML1CLK V3 SMB_ME1_DAT
SPI - TOUCH +3V_S5 GPP_C7/SML1DATA AM7 SML1ALERT#
+3V_S5 GPP_B23/SML1ALERT#/PCHHOT# SMB1ALERT# 28
M2 +3V_S5
M3 GPP_D1/SPI1_CLK +3V_S5
J4 GPP_D2/SPI1_MISO +3V_S5 +3V_S5
GPP_D3/SPI1_MOSI
V1
GPP_D21/SPI1_IO2
+3V_S5 eSPI change to 15 ohm ckl v0.71 p.24 SMBus
V2 +3V_S5
M1 GPP_D22/SPI1_IO3 AY13 R659 *short_4
LPC
GPP_D0/SPI1_CS# +3V_S5 +3V_S5 GPP_A1/LAD0/ESPI_IO0 BA13 R640 *short_4
LPC_LAD0 26,27,30 PCH_MBCLK0_R 2.2K_4 R578
+3V_S5 GPP_A2/LAD1/ESPI_IO1 BB13 R653 *short_4
LPC_LAD1 26,27,30 PCH_MBDAT0_R 2.2K_4 R580
C LINK +3V_S5 GPP_A3/LAD2/ESPI_IO2 LPC_LAD2 26,27,30 VGA_MBDATA
AY12 R668 *short_4 2.2K_4 R585
G3 +3V_S5 GPP_A4/LAD3/ESPI_IO3 BA12 LPC_LAD3 26,27,30 VGA_MBCLK
LPC_LFRAME# 26,27,30 2.2K_4 R582
G2 CL_CLK +3V_S5 GPP_A5/LFRAME#/ESPI_CS# BA11 C806 0.1u/16V_4
CL_DATA GPP_A14/SUS_STAT#/ESPI_RESET#
G1
CL_RST#
+3V_S5
For M.2 wifi module must eSPI change to 15 ohm +3V_S5
2/10 add C806 for EMI request ,
AW 9 R623 22_4
R652 *short_4 EC_RCIN# AW 13 +3V_S5 GPP_A9/CLKOUT_LPC0/ESPI_CLK AY9
CLK_PCI_EC 30 R748 no stuiff from EC site
30 SIO_RCIN# GPP_A0/RCIN# +3V_S5 +3V_S5 GPP_A10/CLKOUT_LPC1 AW 11 R626 22_4 move at CPU site SML1ALERT# *150K_4 R205
IRQ_SERIRQ +3V_S5 GPP_A8/CLKRUN# PCLK_TPM 26
AY11 R627 22_4
26,30 IRQ_SERIRQ GPP_A6/SERIRQ +3V_S5 CLKRUN#
CLK_PCI_LPC 27
CLKRUN# 26,30
5 OF 20
SP@SKL_ULT/BGA Termination Resistor Requirement for PCH PCHHOT# Pin
C4723
*22p/50V_4
Reserve PU 150K resister
C C
EMI
R11127 0_6
PCH SPI ROM(8M+4M) +3V_S5
SP@ socket P/N: DFHS08FS023 only for A-TEST
15ohm CS01502JB12 +3V_LDO_EC R11126 *0_6 +3V_PCH_ME +3V
D2B change to 2.2k
SPI ROM Vender Size Quanta P/N Vender P/N 33ohm CS03302JB29
+3V_PCH_ME
WND 8M AKE3EFP0N07 W25Q64FVSSIQ
R576 R572
Skylake
3.3V GGD 8M AKE2EZN0Q00 GD25B64CSIGR U41 C754 0.1u/16V_4 SMBus(PCH) 2.2K_4 2.2K_4
1A-13 PCH_SPI_CS0# 1 8 Q32
CS# VCC 5 S0
PCH_SPI_SO R650 15_4 SPI_SO_8M 2 7 SPI_HOLD_IO3_ME R698 1K_4
PCH_SPI_SO_EC R588 15_4 IO1/DO IO3/HOLD# PCH_MBDAT0_R 3 4
SPI_CLK_8M PCH_SPI_CLK CLK_SDATA 12,13,21,28
3 6 R684 15_4
IO2/W P# CLK
5 SPI_SI_8M R691 15_4 PCH_SPI_SI S5 2
4 IO0/DI
GND PCH_MBCLK0_R 6 1
B
CLK_SCLK 12,13,21,28 B
C747
W25Q64FV -- 8MB *22p/50V_4
PCH_SPI_CLK_EC R687 15_4 PCH_XDP_WLAN/S5 2N7002DW DDR_TP/S0
PCH_SPI_SI_EC R654 15_4
R649 1K_4 SPI_WP_IO2_ME

+3V_PCH_ME
PCH_SPI_IO2 SPI_WP_IO2_ME
SMBus(EC)
3.3K is original and for no R589 15_4
support fast read function
PCH_SPI_IO3 SPI_HOLD_IO3_ME
reserve for SPI fast read
R239 15_4
PCH_SPI_CLK_EC
30 PCH_SPI_CLK_EC PCH_SPI_SI_EC
30 PCH_SPI_SI_EC PCH_SPI_SO_EC 2ND_MBCLK SMB_ME1_CLK
30 PCH_SPI_SO_EC 17,30 2ND_MBCLK R171 *short_4
2ND_MBDATA R175 *short_4 SMB_ME1_DAT
17,30 2ND_MBDATA
R602 *short_4 PCH_SPI_CS0#

30 SPI_CS0#_UR_ME
EC/S5
+3V_PCH_ME
R591 10K_4 SPI_CS0#_UR_ME

+3V 2,4,6,8,9,12,13,14,16,21,22,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41
+3V_S5 2,3,4,6,8,9,11,20,24,26,27,28,30,32,34,35,40
A A
Dr-Bios.com
PROJECT : ZAA
Skylake 5 (SATA/HDA/SPI) 1A

5 4 3 2 1
5 4 3 2 1
SKL_ULT
U35K
SYSTEM POWER MANAGEMENT
AT11
+3V_S5 GPP_B12/SLP_S0# AP15 SUSB#
TP4367 +3V
GPD4/SLP_S3# SUSB# 11,30,32
+VCCIO PCI_PLTRST# AN10 +3V_S5 BA16 SUSC#
SYS_RESET# GPP_B13/PLTRST# +3V_S5 GPD5/SLP_S4# PCH_SLP_S5# SUSC# 11,30
11/12 Reserve PU 10K 11 SYS_RESET#
B5
SYS_RESET#
+3V_S5 GPD10/SLP_S5#
AY16 PCH_SLP_S5# 11
R655 *short_4 PCH_RSMRST# AY17 +3V_S5
30 RSMRST# RSMRST# PCH_SLP_SUS# SYS_RESET#
R544 *10K_4 PROC_PWRGD R554 10K_4 PROC_PWRGD A68
I SLP_SUS#
AN15
AW15 PCH_SLP_LAN# TP4369
R561 10K_4
VCCST_PWRGD B65 PROCPWRGD I SLP_LAN# BB17 PCH_SLP_WLAN# TP30

VCCST_PWRGD +3V_S5 GPD9/SLP_WLAN# AN16 PCH_SLP_A# TP23 +3V_S5
D SYS_PWROK R556 *short_4 SYS_PWROK_R B6 +3V_S5 GPD6/SLP_A# *short_4 R677
PCH_SLP_A# 11 12/23 Modify D
EC_PWROK_R SYS_PWROK PCH_PWRBTN# DNBSWON# 30 PCH_VRALERT#
R643 *0_4 BA20 BA15 R211 10K_4
DPWROK_R BB20 PCH_PWROK +3V_S5 GPD3/PWRBTN# AY15 PCH_ACPRESENT *short_4 R676
DSW_PWROK +3V_S5 GPD1/ACPRESENT PCH_BATLOW# SB_ACDC 30 PCH_ACPRESENT
AU13 R651 8.2K/F_4
PCH_SUSPWRACK +3V_S5 GPD0/BATLOW# TP74 PCH_BATLOW#
EC only PD, so PD 10K 30 PCH_SUSPWRACK R11140 *short_4 AR13
GPP_A13/SUSWARN#/SUSPWRDNACK +3V_S5
R628 8.2K/F_4
SUSACK#_R AP11
GPP_A15/SUSACK# +3V_S5 AU11 PCIE_LAN_WAKE#
Rev:D change to shortpad TP4368
+3V_S5 GPP_A11/PME# TP29
R250 10K_4
PCH_SUSPWRACK PCIE_LAN_WAKE# BB15 AP16 INTRUDER# R249
24,27 PCIE_LAN_WAKE# WAKE# INTRUDER# +3V_RTC MPHY_EXT_PWR
AM15 1M_4 R195 *1K_4
TP84 AW17 GPD2/LAN_WAKE# +3V_S5 AM10 MPHY_EXT_PWR Rev:F add
AT15 GPD11/LANPHYPC +3V_S5 +3V_S5 GPP_B11/EXT_PWR_GATE# AM11 PCH_VRALERT#
GPD7/RSVD +3V_S5 GPP_B2/VRALERT# TP19 PCH_RSMRST#
R11114 +3V_S5 R642 10K_4
11 OF 20 PCH_PWROK R648 10K_4
10K_4 SYS_PWROK_R R555 10K_4
SP@SKL_ULT/BGA
SKL_ULT
U35I
CSI-2
A36 C37 +3V_S5

B36 CSI2_DN0 CSI2_CLKN0 D37
CSI2_DP0 CSI2_CLKP0 REV:E tPLT15(max 200us)
C38 C32
D38 CSI2_DN1 CSI2_CLKN1 D32
->SLP_S4# assertion to
C36 CSI2_DP1 CSI2_CLKP1 C29 VDDQ(+1.35VSUS) ramp C811 *0.1u/16V_4
D36 CSI2_DN2 CSI2_CLKN2 D29 down start(SUSON)
A38 CSI2_DP2 CSI2_CLKP2 B26
CSI2_DN3 CSI2_CLKN3
5
B38 A26
CSI2_DP3 CSI2_CLKP3 2 SUSC#
C31 E13 R145 100/F_4 SUSON_R 4
D31 CSI2_DN4 CSI2_COMP B7 33,35 SUSON_R 1 SUSON
CSI2_DP4 +3V_S5 GPP_D4/FLASHTRIG SUSON 30
C33 TP63
Board ID +1.8V_S5 D33 CSI2_DN5 U48
3
A31 CSI2_DP5 EMMC
*TC7SH08FU
B31 CSI2_DN6 AP2 RAM_ID1
C R610 *10K_4 RAM_ID1 R611 *10K_4 A33 CSI2_DP6 +1.8V_S5 GPP_F13/EMMC_DATA0 AP1 RAM_ID2 C
R612 *10K_4 RAM_ID2 R613 *10K_4 B33 CSI2_DN7 +1.8V_S5 GPP_F14/EMMC_DATA1 AP3 RAM_ID3
R614 *10K_4 RAM_ID3 R615 *10K_4 CSI2_DP7 +1.8V_S5 GPP_F15/EMMC_DATA2 AN3 Board_ID0
R595 10K_4 Board_ID0 R600 *10K_4 A29 +1.8V_S5 GPP_F16/EMMC_DATA3 AN1 Board_ID1 R790 *short_4
R598 NAC@10K_4 Board_ID1 R599 *IOAC@10K_4 B29 CSI2_DN8 +1.8V_S5 GPP_F17/EMMC_DATA4 AN2 Board_ID2
R605 10K_4 Board_ID2 R608 *GS@10K_4 C28 CSI2_DP8 +1.8V_S5 GPP_F18/EMMC_DATA5 AM4 Board_ID3
R592 10K_4 Board_ID3 R590 *TPM@10K_4 D28 CSI2_DN9 +1.8V_S5 GPP_F19/EMMC_DATA6 AM1 Board_ID4
Board_ID4 CSI2_DP9 +1.8V_S5 GPP_F20/EMMC_DATA7 Board_ID4 22
R593 10K_4 A27
CSI2_DN10
B27 AM2 Board_ID5
R606 *10K_4 Board_ID5 R607 10K_4 C27 CSI2_DP10 +1.8V_S5 GPP_F21/EMMC_RCLK AM3 Board_ID6
R764 10K_4 Board_ID6 R765 *10K_4 D27 CSI2_DN11 +1.8V_S5 GPP_F22/EMMC_CLK AP4 Board_ID7
R766 EV_SP@10K_4 Board_ID7 R767 EV_A@10K_4 CSI2_DP11 +1.8V_S5 GPP_F12/EMMC_CMD +3V_S5
AT1 200/F_4 R616
9 OF 20 EMMC_RCOMP
REV:E tPLT18(max 200 us)
C812 *0.1u/16V_4
SP@SKL_ULT/BGA +3V_S5 ->SLP_S3# assertion to
REV:E tPLT17(max VCCIO VR(MAIND for +1V_S5
5
to +VCCIO) disabled
200us) ->SLP_S3# C813 *0.1u/16V_4 2 SUSB#
Low High Low High assertion to IMVP 4
VR_ON(VRON) deassertion 32,35,39 MAINON_R 1 MAINON MAINON 26,30
5
BOARD_ID0 VRAM X32 VRAM X16 BOARD_ID5 For 14" For 15" & 17" 2 SUSB# U49
3
4 *TC7SH08FU
34,36 VRON_R 1 VRON
BOARD_ID1 Non IOAC IOAC BOARD_ID6 Reserved Reserve VRON 30
U50
3
BOARD_ID2 No G-sensor G-sensor GPU--> KB *TC7SH08FU
BOARD_ID7 GPU--> KA R791 *short_4
GPU--> GTR
BOARD_ID3 No TPM TPM GPU--> 950M
R792 *short_4
BOARD_ID4 No touch panel touch panel Rev:D change to shortpad
B Power Sequence Non Deep Sx

B

R647 *short_4 EC_PWROK_R
30 PCH_PWROK
EC_PWROK R131 *0_4 SYS_PWROK_R
+VCCIO 2,5,31,33,36,39
+3V_RTC 6,9,30
+3V 2,4,6,7,9,12,13,14,16,21,22,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41 For platforms not supporting Deep B2A
+3V_S5 2,3,4,6,7,9,11,20,24,26,27,28,30,32,34,35,40
Sx, connect directly to RSMRST# S0->S5 & S0->S3
No Deep Sx Rev:D change to shortpad Power of sequence 1us
DPWROK_R R661 *short_4 PCH_RSMRST# SUSB# -> VCCST_PWRGD
+1.8V_S5
+1V_VCCST
5,9,10,39
2,5,9,36
VCCST PWRGD CRB is via +1.05V PG +3V_S5
+3V_S5 U6 C808 0.1u/16V_4

+1V_VCCST
5 1
VCC NC
5
C164 2 SUSB#
R85 0.1u/16V_4 2 VCCST_PWRGD_EN_L 4
A 1VCCST_PWRGD_EN
1K_4
VCCST_PWRGD VCCST_PWRGD_R 4 3 U47
3
Y GND C823 C824 TC7SH08FU
R89 60.4/F_4 *1000P/50V_4 *1000P/50V_4
C136 74AUP1G07GW
+3V_S5 1000P/50V_4
+3V
SYSPWOK Shortpad change
R777 *0_4
PLTRST# Buffer C168 *0.1u/16V_4
to 60.4 ohm. 11/6
C332 0.1u/16V_4 Stuff 1000P/50V
5
EC_PWROK
Reserve 1000P/50V
2 2
SYS_PWROK EC_PWROK 30
4 4
PCI_PLTRST# PLTRST# 14,24,26,27,30 PCH_PWROK
A 1 1 IMVP_PWRGD_3V 2 *0_4 R103 A
30 HWPG HWPG *short_4 R102
U14 U8
3
Dr-Bios.com
TC7SH08FU R214 *TC7SH08FU R130
100K_4 *10K_4 Rev:D change to shortpad
R113 *0_4
R560 *short_4
Rev:D change to shortpad Quanta Computer Inc.

PROJECT : ZAA
1A
Skylake 9/11 (PWROK/Board_ID)
5 4 3 2 1
5 4 3 2 1
VCCPRIM_1P0 & VCCPRIM_CORE Short GPIO Group Power Plane

U35S SKL_ULT Rev:D change to shortpad SKL_ULT
U35O C292 *1U/6.3V_4
Rev:F Remove Short Jumper for all +1V_S5 C268 1U/6.3V_4
CPU POWER 4 OF 4
RESERVED SIGNALS-1 C230 1U/6.3V_4
AB19 C265 *1U/6.3V_4
+1V_S5 VCCPRIM_1P0
E68
CFG[0] RSVD_TP_BB68
BB68 AB20
VCCPRIM_1P0 1.0V 696mA VCCPGPPA
AK15 +VCCPGPPA R198 *short_6 +3V_S5
D B67
CFG[1] RSVD_TP_BB69
BB69 C217 1U/6.3V_4 P18
VCCPRIM_1P0 S5 VCCPGPPB
AG15 +VCCPGPPB R185 *short_6 +3V_S5
D
D65
CFG[2] 44mA VCCPGPPC
Y16 +VCCPGPPC R182 *short_6 +3V_S5
D67
CFG[3] RSVD_TP_AK13
AK13
TP95 +1V_S5
AF18
VCCPRIM_CORE S5 VCCPGPPD
Y15 +VCCPGPPD R187 *short_6 +3V_S5
CFG4 E70
CFG[4] RSVD_TP_AK12
AK12 C698 1U/6.3V_4 AF19
VCCPRIM_CORE 1.0V 2.574A VCCPGPPE
T16 +VCCPGPPE R179 *short_6 +3V_S5
C68
CFG[5] Rev:F reserve TP V20
VCCPRIM_CORE S5 33mA VCCPGPPF
AF16 +VCCPGPPF R192 *short_6 +1.8V_S5
D68
CFG[6] RSVD_BB2
BB2 Rev:F Stuff C699 C699 47u/6.3V_8 V21
VCCPRIM_CORE 41mA VCCPGPPG
AD15 +VCCPGPPG R188 *short_6 +3V_S5
C67 BA3 C256 1U/6.3V_4
CFG[7] RSVD_BA3 +VCCDSW_1P0 AL1 +VCCPRIM_3P3
F71
G69 CFG[8]
1U/6.3V_4 C712
DCPDSW _1P0 1.0V 75mA with AJ21 pin
VCCPRIM_3P3_V19
V19 C270 *1U/6.3V_4
CFG[9] +VCCPRIM_1P0
F70
CFG[10] TP5
AU5
+1V_S5
K17
VCCMPHYAON_1P0 1.0V 1.0V VCCPRIM_1P0_T1
T1 R11131 *short_6 +1V_S5
G68
CFG[11] TP6
AT5 C695 1U/6.3V_4 C793 1U/6.3V_4 L1
VCCMPHYAON_1P0 22mA +VCCATS_1P8
C250 1U/6.3V_4
H70
CFG[12] S5 6mA 1.8V VCCATS_1P8
AA1 R180 *short_6 +1.8V_S5
G71 N15 R240 *short_6
CFG[13] +1V_S5 VCCMPHYGT_1P0_N15 +VCCPRTCPRIM_3P3 +3V_S5
H69
CFG[14] RSVD_D5
D5 C191 1U/6.3V_4 N16
VCCMPHYGT_1P0_N16 1.0V <1mA VCCRTCPRIM_3P3
AK17 C348 0.1U/16V_4
G70 D4 N17 C349 1U/6.3V_4
CFG[15] RSVD_D4 VCCMPHYGT_1P0_N17
RSVD_B2
B2 C182 47u/6.3V_8 P15
VCCMPHYGT_1P0_P15 1.258A VCCRTC_AK19
AK19 +VCCPRTC R252 *short_6 +3V_RTC
E63
CFG[16] RSVD_C2
C2 P16
VCCMPHYGT_1P0_P16 3.0V+ VCCRTC_BB14
BB14 C322 1U/6.3V_4
F63
CFG[17] B3 K15
RTC BB10 DCPRTC
C352
C732
0.1U/16V_4
0.1U/16V_4
RSVD_B3 VCCAMPHYPLL_1P0 DCPRTC
E66
F66 CFG[18] RSVD_A3
A3 C179 1U/6.3V_4 L15
VCCAMPHYPLL_1P0 1.0V A14
CFG[19] VCCCLK1 +1V_S5
49.9/F_4 CFG_RCOMP RSVD_AW 1
AW 1
+1V_S5
V15
VCCAPLL_1P0 1.0V 26mA 1.0V
R156 E60
CFG_RCOMP S5 VCCCLK2
K19
RSVD_E1
E1
+1V_S5
AB17
VCCPRIM_1P0_AB17 135mA C680 *1U/6.3V_4
+1V_S5 R153 1.5K/F_4 E8
ITP_PMODE RSVD_E2
E2 C225 *1U/6.3V_4 Y18
VCCPRIM_1P0_Y18 1.0V 696mA VCCCLK3
L21
AY2 BA4 R210 *0_6 +VCCPDSW_3P3 AD17

S5 S5 N20
RSVD_AY2 RSVD_BA4 +3VPCU VCCDSW _3P3_AD17 VCCCLK4
AY1
RSVD_AY1 RSVD_BB4
BB4
+3V_S5 R212 0_6 AD18
VCCDSW _3P3_AD18 3.3V S5
*0.1U/16V_4 C314 AJ17
VCCDSW _3P3_AJ17 118mA VCCCLK5
L19
D1 A4 R789 *short_6
RSVD_D1 RSVD_A4 +3V
C D3
RSVD_D3 RSVD_C4
C4
+1.5V R683 *0_6
C748
+VCCHDA
1U/6.3V_4
AJ19
VCCHDA 1.5V 30mA VCCCLK6
A10
C672 1U/6.3V_4
C
V0P85A_VID0
K46
RSVD_K46 TP4
BB5
+3V_S5 R193 +VCCPSPI AJ16
VCCSPI 3.3V 11mA S5 GPP_B0/CORE_VID0
AN11
TP31
K45
RSVD_K45 A69
*short_6
AF20
+3V GPP_B1/CORE_VID1
AN13
RSVD_A69 VCCSRAM_1P0
AL25
RSVD_AL25 RSVD_B69
B69
+1V_S5
AF21
VCCSRAM_1P0 1.0V
AL27
RSVD_AL27
T19
VCCSRAM_1P0 642mA
AY3 R759 *short_4 C192 1U/6.3V_4 T20
C71 RSVD_AY3 VCCSRAM_1P0
RSVD_C71 +VCCPRIM_3P3
B70
RSVD_B70 RSVD_D71
D71
C70
+3V_S5 R186 *short_6
C261 1U/6.3V_4
AJ21
VCCPRIM_3P3_AJ21 3.3V 75mA S5
RSVD_C70 Rev:D change to
F60
RSVD_F60 C54
+1V_S5
AK20
VCCPRIM_1P0_AK20 1.0V 696mA S5
RSVD_C54 shortpad
A52 D54 N18
RSVD_A52 RSVD_D54 +1V_S5 VCCAPLLEBB
BA70 AY4
C173 1U/6.3V_4 1.0V 33mA 15 OF 20
BA68 RSVD_TP_BA70 TP1 BB3
RSVD_TP_BA68 TP2 SP@SKL_ULT/BGA
J71 AY71 R760 *short_4
J68 RSVD_J71 VSS_AY71 AR56 R762 GT3@0_4
RSVD_J68 ZVM# LPM_ZVM_N 34
F65 AW 71
G65 VSS_F65 RSVD_TP_AW 71 AW 70
VSS_G65 RSVD_TP_AW 70 For 2+3e CPU No Stuff
F61 AP56
E61 RSVD_F61 MSM# C64 R761 100K_4 TP88
RSVD_E61 PROC_SELECT#
19 OF 20
+1V_VCCST
B SP@SKL_ULT/BGA B
Pin Name Strap description Configuration Note

1 = *Normal Operation; No stall (iPU 3K) +1V_S5 6,33
CFG[0] Stall reset sequence after PCU PLL lock until de-asserted +3VPCU 6,11,22,24,25,26,27,28,30,31,32,39,40,41
0 = Stall +3V_S5 2,3,4,6,7,8,11,20,24,26,27,28,30,32,34,35,40
+3V 2,4,6,7,8,12,13,14,16,21,22,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41
CFG[1] Reserved Configuration lane

+1V_VCCST 2,5,8,36
1 = *Normal Operation(iPU 3K) +1.8V_S5 5,8,10,39
CFG[2] PCI Express* Static x16 Lane Numbering Reversal H & S processor used only +3V_RTC 6,8,30
0 = Lan number reversed
CFG[3] Reserved Configuration lane
1 = Disabled (iPU 3K) CFG4

CFG[4] eDP enable R548 1K_4
0 = *Enabled
00 = 1x8, 2x4 PCI Express*

01 = reserved
CFG[6:5] PCI Express* Bifunction H & S processor used only
A 10 = 2x8 PCI Express* A
11 = 1x16 PCI Express*

1 = *PEG Train immediatedly follow
CFG[7] PEG Training RESET# de-assertion (iPU 3K)
H & S processor used only
0 = PEG wait for BIOS for training
Dr-Bios.com
CFG[19:8] Reserved Configuration lane PROJECT : ZAA
1A
Skylake PCH-LP 15/19 (POWER)
5 4 3 2 1
5 4 3 2 1
Skylake ULT (GND)

SKL_ULT SKL_ULT SKL_ULT
U35P U35Q U35R U35T SKL_ULT
D D
GND 1 OF 3 GND 2 OF 3 GND 3 OF 3 SPARE
A5 AL65 AT63 BA49 F8 L18 AW69 F6

A67 VSS VSS AL66 AT68 VSS VSS BA53 G10 VSS VSS L2 AW68 RSVD_AW69 RSVD_F6 E3
A70 VSS VSS AM13 AT71 VSS VSS BA57 G22 VSS VSS L20 +1.8V_S5 AU56 RSVD_AW68 RSVD_E3 C11
AA2 VSS VSS AM21 AU10 VSS VSS BA6 G43 VSS VSS L4 AW48 RSVD_AU56 RSVD_C11 B11
AA4 VSS VSS AM25 AU15 VSS VSS BA62 G45 VSS VSS L8 C7 RSVD_AW48 RSVD_B11 A11
AA65 VSS VSS AM27 AU20 VSS VSS BA66 G48 VSS VSS N10 R775 *0_4 U12 RSVD_C7 RSVD_A11 D12
AA68 VSS VSS AM43 AU32 VSS VSS BA71 G5 VSS VSS N13 U11 RSVD_U12 RSVD_D12 C12
AB15 VSS VSS AM45 AU38 VSS VSS BB18 G52 VSS VSS N19 H11 RSVD_U11 RSVD_C12 F52
AB16 VSS VSS AM46 AV1 VSS VSS BB26 G55 VSS VSS N21 RSVD_H11 RSVD_F52
AB18 VSS VSS AM55 AV68 VSS VSS BB30 G58 VSS VSS N6 C794
AB21 VSS VSS AM60 AV69 VSS VSS BB34 G6 VSS VSS N65 20 OF 20
AB8 VSS VSS AM61 AV70 VSS VSS BB38 G60 VSS VSS N68 *1U/6.3V_4
VSS VSS VSS VSS VSS VSS SP@SKL_ULT/BGA
AD13 AM68 AV71 BB43 G63 P17
AD16 VSS VSS AM71 AW10 VSS VSS BB55 G66 VSS VSS P19
AD19 VSS VSS AM8 AW12 VSS VSS BB6 H15 VSS VSS P20
AD20 VSS VSS AN20 AW14 VSS VSS BB60 H18 VSS VSS P21
AD21 VSS VSS AN23 AW16 VSS VSS BB64 H71 VSS VSS R13
AD62 VSS VSS AN28 AW18 VSS VSS BB67 J11 VSS VSS R6
AD8 VSS VSS AN30 AW21 VSS VSS BB70 J13 VSS VSS T15
AE64 VSS VSS AN32 AW23 VSS VSS C1 J25 VSS VSS T17
C
Reserve 1uF no stuff in CPU U11,U12 ball C
AE67 VSS VSS AN37 AW30 VSS VSS D10 J35 VSS VSS T21 support Cannonlake-U PCH
AE68 VSS VSS AN38 AW32 VSS VSS D11 J38 VSS VSS T4
AE69 VSS VSS AN40 AW34 VSS VSS D14 J42 VSS VSS U10
AF1 VSS VSS AN42 AW36 VSS VSS D18 J8 VSS VSS U63
AF10 VSS VSS AN58 AW38 VSS VSS D22 K16 VSS VSS U64
AF15 VSS VSS AN63 AW41 VSS VSS D25 K18 VSS VSS U66
AF17 VSS VSS AP10 AW43 VSS VSS D26 K22 VSS VSS U67
AF63 VSS VSS AP23 AW49 VSS VSS D39 K64 VSS VSS V16
AG16 VSS VSS AP28 AW51 VSS VSS D44 K65 VSS VSS V17
AG17 VSS VSS AP32 AW53 VSS VSS D45 K66 VSS VSS V18
AG18 VSS VSS AP35 AW55 VSS VSS D47 K67 VSS VSS W13
VSS VSS VSS VSS VSS VSS +1.8V_S5 5,8,9,39
AG21 AP58 AW60 D58 K71 Y17
AG71 VSS VSS AP63 AW62 VSS VSS D6 L11 VSS VSS Y19
AH13 VSS VSS AP68 AW64 VSS VSS D62 L16 VSS VSS Y20
AH6 VSS VSS AP70 AW66 VSS VSS D66 L17 VSS VSS Y21
AH63 VSS VSS AR11 AW8 VSS VSS D69 VSS VSS
AH64 VSS VSS AR15 AY66 VSS VSS E11
AH67 VSS VSS AR16 B10 VSS VSS E15 18 OF 20
AJ15 VSS VSS AR20 B14 VSS VSS E18
B SP@SKL_ULT/BGA B
AK11 VSS VSS AR42 B34 VSS VSS E53
AK27 VSS VSS AR5 B58 VSS VSS F1
AK8 VSS VSS AR55 BA1 VSS VSS F23
AL2 VSS VSS AR58 BA10 VSS VSS F27
AL35 VSS VSS AT2 BA2 VSS VSS F33
AL52 VSS VSS AT4 F68 VSS VSS F40
A AL58 VSS VSS AT56 VSS VSS BA41 A
AL64 VSS VSS AT58 VSS
VSS VSS
16 OF 20 17 OF 20 Quanta Computer Inc.

SP@SKL_ULT/BGA SP@SKL_ULT/BGA
PROJECT : ZAA
1A
Skylake 10/17/18 (GND)
Dr-Bios.com
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
APS1 R289 *0_6 APS3 R272 *0_6 APS7
Intel APS Fixture use

+3V_S5
CN2
1 APS1 R291 *0_6
1 2 R282 *0_4
2 3 APS3 R278 *0_6 SUSB# 8,30,32
3 +3VPCU
4 R279 *0_4
4 5 R274 *0_4 PCH_SLP_S5# 8
5 SUSC# 8,30 +3V_S5 2,3,4,6,7,8,9,20,24,26,27,28,30,32,34,35,40
6 R273 *0_4
6 PCH_SLP_A# 8 +3VPCU 6,9,22,24,25,26,27,28,30,31,32,39,40,41
7 APS7 R271 *0_6 +3VPCU
7 8
8 9 R268 *0_4
9 10 RTC_RST# 6
10 11 R265 *0_4
11 12 NBSWON# 28,30
12 13 R267 *0_4 SYS_RESET#
A 13 14 SYS_RESET# 8 A
14 15
15
Dr-Bios.com
16
16 17
17
18
18 Quanta Computer Inc.
*ACES_88511-180N
PROJECT :ZAA
1A
CPU/PCH XDP
5 4 3 2 1
5 4 3 2 1
R11170 *0_4
+2.5V
3 M_A_A[13:0] P/N and F/P M_A_DQ[63:0] 3 JDIM1B

JDIM1A C1265 10U/6.3V_6
M_A_A0 144 8 M_A_DQ0 111
M_A_A1 133 A0 DQ0 7 M_A_DQ4 112 VDD1 C1267 0.1U/10V_4
M_A_A2 132 A1 DQ1 20 M_A_DQ2 117 VDD2
M_A_A3 131 A2 DQ2 21 M_A_DQ6 118 VDD3 255 R11133 *short_4
M_A_A4 A3 DQ3 M_A_DQ5 VDD4 VDDSPD +3V
128 4 0-7 123
M_A_A5 126 A4 DQ4 3 M_A_DQ1 +1.2VSUS 124 VDD5
M_A_A6 127 A5 DQ5 16 M_A_DQ7 129 VDD6 257
M_A_A7 122 A6 DQ6 17 M_A_DQ3 130 VDD7 VPP1 259 0.5A
M_A_A8 125 A7 DQ7 28 M_A_DQ13 135 VDD8 VPP2 +2.5V_SUS
M_A_A9 121 A8 DQ8 29 M_A_DQ8 136 VDD9
M_A_A10 146 A9 DQ9 41 M_A_DQ14 2250mA 141 VDD10 258
M_A_A11 120 A10/AP DQ10 42 M_A_DQ15 VDD11 VTT DDR_VTTREF
8-15 142
D
M_A_A12 119 A11
A12
DQ11
DQ12
24 M_A_DQ9 147 VDD12
VDD13
600mA D
M_A_A13 158 25 M_A_DQ12 148
151 A13 DQ13 38 M_A_DQ11 153 VDD14 164 VREF_CA_DIMM0
3 M_A_WE# 156 A14/WE# DQ14 37 M_A_DQ10 154 VDD15 VREF_CA
3 M_A_CAS# 152 A15/CAS# DQ15 50 M_A_DQ17 159 VDD16
3 M_A_RAS# A16/RAS# DQ16 49 M_A_DQ21 160 VDD17
TP154 162 DQ17 62 M_A_DQ18 163 VDD18
TP153 165 S2#/C0 DQ18 63 M_A_DQ22 16-23 VDD19
S3#/C1 DQ19 46 M_A_DQ16
DQ20 45 M_A_DQ20 1 2
DDR4 SODIMM 260 PIN

114 DQ21 58 M_A_DQ23 5 VSS1 VSS48 6
3 M_A_ACT# 143 ACT# DQ22 59 M_A_DQ19 9 VSS2 VSS49 10
3 M_A_PARITY 116 PARITY DQ23 70 M_A_DQ25 15 VSS3 VSS50 14
3 M_A_ALERT# M_A_EVENT# 134 ALERT# DQ24 71 M_A_DQ29 19 VSS4 VSS51 18
108 EVENT# DQ25 83 M_A_DQ30 23 VSS5 VSS52 22
+1.2VSUS 3,13 DDR3_DRAMRST# RESET# DQ26 84 M_A_DQ26 VSS6 VSS53
24-31 27 26
DQ27 VSS7 VSS54
DDR4 SODIMM 260 PIN

C1258 *0.1U/10V_4 66 M_A_DQ28 31 30
DQ28 67 M_A_DQ24 35 VSS8 VSS55 36
DQ29 79 M_A_DQ31 39 VSS9 VSS56 40
R10885 DQ30 80 M_A_DQ27 43 VSS10 VSS57 44
DQ31 174 M_A_DQ37 47 VSS11 VSS58 48
240_4 DQ32 VSS12 VSS59
173 M_A_DQ33 51 52
M_A_EVENT# DQ33 187 M_A_DQ35 57 VSS13 VSS60 56
DQ34 186 M_A_DQ39 61 VSS14 VSS61 60
R10890 *1K_4 M_A_EVENT# DQ35 170 M_A_DQ32 33-39 65 VSS15 VSS62 64
13 PM_THRMTRIP# DQ36 VSS16 VSS63
(260P)
169 M_A_DQ36 69 68
DQ37 183 M_A_DQ34 73 VSS17 VSS64 72
Close to PCH DQ38 182 M_A_DQ38 77 VSS18 VSS65 78
DQ39 195 M_A_DQ41 81 VSS19 VSS66 82
150 DQ40 194 M_A_DQ40 85 VSS20 VSS67 86
3 M_A_BA#0 145 BA0 DQ41 207 M_A_DQ42 89 VSS21 VSS68 90
+3V 3 M_A_BA#1 115 BA1 DQ42 208 M_A_DQ46 93 VSS22 VSS69 94
3 M_A_BG#0
(260P)
113 BG0 DQ43 191 M_A_DQ45 VSS23 VSS70
3 M_A_BG#1 BG1 DQ44
40-47 99
VSS24 VSS71
98
190 M_A_DQ44 103 102
149 DQ45 203 M_A_DQ43 107 VSS25 VSS72 106
3 M_A_CS#0 157 S0# DQ46 204 M_A_DQ47 167 VSS26 VSS73 168
3 M_A_CS#1 109 S1# DQ47 216 M_A_DQ53 171 VSS27 VSS74 172
R10872 R10880 R10889
3 M_A_CKE0 110 CKE0 DQ48 215 M_A_DQ49 175 VSS28 VSS75 176
C *10K_4 *10K_4 *10K_4 C
3 M_A_CKE1 CKE1 DQ49 228 M_A_DQ51 181 VSS29 VSS76 180
137 DQ50 229 M_A_DQ55 48-55 185 VSS30 VSS77 184
CHA_SA0 CHA_SA1 CHA_SA2 3 M_A_CLK0 139 CK0 DQ51 211 M_A_DQ48 189 VSS31 VSS78 188
3 M_A_CLK0# 138 CK0# DQ52 212 M_A_DQ52 193 VSS32 VSS79 192
3 M_A_CLK1 140 CK1 DQ53 224 M_A_DQ54 +1.2VSUS 197 VSS33 VSS80 196
3 M_A_CLK1# CK1# DQ54 225 M_A_DQ50 201 VSS34 VSS81 202
R10882 R10886 R10877
10K_4 10K_4 10K_4 155 DQ55 237 M_A_DQ62 205 VSS35 VSS82 206
3 M_A_ODT0_DIMM 161 ODT0 DQ56 236 M_A_DQ59 209 VSS36 VSS83 210
3 M_A_ODT1_DIMM ODT1 DQ57 249 M_A_DQ60 213 VSS37 VSS84 214
253 DQ58 250 M_A_DQ61 R10891 217 VSS38 VSS85 218
7,13,21,28 CLK_SCLK 254 SCL DQ59 232 M_A_DQ58 VSS39 VSS86
7,13,21,28 CLK_SDATA
56-63 240_4 223 222
SDA DQ60 233 M_A_DQ63 227 VSS40 VSS87 226
CHA_SA0 256 DQ61 245 M_A_DQ56 M_A_DQS8 231 VSS41 VSS88 230
CHA_SA1 260 SA0 DQ62 246 M_A_DQ57 235 VSS42 VSS89 234
+1.2VSUS CHA_SA2 166 SA1 DQ63 +1.2VSUS 239 VSS43 VSS90 238
SA2 13 M_A_DQS0 243 VSS44 VSS91 244
M_A_CB0 92 DQS0 34 M_A_DQS1 247 VSS45 VSS92 248
R10896 240_4 CB0 DQS1 VSS46 VSS93
R10871 240_4 M_A_CB1 91 55 M_A_DQS2 251 252
M_A_CB2 101 CB1 DQS2 76 M_A_DQS3 VSS47 VSS94
R10875 240_4 CB2 DQS3
R10881 240_4 M_A_CB3 105 179 M_A_DQS4 R10894
M_A_CB4 88 CB3 DQS4 200 M_A_DQS5 240_4
R10879 240_4 CB4 DQS5
R10884 240_4 M_A_CB5 87 221 M_A_DQS6 261
M_A_CB6 100 CB5 DQS6 242 M_A_DQS7 M_A_DQS#8 GND 262
R10888 240_4 CB6 DQS7 M_A_DQS[7:0] 3 GND
R10892 240_4 M_A_CB7 104 97 M_A_DQS8
CB7 DQS8
12 11 M_A_DQS#0
33 DM0 DQS#0 32 M_A_DQS#1
+1.2VSUS 54 DM1 DQS#1 53 M_A_DQS#2
75 DM2 DQS#2 74 M_A_DQS#3
178 DM3 DQS#3 177 M_A_DQS#4
199 DM4 DQS#4 198 M_A_DQS#5
220 DM5 DQS#5 219 M_A_DQS#6
241 DM6 DQS#6 240 M_A_DQS#7
96 DM7 DQS#7 95 M_A_DQS#8 M_A_DQS#[7:0] 3 VREF DQ0 M1 Solution +1.2VSUS
DM8 DQS#8
B B
R10883
1K/F_4
R10878 2/F_6 VREF_CA_DIMM0 *0_4 R10887

+VREF_CA_CPU +VDDQ
1
C1252
1023 Change R10410 0.022U/25V_4 R10895
1K/F_4
from 2ohm to 24.9ohn
2
R10873 24.9/F_4
Place these Caps near So-Dimm1.

1uF/10uF 4pcs on each side of connector
+1.2VSUS DDR_VTTREF VREF_CA_DIMM0
C1244 1U/6.3V_4 C1259 0.1U/16V_4

C1251 1U/6.3V_4
C1271 1U/6.3V_4 C1255 10U/6.3V_6
+1.2VSUS 3,5,13,35
C1275 1U/6.3V_4
+3V 2,4,6,7,8,9,13,14,16,21,22,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41
C1260 1U/6.3V_4
+2.5V_SUS 13,35
C1249 1U/6.3V_4
DDR_VTTREF 13,35 +2.5V_SUS
C1273 1U/6.3V_4
C1245 1U/6.3V_4
C1253 1U/6.3V_4 C1266 0.1U/16V_4
C1270 10U/6.3V_6
+VDDQ 13,35
C1256 1U/6.3V_4 C1257 10U/6.3V_6
+VREF_CA_CPU 3
C1254 1U/6.3V_4
A A
C1261 1U/6.3V_4
Dr-Bios.com
C1263 10U/6.3V_6
C1247 10U/6.3V_6
C1272 10U/6.3V_6
C1248 10U/6.3V_6
C1262 10U/6.3V_6
C1246 10U/6.3V_6 Quanta Computer Inc.
C1250
C1264
10U/6.3V_6
10U/6.3V_6 PROJECT : ZAA
DDR4 DIMM-STD(5.2H) CHA 1A
5 4 3 2 1
5 4 3 2 1
P/N and F/P M_B_DQ[63:0] 3

R11142 *0_4
+2.5V
3 M_B_A[13:0]
JDIM2A
M_B_A0 144 8 M_B_DQ1 JDIM2B
M_B_A1 A0 DQ0 M_B_DQ4 C4728 10U/6.3V_6
133 7
M_B_A2 A1 DQ1 M_B_DQ2 111
132 20 VDD1
M_B_A3 A2 DQ2 M_B_DQ3 112 C4727 0.1U/10V_4
131 21 VDD2
M_B_A4 128 A3 DQ3 4 M_B_DQ0 0-7 117
118 VDD3 255 R11134 *short_4
M_B_A5 126 A4 DQ4 3 M_B_DQ5 +3V
123 VDD4 VDDSPD
M_B_A6 127 A5 DQ5 16 M_B_DQ7 +1.2VSUS
124 VDD5
M_B_A7 122 A6 DQ6 17 M_B_DQ6
129 VDD6 257
M_B_A8 125 A7 DQ7 28 M_B_DQ13 +2.5V_SUS
130 VDD7 VPP1 259
D M_B_A9 121 A8 DQ8 29 M_B_DQ12 D
135 VDD8 VPP2
M_B_A10 146 A9
A10/AP
DQ9
DQ10
41 M_B_DQ15
8-15 136 VDD9 0.5A
M_B_A11 120 42 M_B_DQ14 VDD10
141 258
M_B_A12 119 A11
A12
DQ11
DQ12
24 M_B_DQ9 2250mA 142 VDD11 VTT DDR_VTTREF
M_B_A13 158 25 M_B_DQ8 VDD12
147
3 M_B_WE#
151 A13
A14/WE#
DQ13
DQ14
38 M_B_DQ11
148 VDD13 600mA
156 37 M_B_DQ10 VDD14
3 M_B_CAS# A15/CAS# DQ15 153 164 VREF_CA_DIMM1
152 50 M_B_DQ21 VDD15 VREF_CA
3 M_B_RAS# A16/RAS# DQ16 M_B_DQ17 154
49 VDD16
DQ17 M_B_DQ19 159
TP158 162 62 VDD17
TP157 165 S2#/C0 DQ18 63 M_B_DQ22 16-23 160
163 VDD18
S3#/C1 DQ19 46 M_B_DQ20 VDD19
DQ20 45 M_B_DQ16
114 DQ21 58 M_B_DQ18
1 2
DDR4 SODIMM 260 PIN

3 M_B_ACT# ACT# DQ22 M_B_DQ23
143 59 VSS1 VSS48
3 M_B_PARITY PARITY DQ23 M_B_DQ28 5 6
116 70 VSS2 VSS49
+1.2VSUS 3 M_B_ALERT# M_B_EVENT# ALERT# DQ24 M_B_DQ25 9 10
134 71 VSS3 VSS50
EVENT# DQ25 M_B_DQ26 15 14
108 83 VSS4 VSS51
3,12 DDR3_DRAMRST# RESET# DQ26 84 M_B_DQ31 24-31 19 18
23 VSS5 VSS52 22
DQ27
DDR4 SODIMM 260 PIN

C1317 *0.1U/10V_4 66 M_B_DQ29 VSS6 VSS53
DQ28 M_B_DQ24 27 26
67 VSS7 VSS54
DQ29 M_B_DQ30 31 30
R10928 79 VSS8 VSS55
DQ30 M_B_DQ27 35 36
240_4 80 VSS9 VSS56
DQ31 M_B_DQ32 39 40
174 VSS10 VSS57
M_B_EVENT# DQ32 M_B_DQ36 43 44
173 VSS11 VSS58
DQ33 M_B_DQ38 47 48
187 VSS12 VSS59
DQ34 M_B_DQ35 51 52
186 VSS13 VSS60
R10921 *1K_4 M_B_EVENT# DQ35 M_B_DQ33 32-39 57 56
12 PM_THRMTRIP# 170 VSS14 VSS61
DQ36 M_B_DQ37 61 60
169 VSS15 VSS62
DQ37 M_B_DQ39 65 64
Close to PCH 183 VSS16 VSS63
(260P)
DQ38 M_B_DQ34 69 68
182 VSS17 VSS64
DQ39 M_B_DQ45 73 72
195 VSS18 VSS65
DQ40 M_B_DQ40 77 78
150 194 VSS19 VSS66
3 M_B_BA#0 BA0 DQ41 M_B_DQ42 81 82
+3V 145 207 VSS20 VSS67
3 M_B_BA#1 BA1 DQ42 M_B_DQ47 85 86
115 208 VSS21 VSS68
3 M_B_BG#0 40-47 89 90
(260P)
113 BG0 DQ43 191 M_B_DQ44
3 M_B_BG#1 93 VSS22 VSS69 94
BG1 DQ44 190 M_B_DQ41
99 VSS23 VSS70 98
C 149 DQ45 203 M_B_DQ43 C
3 M_B_CS#0 103 VSS24 VSS71 102
157 S0# DQ46 204 M_B_DQ46
3 M_B_CS#1 107 VSS25 VSS72 106
109 S1# DQ47 216 M_B_DQ53
3 M_B_CKE0 167 VSS26 VSS73 168
R10924 R10940 R10923 110 CKE0 DQ48 215 M_B_DQ49
3 M_B_CKE1 171 VSS27 VSS74 172
*10K_4 10K_4 *10K_4 CKE1 DQ49 228 M_B_DQ54
48-55 175 VSS28 VSS75 176
137 DQ50 229 M_B_DQ55
3 M_B_CLK0 181 VSS29 VSS76 180
CHB_SA0 CHB_SA1 CHB_SA2 139 CK0 DQ51 211 M_B_DQ48
3 M_B_CLK0# 185 VSS30 VSS77 184
138 CK0# DQ52 212 M_B_DQ52
3 M_B_CLK1 189 VSS31 VSS78 188
R10943 R10937 R10927 140 CK1 DQ53 224 M_B_DQ51
3 M_B_CLK1# 193 VSS32 VSS79 192
10K_4 *10K_4 10K_4 CK1# DQ54 225 M_B_DQ50
197 VSS33 VSS80 196
155 DQ55 237 M_B_DQ61
3 M_B_ODT0_DIMM 201 VSS34 VSS81 202
161 ODT0 DQ56 236 M_B_DQ60
3 M_B_ODT1_DIMM 205 VSS35 VSS82 206
ODT1 DQ57 249 M_B_DQ59
209 VSS36 VSS83 210
253 DQ58 250 M_B_DQ62
7,12,21,28 CLK_SCLK 56-63 213 VSS37 VSS84 214
254 SCL DQ59 232 M_B_DQ57
7,12,21,28 CLK_SDATA 217 VSS38 VSS85 218
SDA DQ60 233 M_B_DQ56
223 VSS39 VSS86 222
CHB_SA0 256 DQ61 245 M_B_DQ58
227 VSS40 VSS87 226
CHB_SA1 260 SA0 DQ62 246 M_B_DQ63
231 VSS41 VSS88 230
+1.2VSUS CHB_SA2 166 SA1 DQ63
M_B_DQS[7:0] 3 +1.2VSUS 235 VSS42 VSS89 234
SA2 13 M_B_DQS0
239 VSS43 VSS90 238
M_B_CB0 92 DQS0 34 M_B_DQS1
R10931 240_4 243 VSS44 VSS91 244
M_B_CB1 91 CB0 DQS1 55 M_B_DQS2
R10936 240_4 247 VSS45 VSS92 248
R10933 240_4 251 VSS46 VSS93 252
R10939 240_4 R10926 VSS47 VSS94
R10941 240_4 CB4 DQS5
M_B_CB5 87 221 M_B_DQS6 240_4
R10922 240_4 CB5 DQS6
R10942 240_4 M_B_CB6 100 242 M_B_DQS7
CB6 DQS7 M_B_DQS8 261
R10925 240_4 M_B_CB7 104 97 M_B_DQS8 GND
CB7 DQS8 262
M_B_DQS#[7:0] 3 +1.2VSUS GND
12 11 M_B_DQS#0
33 DM0 DQS#0 32 M_B_DQS#1
+1.2VSUS DM1 DQS#1
54 53 M_B_DQS#2
75 DM2 DQS#2 74 M_B_DQS#3
178 DM3 DQS#3 177 M_B_DQS#4
DM4 DQS#4 M_B_DQS#5 R10929
199 198
220 DM5 DQS#5 219 M_B_DQS#6 240_4 +1.2VSUS 3,5,12,35
241 DM6 DQS#6 240 M_B_DQS#7 +3V 2,4,6,7,8,9,12,14,16,21,22,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41
DM7 DQS#7 M_B_DQS#8
B 96 95 M_B_DQS#8 +2.5V_SUS 12,35 B
DM8 DQS#8 DDR_VTTREF 12,35
+VDDQ 12,35
+VREFDQ_SB_M3 3
Place these Caps near So-Dimm0.

For EMI RESERVE 1uF/10uF 4pcs on each side of connector
+1.2VSUS DDR_VTTREF VREF DQ1 M1 Solution
+1.2VSUS
+1.2VSUS C1332 1U/6.3V_4 C1315 1U/6.3V_4
EC39 *120P/50V_4 EC36 *120P/50V_4 C1325 1U/6.3V_4 C1311 1U/6.3V_4 +1.2VSUS
EC48 *120P/50V_4 EC47 *120P/50V_4 C1309 1U/6.3V_4 C1310 1U/6.3V_4
EC42 *120P/50V_4 EC43 *120P/50V_4 C1318 1U/6.3V_4 C1319 1U/6.3V_4

R10934
EC49 120P/50V_4 EC38 *0.1U/16V_4 C1337 1U/6.3V_4 C1333 1U/6.3V_4 1K/F_4
EC46 *120P/50V_4 EC41 *0.1U/16V_4 C1314 1U/6.3V_4 +VREFDQ_SB_M3 R10932 2/F_6 VREF_CA_DIMM1 *0_4 R10935
+VREFDQ_SB_M3 +VDDQ
1
EC44 *120P/50V_4 EC37 *0.1U/16V_4 C1336 1U/6.3V_4
VREF_CA_DIMM1 C1329
EC45 *120P/50V_4 EC50 *0.1U/16V_4 C1335 1U/6.3V_4 0.022U/25V_4 R10938
2
C1323 0.1U/16V_4 1K/F_4
C1330 10U/6.3V_6 C1327 10U/6.3V_6 R10930

A DDR_VTTREF 24.9/F_4 A
C1312 10U/6.3V_6
EC35 *120P/50V_4 +2.5V_SUS
Dr-Bios.com
C1321 10U/6.3V_6
EC40 *120P/50V_4 C1320 0.1U/16V_4
C1331 10U/6.3V_6
C1324 10U/6.3V_6
C1328 10U/6.3V_6
C1334 10U/6.3V_6
C1313 10U/6.3V_6 Quanta Computer Inc.

C1308 10U/6.3V_6
PROJECT : ZAA
DDR4 DIMM-RVS(5.2H) CHB 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
U3002A
PEX_IOVDD/Q : 3300mA EV_SP@N16
+1.05V_GFX AG19 AN12 PEG_TX0 6
AG21 PEX_IOVDD_1 PEX_RX0 AM12
To be placed no further from the GPU AG22 PEX_IOVDD_2 [PEG Interface] PEX_RX0_N AN14
PEG_TX#0
PEG_TX1 6
6
than bewteen the PS and GPU AG24 PEX_IOVDD_3 PEX_RX1 AM14
PEX_IOVDD_4 PEX_RX1_N PEG_TX#1 6 +1.05V_GFX 15,16,41
AH21 AP14 PEG_TX2 6
PEX_IOVDD_5 PEX_RX2 +3V_GFX 16,17,30,41
C4000 EV@22U/6.3V_6 AH25 AP15 PEG_TX#2 6
PEX_IOVDD_6 PEX_RX2_N +3V_MAIN 15,16,17
C4001 EV@22U/6.3V_6 AN15 PEG_TX3 6
PEX_RX3 +3V 2,4,6,7,8,9,12,13,16,21,22,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41
C4002 EV@22U/6.3V_6 AG13 AM15 PEG_TX#3 6
C4003 EV@22U/6.3V_6 AG15 PEX_IOVDDQ_1 PEX_RX3_N AN17
A A
C4004 EV@10U/6.3V_6 AG16 PEX_IOVDDQ_2 PEX_RX4 AM17
C4005 EV@10U/6.3V_6 AG18 PEX_IOVDDQ_3 PEX_RX4_N AP17
C4006 EV@10U/6.3V_6 AG25 PEX_IOVDDQ_4 PEX_RX5 AP18
C4007 EV@10U/6.3V_6 AH15 PEX_IOVDDQ_5 PEX_RX5_N AN18
AH18 PEX_IOVDDQ_6 PEX_RX6 AM18
AH26 PEX_IOVDDQ_7 PEX_RX6_N AN20
PLACE NEAR BALLS AH27 PEX_IOVDDQ_8 PEX_RX7 AM20
AJ27 PEX_IOVDDQ_9 PEX_RX7_N AP20
C4008 EV@1U/6.3V_4 AK27 PEX_IOVDDQ_10 PEX_RX8 AP21
PEX_IOVDDQ_11 PEX_RX8_N
C4009
C4010
EV@1U/6.3V_4
EV@1U/6.3V_4
AL27
AM28 PEX_IOVDDQ_12 PEX_RX9
AN21
AM21
3V MAIN POWER
C4011 EV@1U/6.3V_4 AN28 PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_RX9_N
PEX_RX10
AN23 GC6:+3V_MAIN +3V_GFX +3V_GFX
AM23
PEX_RX10_N AP23 3/11 GC6 timing issue from
PLACE UNDER BGA PEX_RX11 AP24
GC6 Power control 200K change to 100K
PEX_RX11_N AN24
C4012 [email protected]/10V_6 PEX_RX12 AM24
C4014 [email protected]/10V_6 PEX_RX12_N AN26 +3V_GFX R4000 C4013
PEX_RX13 60mil
AM26 GC6@10K_4
PEX_RX13_N
1
AP26 [email protected]/25V_4
PEX_RX14 AP27 R4003
PEX_RX14_N AN27
PEX_RX15 *GC6@0_8
AM27 R4001 R4002 GC6@100K_4 2 Q4000
PEX_RX15_N GC6@AO3413
GC6@10K_4
3
AK14 PEG_RXP0_C C4015 [email protected]/10V_4 60mil
PEX_TX0 PEG_RXN0_C PEG_RX0 6 +3V_MAIN
AJ14 C4016 [email protected]/10V_4
PEG_RX#0 6
3
PEX_TX0_N AH14 PEG_RXP1_C C4017 [email protected]/10V_4 C4019
PEX_TX1 PEG_RXN1_C PEG_RX1 6
B AG14 C4018 [email protected]/10V_4 17 +3V_MAIN_EN 2 B
PEX_TX1_N PEG_RXP2_C PEG_RX#1 6
AK15 C4020 [email protected]/10V_4 [email protected]/25V_4
PEX_TX2 PEG_RXN2_C PEG_RX2 6
AJ15 C4021 [email protected]/10V_4 Q4001 N16V stuff not support GC6 2.0.
PEX_TX2_N PEG_RXP3_C PEG_RX#2 6
AL16 C4022 [email protected]/10V_4
PEG_RX3 6
GC6@2N7002K 1A-7
PEX_TX3 AK16 PEG_RXN3_C C4023 [email protected]/10V_4
PEG_RX#3 6
1
PEX_TX3_N AK17
PEX_TX4 AJ17
PEX_TX4_N AH17
AC6 PEX_TX5 AG17
AJ28 NC_1 PEX_TX5_N AK18
AJ4 NC_2 PEX_TX6 AJ18
AJ5 NC_3 PEX_TX6_N AL19
AL11 NC_4 PEX_TX7 AK19
C15 NC_5 PEX_TX7_N AK20
D19 NC_6 PEX_TX8 AJ20
D20 NC_7 PEX_TX8_N AH20
D23 NC_8 PEX_TX9 AG20 +3V +3V
D26 NC_9
NC_10
PEX_TX9_N
PEX_TX10
AK21 GC6 PEGX_RST# +3V_GFX
H31 AJ21
NC_11 PEX_TX10_N 17 SYS_PEX_RST_MON#
T8 AL22
V32 NC_12 PEX_TX11 AK22
Y1 NC_13 PEX_TX11_N AK23 C4024
Y2 NC_14 PEX_TX12 AJ23 [email protected]/16V_4 C4025 R4004
Y3 NC_15 PEX_TX12_N AH23 [email protected]/16V_4
NC_16 PEX_TX13 *GC6@10K_4
5
AA1 AG23
NC_17 PEX_TX13_N
5
PLACE CLOSE TO BGA AA2 AK24 2
NC_18 PEX_TX14 8,24,26,27,30 PLTRST# RST_MON# R11108
C4026 [email protected]/6.3V_4 AA3 AJ24 4 *short_4 2
C4027 EV@1U/6.3V_4 AA4 NC_19 PEX_TX14_N AL25 1 4 PEGX_RST#
NC_20 PEX_TX15 4 DGPU_HOLD_RST#
AA5 AK25 1
C AA6 NC_21 PEX_TX15_N C4030 U4001 C
3
C4028 [email protected]/16V_4 AA7 NC_22 GC6@74AHC1G09GW
3
C4029 *[email protected]/16V_4 AA8 NC_23 AL13 U4002 R4005
NC_24 PEX_REFCLK CLK_PCIE_VGA 6
C4031 *[email protected]/16V_4 AK13 CLK_PCIE_VGA# 6 GC6@1000p/50V_4 GC6@TC7SH08FU(F) GC6@100K_4
PEX_REFCLK_N 17 GPU_PEX_RST_HOLD#
PLACE CLOSE TO GPU BALLS
AJ26 PEX_TSTCLK R4006 *EV@200/F_4 *GC6@0_4
J8 PEX_TSTCLK_OUT AK26 PEX_TSTCLK# RST_MON# R4007 PEGX_RST#
K8 3V3_AON_1 PEX_TSTCLK_OUT_N
+3V_GFX 3V3_AON_2
+3V_MAIN L8 AJ11
M8 3V3_MAIN_1 NC AJ12 PEGX_RST#
VDD33 : 85mA 3V3_MAIN_2 PEX_RST_N PEGX_RST# 17
PLACE CLOSE TO BGA

PEX_CLKREQ_N
AK12 PEX_CLKREQ# R4008 EV@10K_4 +3V_GFX
GC6 FBVDDQ_EN
C4032 [email protected]/6.3V_4 +1.05V_GFX
C4033 EV@1U/6.3V_4 AP29 PEX_TERMP R4009 [email protected]/F_4 GC6_FB_EN 1
PEX_TERMP 4,17 GC6_FB_EN
R4010 *short_6
B2A 3
FBVDDQ_EN 41
PLACE CLOSE TO GPU BALLS AK11 TESTMODE R4011 EV@10K_4
TESTMODE
C4034 [email protected]/16V_4 40 GPU_PWR_GD 2
C3A
1
C4035 [email protected]/16V_4 AG26 PEX_PLLVDD PEX_PLLVDD : 150mA C4036 [email protected]/6.3V_4 PLACE NEAR GPU D4000
PEX_PLLVDD GC6@BAT54CW_200MA R4012
AH12 PEX_SVDD_3V3 : 210mA +3V_GFX C4037 EV@1U/6.3V_4 PLACE NEAR GPU GC6@1M_4
PEX_PLL_HVDD AG12 [email protected]/16V_4 C4038
2
PEX_SVDD_3V3 [email protected]/6.3V_4 C4039 C4040 [email protected]/16V_4 PLACE UNDER GPU BALLS
[email protected]/6.3V_4 C4041
P8 3.3V_AUX
D 3.3V_AUX_NC D
PLACE NEAR BGA
TP4000
L4 +3V_MAIN
VDD_SENSE VGA_VCCSENSE 40
2
L5
GND_SENSE VGA_VSSSENSE 40
PEX_CLKREQ# 1 3
CLK_PEGA_REQ# 6
PROJECT : ZAA
Q4002 Size Document Number Rev
EV@2N7002KW_115MA 1A
N16x - 1/6 (PCIE)
1 2 3 4 5 6 7 8
Dr-Bios.com
1 2 3 4 5 6 7 8
U3002B U3002C
EV_SP@N16 EV_SP@N16
FBB_CMD0 D13 G9 VMB_DQ0
19 FBB_CMD0 FBB_CMD1 E14 FBB_CMD0 FBC_D00 E9 VMB_DQ1 VMB_DQ0 19
FBA_CMD0 VMA_DQ0 19 FBB_CMD1 FBB_CMD2 FBB_CMD1 FBC_D01 VMB_DQ2 VMB_DQ1 19
U30 L28 F14 G8
19 FBA_CMD0 FBA_CMD1 T31 FBA_CMD0
[MEMORY I/F A]
FBA_D00 M29 VMA_DQ1 VMA_DQ0 19 19 FBB_CMD2 FBB_CMD3 A12 FBC_CMD2 MEMORY I/F C FBC_D02 F9 VMB_DQ3 VMB_DQ2 19
19 FBA_CMD1 FBA_CMD2 FBA_CMD1 FBA_D01 VMA_DQ2 VMA_DQ1 19 19 FBB_CMD3 FBB_CMD4 FBB_CMD3 FBC_D03 VMB_DQ4 VMB_DQ3 19
U29 L29 B12 F11
19 FBA_CMD2 FBA_CMD3 R34 FBA_CMD2 FBA_D02 M28 VMA_DQ3 VMA_DQ2 19 19 FBB_CMD4 FBB_CMD5 C14 FBB_CMD4 FBC_D04 G11 VMB_DQ5 VMB_DQ4 19
19 FBA_CMD3 FBA_CMD4 R33 FBA_CMD3 FBA_D03 N31 VMA_DQ4 VMA_DQ3 19 19 FBB_CMD5 FBB_CMD6 B14 FBB_CMD5 FBC_D05 F12 VMB_DQ6 VMB_DQ5 19
19 FBA_CMD4 FBA_CMD5 U32 FBA_CMD4 FBA_D04 P29 VMA_DQ5 VMA_DQ4 19 19 FBB_CMD6 FBB_CMD7 G15 FBB_CMD6 FBC_D06 G12 VMB_DQ7 VMB_DQ6 19
19 FBA_CMD5 FBA_CMD6 U33 FBA_CMD5 FBA_D05 R29 VMA_DQ6 VMA_DQ5 19 19 FBB_CMD7 FBB_CMD8 F15 FBC_CMD7 FBC_D07 G6 VMB_DQ8 VMB_DQ7 19
19 FBA_CMD6 FBA_CMD7 U28 FBA_CMD6 FBA_D06 P28 VMA_DQ7 VMA_DQ6 19 19 FBB_CMD8 FBB_CMD9 E15 FBB_CMD8 FBC_D08 F5 VMB_DQ9 VMB_DQ8 19
V28 J28 D15 E6
19 FBA_CMD8 FBA_CMD9 V29 FBA_CMD8 FBA_D08 H29 VMA_DQ9 VMA_DQ8 19 19 FBB_CMD10 FBB_CMD11 A14 FBB_CMD10 FBC_D10 F6 VMB_DQ11 VMB_DQ10 19
A 19 FBA_CMD9 FBA_CMD10 FBA_CMD9 FBA_D09 VMA_DQ10 VMA_DQ9 19 19 FBB_CMD11 FBB_CMD12 FBB_CMD11 FBC_D11 VMB_DQ12 VMB_DQ11 19 A
V30 J29 D14 F4
19 FBA_CMD10 FBA_CMD11 U34 FBA_CMD10 FBA_D10 H28 VMA_DQ11 VMA_DQ10 19 19 FBB_CMD12 FBB_CMD13 A15 FBB_CMD12 FBC_D12 G4 VMB_DQ13 VMB_DQ12 19
U31 G29 B15 E2
19 FBA_CMD12 FBA_CMD13 V34 FBA_CMD12 FBA_D12 E31 VMA_DQ13 VMA_DQ12 19 19 FBB_CMD14 FBB_CMD15 C17 FBB_CMD14 FBC_D14 F3 VMB_DQ15 VMB_DQ14 19
19 FBA_CMD13 FBA_CMD14 V33 FBA_CMD13 FBA_D13 E32 VMA_DQ14 VMA_DQ13 19 19 FBB_CMD15 FBB_CMD16 D18 FBB_CMD15 FBC_D15 C2 VMB_DQ16 VMB_DQ15 19
19 FBA_CMD14 FBA_CMD15 Y32 FBA_CMD14 FBA_D14 F30 VMA_DQ15 VMA_DQ14 19 19 FBB_CMD16 FBB_CMD17 E18 FBB_CMD16 FBC_D16 D4 VMB_DQ17 VMB_DQ16 19
19 FBA_CMD15 FBA_CMD16 AA31 FBA_CMD15 FBA_D15 C34 VMA_DQ16 VMA_DQ15 19 19 FBB_CMD17 FBB_CMD18 F18 FBB_CMD17 FBC_D17 D3 VMB_DQ18 VMB_DQ17 19
19 FBA_CMD16 FBA_CMD17 AA29 FBA_CMD16 FBA_D16 D32 VMA_DQ17 VMA_DQ16 19 19 FBB_CMD18 FBB_CMD19 A20 FBB_CMD18 FBC_D18 C1 VMB_DQ19 VMB_DQ18 19
19 FBA_CMD17 FBA_CMD18 AA28 FBA_CMD17 FBA_D17 B33 VMA_DQ18 VMA_DQ17 19 19 FBB_CMD19 FBB_CMD20 B20 FBB_CMD19 FBC_D19 B3 VMB_DQ20 VMB_DQ19 19
19 FBA_CMD18 FBA_CMD19 AC34 FBA_CMD18 FBA_D18 C33 VMA_DQ19 VMA_DQ18 19 19 FBB_CMD20 FBB_CMD21 C18 FBB_CMD20 FBC_D20 C4 VMB_DQ21 VMB_DQ20 19
19 FBA_CMD19 FBA_CMD20 AC33 FBA_CMD19 FBA_D19 F33 VMA_DQ20 VMA_DQ19 19 19 FBB_CMD21 FBB_CMD22 B18 FBB_CMD21 FBC_D21 B5 VMB_DQ22 VMB_DQ21 19
19 FBA_CMD20 FBA_CMD21 AA32 FBA_CMD20 FBA_D20 F32 VMA_DQ21 VMA_DQ20 19 19 FBB_CMD22 FBB_CMD23 G18 FBB_CMD22 FBC_D22 C5 VMB_DQ23 VMB_DQ22 19
19 FBA_CMD21 FBA_CMD22 AA33 FBA_CMD21 FBA_D21 H33 VMA_DQ22 VMA_DQ21 19 19 FBB_CMD23 FBB_CMD24 G17 FBB_CMD23 FBC_D23 A11 VMB_DQ24 VMB_DQ23 19
Y28 H32 F17 C11
19 FBA_CMD23 FBA_CMD24 Y29 FBA_CMD23 FBA_D23 P34 VMA_DQ24 VMA_DQ23 19 19 FBB_CMD25 FBB_CMD26 D16 FBB_CMD25 FBC_D25 D11 VMB_DQ26 VMB_DQ25 19
W 31 P32 A18 B11
19 FBA_CMD25 FBA_CMD26 Y30 FBA_CMD25 FBA_D25 P31 VMA_DQ26 VMA_DQ25 19 19 FBB_CMD27 FBB_CMD28 D17 FBB_CMD27 FBC_D27 D8 VMB_DQ28 VMB_DQ27 19
AA34 P33 A17 A8
19 FBA_CMD27 FBA_CMD28 Y31 FBA_CMD27 FBA_D27 L31 VMA_DQ28 VMA_DQ27 19 19 FBB_CMD29 FBB_CMD30 B17 FBB_CMD29 FBC_D29 C8 VMB_DQ30 VMB_DQ29 19
19 FBA_CMD28 FBA_CMD29 Y34 FBA_CMD28 FBA_D28 L34 VMA_DQ29 VMA_DQ28 19 19 FBB_CMD30 FBB_CMD31 E17 FBC_CMD30 FBC_D30 B8 VMB_DQ31 VMB_DQ30 19
19 FBA_CMD29 FBA_CMD30 Y33 FBA_CMD29 FBA_D29 L32 VMA_DQ30 VMA_DQ29 19 19 FBB_CMD31 FBC_CMD31 FBC_D31 F24 VMB_DQ32 VMB_DQ31 19
19 FBA_CMD30 FBA_CMD31 V31 FBA_CMD30 FBA_D30 L33 VMA_DQ31 VMA_DQ30 19 FBC_D32 G23 VMB_DQ33 VMB_DQ32 19
19 FBA_CMD31 FBA_CMD31 FBA_D31 AG28 VMA_DQ32 VMA_DQ31 19 FBB_DBI0 E11 FBC_D33 E24 VMB_DQ34 VMB_DQ33 19
FBA_D32 VMA_DQ33 VMA_DQ32 19 19 FBB_DBI[7:0] FBB_DBI1 FBC_DQM0 FBC_D34 VMB_DQ35 VMB_DQ34 19
AF29 E3 G24
FBA_DBI0 P30 FBA_D33 AG29 VMA_DQ34 VMA_DQ33 19 FBB_DBI2 A3 FBC_DQM1 FBC_D35 D21 VMB_DQ36 VMB_DQ35 19
19 FBA_DBI[7:0] FBA_DBI1 FBA_DQM0 FBA_D34 VMA_DQ35 VMA_DQ34 19 FBB_DBI3 FBC_DQM2 FBC_D36 VMB_DQ37 VMB_DQ36 19
F31 AF28 C9 E21
FBA_DBI2 F34 FBA_DQM1 FBA_D35 AD30 VMA_DQ36 VMA_DQ35 19 FBB_DBI4 F23 FBC_DQM3 FBC_D37 G21 VMB_DQ38 VMB_DQ37 19
FBA_DBI3 M32 FBA_DQM2 FBA_D36 AD29 VMA_DQ37 VMA_DQ36 19 FBB_DBI5 F27 FBC_DQM4 FBC_D38 F21 VMB_DQ39 VMB_DQ38 19
FBA_DBI4 AD31 FBA_DQM3 FBA_D37 AC29 VMA_DQ38 VMA_DQ37 19 FBB_DBI6 C30 FBC_DQM5 FBC_D39 G27 VMB_DQ40 VMB_DQ39 19
FBA_DBI5 AL29 FBA_DQM4 FBA_D38 AD28 VMA_DQ39 VMA_DQ38 19 FBB_DBI7 A24 FBC_DQM6 FBC_D40 D27 VMB_DQ41 VMB_DQ40 19
FBA_DBI6 AM32 FBA_DQM5 FBA_D39 AJ29 VMA_DQ40 VMA_DQ39 19 FBC_DQM7 FBC_D41 G26 VMB_DQ42 VMB_DQ41 19
B FBA_DBI7 AF34 FBA_DQM6 FBA_D40 AK29 VMA_DQ41 VMA_DQ40 19 FBC_D42 E27 VMB_DQ43 VMB_DQ42 19 B
FBA_DQM7 FBA_D41 AJ30 VMA_DQ42 VMA_DQ41 19 FBB_EDC0 D10 FBC_D43 E29 VMB_DQ44 VMB_DQ43 19
FBA_D42 VMA_DQ43 VMA_DQ42 19 19 FBB_EDC[7:0] FBB_EDC1 FBC_DQS_W P0 FBC_D44 VMB_DQ45 VMB_DQ44 19
AK28 D5 F29
FBA_EDC0 M31 FBA_D43 AM29 VMA_DQ44 VMA_DQ43 19 FBB_EDC2 C3 FBC_DQS_W P1 FBC_D45 E30 VMB_DQ46 VMB_DQ45 19
19 FBA_EDC[7:0] FBA_EDC1 FBA_DQS_W P0 FBA_D44 VMA_DQ45 VMA_DQ44 19 FBB_EDC3 FBC_DQS_W P2 FBC_D46 VMB_DQ47 VMB_DQ46 19
G31 AM31 B9 D30
FBA_EDC2 E33 FBA_DQS_W P1 FBA_D45 AN29 VMA_DQ46 VMA_DQ45 19 FBB_EDC4 E23 FBC_DQS_W P3 FBC_D47 A32 VMB_DQ48 VMB_DQ47 19
FBA_EDC3 M33 FBA_DQS_W P2 FBA_D46 AM30 VMA_DQ47 VMA_DQ46 19 FBB_EDC5 E28 FBC_DQS_W P4 FBC_D48 C31 VMB_DQ49 VMB_DQ48 19
FBA_EDC4 AE31 FBA_DQS_W P3 FBA_D47 AN31 VMA_DQ48 VMA_DQ47 19 FBB_EDC6 B30 FBC_DQS_W P5 FBC_D49 C32 VMB_DQ50 VMB_DQ49 19
FBA_EDC5 AK30 FBA_DQS_W P4 FBA_D48 AN32 VMA_DQ49 VMA_DQ48 19 FBB_EDC7 A23 FBC_DQS_W P6 FBC_D50 B32 VMB_DQ51 VMB_DQ50 19
FBA_EDC6 AN33 FBA_DQS_W P5 FBA_D49 AP30 VMA_DQ50 VMA_DQ49 19 FBC_DQS_W P7 FBC_D51 D29 VMB_DQ52 VMB_DQ51 19
FBA_EDC7 AF33 FBA_DQS_W P6 FBA_D50 AP32 VMA_DQ51 VMA_DQ50 19 FBC_D52 A29 VMB_DQ53 VMB_DQ52 19
FBA_DQS_W P7 FBA_D51 AM33 VMA_DQ52 VMA_DQ51 19 D9 FBC_D53 C29 VMB_DQ54 VMB_DQ53 19
FBA_D52 AL31 VMA_DQ53 VMA_DQ52 19 E4 FBC_DQS_RN0 FBC_D54 B29 VMB_DQ55 VMB_DQ54 19
M30 FBA_D53 AK33 VMA_DQ54 VMA_DQ53 19 B2 FBC_DQS_RN1 FBC_D55 B21 VMB_DQ56 VMB_DQ55 19
H30 FBA_DQS_RN0 FBA_D54 AK32 VMA_DQ55 VMA_DQ54 19 A9 FBC_DQS_RN2 FBC_D56 C23 VMB_DQ57 VMB_DQ56 19
E34 FBA_DQS_RN1 FBA_D55 AD34 VMA_DQ56 VMA_DQ55 19 D22 FBC_DQS_RN3 FBC_D57 A21 VMB_DQ58 VMB_DQ57 19
M34 FBA_DQS_RN2 FBA_D56 AD32 VMA_DQ57 VMA_DQ56 19 GDDR5 NO USE D28 FBC_DQS_RN4 FBC_D58 C21 VMB_DQ59 VMB_DQ58 19
GDDR5 NO USE AF30 FBA_DQS_RN3
FBA_DQS_RN4
FBA_D57
FBA_D58
AC30 VMA_DQ58 VMA_DQ57
VMA_DQ58
19
19
A30 FBC_DQS_RN5
FBC_DQS_RN6
FBC_D59
FBC_D60
B24 VMB_DQ60 VMB_DQ59
VMB_DQ60
19
19
AK31 AD33 VMA_DQ59 B23 C24 VMB_DQ61
AM34 FBA_DQS_RN5 FBA_D59 AF31 VMA_DQ60 VMA_DQ59 19 FBC_DQS_RN7 FBC_D61 B26 VMB_DQ62 VMB_DQ61 19
AF32 FBA_DQS_RN6 FBA_D60 AG34 VMA_DQ61 VMA_DQ60 19 FBC_D62 C26 VMB_DQ63 VMB_DQ62 19
FBA_DQS_RN7 FBA_D61 AG32 VMA_DQ62 VMA_DQ61 19 FBC_D63 VMB_DQ63 19
FBA_D62 AG33 VMA_DQ63 VMA_DQ62 19
AA27 FBA_D63 VMA_DQ63 19 D12
+1.35V_GFX FBVDDQ_1 FBC_CLK0 VMB_CLK0 19
AA30 E12
AB27 FBVDDQ_2 R30 FBC_CLK0_N E20 VMB_CLK0# 19
FBVDDQ_3 FBA_CLK0 VMA_CLK0 19 FBC_CLK1 VMB_CLK1 19
AB33 R31 F20
FBVDDQ_4 FBA_CLK0_N VMA_CLK0# 19 FBC_CLK1_N VMB_CLK1# 19
AC27 AB31
AD27 FBVDDQ_5 FBA_CLK1 AC31 VMA_CLK1 19
FBVDDQ_6 FBA_CLK1_N VMA_CLK1# 19 FBB_DEBUG0_K
AE27 G14
AF27 FBVDDQ_7 FBB_CMD32 G20 FBB_DEBUG1_K TP4104
C4100 EV@1U/6.3V_4 TP4105
C C4101 EV@1U/6.3V_4 AG27 FBVDDQ_8 R28 FBA_DEBUG0_K FBB_CMD33 C12 FBB_DEBUG0 R4100 *[email protected]/F_4 C
FBVDDQ_9 FBA_CMD32 FBA_DEBUG1_K TP4106 FBB_CMD34 FBB_DEBUG1 +1.35V_GFX
C4102 EV@1U/6.3V_4 B13 AC28 C20 R4102 *[email protected]/F_4
FBVDDQ_10 FBA_CMD33 FBA_DEBUG0 TP4107 FBB_CMD35
C4103 EV@1U/6.3V_4 B19 R32 *[email protected]/F_4 R4103
FBVDDQ_12 FBA_CMD34 +1.35V_GFX
E13 AC32 FBA_DEBUG1 *[email protected]/F_4 R4105
E19 FBVDDQ_13 FBA_CMD35 F8
B2A H10 FBVDDQ_15 H26 FBB_W CK01 E8 VMB_WCK01 19
FBVDDQ_16 FB_VREF FBB_W CK01_N VMB_WCK01# 19
C4104 [email protected]/16V_4 H11 A5
H12 FBVDDQ_17 K31 FBB_W CK23 A6 VMB_WCK23 19
C4105 [email protected]/16V_4
FBVDDQ_18 FBA_W CK01 VMA_WCK01 19 FBB_W CK23_N VMB_WCK23# 19
C4106 [email protected]/16V_4 H13 L30 D24
H14 FBVDDQ_19 FBA_W CK01_N H34 VMA_WCK01# 19 FBB_W CK45 D25 VMB_WCK45 19
C4107 [email protected]/16V_4
FBVDDQ_20 FBA_W CK23 VMA_WCK23 19 FBB_W CK45_N VMB_WCK45# 19
H18 J34 B27
H19 FBVDDQ_23 FBA_W CK23_N AG30 VMA_WCK23# 19 FBB_W CK67 C27 VMB_WCK67 19
H20 FBVDDQ_24 FBA_W CK45 AG31 VMA_WCK45 19 FBB_W CK67_N VMB_WCK67# 19
H21 FBVDDQ_25 FBA_W CK45_N AJ34 VMA_WCK45# 19
H22 FBVDDQ_26 FBA_W CK67 AK34 VMA_WCK67 19 D6
H23 FBVDDQ_27 FBA_W CK67_N VMA_WCK67# 19 NC D7
H24 FBVDDQ_28 J30 NC C6
H8 FBVDDQ_29 NC J31 R856 EV@10K_4 NC B6
H9 FBVDDQ_30 NC J32 NC F26
L27 FBVDDQ_31 NC J33 NC E26
M27 FBVDDQ_32 NC AH31 C1211 [email protected]/16V_4 NC A26
N27 FBVDDQ_33 NC AJ31 NC A27
FBVDDQ_34 NC N16P-GT/GX N16E-GR NC
PLACE CLOSE TO BGA P27 AJ32 C1212 EV@22U/6.3V_6
R27 FBVDDQ_35 NC AJ33
FBVDDQ_36 NC FBA_PLL_AVDD 1.05v 3.3V C262 close to H27 (under GPU)
C4108 [email protected]/6.3V_4 T27 C1211 close to K27 (under GPU) FBB_PLL_AVDD H17 FB_PLL_AVDD
T30 FBVDDQ_37 E1 PS_FB_CLAMP FBB_PLL_AVDD
C4109 [email protected]/6.3V_4
FBVDDQ_38 FB_CLAMP C1212 near to GPU
C4110 [email protected]/6.3V_4 T33
C4113 [email protected]/6.3V_4 Y27 FBVDDQ_39 K27 FB_DLL_AVDD EV@HCB1005KF-330T30 L26 *EV@HCB1005KF-330T30 L4206 B2A
FBVDDQ_44 FB_DLL_AVDD +1.05V_GFX +3V_MAIN
C4111 EV@10U/6.3V_6 C4112
C4115 EV@10U/6.3V_6 U27 FB_PLL_AVDD +FB_PLL_AVDD : 62mA EV@HCB1005KF-330T30 L4100 [email protected]/16V_4
FBA_PLL_AVDD +1.05V_GFX
D B16 F1 FB_VDDQ_SENSE R857 *EV@0_4 D

FBVDDQ_AON_1 FB_VDDQ_SENSE +1.35V_GFX
C4117 *EV@22U/6.3V_6 E16 C963 [email protected]/16V_4
FBVDDQ_AON_2 FB_GND_SENSE
B2A H15
H16 FBVDDQ_AON_3 FB_GND_SENSE
F2 R858 *EV@0_4
C965 EV@22U/6.3V_6
Dr-Bios.com
C4119 EV@22U/6.3V_6 V27 FBVDDQ_AON_4 J27 FB_CAL_PD_VDDQ R859 [email protected]/F_4
FBVDDQ_AON_5 FB_CAL_PD_VDDQ +1.35V_GFX
W 27
W 30 FBVDDQ_AON_6 H27 FB_CAL_PU_GND R860 [email protected]/F_4
W 33 FBVDDQ_AON_7 FB_CAL_PU_GND +1.35V_GFX 19,41
FBVDDQ_AON_8
FB_CALTERM_GND
H25 FB_CAL_TERM_GND R861 [email protected]/F_4
+1.05V_GFX 14,16,41
PROJECT : ZAA
N16x - 2/6 (Memory) 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U3002D
EV_SP@N16
AH8 AM6
IFPAB_PLLVDD IFPA_TXC AN6
[IFPA/B_LVDS] IFPA_TXC_N AP3
AG8 IFPA_TXD0 AN3
IFPA_IOVDD IFPA_TXD0_N AN5
AG9 IFPA_TXD1 AM5
IFPB_IOVDD IFPA_TXD1_N
IFPA_TXD2
AL6
AK6
3V_MAIN_PWGD +3V_GFX
IFPA_TXD2_N AJ6
A A
AJ8 IFPA_TXD3 AH6
IFPAB_RSET IFPA_TXD3_N
AJ9 +3V
IFPB_TXC AH9 R4200
IFPB_TXC_N AP6 [email protected]/F_4
IFPB_TXD4 AP5
+3V_MAIN 14,15,17 IFPB_TXD4_N 3V_MAIN_PW GD
AM7 R4201
+1.05V_GFX 14,15,41 IFPB_TXD5 3V_MAIN_PW GD 40,41
AL7 [email protected]_4
+3V_GFX 14,17,30,41 IFPB_TXD5_N
3
AN8
+3V 2,4,6,7,8,9,12,13,14,21,22,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41 IFPB_TXD6 AM8 R4202
IFPB_TXD6_N AK8 2
IFPB_TXD7 *EV@100K/F_4
3
AL8
IFPB_TXD7_N R4203 [email protected]_4 2
+3V_MAIN
C4200 Q4200
1
AF7 AG3 Q4201 EV@1000p/50V_4 EV@DTC144EU
1
IFPC_PLLVDD IFPC_AUX_I2CW_SCL AG2 C4201 EV@MMBT3904-7-F
[IFPC/D_TMDS]IFPC_AUX_I2CW_SDA_N
AG7
IFPD_PLLVDD IFPC_L0
AK1 *EV@1000p/50V_4 +1.05V_GFX and GPU core power EN
AJ1
IFPC_L0_N AJ3
IFPC_L1 AJ2
IFPC_L1_N AH3
IFPC_L2 AH4
IFPC_L2_N AG5
AF6 IFPC_L3 AG4
IFPC_IOVDD IFPC_L3_N
AG6 AK3
IFPD_IOVDD IFPD_AUX_I2CX_SCL AK2
IFPD_AUX_I2CX_SDA_N AM1
B IFPD_L0 AM2 B
IFPD_L0_N AM3
AF8 IFPD_L1 AM4
IFPC_RSET IFPD_L1_N AL3
AN2 IFPD_L2 AL4
NC IFPD_L2_N AK4 +3V_GFX
IFPD_L3 AK5
IFPD_L3_N
DGPU_PGOK-1
AB8 AB3 +3V R4204
IFPEF_PLLVDD IFPE_AUX_I2CY_SCL AB4 [email protected]_4
[IFPE/F_DP] IFPE_AUX_I2CY_SDA_N AD2
AC7 IFPE_L0 AD3
AC8 IFPE_IOVDD IFPE_L0_N AD1 R4205
IFPF_IOVDD IFPE_L1 DGPU_PW ROK 4
AC1 [email protected]_4
IFPE_L1_N AC2
IFPE_L2
3
AD6 AC3
IFPEF_RSET IFPE_L2_N AC4
IFPE_L3 AC5 2 Q4202 R4206
IFPE_L3_N
3
EV@100K/F_4
AF3 R4207 DGPU_POK2 2
[email protected]_4 Q4203 EV@DTC144EUA
IFPF_AUX_I2CZ_SCL 41 HW PG_1.35VGFX
AF2 EV@METR3904-G
1
IFPF_AUX_I2CZ_SDA_N AE3 C4202
1
IFPF_L0 AE4 C4203 EV@1000P/50V_4
IFPF_L0_N AF4 *EV@1000P/50V_4
IFPF_L1 AF5
IFPF_L1_N AD4
IFPF_L2 AD5
IFPF_L2_N AG1
C IFPF_L3 AF1 C
IFPF_L3_N
AG10 AK9
DACA_VDD DACA_RED AL10
[DACA/B_CRT] DACA_GREEN AL9
AP9 DACA_BLUE
DACA_VREF
AM9
AP8 DACA_HSYNC AN9
DACA_RSET DACA_VSYNC XTAL27_IN
XTAL27_OUT
I2CA_SCL Y4200
R4 [email protected]/F_4 R4208
I2CA_SCL R5 I2CA_SDA [email protected]/F_4 R4209 3 2
I2CA_SDA 4 1
PLACE CLOSE TO GPU PLACE CLOSE TO BALLS
PLLVDD : 200mA EV@27MHZ_10
L4200 EV@HCB1005KF-330T30 NV_PLLVDD AD8
+1.05V_GFX PLLVDD
B2A Reserve C4206 C4207
C4204 C4205 EV@10P/50V_4C EV@10P/50V_4C
EV@22U/6.3V_6 [email protected]/16V_4 +3V_GFX
B2A
XTAL_OUTBUFF R4210 *EV@10K_4
PLLVDD AE8
SP_PLLVDD
C5092 Close to AE8
D D
H3 XTAL27_IN
L4201 EV@BLM15PX181SN1D_1.5A
C5090 Close to AD7AD7 XTAL_IN H2 XTAL27_OUT
+1.05V_GFX VID_PLLVDD XTAL_OUT
Dr-Bios.com
J4 XTAL_OUTBUFF R4211 EV@10K_4
[XTAL IN] XTAL_OUTBUFF XTAL_SSIN
B2A XTAL_SSIN
H1 R4212 EV@10K_4
C4208 C4209 C4210 C4211
EV@22U/6.3V_6 [email protected]/6.3V_4 [email protected]/16V_4 [email protected]/16V_4
PROJECT : ZAA
N16x - 3/6 (Display) 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3V_GFX +3V_MAIN
STRAP0 Remove P/N for BOM making. For N16S-KA/KB need PU 4.99k.
DG : STUFF 50KΩ PU TO 3.3V_AON
Package DevID
2
R4300
[email protected]/F_4
R4301
*[email protected]/F_4
R4302
*EV@15K/F_4
R4303
*[email protected]/F_4
R4304
*EV@20K/F_4 R4305 R4306 R4307
(default)
EV_SP@XXXX [email protected]/F_4 *EV@10K/F_4 N16S-GTR GB4b-128
1
STRAP0
STRAP1 ROM_SI
STRAP2 ROM_SO N16S-GT1-KA GB4b-128
STRAP3 ROM_SCLK
A U3002E STRAP4 N16S-GT1-KB GB4b-128 A
EV_SP@N16
R4313 R4314 R4315
[MIOA] R4308 R4309 R4310 R4311 R4312 EV_SP@XXXX [email protected]/F_4 [email protected]/F_4
*[email protected]/F_4 *[email protected]/F_4 *[email protected]/F_4 *[email protected]/F_4 *[email protected]/F_4
Resistor P/N
4.99K---> CS24992FB26
+3V_GFX 10K ---> CS31002FB26
15K ---> CS31502FB24
20K ---> CS32002FB29
R4316 EV@10K_4 GPU_OVT#
GPU_ALERT
24.9K --->CS32492FB16
R4317 EV@10K_4
30.1K --->CS33012FB18
R4318 EV@10K_4 GPU_EVENT#_D 34.8K---> CS33482FB22
R4319 EV@10K_4 GPIO12_ACIN 45.3K ---> CS34532FB18
+3V_MAIN_EN
PU +3V_MAIN PD 49.9K ---> CS34992FB10
R4320 *EV@10K_4
Page14 PU 4.99K 1000 0000
R4321 EV@10K_4 SYS_PEX_RST_MON#
R4322 EV@10K_4 GPU_PEX_RST_HOLD# 10K 1001 0001

R4323 *EV@10K_4 GPIO10_VREF 15K 1010 0010 Mutil-level mode strapping:
R4324 EV@10K_4 DGPU_PSI 20K 1011 0011 For N16P-GT-A2 :
24.9K 1100 0100 R886=40.2k PD
[MIOB] 30.1K 1101 0101 1.ROM_SCLK =4.99K PD
B
R4325 EV@100K_4 GPIO10_VREF
2.ROM_SO = 4.99K PD B
34.8K 1110 0110
R4326 EV@10K_4 GC6_FB_EN_R 3.ROM_SI= Memory strap setting
45.3K 1111 0111 4.STRAP0 = 49.9k PU
5.Strap4~1 = Reserve Pull up and Pull down
N16P-GT-A2 VRAM Configuration Table:
Reserve PU/PD for Debug Default: GDDR5 VRAM
Memory Size Vendor P/N Mfr. P/N ROM_SI
+3V_MAIN
OBS 128M x 16 Samsung AKG5MWDT502 K4G20325FD-FC03 0000 (0x0) 4.99K PD

R4330 *EV@10K_4 JTAG_TMS
R4331 *EV@10K_4 JTAG_TDI Hynix
256M x 16 (4Gb) (1.35V) AKG5PWUTW11 H5GC4H24AJR-T2C 0110 (0x6) 34.8K PD
R4332 *EV@10K_4 JTAG_TCK
R4334 EV@10K_4 JTAG_TRST#
256M x 16 (4Gb) Samsung 20K PD (16P)

(default) (1.35V) AKG5PGDT500 K4G41325FC-HC03 0011 (0x3)
15K PD (16E)
JTAG_TCK AM10 P6 GC6_FB_EN_R
TP4300
TP4301 JTAG_TMS AP11 JTAG_TCK
JTAG_TMS [MISC_GPIO/I2C/JTAG/THER]
GPIO0
GPIO1
M3 TP4302 N16P-GT-A2 (GB4b-128)
TP4303 JTAG_TDI AM11 L6 TP4304
JTAG_TDI GPIO2
TP4305 JTAG_TDO AP12
JTAG_TDO GPIO3
P5 TP4306 Logical Logical Logical Logical
TP4307 JTAG_TRST# AN11 P7 TP4308 Strapping Bit3 Strapping Bit2 Strapping Bit1 Strapping Bit0
JTAG_TRST_N GPIO4 L7 +3V_MAIN_EN
GPIO5 GPU_EVENT#_D +3V_MAIN_EN 14
GPIO6
M7 ROM_SCLK SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED 0001
C R4337 [email protected]/F_4 I2CB_SCL R7 N8 TP4309 C
I2CB_SCL GPIO7
R4338 [email protected]/F_4 I2CB_SDA R6
I2CB_SDA ROM_SI RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0] XXXX
L3 SYS_PEX_RST_MON#
GPIO8 SYS_PEX_RST_MON# 14
ROM_SO DEVID_SEL PCIE_CFG SMB_ALT_ADDR VGA_DEVICE 0001
R4339 [email protected]/F_4 I2CC_SCL R2
I2CC_SDA R3 I2CC_SCL GPU_ALERT
R4340 [email protected]/F_4
I2CC_SDA GPIO9
M2 STRAP0 Keep footprint to PU to 3V3_AON and PD to GND [Stuff 49.9K PU] 0001
L1 GPIO10_VREF
GPIO10 GPIO10_VREF 19
GPIO11
M5
PWM-VID 40 STRAP1
GFX_SCL T4 N3 GPIO12_ACIN
GFX_SDA I2CS_SCL GPIO12 DGPU_PSI
T3
I2CS_SDA GPIO13
M4
DGPU_PSI 40 STRAP2
N4 Keep footprint to PU to 3V3_AON and PD to GND [Do Not Stuff
GPIO14
GPIO15
P2 STRAP3
K4 R8
THERMDN GPIO16
K3
THERMDP GPIO17
M6 STRAP4
R1 +3V_GFX
GPIO18 P3
GPIO19 P4 +3V_GFX
GPIO20
2
P1 GPU_PEX_RST_HOLD# Q4300A *EV@ME2N7002DKW-G_115MA

GPIO21 GPU_PEX_RST_HOLD# 14
GC6_FB_EN_R 1 6 R4328 *short_4 +3V_MAIN
H4 ROM_SCLK GC6_FB_EN 4,14
STRAP0 J2 ROM_SCLK H6 R4341 R4342
STRAP1 J7 STRAP0 [MISC2_ROM] ROM_CS_N H5 ROM_SI R4329 *short_4
STRAP2 J6 STRAP1 ROM_SI H7 ROM_SO
[email protected]_4 [email protected]_4 GFx SMBus Isolation
STRAP3 J5 STRAP2 ROM_SO +3V_GFX 5
STRAP4 J3 STRAP3
+3V_GFX STRAP4 GFX_SCL 4 3
2ND_MBCLK 7,30
5
Q4300B *EV@ME2N7002DKW-G_115MA
L2 GPU_BUFRST R4343 *EV@10K_4
R4344 *EV@10K_4 MULTISTRAP_REF_GND J1 BUFRST_N GPU_EVENT#_D 4 3 R4335 *short_4 2
MULTISTRAP_REF_GND DGPU_EVENT# 4
GFX_SDA 1 6
GPU_OVT# 2ND_MBDATA 7,30
D
R4345
[email protected]/F_4 OVERT
M1 R4336 *short_4 B2A D
Q4302
EV@ME2N7002DKW-G_115MA
Dr-Bios.com
+3V_GFX
+3V_GFX 14,16,30,41 PEGX_RST# 14

5
+3V_MAIN 14,15,16
2
R4346 GPIO12_ACIN4 3
31 GPU_THROTTING# dGPU_OPP# 30 GPU_OVT# dGPU_OTP#
1 6
*EV@0_4 Q4301B
dGPU_OTP# 30 PROJECT : ZAA
EV@ME2N7002DKW-G_115MA Q4301A Size Document Number Rev
GPIO12 AC detect B2A EV@ME2N7002DKW-G_115MA
N16x - 4/6 (MISC) 1A
AC high
DC low Date: Monday, March 28, 2016 Sheet 17 of 48
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U3002G
VDD/XVDD : 43A EV_SP@N16
A2 D2 +VGPU_CORE
+VGPU_CORE AA17 GND_1 GND_101 D31
U3002F +VGPU_CORE AA18 GND_2 [GPU GND] GND_102 D33
EV_SP@N16 AA20 GND_3 GND_103 E10
AA12 U1 AA22 GND_4 GND_104 E22 C4400 EV@1U/6.3V_4
AA14 VDD_001 XVDD_001 U2 AB12 GND_5 GND_105 E25 C4401 EV@1U/6.3V_4
AA16 VDD_002 [GPU VDD] XVDD_002 U3 AB14 GND_6 GND_106 E5 C4402 EV@1U/6.3V_4
AA19 VDD_003 XVDD_003 U4 AB16 GND_7 GND_107 E7
PLACE UNDER GPU
C4403 EV@1U/6.3V_4
AA21 VDD_004 XVDD_004 U5 AB19 GND_8 GND_108 F28 C4404 EV@1U/6.3V_4
AA23 VDD_005 XVDD_005 U6 AB2 GND_9 GND_109 F7 C4405 EV@1U/6.3V_4
A A
AB13 VDD_006 XVDD_006 U7 AB21 GND_10 GND_110 G10 C4406 EV@1U/6.3V_4
AB15 VDD_007 XVDD_007 U8 A33 GND_11 GND_111 G13 C4407 EV@1U/6.3V_4
AB17 VDD_008 XVDD_008 V1 AB23 GND_12 GND_112 G16
AB18 VDD_009 XVDD_009 V2 AB28 GND_13 GND_113 G19 C4408 [email protected]/10V_6
AC12 VDD_012 XVDD_012 V5 AB5 GND_16 GND_116 G25 C4411 [email protected]/10V_6
AC14 VDD_013 XVDD_013 V6 AB7 GND_17 GND_117 G28 C4412 [email protected]/10V_6
AC16 VDD_014 XVDD_014 V7 AC13 GND_18 GND_118 G3
AC19 VDD_015 XVDD_015 V8 AC15 GND_19 GND_119 G30
VDD_016 XVDD_016 GND_20 GND_120
AC21
AC23 VDD_017 XVDD_017
W2
W3
AC17
AC18 GND_21 GND_121
G32
G33
C4413 *[email protected]/10V_6
B2A
M12 VDD_018 XVDD_018 W4 AA13 GND_22 GND_122 G5
M14 VDD_019 XVDD_019 W5 AC20 GND_23 GND_123 G7 C4414 [email protected]/10V_6
M16 VDD_020 XVDD_020 W7 AC22 GND_24 GND_124 K2 C4415 [email protected]/10V_6
M19 VDD_021 XVDD_021 W8 AE2 GND_25 GND_125 K28 C4416 [email protected]/10V_6
M21 VDD_022 XVDD_022 Y4 AE28 GND_26 GND_126 K30
M23 VDD_023 XVDD_026 Y5 AE30 GND_27 GND_127 K32
VDD_024 XVDD_027 GND_28 GND_128
N13
N15 VDD_025 XVDD_028
Y6
Y7
AE32
AE33 GND_29 GND_129
K33
K5
B2A
N17 VDD_026 XVDD_029 Y8 AE5 GND_30 GND_130 K7
N18 VDD_027 XVDD_030 AE7 GND_31 GND_131 M13 C4418 [email protected]/10V_6
N20 VDD_028 AH10 GND_32 GND_132 M15
N22 VDD_029 AA15 GND_33 GND_133 M17
VDD_030 GND_34 GND_134
P12
P14 VDD_031
AH13
AH16 GND_35 GND_135
M18
M20
C4419
C4420
*[email protected]/10V_6
B2A
P16 VDD_032 AH19 GND_36 GND_136 M22
P19 VDD_033 AH2 GND_37 GND_137 N12
B P21 VDD_034 AH22 GND_38 GND_138 N14 C4421 [email protected]/10V_6 B
P23 VDD_035 AH24 GND_39 GND_139 N16 C4422 [email protected]/10V_6
R13 VDD_036 AH28 GND_40 GND_140 N19
R15 VDD_037 AH29 GND_41 GND_141 N2
R17 VDD_038 AH30 GND_42 GND_142 N21
R18 VDD_039 AH32 GND_43 GND_143 N23
R20 VDD_040 AH33 GND_44 GND_144 N28
PLACE NEAR GPU
R22 VDD_041 AH5 GND_45 GND_145 N30
T12 VDD_042 AH7 GND_46 GND_146 N32 C44232 1 EV@22U/6.3V_6
T14 VDD_043 AJ7 GND_47 GND_147 N33 C44242 1 EV@22U/6.3V_6
T16 VDD_044 AK10 GND_48 GND_148 N5 C44252 1 EV@22U/6.3V_6
T19 VDD_045 AK7 GND_49 GND_149 N7 C44262 1 EV@22U/6.3V_6
T21 VDD_046 AL12 GND_50 GND_150 P13 C44272 1 EV@22U/6.3V_6
T23
U13 VDD_048
AL14
AL15 GND_52 GND_152
P15
P17
C44282 1 EV@22U/6.3V_6
B2A
U15 VDD_049 AL17 GND_53 GND_153 P18
U17 VDD_050 AL18 GND_54 GND_154 P20 C4429 2 1 EV@22U/6.3V_6
U18 VDD_051 AL2 GND_55 GND_155 P22 C4430 [email protected]/10V_6
U20 VDD_052 AL20 GND_56 GND_156 R12 C4431 [email protected]/10V_6
U22 VDD_053 AL21 GND_57 GND_157 R14
V13 VDD_054 AL23 GND_58 GND_158 R16
V15
V17 VDD_056
AL24
AL26 GND_60 GND_160
R19
R21
B2A
V18 VDD_057 AL28 GND_61 GND_161 R23
V20 VDD_058 AL30 GND_62 GND_162 T13
V22 VDD_059 AL32 GND_63 GND_163 T15 C4433 [email protected]/10V_6
W12 VDD_060 AL33 GND_64 GND_164 T17
W14 VDD_061 AL5 GND_65 GND_165 T18 C4434 [email protected]/10V_6
W16 VDD_062 AM13 GND_66 GND_166 T2
C VDD_063 GND_67 GND_167 C4435 C
W19 AM16 T20
W21 VDD_064 AM19 GND_68 GND_168 T22 1 2
+
W23 VDD_065 AM22 GND_69 GND_169 AG11
Y13 VDD_066 AM25 GND_70 GND_170 T28
Y15 VDD_067 AN1 GND_71 GND_171 T32 EV@330u_2.5V_3528
Y18 VDD_068 AN10 GND_72 GND_172 T5
Y17 VDD_069 AN13 GND_73 GND_173 T7
Y20 VDD_070 AN16 GND_74 GND_174 U12
Y22 VDD_071 AN19 GND_75 GND_175 U14
VDD_072 AN22 GND_76 GND_176 U16
AN25 GND_77 GND_177 U19
AN30 GND_78 GND_178 U21
AN34 GND_79 GND_179 U23
AN4 GND_80 GND_180 V12
AN7 GND_81 GND_181 V14
AP2 GND_82 GND_182 V16
AP33 GND_83 GND_183 V19
B1 GND_84 GND_184 V21
B10 GND_85 GND_185 V23
+VGPU_CORE 40 GND_86 GND_186
B22 W13
B25 GND_87 GND_187 W15
B28 GND_88 GND_188 W17
B31 GND_89 GND_189 W18
B34 GND_90 GND_190 W20
B4 GND_91 GND_191 W22
B7 GND_92 GND_192 W28
C10 GND_93 GND_193 Y12
C13 GND_94 GND_194 Y14
C19 GND_95 GND_195 Y16
D GND_96 GND_196 D
C22 Y19
C25 GND_97 GND_197 Y21
GND_98 GND_198
Dr-Bios.com
C28 Y23
C7 GND_99 GND_199 AH11
GND_100 GND_200
C16
GND_OPT_1
W32
GND_OPT_2
PROJECT : ZAA
N16x - 5/6 (Power) 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
15 VMA_DQ[63..0]
VMA_DQ[63..0]
CHANNEL A: 1024MB GDDR5x32
VMB_DQ[63..0]
15 VMB_DQ[63..0]
Non-mirror, MF=0 Channel A Mirror, MF=1 Channel A Non-mirror, MF=0 Channel B Mirror, MF=1 Channel B
<0-31> +1.35V_GFX <32-63> +1.35V_GFX <0-31> +1.35V_GFX <32-63> +1.35V_GFX
U5 U7 U3 U4
VMA_DQ31 M2 B1 VMA_DQ39 M2 B1 VMB_DQ29 M2 B1 VMB_DQ39 M2 B1
VMA_DQ30 M4 DQ31 | DQ7 VDDQ-B1 B3 VMA_DQ38 M4 DQ31 | DQ7 VDDQ-B1 B3 VMB_DQ31 M4 DQ31 | DQ7 VDDQ-B1 B3 VMB_DQ38 M4 DQ31 | DQ7 VDDQ-B1 B3
VMA_DQ29 N2 DQ30 | DQ6 VDDQ-B3 B12 VMA_DQ37 N2 DQ30 | DQ6 VDDQ-B3 B12 VMB_DQ30 N2 DQ30 | DQ6 VDDQ-B3 B12 VMB_DQ37 N2 DQ30 | DQ6 VDDQ-B3 B12
VMA_DQ28 N4 DQ29 | DQ5 VDDQ-B12 B14 VMA_DQ36 N4 DQ29 | DQ5 VDDQ-B12 B14 VMB_DQ28 N4 DQ29 | DQ5 VDDQ-B12 B14 VMB_DQ36 N4 DQ29 | DQ5 VDDQ-B12 B14
VMA_DQ27 T2 DQ28 | DQ4 VDDQ-B14 D1 VMA_DQ35 T2 DQ28 | DQ4 VDDQ-B14 D1 VMB_DQ27 T2 DQ28 | DQ4 VDDQ-B14 D1 VMB_DQ35 T2 DQ28 | DQ4 VDDQ-B14 D1
VMA_DQ26 T4 DQ27 | DQ3 VDDQ-D1 D3 VMA_DQ34 T4 DQ27 | DQ3 VDDQ-D1 D3 VMB_DQ26 T4 DQ27 | DQ3 VDDQ-D1 D3 VMB_DQ34 T4 DQ27 | DQ3 VDDQ-D1 D3
DQA24~31 DQA32~39 DQB24~31 DQB32~39

A A
VMA_DQ25 U2 DQ26 | DQ2 VDDQ-D3 D12 VMA_DQ33 U2 DQ26 | DQ2 VDDQ-D3 D12 VMB_DQ25 U2 DQ26 | DQ2 VDDQ-D3 D12 VMB_DQ33 U2 DQ26 | DQ2 VDDQ-D3 D12
VMA_DQ24 U4 DQ25 | DQ1 VDDQ-D12 D14 VMA_DQ32 U4 DQ25 | DQ1 VDDQ-D12 D14 VMB_DQ24 U4 DQ25 | DQ1 VDDQ-D12 D14 VMB_DQ32 U4 DQ25 | DQ1 VDDQ-D12 D14
VMA_DQ23 M13 DQ24 | DQ0 VDDQ-D14 E5 VMA_DQ47 M13 DQ24 | DQ0 VDDQ-D14 E5 VMB_DQ23 M13 DQ24 | DQ0 VDDQ-D14 E5 VMB_DQ47 M13 DQ24 | DQ0 VDDQ-D14 E5
VMA_DQ22 M11 DQ23 | DQ15 VDDQ-E5 E10 VMA_DQ46 M11 DQ23 | DQ15 VDDQ-E5 E10 VMB_DQ22 M11 DQ23 | DQ15 VDDQ-E5 E10 VMB_DQ46 M11 DQ23 | DQ15 VDDQ-E5 E10
VMA_DQ21 N13 DQ22 | DQ14 VDDQ-E10 F1 VMA_DQ45 N13 DQ22 | DQ14 VDDQ-E10 F1 VMB_DQ21 N13 DQ22 | DQ14 VDDQ-E10 F1 VMB_DQ45 N13 DQ22 | DQ14 VDDQ-E10 F1
VMA_DQ20 N11 DQ21 | DQ13 VDDQ-F1 F3 VMA_DQ44 N11 DQ21 | DQ13 VDDQ-F1 F3 VMB_DQ20 N11 DQ21 | DQ13 VDDQ-F1 F3 VMB_DQ44 N11 DQ21 | DQ13 VDDQ-F1 F3
VMA_DQ19 T13 DQ20 | DQ12 VDDQ-F3 F12 VMA_DQ43 T13 DQ20 | DQ12 VDDQ-F3 F12 VMB_DQ19 T13 DQ20 | DQ12 VDDQ-F3 F12 VMB_DQ43 T13 DQ20 | DQ12 VDDQ-F3 F12
VMA_DQ18 T11 DQ19 | DQ11 VDDQ-F12 F14 VMA_DQ42 T11 DQ19 | DQ11 VDDQ-F12 F14 VMB_DQ18 T11 DQ19 | DQ11 VDDQ-F12 F14 VMB_DQ42 T11 DQ19 | DQ11 VDDQ-F12 F14
DQA16~23 VMA_DQ17
VMA_DQ16
VMA_DQ15
VMA_DQ14
U13
U11
F13
DQ18 | DQ10
DQ17 | DQ9
DQ16 | DQ8
DQ15 | DQ23
VDDQ-F14
VDDQ-G2
VDDQ-G13
VDDQ-H3
G2
G13
H3
DQA40~47 VMA_DQ41
VMA_DQ40
VMA_DQ55
VMA_DQ54
U13
U11
F13
DQ18 | DQ10
DQ17 | DQ9
DQ16 | DQ8
DQ15 | DQ23
VDDQ-F14
VDDQ-G2
VDDQ-G13
VDDQ-H3
G2
G13
H3
DQB16~23 VMB_DQ17
VMB_DQ16
VMB_DQ15
VMB_DQ14
U13
U11
F13
DQ18 | DQ10
DQ17 | DQ9
DQ16 | DQ8
DQ15 | DQ23
VDDQ-F14
VDDQ-G2
VDDQ-G13
VDDQ-H3
G2
G13
H3
DQB40~47 VMB_DQ41
VMB_DQ40
VMB_DQ54
VMB_DQ55
U13
U11
F13
DQ18 | DQ10
DQ17 | DQ9
DQ16 | DQ8
DQ15 | DQ23
VDDQ-F14
VDDQ-G2
VDDQ-G13
VDDQ-H3
G2
G13
H3
F11 H12 F11 H12 F11 H12 F11 H12
VMA_DQ13 E13 DQ14 | DQ22 VDDQ-H12 K3 VMA_DQ53 E13 DQ14 | DQ22 VDDQ-H12 K3 VMB_DQ13 E13 DQ14 | DQ22 VDDQ-H12 K3 VMB_DQ53 E13 DQ14 | DQ22 VDDQ-H12 K3
VMA_DQ12 E11 DQ13 | DQ21 VDDQ-K3 K12 VMA_DQ52 E11 DQ13 | DQ21 VDDQ-K3 K12 VMB_DQ12 E11 DQ13 | DQ21 VDDQ-K3 K12 VMB_DQ52 E11 DQ13 | DQ21 VDDQ-K3 K12
VMA_DQ11 B13 DQ12 | DQ20 VDDQ-K12 L2 VMA_DQ51 B13 DQ12 | DQ20 VDDQ-K12 L2 VMB_DQ11 B13 DQ12 | DQ20 VDDQ-K12 L2 VMB_DQ51 B13 DQ12 | DQ20 VDDQ-K12 L2
VMA_DQ10 B11 DQ11 | DQ19 VDDQ-L2 L13 VMA_DQ50 B11 DQ11 | DQ19 VDDQ-L2 L13 VMB_DQ10 B11 DQ11 | DQ19 VDDQ-L2 L13 VMB_DQ50 B11 DQ11 | DQ19 VDDQ-L2 L13
DQA8~15 VMA_DQ9
VMA_DQ8
VMA_DQ7
VMA_DQ6
A13
A11
F2
DQ10 | DQ18
DQ9 | DQ17
DQ8 | DQ16
DQ7 | DQ31
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12
M1
M3
M12
DQA48~55 VMA_DQ49
VMA_DQ48
VMA_DQ63
VMA_DQ62
A13
A11
F2
DQ10 | DQ18
DQ9 | DQ17
DQ8 | DQ16
DQ7 | DQ31
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12
M1
M3
M12
DQB8~15 VMB_DQ9
VMB_DQ8
VMB_DQ7
VMB_DQ6
A13
A11
F2
DQ10 | DQ18
DQ9 | DQ17
DQ8 | DQ16
DQ7 | DQ31
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12
M1
M3
M12
DQB48~55 VMB_DQ49
VMB_DQ48
VMB_DQ60
VMB_DQ63
A13
A11
F2
DQ10 | DQ18
DQ9 | DQ17
DQ8 | DQ16
DQ7 | DQ31
VDDQ-L13
VDDQ-M1
VDDQ-M3
VDDQ-M12
M1
M3
M12
F4 M14 F4 M14 F4 M14 F4 M14
VMA_DQ5 E2 DQ6 | DQ30 VDDQ-M14 N5 VMA_DQ61 E2 DQ6 | DQ30 VDDQ-M14 N5 VMB_DQ5 E2 DQ6 | DQ30 VDDQ-M14 N5 VMB_DQ61 E2 DQ6 | DQ30 VDDQ-M14 N5
VMA_DQ4 E4 DQ5 | DQ29 VDDQ-N5 N10 VMA_DQ60 E4 DQ5 | DQ29 VDDQ-N5 N10 VMB_DQ4 E4 DQ5 | DQ29 VDDQ-N5 N10 VMB_DQ62 E4 DQ5 | DQ29 VDDQ-N5 N10
VMA_DQ3 B2 DQ4 | DQ28 VDDQ-N10 P1 VMA_DQ59 B2 DQ4 | DQ28 VDDQ-N10 P1 VMB_DQ3 B2 DQ4 | DQ28 VDDQ-N10 P1 VMB_DQ59 B2 DQ4 | DQ28 VDDQ-N10 P1
VMA_DQ2 B4 DQ3 | DQ27 VDDQ-P1 P3 VMA_DQ58 B4 DQ3 | DQ27 VDDQ-P1 P3 VMB_DQ2 B4 DQ3 | DQ27 VDDQ-P1 P3 VMB_DQ58 B4 DQ3 | DQ27 VDDQ-P1 P3
DQA0~7 VMA_DQ1
VMA_DQ0
A2
A4
DQ2 | DQ26
DQ1 | DQ25
DQ0 | DQ24
VDDQ-P3
VDDQ-P12
VDDQ-P14
VDDQ-T1
P12
P14
T1
DQA56~63 VMA_DQ57
VMA_DQ56
A2
A4
DQ2 | DQ26
DQ1 | DQ25
DQ0 | DQ24
VDDQ-P3
VDDQ-P12
VDDQ-P14
VDDQ-T1
P12
P14
T1
DQB0~7 VMB_DQ1
VMB_DQ0
A2
A4
DQ2 | DQ26
DQ1 | DQ25
DQ0 | DQ24
VDDQ-P3
VDDQ-P12
VDDQ-P14
VDDQ-T1
P12
P14
T1
DQB56~63 VMB_DQ57
VMB_DQ56
A2
A4
DQ2 | DQ26
DQ1 | DQ25
DQ0 | DQ24
VDDQ-P3
VDDQ-P12
VDDQ-P14
VDDQ-T1
P12
P14
T1
T3 T3 T3 T3
VDDQ-T3 T12 VDDQ-T3 T12 VDDQ-T3 T12 VDDQ-T3 T12
VDDQ-T12 T14 VDDQ-T12 T14 VDDQ-T12 T14 VDDQ-T12 T14
VDDQ-T14 VDDQ-T14 VDDQ-T14 VDDQ-T14
J5 J5 J5 J5
15 FBA_CMD9 RFU/A12/NC 15 FBA_CMD25 RFU/A12/NC 15 FBB_CMD9 RFU/A12/NC 15 FBB_CMD25 RFU/A12/NC
K4 C5 K4 C5 K4 C5 K4 C5
15 FBA_CMD6 A7/A8 | A0/A10 VDD-C5 15 FBA_CMD26 A7/A8 | A0/A10 VDD-C5 15 FBB_CMD6 A7/A8 | A0/A10 VDD-C5 15 FBB_CMD26 A7/A8 | A0/A10 VDD-C5
K5 C10 K5 C10 K5 C10 K5 C10
15 FBA_CMD7 A6/A11 | A1/A9 VDD-C10 15 FBA_CMD27 A6/A11 | A1/A9 VDD-C10 15 FBB_CMD7 A6/A11 | A1/A9 VDD-C10 15 FBB_CMD27 A6/A11 | A1/A9 VDD-C10
K10 D11 K10 D11 K10 D11 K10 D11
15 FBA_CMD4 A5/BA1 | A3/BA3 VDD-D11 15 FBA_CMD17 A5/BA1 | A3/BA3 VDD-D11 15 FBB_CMD4 A5/BA1 | A3/BA3 VDD-D11 15 FBB_CMD17 A5/BA1 | A3/BA3 VDD-D11
K11 G1 K11 G1 K11 G1 K11 G1
15 FBA_CMD3 A4/BA2 | A2/BA0 VDD-G1 15 FBA_CMD18 A4/BA2 | A2/BA0 VDD-G1 15 FBB_CMD3 A4/BA2 | A2/BA0 VDD-G1 15 FBB_CMD18 A4/BA2 | A2/BA0 VDD-G1
H10 G4 H10 G4 H10 G4 H10 G4
15 FBA_CMD1 A3/BA3 | A5/BA1 VDD-G4 15 FBA_CMD20 A3/BA3 | A5/BA1 VDD-G4 15 FBB_CMD1 A3/BA3 | A5/BA1 VDD-G4 15 FBB_CMD20 A3/BA3 | A5/BA1 VDD-G4
H11 G11 H11 G11 H11 G11 H11 G11
15 FBA_CMD2 A2 /BA0 | A4/BA2 VDD-G11 15 FBA_CMD19 A2 /BA0 | A4/BA2 VDD-G11 15 FBB_CMD2 A2 /BA0 | A4/BA2 VDD-G11 15 FBB_CMD19 A2 /BA0 | A4/BA2 VDD-G11
H5 G14 H5 G14 H5 G14 H5 G14
15 FBA_CMD11 A1/A9 | A6/A11 VDD-G14 15 FBA_CMD23 A1/A9 | A6/A11 VDD-G14 15 FBB_CMD11 A1/A9 | A6/A11 VDD-G14 15 FBB_CMD23 A1/A9 | A6/A11 VDD-G14
H4 L1 H4 L1 H4 L1 H4 L1
15 FBA_CMD10 A0/A10 | A7/A8 VDD-L1 15 FBA_CMD22 A0/A10 | A7/A8 VDD-L1 15 FBB_CMD10 A0/A10 | A7/A8 VDD-L1 15 FBB_CMD22 A0/A10 | A7/A8 VDD-L1
L4 L4 L4 L4
VDD-L4 L11 VDD-L4 L11 VDD-L4 L11 VDD-L4 L11
VDD-L11 L14 VDD-L11 L14 VDD-L11 L14 VDD-L11 L14
D4 VDD-L14 P11 D4 VDD-L14 P11 D4 VDD-L14 P11 D4 VDD-L14 P11
B 15 VMA_WCK01 WCK01 | WCK23 VDD-P11 15 VMA_WCK67 WCK01 | WCK23 VDD-P11 15 VMB_WCK01 WCK01 | WCK23 VDD-P11 15 VMB_WCK67 WCK01 | WCK23 VDD-P11 B
D5 R5 D5 R5 D5 R5 D5 R5
15 VMA_WCK01# WCK01# | WCK23# VDD-R5 15 VMA_WCK67# WCK01# | WCK23# VDD-R5 15 VMB_WCK01# WCK01# | WCK23# VDD-R5 15 VMB_WCK67# WCK01# | WCK23# VDD-R5
R10 R10 R10 R10
P4 VDD-R10 P4 VDD-R10 P4 VDD-R10 P4 VDD-R10
15 VMA_WCK23 WCK23 | WCK01 15 VMA_WCK45 WCK23 | WCK01 15 VMB_WCK23 WCK23 | WCK01 15 VMB_WCK45 WCK23 | WCK01
P5 P5 P5 P5
15 VMA_WCK23# WCK23# | WCK01# 15 VMA_WCK45# WCK23# | WCK01# 15 VMB_WCK23# WCK23# | WCK01# 15 VMB_WCK45# WCK23# | WCK01#
A1 A1 A1 A1
R2 VSSQ-A1 A3 R2 VSSQ-A1 A3 R2 VSSQ-A1 A3 R2 VSSQ-A1 A3
15 FBA_EDC3 EDC3 | EDC0 VSSQ-A3 15 FBA_EDC4 EDC3 | EDC0 VSSQ-A3 15 FBB_EDC3 EDC3 | EDC0 VSSQ-A3 15 FBB_EDC4 EDC3 | EDC0 VSSQ-A3
R13 A12 R13 A12 R13 A12 R13 A12
C13 A14 C13 A14 C13 A14 C13 A14
C2 C1 C2 C1 C2 C1 C2 C1
15 FBA_EDC0 EDC0 | EDC3 VSSQ-C1 15 FBA_EDC7 EDC0 | EDC3 VSSQ-C1 15 FBB_EDC0 EDC0 | EDC3 VSSQ-C1 15 FBB_EDC7 EDC0 | EDC3 VSSQ-C1
C3 C3 C3 C3
P2 VSSQ-C3 C4 P2 VSSQ-C3 C4 P2 VSSQ-C3 C4 P2 VSSQ-C3 C4
15 FBA_DBI3 DBI3# | DBI0# VSSQ-C4 15 FBA_DBI4 DBI3# | DBI0# VSSQ-C4 15 FBB_DBI3 DBI3# | DBI0# VSSQ-C4 15 FBB_DBI4 DBI3# | DBI0# VSSQ-C4
P13 C11 P13 C11 P13 C11 P13 C11
15 FBA_DBI2 DBI2 #| DBI1# VSSQ-C11 15 FBA_DBI5 DBI2 #| DBI1# VSSQ-C11 15 FBB_DBI2 DBI2 #| DBI1# VSSQ-C11 15 FBB_DBI5 DBI2 #| DBI1# VSSQ-C11
D13 C12 D13 C12 D13 C12 D13 C12
D2 C14 D2 C14 D2 C14 D2 C14
E1 E1 E1 E1
VSSQ-E1 E3 VSSQ-E1 E3 VSSQ-E1 E3 VSSQ-E1 E3
VSSQ-E3 E12 VSSQ-E3 E12 VSSQ-E3 E12 VSSQ-E3 E12
G3 VSSQ-E12 E14 G3 VSSQ-E12 E14 G3 VSSQ-E12 E14 G3 VSSQ-E12 E14
15 FBA_CMD12 RAS# | CAS# VSSQ-E14 15 FBA_CMD31 RAS# | CAS# VSSQ-E14 15 FBB_CMD12 RAS# | CAS# VSSQ-E14 15 FBB_CMD31 RAS# | CAS# VSSQ-E14
L3 F5 L3 F5 L3 F5 L3 F5
15 FBA_CMD15 CAS# | RAS# VSSQ-F5 15 FBA_CMD28 CAS# | RAS# VSSQ-F5 15 FBB_CMD15 CAS# | RAS# VSSQ-F5 15 FBB_CMD28 CAS# | RAS# VSSQ-F5
F10 F10 F10 F10
VSSQ-F10 H2 VSSQ-F10 H2 VSSQ-F10 H2 VSSQ-F10 H2
J3 VSSQ-H2 H13 J3 VSSQ-H2 H13 J3 VSSQ-H2 H13 J3 VSSQ-H2 H13
15 FBA_CMD14 CKE# VSSQ-H13 15 FBA_CMD30 CKE# VSSQ-H13 15 FBB_CMD14 CKE# VSSQ-H13 15 FBB_CMD30 CKE# VSSQ-H13
J11 K2 J11 K2 J11 K2 J11 K2
15 VMA_CLK0# CK# VSSQ-K2 15 VMA_CLK1# CK# VSSQ-K2 15 VMB_CLK0# CK# VSSQ-K2 15 VMB_CLK1# CK# VSSQ-K2
J12 K13 J12 K13 J12 K13 J12 K13
15 VMA_CLK0 CK VSSQ-K13 15 VMA_CLK1 CK VSSQ-K13 15 VMB_CLK0 CK VSSQ-K13 15 VMB_CLK1 CK VSSQ-K13
M5 M5 M5 M5
VSSQ-M5 M10 VSSQ-M5 M10 VSSQ-M5 M10 VSSQ-M5 M10
G12 VSSQ-M10 N1 G12 VSSQ-M10 N1 G12 VSSQ-M10 N1 G12 VSSQ-M10 N1
15 FBA_CMD0 CS# | WE# VSSQ-N1 15 FBA_CMD21 CS# | WE# VSSQ-N1 15 FBB_CMD0 CS# | WE# VSSQ-N1 15 FBB_CMD21 CS# | WE# VSSQ-N1
L12 N3 L12 N3 L12 N3 L12 N3
15 FBA_CMD5 WE# | CS# VSSQ-N3 15 FBA_CMD16 WE# | CS# VSSQ-N3 15 FBB_CMD5 WE# | CS# VSSQ-N3 15 FBB_CMD16 WE# | CS# VSSQ-N3
N12 N12 N12 N12
VSSQ-N12 N14 VSSQ-N12 N14 VSSQ-N12 N14 VSSQ-N12 N14
R1415 EV_A@120/F_4 J13 VSSQ-N14 R1 R1510 EV_A@120/F_4 J13 VSSQ-N14 R1 R1335 EV_B@120/F_4 J13 VSSQ-N14 R1 R1333 EV_B@120/F_4 J13 VSSQ-N14 R1
R1438 EV_A@1K_4 SEN_A J10 ZQ VSSQ-R1 R3 SEN_A J10 ZQ VSSQ-R1 R3 R1323 EV_B@1K_4 SEN_B J10 ZQ VSSQ-R1 R3 SEN_B J10 ZQ VSSQ-R1 R3
SEN VSSQ-R3 R4 SEN VSSQ-R3 R4 SEN VSSQ-R3 R4 SEN VSSQ-R3 R4
VSSQ-R4 R11 VSSQ-R4 R11 VSSQ-R4 R11 VSSQ-R4 R11
J2 VSSQ-R11 R12 J2 VSSQ-R11 R12 J2 VSSQ-R11 R12 J2 VSSQ-R11 R12
15 FBA_CMD13 RESET# VSSQ-R12 15 FBA_CMD29 RESET# VSSQ-R12 15 FBB_CMD13 RESET# VSSQ-R12 15 FBB_CMD29 RESET# VSSQ-R12
J1 R14 +1.35V_GFX J1 R14 J1 R14 +1.35V_GFX J1 R14
MF VSSQ-R14 U1 MF VSSQ-R14 U1 MF VSSQ-R14 U1 MF VSSQ-R14 U1
VSSQ-V1 U3 VSSQ-V1 U3 VSSQ-V1 U3 VSSQ-V1 U3
A5 VSSQ-V14 A5 VSSQ-V14 A5 VSSQ-V14 A5 VSSQ-V14
U5 Vpp,NC U5 Vpp,NC U5 Vpp,NC U5 Vpp,NC
Vpp,NC1 B5 Vpp,NC1 B5 Vpp,NC1 B5 Vpp,NC1 B5
A10 VSS-B5 B10 A10 VSS-B5 B10 A10 VSS-B5 B10 A10 VSS-B5 B10
U10 VREFD1 VSS-B10 D10 U10 VREFD1 VSS-B10 D10 U10 VREFD1 VSS-B10 D10 U10 VREFD1 VSS-B10 D10
C C
VREFD2 VSS-D10 G5 VREFD2 VSS-D10 G5 VREFD2 VSS-D10 G5 VREFD2 VSS-D10 G5
VSS-G5 G10 VSS-G5 G10 VSS-G5 G10 VSS-G5 G10
VSS-G10 H1 VSS-G10 H1 VSS-G10 H1 VSS-G10 H1
VSS-H1 H14 VSS-H1 H14 VSS-H1 H14 VSS-H1 H14
VSS-H14 K1 VSS-H14 K1 VSS-H14 K1 VSS-H14 K1
VREFC_VMA1 J14 VSS-K1 K14 VREFC_VMA2 J14 VSS-K1 K14 VREFC_VMC1 J14 VSS-K1 K14 VREFC_VMC2 J14 VSS-K1 K14
2 1 VREFC VSS-K14 L5 2 1 VREFC VSS-K14 L5 2 1 VREFC VSS-K14 L5 2 1 VREFC VSS-K14 L5
C1432 EV_A@820P/50V_4 VSS-L5 L10 C1551 EV_A@820P/50V_4 VSS-L5 L10 C1409 EV_B@820P/50V_4 VSS-L5 L10 C1416 EV_B@820P/50V_4 VSS-L5 L10
VSS-L10 P10 VSS-L10 P10 VSS-L10 P10 VSS-L10 P10
J4 VSS-P10 T5 J4 VSS-P10 T5 J4 VSS-P10 T5 J4 VSS-P10 T5
15 FBA_CMD8 ABI# VSS-T5 15 FBA_CMD24 ABI# VSS-T5 15 FBB_CMD8 ABI# VSS-T5 15 FBB_CMD24 ABI# VSS-T5
T10 T10 T10 T10
VSS-T10 VSS-T10 VSS-T10 VSS-T10
KB OnlyA EV_A@GDDR5 U5 EV_A@GDDR5 U7
KA OnlyB EV_B@GDDR5 U3 EV_B@GDDR5 U4

VREF_VMA1_MOS
VREF_VMA3_MOS
+1.35V_GFX +1.35V_GFX +1.35V_GFX +1.35V_GFX
VMA_CLK0 VMA_CLK1
VMB_CLK0 VMB_CLK1
R1417 R1331 R1381

3
EV_A@549/F_4 R1509 EV_B@549/F_4 EV_B@549/F_4

R1426 R1500 EV_A@549/F_4 Q115
[email protected]/F_4 [email protected]/F_4 VREFC_VMA1 2 1VREF_VMA1_MOS VREFC_VMA2 2 1VREF_VMA1_MOS Q129 VREFC_VMC1 2 1VREF_VMA3_MOS VREFC_VMC2 2 1VREF_VMA3_MOS R1336 R1342
R1410 EV_A@931/F_4 R1513 EV_A@931/F_4 2 2 R1330 EV_B@931/F_4 R1297 EV_B@931/F_4 [email protected]/F_4 [email protected]/F_4
GPIO10_VREF 17,19 GPIO10_VREF 17,19
VMA_CLK0# VMA_CLK1# R1416
[email protected]/F_4 R1508 EV_A@2N7002D EV_B@2N7002D R1337 R1367 VMB_CLK0# VMB_CLK1#
[email protected]/F_4 [email protected]/F_4 [email protected]/F_4
1
+1.35V_GFX
D FBB_CMD14 D
R1308 EV_B@10K_4 GDDR5 Mode H Mapping
+1.35V_GFX FBB_CMD30 R1309 EV_B@10K_4
Pleasement need close to U5 +1.35V_GFX +1.35V_GFX +1.35V_GFX < 0-31 > < 32-63 > Memory
C4788 EV_A@10U/6.3V_6 FBA_CMD14 R1467 EV_A@10K_4 CMD0 CMD16 CS*
+1.35V_GFX C1394 EV_A@1u/6.3V_4 C1448 EV_A@1u/6.3V_4 C1439 EV_B@1u/6.3V_4 C1438 EV_B@1u/6.3V_4 FBA_CMD30 R1473 EV_A@10K_4 CMD1 CMD17 A3_BA3
Dr-Bios.com
C1538 EV_A@1u/6.3V_4 C1401 EV_A@1u/6.3V_4 C1421 EV_B@1u/6.3V_4 C1402 EV_B@1u/6.3V_4 CMD2 CMD18 A2_BA0
C1498 EV_A@1u/6.3V_4 C1398 EV_A@1u/6.3V_4 C1422 EV_B@1u/6.3V_4 C1403 EV_B@1u/6.3V_4 CKE* is strap pin to set ODT value of memory chip CMD3 CMD19 A4_BA2
C73 1 2 EV@330u_2.5V_3528 C1549 EV_A@1u/6.3V_4 C1543 EV_A@1u/6.3V_4 C1513 EV_B@1u/6.3V_4 C1457 EV_B@1u/6.3V_4 CMD4 CMD20 A5_BA1
+
C1764 [email protected]/16V_4 C1391 [email protected]/16V_4 C1388 [email protected]/16V_4 C1419 [email protected]/16V_4 CMD5 CMD21 WE*
C1413 [email protected]/16V_4 C1377 [email protected]/16V_4 C1436 [email protected]/16V_4 C1420 [email protected]/16V_4 FBA_CMD13 R1466 EV_A@10K_4 CMD6 CMD22 A7_A8
C1408 EV_B@10U/6.3V_6 C1396 [email protected]/16V_4 C1497 [email protected]/16V_4 C1423 [email protected]/16V_4 C1544 [email protected]/16V_4 FBA_CMD29 R1472 EV_A@10K_4 CMD7 CMD23 A6_A11
C1399 EV_A@10U/6.3V_6 C1499 [email protected]/16V_4 C1386 [email protected]/16V_4 C1418 [email protected]/16V_4 C1458 [email protected]/16V_4 CMD8 CMD24 ABI*
C1447 EV_B@10U/6.3V_6 C1440 [email protected]/16V_4 C1435 [email protected]/16V_4 C1415 [email protected]/16V_4 C1450 [email protected]/16V_4 FBB_CMD13 R1318 EV_B@10K_4 CMD9 CMD25 A12_RFU
C19 [email protected]/16V_4 C1537 [email protected]/16V_4 C1504 [email protected]/16V_4 C1414 [email protected]/16V_4 FBB_CMD29 R1319 EV_B@10K_4 CMD10 CMD26 A0_A10
201201117 Add C764 for EMI suggestion. CMD11 CMD27 A1_A9 Quanta Computer Inc.
CMD12 CMD28 RAS*
RST PD place @ the end of daisy-chain. CMD13 CMD29 RST* PROJECT :ZAA
CMD14 CMD30 CKE*
CMD15 CMD31 CAS* Size Document Number Rev
1A
N16x - 6/6 (GDDR5x32)
1 2 3 4 5 6 7 8
5 4 3 2 1
USB TYPE-C 2,3,4,6,7,8,9,11,24,26,27,28,30,32,34,35,40

32
+3V_S5
+5V_S5_V2
+3V_S5
25810_FAULT# R11206 TYPEC@100K/F_4

25810_LD_DET#
Vendor suggest input cap 120u R11208 TYPEC@100K/F_4
USB2.0 ESD Close to connector +5V_S5_V2

25810_UFP#
25810_POL#
R11193
R11203
*TYPEC@100K/F_4
TYPEC@100K/F_4
+TYPEC_VBUS_C 25810_AUO# R11197 TYPEC@100K/F_4
R819 *short_4 C4772 TYPEC@150U/6.3V_3528 U28 25810_DBG# R11194 TYPEC@100K/F_4
6 USBP7+
+
D D
C4766 TYPEC@10U/6.3V/X5R_6 2 15 C4765 TYPEC@10U/6.3V/X5R_6 +3V_S5
USB2_TYPC_7P_C C4769 TYPEC@10U/6.3V/X5R_6 3 IN1 OUT 14
USB2_TYPC_7N_C 4 IN1 OUT C4817 TYPEC@100p/50V_4 TYPEC_CHG R11205 TYPEC@100K/F_4
5 IN2 11 25810_CC1 TYPEC_CHG_HI
VAUX TI CC1 13 25810_CC2
C4818 TYPEC@1000p/50V_4 R11198 TYPEC@100K/F_4
EC_TypeC_EN_R 6 CC2 EC_TypeC_EN_R R11278
R818 *short_4
30 EC_TypeC_EN_R EN TPS25810RVC 1 25810_FAULT# EMI TYPEC@10k/5%_4
6 USBP7- TYPEC_CHG FAULT# 25810_LD_DET#
7 20
*short_4 R11280 TYPEC_CHG_HI 8 CHG LD_DET# 19 25810_UFP#
30 EC_TypeC_CHG_HI CHG_HI UFP# 18 25810_POL#
Type C1 HSIO ESD R11204

25810_REF
25810_REF_RTN 9
10
REF
POL#
AUDIO#
DEBUG#
17
16
25810_AUO#
25810_DBG#
TYPEC@100k/1%_4 12 REF_RTN 21
GND
GND
GND
GND
GND
GND
USB3_TYPC_TX2P_RE C4770 USB3_TYPC_TX2P_R R821 *short_4 GND PwPd
[email protected]/25V/X5R_4
TYPEC@TPS25810RVCR(QFN)
22
23
24
25
26
27
USB3_TYPC_TX2P_C
USB3_TYPC_TX2N_C
25810_UFP# *short_4 R11252
PCH_TypeC_UPFb# 2
USB3_TYPC_TX2N_RE C4771 USB3_TYPC_TX2N_R R820 *short_4
[email protected]/25V/X5R_4 25810_FAULT# *short_4 R11281
USB_OC3# 6
R11199 *short_4
USB3_TYPC_RX2P_RE USB3_TYPC_RX2P_C
USB3_TYPC_RX2N_RE USB3_TYPC_RX2N_C
R11196 *short_4 +TYPEC_VBUS
+TYPEC_VBUS C4768 [email protected]/25V_4

USB3_TYPC_TX3P_RE C4763 USB3_TYPC_TX3P_R R11202 *short_4 C4764 [email protected]/25V_4
C C
[email protected]/25V/X5R_4
EC51 C4819 TYPEC@100p/50V_4
USB3_TYPC_TX3P_C TYPEC@AZ5725-01F C4820 TYPEC@1000p/50V_4
USB3_TYPC_TX3N_C
EMI
USB3_TYPC_TX3N_RE C4762 USB3_TYPC_TX3N_R CN2021
R11207 *short_4
[email protected]/25V/X5R_4 A1 B12
GND GND
R816 *short_4 USB3_TYPC_TX2P_C A2 B11 USB3_TYPC_RX2P_C
TX1+ RX1+
+TYPEC_VBUS_C Q6062 +TYPEC_VBUS USB3_TYPC_TX2N_C A3 B10 USB3_TYPC_RX2N_C
USB3_TYPC_RX3P_RE USB3_TYPC_RX3P_C TYPEC@AON7401 TX1- RX1-
USB3_TYPC_RX3N_RE USB3_TYPC_RX3N_C 1 C4647 [email protected]/25V_6 +TYPEC_VBUS A4 B9 +TYPEC_VBUS C4648 [email protected]/25V_6
5 2 VBUS VBUS
3 25810_CC1 A5 B8 TYPEC_SBU2
+5V_S5_V2 CC1 SBU2 TP144
R817 *short_4
R11200 USB2_TYPC_7P_C A6 B7 USB2_TYPC_7N_C
D+ D-
TYPEC@10k/5%_4
4
25810_UFP#_G2 USB2_TYPC_7N_C A7 B6 USB2_TYPC_7P_C
R11201 R11195 TYPEC@100k/1%_4 D- D+
TYPEC@10k/5%_4 TYPEC_SBU1 A8 B5 25810_CC2
TP143 SBU1 CC2
3
USB3 Re-Driver 25810_UFP#_G1
2
Q17 C4767
C4649 [email protected]/25V_6 +TYPEC_VBUS
USB3_TYPC_RX3N_C
A9
A10
VBUS VBUS
B4
B3
+TYPEC_VBUS C4650 [email protected]/25V_6
USB3_TYPC_TX3N_C
[email protected]/25V_4 RX2- TX2-
TYPEC@2N7002K USB3_TYPC_RX3P_C A11 B2 USB3_TYPC_TX3P_C
RX2+ TX2+
3
L4209 TYPEC@BLM18PG181SN1D_0.5A A12 B1
+3V_S5 3V_LR
1
Q15 GND GND
C4775 R11210 25810_UFP# 2 3 1
*TYPEC@10u/6.3V_6 *[email protected]/F_4 H-GND H-GND
TYPEC@2N7002K 4 2
C4773
[email protected]/16V_4_X7R C4774 H-GND H-GND
B B
[email protected]/16V_4_X7R
1
A_EQ0
A_EQ1
A_DE0
A_DE1
TYPEC@USB_Type_C
ub31-dx07b024xj1ar1000-24p-smt
32
31
30
29
28
U9 TYPEC@PTN36242LBS
39 40
A_EQ0
A_EQ1
A_DE0
A_DE1
REXT
GND GND 41 3V_LR

38
GND GND
C394 [email protected]/16V_4_X7R USB3_TYPC_RX2N_C_RE 1 27 USB3_TYPC_RX2N_RE
6 USB3_RXN2 USB3_TYPC_RX2P_C_RE 2 A1_OUTn A1_INn 26 USB3_TYPC_RX2P_RE
C4781 [email protected]/16V_4_X7R
6 USB3_RXP2 3 A1_OUTp A1_INp 25
C4780 [email protected]/16V_4_X7R USB3_TYPC_TX2N_C_RE 4 GND VDD 24 USB3_TYPC_TX2N_RE
6 USB3_TXN2 USB3_TYPC_TX2P_C_RE 5 B1_INn B1_OUTn 23 USB3_TYPC_TX2P_RE
6 USB3_TXP2 6 B1_INp B1_OUTp 22
C4777 [email protected]/16V_4_X7R USB3_TYPC_RX3N_C_RE 7 I2C_EN TST 21 USB3_TYPC_RX3N_RE U4509 U4513
6 USB3_RXN3 USB3_TYPC_RX3P_C_RE 8 A2_OUTn A2_INn 20 USB3_TYPC_RX3P_RE USB3_TYPC_TX2P_C 1 9 USB3_TYPC_TX2N_C USB2_TYPC_7P_C 1 9 USB2_TYPC_7N_C
6 USB3_RXP3 9 A2_OUTp A2_INp 19 USB3_TYPC_RX2N_C 2 LINE-1 LINE-2 8 USB3_TYPC_RX2P_C 2 LINE-1 LINE-2 8
C4779 [email protected]/16V_4_X7R USB3_TYPC_TX3N_C_RE 10 VDD GND 18 TST USB3_TYPC_TX3N_RE LINE-3 LINE-4 LINE-3 LINE-4
6 USB3_TXN3 USB3_TYPC_TX3P_C_RE 11 B2_INn B2_OUTn 17 USB3_TYPC_TX3P_RE 3 3
6 USB3_TXP3 B2_INp B2_OUTp 33 GND GND
B_EQ0
B_EQ1
B_DE0
B_DE1
36 GND 34 USB3_TYPC_TX3N_C 4 7 USB3_TYPC_TX3P_C TYPEC_SBU1 4 7 TYPEC_SBU2

PD#
37 GND GND 35 R11209 *[email protected]/F_4 USB3_TYPC_RX3P_C 5 LINE-6 LINE-5 6 USB3_TYPC_RX3N_C 25810_CC1 5 LINE-6 LINE-5 6 25810_CC2
3V_LR GND GND LINE-8 LINE-7 LINE-8 LINE-7
TYPEC@AZ1043-08F TYPEC@AZ1045-08F
12
13
14
15
16
B_EQ0
B_EQ1
B_DE0
B_DE1
Quanta P/NAMAZING P/NUSD保保保保

BC104308Z00AZ1043-08F.R7G0.08TX RX ( USB3.0 GEN1 5G )
A
A_EQ0 R258 *TYPEC@0_4 3V_LR
BC104508Z00AZ1045-08F.R7G0.08D+ D- SBU1 SBU2 CC1 CC2 A
A_EQ1
A_EQ0 A_EQ1 A_DE0 A_DE1 R11211 *TYPEC@0_4 BC005725Z00AZ5725-01F.R7G0.009 PD 5V ( follow ZAA)
B_EQ0 R206 *TYPEC@0_4
B_EQ0 B_EQ1 B_DE0 B_DE1 B_EQ1 R11212 *TYPEC@0_4
A_DE0 R11213 *TYPEC@0_4
0 0 9dB 0 0 -3.5dB A_DE1 R254 *TYPEC@0_4
0 1 3dB 0 1 no de-emphasis B_DE0 R11214 *TYPEC@0_4
1 0 6dB 1 0 -7dB B_DE1 R203 *TYPEC@0_4 Quanta Computer Inc.
TST
1 1 7.5dB 1 1 -5dB R617 *[email protected]/F_4
PROJECT :ZAA
TST : Low = Normal LFPS swing / Hight =Turn down LFPS swing Size Document Number Rev
USB_Type C_25810 1A

5 4 3 2 1
Dr-Bios.com
5 4 3 2 1
DP TO VGA
Close to CPU side of CAP.

R10842 *short_4 CRT_TXP0
2 DDI2_TXP0
R10843 *short_4 CRT_TXN0
2 DDI2_TXN0
R10844 *short_4 CRT_TXP1
D 2 DDI2_TXP1 D
R10845 *short_4 CRT_TXN1

2 DDI2_TXN1
R10846 *short_4 CRT_HPD

2 PCH_DP_HPD
R10847 *short_4 CRT_AUXN
2 DDI2_AUXN
R10848 *short_4 CRT_AUXP
2 DDI2_AUXP
R11190 *0_4
7,12,13,28 CLK_SDATA
R11189 *0_4
7,12,13,28 CLK_SCLK
C C
Power C4752
0.1U/16V_4
CIIC_SDA
CIIC_SCL
CRT_HPD
+3V +3V
VGA
+3V
L4 AVCC33 L4208 VDD_DAC_33 VCCK_V12
100MHz_6 100MHz_6
33
32
31
30
29
28
27
26
25
U13 DDCDAT DDCDAT 22
C4751 C4754
0.1U/16V_4 2.2U/6.3V_6
XI
EXT1.2V_CTRL
SMB_SCL
PVCC_33
VCCK_12
SMB_SDA
LDO_RSTB
EPAD
HPD
DDCCLK DDCCLK 22
HSYNC_C R11191 *short_4 HSYNC 22
VSYNC_C R11192 *short_4
AVCC33 1 24 VSYNC 22
AVCC_33 GND
AUX_CH_P 2 23 CRT_RED
AUX_P RED_P
AUX_CH_N 3 22 CRT_GRE
AUX_N GREEN_P
VCCK_V12
LANE0_P
4
5
AVCC_12
LANE0_P
RTD2166 VDD_DAC_33
BLUE_P
21
20
CRT_BLU
VDD_DAC_33
C4748
CRT_AUXN C343 0.1U/16V_4 AUX_CH_N 0.1U/16V_4 LANE0_N 6 19 HSYNC_C
LANE0_N HSYNC CRT_RED
+5V CRT_RED 22
CRT_AUXP C341 0.1U/16V_4 AUX_CH_P LANE1_P 7 18 VSYNC_C
LANE1_P VSYNC
POL1/SPI_CEB
LANE1_N 8 17 CRT_GRE
LANE1_N HVSYNC_PWR CRT_GRE 22
VGA_SDA
B B
VGA_SCL
SPI_CLK
VCC_33
C4749 C4753 C4750 CRT_BLU
SPI_SO
CRT_BLU 22
SPI_SI
CRT_TXP0 C335 0.1U/16V_4 LANE0_P 0.1U/16V_4 4.7U/10V_6 0.1U/16V_4

POL2
CRT_TXN0 C331 0.1U/16V_4 LANE0_N

+3V
9
10
11
12
13
14
15
16
CRT_TXP1 C329 0.1U/16V_4 LANE1_P R11187 4.7K_4

DDCDAT
DDCCLK
CRT_TXN1 C315 0.1U/16V_4 LANE1_N R11285 *4.7K_4

+3V
R11286 4.7K_4
R11188 4.7K_4
R11287 *4.7K_4
TP4376
Note:
1- C1,C3,C4,C5,C11,C16, C21 should be placed close to chip
2- C5 shold be X5R material
3- R6, R7, R8 should be 75 ohm with +/-1%
4- Suggest to connect Pin 29 and Pin 30 to PCH SMBUS for debug purpose.
A 5- This configuration is for internal ROM mode and using embedded LDO mode. A
5
Dr-Bios.com
4
+3V
+5V
2,4,6,7,8,9,12,13,14,16,22,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41
22,23,25,26,28,32,39
3 2
Size
Date:
Document Number
RTD2166-CG
PROJECT : ZAA

1
Sheet 21 of 48
Rev
1A
5 4 3 2 1
CRTVDD5
CRT Near to VGA connector

+5V
+5V 3
Q21
1
C304 *0.1u/16V_4
IN OUT 2
R11267 *short_4 CRTHSYNC_B R11268 47/F_4 GND CRTVDD5 CN7
16
C720 AP2331SA-7
U40 0.1u/16V_4 6
L7 BLM18BB470_6 CRT_R1 1 11 CRT_11
21 CRT_RED TP75
1 5 7
OE# VCC L6 BLM18BB470_6 CRT_G1 2 12 DDCDAT
21 CRT_GRE DDCDAT 21
8
HSYNC 2 4 R11269 *33_4 CRTHSYNC L5 BLM18BB470_6 CRT_B1 3 13 CRTHSYNC
21 HSYNC A Y 21 CRT_BLU
9
4 14 CRTVSYNC
3 C337 C334 C320 C319 C333 C336 10
D GND R222 R219 R213 5 15 DDCCLK D
DDCCLK 21
75/F_4 75/F_4 75/F_4 5.6p/16V_4 5.6p/16V_4 5.6p/16V_4 *5.6p/16V_4 *5.6p/16V_4 *5.6p/16V_4
*M74VHC1GT125DF2G Near to IC RTD2166
CRT CONN
17
Near to VGA connector DDCDAT 2.2K_4 R620 CRTVDD5
+5V DDCCLK 2.2K_4 R601
R11270 *short_4 CRTVSYNC_B R11271 47/F_4 U36

C713 CRTHSYNC 1 10 CRTHSYNC C305 *0.22u/6.3V_4
CRTVDD5 2 1 10 9 CRTVDD5
U37 0.1u/16V_4 3 2 9 C300 *220p/50V_4
CRTVSYNC 4 GND_3/8 7 CRTVSYNC
1 5 DDCCLK 5 4 7 6 DDCCLK C301 0.1u/16V_4 CRTVDD5
OE# VCC 5 6 +5V 21,23,25,26,28,32,39
*RClamp0524P C716 *33P/50V_4 CRTVSYNC
+3V 2,4,6,7,8,9,12,13,14,16,21,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41
VSYNC 2 4 R11272 *33_4 CRTVSYNC Near to VGA connector
21 VSYNC A Y U38 C718 *33P/50V_4 CRTHSYNC
CRT_R1 1 10 CRT_R1
3 CRT_G1 2 1 10 9 CRT_G1 VIN 25,26,31,32,33,34,35,36,37,38,39,40,41
C714 1000p/50V_4 DDCCLK
GND 3 2 9
DDCDAT 4 GND_3/8 7 DDCDAT C724 1000p/50V_4 DDCDAT
*M74VHC1GT125DF2G CRT_B1 5 4 7 6 CRT_B1
5 6
*RClamp0524P
LCD CONNECTOR LCD Power

VIN TP_PWR CCD_PWR
+3V
C7 C9 C577 C578 C27 C16

C41 U1 LCDVCC
4.7u/25V_8 1000p/50V_4 0.1u/16V_4 0.1u/10V_4_X7R
C 1000p/50V_4 1000p/50V_4 1u/6.3V_4 6 1 LCDVCC C
IN OUT
4 2 C33 C29 C35 C34 C30
IN GND
R37 *short_4 EDP_VDD_EN_R 3 5 *0.1u/16V_4 *2.2u/10V_8 0.1u/16V_4 0.01u/50V_4 22u/6.3V_8
2 EDP_VDD_EN ON/OFF GND
+3V 1A-5 VIN Rev:D change to shortpad G5245AT11U
CN5 R38
MAX 1.5A R15 *short_8
G_5
R447 *100K_4 EDP_AUX_C R448 *100K_4 R14 *short_8 V_BLIGHT
R450 *100K_4 EDP_AUX#_C R449 *100K_4 40 100K_4
TP_RST# R444 *TSI@10K_4 39
38
Rev:D change to shortpad 37
LCDVCC C580 C581
*1u/6.3V_4 *1u/6.3V_4 36
R28 *short_8 LCDVCC_R 35
R11 *short_6 CCD_PWR 34
2013/12/12 change eDP pin define +3V 33
32
colayout FHD Panel for A2 stage
+5V
+3V
R16
R19
*short_6
*0_4
TP_PWR
TP_RST#
31
30
G_4
Touch screen level shift I2C(reserve) +3V
29
PCH_BRIGHT 28
Prevent ESD/EOS Layout near device 2 PCH_BRIGHT 27
BL_ON
R457 33_4 EDP_HPD_R 26
2 EDP_HPD 25 R10 *TSI@0_4 R9 R12
EDP_AUX C4 0.1U/16V_4 EDP_AUX_C 24 *TSI@10K_4 *TSI@10K_4 S0
2 EDP_AUXP EDP_AUX# EDP_AUX#_C 23
C804 C2 0.1U/16V_4
180P/50V_4
2 EDP_AUXN 22 S5 Q2
TPD->100kHz,TS=400Khz
EDP_TXP1 C10 0.1U/16V_4 EDP_TXP1_C 21
2 EDP_TXP1 20
Intel design guide suggestion
EDP_TXN1 EDP_TXN1_C 6 1 I2C1_SDA_C
eDP FHD 2 EDP_TXN1 C8 0.1U/16V_4
19 4 I2C1_SDA MCP PIN 10u.
EDP_TXP0 EDP_TXP0_C 18 Per inch 3u TS=3x5inch
C13 0.1U/16V_4 2 400kHz10~100u =2.4~0.4k.
2 EDP_TXP0 EDP_TXN0 EDP_TXN0_C 17 +3V
C12 0.1U/16V_4
2 EDP_TXN0 16 100Khz 10~100u=9k~1k.
I2C1_SCL_C *short_4 USBP6+_R 15 3 4 I2C1_SCL_C
B Touch Panel-I2C I2C1_SDA_C
R6 *TSI@0_4 6 USBP6+ R2
*short_4 USBP6-_R 14 4 I2C1_SCL B
R5 *TSI@0_4
CCD-USB 6 USBP6- R1
13 5
USBP5+ R4 *short_4 12
6 USBP5+ 11
Touch Panel-USB 6 USBP5- USBP5- R3 *short_4
10 G_1 *TSI@2N7002DW
EDP_TXP2 C3224 0.1U/16V_4 EDP_TXP2_C 9 R13 *TSI@0_4
2 EDP_TXP2 EDP_TXN2 EDP_TXN2_C 8
C3225 0.1U/16V_4
2 EDP_TXN2 TS_EN TS_EN_R 7
eDP 4k*2k 30 TS_EN EDP_TXP3 C3227 0.1U/16V_4
R442 *short_4
EDP_TXP3_C 6
2 EDP_TXP3 EDP_TXN3 EDP_TXN3_C 5
C3226 0.1U/16V_4
2 EDP_TXN3 4
R441 33_4 BOARD_ID4_TOUCH_S 3 +3VPCU
8 Board_ID4 TP_INT 2
1
G_0
S5 C803 50398-04071-001
180P/50V_4
R53
Prevent ESD/EOS Layout near device *100K_4
R52 +3V LID# LID# 30
TS_EN TP_INT
10K_4 LID591#,EC intrnal PU
R443 *TSI@0_4
D1
Rev:D change to shortpad R58 1N4148WS
1C1-2 2014/03/11 Add R698 for TS_EN short TP_INT,
for issue debug. 10K_4
R67 *short_4 PCH_BLON_C BL_ON
+3V
Hall Sensor (HSR) Rev:D change to shortpad
30
2 PCH_BLON
PCH_BLON_R R66 *short_4 R65

BL#
3
LID# R11129 *short_4 LID#15
+3VPCU 100K_4
2
2
EC_FPBACK# 30
D23
Touch Panel interrupt R7 R435 *100K_4 *VPORT_6 Q4
*TSI@10K_4 Q3 DTC144EUA
1
2
2N7002DW
1
A A
D28
1
3 1 TP_INT
4 TP_INT_PCH *VPORT_6
Dr-Bios.com
Q1 1 2 1 2 LID#15
S5 *TSI@2N7002K S0
R8 *TSI@0_4 1B-3 2013/12/10 change Q3.3 from +3V to +3VPCU.
C556
3
4.7U/10V_6 MR1
AH9249NTR-G1

1st:AL009249000 -- BCD
2nd:AL009132001 -- ANC PROJECT : ZAA
1A
CRT/LVDS/CAMERA/LID
5 4 3 2 1
5 4 3 2 1
HDMI
+3V +3V
HDMI_EQ1 R11275 10K_4 HDMI_EQ0 R11274 *10K_4
R11276 *0_4 R11277 0_4
D D
+3V
HDMI_MB_HPD
HDMI_DDCDATA_MB
HDMI_DDCCLK_MB
+3V
C4609
0.1U/16V_4_X7R C4784
0.1U/16V_4_X7R
U18
24
23
22
21
20
19
18
17
PTN3366BS
HPD_SNK
SDA_SNK
SCL_SNK
GND
TERM_EN
DDC_EN
VDD
OE_N
HDMI_DDCDATA_SW
2 HDMI_DDCDATA_SW HDMI_DDCCLK_SW
2 HDMI_DDCCLK_SW
INT_HDMITX0P C405 0.1u/16V_4 INT_HDMITX0P_C_R 25 16 INT_HDMITX0P_C

2 INT_HDMITX0P INT_HDMITX0N INT_HDMITX0N_C_R IN_D1- OUT_D1- INT_HDMITX0N_C
C398 0.1u/16V_4 26 15
2 INT_HDMITX0N INT_HDMITX1P INT_HDMITX1P_C_R IN_D1+ OUT_D1+ INT_HDMITX1P_C
C407 0.1u/16V_4 27 14
From PCH 2
2
INT_HDMITX1P
INT_HDMITX1N
INT_HDMITX1N C406 0.1u/16V_4 INT_HDMITX1N_C_R 28 IN_D2-
IN_D2+
OUT_D2-
OUT_D2+
13 INT_HDMITX1N_C
INT_HDMITX2P C411 0.1u/16V_4 INT_HDMITX2P_C_R 29 12 INT_HDMITX2P_C
2 INT_HDMITX2P INT_HDMITX2N INT_HDMITX2N_C_R IN_D3- OUT_D3- INT_HDMITX2N_C
C408 0.1u/16V_4 30 11
2 INT_HDMITX2N INT_HDMICLK+ INT_HDMICLK+_C_R IN_D3+ OUT_D3+ INT_HDMICLK+_C
C389 0.1u/16V_4 31 10
2 INT_HDMICLK+ INT_HDMICLK- INT_HDMICLK-_C_R IN_D4- OUT_D4- INT_HDMICLK-_C
C387 0.1u/16V_4 32 9
2 INT_HDMICLK- IN_D4+ OUT_D4+
33 37
HPD_SRC
SDA_SRC
SCL_SRC
C CEN_PAD GND C
36
GND 35
REXT
GND
VDD
EQ1
EQ0
GND 34
GND
1
2
3
4
5
6
7
8
+3V
HDMI_DDCDATA_SW
HDMI_DDCCLK_SW
HDMI_MB_HPD_R
+3V
HDMI_EQ1
HDMI_EQ0
12.4K/F_4
C4783
0.1U/16V_4 C4785 C4608 C4607 C4786 C386 C413 C4787
0.1U/16V_4_X7R 0.1U/16V_4_X7R 0.1U/16V_4_X7R 0.1U/16V_4_X7R 0.1U/16V_4_X7R 0.1U/16V_4_X7R 0.1U/16V_4_X7R
R11273
R322 2.2K_4 HDMI_DDCCLK_SW
+3V
R319 2.2K_4 HDMI_DDCDATA_SW
D31 RB501V-40 R316 2.2K_4

HDMI_5V 2 1 HDMI_DDCCLK_MB
B
D30 RB501V-40 R317 2.2K_4
HDMI connector B
2 1 HDMI_DDCDATA_MB
CN12
20
INT_HDMITX2P_C 1 SHELL1
2 D2+
INT_HDMITX2N_C 3 D2 Shield
INT_HDMITX1P_C 4 D2-
5 D1+
INT_HDMITX1N_C 6 D1 Shield
INT_HDMITX0P_C 7 D1-
+3V +3V 8 D0+
INT_HDMITX0N_C 9 D0 Shield 23
INT_HDMICLK+_C 10 D0- GND
11 CK+ 22
R722
EMI INT_HDMICLK-_C 12
13
CK Shield GND
CK-
S0 S0 CE Remote
2
*1M_4 14
INT_HDMITX2P_C +5V HDMI_DDCCLK_MB 15 NC
1 3 HDMI_MB_HPD_R HDMI_DDCDATA_MB 16 DDC CLK
2 INT_HDMI_HPD DDC DATA
R315 *120/F_4 Q26 17
Q41 3 1 HDMI_5V 18 GND
*2N7002K INT_HDMITX2N_C IN OUT 2 19 +5V
GND HDMI_MB_HPD R721 *short_4 HP_DET_CN HP DET 21
*short_4 R718 R11064 INT_HDMITX1P_C AP2331SA-7 C383 D6 SHELL2
1
100K_4 *220p/50V_4 *AZ5125-01J HDMI connector
R314 *120/F_4
DDS AL002331000 R720 Rev:D change to shortpad
INT_HDMITX1N_C 20K_4
2
INT_HDMITX0P_C
R312 *120/F_4
INT_HDMITX0N_C
A A
INT_HDMICLK+_C
Dr-Bios.com
R303 *120/F_4
+3V 2,4,6,7,8,9,12,13,14,16,21,22,24,25,26,27,28,30,32,33,34,35,36,39,40,41
+5V 21,22,25,26,28,32,39 INT_HDMICLK-_C
+1.5V 9,25,27,39

PROJECT : ZAA
1A
HDMI (PTN3366BS)
5 4 3 2 1
5 4 3 2 1
+3V 2,4,6,7,8,9,12,13,14,16,21,22,23,25,26,27,28,30,32,33,34,35,36,39,40,41
LAN & Card reader Combo (LAN) +3VPCU
+3V_S5
6,9,11,22,25,26,27,28,30,31,32,39,40,41
2,3,4,6,7,8,9,11,20,26,27,28,30,32,34,35,40 Card Reader (CRD)
Giga LAN (LAN)

10p/50V_4 C4606 LAN_XTALI
2
1
D Y1 SP8 D
CN4
25MHZ C4603 *10P/50V_4
SP1 R11254 *short_4 SP1=SD_D1 SP7=SD_WP=MS_BS 11
4
3
LAN_XTAL2 TP4333 SP2 R11253 *short_4 SP2=SD_D0=MS_D1 SP8=SD_CD# 10 WP 16
10p/50V_4 C4605 SP3 R11255 *short_4 SP3=SD_CLK=MS_D0 SP6=SD_D2=MS_CLK 9 CD NC 17
PCIE_LAN_WAKE#_R SP4 R11136 *short_4 SP4=SD_CMD=MS_D2 SP1=SD_D1 8 DATA2 NC
SP2=SD_D0=MS_D1 7 DATA1
SP5 R11137 *short_4 SP5=SD_D3=MS_D3 6 DATA0
TP4336 SP6 R11138 *short_4 SP6=SD_D2=MS_CLK SP3=SD_CLK=MS_D0 *short_4 R11141 SD_CLK_R 5 VSS2
VDD10 TP44 TP4335 +3V3_SD_SW CLK
+3V3_SD_SW reserve for EMI 4
TP4334 SP7 R11139 *short_4 SP7=SD_WP=MS_BS 3 VDD
R11264 2.49K_4 RSET SP4=SD_CMD=MS_D2 2 VSS1
GND
GND
GND
GND
C4604 *10P/50V_4 SP8 R11256 *short_4 SP8=SD_CD# SP5=SD_D3=MS_D3 1 CMD
10 mils CD/DATA3
LANVCC SD-CARD
12
13
14
15
C4618
48
47
46
45
44
43
42
41
40
39
38
37
U15 C4617
Share Pin 4.7u/6.3V_6 0.1u/16V_4
LED1/GPO
RSET
LV_CEN
LED_CR
CKXTAL2
CKXTAL1
MS_CD#
SD_CD#
LED0
LED2
HV_GIGA
LANWAKEB
49
E_PAD
SP1 SD_D1
SP2 SD_D0 MS_D1
SP3 SD_CLK MS_D0
+3V SP4 SD_CMD MS_D2
SP5 SD_D3 MS_D3
MDI_0+
VDDREG SP6 SD_D2 MS_CLK EMI
1 36 REGOUT SP7 SD_WP MS_BS
MDI_0- 2 MDIP0 REG_OUT 35 R11266 *short_8 LANVCC R11263 SP8 SD_CD# SP3=SD_CLK=MS_D0
3 MDIN0 VDDREG 34
VDD10 AVDD10 ENSWREG
ENSWREG R11258 *short_4 1K_4 SP9 MS_INS#
MDI_1+ 4 33
MDI_1- MDIP1 VDD1 VDD10
5 32 R11259 *short_4 LANVCC
MDI_2+ MDIN1 VD33 C4616
6 31 ISOLATEB
MDI_2- 7 MDIP2 ISOLATEBPIN 30
MDIN2 PERSTBPIN PCIE_REQ_LAN#_R SP1=SD_D1 10P/50V_4
VDD10 8 29 C4611 *10p/50V_4
MDI_3+ 9 AVDD10 CLKREQBPIN 28 SP7 R11262
MDI_3- 10 MDIP3 QFN48 MS_BS/SD_WP# 27 VDD33/18 15K_4 SP2=SD_D0=MS_D1 C4612 *10p/50V_4
11 MDIN3 DV33_18 26 PCIE_RX5-_LAN_C C4602 0.1U/16V_4
LANVCC HV_GIGA HSON PCIE_RX5+_LAN_C C4601 PCIE_RX5-_LAN 6 SP4=SD_CMD=MS_D2
+3V 12 25 0.1U/16V_4 C4614 *10p/50V_4
VDD3 HSOP PCIE_RX5+_LAN 6
SP5=SD_D3=MS_D3 C4613 *10p/50V_4
SD_CMD/MS_D2
SD_CLK/MS_D0
SD_D2/MS_CLK
SD_D0/MS_D1
SD_D3/MS_D3
SP6=SD_D2=MS_CLK C4615 *10P/50V_4

REFCLK_N
CARD_3V3
REFCLK_P
C C
R11260 *IOAC@0_4
VDDTX
SD_D1
IOAC_RST# 27,30
HSIN
HSIP
R11261 NAC@0_4 PLTRST# 8,14,26,27,30

+3V3_SD_SW C4821
13
14
15
16
17
18
19
20
21
22
23
24
1000p/50V_4
SP1
SP2
CLK_PCIE_LANN 6
SP3
CLK_PCIE_LANP 6
SP4 PCIE_TX5-_LAN 6
SP5 PCIE_TX5+_LAN 6
SP6
EVDD10
LANVCC
40 mils (Iout=1A)
Leakage circuit (MPC) C354 C370 C365

Layout:All termination
B
+3V +3V 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 Tramsformer signal should have 30
B
mil trace
+3V For RTL8411B
R281 R277 U42
CLK_PCIE_REQ4# have PU 10k. Place 0.1uF,CAP close to each VDD33 pin -- 11,32,48 1 24 LAN_MCT0
*10K/F_4 10K/F_4
TCT1 MCT1
2
MDI_3+ 2 23 LAN_MX3+
MAIN POWER(3V_S0) MDI_3- TD1+ MX1+ LAN_MX3-
3 22
3 1 PCIE_REQ_LAN#_R TD1- MX1-
S0 6 CLK_PCIE_LAN_REQ#
4 21 LAN_MCT1
RJ45 Connector
Q25 MDI_2+ 5 TCT2 MCT2 20 LAN_MX2+
2N7002K MDI_2- 6 TD2+ MX2+ 19 LAN_MX2-
R276 *0/J_4
RTL8411B (LDO mode) close to each VDD10 pin-- 3, 8, 33, 46 close to each VDD10 pin -- 20 TD2- MX2-
REGOUT (reserve) 7 18 LAN_MCT2 CN11
LANVCC VDD10 MDI_1+ 8 TCT3 MCT3 17 LAN_MX1+
MDI_1- 9 TD3+ MX3+ 16 LAN_MX1- 9
FAE suggest to 40 mils (Iout=1A) 40 mils (Iout=1A) TD3- MX3- 9
R246
change to 1K *short_8 10 15 LAN_MCT3 10
MDI_0+ 11 TCT4 MCT4 14 LAN_MX0+ LAN_MX0+ 1 10
GND
R702 C363 C760 C762 C757 C355 C758 C761 MDI_0- 12 TD4+ MX4+ 13 LAN_MX0- LAN_MX0- 2 0+
*IOAC@1K_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 *1U/6.3V_4 *0.1u/16V_4 TD4- MX4- LAN_MX1+ 3 0-
LAN_MX2+ 4 1+
75/F_8
75/F_8
75/F_8
75/F_8
TRANSFORMER
25
2+
2
LAN_MX2- 5
EC_PCU LANVCC LAN_MX1- 2-
Rev:D change to C364 6
R713 NAC@0_4 3 1 PCIE_LAN_WAKE#_R 0.01U/50V/X7R_4 LAN_MX3+ 7 1-
8,27 PCIE_LAN_WAKE# shortpad LAN_MX3- 8 3+
3-
R269
R262
R11265
R251
R715 *IOAC@0_4 Q39
30 IOAC_LAN_WAKE#
*IOAC@2N7002K 11
11
12
R709 NAC@0/J_4 12
Reserve IOAC No Stuff
TERM9
RJ45
Q24 *IOAC@AO3413 LANVCC +3V_S5
VDD10 EVDD10 VDDREG
1 3 +3V_LAN R248 R247 [email protected]_8
30 mils 40 mils 4/20 REV:D add TP85 ~TP100 for AZ chip ICT/ATE Capacitor test
+3VPCU 10 mils
C4782 *IOAC@0_8 R11257 C746
R260 C366 C367 C350 C377 VDD33/18 *short_6 1000P/3KV_1808
2
*[email protected]/16V_4 *IOAC@100K/J_4 10u/6.3V_6 0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4 C4600 C4599

C4596 C244 4.7U/6.3V_6 0.1U/16V_4
C4597 C4598
A A
1U/6.3V_4 0.1U/16V_4
30 LANPWR# R259 *4.7u/6.3V_6 0.1U/16V_4
*IOAC@10K_4 C368
*IOAC@1000p/50V_4
Place close to pin 27
Close to Pin20 Place connect to Pin35
Dr-Bios.com 4 3 2
Size
Date:
Document Number
PROJECT : ZAA
LAN/CRD COMBO - RTL8411B
1
Sheet 24 of 48
Rev
1A
5 4 3 2 1
Codec(ADO) DC-DET circuit(ADO) Rev:D change to shortpad

R338 *short_6
+5V
HP-R2 VIN
3 1 PVDD
HP-L2
+5V C456 Q28
LINE1-VREFO-L R345 *10u/6.3V_4 *AO3404
2
*1M_6
LINE1-VREFO-R
MIC2-VREFO
Close to Codec R343
3
*100K_4
CODEC_VREF C535 2.2U/6.3V_4 ADOGND
DC-DET R344 *0_4 2 Q27
INT_AMIC-VREFO C534 10u/6.3V_4 *DTC144EU
D ADOGND +5VA D
C527
C528
C530
R397 100K_4
1
10u/6.3V_4
1U/6.3V_4
1U/6.3V_4
C536
C532
0.1u/16V_4 10u/6.3V_4
+AZA_VDD
Place next to pin 26 D-Mic (MIC) +3V_DMIC +3V +3V_DMIC
+3V_DMIC Far away rubber R11284 *short_4 C373 *FOR17@10u/6.3V_4

36
35
34
33
32
31
30
29
28
27
26
25
+1.5VA
U23 C356 10u/6.3V_4 C376 FOR17@10p/50V_4 DUAL SECOND for 17"
ADOGND C353 0.1u/16V_4
CPVEE
HP-OUT-L
LINE1-VREFO-L
MIC2-VREFO
LDO1-CAP
AVDD1
AVSS1
CPVDD
CBN
HP-OUT-R
LINE1-VREFO-R
VREF
C520 C360 10p/50V_4 Rev:D change to shortpad U16
C524 1 3 DMIC_CLK_L1
10u/6.3V_4 0.1u/16V_4 U17 VDD CLK
ADOGND 37 24 1 3 DMIC_CLK_L_R0 R11186 *short_4 DMIC_CLK_L 2 4 DMIC_DAT_L1
CBP LINE2-L VDD CLK LR DATA
DMIC_DAT_L_R0R11185 DMIC_DAT_L
C378
D4
C379
D5
38 23 2 4 *short_4 5 7
AVSS2 LINE2-R LR DATA GND GND
1
ADOGND 6 8
GND GND
D2
Place next to pin 40 39 22 5 7
C357
C374
C529 10u/6.3V_4 LINE1-L
LDO2-CAP LINE1-L GND GND
1
6 8
D3
R270 R11047
Rev:D change to shortpad GND GND
1
Analog 40 21 LINE1-R *FOR17@KMM40301026-18DS
*FOR17@TVS/6pF_4
*FOR17@TVS/6pF_4
*FOR17@10p/50V_4
*FOR17@10p/50V_4
*0_4 *0_4
2
AVDD2 LINE1-R KMM40301026-18DS
+5V_PVDD 41 20 Single DMIC DMIC_CLK_L_R1
TVS/6pF_4
Digital
*10p/50V_4
*10p/50V_4
PVDD L13 R388 *short_6 +3VPCU
2
PVDD1 NC analog digital DMIC_DAT_L_R1
TVS/6pF_4
PBY160808T-600Y-N(60,3A)
2
L_SPK+ 42 19 C519 10u/6.3V_4 DUAL MAIN
SPK-L+ MIC-CAP ADOGND
C510 C509
10u/6.3V_4 0.1u/16V_4
L_SPK- 43
SPK-L-
ALC255 MIC2-R/SLEEVE
18 SLEEVE trace width of SLEEVE & RING2
Close to Codec R11181
*FOR15@0_4
R11182
*FOR15@0_4
R_SPK- 44 17 RING2 are required at least 40mil and
SPK-R- MIC2-L/RING2 its length should be asshort as possible DMIC_CLK_L_R2
Close to Codec Low is power down
R_SPK+ 45
SPK-R+ MONO-OUT
16 DMIC_DAT_L_R2 +3V_DMIC
amplifier output 46 15 *If single DMIC, C4734 *FOR15@10u/6.3V_4

PVDD2 SPDIFO/FRONT JD C4735 *[email protected]/16V_4
please remove R270, R11047
GPIO0/DMIC-DATA
PD# 47 14 Placement near Audio Codec C4733 *FOR15@10p/50V_4 DUAL SECOND for 15"
GPIO1/DMIC-CLK
PDB MIC2/LIN2 JD
C C501 C500 *For B-stage remove R270, R11047, C
48 13 SENSEA R383 200K_4 HP_JD# U4512
TP34 SPDIF-OUT SDATA-OUT HP/LINE1 JD If need test, just short it. 1 3 DMIC_CLK_L2
LDO3-CAP
10u/6.3V_4 0.1u/16V_4
SDATA-IN
VDD CLK
DVDD-IO
PCBEEP
RESETB
BIT-CLK
R378 100K_4 +3V DMIC_DAT_L2
DVDD
49
SYNC
2 4
DVSS
DGND LR DATA
Analog
5 7
C4737
D4014
C4736
D4013
GND GND
1
Digital DMIC_CLK_L_R1 R11179 *FOR17@0_4 DMIC_CLK_L1 6 8
1
10
11
12
DMIC_DAT_L_R1 R11180 *FOR17@0_4 DMIC_DAT_L1 GND GND
DMIC_DAT
DMIC_CLK
+AZA_VDD DMIC_CLK_L_R2 R11175 DMIC_CLK_L2

C481
*FOR15@0_4 *FOR15@KMM40301026-18DS
*FOR15@TVS/6pF_4
*FOR15@TVS/6pF_4
*FOR15@10p/50V_4
*FOR15@10p/50V_4
DC-DET
2
Rev:D change to shortpad DMIC_DAT_L_R2 R11176 *FOR15@0_4 DMIC_DAT_L2
Change 47K to 22K for PCBEEP
1.6Vrms
+AZA_VDD
R350
+3V R367 *short_6

0.1u/16V_4 BEEP_1
10u/6.3V_4
PCBEEP C476 R352 22K_4 D9 1N4148WS

SPKR 4
C477 D10 1N4148WS
PCBEEP_EC 30 Single DMIC and Dual DIMC same PN: AL403010A00
*short_4
C485 C484 100p/50V_4 R354

0.1u/16V_4 10u/6.3V_4 1.Single DMIC
10K_4 NSM0407DT (AL472376000) <- Main source
+3V +1.5V
SPM0437HD4H (AL000437000)
CPU 3.3V 2.Dual DMIC
Rev:D change to shortpad PCH_AZ_CODEC_RST# 4 Rev:E change connect to +3V NSM0410DT (W/ Fortemedia algorithm)
R365 *short_4
DMIC_DAT_L R371 *short_4
Main MIC CS need connect to second MIC DATA
PCH_AZ_CODEC_SYNC 4
Tied at one point only under DMIC_CLK_L R370 22_4 DVDD_IO R366 *0_4
the codec or near the codec Rev:E change to 0402
R394 *0_4 C488 ACZ_SDIN R359 33_4 C492 C489
PCH_AZ_CODEC_SDIN0 4
R393 *0_4 10p/50V_4
R399 *0_4 PCH_AZ_CODEC_BITCLK 4 0.1u/16V_4 10u/6.3V_4
R400 *0_4
R375
R750
*0_4
*short_4 Close to Codec C493 *22p/50V_4
Universal Audio Jack HEADPHONE/MIC/LINE combo (ADO)
C537 *1000p/50V_4 PCH_AZ_CODEC_SDOUT 4 Place next to pin 9
C538 *0.1u/16V_4
B B
MIC2-VREFO R407 2.2K_4
ADOGND R420& R422 change to 62 ohm -> 3/11
R424 2.2K_4 Combo Jack
Cap need near AVDD1 and Rev:D change to shortpad
AVDD2 SLEEVE R408 *short_4 SLEEVE_R
SLEEVE_R 29
power source input +3VPCU 6,9,11,22,24,26,27,28,30,31,32,39,40,41
RING2 R425 *short_4 RING2_R
+3V 2,4,6,7,8,9,12,13,14,16,21,22,23,24,26,27,28,30,32,33,34,35,36,39,40,41 RING2_R 29
+1.5V 9,27,39
HP-L2 R422 62/F_4 HP-L3
HP-L3 29
HP-R2 R420 62/F_4 HP-R3
+5V 21,22,23,26,28,32,39 HP-R3 29
HP_JD#
HP_JD# 29
R423 R417
LINE1-L C552 4.7U/6.3V_6 *10K_4 *10K_4 C547 C554 C553 C550
Codec PWR 5V(ADO) Mute(ADO) LINE1-VREFO-L R421 4.7K_4 100p/50V_4 100p/50V_4 100p/50V_4 100p/50V_4
+AZA_VDD +1.5V LINE1-VREFO-R R418 4.7K_4
LINE1-R C549 4.7U/6.3V_6 ADOGND
R372
1K_4
2
DIGITAL ANALOG PCH_AZ_CODEC_RST#

PD# D15 *RB500V-40 3 1
L16 HCB2012KF220T60/6A/22ohm_8
+5V +5VA R369
3
U25
IN OUT
4
*10K_4 C494
*1u/10V_4
Q29
*PJA138K Codec PWR 1.5V(ADO)
2 D16 RB500V-40
GND AMP_MUTE# 30
C523 C526
1 5 R395 *29.4K/F_4
SHDN SET *10u/6.3V_6 *0.1u/16V_4 +1.5VA
*G923-330T1UF
C525 C515 R390 DIGITAL ANALOG
A *10K/F_4 A
*0.1u/16V_4 *10u/6.3V_6 ADOGND
Internal Speaker +1.5V L18 HCB1608KF-121T30_3A
R401 *0_4
Dr-Bios.com
40mil for each signal 4 ohm : 40mil for each signal C541
ADOGND SPK_CONN_4P 1U/6.3V_4

R_SPK+ R419 *short_6 R_SPK+_1
R_SPK- R414 *short_6 R_SPK-_1 1
L_SPK- R406 *short_6 L_SPK-_1 2
L_SPK+ L_SPK+_1 3 5
C730, C787 close U37 pin3 and L65 R404 *short_6
4 6
CN18 Quanta Computer Inc.
C551 C548 C546 C545
*68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4 PROJECT : ZAA
1B-2 2013/12/04 Change PN and footprint. Size Document Number Rev
1A
1B-5 2013/12/17 Change CN14 pin define ALC255/HP/SPK
5 4 3 2 1
5 4 3 2 1
+5V 21,22,23,25,28,32,39
+3V 2,4,6,7,8,9,12,13,14,16,21,22,23,24,25,27,28,30,32,33,34,35,36,39,40,41
2.5" SATA HDD (HDD) +3VPCU 6,9,11,22,24,25,27,28,30,31,32,39,40,41

SATA ODD Connector +3V_S5 2,3,4,6,7,8,9,11,20,24,27,28,30,32,34,35,40
CN14
23
GND23
1
GND1 2 SATA_TXP0_C C522 0.01u/50V_4
RXP SATA_TXP0 6
3 SATA_TXN0_C C513 0.01u/50V_4 CN9
RXN SATA_TXN0 6
4 14
GND2 5 SATA_RXN0_C C507 0.01u/50V_4 GND14
TXN 6 SATA_RXP0_C SATA_RXN0 6 1
C504 0.01u/50V_4
TXP 7 SATA_RXP0 6 GND1 2 SATA_TXP1_C C751 0.01u/50V_4 SATA_TXP1 6
GND3 RXP 3 SATA_TXN1_C C749 0.01u/50V_4
RXN SATA_TXN1 6
4
D 8 GND2 5 SATA_RXN1_C C744 0.01u/50V_4 D
3.3V 9 DEVSLP0_R TXN 6 SATA_RXP1_C SATA_RXN1 6
R351 *0_4 DEVSLP0 DEVSLP0 6 C743 0.01u/50V_4
3.3V TXP SATA_RXP1 6
10 7 C802 *IOAC@180P/50V_4
3.3V 11 GND3 SSD_ID 6
R217 *IOAC@33_4
GND ODD_PRSNT# 4
12 R216 *IOAC@10K_4 Prevent ESD/EOS Layout near device
GND +5V ODD_PRSNT#_C +3V
13 1B-4 8 C330 *IOAC@15p/50V_4
GND 14 DP 9 +5VODD R657 *short_8 +5V_ODD
5V 15 +5V_HDD 60mil R339 *short_8 +5V 10
5V 16 +5V 11 C726 C721 C733 C730 C737 C740 Rev:D change to shortpad
+
5V 17 C437 C436 C435 C453 C438 C457 RSVD 12
GND 18 + GND 13 0.01u/50V_4 0.01u/50V_4 *0.1u/16V_4 *0.1u/16V_4 10u/6.3V_6 *100u/6.3V_3528
RSVD 19 0.01u/50V_4 0.01u/50V_4 *0.1u/16V_4 *0.1u/16V_4 10u/6.3V_6 *100u/6.3V_3528 GND
GND 20 15
12V 21 GND15
12V 22 C185Q2-11311-L
12V EC_ODD_EJ# 30
24
GND24 1A-8
HDD CONN R326 *0_4 ACCEL_INT2 R209 *IOAC@10K_4
ACCEL_INT2 28 +3V
Connect to G-sensor INT2
ODD Power (SATA) +3VPCU

VIN +5V
Q34
*IOAC@AO6402A +5V_ODD
+5V
1
6
C C
R695 5 4 R672 NAC@0_8
*IOAC@100K 2
1 R673
Reserve IOAC Power No Stuff *IOAC@22_8
2
R686
3
ODD_EN_Q 2 1
MOD_EN_5V
*IOAC@100K
3
R704 *IOAC@0_4 ODD_EN
30 ODD_POWER
ODD_EN_Q 2
1
2 PCH_ODD_EN R703 *IOAC@0_4

C752 Q36
R692 *[email protected]/25V_6 *IOAC@DMN601K-7
2
*IOAC@100K
1
2
*IOAC@2N7002DW
Q37
4
POA_PWR
+3VPCU
SP@ BOM周周周NPCT650 POA(FPD) for Intel Base plateform POA_PWR +3V_LDO_EC R11290 *FPD@0_4
B A,B,C P/N:AL009655K01(SLB9655TT1.2- FW4.31) SEL OE# Y+ Y- +3V B
RAMP P/N: AL000650K01 (NPCT650AAAWX) R11288 FPD@0_4
TPM NPCT650 (TPM) X H Hi-Z Hi-Z C3001 *[email protected]/16V_6
R11289 *FPD@0_4
L L M+ M-
+3V3_TPM_VSB R2854
H L D+ D- *FPD@10K_4
1
+3V_S5 +3V3_TPM
+3V_S5 Q75
AL000650K01 :NPCT650AAAWX R745
C776
*short_6
*TPM@10u/6.3V_6 R725 *short_6 Spec define: High Active R11298 *short_4 2
FPD@AO3413 R866
*FPD@0_4
C774 *[email protected]/16V_4 C767 *TPM@10u/6.3V_6 but USBON# is Low Active +3V_POA_R
3
C768 *[email protected]/16V_4 C766 *[email protected]/16V_4
TPMM 1.2 AL009655K01 20mil +3V_POA 20mil
3
R11297 FPD@10K_4 2 R2855 *short_4
30 POA_FP_PWREN#
TPMM 2.0 AL000650K01
22
14
U44
8
Q76
C3000 C3002
C4822 *FPD@DTC144EUA CN95
VDD3
VDD2
VDD1
VSB
1
*FPD@1000p/50V_4 1 10
[email protected]/6.3V_4 [email protected]/50V_4 USBP8+_R 2 9
USBP8-_R 3
LPC_LAD3 15 4 TPM_PP 4
7,27,30
7,27,30
LPC_LAD3
LPC_LAD2
LPC_LAD2
LPC_LAD1
18
21
LAD3
LAD2/SPI_IRQ
PP
GPX/GPIO2
3
30
GPX
TP4358
TP4359 USBP8+
Co-layout
R11301 *FPD_SP@0_4 USBP8+_PI3 30 POA_EN#
R11293
R11294
FPD@0_4
FPD@0_4
5
6
7,27,30 LPC_LAD1 LPC_LAD0 LAD1/MOSI GPIO1 TP4360 6 USBP8+ USBP8-_PI3 30 POA_PWR_INT#
24 USBP8- R11291 *FPD_SP@0_4 R11295 FPD@0_4 7
7,27,30 LPC_LAD0 LPC_LFRAME# LAD0/MISO 6 USBP8- 30 POA_AUTH_ERR
20 29 R11296 FPD@0_4 8
7,27,30 LPC_LFRAME# IRQ_SERIRQ LFRAME/SCS GPIO0/XOR_OUT TPM_BADD TP4361 USBP8+_R_COM 30 POA_POWERREQ
27 6 R729 *TPM@10K_4 R11299 FPD_SP@0_4
7,30 IRQ_SERIRQ PCLK_TPM SERIRQ GPIO3/BADD USBP8-_R_COM
19 5 R11300 FPD_SP@0_4 FPD@CONN_AOP
7 PCLK_TPM LCLK/SCLK TEST
CLKRUN# R743 *short_4 TPM_CLKRUN# 13 2
7,30 CLKRUN# TPM_LRESET# CLKRUN/GPIO04 NC1 U1006
PLTRST# R742 *short_4 17 7
8,14,24,27,30 PLTRST# LRESET/SPI_RST NC2
LPCPD 28 10 BADD SELECTION
LPCPD NC3 11 0 EEh - EFh +3VPCU USBP8+_PI3 1 4 USBP8+_R
26 NC4 12 1 7Eh - 7Fh USBP8-_PI3 2 Y+ M- 5 TP4396 USBP8-_R
NC7 NC5 Y- M+ TP4399
3/4 EMI request add 33p near TPM IC 31
NC8 NC6
25 3
GND D-
6 USBP8-_R_PI3
USBP8+_R_PI3
GND1
GND2
GND3
GND4
A R2870 *short_4 R2868 FPD@10_4 9 7 A

C807
B.M.
'1' - pin is left open. 10 VCC D+ 8 R2872 *short_4 EC54 EC53

'0' - pin is pulled down. 8,30 MAINON SEL OE#
CLKRUN# C3007 C3008 *AZ5725-01F *AZ5725-01F
*TPM@NPCT620/650_QFN32
33
9
16
23
32
Dr-Bios.com
[email protected]/50V_4 [email protected]/16V/X7R_4 *FPD@PI3USB102
*TPM@33P/50V_4 EMI
USBP8+_R_PI3
USBP8-_R_PI3
R11303 *FPD_SP@0_4 USBP8+_R
USBP8-_R
R11305 *FPD_SP@0_4
+3V3_TPM
USBP8+_R_COM R11302 FPD_SP@0_4
PROJECT : ZAA
LPCPD R744 *[email protected]_4 USBP8-_R_COM R11304 FPD_SP@0_4 Size Document Number Rev
1A
Co-layout Date:
HDD/ODD/TPM NPCT650
Monday, March 28, 2016 Sheet 26 of 48
5 4 3 2 1
5 4 3 2 1
NGFF_M.2 WiFi & BT (NGF)

CN10
Leakage circuit (MPC)
+WL_VDD +WL_VDD
NGFF +WL_VDD Stuff
1 2 +3V +WL_VDD +WL_VDD +3V
USBP4+ 3 GND 3.3Vaux 4 C340 10u/6.3V_6 +3V
6 USBP4+ USB_D+ 3.3Vaux
USBP4- 5 6 C755 0.1u/16V_4 R237 NAC@0_8
6 USBP4- USB_D- LED#1
7 8 C753 0.1u/16V_4
9 GND PCM_CLK 10 C735 0.1u/16V_4
SDIO CLK(O) PCM_SYNC R245 R242
11 12 C731 0.1u/16V_4 APU Internal PU 2N7002DW R241 C347 C346 C338 C339
13 SDIO CMDIO) PCM_IN 14 APU External nu-PU 4.7K_4 4.7K_4
*10K_4 *10u/6.3V_6 *0.1u/16V_4 *0.1u/16V_4 *0.1u/16V_4
SDIO DAT0(IO) PCM_OUT
15
SDIO DAT1(IO) LED#2
16 5 IOAC S0
17 18
19 SDIO DAT2(IO) GND 20 WLAN_CLKREQ# 4 3
D 21 SDIO DAT3(IO) UART Wake 22 S0 PCIE_CLKREQ_WLAN# 6 D
23 SDIO Wake(I) UART Rx 24
SDIO Reset Key 5
25
KEY1 Key 6
26 IOAC 2
27
KEY2 Key 7
28
WLAN_WAKE_R#
EC_PCU Low Mini card +3V power enable +WL_VDD
29 30 1 6 Q22 *IOAC@AO3413
31 KEY3 Key 8 32 S0 IOAC_WLAN_WAKE# 30
33 KEY4 UART Tx 34 Q23 1 3+3V_WLAN R221
6 PCIE_TX6+_WLAN
PCIE_TX6+_WLAN 35 GND UART CTS 36 High Mini card +3V power disable +3VPCU
*short_8
PCIE_TX6-_WLAN 37 PETp0 UART RTS 38 R243 *0_4 R244 C345
6 PCIE_TX6-_WLAN PETn0 Clink RESET
39 40 R253 *0_4 R231
PCIE_LAN_WAKE# 8,24
2
PCIE_RX6+_WLAN 41 GND CLink DATA 42 WIFI_SUSCLK *[email protected]/16V_4
6 PCIE_RX6+_WLAN PCIE_RX6-_WLAN PERp0 CLink CLK
43 44 *0_4 *IOAC@100K_4
6 PCIE_RX6-_WLAN
45 PERn0 COEX3 46 C821 180P/50V_4
IOAC No Stuff S0
CLK_PCIE_WLANP 47 GND COEX2 48 WIFI card reset (non-IOAC) WLANPWR#
6 CLK_PCIE_WLANP CLK_PCIE_WLANN REFCLKP0 COEX1 30 WLANPWR#
6 CLK_PCIE_WLANN
49 50 R680 *IOAC@0_4 WIFI card reset (IOAC) R230
REFCLKN0 SUSCLK(32KHz) WLAN_RST# IOAC_RST# 24,30
51 52 R671 NAC@0_4 PLTRST# Debug card reset *IOAC@10K_4 C344
WLAN_CLKREQ# GND PERST0# BT_EN PLTRST# 8,14,24,26,30
53 54 BT_EN 30
WLAN_WAKE_R# 55 CLKREQ0# W_DISABLE#2 56 RF_EN *IOAC@1000p/50V_4
PEWake0# W_DISABLE#1 RF_EN 30
57 58 Reserve only for Intel module no need to stuff by default 11/24
59 GND NFC I2C SM DATA 60 Reserve IOAC No Stuff
61 PETp1 NFC I2C SM CLK 62
63 PETn1 NFC I2C IRQ 64 LPC_LAD0_C R688 *short_4 LPC_LAD0
GND NFC Reset# LPC_LAD1_C LPC_LAD1 LPC_LAD0 7,26,30 +3V_S5
65 66 R690 *short_4 U43 +WL_VDD
PERp1 RESERVED3 LPC_LAD2_C LPC_LAD2 LPC_LAD1 7,26,30
67 68 R693 *short_4
PERn1 RESERVED4 LPC_LAD3_C LPC_LAD3 LPC_LAD2 7,26,30
69 70 R696 *short_4 R716 *10K_4 1 5
7 CLK_PCI_LPC
CLK_PCI_LPC R694 *0_4 CLK_PCI_LPC_C 71 GND RESERVED5 72
LPC_LAD3 7,26,30 +3V_S5 NC VCC Reserver +1.5v for WIFI module
1
LPC_LFRAME# R699 *0_4 LPC_LFRAME#_C 73 Reserved1 3.3Vaux 74 +WL_VDD Rev:D change to shortpad R714 Q38 *IOAC@AO3413
7,26,30 LPC_LFRAME# Reserved2 3.3Vaux
75 6 SUSCLK SUSCLK 2 C763 *10K_4
GND A *0.1u/16V_4 1 3+3V_WLAN
+1.5V
2
For Debud Card use WLAN_NGFF CONN(Type 2230) 3 4 WIFI_SUSCLK C759
GND Y R712
2
E-KEY *74AUP1G07GW *IOAC@100K_4
WLANPWR#
R710
*IOAC@10K_4 C756
*IOAC@1000p/50V_4
No Stuff
C C
+3V3_SATA_N1 +3V
C1162 *150u/6.3V_3528 R948 *short_8 C1163 10u/6.3V_6

+ C1164 0.1u/10V_4 CN23
C1165 10u/6.3V_6 +3V3_SATA_N1
C1166
C1167
0.1u/10V_4
0.1u/10V_4 1
NGFF 2 +3V 2,4,6,7,8,9,12,13,14,16,21,22,23,24,25,26,28,30,32,33,34,35,36,39,40,41
GND 3.3V +3VPCU 6,9,11,22,24,25,26,28,30,31,32,39,40,41
C1168 0.1u/10V_4 3 4
C1169 0.1u/10V_4 5 GND 3.3V 6
PERn3 NC +3V_S5 2,3,4,6,7,8,9,11,20,24,26,28,30,32,34,35,40
7 8
PERp3 NC +1.5V 9,25,39
9 10 TP108
11 GND DAS 12 TP4397
13 PETn3 NOTCH/3.3V 14
15 PETp3/NOTCH NOTCH/3.3V 16
17 GND/NOTCH NOTCH/3.3V 18
19 PERn2/NOTCH NOTCH/3.3V 20
21 PERp2/NOTCH NC 22
23 GND/CONFIG_0 NC 24
25 PETn2 NC 26
27 PETp2 NC 28
R958 *short_4 SATA_RXP3/PEG_RXP9_L0_N 29 GND NC 30
6 SATA_RXP3/PEG_RXP9_L0 SATA_RXN3/PEG_RXN9_L0_N PERn1 NC
6 SATA_RXN3/PEG_RXN9_L0 R959 *short_4 31 32
33 PERp1 NC 34
C1176 0.1u/10V_4 SATA_TXN3/PEG_TXN9_L0_N 35 GND NC 36
6 SATA_TXN3/PEG_TXN9_L0 SATA_TXP3/PEG_TXP9_L0_N PETn1 NC DEVSLP_N1
6 SATA_TXP3/PEG_TXP9_L0 C1177 0.1u/10V_4 37 38 R956 *short_4DEVSLP2 DEVSLP2 6
39 PETp1 DEVSLP 40 R957 *10K_4
R11061 *short_4 SATA_RXP3/PEG_RXP10_L1_N 41 GND NC 42
6 SATA_RXP3/PEG_RXP10_L1 SATA_RXN3/PEG_RXN10_L1_N PERn0/SATA-B+ NC
6 SATA_RXN3/PEG_RXN10_L1 R11062 *short_4 43 44
45 PERp0/SATA-B- NC 46
C4664 0.1u/10V_4 SATA_TXN3/PEG_TXN10_L1_N 47 GND NC 48
6 SATA_TXN3/PEG_TXN10_L1 SATA_TXP3/PEG_TXP10_L1_N PETn0/SATA-A- NC NGFF1_RST#_SSD
C4665 0.1u/10V_4 49 50 R960 *short_4 PLTRST#
6 SATA_TXP3/PEG_TXP10_L1 PETp0/SATA-A+ PERST# PCIE_CLKREQ_NGFF_SSD#_R
51 52 R11110 *short_4 PCIE_CLKREQ_NGFF_SSD# 6
B 53 GND CLKREQ# 54 B
6 NGFF_SSD_CLK# REFCLKn PEWake#
6 NGFF_SSD_CLK 55 56 TP109
57 REFCLKp N/C 58 TP150
R11283 10K_4 59 GND N/C 60
6 NGFF_SATA_DET +3V +3V3_SATA_N1 NOTCH NOTCH
61 62
NOTCH NOTCH
3
12/16 New add 10k ohm 63 64

Q59 R961 1M_4 65 NOTCH NOTCH 66 +3V3_SATA_N1
67 NOTCH NOTCH 68
2 NGFF3_PEDET 69 NC SUSCLK(32KHz) 70
71 PEDET 3.3V 72
R968 73 GND 3.3V 74
2N7002K 75 GND 3.3V
GND
GND
GND
*0_4
1
NGFF_SSD
76
77
M-KEY
PAD and HOLE

PAD1 PAD2 PAD3 PAD5 PAD6 HOLE1 HOLE2 HOLE3 HOLE4 HOLE6 HOLE7 HOLE23 HOLE24
*SPAD-ZAB-1NP *SPAD-ZAB-2NP *SPAD-RE157X488NP *SPAD-ZAB-3NP *SPAD-C298NP *HG-C354D134P2 *HG-C354D134P2 *HG-C354D134P2 *HG-C354D134P2 *HG-TC354IC236BC236D118P2 *HG-TC354IC236BC236D118P2 *HG-C315D134P2 *HG-C315D134P2
7 6 7 6 7 6 7 6 7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4 9 4 9 4 9 4
1
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
PAD7 PAD8 PAD9 PAD10 PAD11
A *SPAD-RE157X491NP *SPAD-C298NP *SPAD-C276NP *SPAD-RE157X1267NP *SPAD-RE531X205NP HOLE8 HOLE9 HOLE10 HOLE11 HOLE12 HOLE13 HOLE14 HOLE15 HOLE16 A
EV@H-C236I156D140P2 EV@H-C236D140P2 *H-TC236IC236BC256D161P2 *H-TC236IC236BC256D161P2 *H-TC236IC236BC256D161P2 H-C256D161P2 H-C256D161P2 H-C256D161P2 H-TC217BC197D126P2
Dr-Bios.com
1
1
PAD12 PAD13 PAD14 PAD15 HOLE17 HOLE18 HOLE19 HOLE20 HOLE21 HOLE22 HOLE26
*SPAD-RE157X315NP *SPAD-RE157X1282NP *SPAD-C197NP *SPAD-ZAA-1-NP *H-ZAB-2 *H-ZAB-2 *H-ZAB-5 *H-C87D87N *H-O146X87D146X87N *O-ZAA-1 *H-C217D217N

PROJECT : ZAA
1

1A
Mini-Card/WL/3G/SIM
5 4 3 2 1
5 4 3 2 1
For 17"
TOUCHPAD BOARD CONN (TPD I2C/PS2 co-lay) 1C-2 2014/01/13 Change TP power rail from +3V_S51C-4 2014/01/15 reserve TP power rail +3V_S5.
KEYBOARD (KBC) <EMI> CN2019
1 MX0
to +3V_SUS.
R752 0_6 1C1-1 2014/02/17 Add Q47 for PTP
CN20 2 MX1 power EN and soft up R694\C713.
1 MX0 MX4 C4793 *220p/50V_4 3 MX2 TPD->100kHz,TS=400Khz R402 *short_4 *AO3413 and C712\C686.
MX0 30 +3V_S5
2 MX1 MX5 C4794 *220p/50V_4 4 MX3 Intel design guide suggestion +3V_S5 L19 *short_6 1 3
MX1 30
3 MX2 MX6 C4795 *220p/50V_4 5 MX4 MCP PIN 10u.
MX2 30 +
4 MX3 MX7 C4796 *220p/50V_4 6 MX5 Per inch 3u TS=3x5inch C781 Q42 C790 C783
MX3 30
5 MX4 MY3 C4797 *220p/50V_4 7 MX6 400kHz10~100u =2.4~0.4k. R416 R415
MX4 30
2
6 MX5 MY2 C4798 *220p/50V_4 8 MX7 0.1u/16V_4 0.22u/25V_6 0.1u/16V_4
7 MX6
MX5 30
MY1 C4799 *220p/50V_4 9 MY17
100Khz 10~100u=9k~1k. 10K_4 10K_4
MX6 30
8 MX7 MY0 C4800 *220p/50V_4 10 MY16 R754 *0_4 C786 *1000p/50V_4 50mil CN17
MX7 30 30 PTP_PWR_EN#
9 MY17 MY7 C4801 *220p/50V_4 11 MY15 +TPVDD 8
D MY17 30 TPCLK_R D
10 MY16 MY6 C4802 *220p/50V_4 12 MY14 R411 *short_4 7
MY16 30 30 TPCLK TPDATA_R
MY15 30 30 TPDATA
12 MY14 MY4 C4804 *220p/50V_4 14 MY12 5
MY14 30 I2C_TP_SDA_R
13 MY13 MY11 C4805 *220p/50V_4 15 MY11 +TPVDD 4
MY13 30 I2C_TP_SCL_R
MY12 30 TPD_INT#
15 MY11 MY9 C4807 *220p/50V_4 17 MY9 2 9
MY11 30 *2N7002DW TPD_EN
16 MY10 MY8 C4808 *220p/50V_4 18 MY8 *2.2K_4 R409 C787 C788 1 10
MY10 30
17 MY9 MX0 C4809 *220p/50V_4 19 MY7 *0.1u/16V_4 *0.1u/16V_4
18
19
MY8
MY7
MY9
MY8
30
30
MX1
MX2
C4810
C4811
*220p/50V_4
*220p/50V_4
20
21
MY6
MY5
S5 1 6 S5 *2.2K_4 R410 TP_CONN
MY7 30 I2C_TP_SDA_R
20 MY6 MX3 C4812 *220p/50V_4 22 MY4 4 I2C0_SDA 2
MY6 30 I2C_TP_SCL_R
21 MY5 MY15 C4813 *220p/50V_4 23 MY3 4 I2C0_SCL
MY5 30 30 TPD_EN
22 MY4 MY14 C4814 *220p/50V_4 24 MY2
MY4 30
23 MY3 MY13 C4816 *220p/50V_4 25 MY1 4 3
MY3 30
24 MY2
MY2 30
MY12 C4815 *220p/50V_4 26 MY0
4,30 TPD_INT#
1A-5 2013/10/18 Change CN21 Pin8 for
25 MY1 27 5 I2C/PS2 TPD idendify.
MY1 30
26 MY0 28
MY0 30 Q43
27 R11107 FOR17@33_4
NBSWON# 2013/10/29 Change CN21 power rail to S5
28 29 R403 *short_4 change Q42 direction and net name,
R776 FOR15@33_4 NBSWON#
NBSWON# 11,30
30 +3V_S5 1A-12 reseve PS2 PU to +3V.
29
30 +3VPCU FOR17@KB_CONN
+3VPCU 6,9,11,22,24,25,26,27,30,31,32,39,40,41
1
+3V_S5 2,3,4,6,7,8,9,11,20,24,26,27,30,32,34,35,40
1
FOR15@KB_CONN C805
D34
*FOR15@VPORT_6
180P/50V_4 RP1
10
10K_10P8R
1 MX3 D4002
CPU FAN (THM) +5V
+3V
21,22,23,25,26,32,39
2,4,6,7,8,9,12,13,14,16,21,22,23,24,25,26,27,30,32,33,34,35,36,39,40,41
Prevent ESD/EOS MX4 9 2 MX0 *FOR17@VPORT_6 Prevent ESD/EOS
2
For 15" Layout near MX6 8 3 MX2 Layout near
2
MX5 7 4 MX1
device device
C MX7 6 5 C
+3V
+3V
KB_BL LED (KBC) R609
R218 +5V 10K_4

*10K_4
+5V +5V
30 FAN1_RPM
2
C187 [email protected]/6.3V_6 C321
R148 2.2U_6
1
U12 30mils CN8
1
BL@10K_4 Q18 2 3 TH_FAN_POWER
VIN VO 5 1 4
BL@AO3413
2 1 GND 6 2
7 SMB1ALERT# /FON GND 3 5
2
7 C723 C728 C719
4 GND 8 FAN_3P
30 FAN1_DAC VSET GND
3
2.2U_6 0.01U/50V_4*0.01U/50V_4
20mil 20mil
1
BL@KB_backlight G991P11U
3
2 +5V_KB R119 *short_4

30 KB_BL_LED 4
Q19 C169 C170 3 6
BL@DTC144EU 2 5 FANPWR = 1.6*VSET
1
[email protected]/10V_6 [email protected]/50V_4 1
CN6
B B
R436 *1M_4 +3VPCU Blue 47 ohm CS04702FB16 -> 2/16 Rev D.

POWER LED(UIF) R426 *1M_4 +3V Amber 124 ohm CS11242FB10 -> 2/16 Rev D.
R427 *1M_4 +3VPCU
G-sensor(ACS) D26 1 2 *5.5V/25V/410P_4
+G_SEN_PW
Power LED Blue
+3V R318 *short_6 LED1
R432 47/F_4 2 3 R438 *short_4 +3VPCU
30 PWRLED#
U19
C428 C412 1 2 R433 124/F_4 1
Vdd_IO NC 30 SUSLED# +3VPCU
*[email protected]/16V_4 14 3 R440 *0_4 +3V_S5
*GS@10u/6.3V_6 VDD NC LED_AMBER/BLUE
Rev:D change Amber
1 2
D27 *5.5V/25V/410P_4 C555
10 39P/50V_4
*GS@RB500V-40 D8 ACCEL_INTA_R 11 RESERVED 15
to CPU 4 ACCEL_INTA ACCEL_INT2_R INT1 RESERVED
to SATA HDD *GS@RB500V-40 D35 9 R428 *1M_4 +3VPCU
26 ACCEL_INT2 INT2
R337 *short_4 7 R429 *1M_4 for ESD
CLK_SDATA R336 *short_4 G_MBDATA_R 6 SA0 5
7,12,13,21
7,12,13,21
CLK_SDATA
CLK_SCLK
CLK_SCLK R329 *short_4 G_MBCLK_R 4 SDA
SCL
GND
GND
12 Battery D24 1 2 *5.5V/25V/410P_4
13
A
ACCEL_INTA +G_SEN_PW 8 GND 16 Blue
LED2
A
+G_SEN_PW CS GND R430 47/F_4 2 3 R437 *short_4 +3VPCU
G_MBDATA_R 30 BATLED0#
C454 *GS@33P/50V_4
*GS@LIS3DHTR R431 124/F_4 1
G_MBCLK_R 30 BATLED1#
C425 C431 *GS@33P/50V_4 R439 *0_4 +3V_S5
*GS@22P/50V_4 LED_AMBER/BLUE
+G_SEN_PW R334 *[email protected]_4 G_MBDATA_R

Rev:D change Amber
1 2
G_MBCLK_R D25 *5.5V/25V/410P_4
R333 *[email protected]_4
PROJECT : ZAA
KB/TP/FAN 1A

5 4 3 2 1
Dr-Bios.com
5 4 3 2 1
USB Charger to 3.0 (UBC) USBPWR0
+5VPCU
80 mils (Iout=2A)
U22 CTL1 CTL2 CTL3 ILIM_SEL
1 12 80 mils (Iout=2A)
IN OUT 15 ILIM_LO (RILIM_LO 1.2A)
C483 ILIM_LO
ILIM_HI
16 ILIM_HI (RILIM_HI 2.3A) SDP 1 1 1 0
+
1U/10V_4 17 C497 C496
GND_PAD C487
9
STATUS GND_PAD
14
18
R377 R376
39K/F_4
100u/6.3V_1206
470P/50V_4 0.1u/16V_4 CDP 1 1 1 1
GND_PAD 20K/F_4
13 19
6 USB_OC0# 4 FAULT GND_PAD 20
30 USB_BC_ON ILIM_SEL GND_PAD 21 DCP 0 1 1 X
GND_PAD 22
5 GND_PAD iPAD charging current is about 2.1A so set on 2.3A
D 30 USB_CHARGE_ON EN USBP0-_C 1.2A current limit of USB 3.0 SDP mode D
R364 100K_4 11
6 DM_IN 10 USBP0+_C
30 USB_CLT1 CTL1 DP_IN
+5VPCU R360 10K_4 CTL2 7 2
8 CTL2 DM_OUT 3 USBP0- 6
R356 10K_4 CTL3
CTL3 DP_OUT USBP0+ 6
TPS2544RTER RILIM_LO is optional and the ILIM_LO pin may be left unconnected if the following conditions are met:
1. ILIM_SEL is always set high
2. Load Detection - Port Power Management is not used
TI:AL002544001(TPS2544) 3. Mouse / Keyboard wake function is not used
If conditions 1 and 2 are met but the mouse / keyboard wake function is also desired, it is recommended to use
Silergy: AL055544000 (SLGC55544VTR) RILIM_LO < 80.6 kΩ.
The following equation programs the typical current limit:
+5VPCU 32,33,39,41 (1) IOS_typ(mA) = 50,250/{RILIM_XX(KΩ)+0.1}
+5V_S5 32,35,36,37,38,40 RILIM_XX corresponds to either RILIM_HI or RILIM_LO as appropriate.
+3V 2,4,6,7,8,9,12,13,14,16,21,22,23,24,25,26,27,28,30,32,33,34,35,36,39,40,41
USB 3.0 Connector (UB3)

USBP0-_C R385 *short_4 USBP0-_R
USBP0+_C R386 *short_4 USBP0+_R
+5V_S5 USBPWR0
CN16 USBPWR0
USB3.0 CONN
1 U24
2 1 VBUS USB3_TXP0_R 1
C424 USBPWR1 2 D- I/O 1 USB3_TXN0_R
U20 C518 *1.6P/50V_4 3 10
1u/6.3V_4 4 3 D+ 2 I/O 6
Close USB3.0 4 GND VDD
5 1 R392 *short_4 USB3_RXN0_R 5 9
IN OUT 6 USB3_RXN0 USB3_RXP0_R 5 SSRX- GND_2
R387 *short_4 6 C502 3
2 6 USB3_RXP0 7 6 SSRX+ NC_1 8
0.1u/16V_4
GND C517 *1.6P/50V_4 8 7 GND USBP0-_R 4 NC_2
USBON# 4 3 C451 C450 C452 9 8 SSTX- I/O 2 7 USBP0+_R
30 USBON# /EN /OC 9 SSTX+ USB3_RXP0_R 5 I/O 5
470P/50V_4 0.1u/16V_4 100U/6.3V_1206
13
12
11
10
GND_1
I/O 3 6 USB3_RXN0_R
C C
G524B2T11U I/O 4
13
12
11
10
6 USB_OC1#
11
C499 0.1u/16V_4 USB3_TXN0_C R384 *short_4 USB3_TXN0_R
Enable: Low Active /2.5A 6 USB3_TXN0
C498 0.1u/16V_4 USB3_TXP0_C R381 *short_4 USB3_TXP0_R
BCD:AL002822000 6 USB3_TXP0
USB30_ESD_AZ1065-06F.R7G
GMT:AL000524007
C511 C505 USB protection diodes for ESD.
*1.6P/50V_4 *1.6P/50V_4
as close as possible to USB connector pins.
R342 *short_4 USBP1-_R

6 USBP1- USBP1+_R
R348 *short_4
6 USBP1+ USBPWR1
USBPWR1
CN13 U21
USB3.0 CONN USB3_TXN1_R 1
1 I/O 1 10 USB3_TXP1_R
+5V_S5 1 VBUS I/O 6
2 2
2 D- VDD
USB2.0 DB (UB2)
C475 *1.6P/50V_4 3 9
4 3 D+ C462 3 GND_2
R355 *short_4 USB3_RXN1_R 5 4 GND 0.1u/16V_4 NC_1 8
6 USB3_RXN1 USB3_RXP1_R 6 5 SSRX- USBP1-_R 4 NC_2
R353 *short_4
C4714 USBPWRD2 6 USB3_RXP1 6 SSRX+ I/O 2 USBP1+_R
U4511 7 7
1u/6.3V_4 C469 *1.6P/50V_4 8 7 GND USB3_RXP1_R 5 I/O 5
Close USB3.0
GND_1
5 1 9 8 SSTX- I/O 3 6 USB3_RXN1_R
IN OUT 9 SSTX+ I/O 4
13
12
11
10
2
GND
13
12
11
10
11
USBON# 4 3 C4713 C4715 C4712
/EN /OC 470P/50V_4 0.1u/16V_4 100U/6.3V_1206
USB30_ESD_AZ1065-06F.R7G
G524B2T11U C461 0.1u/16V_4 USB3_TXN1_C R341 *short_4 USB3_TXN1_R
6 USB3_TXN1 USB3_TXP1_C USB3_TXP1_R
6 USB_OC2# 6 USB3_TXP1
C459 0.1u/16V_4 R340 *short_4 USB protection diodes for ESD.
Enable: Low Active /2.5A as close as possible to USB connector pins.
B B
C460 C458
BCD:AL002822000 *1.6P/50V_4 *1.6P/50V_4
GMT:AL000524007
USBPWRD2
CN2020
1 C4711
2 47u/6.3V_8
3
4
5
6
7
8 USBP2+ 6
USBP2- 6
9
10
11
USBP3+ 6
12 For 17" DB use
13 USBP3- 6
14
HP_JD# 25
15
16
17
18 SLEEVE_R 25
19
20
21 RING2_R 25
A 22 A
23
HP-L3 25
24
Dr-Bios.com
27 25
28 26 HP-R3 25
DB_CONN
ADOGND

PROJECT : ZAA
1A
USB3/Charger/CR/USB2 DB
5 4 3 2 1
5 4 3 2 1
11/11 FAE suggestion pin106
+3V_RTC change to +3VPCU_EC
EC(KBC) +3V_LDO_EC
L12 +A3VPCU
BLM15AG121SN1D(120,500MA)_4 +3VPCU_ECPLL L22 +3VPCU_EC
C495 BLM15AG121SN1D(120,500MA)_4
0.1u/16V_4 C772 VSTBY_FSPI R11118 0_4 NBSWON# R730 10K_4
VSTBY_FSPI
(For PLL Power) +3V_S5
ECAGND 0.1u/16V_4 R11119 *0_4 S5_ON R741 10K_4
+3V_LDO_EC
R747 2.2_6 12 mils
1 2 +3VPCU_EC SB_ACDC 8
+3V_LDO_EC BT_EN POA_EN# 26
BT_EN 27
C514 C771 C770 C777 C780 C508 +3V_GFX
+3VPCU_EC and +3V_RTC POA_PWR_INT# 26
0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4
minimum trace width 12mils. POA_POWERREQ 26 DGPU_OTP# R740 EV@10K_4
EC_TypeC_CHG_HI 20 Prevent ESD/EOS Layout near device
+3V_EC DGPU_OPP# R382 EV@10K_4
USBON# 29
R361 *2.2_6 R190 33_4
1 2 +3V_EC TPD_EN 28
D +3V USB_BC_ON 29 D
+3V_S5 1 2
USB_CHARGE_ON 29
R779 2.2_6 C482 C796
CLKRUN# 7,26
180P/50V_4
7,26,27 LPC_LAD0
0.1u/16V_4 MAINON R389 100K_4
7,26,27 LPC_LAD1
114
121
106
127
11
26
50
92
74
84
83
82
19
20
99
98
97
96
93
7,26,27 LPC_LAD2
3
U45 SUSON R739 100K_4
7,26,27 LPC_LAD3 10 110 MBCLK
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY(PLL)
EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1
L80HLAT/BAO/GPE0
L80LLAT/GPE7
GPH7
ID6/GPH6
ID5/GPH5
ID4/GPH4
ID3/GPH3
CLKRUN#/ID0/GPH0
VCC
VSTBY_FSPI
AVCC
9 LAD0/GPM0(3) SMCLK0/GPB3 111 MBCLK 31
C822 180P/50V_4 MBDATA VRON R463 100K_4
8 LAD1/GPM1(3) SMDAT0/GPB4 115 2ND_MBCLK MBDATA 31
+3V_LDO_EC LAD2/GPM2(3) SM BUS SMCLK1/GPC1 2ND_MBDATA 2ND_MBCLK 7,17 PCH_SPI_SI_EC R735
7 116 *10K_4
PLTRST#_EC LAD3/GPM3(3) SMDAT1/GPC2 EC_PECR_R 2ND_MBDATA 7,17
R749 *short_4 22 117 R738 43_4
8,14,24,26,27 PLTRST# LPCRST#/GPD2 PECI/SMCLK2/GPF6(3) H_PECI 2 PCH_SPI_SO_EC R736
13 118 R460 33_4 *10K_4
7 CLK_PCI_EC 6 LPCCLK/GPM4(3) SMDAT2/PECIRQT#/GPF7(3) LID# 22
7,26,27 LPC_LFRAME# LFRAME#/GPM5(3) C801 180P/50V_4
PROCHOT_EC 17
LPCPD#/GPE6
2
EC52 AZ5725-01F Prevent ESD/EOS Layout near device

D12 SIO_A20GATE 126 PS/2
R368 SDMK0340L-7-F
7,26
TP77
IRQ_SERIRQ
5
15
GA20/GPB5(3)
SERIRQ/GPM6(3) PS2CLK0/CEC/TMB0/GPF0
85
86 IOAC_RST# 24,27
SM BUS PU(KBC)
100K_4
8 PCH_SUSPWRACK ECSMI#/GPD4(3) LPC PS2DAT0/TMB1/GPF1 EC_FPBACK# 22
23 89
2 SIO_EXT_SCI# TPCLK 28
1
WRST# 14 ECSCI#/GPD3 PS2CLK2/GPF4 90

WRST# GPIO PS2DAT2/GPF5 TPDATA 28 +3V_LDO_EC
4
7 SIO_RCIN# KBRST#/GPB6(3)
16
C491
1u/6.3V_4
27 IOAC_WLAN_WAKE# PWUREQ#/BBO/SMCLK2ALT/GPC7(3)
IT8987E/CX PWM0/GPA0
24
25
PWRLED# 28
Battery module
MBCLK
MBDATA
R731
R732
4.7K_4
4.7K_4
LQFP
PWM1/GPA1 28 BATLED1# 28
SUSLED#
PWM2/GPA2 SUSLED# 28
113 29
28 KB_BL_LED CRX0/GPC0 PWM3/GPA3 BATLED0# 28
123 CIR 30 +3V_S5
8 DNBSWON# CTX0/TMA0/GPB2(3) PWM4/GPA4 31 MAINON 8,26
TS_EN_C PWM5/GPA5 USB_CLT1 29
R751 33_4
22 TS_EN 2ND_MBCLK
EC_TypeC_EN
PWM 2ND_MBDATA
R733 2.2K_4
80 UMA& VGA SKU R734 2.2K_4
C800 180P/50V_4 119 DAC4/DCD0#/GPJ4(3) 47
8,11,32 SUSB#
33 DSR0#/GPG6 TACH0A/GPD6(3) 48
FAN1_RPM 28 Need Stuff
Prevent ESD/EOS Layout near device 8 EC_PWROK GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7(3) POA_AUTH_ERR 26
88
22 PCH_BLON_R 81 PS2DAT1/RTS0#/GPF3 120
28 FAN1_DAC 87 DAC5/RIG0#/GPJ5(3) TMRI0/GPC4(3) 124 SUSON 8
C
24 IOAC_LAN_WAKE# 109 PS2CLK1/DTR0#/GPF2 TMRI1/GPC6(3) DGPU_OTP# 17 C
4 ME_WR# TXD/SOUT0/GPB1
108
25 AMP_MUTE# RXD/SIN0/GPB0
71 107 NBSWON#
26 ODD_POWER 72 ADC5/DCD1#/GPI5(3) PWRSW/GPE4 18 NBSWON# 11,28
31 ACIN ADC6/DSR1#/GPI6(3) UART port RI1#/GPD0(3) SUSC# 8,11
73 WAKE UP 21 HWPG
31 TEMP_MBAT# ADC7/CTS1#/GPI7(3) RI2#/GPD1 HWPG 8 H_PROCHOT# 2,31,36
35
27 WLANPWR# RTS1#/GPE5
3
34
25 PCBEEP_EC 122 PWM7/RIG1#/GPA7 112 Q30
35 DDR4_SUSON_2V5 +1V_S5_ON 95 DTR1#/SBUSY/GPG1/ID7 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 RSMRST# 8
Prevent ESD/EOS Layout near device 33 +1V_S5_ON CTX1/SOUT1/GPH2/SMDAT3/ID2
R746 33_4 EC_ODD_EJ#_R 94 Prevent ESD/EOS Layout near device PROCHOT_EC 2
26 EC_ODD_EJ# CRX1/SIN1/SMCLK3/GPH1/ID1
PCH_SPI_CLK_EC 105 R774 33_4
7 PCH_SPI_CLK_EC 101 FSCK/GPG7 RF_EN 27
C799 180P/50V_4 R380 2N7002K
7 SPI_CS0#_UR_ME FSCE#/GPG3
102 EXTERNAL SERIAL FLASH ICMNT
7 PCH_SPI_SI_EC ICMNT 31
1
103 FMOSI/GPG4 66 C798 100K_4
7 PCH_SPI_SO_EC FMISO/GPG5 ADC0/GPI0(3) 67 C516 10u/6.3V_6 ECAGND 180P/50V_4
CLK_PCI_EC 56 ADC1/GPI1(3) 68
28 MY16 57 KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) 69 DGPU_OPP# 17
28 MY17 TS_EN_C KSO17/SMISO/GPC5(3) ADC3/GPI3(3) VRON 8
32 70
PWM6/SSCK/GPA6 ADC4/GPI4(3) LANPWR# 24
S5_ON 100
R373
32,39 S5_ON SSCE0#/GPG2 A/D D/A
125 SPI ENABLE
28 PTP_PWR_EN# SSCE1#/GPG0 76
*22_4
36 TACH2/GPJ0(3) 77 SYS_HWPG POA_FP_PWREN# 26
28 MY0 KSO0/PD0 GPJ1(3)
37 78
28 MY1 KSO1/PD1 DAC2/TACH0B/GPJ2(3) PCH_PWROK 8
38 79
28 MY2 KSO2/PD2 DAC3/TACH1B/GPJ3(3) CLR_CMOS 6
C490 39
28 MY3 40 KSO3/PD3 +3V
*10p/50V_4
PCH_SPI_CLK_EC 28
28
MY4
MY5
41 KSO4/PD4
KSO5/PD5
HWPG(KBC)
28 MY6
42
KSO6/PD6 KBMX DDR=1.5V, D1 DNP and D2 POP
43
28 MY7
44 KSO7/PD7 DDR=1.35V, D1 POP and D2 DNP R374
28 MY8 45 KSO8/ACK# 10K_4
28 MY9 KSO9/BUSY
C4726 46
28 MY10 KSO10/PE
*22p/50V_4 51 2 D18 RB500V-40 HWPG
28 MY11 KSO11/ERR# GPJ7 SYS_SHDN# 2,32,39 39 HWPG_1.5V
KSI3/SLIN#
52 128
KSI1/AFD#
CLOCK R349 33_4

KSI0/STB#
KSI2/INIT#
28 MY12 KSO12/SLCT GPJ6 TPD_INT# 4,28

EMI 53 D11 *RB500V-40
VCORE
28 MY13 54 KSO13 39 HWPG_1.8VS5

AVSS
Prevent ESD/EOS Layout near device

KSI4
KSI5
KSI6
KSI7
28 MY14 KSO14
VSS
VSS
VSS
VSS
VSS
B 55 C797 D20 *RB500V-40 B

28 MY15 KSO15 35 HWPG_VDDR
180P/50V_4
IT8987/CX SM BUS ARRANGEMENT TABLE D17 *RB500V-40
33 HWPG_1VS5
58
59
60
61
62
63
64
65
27
49
91
104
ECAGND 75
12
SM Bus 1 Battery D4012 *RB500V-40

32 SYS_HWPG
28 MX0
C778 D14 *RB500V-40
Output for type-c Apling ridge
28 MX1 AJ089870F02 IT8987E/CX SM Bus 2 PCH/VGA
34 HWPG_+VCCOPC
28 MX2
R782
reset timming"Low " Active 0.1u/16V_4 D4001 *RB500V-40

28 MX3 35 HWPG_2.5V
*0_4 R783
*0_4 R784
*0_4 R785
EC_GND
EC_TypeC_EN 28 MX4
R11153 *short_4 SM Bus 3
EC_TypeC_EN_R 20 28 MX5
L11
28 MX6
*short_4
28 MX7
BLM15AG121SN1D(120,500MA)_4 SM Bus 4
Rev:D Add
Reset SW (FSW)
R756 *0_4 +3V_RTC
+3V_LDO_EC Reserve switch for test R757 *0_4
(MP remove) +3VPCU Reserve no stuff
+3V_RTC R717
SW4
*10K_4
R753
*10K_4 31 BI BI 2 3 WRST#
1
1 4
SW2 R719
C764
*POWER_SW 100K_4
*0.1u/16V_4
3
Battery Detect Switch

NBSWON# 1 3
2 4 R11282 *0_4 Vgs = 1.5V
2
C785 2 BI_GATE
A A
5
*0.1u/16V_4
Vgs = 1.5V
SW1
1
PJA138K C765
3
4
Dr-Bios.com
BI_SW
1
Q40 *0.1u/25V_6 6
2
Q56
5 *PJ4N3KDW
4

1
2
PROJECT : ZAA
1A
KBC IT8587
5 4 3 2 1
5 4 3 2 1
Double Check ADP-In Type
VA VA1 PQ22 VA2 PR213 PQ1

PD8 AON6414AL 0.01/F_0612 VIN AON6414AL
Power conn SV1040
1 3 3
4 3 5 2 1 2 5 2
3 2 1 1
2
1
P4SMAFJ20A
47n/50V_6
*0.01u/50V_4
24780_ACN
PC136
PR209 *short_4
0.1u/50V_6
4
PD3
PC1
PC13
PJ3 PC141 PC140
D 0.1u/50V_6 2200p/50V_6 D
PR210 *short_4 24780_ACP
2
PC128 PC124 PC133
0.1u/50V_6 2200p/50V_6 1n/50V_4
PR165 PR166
4.02K/F_4 4.02K/F_4
PR185
*short_6
24780_ACP
24780_ACN PR186 10/F_6
PC115 PC5 PC2

UMA-(GT2)> 45 W adapter PR342 CS31542FB14 15.4K 1/16W +-1% (0402) For 78W 0.1u/50V_6 0.1u/50V_6 0.1u/50V_6
24780_CMSRC
UMA-(GT3)> 65 W adapter PR342 CS31272FB17 12.7K 1/16W +-1% (0402) For 95W
Discrete > 65W adapter PR342 CS31272FB17 12.7K 1/16W +-1% (0402) For 95W
1
Discrete > 90W adapter PR342 CS31002FB26 10K 1/16W +-1% (0402) For 116W PR5 3 18 24780_BATDRV
ACN
ACP
20_1206 CMSRC BATDRV
17 24780_BATSRC VIN
BATSRC
C 24780_ACDRV 4 REGN6V C
PR168 ACDRV
REGN6V 866K/F_4 24780_VCC 28
VCC 24
PC116 REGN PC122
0.47u/25V_6 2.2u/10V_6 PC117 PC118
2200p/50V_6 10u/25V_8
PR1 PR3
100K/F_4 137K/F_4
5
24780_ACDET 6 25 24780_BST *short_6
ACDET BTST PR173 PC119
PR167 *short_4 5 47n/50V_6
30 ACIN ACOK
MBDATA PR177 *short_4 11 26 24780_DH 4
SDA HIDRV PQ20 PR169
PR4 MBCLK PR178 *short_4 12 AON7410 0.01/F_0612 BAT-V
100K/F_4 SCL PU5 PL1
3
2
1
ICMNT PR170 *short_4 7 BQ24780SRUYR 6.8uH_7X7X3
30 ICMNT IADP 27 24780_LX 1 2 BAT-V
D/C# PR171 *short_4 8 PHASE
TP4366 IDCHG
5
PMON PR172 *short_4 9
36 PMON PMON
100P/50V_4
100P/50V_4
*100P/50V_4
PC7
PC6
PC3
PR2
no stuff *4.7_6
PR342 23 24780_DL 4 PR176 PR175
[email protected]/F_4 LDODRV PQ21 *short_4 *short_4
AON7410
24780_BM# 16
+3VPCU
3
2
1
PR16 10K_4 TB_STAT PC130 24780_SRP PC121 PC120 PC127
PC126 24780_CMPOUT 14 0.1u/25V_4 PC4 2200p/50V_6 10U/25V_8 10U/25V_8
0.1u/50V_6 PR179 *10K_4 CMPOUT 20 PR183 *short_6 24780_SRP *680p/50V_6 24780_SRN
B 24780_ILIM 21 SRP B
ILIM PC131
24780_CMPIN
PROCHOT
PC125 PR14 13 0.1u/25V_4
BATPRES
*100p/50V_4 316K/F_4 CMPIN
19 PR184 *short_6 24780_SRN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PAD
SRN
BAT-V PC132
35
36
37
38
10
15
22
29
30
31
32
33
34
0.1u/25V_4
PR15 PR11
BI 30
100K/F_4 100K_4
PR10 *0_4
50458-00801-V01
9 8
7
*short_4
6 PR8 100_4 TEMP_MBAT#
5 TEMP_MBAT# 30 Power charger circuit reserve 2N7002 for GPU throtting
*0_4
4 PC123
3 0.01u/50V_4
2 +3VPCU GPU_THROTTING# 17
PR9 1M_4
10 1
TEMP_MBAT# PR12
PR13
3
PJ1
24780_CMPOUT 2
PR6 PR7 PQ40
100_4 100_4 *EV@2N7002K
REGN MAX voltage 6.5V
Double Check BATT-In Type
V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
1
H_PROCHOT#
MBCLK 30
H_PROCHOT# 2,30,36 =0.793V for 3.965A current limit
A A
MBDATA 30 PR174
ILIM=0.793V
*100K_4 Rsr = 0.01ohm
1
PC8 PC9
*47p/50V_4 *47p/50V_4
+VCCIO
2
PD1
PDZ5.6B
PD2
PDZ5.6B Check PU high with HW side PROJECT : ZAA
1A
Charger (BQ24780S)
5 4 3 2 1
Dr-Bios.com
5 4 3 2 1
30 SYS_HWPG
PR6130 *short_6
SYS_SHDN# +3VPCU VL 3V_LDO

2,30,39 SYS_SHDN#
PR6280
10K/F_4
VIN VIN
10u/6.3V_6
0.1u/25V_4
4.7u/6.3V_6
1
+
PC6212 PC6233 PC6232 PC6220 PC6218 PC6214 PC6216
33u/25V_6x4.5 10u/25V_8 10u/25V_8 10u/25V_8 2200p/50V_4 PR6278 PR6283 2200p/50V_4 10u/25V_8
2
*short_4 *short_4 PR6284
10K/F_4
PC6219
PC6100
51225_VIN
PC6098
+5VPCU
5
PQ6054 +3VPCU
D
PR6297 AON7410 +3VPCU D
+5VPCU 100K_4 3.3 Volt +/- 5%

5 Volt +/- 5% PQ6056
13
12
TDC : 6.58A
3
AON6978 4
TDC : 10A PEAK : 8.77A
VIN
VREG5
VREG3
2
PEAK : 13.4A 7 6 SYS_SHDN# OCP : 11A
D1
D1
D1
3
2
1
PGOOD EN2
OCP : 16A 51225_EN1 51225_DH2 Width : 280mil
20 10
Width : 400mil EN1 DRVH2 PR6286 PC6213
PL6013 G1 1 51225_DH1 16 9 51225_VBST2 PL6012
2.2uH_7X7X3 PC6215 PR6287 DRVH1 VBST2 2.2uH_7X7X3
51225_SW1 9 S1/D2 51225_VBST1 17 8 51225_SW2 1/F_6 0.1u/50V_6
VBST1 PU6010 SW2
0.1u/50V_6 1/F_6 51225_SW1 18 TPS51225RUKR 11 51225_DL2
SW1 DRVL2
5
G2 8
PR6281 51225_DL1 15 4 51225_FB2 PR6279
15.8K/F_4 DRVL1 VFB2 6.49K/F_4
51225_FB1 2 21 PR6289
S2
S2
S2
+ PR6288 VFB1 GND 4 *4.7_6 +
PC6227 PC6226 *4.7_6 14 22 PC6225 PC6224
5
6
7
VO1 GND
VCLK
220u/6.3V_6X4.2 0.1u/50V_6 0.1u/50V_6 220u/6.3V_6X4.2
GND
GND
GND
GND
CS1
CS2
PQ6053
3
2
1
AON7752 PC6222
PR6120 *680p/50V_6 PR6121
19
26
25
24
23
10K/F_4 PC6221 9.31K/F_4
*680p/50V_6
51225_CS1
51225_CS2
PR6125 *short_6
Rds(on)=14.5m ohm
113K/F_4
49.9K/F_4
OCP:11A
OCP:16A L(ripple current)
L(ripple current)
Rds(on)=4.9m ohm
=(9-3.3)*3.3/(2.2u*0.355M*9)
=(9-5)*5/(1u*0.3M*9) ~2.676A
=7.407A Iocp=11-(2.676/2)=9.662A
Iocp=18-(7.407/2)=12.296A
PR6124
PR6122
Vth=(9.662A*14.5mOhm)+1mV=141.099mV
Vth=(12.296A*4.9mOhm)+1mV=61.252mV R(Ilim)=(141.099mV*8)/10uA
C C
R(Ilim)=(61.252mV*8)/10uA =112.88K
~49K Power auto recovery
3V_LDO
+3V_LDO_EC
+3VPCU PR6296 *short_6
PR6295 *0_6
+5VPCU +5VPCU +3VPCU +3VPCU
TDC : 3.38A TDC : 3.6A TDC : 1.65A TDC : 3.15A

PEAK : 4.5A PEAK : 4.8A PEAK : 2.2A PEAK : 4.2A
Width : 140mil Width : 160mil Width : 80mil Width : 140mil
PC90 PC83 PC137 PC106
1u/25V_4 1u/25V_4 1u/25V_4 1u/25V_4
1
7
+5V_S5 +5V +3V_S5 +3V
VIN1
VIN1
VIN2
VIN2
VIN1
VIN1
VIN2
VIN2
13 8 13 8
14 VOUT1 OUT2 9 14 VOUT1 OUT2 9
VOUT1 OUT2 VOUT1 OUT2
+5V_S5 for PC97 PC85 PC91 PC105 PC173 PC108 PC114 PC174
10U/6.3V_6 0.1U/16V_4 11 0.1U/16V_4 10U/6.3V_6 10U/6.3V_6 0.1U/16V_4 11 0.1U/16V_4 10U/6.3V_6
USB2.0/3.0 Port PU11 GND PU10 GND
APL3523A 15 APL3523A 15
PR6282 *short_4 4 GND PR6292 *short_4 4 GND
+5VPCU VBIAS +5VPCU VBIAS
B PC88 PC111 B
0.1U/16V_4 0.1U/16V_4
S5_ON PR6285 *short_4 3 5 PR6291 *short_4 MAINON_R S5_ON PR6293 *short_4 3 5 PR6294 *short_4 MAINON_R
30,39 S5_ON ON1 ON2 ON1 ON2
CT1
CT2
CT1
CT2
MAINON_R 8,35,39
PC84 PC87 PC107 PC112

12
10
12
10
*0.1U/16V_4 *0.1U/16V_4 *0.1U/16V_4 *0.1U/16V_4
PC175 PC98 PC177 PC176

1000P/50V_4 1000P/50V_4 1000P/50V_4 1000P/50V_4
Soft-Start Soft-Start
+5VPCU
TDC : 3A
PEAK : 4A ZRW Rev:E Reserve only no stuff
Width : 120mil +5VPCU
PC185 B2A
TYPEC@1u/25V_4
S0->S5 & S0->S3
1
+5V_S5_V2 Power off sequence under 200us PR6290

VIN1
VIN1
VIN2
VIN2
SUSB# -> VCCIO *10K/F_4

13 8 MAIND
14 VOUT1 OUT2 9 MAIND 33,35,39
+5V_S5_V2 for VOUT1 OUT2
PD Charger PC208 PC189
TYPEC@10U/6.3V_6 [email protected]/16V_4 11
GND
3
PU20
TYPEC@APL3523A 15
PR6300 *short_4 4 GND
A +5VPCU VBIAS A
PC180 8,11,30 SUSB# 2 2
PQ6057 PQ6058
[email protected]/16V_4 *2N7002K *2N7002K
S5_ON PR6299 *short_4 3 5
Dr-Bios.com
1
ON1 ON2
CT1
CT2
PC214
12
10
PC210
TYPEC@1000P/50V_4

Soft-Start
PROJECT : ZAA
1A
)SYSTEM 5V/3V (RT6575AGQW)
5 4 3 2 1
5 4 3 2 1
PU15
VIN
33
8
IN
9
10u/25V_8
2200p/50V_6
*0.1U/25V_4
IN
PC269
PC237
PC238
7 22
+5VPCU PR88 NC IN
D
10_6 24 Fsw=550KHz
+1V_S5 D
IN
G5335-VCC-1 21
VCC 1.0 Volt +/- 5%
G5335QT2U PR97 PC271 TDC : 6.82A
+3V
PC243
10U/6.3V_6 6 G5335-TON-1
73.2K/F_4 *0.01U/25V_4
PEAK : 9.1A
TON
Width : 280mil
PR295 20 G5335-BST-1 +1V_S5
100K/F_4 BST
PR99 PC267
2.2_6 0.1U/25V_6 PL15
PR94 *short_4G5335-PWRGD-1 1 0.68uH_7X7X3
30 HWPG_1VS5 PGOOD 10 G5335-LX-1 1 2
+5VPCU LX 11
LX 16
PR93 *0_4 LX 17
22U/6.3V_6
22U/6.3V_6
22U/6.3V_6
22U/6.3V_6
22U/6.3V_6
0.1U/16V_4
*22U/6.3V_6
*22U/6.3V_6
LX 18
PC239
PC234
PC245
PC242
PC248
PC236
PC268
PC250
PR87 *short_4 G5335-PFM-1 3 LX 25
G5335-AGND-1 PFM LX R1
PR98
Pulse-Skipping mode *4.7_6
PR86 PC235
5.1K/F_4 *1000P/50V_4
PC270
PR83 *short_4 G5335-EN-1 2 *680p/50V_6
30 +1V_S5_ON EN 12
PGND
C PC272 13 C
*0.047U/10V_4 PGND
14
R2
PGND
G5335-AGND-1 15 PR92 Vo=0.8*(R1+R2)/R2
PGND
19
20K/F_4 =1V
G5335-SS-1 23 PGND
SS
4 G5335-AGND-1
AGND G5335-AGND-1
PC89
0.047U/10V_4
5 G5335-FB-1 VFB=0.8V
G5335-AGND-1 FB
PR82 *short_4
G5335-AGND-1
B B
VIN +1V_SUS VIN +1V_S5 +1V_S5
PR141 PR139 PR142
5
1M_6 22_8 1M_6
3
SUSD 2 PR4210 MAIND 4
32,35,39 MAIND
*0_6 PQ26
3
MDV1528Q
PQ23
3
2
1
2 AO3404
8,35 SUSON_R
1
2 2
+1V_SUS
PR140 PQ7 PQ8
+VCCIO
1
PQ6 1M_6 2N7002K 2N7002K

DTC144EU PC101
TDC : 0.18A
1
*2.2n/50V_4 PC6230
22u/6.3V_6 PEAK : 0.24A PC6231 TDC : 2.36A
Width : 20mil
*22u/6.3V_6 PEAK : 3.14A
ZRW Rev F Add Width : 100mil
A
ZRW Rev F Add A

PROJECT : ZAA
Dr-Bios.com
1A
+1V_S5 (G5335QT2U)
5 4 3 2 1
5 4 3 2 1
+3V_S5
PR292 +VCCOPC Power only for 2+3e CPU

*short_4
D D
+VCCOPC_3V3
PC230 +VCCOPC
GT3@1u/10V_4 TDC : 4.5A
PEAK : 6A
10
1
Width : 200mil
3V3
VIN VIN
GT3@10u/25V_8
GT3@10u/25V_8
GT3@2200P/50V_4
[email protected]/25V_4
PC99
PC228
PC100
PC229
9 +VCCOPC_VBST PC231 [email protected]/50V_6
BST PR291 *short_6
PL13
[email protected]_7X7X3
8 +VCCOPC_SW PR6306 *short_8
+VCCOPC_EN SW +VCCOPC
PR136 *short_4 5
8,36 VRON_R EN PR6307 *short_8
+3V_S5 +VCCOPC_MODE +VCCEOPIO
7 PU14 12 PR344 GT3@10/F_4
*GT3@100K/F_4
GT3@22uF/6.3V_6
GT3@22uF/6.3V_6
GT3@22uF/6.3V_6
MODE GT3@NB681GD-Z
VOUT
PR135
PC226
PC222
PC225
PC223
C
GT3@100K/F_4
C
PR289
R697 2 +VCCOPC_SRC 5
*GT3@10K_4 PGND
PR280 *short_4 PR288 *short_4 +VCCOPC_LP# 6 3 VCCOPC_VID1_C PR286 *short_4 VCCOPC_VID1

9 LPM_ZVM_N LP# C1
4 VCCOPC_VID0_C PR287 *short_4 VCCOPC_VID0
C0
AGND
PR290 *short_4 13
30 HWPG_+VCCOPC PG
+3V_S5
GT3@100K/F_4
11
PR293
PR294
*short_6
R705 R708
GT3@10K_4 *GT3@10K_4
+3V 681_AGND 5
B B
VCCOPC_VID0
VCCOPC_VID1
Mode VR Rail LP# C1 C0 Vo

R706 R707
*GT3@10K_4 GT3@10K_4
0 ohm VCCIO 0 X X 0V
Floating PRIMCORE 1 0 0 0.8V(MSM)
100K EDRAM/EOPIO 1 0 1 0.95V

VCCEDRAM
150K Other 1 1 0 1.0V
1 1 1 1.05V
A A
5 +VCCOPC
22,25,26,31,32,33,35,36,37,38,39,40,41 VIN
2,4,6,7,8,9,12,13,14,16,21,22,23,24,25,26,27,28,30,32,33,35,36,39,40,41 +3V PROJECT : ZAA
2,3,4,6,7,8,9,11,20,24,26,27,28,30,32,35,40 +3V_S5
1A
+VCCOPC (NB681GD-Z)
5 4 3 2 1
Dr-Bios.com
5 4 3 2 1
+3V
PR107
100K/F_4
PR267 *short_4 22,25,26,31,32,33,34,36,37,38,39,40,41 VIN

30 HWPG_VDDR
29,32,36,37,38,40 +5V_S5
12,13 DDR_VTTREF
PR263 *short_4 12,13 +VDDQ
8,33 SUSON_R
3,5,12,13 +1.2VSUS
PC203
D *0.1U/16V_4 Ilimit=9A D
+1.2VSUS
PR250 VIN
1.2 Volt +/- 5%
1P35V_PGOOD
PR257 *short_4 232K/F_4 Fsw=500KHz
8,32,39 MAINON_R
TDC : 5A
1P35V_CS
1P35V_S3
1P35V_S5
PC196 PR261 PEAK : 6.67A
*0.1U/16V_4 1P35V_TON OCP : 9A
10u/25V_8
10u/25V_8
2200P/50V_4
0.1U/25V_4
0.1U/25V_4
Width : 200mil
PC285
PC213
PC181
PC286
PC283
499K/F_4
10
13
7
9
TDC : 0.45A
5
PQ24 +1.2VSUS
CS
PGOOD
TON
S3
S5
PEAK : 0.6A DDR_VTTREF AON7410
Width : 20mil 20
VTT 17 1P35V_UGATE 4
2 UGATE
PC207 VTTSNS PC202
10U/6.3V_6 18 1P35V_BOOT PR251
TDC : 0.38A BOOT1
3
2
1
1 2.2_6 PL11
VTTGND
PEAK : 0.5A +VDDQ
PU21 16 1P35V_PHASE
0.1u/50V_6 1uH_7X7X3
Width : 20mil PHASE
*330u/2.5V_6X4.2
RT8231BGQW
PR269
5
4 15 1P35V_LGATE
0.1U/16V_4
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
VTTREF LGATE
PC215
PC194
PC219
PC216
PC205
PC284
100/F_4 +
19 12 1P35V_VDD PR90 PR254
VLDOIN VDD +5V_S5
PC212 PC218 PR274 *short_4 *4.7_6 *short_4
*10U/6.3V_6
PC198
0.1U/16V_4 0.033U/10V_4 4
PC217
PGND
VDDQ
1U/6.3V_4 PQ25 PC197
GND
PAD
3
2
1
VID
AON7752 *680p/50V_6
FB
+1.2VSUS
C C
11
14
21
1P35V_S3 PR6303 *0_4 1P35V_S5
1P35V_VID
1P35V_FB
PR281 *short_4
Rds(on)=14.5mohm
PR6302 *0_4 1P35V_S3
3 DDR_VTTT_PG_CTRL 1P35V_VDDQ
+5V_S5
PR264 *short_4
PR258
PR265 *0_4
7.87K/F_4
VID Ref. Voltage PR266

10K/F_4
High 0.675V
Low 0.75V
S3 S5 VDDQ VTTREF VTT
OCP=9A
L ripple current S0 1 1 ON ON ON
=(19-1.2)*1.2/(1u*500k*19)
=2.248A S3 (mainon off) 0 1 ON ON OFF
Vtrip=9-(2.248/2)*14.5mohm DDR=1.2V
=114.202mV PR255=7.87K/F_4
S4/S5 0 0 OFF OFF OFF
Rlimit=114.202mV/5uA*10=228.4Kohm PR240=10K/F_4
B B
+2.5VSUS Power Rail For DDR4 10/26 Reserve +2.5V for DDR4 VDDSPD
+2.5V_SUS
+2.5V_SUS
+2.5V_SUS 12,13
2.5Volt +/- 5%
+3V_S5 PR285 *short_6 TDC : 0.91A
+3V
PEAK : 1.21A
3
PC244
4.7U/6.3V_6
Width : 40mil
Check PU high with HW PR314 2
+2.5V_SUS 32,33,39 MAIND
100K/F_4
PQ6065
4
PU16 *AO3404
VIN
PL17
1
30 HWPG_2.5V PR306 *short_4 5 3 G5719LX2.5V
PG LX 2.2uH/1.85A_2.5X2X1.2
+2.5V
PR273 *short_4
SUSON_R PR304 *0_4 PR271 10K_4 1 2
EN GND +2.5V 12,13,39
PC233 PC232 PC241
FB
10u/6.3V_6
PC240
*10u/6.3V_6
0.1U/16V_4
TDC : 0.16A
0.47uF/4V_4
PR307 *short_4 G5719CTB1U

30 DDR4_SUSON_2V5
6
R1 PEAK : 0.21A
PR278 Width : 20mil
47.5K/F_4
PR302
A A
R2 15K/F_4
Vo=(0.6(R1+R2)/R2)
5
Dr-Bios.com
4 3 2
Size
Date:
Document Number

PROJECT : ZAA
DDR4_+1.2VSUS (RT8231BGQW)
1
Sheet 35 of 48
Rev
1A
5 4 3 2 1
ZAAA 6L power solution table

Check PU high with HW GT2 : PC134 CH4104K9B03 0.1uF/25V GT3 : PC134 CH4152K9B02 0.15uF/10V
GT2 : PR6301 CS00002JB38 0 ohm GT3 : PR6301 Unstuff
+1V_VCCST
SVID near PU1 GT2 : PR194 CS21912FB13 1.94K GT3 : PR194 CS22552FB01 2.55K
+5V_S5
GT2 : PR207 CS41622FB11 162K GT3 : PR207 CS41402FB14 140K
1000P/50V_4
PC6228
PR198 [email protected]/F_4
ZRW REV:F add 1000p PR341 PR340 VIN
45.3/F_4 100/F_4 GT2 : PR192 CS12672FB02 267 GT3 : PR192 CS13402FB00 340
IMVP8 Vcore Controller
1/F_6
D
PC22 330P/50V_4 PR40 10_4 ISL95857_SDA PR212
GT2 : PR203 CS37872FB15 78.7K GT3 : PR203 CS38872FB18 88.7K D
Close to 5 H_CPU_SVIDDAT
VCCGT MOS *short_8 GT2 : PR198 CS38872FB18 88.7K GT3 : PR198 CS39312FB15 93.1K
5 VR_SVID_ALERT#_VCORE
PR227
PR225 13.7K/F_4 PR35 49.9/F_4 ISL95857_SCLK
PR204
470K_4_4700NTC
5 H_CPU_SVIDCLK
GT2 : PR19 Unstuff GT3 : PR18, PR19, PR188 CS41003F932 100K

（1 phase）
Rail A（）：VCORE
PR226 27.4K/F_4 GT2 : PC17 Unstuff GT3 : PC17 CH3224K1B01 0.022U/25V
PC21 33P/50V_4
+3V +VCCIO
GT2 : PC18 Unstuff GT3 : PC18 CH3224K1B01 0.022U/25V
（2 phase）
Rail B（）：VCCGT
PC129 PR195
（1 phase）
Rail C（）：VCCSA
PR197
PR200
10K/F_4
*10K/F_4
PC40
3300P/50V_4 3K/F_4 PR48
PR32 ISL95857_VR_HOT
2,30,31 H_PROCHOT#
*short_4
2K/F_4
0.1u/25V_4
0.1u/25V_4
63.4K/F_4
PR30 ISL95857_VR_READY 2200p/50V_4 1K/F_4
PR24
PR23
PR206
PR203
PC35
PC32
1K/F_4
ISL95857_PROG1
ISL95857_PROG2
2 IMVP_PWRGD
*short_4
ISL95857_VCC
+VCCGT
ISL95857_VIN
Close to
PR220
PR194
ISL95857_VR_EN
VCCSA Choke
PR28 *short_4 ISUMN_C 38
8,34 VRON_R
PC11
220p/50V_4
470P/50V_4
PR187 475/F_4
PC16
PC15
*10_4
PR196
no stuff
*10K/F_4
*0.01U/50V_4 PR242
31 PMON
40
39
38
37
36
35
34
33
32
31
10K/F_4_3435NTC
1
0.1u/25V_4
0.015u/50V_4
VCC
VIN
VR_HOT#
ALERT#
PROG1
PROG2
VR_ENABLE
VR_READY
SCLK
SDA
2
PR25 +3V
PC43
PC39
5 VCCGT_SENSE PR191 *short_4 PC38 PR219
PC12
*short_4
Rail C 0.047U/10V_4 11K/F_4
1
5 VSSGT_SENSE PR181 *short_4 *0.01U/50V_4
2
ISL95857_PSYS 1 30 ISL95857_PWM_C PR47 *short_4 PR218
PSYS PWM_C PWM_C 38
C 2.61K/F_4 C
ISL95857_IMON_B 2 29 ISL95857_FCCM_C PR46 *short_4
IMON_B FCCM_C FCCM_C 38
2
ISL95857_NTC_B 3 28 ISL95857_ISUMN_C
NTC_B ISUMN_C
PC10 ISL95857_COMP_B
no stuff PR180 4 27 ISUMP_C 38
*10_4 COMP_B ISUMP_C
ISL95857_FB_B
PU1 ISL95857_RTN_C
5 26
1u/6.3V_4 FB_B RTN_C
ISL95857_RTN_B
ISL95859HRTZ-T ISL95857_FB_C
6 25
RTN_B FB_C
7 24 ISL95857_COMP_C
37 ISUMP_B ISUMP_B COMP_C
ISL95857_ISUMN_B 8 23 ISL95857_IMON_C
PR45
301/F_4
ISUMN_B IMON_C
PR216
2.49K/F_4
2.05K/F_4
9 22 ISL95857_PWM_A
330P/50V_4
33P/50V_4
*2K/F_4
ISEN1_B PWM_A
2
2.61K/F_4
10 21 ISL95857_FCCM_A +VCCSA
PR193
PR44
ISEN2_B FCCM_A
PC46
2
PR21 PC19
1000P/50V_4
ISUMN_A
0.022U/25V_4
ISUMP_A
PWM1_B
PWM2_B
COMP_A
FCCM_B
1
IMON_A
41
PR22
PC134
PC20
PR207
SP@162K_4
PC42
11K/F_4
NTC_A
RTN_A
1
EP PR51
FB_A
2200P/50V_4
1K/F_4 2200P/50V_4 Rail A *0.01U/50V_4 no stuff
*680P/50V_4
*10_4
2
PC36
PC37
PR217
1
PR241
PC41
PC139
11
12
13
14
15
16
17
18
19
20
10K/F_4_3435NTC PR43 *short_4
Close to PWM_A 37
VCCGT Choke PR42 *short_4
ISL95857_ISUMN_A
ISL95857_PWM1_B
ISL95857_PWM2_B
ISL95857_COMP_A
FCCM_A 37
ISL95857_FCCM_B
PR192
ISL95857_IMON_A
ISL95857_NTC_A
ISL95857_RTN_A
PR50 *short_4
ISL95857_FB_A
37 ISUMN_B VSA_SENSE 5
PC44
SP@267/F_4 *0.01U/50V_4 PR52 *short_4 VSASS_SENSE 5
PC34 PR41
PC14 PC18 [email protected]/25V_4 2200p/50V_4 1K/F_4

0.1U/25V_4 ISEN1_B 37
PC45
B Close to PR49 B
PC17 [email protected]/25V_4 ISEN2_B 37 PR211 Vcore Choke *10_4 no stuff
ISUMN_A 37
PR6301 SP@0_4 +5V_S5 0.01U/50V_4
267/F_4
GT2 : PR6301 0 ohm PR243
0.1u/25V_4
PR26 *short_4
PC33
GT3 : PR6301 Unstuff 37 FCCM_B 10K/F_4_3435NTC
1
PR27 *short_4
0.1u/25V_4
37 PWM1_B
2
PR208
PC31
37 PWM2_B PR29 *short_4 PC30 11K/F_4
1
10n/50V_4
1
PR205
2
2.61K/F_4
Rail B
470K_4_4700NTC
2
PR36
1.5K/F_4
2K/F_4
499/F_4
Skylake-U U23e 15W/28W ISUMP_A 37
PR34
27.4K/F_4
4.87K/F_4
PR199
(1+2+1+1 Phase)
330P/50V_4
VCCGTU merge to VCCGT

+VCCCORE
PC25
1000P/50V_4
PR235
PR236
PR201
PC26
97.6K/F_4
PR202
33P/50V_4
2200p/50V_4
560P/50V_4
VCORE VCCGT VCCSA VCCGTU *0.01u/50V_4 PR31
*10_4 no stuff
PC23
Close to
Icc TDC PL2：23A Icc TDC PL2：40A Icc TDC PL2：5A VCORE MOS
PR33 *short_4
Icc Max：32A Icc Max：64A Icc Max：5A
13.7K/F_4
VCORE_SENSE 5
PR224
PC24
PC135
PC28
PC27 PR38 *short_4

VCORESS_SENSE 5
A
OCP：35A OCP：A OCP：6A *0.01u/50V_4 A
Fsw：800KHz Fsw：800KHz Fsw：800KHz PC29

PR39
*10_4 no stuff
：
VCORE L/L：：
VCCGT L/L：：
VCCSA L/L： 0.01u/50V_4
R_DC_LL：2.1mV/A R_DC_LL：2mV/A R_DC_LL：10.3mV/A Quanta Computer Inc.

PROJECT : ZAA
R_AC_LL：2.1mV/A R_AC_LL：2mV/A R_AC_LL：10.3mV/A Size Document Number Rev
1A
CPU_CORE (ISL95859HRTZ-T)
5 4 3 2 1
Dr-Bios.com
5 4 3 2 1
GT2 : PR19 Unstuff GT3 : PR19 CS41003F932 100K
VCORE
D
+VIN_VCCCORE
VIN VCORE D
33U/25V_6x4.5
1
PR55 *short_6
Icc TDC PL2：23A
10u/25V_8
10u/25V_8
+5V_S5
0.1U/50V_6
2200P/50V_6
+
PC52
PC51
PC155
PC154
PC6229
4.7U/10V_6 PU8 AOZ5049QI
PC149
Icc Max：32A
2
6
VCORE_VCC 23 VIN 22
24 PVCC VIN
VCC OCP：35A
Rail A GH
4
3 VCORE_VBST +VCCCORE Fsw：800KHz
PR237 *short_4 1 BOOT PR231 *short_6
36 PWM_A PWM
PR238 *short_4 2 PC144
36 FCCM_A FCCM 0.1u/50V_6 PL4 ：
VCORE L/L：
5 0.15uH_7X7X4
VSWH 13 VCORE_PHASE 1 2 DCR=0.66mOhm
VSWH R_DC_LL：2.1mV/A
PGND
PGND
19
4
GL 20
GL PR60 + +
2.2/F_6 R_AC_LL：2.1mV/A
330u/2V_7343
330u/2V_7343
21
0.1u/16V_4
22u/6.3V_8
22u/6.3V_8
PC59
PC161
PC164
PC168
PC162
PC58
1000P/50V_4
36 ISUMP_A PR215 3.65K/F_6
36 ISUMN_A
PR214 10/F_6
C
VCCGT C
+VIN_VCCGT
PR6304
+5V_S5 PR61 *short_6 VIN
*short_37
4.7U/10V_6
33U/25V_6x4.5
1
PC146
10u/25V_8
10u/25V_8
0.1U/50V_6
2200P/50V_6
PU13 AOZ5049QI +
PC47
PC48
PC148
PC150
PC138
6
VCCGT_VCC1 23 VIN 22
VCCGT
2
24 PVCC VIN
VCC
Rail B
GH
4
VCCGT_VBST1 +VCCGT
Icc TDC PL2：40A
3
PR228 *short_4 1 BOOT PR223 *short_6
36 PWM1_B PWM Icc Max：64A
PR229 *short_4 2 PC142
36 FCCM_B FCCM 0.1u/50V_6 PL2
5 0.15uH_7X7X4 OCP：A
VSWH
VSWH
13 VCCGT_PHASE1 1 2 DCR=0.66mOhm
Fsw：800KHz
PGND
PGND
19
0.1u/16V_4
22u/6.3V_8
22u/6.3V_8
330u/2V_7343
GL
3
20 +
PC159
PC170
PC172
PC163
GL
PR57
：
VCCGT L/L：
21
2.2/F_6
PC55 R_DC_LL：2mV/A
1000P/50V_4
R_AC_LL：2mV/A
36 ISUMP_B PR20 3.65K/F_6
GT2 : PR19 Unstuff
GT3 : PR19 CS41003F932 100K
ISEN1_B PR19 GT3@100K/F_6
PR18 GT3@100K/F_4
VCCGT = 1 phase for U22 , 不周不 36 ISUMN_B
PR17 10/F_6 ISEN2_B 36
B
VCCGT = 2 phase for U23e , 周不 2015/10/2 FAE Suggestion
B
+VIN_VCCGT
PR62
+5V_S5
*short_6
PU7 GT3@AOZ5049QI
PC147
GT3@10u/25V_8
GT3@10u/25V_8
GT3@2200P/50V_6
6
PC49
PC50
PC152
PC153
VCCGT_VCC2 23 VIN 22
24 PVCC VIN
VCC
Rail B GH
4
3 VCCGT_VBST2 PR230 +VCCGT
PR233 GT3@0_4 1 BOOT *short_6
36 PWM2_B PWM
FCCM_B PR234 GT3@0_4 2 PC143
FCCM [email protected]/50V_6 PL3
5 [email protected]_7X7X4
VSWH
VSWH
13 VCCGT_PHASE2 1 2 DCR=0.66mOhm
PGND
PGND
19
GT3@22u/6.3V_8
GT3@22u/6.3V_8
3
GL
GT3@330u/2V_7343
20 PR58 +
PC160
PC166
PC167
PC158
GL [email protected]/F_6
21
PC56
GT3@1000P/50V_4
ISUMP_B PR190 [email protected]/F_6
ISEN2_B PR189 GT3@100K/F_6
A ISUMN_B PR188 GT3@100K/F_4 A

PR182 GT3@10/F_6 ISEN1_B 36
Dr-Bios.com
2015/10/2 FAE Suggestion
5,36 +VCCCORE
22,25,26,31,32,33,34,35,36,38,39,40,41 VIN
5,36 +VCCGT
29,32,35,36,38,40 +5V_S5
PROJECT : ZAA
1A
VCORE/VCCGT (ISL95808HRZ-T)
5 4 3 2 1
5 4 3 2 1
D D
VCCSA
+5V_S5 PR56 *short_6

VIN
4.7U/10V_6
VCCSA
PC151
2200P/50V_6
10u/25V_8
10u/25V_8
0.1U/50V_6
PC54
PC157
PC156
PC53
PU9 AOZ5029QI-5
VIN
6 Icc TDC PL2：5A
VCCSA_VCC 23 22
24 PVCC VIN
C VCC Icc Max：5A C
Rail C 4
GH
BOOT
3 VCCSA_VBST PR232
+VCCSA
OCP：6A
PR239 *short_4 1 *short_6
36 PWM_C PWM
36 FCCM_C PR240 *short_4 2
FCCM
PC145 Fsw：800KHz
0.1u/50V_6 PL5
5 0.47uH_7X7x3
VSWH 13 VCCSA_SW 1 2 DCR=4.2mOhm
VSWH ：
VCCSA L/L：
PGND
PGND 19
0.1u/16V_4
22u/6.3V_8
22u/6.3V_8
3
4
GL 20
PC171
PC169
PC165
GL R_DC_LL：10.3mV/A
PR59
21
2.2/F_6
R_AC_LL：10.3mV/A
PC57
1000P/50V_4
B B
36 ISUMP_C PR222 3.65K/F_6
36 ISUMN_C
PR221 10/F_6
5,36 +VCCSA
22,25,26,31,32,33,34,35,36,37,39,40,41 VIN
29,32,35,36,37,40 +5V_S5
A A

PROJECT : ZAA
Dr-Bios.com
1A
VCCSA (ISL95808HRZ-T)
5 4 3 2 1
5 4 3 2 1
+5VPCU +5VPCU
PR81 Check PU high with HW PR68 Check PU high with HW

*short_4 *short_4
PR73 100K_4 +3V PR53 100K_4 +3V

D PC79 1u/6.3V_4 PU6 PC81 1u/6.3V_4 PU2 D
YB1282PSP8 YB1282PSP8
PC77 *1u/16V_6 4 1 PC70 *1u/16V_6 4 1
VPP PGOOD HWPG_1.8VS5 30 VPP PGOOD HWPG_1.5V 30
S5_ON PR69 *short_4 2 6 PR1249 *short_8 MAINON_R PR37 *short_4 2 6 PR1247 *short_8
30,32 S5_ON VEN VO +1.8V_S5 8,32,35 MAINON_R VEN VO +1.5V
PR1250 *short_8 3 PR1248 *short_8 3
+3VPCU VIN +3VPCU VIN
8 PR156 8 PR121
GND R1 GND R1
ADJ
ADJ
9 5 43.2K/F_4 9 5 30K/F_4
GND NC GND NC
PR75 PC80 +1.8V_S5 PR54 PC71 +1.5V
7
100K_4 10u/6.3V_6 1.8Volt +/- 5% 100K_4 10u/6.3V_6 1.5Volt +/- 5%
VFB=0.8V TDC : 0.08A VFB=0.8V TDC : 0.49A
PR133 PR119
PC76 PC78 PC75 34K/F_4 PEAK : 0.06A PC65 PC74 PC61 34K/F_4 PEAK : 0.66A
10u/6.3V_6 0.1u/50V_6 *0.1u/16V_4 R2 Width : 20mil 10u/6.3V_6 0.1u/50V_6 *0.1u/50V_6 R2 Width : 20mil
Vo =0.8(1+R1/R2) Vo =0.8(1+R1/R2)
=1.8V =1.5V
PR153 Change to
C 220 ohm for bo bo C
sound issue.
VIN VIN
VIN +3V +5V +VCCIO +2.5V
Thermal protection
PR148
PD4 PR151 PR137 PR153 PR138 PR6298 1M_6
DA2J10100L 1M_6 *22_8 *220_8 22_8 *22_8
Need fine tune
MAIND
for thermal protect point MAINON_ON_G MAIND 32,33,35
3
Note placement position
3
3
TEMP=85C
PR152 PR150 2
1M_6 1 MAINON_R 2 PQ11 1M_6 2 2 2 2 PC103
DTC144EU PQ3 2200p/50V_4
PQ12 PQ4 PQ10 PQ5 PQ6066 2N7002K
AO3409 *2N7002K *2N7002K 2N7002K *2N7002K
1
2 PR147
ZRW Rev:D Stuff
1
*100K/F_6
3
S5_ON 2
PQ13 PR154
1
DTC144EU *short_6
B VL VL B
SYS_SHDN# 2,30,32
PR144 PC104 PR155

PR146 200K/F_4 0.1u/50V_6 200K_6
3
1.47K/F_4
8
PR262
10K/F_4_3435NTC 2.469V 3
+ 1 2
LM393_PIN2 2
- PQ14
3
PU4A 2N7002K
4
AS393MTR-E1 PC102
1
0.1u/50V_6
S5_ON 2
PR145
PQ9 200K/F_4
2N7002K
1
5
+ 7
6
-
PU4B
A AS393MTR-E1 A
For EC control thermal protection (output 3.3V)

PROJECT : ZAA
Dr-Bios.com
1A
+1.8V/+1.5V/Thermal Protect
5 4 3 2 1
5 4 3 2 1
ZAAA 6L power solution table

940 (23W) : PR268 CS31242FB13 12.4K/F_4 950(40W) : PR268 CS31002FB26 10K/F_4
940 (23W) : PR270 CS26812FB13 6.81K/F_4 950(40W) : PR270 CS25362FB15 5.36K/F_4
+5V_S5
940 (23W) : PQ41 Unstuff 950(40W) : PQ41 BAM64140000 AON6414AL
940 (23W) : PQ42 Unstuff 950(40W) : PQ42 BAM67520000 AON6752
940 (23W) : PQ30 Unstuff 950(40W) : PQ30 BAM64140000 AON6414AL
940 (23W) : PQ34 Unstuff 950(40W) : PQ34 BAM67520000 AON6752 PR143
*short_6 VIN
D D
Double Check OCP SETTING
*EV@33U/25V_6x4.5
EV@10u/25V_8
EV@10u/25V_8
EV@2200p/50V_4
1
PR96
[email protected]/F_6 +
PC86
PC184
PC251
PC254
PC224
18 1658R-PVCC
PR270 [email protected]/F_4 PR268 [email protected]/F_4 1658R-BOOT1
1
1658R-EN 1658R-VREF PQ33 PQ41
2
PC195 EV@AON6414AL EV_SP@AON6414AL
EV@1u/10V_4 PC253
5
PC227 *[email protected]/50V_4 [email protected]/25V_6
PR276 1 2
EV@100K/F_4 PU19
PR275 1 1658R-BOOT1 1658R-UGATE1 4 4
PVCC
VIN PR260 *EV@1/F_4 1658R-OCS/CB 9 BOOT1
OCS/CB 2 1658R-UGATE1
1
2
3
1
2
3
*EV@499K/F_4 UGATE1 PL9
20 1658R-PHASE1 [email protected]_10X10X4 DCR=1.2m ohm
PR345 *short_4 1658R-EN 3 PHASE1 1658R-PHASE1
16,41 3V_MAIN_PWGD EN +VGPU_CORE
19 1658R-LGATE1
LGATE1
5
DGPU_PSI PR255 *short_4 1658R-PSI 4 PR89
17 DGPU_PSI PSI
EV@UP1658RQKF [email protected]/F_6
+ +
EV@330u/2V_7343
EV@330u/2.5V_6X4.2
PWM-VID PR256 *short_4 1658R-VID 5 15 1658R-BOOT2 1658R-LGATE1 4 4
EV@10u/6.3V_8
17 PWM-VID VID BOOT2
PC191
PC190
PC201
PC328
14 1658R-UGATE2
1
2
3
1
2
3
1 2 1658R-VREF 8 UGATE2 PC188
PC206 EV@1u/10V_4 VREF 16 1658R-PHASE2 PQ42 EV@1000p/50V_6
PHASE2 PQ27 EV_SP@AON6752
1658R-REFADJ 6 17 1658R-LGATE2 EV@AON6752
Check PU High with HW side REFADJ LGATE2 1 2 +3V
PR259 EV@10K_4
7
C +3V_S5 +3VPCU R1 REFIN 13 C
PR106
PR113
EV@20K/F_4
R2 PGOOD
1658R-PG
PR252 *short_4 GPU_PWR_GD 14
1658R-REFIN
EV@20K/F_4 12 1658R-COMP
PC178
COMP
GND
EV@4700P/25V_4
PR104 PR101 10
FB
FBRTN
1
*EV@10K_4 *EV@10K_4
PC199
1
11
21
DGPU_PSI
C PR115
R3
EV@22P/50V_4
2
PC200 EV@2K/F_4 TP4362
1658R-FBRTN
2
1
EV@2700P/50V_4
PC221
EV@16K/F_6
1658R-FB
PR95
PR102 [email protected]/F_6
PR118
VIN
2
*EV@0_4 1658R-BOOT2
PQ43
EV@10u/25V_8
EV@10u/25V_8
EV@2200p/50V_4
TP4363 EV@AON6414AL
PC182
PC209
PC179
PC220
PC211
5
5
PR114
EV@18K/F_4
R4 [email protected]/25V_6
Phase Number of Operation

*EV@22P/50V_4
1
PR277 PR279 1658R-UGATE2 4 4

PR105
PC110
*short_4 *short_4
*[email protected]/F_4 PQ30
2
1
2
3
1
2
3
PR112 EV_SP@AON6414AL PL10
PWM-SVID : Config B *short_4

R5 1658R-PHASE2
[email protected]_10X10X4 DCR=1.2m ohm
+VGPU_CORE
Check PWM-SVID by SKU
3
5
PR91
[email protected]/F_6 + +
EV@330u/2.5V_6X4.2
2
EV@330u/2V_7343
PQ18 1658R-LGATE2 4 4
EV@10u/6.3V_8
*EV@2N7002K
PC193
PC192
PC186
PC204
1
B B
Standby PQ44
1
2
3
1
2
3
PC187 PQ34 PC183
Function
1
*EV@1u/10V_4 EV@AON6752 EV_SP@AON6752 EV@1000p/50V_6

2
+VGPU_CORE
PR84
*EV@100_4
Component Value Config B
N16S-GT(23W/GDDR5) N16E-GR(GDDR5)
PR163 *short_4
14 VGA_VCCSENSE
R1 20K OpenVR Config:B OpenVR Config:B
14 VGA_VSSSENSE PR162 *short_4
PR85 R2 20K +VGPU_CORE +VGPU_CORE

*EV@100_4 Countinue current:26.5A Countinue current:62A
R3 2K Peak current:53A Peak current:119A
Parallel
OCP:72A OCP:144A
R4 18K FSW:300KHz FSW:300KHz
L/L=0mV/A L/L=0mV/A
A A
R5 0-ohm
C 2.7nF
PROJECT : ZAA
Dr-Bios.com
1A
+VGPU_CORE(UP1658RQKF)
5 4 3 2 1
5 4 3 2 1
14,15,16 +1.05V_GFX
14,16,17,30 +3V_GFX
15,19 +1.35V_GFX
Check PU High with HW side

+1.05V_GFX
+3V
TDC : 1.84A
PEAK : 2.45A
Width : 100mil
PR318
*EV@100K/F_4 PC304 PR319
+1.05V_GFX
D D
TP76 *EV@2200P/50V_4 *[email protected]_6
HWPG_1.05VGFX PR317 554PG_0.95V PU18
*short_4 PL14
4 1 554LX_0.95V
PG NC EV@1uH_7X7X3 554FB_0.95V_S
EV@22U/6.3V_6
9 2 PR311 *short_4
+3VPCU PVIN LX
PC303
PC302
PC301
10 3 *EV@22P/50V_4
PVIN LX PR310
7 554NC_0.95V PC247
R1
NC *EV@68P/50V_4
PR312 554SVIN_0.95V 8 6 554FB_0.95V
EV@10_6 SVIN FB
EV@10U/6.3V_6
11 5 554EN_0.95V PR321
EV@1U/6.3V_4
GND EN
PC246
PC249
*short_4 R2 PR309
Vo=0.6*(R1+R2)/R2
PC252
EV@10K/F_4
EV@RT8068AZQW =1.05V
PC300
*[email protected]/16V_4 3V_MAIN_PWGD
3V_MAIN_PWGD 16,40
VIN +3V_GFX VIN +3VPCU
PR159 PR164 PR161
3
EV@1M_6 EV@22_8 EV@1M_6
DGPU_D 2
C C
3
3
PQ19
PR157 EV@AO3404
+3V_GFX
1
PR160 *short_4 2 EV@1M_6 2 2 +3V_GFX
4 DGPU_PWR_EN PC113 TDC : 0.23A
1
PQ17 PQ16 *[email protected]/50V_4

PQ15 EV@2N7002K EV@2N7002K PEAK : 0.31A
1
PC109 PR158 EV@PDTC143TT

Width : 20mil
1
1
*EV@1u/10V_4 EV@100K_4
2
+1.35V_GFX for GDDR5
VIN
PU22
8
IN
9
EV@2200p/50V_6
EV@10u/25V_8
IN
PC291
PC276
PC277
7 22
+5VPCU PR111 NC IN
EV@10_6 24 Fsw=550KHz
+1.35V_GFX
IN
G5335-VCC 21
VCC 1.35 Volt +/- 5%
EV@G5335QT2U PR116 PC292 TDC : 7.74A
+3V
PC280
EV@10U/6.3V_6 6 G5335-TON
[email protected]/F_4 *[email protected]/25V_4
PEAK : 10.32A
TON
B Width : 320mil B
PR296 20 G5335-BST +1.35V_GFX

EV@100K/F_4 BST
PR123 PC289
[email protected]_6 [email protected]/25V_6 PL18
16 HWPG_1.35VGFX PR110 *short_4 G5335-PWRGD 1 [email protected]_7X7X3
PGOOD 10 G5335-LX 1 2
+5VPCU LX 11
LX 16
PR103 *EV@0_4 LX 17
EV@22U/6.3V_6
EV@22U/6.3V_6
EV@22U/6.3V_6
EV@22U/6.3V_6
EV@22U/6.3V_6
*EV@22U/6.3V_6
*EV@22U/6.3V_6
LX 18
PC278
PC273
PC281
PC279
PC282
PC275
PC288
PC287
PR109 *short_4 G5335-PFM 3 LX 25
G5335-AGND PFM LX R1
PR120
Pulse-Skipping mode *[email protected]_6
PR108 PC274
EV@14K/F_4 *EV@1000P/50V_4
PC290
PR122 *short_4 G5335-EN 2 *EV@680p/50V_6
14 FBVDDQ_EN EN 12
PGND
PC293 13
*[email protected]/10V_4 PGND
14
R2
PGND
G5335-AGND 15 PR100 Vo=0.8*(R1+R2)/R2
PGND
19
EV@20K/F_4 =1.35V
G5335-SS 23 PGND
SS
4 G5335-AGND
AGND G5335-AGND
PC92
5 G5335-FB VFB=0.8V
G5335-AGND FB
A A
PR117 *short_4
Dr-Bios.com
G5335-AGND

PROJECT : ZAA
1A
+1.35V_GFX/+1.05V_GFX/+3V_GFX
5 4 3 2 1
1 2 3 4 5 6 7 8
VGA power up sequence
+3VPCU
SKYLAKE
PCH +3V_MAIN
MOSFET +3V_GFX
DGPU_PWR_EN
GPP_B17 MOSFET
A A
3V_MAIN_EN (GPU GPIO5)
3V_MAIN_PWGD
PG All 3.3V
t>0
NVVDD
PXE_VDD
+1.05V
+1.05V_S5 t>0
FBVDDQ
MOSFET +1.05V_GFX N15x Power on sequance

3V_MAIN_PWGD Notes: -All 3.3V includes all rails powered at 3.3V
-PEX_VDD 1.05V inculdes all rails that are shared
PWM-VID (GPU GPIO11)
VIN
B
+VGPU_CORE B
3V_MAIN_PWGD VIN +1.5V_GFX

PWM
PWM
VGPU_PWRGD
OR FBVDDQ_EN HWPG_1.5VGFX
Gate DGPU_PWROK
VGPU_PWRGD
EC_FB_CLAMP(EC)
GC6_FB_EN (GPU GPIO0 )
C C
GPP_B19
VGA Reset
PLTRST#
PEGX_RST#
PCH DGPU_HOLD_RST#
PEX_RST timing
D D
I/O 3.3V
PEX_RST
Trise >= 1uS Tfail <=500nS Quanta Computer Inc.

PROJECT : ZAA
Dr-Bios.com
1A
GPU PWR CRL
1 2 3 4 5 6 7 8
5 4 3 2 1
Battery Mode 3
VIN 1
3
1
+3VPCU +5VPCU
VIN BAT-V
Non Deep Sx 3V/5V VL
+5V_S5 5V_LDO 2
11 2 VR
3 +5VPCU +5V_S5_V2
+15V
CHARGER Battery
EN2
EN1
D
+3VPCU S5 PWR +3V_S5 10 4 D
3
3
S5_ON 8 NBSWON# +3VPCU or +3V_S5
1 VIN Delay DSW power well 10ms DSW PWR

+1V_S5
PWR 6 DPWROK DPWROK
VCCPRIM PWR
DDR VDDQ +1.35VSUS 18 BTN 13 RSMRST# +1V_S5
RSMRST#
VR 7 14 ACPRESENT VCCMPHY PWR
+VDDQ 19 EC ACPRESENT +1.8V_S5
30 DNBSWON#
15 PWRBTN#
HWPG SUSC# 16 SPI PWR
+VDDQ_VTT 23 SLP_S4# V1_MPHY
SUSB# 20 SLP_S3#
HSIO PWR
PCH_SUSACK# SUSACK V1_MPHY
HWPG_VDDR 24
PG PCH_SUSPWARN# SUSWRAN
PLL PWR
S5
S3
PCH_SLP_SUS# SLP_SUS# +1V_S5
31a
VCCST_PWRGD PCH
DDR_VTTT_PG_CTRL VCCST_PWRGD CORE PWR
C
21 31b PCH_PWROK
+1V_S5 C
MAINON
22 31C EC_PWROK PCH_PWROK VCCSRAM PWR
PCH_CLK +1.5V
35
SUSON PLTRST# HDA PWR
VRON
SUSON
S5_ON
MAINON
EC_PWROK
+1V_S5_ON
PLTRST#
17 38 VCCPGPPA PWR +3V_S5
+3VPCU 24 HWPG_VDDR IMVP_PWRGD VCCPGPPB PWR
3 36 SYS_PWROK VCCPGPPC PWR
SYS_PWROK VCCPGPPD PWR
26 HWPG_1V_S5 EC_PWROK VCCPGPPE PWR
+1.5V 12 31C
VCCPGPPG PWR
VCCPGPPF PWR
1.5V +1.8V_S5
HWPG_1.5V 31C 32b 21 17 9 8
VR
PLTRST#
29 29 38
HWPG_1.5V
PG
EN
+VCCIN
MAINON CORE PWR

21 +1.35VSUS
RESET#
CPU
VDDQ PWR
+1V_VCCST
RUN PWR +1VSUS
+1V_VCCST PROCPWRGD
B
3 +5VPCU +5V 28 VCCST PWR B
MOS1
SM_PG_CNTL1
VCCST_PWRGD
0 ohm
3 +3VPCU +3V 27
VR_READY
MOS2
VR_EN
EC_PWROK 10K ohm
SVID
9 +1V_S5 +VCCIO 31C
MOS3 29
G
HWPG_1VS5
1 VIN 12
MAINON 33
VRON
DDR_PG_CTRL
21 +VCC_CORE
IMVP_PWRGD
VCCST_PWRGD_EN
SVID
PCH_PWROK VCCST_PWRGD_EN
IMVP +VCCSA 33 31b
VIN
1 9 VR +VCCGT
33 SYS_PWROK
+1V_S5 36
+1V_S5
VR 34 HWPG+1ms
12 IMVP_PWRGD 37 22 34 32a
HWPG_1VS5 PG
EN
PG
EN
A A
8 SVID VRON 32a

+1V_S5
Dr-Bios.com
37
CPU Quanta Computer Inc.

PROJECT : ZAA
1A
Power Sequence
5 4 3 2 1
5 4 3 2 1
Skylake U Non-Deep Sx Platform

Power on sequence
D D
C C
B B
A A
5
Dr-Bios.com
4 3 2
Size
Date:
Document Number
PROJECT : ZAA
Power on Sequence
1
Sheet 44 of 48
Rev
2A
5 4 3 2 1
實實實defult
虛實實reserve +5V_S5 VGPU_PWRGD
MDV1528Q
+5V_S5_V2
SYS_HWPG S5D PWRGD
VIN Vin
VGPU Core Vout
+VGPU_CORE
up1658
5V_LDO PWRGD
+5VPCU MDV1528Q +5V EN
D
PWR EN1 5V S5_Vout
D
3V_MAIN_PWGD
TPS51225
MAIND
3V_LDO 3V
EN1
HWPG_1.5VGFX
Vin S3_Vout +3VPCU AO3404 +3V_S5
VIN PWRGD
S5D
VIN Vin
+1.5V_GFX Vout
NB671GQ-Z
+1.5V_GFX
EN
MDV1528Q +3V FBVDDQ_EN
MAIND
IMVP_PWRGD
RT8068AZQW +1.05V_GFX
PWRGD
VIN Vin
C C
3V_MAIN_PWGD
VIN Vin
+VCC_CORE Vout
ISL95857HRTZ-T AOZ5029QI
+VCCCORE
AO3404 +3V_GFX EN
VRON
dGPU_PWR_EN
SVID PWM_A
PCH FCCM_A
HWPG_1VS5
IMVP_PWRGD
MDV1528Q +VCCIO
PWRGD VIN
PWRGD Vin
VIN +1.0V_S5 MAIND
Vin Vout +1V_S5 VIN +VCCSA
RT8237CZQW Vin Vout +VCCSA
EN
EN
+1V_S5_ON AO3404 +1V_SUS VRON
EC
SUSON SVID PWM_C
B B
FCCM_C
0 ohm
EC IMVP_PWRGD
TPS22965DSGR V1_MPHY
PWRGD
VIN Vin
MPHY_EXT_PWR
PCH VIN Vin
+VCCGT Vout
+VCCGT
EN
HWPG_VDDR VRON
SVID PWM1_B
FCCM_B
SUSON PWRGD
EC S5 EN
+1.35VSUS
S5_Vout HWPG_1.5V
+1.35VSUS +VDDQ_VTT
G5316RZ1D HWPG_1.8VS5
MAINON PWRGD
EC
S3 EN +3V_S5 +1.5V
A A
Vin S3_Vout +VDDQ Vin Vout +1.5V
DDR_VTTT_PG_CTRL PWRGD APW8824
+3V_S5 +1.8V_S5 EN
PCH Vin Vout +1.8V_S5
APW8824 MAINON
EN
VIN S5_ON
PROJECT : ZAA
1A
SKL PCH PWR CONTROL
Dr-Bios.com
5 4 3 2 1
1 2 3 4 5 6 7 8
+3V_S5 +3V
SDRAM
2.2K 2.2K 2.2K 2.2K
+3V
R7 SMB_PCH_CLK CLK_SCLK
A 2N7002DW A
R8 SMB_PCH_DAT Level shift CLK_SDATA G-Sensor
XDP
Skylake U
+3V_S5
2.2K 2.2K
B B
R9 VGA_MBCLK
W2 VGA_MBDATA
+3V_S5
*2.2K *2.2K
+3V_S5
W3 SMB_ME1_CLK
*2N7002DW
V3 SMB_ME1_DAT Level shift
+3V_S5 +3V_GFX
C 0 0 C
2.2K 2.2K 2.2K 2.2K
+3V_MAIN
115 2ND_MBCLK
2N7002DW GFX_SCL
Level shift VGA
116 2ND_MBDATA GFX_SDA
EC
+3VPCU
IT8987CX
D D
4.7K 4.7K
Dr-Bios.com
110 MBCLK
111 MBDATA CHARGER

PROJECT : ZAA
1A
SMBUS Block Diagram
1 2 3 4 5 6 7 8
5 4 3 2 1
Stage Date CHANGE LIST

A 11/25 1. FIRST RELEASED
B 12/11 1. Update DFDS15FR421, DFFC28FR026, DFFC08FR055, DFFC04FR127 to new footprint.

2. Remove IOAC@ part and change BOARD_ID3 to low (page 8.)
3. Change FAN connector CN8 to 3-pin, and add releven circuits. (page 28.)
4. For FAN function change, swap U45 pin-81 with pin-32. (page 30.)
5. Reserve G-sensor circuit. (page 28.)
6. Internal speaker signal short pad R419, R414, R406 & R404 change to 0603 0 ohm. (page 25.)
D 7. Remove extra hall-sensor circuit on 17". (page 22.) D
8. Modify touchpad INT circuit by using R164. (page 4.)

9. Add EC52 TVS diode. (page 30.)
10. Dual DMIC LR pin change to pull-high. (page 25.)
11. Change R4314 & R4306 of value for KA/KB (page 17.)
12. Change R247 value from 0 to 2.2 Ohm (CS-2204FA00) (page 24.)
13. Change R251, R262, R269, R11265 footprint from 0603 to 0805 (page 24.)
14. Reserve R11282 for battery. (page 30.)
15. Change CN23 H=5.0 part number (page 28.)
16. R512 Change to 1% tolerance part number (page 6.)
12/14 1. Update CN6, CN8, CN18 part nmuber and foot print (page 25.)
2. Change U1006 part number to AL000103006 (page 26.)
3. Q6060 change to stuff (page 6.)
4. R628, R512, R630, R651, R4006 Change to 1% tolerance part number.
12/15 1. Update HOLE1, HOLE2 foot print to new Rev (page 27.)
2. Add HOLE25, PAD14 foot print (page 27.)
3. Change CN13, CN16 foot print to new Rev (page 23.)
4. Change cap CP to normal cap for keyboard (page 22.)
5. Reserve POA(FPD) circuit (page 26.)
12/20 1. Change PJ3 foot print to 50320-0040n-001-4p-l-smt for SMT issue (page 31.)
2. Change CPU 0201 Cap to 0402 besides C245, C196, C269, C285, C235 (page 5.)
3. Change SW4 foot print and part number for B-stage, and swap the pin (page 30.)
C
4. Modify some SPAD and HOLE (page 27.) C
5. Change CN6 foot print to 50591-00401-001-4p-l (page 28.)

6. Modify U22 Block GND pin 18~22 (page 29.)
7. Modify CN12, JDIM1, JDIM2, CN23, SW1, SW2 foot print to newer.
12/21 1. Change CN2021 foot print to ub31-dx07b024xj1ar1000-24p (page 20.)

2. Change CN10 foot print to ngff-nase0-s6701-ts48-ke-smt(page 27.)
3. Add R11284 reserve DMIC power supply (page 25.)
4. Change C739 to 22pF and stuff for bit clock issue (page 4.)
12/22 1. Change C1255, C1257, C1265, C1270, C1327, C4728 to 10uF cap for cost down (page 12, page 13.)
12/23 1. Modify R211, R152 to +3V_S5 for +3V leakage issue (page 8, page2.)
2. Modify R577 to reserved (NC), because no used (page 2.)
3. Add C4817, C4818, C4819, C4820 for EMI issue (page 20.)
4. Change CN2021 foot print to ub31-dx07b024xj1ar1000-24p-smt (page 20.)
5. Change CN13, C16 foot print to ub3-yusb0021-p001a-9p-smt (page 29.)
6. Stuff R786, R568, R570, and unstuff U33, C628 (page 2, page 6.)
7. Swap PJ3 (page 31.)
12/24 1. Change CN4 foot print to sdcard-psdat4-11glbs1nn4h4-11p (page 24.)

2. Change R11267, R11270 to short pad, and change R11268, R11271 form 33 ohm to 47 ohm (page 22.)
3. Unstuff C319, C333, C336, C716, C718 (page 22.)
4. Reserve R11285, R11286 pull up to +3V, and R11287 pull down to GND for CRT issue (page 21.)
B
5. Stuff R11286 for CRT issue (page 21.) B
6. Remove all type-C re-driver short resistor and capactor (page 20.)
12/25 1. Change HOLE16 foot print to H-TC217BC197D126P2(page 24.)
12/29 1. Modify the power solution between GT2 and GT3e, see the table (page 36.)
2. Change the power value, PC10 to 1uF CH5101K9B01 (page 36.)
3. Change the power value, PC20 to 0.022uF CH3224K1B01 (page 36.)
4. Change the power value, PC28 to 560pF CH1566K1B09 (page 36.)
5. Change the power value, PC39 to 0.015uF CH3154K1B00 (page 36.)
6. Change the power value, PR220 to 475 ohm CS14752FB11 (page 36.)
7. Modify BOARD_ID7. GPU GT, KB, GTR PU 10k ohm, KA PD 10k. (page 8.)
8. Change the RTC clock crystal Y2 part number to BG3327680C6 (page 6.)
9. Change Q115, Q129 part number to BAM70020076 (page 19.)
10. Modify R11283 to +3V fixed the SSD issue (page 27.)
11. Change the HOLE16 NUT part number to MBZAA002010 (page 27.)
B2 1/7 1. Remove R11274 and mount R11277 for change equalizer setting from 6dB to 4dB (page. 23)
2. Change 15" and 17" keyboard part number to DFFC28FR030 (page 28.)
1/18 1. Update the System Block Diagram (page 1.)

2. Update the part number option same as B-SMT BOM.
1/19 1. Power team remove JUMP and change 0 ohm to shortpad (page 31~41.)
2. Modify some description, value and part number have blank.
A A
1/20 1. Change C144,C150,C190,C199,C248,C645,C650,C659,C666,C690,C696,C697,C702 to 22uF, part number : CH6221M9A00 (page 5.)

2. Change C171,C178,C203,C219,C224,C226,C233,C236,C243,C251,C255,C272,C273,C282,C289,C691,C692,C693,C694,C703,C704,
Dr-Bios.com
C705,C706,C707,C202,C210 to 10uF, part number : CH6101M9905 (page 5.)
1/21 1. Change D2,D3,D4,D5,D4013,D4014,EC51,EC52 main source part number from BC040201Z00 to BC005725Z00.

PROJECT MODEL : ZWA APPROVED BY: DATE:
PROJECT : ZAA DOC NO.
1A
Change list PART NUMBER: DRAWING BY: REVISON:
5 4 3 2 1
5 4 3 2 1
Stage Date CHANGE LIST

C 1/22 1. Reserve R11288, R11289, R11290, R11291 0ohm for POA NC function (page 26.)
2. Change Q115, Q129 main source to BAM70020002
3. Change Q5, Q4201 main source to BA039040020.
4. Change D7, D4000 main source to BCBAT54CZ01.
5. Change Q3, Q32, Q4301 main source to BAM70020047.
1/26 1. Change CN5 part number to DFHS40FS036 (page 22.)

2. Change CN4 part number to DFHS11FR170 (page 4.)
D 3. Modify POA circuit for C-stage test (page 26.) D
1/27 1. Change the TPS25810RVC pu-high power from +5V_S5_V2 to +3V_S5 (page 20.)
2. Reserve R11193 for Type-C detec issue (page 20.)
3. Change 0 Ohm to short pad R11,R14,R15,R28,R66,R67,R11129,R102,R194,R224,R229,R235,R790,R791,R792,R11111,R11112,R11113,R11140,
R112,R135,R179,R180,R182,R185,R187,R188,R192,R193,R198,R240,R252,R11131,R164,R246,R339,R350,R11185,R11186,R550,R657,R718,R721,
R782,R11153,R11283,R795,R796,R797,R816,R817,R818,R819,R820,R821,R11196,R11199,R11202,R11207,R11279,R11280,R11281,R948,R951,R956,
R958,R959,R960,R11061,R11062,R11110,R11133,R11134,R11136,R11137,R11138,R11139,R11141,R11253,R11254,R11255,R11256,R11267,R11270,
R4328,R4335,R2855,R2870,R318,R221,R403,R405,R742,R743,R725,R745,L19,R2872.
4. Add TYPE@ part at Type-C power function (page 32.)
5. Add BL@ part at keyboard back-light (page 28.)
6. Reserve 15" 17" Dual DMIC circuit part (page 25.)
7. Reserve C4821 for NAC function (page 24.)
1/28 1. Add EV@ part at HOLE8, HOLE9 (page 27.)
1/29 1. Stuff PR233, PR234 for GT3e power function (page 37.)
2. Add D22@, D10@ part at CPU power side (page 5.)
3. Change PR209, PR210 from short pad to 10 ohm (page 31.)
2/2 1. Modify POA circuit for C-stage test (page 26.)

2. Remove HOLE25 because not used (page 25.)
3. Change HOLE13, HOLE14, HOLE15 foot print to H-C256D161P2 (page 25.)
2/3 1. Modify POA circuit for C-stage test (page 26.)

C
2. Change PC115 from CH5104K9906 to CH41006K911 for FAE suggest (page31.) C
3. Stuff PC138 for FAE suggest (page 37.)
2/4 1. Update C-test BOM.
2/16 1. Change PR6121 from CS31002FB26 to CS29312FB13 (page 32.)

2. Add C376 distinguish ZAA/ZAAA 15" serial and ZYJ/ZYI 17" serial (page 25.)
3. Change LED current limiting resistor blue and orange to 47 ohm and 124 ohm (page 28.)
2/17 1. Change PU6010 from AL006575002 to AL051225003 for 3/5V IC noise issue (page 32.)
RAMP 2/22 1. Stuff PC6229, PC6212 for 3/5 voltage IC noise and charging issue (page 32, 37.)
2. Change PR183, PR184, PR209, PR210 to shortpad for 3/5 voltage IC noise and charging issue (page 31.)
3. Modify RP1 circuit (page 28.)
3/3 1. Unstuff R694, R699 (page 27.)

2. Change 0 Ohm to shortpad R3, R4 R365, R640, R653, R659, R668, R11191, R11192, R16, R212, R404, R406, R414, R419, R752, R789,
R237, R672.
3. Remove RP2, RP3, RP4, RP5, L69 for SMT colay issue. (page 20.)
3/9 1. Change 0 Ohm to shortpad R11284, R2870, R2872, R11298, PR6296, R4329, R4336, PR112.
2. Change PR201, PR202 and PR211 to 1.5k, 97.6k and 267 ohm for GT2 and GT3 (page 36.)
3. Add PC6232, PC6233 at 3/5 V Vin (page 32.)
4. Change PL6013 from 1uH_7X7X3 to 2.2uH_7X7X3 (page 32.)
B B
3/10 1. Change C714 and C724 value from 10p to 1000p for projector issue (page 22.)
2. Remove SW2 for RAMP-stage (page 30.)
3. Change PU10, PU11, PU20 footprint to son14-3x2-4-15p-smt (page 32.)
3/15 1. Change RTC crystal circuit C351 and C362 value from 6.8p to 15p for EA issue (page 22.)
2. Modify GPU power solution for cost down (page 40.)
3/25 1. Change R237 shortpad to 0 ohm for next PCB rev. F (page 27.)
2. Reserve POA function (page 26.)
A A
Size
Date:
Document Number

PROJECT : ZAA
Change list
5
Sheet 48 of 48
Rev
1A
DOC NO.
4
PROJECT MODEL :
PART NUMBER: Dr-Bios.com

ZWA
3
APPROVED BY:
DRAWING BY:
2
DATE:
REVISON:
1

Zaaa Serials Skylake-U System Block Diagram: Sky Lake Ult 15W

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5 4 3 2 1

ZAAA Serials SkyLake-U SYSTEM BLOCK DIAGRAM

GPU GDDR5/ 1.35V

DDR4-SODIMM CHB EDP

Skylake ULT (DISPLAY,eDP)

E55 C47 DDI2_AUXN R533 *100K_4

5/29 XDP_TCK0 R558 Stuff

CPU thermal trip

U33 +1V_VCCST +3V FDV301N

Quanta Computer Inc.

Change Data and DQS to interleave.

SKL ULT (DDR3L) SKL ULT (DDR3L)

R621 *10K_4 1 3 DDR_VTTT_PG_CTRL 35

REV:E connect to GND

SM_RCOMP_0 121/F_4 R685

CPU_DRAMRST# R670 *short_4 DDR3_DRAMRST# 12,13

Date: Monday, March 28, 2016 Sheet 3 of 48

SKL ULT (SIDEBAND ) GPIO

H_PWRGOOD (50ohm) TP4398 VGPU_EN AN8 +3V_S5

high UMA Only

+3V R667 33_4 HDA_SYNC_R BA22

SPI0_MOSI Reserved RSMRST# (iPU 15 ~ 40K)

SPI0_MISO Reserved RSMRST# (iPU 15 ~ 40K)

SPI0_IO2 Reserved RSMRST# (iPU 15 ~ 40K)

A SPI0_IO3 Reserved RSMRST# (iPU 15 ~ 40K) A

GPP_E19 0 = *Port B is not detected (iPD 20K)

Backside cap A30

G32 Primary side cap

Backside cap Primary side cap

+VCCEOPIO Backside cap +VCCOPC_SRC

U35M SKL_ULT +VCCGT H_CPU_SVIDCLK

Primary side cap

Primary side cap

Primary side cap SP@SKL_ULT/BGA

Primary side cap

Quanta Computer Inc.

27 CLK_PCIE_WLANN CLKOUT_PCIE_N5 VCCRTC_2

CLK_PCIE_REQ1# R215 10K_4

100K_4 Rev:E Reserve only Rev:E Reserve only

R649 1K_4 SPI_WP_IO2_ME

R602 *short_4 PCH_SPI_CS0#

R591 10K_4 SPI_CS0#_UR_ME

Quanta Computer Inc.

Date: Monday, March 28, 2016 Sheet 7 of 48

VCCST_PWRGD B65 PROCPWRGD I SLP_LAN# BB17 PCH_SLP_WLAN# TP30

A36 C37 +3V_S5

B Power Sequence Non Deep Sx

Rev:D change to shortpad

+3V_S5 U6 C808 0.1u/16V_4

Rev:D change to shortpad Quanta Computer Inc.

VCCPRIM_1P0 & VCCPRIM_CORE Short GPIO Group Power Plane

AY2 BA4 R210 *0_6 +VCCPDSW_3P3 AD17

Pin Name Strap description Configuration Note

CFG[1] Reserved Configuration lane

CFG[3] Reserved Configuration lane

1 = Disabled (iPU 3K) CFG4

00 = 1x8, 2x4 PCI Express*

11 = 1x16 PCI Express*

Skylake ULT (GND)

APS1 R289 0_6 APS3 R272 0_6 APS7

EC39 120P/50V_4 EC36 120P/50V_4 C1325 1U/6.3V_4 C1311 1U/6.3V_4 +1.2VSUS

EC48 120P/50V_4 EC47 120P/50V_4 C1309 1U/6.3V_4 C1310 1U/6.3V_4

EC42 120P/50V_4 EC43 120P/50V_4 C1318 1U/6.3V_4 C1319 1U/6.3V_4