MATLAB Questions
MATLAB Questions
MATLAB Questions
2. What is Simulink?
Ans-1.Simulink is a graphical extension to MATLAB for modeling and simulation of systems. In Simulink,
systems are drawn on screen as block diagrams
2. Simulinkis an environment for multidomain simulation and Model-Based Design for dynamic and
embedded systems. It provides an interactive graphical environment and a customizable set of block
libraries that let you design, simulate, implement, and test a variety of time-varying systems, including
communications, controls, signal processing, video processing, and image processing.
3. What is s-fun?
Ans: An S-function is a computer language description of a Simulink block written in MATLAB ®, C, C++, or
FORTRAN.It provides a powerful mechanism for extending the capabilities of the Simulink ® environment.
S-functions are compiled as MEX files using the MEX utility. As with other MEX files, S-functions are
dynamically linked subroutines that the MATLAB interpreter can automatically load and execute. By
following a set of simple rules, you can implement an algorithm in an S-function and use the S-Function
block to add it to a Simulink model.
Ans-State flow is a graphical design tool that works with Simulink to model and simulate event driven
system(In computer programming, event-driven programming or event-based programming is
a programming paradigm in which the flow of the program is determined by events—
i.e., sensor outputs or user actions (mouse clicks, key presses) or messages from other programs
or threads.In computing an event is an action that is usually initiated outside the scope of a program and
that is handled by a piece of code inside the program.)orreactive system.we will make decision making
things in state flow.
Ans-
It describes the complex logic in more we can design complex logic but it is not so
Readable and understandable format. Understandable.
It generates the code using state flow coder.
na_0006: Guidelines for mixed use of Simulink and State flow
The choice of whether to use Simulink or Stateflow to model a given portion of the control algorithm
functionality should be driven by the nature of the behavior being modeled.
• If the function primarily involves complicated logical operations, use Stateflow diagrams. Use
Stateflow diagrams to implement modal logic, where the control function to be performed at the
current time depends on a combination of past and present logical conditions.
• If the function primarily involves numerical operations, use Simulink features.
• If the primary nature of the function is logical, but some simple numerical calculations are done to
support the logic, implement the simple numerical functions using the Stateflow action language.
• If the primary nature of the function is numeric, but some simple logical operations are done to
support the arithmetic, implement the simple logical functions with Simulink blocks.
• If the primary nature of the function is logical, and some complicated numerical calculations must be
done to support the logic, use a Simulink subsystem to implement the numerical calculations. The
Stateflow software should invoke the execution of the subsystem, using a function call.
• Use Simulink to implement numerical expressions containing continuously-valued states, such as:
difference equations, integrals, derivatives, and filters.
Ans- The Model-in-the-loop simulation captures the specified behavior of the model that is to be
implemented in C code later on. These simulated results are validated with the requirements. Also it
acts as the verification reference for the next stages of development cycle.
Ans- The Software-in-the-loop simulation captures the behavior of the generated C code in simulator
environment of the target controller. The simulated results when validated with the simulated Model-in-
the-Loop simulation results both the results should be identical. If found otherwise the results can be
used to evaluate the cause of deviation.
Ans- RTW (Real time Workshop) tool helps to create the prototype as well as the production code
directly from the control design models. The greatest advantage of this process is the significant time
and cost savings thanks to the inherent reproducibility and testability of the generated code.
9. Difference between RTW and RTWEC (Real Time Workshopfor embedded code)?
Ans-
RTW RTWEC
It generates and executes standalone C code for It generates c code from simulink and state flow
developing and testing the algorithm modeled in models that has the clarity and efficiency of
simulink. Handwritten code.
The resulting code can be used in many real time Here the generated code is exceptionally
and non-real time application. Compact and is used for embedded system, mass
production and real time simulation.
Ans- Model in loop testing is done in the floating point model. Afterdesigning themodel, checking the
model output by giving test cases using test tool is called MIL.
Ans-
S-function:
In s-function we can create our general purpose block and use it many times in the model.
S-function enables to create one block at a time i.e. we can design only one function at once.
S-function builder:
S-function builder creates a c/c++ MEX s-function from c/c++ source code that is already
provided.
Here, we can call c/c++ source files more than one at a time and can use it in our model.
Ans-
Ans- Simulink allows you to specify a block sample time directly as a numerical value or symbolically
by defining a sample time vector. In the case of a discrete sample time, the vector is [Ts, To] where Ts is
the sampling period and To is the initial time offset. For example, consider a discrete model that
produces its outputs every two seconds. If your base time unit is seconds, you can directly set the
discrete sample time by specifying the numerical value of 2 as the Sample Time parameter. Because the
offset value is zero, you do not need to specify it; however, you can enter [2, 0] in the Sample time field.
For non discrete blocks, the components of the vector are symbolic values that represent one of the
types in Types of Sample Time. The following table summarizes these types and the corresponding
sample time values. The table also defines the explicit nature of each sample time type and designates
the associated color and annotation. Because an inherited sample time is explicit, you can specify it as
[-1, 0] or as -1.Whereas, a triggered sample time is implicit; only Simulink can assign the sample time of
[-1, -1]. (For more information about colors and annotations, see How to View Sample Time
Information.)
Ans-
Ans-It computes the states ofthe system at successive time steps over a specified time span.
Simulink tool
V and V(Verification and validation)
RTW(real time workspace)
Tin’s tool(Testing)
Ans: Model-Based Design is an efficient and cost-effective way to develop controls, signal processing,
communications, mechatronics, and other embedded systems. Model-Based Design, basically improve
product quality and reduce development time by 50% or more. Model-Based Design uses a system
model as an executable specification throughout development. It supports system- and component-
level design and simulation, automatic code generation, and continuous test and verification
Model-Based Design allows you to improve efficiency by:
Reusing designs to deploy systems across multiple processors and hardware targets
Ans-
MATLAB allows Matrix manipulation, plotting function and data, Implementation of algorithm,
interfacing with program written in other language but all this are not possible in ‘C’.
MATLAB is designed for technical users but ‘C’ is much more general.
‘C’ code is more efficient in many areas but MATLAB is not that much efficient in many areas
eg.Embeddedsystems, whereMATLAB is not an option.
Adding extra features in already existing ‘C’ code and testing it is difficult while in MATLAB We
can do it easily.
Ans:
In traditional system development, the phases of systems development are carried out
in a present order.
(1) Preliminary investigation
2) System analysis
3) System design
4) System acquisition
5) System implementation.
Each phase begins only when the one before it is completed.
It is expensive and extensive.
Requires system users to consider proposed system plans by looking at detailed
diagrams, detailed reports and the specification of proposed new system.
This approach often takes too long to analyze, design and implement, second, the
system developed often turns out to be the wrong one.
Model-Based Design is an efficient and cost-effective way to develop the system model.
It doesnot focus on physical prototypes and textual specifications;it uses a system model
as an executable specification throughout development.
It supports system- and component-level design and simulation, automatic code
generation, and continuous test and verification.
you can automatically generate code for embedded deployment and. create test
benches for system verification, saving time and avoiding the introduction of manually
coded errors
Ans: Simulink Browser -> File menu -> Library will create a model library file. In which you can place the
model designs/block set use it in your model
Ans: We placed custom code, source files or headers in Stateflow Target which is no Simulation Target in
Simulation parameters
Ans-With the help of S-function we can transform our c-code to MATLAB model.
Process:
Take s–function block from Simulink library then copy the predefined C,C++ or Fortran code is present
then that s-function block we can used in MATLABmodel when necessary.
Ans: Testing is a process of executing a system with the intend of finding errors i.e. to check the system
or model weather it is working properly or not.
In model based design there are three types of testing are there:
26. How to trace the particular branch is not covered in the present existed test cases?
Ans: We can trace the particular branch which is not covered by the
27. What is your present existing tool set up used for testing?
Ans: TINS_MTEST.
Ans-Slope Bias:
Eg 5.56
Binary:
Eg 5.56
Ans-How many number of bits required for the fractional part is known as Scaling.
Ans: Mex stands for MATLABexecutable file. AMEX file provides interface between MATLAB and
subroutines written in c,c++and fortan. When compiled MEX file s are dynamically loaded and allow non
MATLAB code to be invoked from within MATLABas if it was a built-in function.
32. What is code coverage?
Ans-The percent of Code covered with our test cases is called Code coverage.
In MIL Testing, we check the model with Test Cases. Then tool for code coverage will tell how much % of
code is covered with our Test Cases.
a. Deactivated code-
b. Dead code-If any part of the code is not covered with any of the test cases that part of code Is called
as dead code.
Dead code is a computer programming term for code in the source code of a program which is
executed but whose result is never used in any other computation. The execution of dead code
wastes computation time as its results are never used.
Ans-1.After designing model, go to fixed point advisor and run the following fixed point advisor tool
1. Go to the fixed point tool where we have to check the following point
Ans-Target Language Compiler (TLC) is an integral part of Real-Time Workshop®. It enables you to
customize code generated by Real-Time Workshop. Through customization, you can produce platform-
specific code, or you can incorporate your own algorithmic changes for performance, code size, or
compatibility with existing methods that you prefer to maintain.
A complete set of TLC files corresponding to each of the blocks provided with Simulink.
TLC files for model-wide information that specifies header and parameter information
The TLC files are ASCII files that explicitly control the way code is generated by Real-Time Workshop.
By editing a TLC file, you can alter the way code is generated for a particular block.
37. Which are the tools required for code generation and code coverage?
Ans-
Code generation-RTW
Code coverage –Simulink Verification and Validation.
38. Define interfaces between Simulink auto generated and low level generated code?
Ans-
RTW RTWEC
It generates and executes standalone It generates c code from simulink and stateflow
C code for developing and testing the models that has the clarity and efficiency of
Algorithm modeled in simulink. Handwritten code.
The resulting code can be used in many Here the generated code is exceptionally
real time and non-real time application. Compact and is used for embedded system,
mass production and real time simulation.
Variable-step solver type can significantly shorten the time required to simulate models in which states
change rapidly or which contain discontinuities.
43. In the simulation time if start and stop time both are for same time what will be the result
Ans:
It runs for one time stamp
44. What is the sampling time you choose for your model.
Ans:
It depends on the time of execution you select if start and atop time is (0:10.0)
Then Sample Time = (Stop time – Start Time)/50
46. How do you load values in to your model without using constant block (using m-script?)
Ans:
47. In a model if suppose there are 3-sub blocks in that you want to run 1st and 3rd but not 2nd, how
do you do your simulation
Ans:
Using State flow and start chart it is possible
50. What is the default value loads in the workspace when you run any m-script
Ans:
Default is double.
If you give input as string it will store in string.
If input it is logical like A = 0>1, Then it stores as logical;
In input is an Image then it stores in uint8;
If input is structure it stores in structure;
If input is in Cell then it stores in cell.
52. Using command line how do you convert double to uint-8
Ans:
A = 10;
B = uint8 (A);
55. In C-Code, if you want to get switch Case which block you should use in Simulink (not with state
flow or state chart)
Ans:
In the configuration parameters/ Real-Time workshop/ Code Style check “Convert if-elseif-else patterns
to switch-case statements”.
56. If you have 4-bytes of uint-8 data how to club to get unit-32
Ans:
Using shift Arithmetic block it is possible
57. In solver If you change fixed step to variable step what will happen give clear explanation
Ans:
In fixed step execution will be on the sample basis (for ex: if the stop time is 10.0 and sample is 0.1 for
each and every sample time model simulates independent on input)
In variable step depending on input simulation varies( for ex: if the stop time is 10.0 and sample is 0.1
and input is constant then simulation will not executes each and every sample)
59. For a give pulse signal how do you detect edge fall/raise?
Ans:
There are direct basic blocks are there to detect edge fall and edge raise.
Simulink/ Logic and Bit Operations
64.They will give some models and they will tell you to draw the output.
If the Treat as atomic unit option is unchecked then subsystem will be called as virtual subsystem and
then it will act as just packing the design and it is treated by Simulink engine that block set inside the
subsystem are of same hierarchical level as subsystem exists.
66. What are simulation dynamics takes places at back end when you press the simulation button on
model?
Ans:
Simulation Dynamics takes places in three stages:
1. Model Compilation
2. Link Phase
3. Simulation loop phase
For more details see the help
Condition Coverage (CC): Condition coverage analyzes blocks that output the logical combination of
their inputs (for example, the Logical Operator block) and Stateflow transitions. A test case achieves full
coverage when it causes each input to each instance of a logic block in the model and each condition on
a transition to be true at least once during the simulation, and false at least once during the simulation.
Condition coverage analysis reports whether the test case fully covered the block for each block in the
model.
When you collect coverage for a model, you may not be able to achieve 100% condition coverage. For
example, if you specify to short-circuit logic blocks, by selecting Treat Simulink Logic blocks as short-
circuited in the Coverage Settings dialog box, you might not be able to achieve 100% condition coverage
for that block. See Treat Simulink logic blocks as short-circuited for more information.
For an example of condition coverage data in a model coverage report, see Conditions Analyzed.
A test case achieves full coverage for a block when a change in one input, independent of any other
inputs, causes a change in the block's output.
A test case achieves full coverage for a Stateflow transition when there is at least one time when a
change in the condition triggers the transition for each condition.
69. What is the Difference between Enabled and Triggered Sub System?
Triggered system works only when there is change in condition and then Input will be read for
processing. Whereas Enabled subsystem works when condition is true
82. How variables look like in Autosar and Non Autosar Code?
83. How Constants are defined in Generated Code?
&define MDL_OIL_ACTIVATED (1) in RTW Code
&define ACTIVATED in Targetlink Code
87. What is the difference between State Chart, State Machine and Finite State Machine?
89. What is the first thing you select in RTW Code generation?
Target file. That is Autosar or ert or grt slection
90. How Inputs to a block look like in code?
All inputs will be parameters of One Structure.
91. How data types are represented in AUTOSAR?
Uint8, Sint8, Uint16
92. How