BENQ R55 Quanta TW3A PDF
BENQ R55 Quanta TW3A PDF
BENQ R55 Quanta TW3A PDF
PCB STACK UP
LAYER 1 : TOP TW3A- DESIGN DC/DC DC/DC DC/DC
CLOCKS
1
LAYER 2 : SGND1 +3VSUS +3VPCU +1.05V
+5VSUS +5VPCU +1.5V ICS954206
A LAYER 3 : IN1 A
PG 39 1466 BGA
PG 16,17 VGA VGA,DVI
PG 6,7,8,9,10,11 PG 23
DMI USB2.0 (P5) Bluetooth
USB2.0
interface PG 33
SATA - HDD (P0~P7)
SATA0
PG 29 USB2.0 (P0~P1,P4) USB2.0 I/O
Ports PG 26
ICH7-M PG 18~21
PATA - HDD
PATA 100 PCI-E, 1X LAN
PG 29 88E8038/88E8055 Magnetics RJ45
PG 25 PG 25
PG 24
652 BGA
Internal ODD PCI-E, 1X Mini PCI-E Card
CD-ROM PCI Express Mini Card
C PG 29 PCI-E, 1X PG 33 C
Azalia
PCI Bus 33MHz
Express Card x1
PG 12,13,14,15
NEW CARD Power Input RQ6
PG 33
Conexant Audio LPT PORT
2
Board Stack up Description
PCB Layers Voltage Rails
A A
Vccgmch
GMCHPWRGD Tgmch_pwrgd
ACIN POWER ON TIMING
CLK_ENABLE# ACIN
PWRGOOD VSUS,VCC
From 87541
C C
VR_ON
Tf
Ta Tb VIN POWER SOURCE X X X X
VCCP/1.05V
PLTRST#\PCIRST#
VCCP
From ICH7 to CPU
H_PWRGD
Ta=VCC and VCCP asseration to VID[5:0] vaild
Tb=VID[5:0] stable to VCC vaild 2ms Form GMCH to CPU
Tc=BCLK stable to PWRGOOD assertion
Td=PWRGOOD to RESET# de-assertion time H_CPURST#
Te=Vcc,boot vaild to PWRGOOD assertion time
D D
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
System Information
Date: Thursday, March 09, 2006 Sheet 2 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1
1 1 0 400 100 33 <500mil
Y1 U13
37
38
1 1 1 RSVD 100 33 R145 33/F
C434 14.318MHZ 50 52 14M_REF 1 2
VDDA
VSSA
14M_ICH 14
2
33p/50V XTAL_IN REF RP33
1
2 1 XOUT 49 44 R_HCLK_CPU 4 3
XTAL_OUT CPU0 CLK_CPU_BCLK 4
43 R_HCLK_CPU# 2 1 33x2 C405
CPU0# CLK_CPU_BCLK# 4
RP34 *10p
2
CLK_EN# 10 41 R_HCLK_MCH 4 3
14,37 CLK_EN# VTT_PWRGD#/PD# CPU1 CLK_MCH_BCLK 6
14 PM_STPPCI# PM_STPPCI# 55 40 R_HCLK_MCH# 2 1 33x2
PCI_STOP# CPU1# CLK_MCH_BCLK# 6
14 PM_STPCPU# PM_STPCPU# 54 RP35
TI_CLK48M R181 1 CPU_STOP#
28 TI_CLK48M 2 10 CPU2_ITP/SRC7 36 R_PCIE_VGA 4 3 CLK_PCIE_VGA
CLK_PCIE_VGA 18
CLKUSB_48 R180 1 2 10 35 R_PCIE_VGA# 2 1 CLK_PCIE_VGA#
14 CLKUSB_48 CPU2#_ITP/SRC7# CLK_PCIE_VGA# 18
RP31 33x2
CGCLK_SMB 46 CK-410M 33 R_PCIE_LAN 4 3 CLK_PCIE_LAN
SCLK SRC6 CLK_PCIE_LAN 24
SMbus address D2 CGDAT_SMB 47 32 R_PCIE_LAN# 2 1 CLK_PCIE_LAN#
SDATA SRC6# CLK_PCIE_LAN# 24
33x2
R426 1 2 8.2K/F FSA 12 31 R_MCH_3GPLL RP324 3 CLK_MCH_3GPLL
4,7 CPU_MCH_BSEL0 FSA/USB_48 SRC5 CLK_PCIE_3GPLL 7
16 30 R_MCH_3GPLL# 2 1 CLK_MCH_3GPLL#
+3VRUN 4,7 CPU_MCH_BSEL1 FSB/TEST_MODE SRC5# CLK_PCIE_3GPLL# 7
R408 1 2 8.2K/F FSC 53 33x2
4,7 CPU_MCH_BSEL2 FSC/TEST_SEL
26 R_PCIE_SATA RP402 1 CLK_PCIE_SATA
SRC4 CLK_PCIE_SATA 12
VDDREF_CR 48 27 R_PCIE_SATA# 4 3 CLK_PCIE_SATA#
VDD_REF SRC4# CLK_PCIE_SATA# 12
CLKVDD 42 33x2
VDD_CPU
2
20 R_PCIE_NEW# 4 3 CLK_PCIE_NEW_C#
SRC1# CLK_PCIE_NEW_C# 33
R171 VDD48_CR 11 33x2
VDD_48
*10K_NC SRC0 17
1 2 IREF 39 18
R132 475/F IREF SRC0#
0816a
1
GND_PCI_1
GND_PCI_2
Ioh=4*Iref PCI3 PCLK_LPC_DEBUG 33
GND_SRC
GND_CPU
GND_REF
14 56 R_PCLK_TPM R144 1 2 *33_4
DOT96 PCI2 PCLK_TPM 44
GND_48
15 9 R_PCLK_ICH R179 1 2 33/F
DOT96# PCIF1 PCLK_ICH 13
8 PCIF0 1 2
PCIF0/ITP_EN R177 10K
PCIF1
1:100 Mhz
13
51
2
6
29
45
ICS954206AGLFT 0:96 Mhz
CT_0505: Change footprint to 250mA ( MAX. )
1
R170
2
*10K
+3VRUN
120 ohms@100Mhz
L21 TSSOP56-8_1-5 from 1 2
+3VRUN 1 2 0.047u/10V 0.047u/10V CLKVDD TSSOP56-240 R178 10K
HB-1T2012-121JT
1
+3VRUN CLK_PCIE_SATA 3 4
120 ohms@100Mhz CLK_PCIE_SATA# RP44 1 2 49.9x2
L22
2 1 CLKVDD1 CLK_PCIE_ICH 3 4
+3VRUN
2
4
HB-1T2012-121JT CLK_PCIE_ICH# RP43 1 2 49.9x2
Connect DDR
1
SMB
1
3
PDAT_SMB 3 1 CGDAT_SMB
14,33 PDAT_SMB CGDAT_SMB 16
CT_0229: Change
R175 2.2_6 RHU002N06
1 2 VDD48_CR These are for MOS to
+3VRUN RHU002N06 due Place these termination to
backdrive
1
D PCLK_SMB 3 1 CGCLK_SMB D
14,33 PCLK_SMB CGCLK_SMB 16
C407
0.047u/10V PROJECT : TW3
Quanta Computer Inc.
2
U25A
6 H_A#[31:3] +1.05V
H_A#3
4
J4 A[3]# ADS# H1 H_ADS# 6
H_A#4 L4 E2
A[4]# BNR# H_BNR# 6
H_A#5 M3 G5 +1.05V +1.05V 5,6,7,9,10,12,15,41,43,44
A[5]# BPRI# H_BPRI# 6
H_A#6 K5
H_A#7 A[6]#
M1 A[7]# DEFER# H5 H_DEFER# 6
ADDR GROUP 0
H_A#8 N2 F21
A[8]# DRDY# H_DRDY# 6
H_A#9 J1 E1 R305 Near to MCH <500mils
A[9]# DBSY# H_DBSY# 6
CONTROL
H_A#10 N3 56
H_A#11 A[10]#
P5 A[11]# BR0# F1 H_BREQ#0 6
H_A#12 P2
H_A#13 A[12]#
L1 A[13]# IERR# D20 6 H_D#[63:0]
H_A#14 P4 B3 H_D#[63:0]
A A[14]# INIT# H_INIT# 12 A
H_A#15 P1 U25B
H_A#16 A[15]# H_D#0 E22 H_D#32
R1 A[16]# LOCK# H4 H_LOCK# 6 D[0]# D[32]# AA23
L2 H_D#1 F24 AB24 H_D#33
6 H_ADSTB#0 ADSTB[0]# H_CPURST# 6 D[1]# D[33]#
B1 H_D#2 E26 V24 H_D#34
6 H_REQ#[4:0] RESET# D[2]# D[34]#
H_REQ#0 K3 F3 H_RS#0 H_D#3 H22 V26 H_D#35
REQ[0]# RS[0]# D[3]# D[35]#
DATA GRP 0
H_REQ#1 H2 H_RS#1 H_D#4 F23 H_D#36
DATA GRP 2
REQ[1]# RS[1]# F4 D[4]# D[36]# W25
H_REQ#2 K2 G3 H_RS#2 H_RS#[2:0] 6 H_D#5 G25 U23 H_D#37
H_REQ#3 J3 REQ[2]# RS[2]# H_D#6 E25 D[5]# D[37]# H_D#38
REQ[3]# TRDY# G2 H_TRDY# 6 D[6]# D[38]# U25
H_REQ#4 L5 H_D#7 E23 U22 H_D#39
H_A#[31:3] REQ[4]# H_D#8 K24 D[7]# D[39]# H_D#40
HIT# G6 H_HIT# 6 D[8]# D[40]# AB25
H_A#17 Y2 E4 H_D#9 G24 W22 H_D#41
A[17]# HITM# H_HITM# 6 D[9]# D[41]#
H_A#18 U5 H_D#10 J24 Y23 H_D#42
H_A#19 A[18]# H_D#11 J23 D[10 D[42]# H_D#43
R3 A[19]# BPM[0]# AD4 D[11]# D[43]# AA26
H_A#20 W6 AD3 XDP PU_R < 0.2" H_D#12 H26 Y26 H_D#44
A[20]# BPM[1]# D[12]# D[44]#
XDP/ITP SIGNALS
H_A#21 U4 AD1 H_D#13 F26 Y22 H_D#45
H_A#22 A[21]# BPM[2]# H_D#14 K22 D[13]# D[45]# H_D#46
Y5 A[22]# BPM[3]# AC4 D[14]# D[46]# AC26
H_A#23 U2 AC2 H_D#15 H25 AA24 H_D#47
H_A#24 A[23]# PRDY# XDP_BPM#5 +1.05V D[15]# D[47]#
R4 A[24]# PREQ# AC1 6 H_DSTBN#0 H23 DSTBN[0]# DSTBN[2]# W24 H_DSTBN#2 6
H_A#25 T5 AC5 XDP_TCK G22 Y25
A[25]# TCK 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 6
H_A#26 T3 AA6 XDP_TDI J26 V23
A[26]# TDI 6 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 6
H_A#27 W3 AB3 XDP_TDO
H_A#28 A[27]# TDO XDP_TMS H_D#[63:0] H_D#[63:0]
W5 A[28]# TMS AB5
H_A#29 Y4 AB6 XDP_TRST# R16 H_D#16 N22 AC22 H_D#48
H_A#30 A[29]# TRST# XDP_DBRESET# 75/F H_D#17 K25 D[16]# D[48]# H_D#49
W2 A[30]# DBR# C20 D[17]# D[49]# AC23
H_A#31 Y1 H_D#18 P26 AB22 H_D#50
A[31]# D[18]# D[50]#
6 H_ADSTB#1 V4 ADSTB[1]# PROCHOT D21 H_PROCHOT# H_D#19 R23
D[19]# D[51]# AA21 H_D#51
DATA GRP 1
A24 H_THERMDA H_D#20 L25 H_D#52
DATA GRP 3
THERMDA H_THERMDA 5 D[20]# D[52]# AB21
THERM
R3 39.2/F XDP_DBRESET# 0
SYS_RST# 14
XDP_TDI 1 2 PM_THRMTRIP# 1 3 THERM_CPUDIE_L# R97 0
THERM_CPUDIE# 36
R1 150/F
Q11
XDP_BPM#5 MMBT3904
R5 54.9/F
XDP_TDO 1 2 +5VRUN
R403 *51_NC
H_CPURST#
R402 54.9/F H_PROCHOT# +1.05V
R307
100K
3
XDP_TRST# 2 1
2
R2 680 Q3
2 DTC144EUA
36 FANLESS#
1
H_PROCHOT# 1 3 VR_TT# 37
Q2
1
D *MMBT3904 D
VGA_ALERT 19
3
Q4
2N7002K
2 PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
1
B1A
Yonah/Merom (Host)
Date: Thursday, March 09, 2006 Sheet 4 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+1.05V VCC_CORE
A7
U25C
AB20
VCC_CORE
+1.05V
VCC_CORE
+1.5V
+1.05V 4,6,7,9,10,12,15,41,43,44
VCC_CORE 37,43,44
A4
A8
A11
A14
A16
A19
U25D
VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
P6
P21
P24
R2
R5
R22
5
VCC[001] VCC[68] +1.5V 7,9,10,13,15,33,41,43,44 VSS[006] VSS[087]
A9 VCC[002] VCC[69] AB7 A23 VSS[007] VSS[088] R25
C53 C16 C52 C17 C3 C4 A10 AC7 A26 T1
0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V VCC[003] VCC[70] VSS[008] VSS[089]
A12 VCC[004] VCC[71] AC9 B6 VSS[009] VSS[090] T4
A13 VCC[005] VCC[72] AC12 B8 VSS[010] VSS[091] T23
A
A15 VCC[006] VCC[73] AC13 B11 VSS[011] VSS[092] T26 A
A17 VCC[007] VCC[74] AC15 B13 VSS[012] VSS[093] U3
A18 VCC[008] VCC[75] AC17 B16 VSS[013] VSS[094] U6
A20 VCC[009] VCC[76] AC18 B19 VSS[014] VSS[095] U21
B7 VCC[010] VCC[77] AD7 B21 VSS[015] VSS[096] U24
B9 VCC[011] VCC[78] AD9 B24 VSS[016] VSS[097] V2
B10 VCC[012] VCC[79] AD10 C5 VSS[017] VSS[098] V5
VCC_CORE B12 AD12 C8 V22
VCC[013] VCC[80] VSS[018] VSS[099]
CH6222M9A01 B14 VCC[014] VCC[81] AD14 C11 VSS[019] VSS[100] V25
22UF/10V/X5R B15 VCC[015] VCC[82] AD15 C14 VSS[020] VSS[101] W1
B17 VCC[016] VCC[83] AD17 C16 VSS[021] VSS[102] W4
B18 VCC[017] VCC[84] AD18 C19 VSS[022] VSS[103] W23
C18 C36 C41 C34 B20 AE9 C2 W26
22u/10V_8 22u/10V_8 22u/10V_8 22u/10V_8 VCC[018] VCC[85] VSS[023] VSS[104]
C9 VCC[019] VCC[86] AE10 C22 VSS[024] VSS[105] Y3
C10 VCC[020] VCC[87] AE12 C25 VSS[025] VSS[106] Y6
C12 VCC[021] VCC[88] AE13 D1 VSS[026] VSS[107] Y21
C13 VCC[022] VCC[89] AE15 D4 VSS[027] VSS[108] Y24
C15 VCC[023] VCC[90] AE17 D8 VSS[028] VSS[109] AA2
C19 C20 C38 C51 C17 AE18 D11 AA5
22u/10V_8 22u/10V_8 22u/10V_8 22u/10V_8 VCC[024] VCC[91] VSS[029] VSS[110]
C18 VCC[025] VCC[92] AE20 D13 VSS[030] VSS[111] AA8
D9 VCC[026] VCC[93] AF9 D16 VSS[031] VSS[112] AA11
D10 VCC[027] VCC[94] AF10 D19 VSS[032] VSS[113] AA14
D12 VCC[028] VCC[95] AF12 D23 VSS[033] VSS[114] AA16
D14 VCC[029] VCC[96] AF14 D26 VSS[034] VSS[115] AA19
C35 C46 C47 C21 D15 AF15 E3 AA22
22u/10V_8 22u/10V_8 22u/10V_8 22u/10V_8 VCC[030] VCC[97] VSS[035] VSS[116]
D17 VCC[031] VCC[98] AF17 E6 VSS[036] VSS[117] AA25
D18 VCC[032] VCC[99] AF18 E8 VSS[037] VSS[118] AB1
E7 AF20 +1.05V E11 AB4
VCC[033] VCC[100] VSS[038] VSS[119]
E9 VCC[034] E14 VSS[039] VSS[120] AB8
E10 VCC[035] VCCP[01] V6 E16 VSS[040] VSS[121] AB11
B C32 C44 C37 C33 E12 G21 C2 ESR :12m ohm E19 AB13 B
22u/10V_8 22u/10V_8 22u/10V_8 22u/10V_8 VCC[036] VCCP[02] VSS[041] VSS[122]
E13 VCC[037] VCCP[03] J6 E21 VSS[042] VSS[123] AB16
330U/2.5V/ESR-9/POS
E15 K6 + E24 AB19
VCC[038] VCCP[04] VSS[043] VSS[124]
E17 VCC[039] VCCP[05] M6 F5 VSS[044] VSS[125] AB23
E18 VCC[040] VCCP[06] J21 F8 VSS[045] VSS[126] AB26
+3VRUN E20 K21 +1.5V F11 AC3
C49 C26 C15 C45 VCC[041] VCCP[07] VSS[046] VSS[127]
F7 VCC[042] VCCP[08] M21 F13 VSS[047] VSS[128] AC6
22u/10V_8 22u/10V_8 22u/10V_8 22u/10V_8 F9 N21 F16 AC8
VCC[043] VCCP[09] VSS[048] VSS[129]
F10 VCC[044] VCCP[10] N6 F19 VSS[049] VSS[130] AC11
F12 VCC[045] VCCP[11] R21 F2 VSS[050] VSS[131] AC14
F14 VCC[046] VCCP[12] R6 F22 VSS[051] VSS[132] AC16
+3VRUN F15 T21 C603 C604 F25 AC19
R27 R28 C30 C25 C50 C27 VCC[047] VCCP[13] VSS[052] VSS[133]
F17 VCC[048] VCCP[14] T6 G4 VSS[053] VSS[134] AC21
10K 10K 22u/10V_8 22u/10V_8 22u/10V_8 22u/10V_8 F18 V21 0.01u/16V 10u/10V_8 G1 AC24
VCC[049] VCCP[15] +1.5V VSS[054] VSS[135]
F20 VCC[050] VCCP[16] W21 G23 VSS[055] VSS[136] AD2
2
LM86_SMC 8 1
SCLK VCC H_THERMDA
H_THERMDA 4
LM86_SMD 7 2
SDA DXP C85
THERM_ALERT# 6 3 2200p/50V +3VRUN
14 THERM_ALERT# ALERT# DXN
4 5 H_THERMDC
OVERT# GND H_THERMDC 4
R20
MAX6657/GMT-781 *10K
ADDRESS: 98H
D D
THERM_OVER# 19,38
H_XRCOMP
R323 15 mils/10mils
4 H_D#[63:0]
H_D#0
H_D#1
F1
U32A
H_D#_0 H_A#_3 H9 H_A#3
H_A#4
H_A#[31:3] 4
+1.05V
6
J1 H_D#_1 H_A#_4 C9 +1.05V 4,5,7,9,10,12,15,41,43,44
24.9/F H_D#2 H1 E11 H_A#5
A H_D#3 H_D#_2 H_A#_5 H_A#6 A
J6 H_D#_3 H_A#_6 G11
H_D#4 H3 F11 H_A#7
H_D#5 H_D#_4 H_A#_7 H_A#8
K2 H_D#_5 H_A#_8 G12
H_D#6 G1 F9 H_A#9
H_D#7 H_D#_6 H_A#_9 H_A#10
G2 H_D#_7 H_A#_10 H11
H_D#8 K9 J12 H_A#11
+1.05V H_D#9 H_D#_8 H_A#_11 H_A#12
K1 H_D#_9 H_A#_12 G14
H_D#10 K7 D9 H_A#13
H_D#11 H_D#_10 H_A#_13 H_A#14
J8 H_D#_11 H_A#_14 J14
H_D#12 H4 H13 H_A#15
R322 H_D#13 H_D#_12 H_A#_15 H_A#16
J3 H_D#_13 H_A#_16 J15
54.9/F H_D#14 K11 F14 H_A#17
H_D#15 H_D#_14 H_A#_17 H_A#18
G4 H_D#_15 H_A#_18 D12
H_XSCOMP H_D#16 T10 A11 H_A#19
H_D#17 H_D#_16 H_A#_19 H_A#20
W11 H_D#_17 H_A#_20 C11
H_D#18 T3 A12 H_A#21
H_D#19 H_D#_18 H_A#_21 H_A#22
U7 H_D#_19 H_A#_22 A13
+1.05V H_D#20 U9 E13 H_A#23
H_D#21 H_D#_20 H_A#_23 H_A#24
U11 H_D#_21 H_A#_24 G13
H_D#22 T11 F12 H_A#25
H_D#23 H_D#_22 H_A#_25 H_A#26
W9 H_D#_23 H_A#_26 B12
H_D#24 T1 B14 H_A#27
R33 H_D#25 H_D#_24 H_A#_27 H_A#28
T8 H_D#_25 H_A#_28 C12
221/F H_D#26 T4 A14 H_A#29 +1.05V
B H_D#_26 H_A#_29 B
H_D#27 W7 C14 H_A#30
H_XSWING H_D#28 H_D#_27 H_A#_30 H_A#31
U5 H_D#_28 H_A#_31 D14
H_D#29 T9
H_D#30 H_D#_29 R48
W6 H_D#_30 H_ADS# E8 H_ADS# 4
H_D#31 T5 B9 100/F
H_D#_31 H_ADSTB#_0 H_ADSTB#0 4
R32 C120 H_D#32 AB7 C13
H_D#_32 H_ADSTB#_1 H_ADSTB#1 4
100/F H_D#33 AA9 J13 H_VREF
0.1u/10V H_D#34 H_D#_33 H_VREF_0
W4 H_D#_34 H_BNR# C6 H_BNR# 4
H_D#35 W3 F6
HOST
H_D#_35 H_BPRI# H_BPRI# 4
H_D#36 Y3 C7 C145 R43
H_D#_36 H_BREQ#0 H_BREQ#0 4
H_D#37 Y7 B7 0.1u/10V 200/F
H_D#_37 H_CPURST# H_CPURST# 4
H_D#38 W5 A7
H_D#_38 H_DBSY# H_DBSY# 4
H_D#39 Y10 C3
+1.05V H_D#_39 H_DEFER# H_DEFER# 4
H_D#40 AB8 J9
H_D#_40 H_DPWR# H_DPWR# 4
H_D#41 W2 H8
H_D#_41 H_DRDY# H_DRDY# 4
H_D#42 AA4 K13 H_VREF
H_D#43 H_D#_42 H_VREF_1
AA7 H_D#_43 H_DINV#[3:0] 4
R324 H_D#44 AA2 J7 H_DINV#0
54.9/F H_D#45 H_D#_44 H_DINV#_0 H_DINV#1 C151
AA6 H_D#_45 H_DINV#_1 W8
H_D#46 AA10 U3 H_DINV#2 0.1u/10V
H_YSCOMP H_D#47 H_D#_46 H_DINV#_2 H_DINV#3
Y8 H_D#_47 H_DINV#_3 AB10
H_D#48 AA1 H_D#_48 H_DSTBN#[3:0] 4
H_D#49 AB4 K4 H_DSTBN#0
H_D#50 H_D#_49 H_DSTBN#_0 H_DSTBN#1
C AC9 H_D#_50 H_DSTBN#_1 T7 C
+1.05V H_D#51 AB11 Y5 H_DSTBN#2
H_D#52 H_D#_51 H_DSTBN#_2 H_DSTBN#3
AC11 H_D#_52 H_DSTBN#_3 AC4
H_D#53 AB3 H_D#_53 H_DSTBP#[3:0] 4
H_D#54 AC2 K3 H_DSTBP#0
H_D#55 H_D#_54 H_DSTBP#_0 H_DSTBP#1
AD1 H_D#_55 H_DSTBP#_1 T6
R325 H_D#56 AD9 AA5 H_DSTBP#2
221/F H_D#57 H_D#_56 H_DSTBP#_2 H_DSTBP#3
AC1 H_D#_57 H_DSTBP#_3 AC5
H_D#58 AD7
H_YSWING H_D#59 H_D#_58
AC6 H_D#_59
H_D#60 AB5 D3
H_D#_60 H_HIT# H_HIT# 4
H_D#61 AD10 D4
H_D#_61 H_HITM# H_HITM# 4
H_D#62 AD4 B3
H_D#_62 H_LOCK# H_LOCK# 4
R326 C609 H_D#63 AC8
100/F H_D#_63
0.1u/10V H_XRCOMP E1 H_XRCOMP H_REQ#[4:0] 4
H_XSCOMP E2 D8 H_REQ#0
H_XSWING H_XSCOMP H_REQ#_0 H_REQ#1
E4 H_XSWING H_REQ#_1 G8
B8 H_REQ#2
H_YRCOMP H_REQ#_2 H_REQ#3
Y1 H_YRCOMP H_REQ#_3 F8
H_YSCOMP U1 A8 H_REQ#4
H_YRCOMP H_YSWING H_YSCOMP H_REQ#_4
W1 H_YSWING H_RS#[2:0] 4
T51 PAD B4 H_RS#0
H_RS#_0 H_RS#1
3 CLK_MCH_BCLK AG2 H_CLKIN H_RS#_1 E6
D R327 AG1 D6 H_RS#2 D
3 CLK_MCH_BCLK# H_CLKIN# H_RS#_2
24.9/F T50 PAD
H_SLPCPU# E3 H_CPUSLP# 4,12
15 mils/10mils E7 H_TRDY# 4
Short Stub < 100mils
945PM
H_TRDY#
PROJECT : TW3
extract from same point
Quanta Computer Inc.
Size Document Number Rev
B1A
Calistoga_A(Host)
Date: Thursday, March 09, 2006 Sheet 6 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
PAD T20
PADT20
CLK_MCH_OE# H32
T32
R32
F3
F7
RSVD_0
RSVD_1
RSVD_2
RSVD_3
U32B
SM_CK_0
SM_CK_1
SM_CK_2
AY35
AR1
AW7
AW40
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
16
16
16
U32C
7 +V1.5_PCIE
RSVD
AG11 RSVD_5 D32 L_BKLTCTL EXP_A_COMPI D40 EXP_A_COMPX R107 24.9/F
AF11 RSVD_6 SM_CK#_0 AW35 M_CLK_DDR#0 16 J30 L_BKLTEN EXP_A_COMPO D38
H7 RSVD_7 SM_CK#_1 AT1 M_CLK_DDR#1 16 H30 L_CLKCTLA PEG_RXN[15:0] 18
J19 AY7 H29 F34 PEG_RXN0
RSVD_8 SM_CK#_2 M_CLK_DDR#2 16 L_CLKCTLB EXP_A_RXN_0
K30 AY40 G26 G38 PEG_RXN1
RSVD_9 SM_CK#_3 M_CLK_DDR#3 16 L_DDC_CLK EXP_A_RXN_1
J29 G25 H34 PEG_RXN2
A RSVD_10 L_DDC_DATA EXP_A_RXN_2 PEG_RXN3 A
A41 RSVD_11 SM_CKE_0 AU20 M_CKE0 16,17 B38 L_IBG EXP_A_RXN_3 J38
A35 AT20 C35 L34 PEG_RXN4
RSVD_12 SM_CKE_1 M_CKE1 16,17 L_VBG EXP_A_RXN_4
A34 BA29 F32 M38 PEG_RXN5
RSVD_13 SM_CKE_2 M_CKE2 16,17 L_VDDEN EXP_A_RXN_5
D28 AY29 C33 N34 PEG_RXN6
RSVD_14 SM_CKE_3 M_CKE3 16,17 L_VREFH EXP_A_RXN_6
D27 C32 P38 PEG_RXN7
RSVD_15 L_VREFL EXP_A_RXN_7 PEG_RXN8
SM_CS#_0 AW13 M_CS#0 16,17 EXP_A_RXN_8 R34
AW12 A33 T38 PEG_RXN9
SM_CS#_1 M_CS#1 16,17 LA_CLK# EXP_A_RXN_9
MUXING
3,4 CPU_MCH_BSEL0 K16 CFG_0 SM_CS#_2 AY21 M_CS#2 16,17 A32 LA_CLK EXP_A_RXN_10 V34 PEG_RXN10
3,4 CPU_MCH_BSEL1 K18 CFG_1 SM_CS#_3 AW21 M_CS#3 16,17 E27 LB_CLK# EXP_A_RXN_11 W38 PEG_RXN11
3,4 CPU_MCH_BSEL2 J18 CFG_2 E26 LB_CLK EXP_A_RXN_12 Y34 PEG_RXN12
MCH_CFG_3 F18 AL20 M_OCDCOMP_0 AA38 PEG_RXN13
PAD T5 CFG_3 SM_OCDCOMP_0 EXP_A_RXN_13
LVDS
MCH_CFG_4 E15 AF10 M_OCDCOMP_1 C37 AB34 PEG_RXN14
PAD T4 MCH_CFG_5 CFG_4 SM_OCDCOMP_1 LA_DATA#_0 EXP_A_RXN_14
F15 CFG_5 B35 LA_DATA#_1 EXP_A_RXN_15 AC38 PEG_RXN15
PAD T2 MCH_CFG_6 E18 CFG_6 SM_ODT_0 BA13 M_ODT0 16,17 A37 LA_DATA#_2 PEG_RXP[15:0] 18
MCH_CFG_7 D19 BA12 D34 PEG_RXP0
CFG_7 SM_ODT_1 M_ODT1 16,17 EXP_A_RXP_0
PAD T8 MCH_CFG_8 D16 AY20 R44 R74 F38 PEG_RXP1
M_ODT2 16,17
GRAPHICS
CFG_8 SM_ODT_2 EXP_A_RXP_1
CFG
MCH_CFG_9 G16 AU21 *40.2/F/B *40.2/F/B G34 PEG_RXP2
CFG_9 SM_ODT_3 M_ODT3 16,17 EXP_A_RXP_2
MCH_CFG_10 E16 B37 H38 PEG_RXP3
DDR
MCH_CFG_11 CFG_10 M_RCOMP# LA_DATA_0 EXP_A_RXP_3 PEG_RXP4
D15 CFG_11 SM_RCOMP# AV9 B34 LA_DATA_1 EXP_A_RXP_4 J34
MCH_CFG_12 G15 AT9 M_RCOMP A36 L38 PEG_RXP5
MCH_CFG_13 CFG_12 SM_RCOMP LA_DATA_2 EXP_A_RXP_5 PEG_RXP6
9 MCH_CFG_13 K15 CFG_13 EXP_A_RXP_6 M34
PAD T55 MCH_CFG_14 C15 AK1 SMDDR_VREF N38 PEG_RXP7
MCH_CFG_15 CFG_14 SM_VREF_0 SMDDR_VREF EXP_A_RXP_7 PEG_RXP8
PAD T7 H16 CFG_15 SM_VREF_1 AK41 G30 LB_DATA#_0 EXP_A_RXP_8 P34
MCH_CFG_16 G18 D30 R38 PEG_RXP9
MCH_CFG_17 CFG_16 LB_DATA#_1 EXP_A_RXP_9 PEG_RXP10
PAD T54 H15 CFG_17 F29 LB_DATA#_2 EXP_A_RXP_10 T34
MCH_CFG_18 J25 AF33 V38 PEG_RXP11
CFG_18 G_CLKIN# CLK_PCIE_3GPLL# 3 EXP_A_RXP_11
MCH_CFG_19 K27 AG33 W34 PEG_RXP12
CFG_19 G_CLKIN CLK_PCIE_3GPLL 3 EXP_A_RXP_12
MCH_CFG_20 J26 CLK A27 C683 C682 Y38 PEG_RXP13
CFG_20 D_REFCLKIN# EXP_A_RXP_13 PEG_RXP14
D_REFCLKIN A26 +1.5V F30 LB_DATA_0 EXP_A_RXP_14 AA34
B 14 PM_BMBUSY# G28 C40 0.1u/10V 0.1u/10V D29 AB38 PEG_RXP15 B
PCI-EXPRESS
PM_BMBUSY# D_REFSSCLKIN# LB_DATA_1 EXP_A_RXP_15
16 PM_EXTTS#0 F25 PM_EXTTS#_0 D_REFSSCLKIN D41 F28 LB_DATA_2
PM
14 PM_EXTTS#1 H26 PM_EXTTS#_1 DMI_TXN[3:0] 13 EXP_A_TXN_0 F36 C_PEG_TXN0 C351 0.1u/10V PEG_TXN0
4,12 PM_THRMTRIP# G6 PM_THRMTRIP# EXP_A_TXN_1 G40 C_PEG_TXN1 C667 0.1u/10V PEG_TXN1
AH33 AE35 DMI_TXN0 +1.5V H36 C_PEG_TXN2 C366 0.1u/10V PEG_TXN2
14,37 DELAY_VR_PWRGOOD PWROK DMI_RXN_0 EXP_A_TXN_2
AH34 AF39 DMI_TXN1 J40 C_PEG_TXN3 C669 0.1u/10V PEG_TXN3
R111 RST IN# MCH RSTIN# DMI_RXN_1 DMI_TXN2 EXP_A_TXN_3
13 PLT_RST-R# DMI_RXN_2 AG35 A16 TV_DACA_OUT EXP_A_TXN_4 L36 C_PEG_TXN4 C372 0.1u/10V PEG_TXN4
100/F AH39 DMI_TXN3 C18 M40 C_PEG_TXN5 C671 0.1u/10V PEG_TXN5
DMI_RXN_3 TV_DACB_OUT EXP_A_TXN_5
MISC
PAD T18 H28 SDVO_CTRLCLK A19 TV_DACC_OUT EXP_A_TXN_6 N36 C_PEG_TXN6 C374 0.1u/10V PEG_TXN6
TV
PAD T17 H27 SDVO_CTRLDATA EXP_A_TXN_7 P40 C_PEG_TXN7 C673 0.1u/10V PEG_TXN7
+3VRUN K28 AC35 DMI_TXP0 J20 R36 C_PEG_TXN8 C376 0.1u/10V PEG_TXN8
R90 *10K/F/B LT_RESET# DMI_RXP_0 DMI_TXP1 TV_IREF EXP_A_TXN_8
13 MCH_ICH_SYNC DMI_RXP_1 AE39 B16 TV_IRTNA EXP_A_TXN_9 T40 C_PEG_TXN9 C675 0.1u/10V PEG_TXN9
AF35 DMI_TXP2 B18 V36 C_PEG_TXN10 C378 0.1u/10V PEG_TXN10
DMI_RXP_2 DMI_TXP3 TV_IRTNB EXP_A_TXN_10
D1 NC0 DMI_RXP_3 AG39 DMI_TXP[3:0] 13 B19 TV_IRTNC EXP_A_TXN_11 W40 C_PEG_TXN11 C677 0.1u/10V PEG_TXN11
C41 NC1 DMI_RXN[3:0] 13 EXP_A_TXN_12 Y36 C_PEG_TXN12 C380 0.1u/10V PEG_TXN12
C1 NC2 EXP_A_TXN_13 AA40 C_PEG_TXN13 C679 0.1u/10V PEG_TXN13
BA41 NC3 DMI_TXN_0 AE37 DMI_RXN0 EXP_A_TXN_14 AB36 C_PEG_TXN14 C382 0.1u/10V PEG_TXN14
BA40 AF41 DMI_RXN1 +1.05V AC40 C_PEG_TXN15 C681 0.1u/10V PEG_TXN15
NC4 DMI_TXN_1 EXP_A_TXN_15
NC
VGA
B41 NC9 DMI_TXP_0 AC37 DMI_RXP0 B22 CRT_GREEN# EXP_A_TXP_3 H40 C_PEG_TXP3 C668 0.1u/10V PEG_TXP3
B2 NC10 DMI_TXP_1 AE41 DMI_RXP1 A21 CRT_RED EXP_A_TXP_4 J36 C_PEG_TXP4 C371 0.1u/10V PEG_TXP4
AY41 NC11 DMI_TXP_2 AF37 DMI_RXP2 B21 CRT_RED# EXP_A_TXP_5 L40 C_PEG_TXP5 C670 0.1u/10V PEG_TXP5
AY1 NC12 DMI_TXP_3 AG41 DMI_RXP3 EXP_A_TXP_6 M36 C_PEG_TXP6 C373 0.1u/10V PEG_TXP6
AW41 NC13 EXP_A_TXP_7 N40 C_PEG_TXP7 C672 0.1u/10V PEG_TXP7
AW1 +1.05V C26 P36 C_PEG_TXP8 C375 0.1u/10V PEG_TXP8
NC14 CRT_DDC_CLK EXP_A_TXP_8
A40 NC15 C25 CRT_DDC_DATA EXP_A_TXP_9 R40 C_PEG_TXP9 C674 0.1u/10V PEG_TXP9
C
A4 NC16 DMI_RXP[3:0] 13 G23 CRT_HSYNC EXP_A_TXP_10 T36 C_PEG_TXP10 C377 0.1u/10V PEG_TXP10
C
A39 NC17 J22 CRT_IREF EXP_A_TXP_11 V40 C_PEG_TXP11 C676 0.1u/10V PEG_TXP11
A3 NC18 H23 CRT_VSYNC EXP_A_TXP_12 W36 C_PEG_TXP12 C379 0.1u/10V PEG_TXP12
EXP_A_TXP_13 Y40 C_PEG_TXP13 C678 0.1u/10V PEG_TXP13
945PM EXP_A_TXP_14 AA36 C_PEG_TXP14 C381 0.1u/10V PEG_TXP14
EXP_A_TXP_15 AB40 C_PEG_TXP15 C680 0.1u/10V PEG_TXP15
945PM
1.8VSUS
+3VRUN
PEG_TXP0 PEG_TXP[15:0] 18
R82 10K PM_EXTTS#0
R38 PEG_TXP1
80.6/F PEG_TXP2
PEG_TXP3 PEG_TXN[15:0] 18
R85 *10K/F PM_EXTTS#1
M_RCOMP# PEG_TXP4 PEG_TXN0
PEG_TXP5 PEG_TXN1
M_RCOMP PEG_TXP6 PEG_TXN2
PEG_TXP7 PEG_TXN3
PEG_TXP8 PEG_TXN4
PEG_TXP9 PEG_TXN5
R39 PEG_TXP10 PEG_TXN6
80.6/F PEG_TXP11 PEG_TXN7
PEG_TXP12 PEG_TXN8
PEG_TXP13 PEG_TXN9
PEG_TXP14 PEG_TXN10
PEG_TXP15 PEG_TXN11
PEG_TXN12
PEG_TXN13
D PEG_TXN14 D
PEG_TXN15
+V1.5_PCIE +V1.5_PCIE 10
+3VRUN +3VRUN 3,5,9,10,12,13,14,15,16,18,19,22,23,27,28,29,33,34,35,36,42,43,44
SMDDR_VREF SMDDR_VREF 16,39,44
1.8VSUS 1.8VSUS 9,16,39,43,44
PROJECT : TW3
Quanta Computer Inc.
MCH_CFG_[12:5] Size Document Number Rev
9 MCH_CFG_[12:5] MCH_CFG_[20:16] B1A
9 MCH_CFG_[20:16] Calistoga_B(VGA,DMI)
Date: Thursday, March 09, 2006 Sheet 7 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
8
A A
16 M_B_DQ[63:0]
U32E
M_B_DQ0 AK39
M_B_DQ1 SB_DQ0
AJ37 SB_DQ1 SB_BS_0 AT24 M_B_BS#0 16,17
M_B_DQ2 AP39 AV23
SB_DQ2 SB_BS_1 M_B_BS#1 16,17
M_B_DQ3 AR41 AY28
16 M_A_DQ[63:0] SB_DQ3 SB_BS_2 M_B_BS#2 16,17
U32D M_B_DQ4 AJ38 SB_DQ4 M_B_CAS# 16,17
M_A_DQ0 AJ35 AU12 M_A_BS#0 M_B_DQ5 AK38 AR24
SA_DQ0 SA_BS_0 M_A_BS#0 16,17 SB_DQ5 SB_CAS# M_B_DM[7:0] 16
M_A_DQ1 AJ34 AV14 M_A_BS#1 M_B_DQ6 AN41 AK36 M_B_DM0
SA_DQ1 SA_BS_1 M_A_BS#1 16,17 SB_DQ6 SB_DM_0
M_A_DQ2 AM31 BA20 M_A_BS#2 M_B_DQ7 AP41 AR38 M_B_DM1
SA_DQ2 SA_BS_2 M_A_BS#2 16,17 SB_DQ7 SB_DM_1
M_A_DQ3 AM33 M_B_DQ8 AT40 AT36 M_B_DM2
SA_DQ3 M_A_CAS# 16,17 SB_DQ8 SB_DM_2
M_A_DQ4 AJ36 AY13 M_A_CAS# M_B_DQ9 AV41 BA31 M_B_DM3
SA_DQ4 SA_CAS# M_A_DM[7:0] 16 SB_DQ9 SB_DM_3
M_A_DQ5 AK35 AJ33 M_A_DM0 M_B_DQ10 AU38 AL17 M_B_DM4
M_A_DQ6 SA_DQ5 SA_DM_0 M_A_DM1 M_B_DQ11 SB_DQ10 SB_DM_4 M_B_DM5
AJ32 SA_DQ6 SA_DM_1 AM35 AV38 SB_DQ11 SB_DM_5 AH8
M_A_DQ7 AH31 AL26 M_A_DM2 M_B_DQ12 AP38 BA5 M_B_DM6
M_A_DQ8 SA_DQ7 SA_DM_2 M_A_DM3 M_B_DQ13 SB_DQ12 SB_DM_6 M_B_DM7
AN35 SA_DQ8 SA_DM_3 AN22 AR40 SB_DQ13 SB_DM_7 AN4
M_A_DQ9 AP33 AM14 M_A_DM4 M_B_DQ14 AW38
SA_DQ9 SA_DM_4 SB_DQ14 M_B_DQS[7:0] 16
M_A_DQ10 AR31 AL9 M_A_DM5 M_B_DQ15 AY38 AM39 M_B_DQS0
SA_DQ10 SA_DM_5 SB_DQ15
B
M_A_DQ11 M_A_DM6 M_B_DQ16 SB_DQS_0 M_B_DQS1
AP31 SA_DQ11 SA_DM_6 AR3 BA38 SB_DQ16 SB_DQS_1 AT39
M_A_DQ12 AN38 AH4 M_A_DM7 M_B_DQ17 AV36 AU35 M_B_DQS2
M_A_DQ13 SA_DQ12 SA_DM_7 M_B_DQ18 SB_DQ17 SB_DQS_2 M_B_DQS3
AM36 SA_DQ13 M_A_DQS[7:0] 16 AR36 SB_DQ18 SB_DQS_3 AR29
M_A_DQ14 AM34 AK33 M_A_DQS0 M_B_DQ19 AP36 AR16 M_B_DQS4
SA_DQ14
A
M_A_DQ15 SA_DQS_0 M_A_DQS1 M_B_DQ20 SB_DQ19 SB_DQS_4 M_B_DQS5
AN33 AT33 BA36 AR10
MEMORY
M_A_DQ16 SA_DQ15 SA_DQS_1 M_A_DQS2 M_B_DQ21 SB_DQ20 SB_DQS_5 M_B_DQS6
AK26 SA_DQ16 SA_DQS_2 AN28 AU36 SB_DQ21 SB_DQS_6 AR7
M_A_DQ17 AL27 AM22 M_A_DQS3 M_B_DQ22 AP35 AN5 M_B_DQS7
SA_DQ17 SA_DQS_3 SB_DQ22 SB_DQS_7 M_B_DQS#[7:0] 16
M_A_DQ18 AM26 AN12 M_A_DQS4 M_B_DQ23 AP34 AM40 M_B_DQS#0
M_A_DQ19 SA_DQ18 SA_DQS_4 M_A_DQS5 M_B_DQ24 SB_DQ23 SB_DQS#_0 M_B_DQS#1
AN24 AN8 AY33 AU39
MEMORY
M_A_DQ20 SA_DQ19 SA_DQS_5 M_A_DQS6 M_B_DQ25 SB_DQ24 SB_DQS#_1 M_B_DQS#2
B AK28 SA_DQ20 SA_DQS_6 AP3 BA33 SB_DQ25 SB_DQS#_2 AT35 B
M_A_DQ21 AL28 AG5 M_A_DQS7 M_B_DQ26 AT31 AP29 M_B_DQS#3
SA_DQ21 SA_DQS_7 M_A_DQS#[7:0] 16 SB_DQ26 SB_DQS#_3
M_A_DQ22 AM24 AK32 M_A_DQS#0 M_B_DQ27 AU29 AP16 M_B_DQS#4
M_A_DQ23 SA_DQ22 SA_DQS#_0 M_A_DQS#1 M_B_DQ28 SB_DQ27 SB_DQS#_4 M_B_DQS#5
AP26 SA_DQ23 SA_DQS#_1 AU33 AU31 SB_DQ28 SB_DQS#_5 AT10
M_A_DQ24 AP23 AN27 M_A_DQS#2 M_B_DQ29 AW31 AT7 M_B_DQS#6
M_A_DQ25 SA_DQ24 SA_DQS#_2 M_A_DQS#3 M_B_DQ30 SB_DQ29 SB_DQS#_6 M_B_DQS#7
AL22 SA_DQ25 SA_DQS#_3 AM21 AV29 SB_DQ30 SB_DQS#_7 AP5
M_A_DQ26 AP21 AM12 M_A_DQS#4 M_B_DQ31 AW29
SA_DQ26 SA_DQS#_4 SB_DQ31 M_B_A[13:0] 16,17
M_A_DQ27 AN20 AL8 M_A_DQS#5 M_B_DQ32 AM19 AY23 M_B_A0
M_A_DQ28 SA_DQ27 SA_DQS#_5 M_A_DQS#6 M_B_DQ33 SB_DQ32 SB_MA_0 M_B_A1
SYSTEM
AL23 SA_DQ28 SA_DQS#_6 AN3 AL19 SB_DQ33 SB_MA_1 AW24
M_A_DQ29 AP24 AH5 M_A_DQS#7 M_B_DQ34 AP14 AY24 M_B_A2
M_A_DQ30 SA_DQ29 SA_DQS#_7 M_B_DQ35 SB_DQ34 SB_MA_2 M_B_A3
AP20 SA_DQ30 M_A_A[13:0] 16,17 AN14 SB_DQ35 SB_MA_3 AR28
M_A_DQ31 AT21 AY16 M_A_A0 M_B_DQ36 AN17 AT27 M_B_A4
M_A_DQ32 SA_DQ31 SA_MA_0 M_A_A1 M_B_DQ37 SB_DQ36 SB_MA_4 M_B_A5
SYSTEM
DDR
M_A_DQ41 AN7 AU13 M_A_A10 M_B_DQ46 AK10
M_A_DQ42 SA_DQ41 SA_MA_10 M_A_A11 M_B_DQ47 SB_DQ46
AK8 SA_DQ42 SA_MA_11 AT17 AJ8 SB_DQ47 SB_RAS# AU23 M_B_RAS# 16,17
M_A_DQ43 AK7 AV20 M_A_A12 M_B_DQ48 BA10 AK16 TP_MB_RCVENIN#
M_A_DQ44 SA_DQ43 SA_MA_12 M_A_A13 M_B_DQ49 SB_DQ48 SB_RCVENIN# TP_MB_RCVENOUT# T1 PAD
AP9 SA_DQ44 SA_MA_13 AV12 AW10 SB_DQ49 SB_RCVENOUT# AK18 T9
DDR
D D
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
Calistoga_C(DDR)
Date: Thursday, March 09, 2006 Sheet 8 of 47
1 2 3 4 5 6 7 8
5 4 3 2 1
330U/2.5V/ESR-9/POS
9
W33 VCC_1 AC27 VCC_NCTF1 VSS_NCTF0 AE27
330U/2.5V/ESR-9/POS
P33 VCC_2
25mils + AB27 VCC_NCTF2 VSS_NCTF1 AE26
+ N33 C254 C178 C282 C194 C165 C147 AA27 AE25
VCC_3 C665 0.47U/10V_6 1u/10V 0.1u/10V 0.1u/10V 0.1u/10V VCC_NCTF3 VSS_NCTF2
L33 VCC_4 VCC_SM_0 AU41 Y27 VCC_NCTF4 VSS_NCTF3 AE24
J33 VCC_5 VCC_SM_1 AT41 VCC_SM1 W27 VCC_NCTF5 VSS_NCTF4 AE23
AA32 VCC_6 VCC_SM_2 AM41 VCC_SM2 C330 0.47U/10V_6 10u/10V_8 10u/10V_8 V27 VCC_NCTF6 VSS_NCTF5 AE22
Y32 VCC_7 VCC_SM_3 AU40 U27 VCC_NCTF7 VSS_NCTF6 AE21
W32 VCC_8 VCC_SM_4 BA34 T27 VCC_NCTF8 VSS_NCTF7 AE20
V32 VCC_9 VCC_SM_5 AY34 R27 VCC_NCTF9 VSS_NCTF8 AE19
P32 VCC_10 VCC_SM_6 AW34 AD26 VCC_NCTF10 VSS_NCTF9 AE18
1.8VSUS
N32 VCC_11 VCC_SM_7 AV34 120mils AC26 VCC_NCTF11 VSS_NCTF10 AC17
D
M32 VCC_12 VCC_SM_8 AU34 AB26 VCC_NCTF12 VSS_NCTF11 Y17 D
L32 VCC_13 VCC_SM_9 AT34 AA26 VCC_NCTF13 VSS_NCTF12 U17
J32 VCC_14 VCC_SM_10 AR34 Y26 VCC_NCTF14
AA31 BA30 + C201 W26
VCC_15 VCC_SM_11 C162 C176 C210 C159 C212 C132 VCC_NCTF15
W31 VCC_16 VCC_SM_12 AY30 V26 VCC_NCTF16
V31 AW30 2.5 0.47U/10V_6 0.1u/10V 0.1u/10V 0.1u/10V U26 +1.5V
VCC_17 VCC_SM_13 VCC_NCTF17
T31 VCC_18 VCC_SM_14 AV30 T26 VCC_NCTF18
R31 AU30 330u/2.5V 10u/10V_8 10u/10V_8 R26 AG27
VCC_19 VCC_SM_15 VCC_NCTF19 VCCAUX_NCTF0
P31 VCC_20 VCC_SM_16 AT30 AD25 VCC_NCTF20 VCCAUX_NCTF1 AF27 100mils
N31 VCC_21 VCC_SM_17 AR30 AC25 VCC_NCTF21 VCCAUX_NCTF2 AG26
M31 VCC_22 VCC_SM_18 AP30 AB25 VCC_NCTF22 VCCAUX_NCTF3 AF26
AA30 VCC_23 VCC_SM_19 AN30 AA25 VCC_NCTF23 VCCAUX_NCTF4 AG25
Y30 VCC_24 VCC_SM_20 AM30 Y25 VCC_NCTF24 VCCAUX_NCTF5 AF25
W30 VCC_25 VCC_SM_21 AM29 W25 VCC_NCTF25 VCCAUX_NCTF6 AG24
V30 VCC_26 VCC_SM_22 AL29 V25 VCC_NCTF26 VCCAUX_NCTF7 AF24
U30 VCC_27 VCC_SM_23 AK29 U25 VCC_NCTF27 VCCAUX_NCTF8 AG23
T30 VCC_28 VCC_SM_24 AJ29 T25 VCC_NCTF28 VCCAUX_NCTF9 AF23
R30 VCC_29 VCC_SM_25 AH29 R25 VCC_NCTF29 VCCAUX_NCTF10 AG22
P30 VCC_30 VCC_SM_26 AJ28 AD24 VCC_NCTF30 VCCAUX_NCTF11 AF22
N30 VCC_31 VCC_SM_27 AH28 AC24 VCC_NCTF31 VCCAUX_NCTF12 AG21
M30 VCC_32 VCC_SM_28 AJ27 AB24 VCC_NCTF32 VCCAUX_NCTF13 AF21
L30 VCC_33 VCC_SM_29 AH27 AA24 VCC_NCTF33 VCCAUX_NCTF14 AG20
AA29 VCC_34 VCC_SM_30 BA26 Y24 VCC_NCTF34 VCCAUX_NCTF15 AF20
Y29 VCC_35 VCC_SM_31 AY26 W24 VCC_NCTF35 VCCAUX_NCTF16 AG19
W29 VCC_36 VCC_SM_32 AW26 V24 VCC_NCTF36 VCCAUX_NCTF17 AF19
V29 VCC_37 VCC_SM_33 AV26 U24 VCC_NCTF37 VCCAUX_NCTF18 R19
U29 VCC_38 VCC_SM_34 AU26 T24 VCC_NCTF38 VCCAUX_NCTF19 AG18
R29 VCC_39 VCC_SM_35 AT26 R24 VCC_NCTF39 VCCAUX_NCTF20 AF18
P29 VCC_40 VCC_SM_36 AR26 AD23 VCC_NCTF40 VCCAUX_NCTF21 R18
M29 VCC_41 VCC_SM_37 AJ26 V23 VCC_NCTF41 VCCAUX_NCTF22 AG17
C L29 VCC_42 VCC_SM_38 AH26 U23 VCC_NCTF42 VCCAUX_NCTF23 AF17 C
AB28 VCC_43 VCC_SM_39 AJ25 T23 VCC_NCTF43 VCCAUX_NCTF24 AE17
AA28 VCC_44 VCC_SM_40 AH25 R23 VCC_NCTF44 VCCAUX_NCTF25 AD17
Y28 VCC_45 VCC_SM_41 AJ24 AD22 VCC_NCTF45 VCCAUX_NCTF26 AB17
V28 VCC_46 VCC_SM_42 AH24 V22 VCC_NCTF46 VCCAUX_NCTF27 AA17
U28 VCC_47 VCC_SM_43 BA23 U22 VCC_NCTF47 VCCAUX_NCTF28 W17
T28 VCC_48 VCC_SM_44 AJ23 place C50 on BA23 Ball T22 VCC_NCTF48 VCCAUX_NCTF29 V17
R28 BA22 C211 R22 T17
VCC_49 VCC_SM_45 0.47U/10V_6 VCC_NCTF49 VCCAUX_NCTF30
P28 AY22 AD21 R17
N28
M28
VCC_50
VCC_51
VCC_52
VCC_SM_46
VCC_SM_47
VCC_SM_48
AW22
AV22
V21
U21
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
NCTF VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
AG16
AF16
L28 VCC_53 VCC_SM_49 AU22 T21 VCC_NCTF53 VCCAUX_NCTF34 AE16
P27 VCC_54 VCC_SM_50 AT22 R21 VCC_NCTF54 VCCAUX_NCTF35 AD16
N27 VCC_55 VCC_SM_51 AR22 AD20 VCC_NCTF55 VCCAUX_NCTF36 AC16
M27 VCC_56 VCC_SM_52 AP22 V20 VCC_NCTF56 VCCAUX_NCTF37 AB16
L27 VCC_57 VCC_SM_53 AK22 U20 VCC_NCTF57 VCCAUX_NCTF38 AA16
P26 VCC_58 VCC_SM_54 AJ22 T20 VCC_NCTF58 VCCAUX_NCTF39 Y16
N26 AK21 5,7,10,13,15,33,41,43,44 +1.5V +1.5V R20 W16
VCC_59 VCC_SM_55 VCC_NCTF59 VCCAUX_NCTF40
L26 VCC_60 VCC_SM_56 AK20 AD19 VCC_NCTF60 VCCAUX_NCTF41 V16
N25 BA19 4,5,6,7,10,12,15,41,43,44 +1.05V +1.05V V19 U16
VCC_61 VCC_SM_57 VCC_NCTF61 VCCAUX_NCTF42
M25 VCC_62 VCC_SM_58 AY19 U19 VCC_NCTF62 VCCAUX_NCTF43 T16
L25 AW19 7,16,39,43,44 1.8VSUS 1.8VSUS T19 R16
VCC_63 VCC_SM_59 VCC_NCTF63 VCCAUX_NCTF44
P24 VCC_64 VCC_SM_60 AV19 AD18 VCC_NCTF64 VCCAUX_NCTF45 AG15
N24 VCC_65 VCC_SM_61 AU19 AC18 VCC_NCTF65 VCCAUX_NCTF46 AF15
M24 VCC_66 VCC_SM_62 AT19 AB18 VCC_NCTF66 VCCAUX_NCTF47 AE15
AB23 VCC_67 VCC_SM_63 AR19 AA18 VCC_NCTF67 VCCAUX_NCTF48 AD15
AA23 AP19 Y18 AC15
Y23
P23
VCC_68
VCC_69
VCC_70
VCC VCC_SM_64
VCC_SM_65
VCC_SM_66
AK19
AJ19
W18
V18
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
AB15
AA15
B
N23 VCC_71 VCC_SM_67 AJ18 U18 VCC_NCTF71 VCCAUX_NCTF52 Y15 B
M23 VCC_72 VCC_SM_68 AJ17 T18 VCC_NCTF72 VCCAUX_NCTF53 W15
L23 VCC_73 VCC_SM_69 AH17 VCCAUX_NCTF54 V15
AC22 VCC_74 VCC_SM_70 AJ16 VCCAUX_NCTF55 U15
AB22 AH16 place C51 on BA15 Ball Depopulate R2504 for Calistoga-Allen T15
VCC_75 VCC_SM_71 VCCAUX_NCTF56
Y22 VCC_76 VCC_SM_72 BA15 VCCAUX_NCTF57 R15
W22 VCC_77 VCC_SM_73 AY15 GMCH Strap pin
P22 AW15 C183 945PM
VCC_78 VCC_SM_74 0.47U/10V_6
N22 VCC_79 VCC_SM_75 AV15
M22 AU15 R62 *2.2K/B
VCC_80 VCC_SM_76 7 MCH_CFG_5 1.MCH_CFG_5 Low = DMI X2, High=DMIX4
L22 VCC_81 VCC_SM_77 AT15
AC21 VCC_82 VCC_SM_78 AR15
AA21 AJ15 R67 *2.2K/B 2.MCH_CFG_6 DDR : Low =Moby Dick, High= Calistoga (Default)
VCC_83 VCC_SM_79 MCH_CFG_6 shall be PH !! 7 MCH_CFG_6
W21 VCC_84 VCC_SM_80 AJ14
N21 AJ13 depopulate R2504 if use Calistoga 3.MCH_CFG_7 CPU Strap Low=RSVD, High=Mobile CPU
VCC_85 VCC_SM_81 R70 *2.2K/B
M21 VCC_86 VCC_SM_82 AH13 7 MCH_CFG_7
L21 AK12 4.MCH_CFG_9 PCI Exp Graphics Lane: Low =Reserved,High=Mobility
VCC_87 VCC_SM_83
AC20 VCC_88 VCC_SM_84 AJ12
AB20 AH12 R66 *2.2K/B 5.MCH_CFG_10 Host PLL VCC Select: Low=Reserved, High=Mobility
VCC_89 VCC_SM_85 7 MCH_CFG_9
Y20 VCC_90 VCC_SM_86 AG12
W20 AK11 6.MCH_CFG_11: Low=Calistoga, High=Reserved
VCC_91 VCC_SM_87 R63 *2.2K/B
P20 VCC_92 VCC_SM_88 BA8 7 MCH_CFG_10
N20 AY8 7.MCH_CFG_16 FSB Dynmic ODT: Low=Dynamic ODT Disabled,
VCC_93 VCC_SM_89 High=Dynamic ODT Enabled.
M20 VCC_94 VCC_SM_90 AW8
L20 AV8 R59 *2.2K/B
VCC_95 VCC_SM_91 7 MCH_CFG_11 8.MCH_CFG_18 VCC Select: LOW=1.05V, High=1.5V
AB19 VCC_96 VCC_SM_92 AT8
AA19 VCC_97 VCC_SM_93 AR8
Y19 AP8 R58 *2.2K 9.MCH_CFG_19 DMI LANE Reversal:Low=Normal,High=LANES Reversed.
VCC_98 VCC_SM_94 7 MCH_CFG_12
N19 VCC_99 VCC_SM_95 BA6
M19 AY6 10.MCH_CFG_20 PCIE Backward interpoerability mode: Low= only SDVO
VCC_100 VCC_SM_96 R60 *2.2K or PCIE x1 is operational (defaults) ,High=SDVO and PCIE x1 are
A L19 VCC_101 VCC_SM_97 AW6 7 MCH_CFG_13 A
N18 AV6 operation simultaneously via the PEG port.
VCC_102 VCC_SM_98
M18 VCC_103 VCC_SM_99 AT6 intel WW51 recommand
L18 AR6 R71 *2.2K/B +3VRUN
VCC_104 VCC_SM_100 7 MCH_CFG_16
P17 VCC_105 VCC_SM_101 AP6
N17 VCC_106 VCC_SM_102 AN6
M17 AL6 25mils R79 *1K/F/B
7 MCH_CFG_18
N16
VCC_107
VCC_108
VCC_SM_103
VCC_SM_104 AK6 PROJECT : TW3
M16 AJ6
L16
VCC_109
VCC_110
VCC_SM_105
VCC_SM_106 AV1 VCC_SM106 C110
AJ1 VCC_SM107
0.47U/10V_6
7 MCH_CFG_19
R88 *1K/F/B +3VRUN Quanta Computer Inc.
VCC_SM_107 C122 0.47U/10V_6 Size Document Number Rev
B1A
945PM 7 MCH_CFG_20
R87 *1K/F/B +3VRUN Calistoga_D(POWER)
25mils
Date: Thursday, March 09, 2006 Sheet 9 of 47
5 4 3 2 1
1 2 3 4 5 6 7 8
10
+1.5V 5,7,9,13,15,33,41,43,44
+V1.5_PCIE +V1.5_PCIE 7
+2_5VRUN +2_5VRUN 19,43,44
+3VRUN +3VRUN 3,5,7,9,12,13,14,15,16,18,19,22,23,27,28,29,33,34,35,36,42,43,44
+1.05V
+V1.5_PCIE 60mils +1.5V
A A
R390
L41 0_8 U32H
1 2 PCIE_L H22 VCCSYNC
+1.05V
BLM18PG330SN1 AC14
+ C662 VTT_0
RC0805 C30 VCC_TXLVDS0 VTT_1 AB14
330U/2.5V/ESR-9/POS
C686 220U B30 W14
10u/10V_8 VCC_TXLVDS1 VTT_2 + C149 C231 C243 C226 C196
A30 VCC_TXLVDS2 VTT_3 V14
+V1.5_PCIE T14 10u/10V_8
C691 +2_5VRUN VTT_4 4.7u/6.3V_6 0.1u/10V
AJ41 VCC3G0 VTT_5 R14
10u/10V_8 AB41 P14
VCC3G1 VTT_6 2.2u/6.3V_6
Y41 VCC3G2 VTT_7 N14
+V1.5_3GPLL C337 V41 M14
0.1u/10V VCC3G3 VTT_8
R41 VCC3G4 VTT_9 L14
N41 AD13 +1.05V
C301 C288 VCC3G5 VTT_10
60mils L41 VCC3G6 VTT_11 AC13
+V1.5_3GPLL 60mils +1.5V 0.1u/10V 10u/10V_8 AC33 AB13
R91 R84 VCCA_3GPLL VTT_12
G41 VCCA_3GBG VTT_13 AA13
0.5/F_6 L16 0_8 H41 Y13 C269 C256 C156
3GPLL_FB_R VSSA_3GBG VTT_14
1 23GPLL_FB_L VTT_15 W13 C268 0.47U/10V_6
1uH_200mA +1.05V F21 V13 0.22u/10V
VCCA_CRTDAC0 VTT_16
RC0805 E21 VCCA_CRTDAC1 VTT_17 U13
G21 VSSA_CRTDAC VTT_18 T13
+V1.5_DPLLA R13 0.22u/10V 0.47U/10V_6
+V1.5_DPLLB VTT_19
B26 VCCA_DPLLA VTT_20 N13
+V1.5_HPLL C39 M13
+V1.5_TVDAC +1.5V VCCA_DPLLB VTT_21
AF1 VCCA_HPLL VTT_22 L13
R379 AB12
L11 VTT_23
0_8 A38 AA12
V15_TVDAC_R VCCA_LVDS VTT_24
B39 VSSA_LVDS VTT_25 Y12
+V1.5_MPLL W12
FCM2012C-121 VTT_26
RC0805 AF2 VCCA_MPLL VTT_27 V12
C206 C198 +1.5V U12
VTT_28
H20 VCCA_TVBG VTT_29 T12
0.022u/16V 0.1u/10V G20 R12
VSSA_TVBG VTT_30
VTT_31 P12
+1.5V N12
VTT_32
VTT_33 M12
B E19 VCCA_TVDACA0 VTT_34 L12 B
F19 VCCA_TVDACA1 VTT_35 R11
C20 VCCA_TVDACB0 VTT_36 P11
D20 VCCA_TVDACB1 VTT_37 N11
E20 M11
+3VRUN F20
VCCA_TVDACC0
VCCA_TVDACC1 POWER VTT_38
VTT_39
VTT_40
R10
P10
AH1 VCCD_HMPLL0 VTT_41 N10
AH2 VCCD_HMPLL1 VTT_42 M10
C248 C244 P9
10u/10V_8 0.1u/10V VTT_43
A28 VCCD_LVDS0 VTT_44 N9
B28 VCCD_LVDS1 VTT_45 M9
C28 VCCD_LVDS2 VTT_46 R8
+V1.5_TVDAC P8
VTT_47
D21 VCCD_TVDAC VTT_48 N8
VTT_49 M8
+3VRUN A23 P7
VCC_HV0 VTT_50
B23 VCC_HV1 VTT_51 N7
B25 VCC_HV2 VTT_52 M7
VTT_53 R6
H19 P6 2005/07/14
+1.5V VCCD_QTVDAC VTT_54
VTT_55 M6
AK31 A6 VTTLF_CAP3
VCCAUX0 VTT_56
AF31 VCCAUX1 VTT_57 R5
AE31 P5 C129
C227 VCCAUX2 VTT_58 0.47U/10V_6
AC31 VCCAUX3 VTT_59 N5
+1.5V +V1.5_DPLLA 0.1u/10V AL30 M5
L37 10uH_8 VCCAUX4 VTT_60
AK30 VCCAUX5 VTT_61 P4
AJ30 VCCAUX6 VTT_62 N4
AH30 VCCAUX7 VTT_63 M4
AG30 VCCAUX8 VTT_64 R3
+ C649 C647 AF30 P3 VTT_56 , VTT_71 and 72 are
VCCAUX9 VTT_65
AE30 VCCAUX10 VTT_66 N3 attached with 0.1u seperated .Checking
330u/2.5V 0.1u/10V AD30 M3
VCCAUX11 VTT_67
AC30 VCCAUX12 VTT_68 R2
+V1.5_DPLLB AG29 P2 2005/07/14
L40 10uH_8 VCCAUX13 VTT_69
AF29 VCCAUX14 VTT_70 M2
AE29 D2 VTTLF_CAP2
C VCCAUX15 VTT_71 VTTLF_CAP1 C
AD29 VCCAUX16 VTT_72 AB1
AC29 R1 C610 C119
+ C294 C654 VCCAUX17 VTT_73
AG28 VCCAUX18 VTT_74 P1
AF28 N1 0.22u/10V
330u/2.5V 0.1u/10V VCCAUX19 VTT_75
AE28 VCCAUX20 VTT_76 M1
AH22 VCCAUX21
+V1.5_HPLL AJ21 0.47U/10V_6
L2 FCM2012C-121 VCCAUX22
AH21 VCCAUX23
AJ20 VCCAUX24
AH20 VCCAUX25
10u/10V_8
945PM
D D
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
Calistoga_E(POWER2)
Date: Thursday, March 09, 2006 Sheet 10 of 47
1 2 3 4 5 6 7 8
5 4 3 2 1
U32I
AC41
AA41
W41
T41
P41
M41
J41
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
AK34
AG34
AF34
AE34
AC34
C34
AW33
AT23
AN23
AM23
AH23
AC23
W23
U32J
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
J11
D11
B11
AV10
AP10
AL10
11
VSS_6 VSS_103 VSS_185 VSS_278
F41 VSS_7 VSS_104 AV33 K23 VSS_186 VSS_279 AJ10
D
AV40 VSS_8 VSS_105 AR33 J23 VSS_187 VSS_280 AG10 D
AP40 VSS_9 VSS_106 AE33 F23 VSS_188 VSS_281 AC10
AN40 VSS_10 VSS_107 AB33 C23 VSS_189 VSS_282 W10
AK40 VSS_11 VSS_108 Y33 AA22 VSS_190 VSS_283 U10
AJ40 VSS_12 VSS_109 V33 K22 VSS_191 VSS_284 BA9
AH40 VSS_13 VSS_110 T33 G22 VSS_192 VSS_285 AW9
AG40 VSS_14 VSS_111 R33 F22 VSS_193 VSS_286 AR9
AF40 VSS_15 VSS_112 M33 E22 VSS_194 VSS_287 AH9
AE40 VSS_16 VSS_113 H33 D22 VSS_195 VSS_288 AB9
B40 VSS_17 VSS_114 G33 A22 VSS_196 VSS_289 Y9
AY39 VSS_18 VSS_115 F33 BA21 VSS_197 VSS_290 R9
AW39 VSS_19 VSS_116 D33 AV21 VSS_198 VSS_291 G9
AV39 VSS_20 VSS_117 B33 AR21 VSS_199 VSS_292 E9
AR39 VSS_21 VSS_118 AH32 AN21 VSS_200 VSS_293 A9
AN39 VSS_22 VSS_119 AG32 AL21 VSS_201 VSS_294 AG8
AJ39 VSS_23 VSS_120 AF32 AB21 VSS_202 VSS_295 AD8
AC39 VSS_24 VSS_121 AE32 Y21 VSS_203 VSS_296 AA8
AB39 VSS_25 VSS_122 AC32 P21 VSS_204 VSS_297 U8
AA39 VSS_26 VSS_123 AB32 K21 VSS_205 VSS_298 K8
Y39 VSS_27 VSS_124 G32 J21 VSS_206 VSS_299 C8
W39 VSS_28 VSS_125 B32 H21 VSS_207 VSS_300 BA7
V39 VSS_29 VSS_126 AY31 C21 VSS_208 VSS_301 AV7
T39 VSS_30 VSS_127 AV31 AW20 VSS_209 VSS_302 AP7
R39 AN31 AR20 AL7
P39
N39
VSS_31
VSS_32
VSS_128
VSS_129 AJ31
AG31
AM20
AA20
VSS_210
VSS_211 VSS VSS_303
VSS_304 AJ7
AH7
M39
L39
VSS_33
VSS_34
VSS_35
VSS VSS_130
VSS_131
VSS_132
AB31
Y31
K20
B20
VSS_212
VSS_213
VSS_214
VSS_305
VSS_306
VSS_307
AF7
AC7
J39 VSS_36 VSS_133 AB30 A20 VSS_215 VSS_308 R7
H39 VSS_37 VSS_134 E30 AN19 VSS_216 VSS_309 G7
C G39 VSS_38 VSS_135 AT29 AC19 VSS_217 VSS_310 D7 C
F39 VSS_39 VSS_136 AN29 W19 VSS_218 VSS_311 AG6
D39 VSS_40 VSS_137 AB29 K19 VSS_219 VSS_312 AD6
AT38 VSS_41 VSS_138 T29 G19 VSS_220 VSS_313 AB6
AM38 VSS_42 VSS_139 N29 C19 VSS_221 VSS_314 Y6
AH38 VSS_43 VSS_140 K29 AH18 VSS_222 VSS_315 U6
AG38 VSS_44 VSS_141 G29 P18 VSS_223 VSS_316 N6
AF38 VSS_45 VSS_142 E29 H18 VSS_224 VSS_317 K6
AE38 VSS_46 VSS_143 C29 D18 VSS_225 VSS_318 H6
C38 VSS_47 VSS_144 B29 A18 VSS_226 VSS_319 B6
AK37 VSS_48 VSS_145 A29 AY17 VSS_227 VSS_320 AV5
AH37 VSS_49 VSS_146 BA28 AR17 VSS_228 VSS_321 AF5
AB37 VSS_50 VSS_147 AW28 AP17 VSS_229 VSS_322 AD5
AA37 VSS_51 VSS_148 AU28 AM17 VSS_230 VSS_323 AY4
Y37 VSS_52 VSS_149 AP28 AK17 VSS_231 VSS_324 AR4
W37 VSS_53 VSS_150 AM28 AV16 VSS_232 VSS_325 AP4
V37 VSS_54 VSS_151 AD28 AN16 VSS_233 VSS_326 AL4
T37 VSS_55 VSS_152 AC28 AL16 VSS_234 VSS_327 AJ4
R37 VSS_56 VSS_153 W28 J16 VSS_235 VSS_328 Y4
P37 VSS_57 VSS_154 J28 F16 VSS_236 VSS_329 U4
N37 VSS_58 VSS_155 E28 C16 VSS_237 VSS_330 R4
M37 VSS_59 VSS_156 AP27 AN15 VSS_238 VSS_331 J4
L37 VSS_60 VSS_157 AM27 AM15 VSS_239 VSS_332 F4
J37 VSS_61 VSS_158 AK27 AK15 VSS_240 VSS_333 C4
H37 VSS_62 VSS_159 J27 N15 VSS_241 VSS_334 AY3
G37 VSS_63 VSS_160 G27 M15 VSS_242 VSS_335 AW3
F37 VSS_64 VSS_161 F27 L15 VSS_243 VSS_336 AV3
D37 VSS_65 VSS_162 C27 B15 VSS_244 VSS_337 AL3
AY36 VSS_66 VSS_163 B27 A15 VSS_245 VSS_338 AH3
B
AW36 VSS_67 VSS_164 AN26 BA14 VSS_246 VSS_339 AG3 B
AN36 VSS_68 VSS_165 M26 AT14 VSS_247 VSS_340 AF3
AH36 VSS_69 VSS_166 K26 AK14 VSS_248 VSS_341 AD3
AG36 VSS_70 VSS_167 F26 AD14 VSS_249 VSS_342 AC3
AF36 VSS_71 VSS_168 D26 AA14 VSS_250 VSS_343 AA3
AE36 VSS_72 VSS_169 AK25 U14 VSS_251 VSS_344 G3
AC36 VSS_73 VSS_170 P25 K14 VSS_252 VSS_345 AT2
C36 VSS_74 VSS_171 K25 H14 VSS_253 VSS_346 AR2
B36 VSS_75 VSS_172 H25 E14 VSS_254 VSS_347 AP2
BA35 VSS_76 VSS_173 E25 AV13 VSS_255 VSS_348 AK2
AV35 VSS_77 VSS_174 D25 AR13 VSS_256 VSS_349 AJ2
AR35 VSS_78 VSS_175 A25 AN13 VSS_257 VSS_350 AD2
AH35 VSS_79 VSS_176 BA24 AM13 VSS_258 VSS_351 AB2
AB35 VSS_80 VSS_177 AU24 AL13 VSS_259 VSS_352 Y2
AA35 VSS_81 VSS_178 AL24 AG13 VSS_260 VSS_353 U2
Y35 VSS_82 VSS_179 AW23 P13 VSS_261 VSS_354 T2
W35 VSS_83 F13 VSS_262 VSS_355 N2
V35 VSS_84 D13 VSS_263 VSS_356 J2
T35 VSS_85 B13 VSS_264 VSS_357 H2
R35 VSS_86 AY12 VSS_265 VSS_358 F2
P35 VSS_87 AC12 VSS_266 VSS_359 C2
N35 VSS_88 K12 VSS_267 VSS_360 AL1
M35 VSS_89 H12 VSS_268
L35 VSS_90 E12 VSS_269
J35 VSS_91 AD11 VSS_270
H35 VSS_92 AA11 VSS_271
G35 VSS_93 Y11 VSS_272
F35 VSS_94
D35 VSS_95 945PM
AN34 VSS_96
A A
945PM
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
Calistoga_F(VSS, NCTF)
Date: Thursday, March 09, 2006 Sheet 11 of 47
5 4 3 2 1
1 2 3 4 5 6 7 8
3VPCU
VCCRTC_2
D5
CH500H-40
VCCRTC
R195
20K/F C452
18p/50V
8.5pF
CLK_32KX1
+3VRUN +3VRUN
12
2
1
D4
1
R201 CH500H-40 C457 G1 Y2 R189
1K/F *SHORT_ PAD1 10M_6
A A
R198 1u/10V 32.768KHZ R404 R415
1M U36A 10K 10K
3
4
4 AB1 AA6 LAD0
RTXC1 LAD0 LAD0 33,36,44
3 C453 CLK_32KX2 AB2 AB5 LAD1 RCIN#
RTCX2 LAD1 LAD1 33,36,44 R5506 close to MCH
2 18p/50V AC4 LAD2 GATEA20
LAD2 LAD2 33,36,44
LPC
RTC
1 RTCRST# AA3 Y6 LAD3
RTCRST# LAD3 LAD3 33,36,44 +1.05V
CN8
DFHD02MS784 SM_INTRUDER# Y5 AC3 LDRQ#0
INTRUDER# LDRQ0# LDRQ#0 36,44
ICH_INTVRMEN W4 AA5 LDRQ#1
Internal PU INTVRMEN LDRQ1#/GPIO23 T39
C463 W1 AB3
EE_CS LFRAME# LFRAME# 33,36,44
Y1 EE_SHCLK
1u/16V_6 Y2 AE22 GATEA20 R108 R120 +1.05V
EE_DOUT A20GATE GATEA20 36
5VPCU *56_4 *56_4
20MIL 20MIL W3 EE_DIN A20M# AH28 H_A20M# 4
R200 Q14 V3 AG27 TP_H_CPUSLP# R104 *0
LAN_CLK CPUSLP# H_CPUSLP# 4,6
R197 1.2K/F VCCRTC_1 VCCRTC_3 3 1
U3 AF24 H_DPRSTP#_R R121 0 R110
LAN_RSTSYNC TP1/DPRSTP# ICH_DPRSTP# 4,37
LAN
CPU
1K/F MMBT3904 AH25 H_DPSLP#_R R109 0 56
TP2/DPSLP# H_DPSLP# 4
R196 U5
2
LAN_RXD0
V4 LAN_RXD1 FERR# AG26 H_FERR# 4
4.7K T5 LAN_RXD2
GPIO49/CPUPWRGD AG24 H_PWRGD 4 Should be 2" close ICH7
U7 LAN_TXD0
V6 LAN_TXD1
V7 LAN_TXD2 IGNNE# AG22 H_IGNNE# 4
R199 AG21
INIT3_3V# T65
ACZ_BCLK U1 AF22
ACZ_BIT_CLK INIT# H_INIT# 4
15K/F ACZ_SYNC R6 AF25
AC-97/AZALIA
ACZ_SYNC INTR H_INTR 4 +1.05V
B B
+3VRUN ACZ_RST# R5 AG23 RCIN#
Internal PU ACZ_RST# RCIN# RCIN# 36
ACZ_SDIN0 T2 AH24
ACZ_SDIN0 NMI H_NMI 4
ACZ_SDIN1 T3 AF23 H_SMI#_R R123 0 R105
ACZ_SDIN1 SMI# H_SMI# 4
T38 ACZ_SDIN2 T1 56
R148 T72 ACZ_SDIN2
STPCLK# AH22 H_STPCLK# 4
10K ACZ_SDOUT T4 ACZ_SDOUT H_THERMTRIP_R R103 24.9/F
THERMTRIP# AF26 PM_THRMTRIP# 4,7
SATA_LED# AF18 Should be 2" close ICH7
26 SATA_LED# SATALED#
PDD[15:0] 29
SATA_RXN0_C AF3 AB15 PDD0
29 SATA_RXN0_C SATA0RXN DD0
SATA_RXP0_C AE3 AE14 PDD1
29 SATA_RXP0_C SATA0RXP DD1
C709 3900p/25V SATA_TXN0_C AG2 AG13 PDD2
29 SATA_TXN0 SATA0TXN DD2
C708 3900p/25V SATA_TXP0_C AH2 AF13 PDD3 C784 ACZ_SDIN0
Review current rating 29 SATA_TXP0 SATA0TXP DD3 ACZ_SDIN0 30
AD14 PDD4 *0.1u/10V
CKL:1n ~ 20nF PAD T35 SATA_RXN2_C DD4 PDD5
AF7 SATA2RXN DD5 AC13
PAD T34 SATA_RXP2_C AE7 AD12 PDD6
PAD T37 SATA_TXN2_C SATA2RXP DD6 PDD7
AG6 SATA2TXN DD7 AC12
PAD T36 SATA_TXP2_C AH6 AE12 PDD8 ACZ_SDOUT R187 39
SATA2TXP DD8 ACZ_SDOUT_AUDIO 30
AF12 PDD9
CLK_PCIE_SATA# DD9 PDD10
3 CLK_PCIE_SATA# AF1 SATA_CLKN DD10 AB13
SATA
CLK_PCIE_SATA AE1 AC14 PDD11 C460
3 CLK_PCIE_SATA SATA_CLKP DD11
AF14 PDD12 *10p
DD12 PDD13
AH10 SATARBIASN DD13 AH13
R422 24.9/F SATA_BIAS AG10 AH14 PDD14
Place within 500 SATARBIASP DD14 PDD15
25mils/15mils DD15 AC15 Near To
mils of ICH7 PDA[2:0] 29 ICH7-M
PDIOR# PDA0
29 PDIOR#
PDIOW#
AF15
AH15
DIOR# IDE DA0 AH17
AE17 PDA1
C 29 PDIOW# DIOW# DA1 C
PDDACK# AF16 AF17 PDA2
29 PDDACK# DDACK# DA2
IRQ14 AH16 ACZ_SYNC R184 39
29 IRQ14 IDEIRQ ACZ_SYNC_AUDIO 30
PIORDY AG16 AE16
29 PIORDY IORDY DCS1# PDCS1# 29
PDDREQ AE15 AD16
29 PDDREQ DDREQ DCS3# PDCS3# 29
C461
ICH7-M *10p
ACZ_BCLK R186 39
BIT_CLK_AUDIO 30
C459
22p/50V
VCCRTC
ICH7 internal VR
enable strap
R188
INTVRMEN 332K/F_6
D Disable 0 R185 D
*0
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
ICH7-M HOST(1 of 4)
Date: Thursday, March 09, 2006 Sheet 12 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U36D
PCIE_RXN0
13
MINI CARD PCI-E 33 PCIE_RXN0
PCIE_RXP0
F26
F25
PERn1 DMI0RXN V26
V25
DMI_RXN0 7
PCI-Express
PCIE_RXN2 K26 AB26 INTG# 6 5
24 PCIE_RXN2 PERn3 DMI2RXN DMI_RXN2 7
PCIE_RXP2 K25 AB25 PERR# 7 4 LOCK#
A 24 PCIE_RXP2 PERp3 DMI2RXP DMI_RXP2 7 A
C311 0.1u/10V PCIE_TXN2_C J28 AA28 REQ5# 8 3 REQ3#
24 PCIE_TXN2 PETn3 DMI2TXN DMI_TXN2 7
C310 0.1u/10V PCIE_TXP2_C J27 AA27 INTE# 9 2 TRDY#
24 PCIE_TXP2 PETp3 DMI2TXP DMI_TXP2 7
+3VRUN 10 1 FRAME#
M26 PERn4 DMI3RXN AD25 DMI_RXN3 7
M25 AD24 +1.5V 8.2KX8_4
PERp4 DMI3RXP DMI_RXP3 7
L28 PETn4 DMI3TXN AC28 DMI_TXN3 7
L27 PETp4 DMI3TXP AC27 DMI_TXP3 7
+3VRUN
+3VRUN P26 AE28
PERn5 DMI_CLKN CLK_PCIE_ICH# 3 RP52
P25 AE27 R114
PERp5 DMI_CLKP CLK_PCIE_ICH 3
N28 24.9/F REQ2# 6 5
PETn5 REQ1# REQ4#
N27 PETp5 DMI_ZCOMP C25 15/15mils 7 4
D25 DMI_ZCOMP Place within 500 STOP# 8 3 DEVSEL#
DMI_IRCOMP mils of ICH7 INTB# SERR#
T25 PERn6 9 2
R190 R191 R427 T24 F1 +3VRUN 10 1
PERp6 USBP0N USBP0- 26 USB CONN
10K 10K 10K R28 F2
PETn6 USBP0P USBP0+ 26
R27 G4 8.2KX8_4
PETp6 USBP1N USBP1- 26 USB CONN
USBP1P G3 USBP1+ 26
R2 SPI_CLK USBP2N H1 USBP2- 35
SPI_CE# P6 H2 Port Replicatpor +3VRUN
SPI_CS# USBP2P USBP2+ 35
P1 J4
SPI
SPI_ARB USBP3N USBP3- 33 New Card RP53
USBP3P J3 USBP3+ 33
SPI_SI P5 K1 INTF# 6 5
SPI_MOSI USBP4N USBP4- 26 USB CONN
SPI_SO P2 K2 INTC# 7 4 INTD#
USB
SPI_MISO USBP4P USBP4+ 26
L4 REQ0# 8 3 INTH#
USBP5N USBP5- 33 Bluetooth module
USBOC#0 D3 L5 IRDY# 9 2 INTA#
OC0# USBP5P USBP5+ 33
USBOC#1 C4 M1 +3VRUN 10 1
OC1# USBP6N USBP6- 33 PCI-E MINI Card
USBOC#2 D5 M2
OC2# USBP6P USBP6+ 33
USBOC#3 D4 N4 8.2KX8_4
OC3# USBP7N USBP7- 25 Doughter board Carama USB
B USBOC#4 E5 N3 B
OC4# USBP7P USBP7+ 25
USBOC#5 C3
USBOC#6 OC5#/GPIO29 +3VSUS
A2 OC6#/GPIO30 USBRBIAS# D2
USBOC#7 B3 D1 USB_RBIAS_PN
OC7#/GPIO31 USBRBIAS RP54
25mils/15mils
ICH7-M USBOC#2 6 5
USBOC#1 7 4 USBOC#5
Place within 500 R429 USBOC#4 8 3 USBOC#3
mils of ICH7 22.6/F USBOC#0 9 2 USBOC#7
+3VSUS 10 1 USBOC#6
8.2KX8_4
U36B
27 AD[0..31]
AD0 E18 D7 REQ0#
AD1 AD0 REQ0#
AD2
C18
A16
AD1 PCI GNT0# E7
C16 REQ1# ICH7 Boot BIOS select
AD3 AD2 REQ1# Moved from GNT6 on ICH6
F18 AD3 GNT1# D16
AD4 E16 C17 REQ2# R162 to GNT3 per ICH7 C-spec
AD4 REQ2# REQ2# 27 3.22.1
AD5 A18 D17 GNT2# *1K_4
AD5 GNT2# GNT2# 27
AD6 E17 E13 REQ3# STRAP GNT5# GNT4#
AD7 AD6 REQ3# GNT3#
A17 F13
AD8 A15
AD7 GNT3#
A13 REQ4# R1 R2
AD9 AD8 REQ4#/GPIO22 GNT4#
C
C14 AD9 GNT4#/GPIO48 A14 C
AD10 E14 C8 REQ5# LPC
AD11 AD10 GPIO1/REQ5# GNT5#
D14 AD11 GPIO17/GNT5# D8 (default) 11 UNSTUFF UNSTUFF
AD12 B12
AD13 AD12 C/BE0#
C13 AD13 C/BE0# B15 C/BE0# 27
AD14 G15 C12 C/BE1#
AD14 C/BE1# C/BE1# 27
AD15 G13 D12 C/BE2# PCI 10 UNSTUFF STUFF
AD15 C/BE2# C/BE2# 27
AD16 E12 C15 C/BE3#
AD16 C/BE3# C/BE3# 27
AD17 C11 R416 R168
AD18 AD17 IRDY# *1K_4 *1K_4
D11 AD18 IRDY# A7 IRDY# 27
AD19 A11 E10 PAR SPI 01 STUFF UNSTUFF
AD19 PAR PAR 27
AD20 A10 B18 PCIRST#
AD20 PCIRST# PCIRST# 27
AD21 F11 A12 DEVSEL#
AD21 DEVSEL# DEVSEL# 27
AD22 F10 C9 PERR#
AD22 PERR# PERR# 27
AD23 E9 E11 LOCK#
AD24 AD23 PLOCK# SERR# PCLK_ICH
D9 AD24 SERR# B10 SERR# 27
AD25 B9 F15 STOP#
AD25 STOP# STOP# 27
2
AD26 A8 F14 TRDY#
AD26 TRDY# TRDY# 27
AD27 A6 F16 FRAME#
AD27 FRAME# FRAME# 27
AD28 C7 R423
AD29 AD28 PLT_RST-R# *10
B6 AD29 PLTRST# C26 PLT_RST-R# 7
AD30 E6 A9 PCLK_ICH
PCLK_ICH 3
2 1
AD31 AD30 PCICLK PCI_PME#
D6 AD31 PME# B19 PCI_PME# 27
C707
INTA# A3
Interrupt I/F G8 INTE# +3VRUN *8.2P_16V
1
INTB# PIRQA# GPIO2/PIRQE# INTF#
B4 PIRQB# GPIO3/PIRQF# F7
INTC# C5 F8 INTG#
27 INTC# PIRQC# GPIO4/PIRQG#
INTD# B5 G7 INTH# Reserved for EMI.
27 INTD# PIRQD# GPIO5/PIRQH#
C704
Place resister and cap
D
AE5
MISC AE9 0.1u/10V close to ICH.
D
RSVD[1] RSVD[6] U7
AD5 RSVD[2] RSVD[7] AG8
5
+3V_S5 +3V_S5
+3V_S5 +3VRUN
14
PCLK_SMB R124 2.2K RI# R389 10K
PDAT_SMB R128 2.2K SMB_LINK_ALERT# R391 10K SWI# R409 10K
PCIE_WAKE# R156 2 1 680 SMLINK0 R392 10K DNBSWON# R117 10K
R376 SMLINK1 R394 10K SYS_RST# R396 10K SYS_RST# R399 *10K
A A
EXTSMI#_R R153 *10K PM_BATLOW# R401 8.2K/F CLKRUN# R420 8.2K/F
No stuff-->boot WAKE_SCI#_R R95 10K SERIRQ R412 8.2K/F
SMBALERT# R395 10K RUNTIME_SCI#_R R140 10K
Stuff-->No boot
+3VRUN
SYS_RST is suspend rail RSMRST# R424 10K
U36C
R411 PCLK_SMB C22 AF19 BOARD_ID1
3,33 PCLK_SMB SMBCLK GPIO21/SATA0GP
*1K_4 PDAT_SMB B22 AH18 BOARD_ID0
SMB
3,33 PDAT_SMB SMBDATA GPIO19/SATA1GP
SATA
SMB_LINK_ALERT# BOARD_ID3
GPIO
A26 LINKALERT# GPIO36/SATA2GP AH19
SMLINK0 B25 AE19 BOARD_ID4 +3VRUN
30 ACZ_SPKR SMLINK0 GPIO37/SATA3GP
SMLINK1 A25 SMLINK1 14M_ICH U14
CLK14 AC1 14M_ICH 3
Clocks
RI# A28 B2 CLKUSB_48 1 5
27 RI# RI# CLK48 CLKUSB_48 3
+3VRUN 2
3,37 CLK_EN#
A19 C20 ICH_SUSCLK 3 4 VR_PWRGD_CK410
SPKR SUSCLK T31
SUS_STAT# A27
27,44 SUS_STAT# SUS_STAT#
SYS_RST# A22 B24 R115 100/F NL17SZ14DFT2G
4 SYS_RST# SYS_RST# SLP_S3# SUSB# 36
D23 R122 100/F
SLP_S4# SUSC# 36
R166 0 AB18 F22
7 PM_BMBUSY# GPIO0/BM_BUSY# SLP_S5# T21
R126 R129
*10K *10K
T24
SMBALERT# B23 GPIO11/SMBALERT# PWROK AA4 ICH_PWROK Note: External pull-up 3V
No ASF support R116 0
Power MGT
PM_EXTTS#1 7
R130 0 PM_STPPCI_ICH# AC20 AC22 PM_DPRSLPVR_R R113 100/F CKL :100Kohm PD
3 PM_STPPCI# GPIO18/STPPCI# GPIO16/DPRSLPVR PM_DPRSLPVR 37
R127 0 PM_STPCPU_ICH# AF21 R112 *100K
3 PM_STPCPU#
GPIO
GPIO20/STPCPU# PM_BATLOW#_R R400 100/F
C21
SYS
TP0/BATLOW# PM_BATLOW# 36
B
T64 A21 GPIO26
B
C23 DNBSWON#
PWRBTN# DNBSWON# 36
B21 R158 100K
T66 GPIO27
T22 E23 GPIO28
+3VRUN C19 R98 0
LAN_RST# PLTRST# 13,18,24,29,33,44
CLKRUN# AG18
27,36,44 CLKRUN# GPIO32/CLKRUN#
Y4 PM_RSMRST#_R R425 100/F RSMRST#
RSMRST# RSMRST# 36
29 ICH_GPO33 ICH_GPO33 AC19
BOARD_ID2 GPIO33/AZ_DOCK_EN# SWI#
U2 GPIO34/AZ_DOCK_RST# GPIO9 E20 SWI# 36
R418 A20
GPIO10 T67
8.2K/F PCIE_WAKE# F20 F19
24,33 PCIE_WAKE# WAKE# GPIO12 T27
SERIRQ AH21 E19 WAKE_SCI#_R
27,36,44 SERIRQ SERIRQ GPIO13 T19
5 THERM_ALERT# AF20 THRM# GPIO14 R4 T40
GPIO15 E22 T25
VR_PWRGD_CK410 AD22 R3
VRMPWRGD GPIO24
GPIO25 D20 T29
T28 AC21 GPIO6 GPIO35 AD21
R141 0 RUNTIME_SCI#_R GPIO38
36 SCI#
R143 0 EXTSMI#_R
AC18
E21
GPIO7 GPIO GPIO38 AD20
AE20
36 KBSMI# GPIO8 GPIO39 T30
ICH7-M
GPIO25 /Suspend rail is a HW strap , don't pull down .
1
C451
C C
R193 *6.8K R428
+3VRUN 0.047u/10V *10 R372
*10_NC
5 U15
1 2
1 2
7,37 DELAY_VR_PWRGOOD 2
4 ICH_PWROK
1 C712 C637
36 PWROK
1
*4.7P_50V *4.7P_50V_NC
R182
2
TC7SH08FU
3
R183
10K
2
100K
+3VRUN +3VRUN +3VRUN +3VRUN +3VRUN
1
Level is incorrect !!
+3VRUN R136 R368
R421 R147 R371
*10K_4 *10K *10K_NC *10K 10K
2
R482
BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4
10K
1
GPIO38 Function Board ID Function
1
00: TW3
GPIO38 ID [1:0] 01: DW1 R367
High CRT R167 R139 10K R137 R366
0: SATA HDD 10K 10K 10K *10K
2
1
2
Low DVI
R483
*10K ID3 Reserve
2
0: No docking.
ID4 1: w/ docking
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
ICH7-M GPIO(3 of 4)
Date: Thursday, March 09, 2006 Sheet 14 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
A4
A23
B1
B8
B11
U36E
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
P28
R1
R11
R12
R13
+5VRUN +3VRUN
V5REF(1) G10
U36F
V5REF[1] Vcc1_05[1] L11
+1.05V
2
B14 R14 L12 "CH7270LM885"
VSS[6] VSS[103] D2 Vcc1_05[2] + C415
B17 VSS[7] VSS[104] R15 AD17 V5REF[2] Vcc1_05[3] L14
B20 R16 R161 PDZ5.6B 5VPCU 3VPCU L16 330u/2.5V
VSS[8] VSS[105] 15/15mils 100/F V5REF_SUS Vcc1_05[4] C421 C418
B26 VSS[9] VSS[106] R17 F6 V5REF_Sus Vcc1_05[5] L17
B28 R18 15/15mils L18 0.1u/10V 0.1u/10V
1
VSS[10] VSS[107] Vcc1_05[6]
2
C2 VSS[11] VSS[108] T6 AA22 Vcc1_5_B[1] Vcc1_05[7] M11
C6 T12 D3 AA23 M18
A VSS[12] VSS[109] C414 C393 R192 Vcc1_5_B[2] Vcc1_05[8] A
CORE
C27 VSS[13] VSS[110] T13 PDZ5.6B AB22 Vcc1_5_B[3] Vcc1_05[9] P11
D10 T14 1u/16V_6 0.1u/10V 10 AB23 P18
VSS[14] VSS[111] Vcc1_5_B[4] Vcc1_05[10]
D13 T15 AC23 T11
1
VSS[15] VSS[112] Vcc1_5_B[5] Vcc1_05[11] C587 C427 C369 C339
D18 VSS[16] VSS[113] T16 AC24 Vcc1_5_B[6] Vcc1_05[12] T18
D21 T17 AC25 U11 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
VSS[17] VSS[114] C456 C440 Vcc1_5_B[7] Vcc1_05[13]
D24 VSS[18] VSS[115] U4 AC26 Vcc1_5_B[8] Vcc1_05[14] U18
E1 U12 1u/16V_6 0.1u/10V AD26 V11
VSS[19] VSS[116] Vcc1_5_B[9] Vcc1_05[15]
E2 VSS[20] VSS[117] U13 AD27 Vcc1_5_B[10] Vcc1_05[16] V12
E4 VSS[21] VSS[118] U14 AD28 Vcc1_5_B[11] Vcc1_05[17] V14
E8 U15 D26 V16 C399 C338 C428 C398 C424
VSS[22] VSS[119] Vcc1_5_B[12] Vcc1_05[18] 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
E15 VSS[23] VSS[120] U16 D27 Vcc1_5_B[13] Vcc1_05[19] V17
F3 U17 +1.5V +1.5V_PCIE_ICH D28 V18 +3V_S5
VSS[24] VSS[121] L20 Vcc1_5_B[14] VCC PAUX Vcc1_05[20]
F4 VSS[25] VSS[122] U24 E24 Vcc1_5_B[15]
F5 VSS[26] VSS[123] U25 E25 Vcc1_5_B[16] VccSus3_3/VccLAN3_3[1] V5
F12 U26 2 1 E26 V1 +3VRUN
VSS[27] VSS[124] Vcc1_5_B[17] VccSus3_3/VccLAN3_3[2]
F27 VSS[28] VSS[125] V2 F23 Vcc1_5_B[18] VccSus3_3/VccLAN3_3[3] W2
F28 V13 BLM18PG181SN1 F24 W7 +3V_S5 C435
VSS[29] VSS[126] + C387 Vcc1_5_B[19] VccSus3_3/VccLAN3_3[4] 0.1u/10V
G1 VSS[30] VSS[127] V15 G22 Vcc1_5_B[20]
G2 V24 220U C355 C362 C335 G23 U6
VSS[31] VSS[128] 0.1u/10V 0.1u/10V 0.1u/10V Vcc1_5_B[21] Vcc3_3/VccHDA C403
G5 VSS[32] VSS[129] V27 H22 Vcc1_5_B[22]
G6 V28 H23 R7 0.1u/10V
VSS[33] VSS[130] Vcc1_5_B[23] VccSus3_3/VccSusHDA C383
G9 VSS[34] VSS[131] W6 J22 Vcc1_5_B[24]
G14 W24 J23 AE23 0.1u/10V +1.05V
VSS[35] VSS[132] Vcc1_5_B[25] V_CPU_IO[1]
G18 VSS[36] VSS[133] W25 K22 Vcc1_5_B[26] V_CPU_IO[2] AE26
G21 W26 K23 AH26
VCCA3GP
VSS[37] VSS[134] Vcc1_5_B[27] V_CPU_IO[3]
G24 VSS[38] VSS[135] Y3 L22 Vcc1_5_B[28]
G25 Y24 L23 AA7 +3VRUN
VSS[39] VSS[136] Vcc1_5_B[29] Vcc3_3[3] C400 C401 C348
G26 VSS[40] VSS[137] Y27 M22 Vcc1_5_B[30] Vcc3_3[4] AB12
H3 Y28 M23 AB20 0.1u/10V 0.1u/10V 4.7u/10V_8
VSS[41] VSS[138] Vcc1_5_B[31] Vcc3_3[5]
B H4 VSS[42] VSS[139] AA1 N22 Vcc1_5_B[32] Vcc3_3[6] AC16 B
H5 VSS[43] VSS[140] AA24 N23 Vcc1_5_B[33] Vcc3_3[7] AD13
IDE
H24 AA25 P22 AD18 C422
VSS[44] VSS[141] Vcc1_5_B[34] Vcc3_3[8] 0.1u/10V
H27 VSS[45] VSS[142] AA26 P23 Vcc1_5_B[35] Vcc3_3[9] AG12
H28 VSS[46] VSS[143] AB4 R22 Vcc1_5_B[36] Vcc3_3[10] AG15
J1 AB6 R23 AG19 +3VRUN
VSS[47] VSS[144] Vcc1_5_B[37] Vcc3_3[11]
J2 VSS[48] VSS[145] AB11 R24 Vcc1_5_B[38]
J5 VSS[49] VSS[146] AB14 R25 Vcc1_5_B[39] Vcc3_3[12] A5
J24 VSS[50] VSS[147] AB16 R26 Vcc1_5_B[40] Vcc3_3[13] B13
J25 VSS[51] VSS[148] AB19 T22 Vcc1_5_B[41] Vcc3_3[14] B16
J26 AB21 +3VRUN T23 B7 C410 C437 C390 C386
VSS[52] VSS[149] Vcc1_5_B[42] Vcc3_3[15] 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
K24 VSS[53] VSS[150] AB24 T26 Vcc1_5_B[43] Vcc3_3[16] C10
PCI
K27 VSS[54] VSS[151] AB27 T27 Vcc1_5_B[44] Vcc3_3[17] D15
K28 VSS[55] VSS[152] AB28 T28 Vcc1_5_B[45] Vcc3_3[18] F9
L13 VSS[56] VSS[153] AC2 U22 Vcc1_5_B[46] Vcc3_3[19] G11
L15 AC5 C430 U23 G12
VSS[57] VSS[154] 0.1u/10V Vcc1_5_B[47] Vcc3_3[20] VCCRTC
L24 VSS[58] VSS[155] AC9 V22 Vcc1_5_B[48] Vcc3_3[21] G16
L25 VSS[59] VSS[156] AC11 V23 Vcc1_5_B[49]
L26 VSS[60] VSS[157] AD1 W22 Vcc1_5_B[50] VccRTC W5
M3 VSS[61] VSS[158] AD3 W23 Vcc1_5_B[51]
M4 AD4 Y22 P7 +3V_S5
VSS[62] VSS[159] Vcc1_5_B[52] VccSus3_3[1] C458 C450
M5 VSS[63] VSS[160] AD7 Y23 Vcc1_5_B[53]
M12 AD8 +1.5V 30mils A24 0.1u/10V 0.1u/10V
VSS[64] VSS[161] L19 VccSus3_3[2]
M13 VSS[65] VSS[162] AD11 B27 Vcc3_3[1] VccSus3_3[3] C24
M14 AD15 R102 1uH_6 D19
VSS[66] VSS[163] GPLL_R GPLL_R_L VccSus3_3[4] C447 C433
M15 VSS[67] VSS[164] AD19 1 2 AG28 VccDMIPLL VccSus3_3[5] D22
M16 AD23 G19 0.1u/10V 0.1u/10V
VSS[68] VSS[165] 1/F_6 +1.5V VccSus3_3[6]
M17 VSS[69] VSS[166] AE2 AB7 Vcc1_5_A[1]
M24 AE4 C315 C316 AC6 K3
VSS[70] VSS[167] 0.01u/16V 10u/10V_8 Vcc1_5_A[2] VccSus3_3[7]
C
M27 VSS[71] VSS[168] AE8 AC7 Vcc1_5_A[3] VccSus3_3[8] K4 C
M28 AE11 AD6 K5 +3V_S5
VSS[72] VSS[169] Vcc1_5_A[4] VccSus3_3[9]
ARX
N1 VSS[73] VSS[170] AE13 AE6 Vcc1_5_A[5] VccSus3_3[10] K6
N2 AE18 +1.5V C396 AF5 L1
VSS[74] VSS[171] 1u/10V Vcc1_5_A[6] VccSus3_3[11]
N5 VSS[75] VSS[172] AE21 AF6 Vcc1_5_A[7] VccSus3_3[12] L2
USB
N6 VSS[76] VSS[173] AE24 AG5 Vcc1_5_A[8] VccSus3_3[13] L3
N11 AE25 AH5 L6 C392 C370
VSS[77] VSS[174] Vcc1_5_A[9] VccSus3_3[14] 0.1u/10V 0.1u/10V
N12 VSS[78] VSS[175] AF2 VccSus3_3[15] L7
N13 AF4 C425 AD2 M6
VSS[79] VSS[176] 0.1u/10V VccSATAPLL VccSus3_3[16]
N14 VSS[80] VSS[177] AF8 VccSus3_3[17] M7
N15 AF11 +3VRUN AH11 N7 +1.5V
VSS[81] VSS[178] Vcc3_3[2] VccSus3_3[18]
N16 VSS[82] VSS[179] AF27
N17 AF28 +1.5V AB10 AB17
VSS[83] VSS[180] C420 Vcc1_5_A[10] Vcc1_5_A[19] +1.5V
N18 VSS[84] VSS[181] AG1 30mils AB9 Vcc1_5_A[11] Vcc1_5_A[20] AC17
N24 AG3 0.1u/10V AC10
VSS[85] VSS[182] Vcc1_5_A[12] C439
N25 VSS[86] VSS[183] AG7 AD10 Vcc1_5_A[13] Vcc1_5_A[21] T7
N26 AG11 AE10 F17 0.1u/10V
VSS[87] VSS[184] Vcc1_5_A[14] Vcc1_5_A[22]
ATX
P3 AG14 C426 AF10 G17 +1.5V
VSS[88] VSS[185] +3V_S5 1u/10V Vcc1_5_A[15] Vcc1_5_A[23] C442 C431
P4 VSS[89] VSS[186] AG17 AF9 Vcc1_5_A[16]
P12 AG20 R194 AG9 AB8 0.1u/10V 0.1u/10V
VSS[90] VSS[187] 0 Vcc1_5_A[17] Vcc1_5_A[24]
P13 VSS[91] VSS[188] AG25 AH9 Vcc1_5_A[18] Vcc1_5_A[25] AC8
P14 VSS[92] VSS[189] AH1
P15 AH3 +1.5V 3VS5_ICH_SUS3 E3 K7 TP_ICHVCCSUS1 T32 PAD C423
VSS[93] VSS[190] C449 VccSus3_3[19] VccSus1_05[1] 0.1u/10V
P16 VSS[94] VSS[191] AH7
P17 AH12 0.1u/10V C1 C28 TP_ICHVCCSUS2 T60 PAD
VSS[95] VSS[192] VccUSBPLL VccSus1_05[2] TP_ICHVCCSUS3 T23 PAD
P24 VSS[96] VSS[193] AH23 VccSus1_05[3] G20
P27 AH27 PAD T68 TPVCCSUSLAN1 AA2
VSS[97] VSS[194] C429 T33 TPVCCSUSLAN2 VccSus1_05/VccLAN1_05[1]
Y7 VccSus1_05/VccLAN1_05[2]
Vcc1_5_A[26] A1
ICH7-M 0.1u/10V PAD H6 +1.5V
Vcc1_5_A[27]
USB CORE
Vcc1_5_A[28] H7
D
Vcc1_5_A[29] J6 D
Vcc1_5_A[30] J7
ICH7-M C402
0.1u/10V
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
ICH7-M POWER(4 of 4)
Date: Thursday, March 09, 2006 Sheet 15 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3VRUN
1.8VSUS
+3VRUN 3,5,7,9,10,12,13,14,15,18,19,22,23,27,28,29,33,34,35,36,42,43,44
1.8VSUS 7,9,39,43,44
1.8VSUS
CN16
1.8VSUS
M_A_DM[0..7] 8
M_A_DQ[0..63] 8
M_A_DQS[0..7] 8
M_A_DQS#[0..7] 8
1.8VSUS
CN17
1.8VSUS
M_B_DM[0..7] 8
M_B_DQ[0..63] 8
M_B_DQS[0..7] 8
M_B_DQS#[0..7] 8
1.8VSUS
Place these Caps near So-Dimm1.
16
M_A_A[0..13] 8,17 M_B_A[0..13] 8,17
SMDDR_VREF_DIMM 1 2 SMDDR_VREF_DIMM 1 2
VREF VSS46 M_A_DQ4 VREF VSS46 M_B_DQ0
3 VSS47 DQ4 4 3 VSS47 DQ4 4
M_A_DQ1 5 6 M_A_DQ0 M_B_DQ1 5 6 M_B_DQ4 C592 C596 C602 C246 C286
M_A_DQ5 DQ0 DQ5 M_B_DQ5 DQ0 DQ5 X5R
2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 *2.2U *2.2U
7 DQ1 VSS15 8 7 DQ1 VSS15 8
A 9 10 M_A_DM0 9 10 M_B_DM0 A
M_A_DQS#0 VSS37 DM0 M_B_DQS#0 VSS37 DM0
11 DQS#0 VSS5 12 11 DQS#0 VSS5 12
M_A_DQS0 13 14 M_A_DQ7 M_B_DQS0 13 14 M_B_DQ7
DQS0 DQ6 M_A_DQ6 DQS0 DQ6 M_B_DQ6 1.8VSUS Place
15 VSS48 DQ7 16 15 VSS48 DQ7 16 these Caps near So-Dimm1.
M_A_DQ2 17 18 M_B_DQ2 17 18
M_A_DQ3 DQ2 VSS16 M_A_DQ14 M_B_DQ3 DQ2 VSS16 M_B_DQ12
19 DQ3 DQ12 20 19 DQ3 DQ12 20
21 22 M_A_DQ13 21 22 M_B_DQ13
M_A_DQ12 VSS38 DQ13 M_B_DQ9 VSS38 DQ13
23 DQ8 VSS17 24 23 DQ8 VSS17 24
M_A_DQ8 25 26 M_A_DM1 M_B_DQ8 25 26 M_B_DM1 C600 C607 C590 C103
DQ9 DM1 DQ9 DM1 0.1u/10V 0.1u/10V 0.1u/10V X7R
0.1u/10V
27 VSS49 VSS53 28 27 VSS49 VSS53 28
M_A_DQS#1 29 30 M_CLK_DDR0 M_B_DQS#1 29 30 M_CLK_DDR3
DQS#1 CK0 M_CLK_DDR0 7 DQS#1 CK0 M_CLK_DDR3 7
M_A_DQS1 31 32 M_CLK_DDR#0 M_B_DQS1 31 32 M_CLK_DDR#3
DQS1 CK0# M_CLK_DDR#0 7 DQS1 CK0# M_CLK_DDR#3 7
33 VSS39 VSS41 34 33 VSS39 VSS41 34
M_A_DQ9 35 36 M_A_DQ10 M_B_DQ11 35 36 M_B_DQ14
M_A_DQ15 DQ10 DQ14 M_A_DQ11 M_B_DQ10 DQ10 DQ14 M_B_DQ15
37 DQ11 DQ15 38 37 DQ11 DQ15 38
39 40 39 40 SMDDR_VREF_DIMM +3VRUN
VSS50 VSS54 VSS50 VSS54
SO-DIMM (200P)
59 60 59 60
M_A_DQ24 61
VSS22
DQ24
VSS24
DQ28 62 M_A_DQ28 M_B_DQ29 61
VSS22
DQ24
VSS24
DQ28 62 M_B_DQ24 Place these Caps near So-Dimm1.
M_A_DQ25 63 64 M_A_DQ29 M_B_DQ28 63 64 M_B_DQ25
65
DQ25
VSS23
DQ29
VSS25 66 65
DQ25
VSS23
DQ29
VSS25 66 No Vias Between the Trace of PIN to
M_A_DM3 67 68 M_A_DQS#3 M_B_DM3 67 68 M_B_DQS#3
B 69
DM3
NC4
DQS#3
DQS3 70 M_A_DQS3 69
DM3
NC4
DQS#3
DQS3 70 M_B_DQS3 CAP. B
71 VSS9 VSS10 72 71 VSS9 VSS10 72
M_A_DQ26 73 74 M_A_DQ30 M_B_DQ26 73 74 M_B_DQ31
M_A_DQ27 DQ26 DQ30 M_A_DQ31 M_B_DQ27 DQ26 DQ30 M_B_DQ30
75 DQ27 DQ31 76 75 DQ27 DQ31 76
77 78 77 78 1.8VSUS
M_CKE0 VSS4 VSS8 M_CKE1 M_CKE2 VSS4 VSS8 M_CKE3
7,17 M_CKE0 79 CKE0 CKE1 80 M_CKE1 7,17 7,17 M_CKE2 79 CKE0 CKE1 80 M_CKE3 7,17 Place these Caps near So-Dimm2.
81 VDD7 VDD8 82 81 VDD7 VDD8 82
83 NC1 A15 84 83 NC1 A15 84
M_A_BS#2 85 86 M_B_BS#2 85 86
8,17 M_A_BS#2 A16_BA2 A14 8,17 M_B_BS#2 A16_BA2 A14
87 VDD9 VDD11 88 87 VDD9 VDD11 88
M_A_A12 89 90 M_A_A11 M_B_A12 89 90 M_B_A11 C605 C595 C612 C626 C625
M_A_A9 A12 A11 M_A_A7 M_B_A9 A12 A11 M_B_A7 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 *2.2U *2.2U
91 A9 A7 92 91 A9 A7 92
M_A_A8 93 94 M_A_A6 M_B_A8 93 94 M_B_A6
A8 A6 A8 A6
95 VDD5 VDD4 96 95 VDD5 VDD4 96
M_A_A5 97 98 M_A_A4 M_B_A5 97 98 M_B_A4
M_A_A3 A5 A4 M_A_A2 M_B_A3 A5 A4 M_B_A2
99 A3 A2 100 99 A3 A2 100
M_A_A1 101 102 M_A_A0 M_B_A1 101 102 M_B_A0 1.8VSUS Place these Caps near So-Dimm1.
A1 A0 A1 A0
103 VDD10 VDD12 104 103 VDD10 VDD12 104
M_A_A10 105 106 M_A_BS#1 M_B_A10 105 106 M_B_BS#1
A10/AP BA1 M_A_BS#1 8,17 A10/AP BA1 M_B_BS#1 8,17
8,17 M_A_BS#0 M_A_BS#0 107 108 M_A_RAS# 8,17 M_B_BS#0 M_B_BS#0 107 108 M_B_RAS#
BA0 RAS# M_A_RAS# 8,17 BA0 RAS# M_B_RAS# 8,17
M_A_WE# 109 110 M_CS#0 M_B_WE# 109 110 M_CS#2
8,17 M_A_WE# WE# S0# M_CS#0 7,17 8,17 M_B_WE# WE# S0# M_CS#2 7,17
111 112 111 112 C601 C599 C126 C142
M_A_CAS# VDD2 VDD1 M_ODT0 M_B_CAS# VDD2 VDD1 M_ODT2 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
8,17 M_A_CAS# 113 CAS# ODT0 114 M_ODT0 7,17 8,17 M_B_CAS# 113 CAS# ODT0 114 M_ODT2 7,17
M_CS#1 115 116 M_A_A13 M_CS#3 115 116 M_B_A13
7,17 M_CS#1 S1# A13 7,17 M_CS#3 S1# A13
117 VDD3 VDD6 118 117 VDD3 VDD6 118
M_ODT1 119 120 M_ODT3 119 120
7,17 M_ODT1 ODT1 NC2 7,17 M_ODT3 ODT1 NC2
121 VSS11 VSS12 122 121 VSS11 VSS12 122
M_A_DQ35 123 124 M_A_DQ32 M_B_DQ33 123 124 M_B_DQ37
M_A_DQ37 DQ32 DQ36 M_A_DQ36 M_B_DQ32 DQ32 DQ36 M_B_DQ36 SMDDR_VREF_DIMM +3VRUN
125 DQ33 DQ37 126 125 DQ33 DQ37 126
127 VSS26 VSS28 128 127 VSS26 VSS28 128
M_A_DQS#4 129 130 M_A_DM4 M_B_DQS#4 129 130 M_B_DM4
C M_A_DQS4 DQS#4 DM4 M_B_DQS4 DQS#4 DM4 C
131 DQS4 VSS42 132 131 DQS4 VSS42 132
133 134 M_A_DQ34 133 134 M_B_DQ39
M_A_DQ38 VSS2 DQ38 M_A_DQ33 M_B_DQ38 VSS2 DQ38 M_B_DQ35 C278 C250 C7 C8
135 DQ34 DQ39 136 135 DQ34 DQ39 136
M_A_DQ39 137 138 M_B_DQ34 137 138 0.1u/10V 2.2u/6.3V_6 2.2u/6.3V_6 0.1u/10V
DQ35 VSS55 M_A_DQ44 DQ35 VSS55 M_B_DQ40
139 VSS27 DQ44 140 139 VSS27 DQ44 140
M_A_DQ40 141 142 M_A_DQ45 M_B_DQ44 141 142 M_B_DQ41
M_A_DQ41 DQ40 DQ45 M_B_DQ45 DQ40 DQ45
143 DQ41 VSS43 144 143 DQ41 VSS43 144
145 146 M_A_DQS#5 145 146 M_B_DQS#5
M_A_DM5 VSS29 DQS#5 M_A_DQS5 M_B_DM5 VSS29 DQS#5 M_B_DQS5
147 148 147 148
149
DM5
VSS51
DQS5
VSS56 150 149
DM5
VSS51
DQS5
VSS56 150 Place these Caps near So-Dimm2.
M_A_DQ42 151 152 M_A_DQ43 M_B_DQ46 151 152 M_B_DQ47
M_A_DQ46 153
DQ42
DQ43
DQ46
DQ47 154 M_A_DQ47 M_B_DQ43 153
DQ42
DQ43
DQ46
DQ47 154 M_B_DQ42 No Vias Between the Trace of PIN to
155 156 155 156
M_A_DQ48 157
VSS40
DQ48
VSS44
DQ52 158 M_A_DQ52 M_B_DQ53 157
VSS40
DQ48
VSS44
DQ52 158 M_B_DQ48 CAP.
M_A_DQ49 159 160 M_A_DQ53 M_B_DQ49 159 160 M_B_DQ52
DQ49 DQ53 DQ49 DQ53
161 VSS52 VSS57 162 161 VSS52 VSS57 162
163 164 M_CLK_DDR1 163 164 M_CLK_DDR2
NCTEST CK1 M_CLK_DDR1 7 NCTEST CK1 M_CLK_DDR2 7
165 166 M_CLK_DDR#1 165 166 M_CLK_DDR#2
VSS30 CK1# M_CLK_DDR#1 7 VSS30 CK1# M_CLK_DDR#2 7
M_A_DQS#6 167 168 M_B_DQS#6 167 168
M_A_DQS6 DQS#6 VSS45 M_A_DM6 M_B_DQS6 DQS#6 VSS45 M_B_DM6 SMDDR_VREF_DIMM R89 0
169 DQS6 DM6 170 169 DQS6 DM6 170 SMDDR_VREF 7,39,44
171 VSS31 VSS32 172 171 VSS31 VSS32 172
M_A_DQ50 173 174 M_A_DQ54 M_B_DQ51 173 174 M_B_DQ55
M_A_DQ51 DQ50 DQ54 M_A_DQ55 M_B_DQ54 DQ50 DQ54 M_B_DQ50
175 DQ51 DQ55 176 175 DQ51 DQ55 176
177 VSS33 VSS35 178 177 VSS33 VSS35 178
M_A_DQ56 179 180 M_A_DQ57 M_B_DQ60 179 180 M_B_DQ56
M_A_DQ60 DQ56 DQ60 M_A_DQ61 M_B_DQ57 DQ56 DQ60 M_B_DQ61
181 DQ57 DQ61 182 181 DQ57 DQ61 182
183 184 183 184 Add for memory margin --Allen /0228
M_A_DM7 VSS3 VSS7 M_A_DQS#7 M_B_DM7 VSS3 VSS7 M_B_DQS#7
185 DM7 DQS#7 186 185 DM7 DQS#7 186
187 188 M_A_DQS7 187 188 M_B_DQS7
M_A_DQ62 VSS34 DQS7 M_B_DQ58 VSS34 DQS7
189 DQ58 VSS36 190 189 DQ58 VSS36 190
D
M_A_DQ58 191 192 M_A_DQ63 M_B_DQ59 191 192 M_B_DQ62 D
DQ59 DQ62 M_A_DQ59 DQ59 DQ62 M_B_DQ63
193 VSS14 DQ63 194 193 VSS14 DQ63 194
CGDAT_SMB 195 196 CGDAT_SMB 195 196
SDA VSS13 3 CGDAT_SMB SDA VSS13
CGCLK_SMB 197 198 R10 10K CGCLK_SMB 197 198 R12 10K
SCL SA0 3 CGCLK_SMB SCL SA0
+3VRUN 199 200 R11 10K +3VRUN 199 200 R13 10K
VDD(SPD) SA1 VDD(SPD) SA1
DDR2_SODIMM 2-1734073-2 +3VRUN
CLOCK 0,1 SMbus address A0
CLOCK 3,4 SMbus address A4 PROJECT : TW3
CKE 0,1 H 5.2 CKE 2,3 H 9.2
Quanta Computer Inc.
Size Document Number Rev
B1A
DDRII SO-DIMM(200P)
Date: Thursday, March 09, 2006 Sheet 16 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
17
A A
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
C77 C87 C98 C67 C70 C82 C100 C104 C105 C58 C59 C57 C62
C107 C66 C108 C99 C65 C81 C69 C73 C76 C90 C86 C64 C68
B 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V B
0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
M_B_BS#1 RP9 1 2 56X2
8,16 M_B_BS#1
M_B_A0 3 4
7,16 M_ODT0 M_ODT0 RP4 1 2 56X2 M_B_A3 RP13 1 2 56X2
M_A_A13 3 4 M_B_A1 3 4
M_A_A9 RP20 1 2 56X2 M_B_A12 RP19 1 2 56X2
M_A_A8 3 4 M_B_A5 3 4 SMDDR_VTERM
M_A_A5 RP14 1 2 56X2
M_A_A3 3 4 SMDDR_VTERM M_B_A2 RP15 1 2 56X2
M_B_A4 3 4
M_A_A11 RP24 1 2 56X2 M_B_A8 RP21 1 2 56X2
M_CKE1 3 4 M_B_A9 3 4
7,16 M_CKE1
M_A_A10 RP12 1 2 56X2 M_B_A6 RP17 1 2 56X2
M_A_WE# 3 4 M_B_A7 3 4
8,16 M_A_WE#
M_A_A6 RP18 1 2 56X2 M_CKE2 RP26 1 2 56X2
7,16 M_CKE2
M_A_A7 3 4 8,16 M_B_BS#2 M_B_BS#2 3 4 SMDDR_VTERM
M_A_A2 RP16 1 2 56X2
M_A_A4 3 4 SMDDR_VTERM M_CS#2 RP6 1 2 56X2
7,16 M_CS#2
8,16 M_B_RAS# M_B_RAS# 3 4
M_A_BS#1 RP10 1 2 56X2 8,16 M_B_WE# M_B_WE# RP5 1 2 56X2
8,16 M_A_BS#1
M_A_A0 3 4 8,16 M_B_CAS# M_B_CAS# 3 4
M_A_A12 RP22 1 2 56X2 M_B_A10 RP11 1 2 56X2
M_A_A1 3 4 M_B_BS#0 3 4 SMDDR_VTERM
8,16 M_B_BS#0
M_A_CAS# RP8 1 2 56X2
C 8,16 M_A_CAS# C
M_A_BS#0 3 4 SMDDR_VTERM
8,16 M_A_BS#0
D D
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
DDRII TERMINATION
Date: Thursday, March 09, 2006 Sheet 17 of 47
1 2 3 4 5 6 7 8
5 4 3 2 1
U31A
7 PEG_RXP[15:0]
7 PEG_RXN[15:0]
7 PEG_TXP[15:0]
7 PEG_TXN[15:0]
PEG_TXP0
PEG_TXN0
AF1
AG2
PEX_RX0P
PEX_RX0N
PART 1 OF 4
PEX_TX0P
PEX_TX0N
AD5
AD6
V_GMCHEXP_RXP0
V_GMCHEXP_RXN0
0.1u/10V C309
18
PEG_TXP1 AG3 AE6 V_GMCHEXP_RXP1 PEG_RXN0 2 1 V_GMCHEXP_RXN0
PEG_TXN1 PEX_RX1P PEX_TX1P V_GMCHEXP_RXN1 0.1u/10V C657
AG4 PEX_RX1N P PEX_TX1N AE7
PEG_RXN1 2 1 V_GMCHEXP_RXN1
0.1u/10V C304 PEG_TXP2 AF4
C AD7 V_GMCHEXP_RXP2 0.1u/10V C323
PEX_RX2P PEX_TX2P
PEG_RXP0 2 1 V_GMCHEXP_RXP0 PEG_TXN2 AF5 PEX_RX2N
I PEX_TX2N AC7 V_GMCHEXP_RXN2 PEG_RXN2 2 1 V_GMCHEXP_RXN2
0.1u/10V C656 0.1u/10V C663
PEG_RXP1 2 1 V_GMCHEXP_RXP1 PEG_TXP3 AG6
- AE9 V_GMCHEXP_RXP3 PEG_RXN3 2 1 V_GMCHEXP_RXN3
D PEX_RX3P PEX_TX3P D
0.1u/10V C314 PEG_TXN3 AG7 PEX_RX3N
E PEX_TX3N AE10 V_GMCHEXP_RXN3 0.1u/10V C332
PEG_RXP2 2 1 V_GMCHEXP_RXP2 PEG_RXN4 2 1 V_GMCHEXP_RXN4
0.1u/10V C664 PEG_TXP4 AF7
X AD10 V_GMCHEXP_RXP4 0.1u/10V C685
PEX_RX4P PEX_TX4P
PEG_RXP3 2 1 V_GMCHEXP_RXP3 PEG_TXN4 AF8 PEX_RX4N
P PEX_TX4N AC10 V_GMCHEXP_RXN4 PEG_RXN5 2 1 V_GMCHEXP_RXN5
0.1u/10V C326 0.1u/10V C367
PEG_RXP4 2 1 V_GMCHEXP_RXP4 PEG_TXP5 AG9
R AE12 V_GMCHEXP_RXP5 PEG_RXN6 2 1 V_GMCHEXP_RXN6
0.1u/10V C684 PEG_TXN5 PEX_RX5P E PEX_TX5P V_GMCHEXP_RXN5 0.1u/10V C687
AG10 PEX_RX5N PEX_TX5N AE13
PEG_RXP5 2 1 V_GMCHEXP_RXP5 PEG_RXN7 2 1 V_GMCHEXP_RXN7
0.1u/10V C368 PEG_TXP6
S V_GMCHEXP_RXP6 0.1u/10V C384
AF10 PEX_RX6P PEX_TX6P AD13
PEG_RXP6 2 1 V_GMCHEXP_RXP6 PEG_TXN6 AF11 PEX_RX6N
S PEX_TX6N AC13 V_GMCHEXP_RXN6 PEG_RXN8 2 1 V_GMCHEXP_RXN8
0.1u/10V C688 0.1u/10V C689
PEG_RXP7 2 1 V_GMCHEXP_RXP7 PEG_TXP7 AG12 AC15 V_GMCHEXP_RXP7 PEG_RXN9 2 1 V_GMCHEXP_RXN9
0.1u/10V C385 PEG_TXN7 PEX_RX7P I PEX_TX7P V_GMCHEXP_RXN7 0.1u/10V C352
AG13 PEX_RX7N PEX_TX7N AD15
PEG_RXP8 2 1 V_GMCHEXP_RXP8 PEG_RXN10 2 1 V_GMCHEXP_RXN10
0.1u/10V C690 PEG_TXP8
N V_GMCHEXP_RXP8 0.1u/10V C692
AG15 PEX_RX8P PEX_TX8P AE15
PEG_RXP9 2 1 V_GMCHEXP_RXP9 PEG_TXN8 AG16 T AE16 V_GMCHEXP_RXN8 PEG_RXN11 2 1 V_GMCHEXP_RXN11
0.1u/10V C353 PEX_RX8N PEX_TX8N 0.1u/10V C360
PEG_RXP10 V_GMCHEXP_RXP10 PEG_TXP9
E V_GMCHEXP_RXP9 PEG_RXN12 V_GMCHEXP_RXN12
2 1 AF16 PEX_RX9P PEX_TX9P AC18 2 1
0.1u/10V C693 PEG_TXN9 AF17 R AD18 V_GMCHEXP_RXN9 0.1u/10V C695
PEG_RXP11 V_GMCHEXP_RXP11 PEX_RX9N PEX_TX9N PEG_RXN13 V_GMCHEXP_RXN13
2 1 F 2 1
0.1u/10V C361 PEG_TXP10 AG18 AE18 V_GMCHEXP_RXP10 0.1u/10V C363
PEG_RXP12 V_GMCHEXP_RXP12 PEG_TXN10 PEX_RX10P A PEX_TX10P V_GMCHEXP_RXN10 PEG_RXN14 V_GMCHEXP_RXN14
2 1 AG19 PEX_RX10N PEX_TX10N AE19 2 1
0.1u/10V C696 C 0.1u/10V C698
PEG_RXP13 2 1 V_GMCHEXP_RXP13 PEG_TXP11 AF19 AC21 V_GMCHEXP_RXP11 PEG_RXN15 2 1 V_GMCHEXP_RXN15
0.1u/10V C364 PEG_TXN11 PEX_RX11P E PEX_TX11P V_GMCHEXP_RXN11
AF20 PEX_RX11N PEX_TX11N AD21
PEG_RXP14 2 1 V_GMCHEXP_RXP14 +3VRUN
0.1u/10V C699 PEG_TXP12 AG21 AE21 V_GMCHEXP_RXP12
PEX_RX12P PEX_TX12P
1
PEG_RXP15 2 1 V_GMCHEXP_RXP15 PEG_TXN12 AG22 AE22 V_GMCHEXP_RXN12
PEX_RX12N PEX_TX12N C651
C PEG_TXP13 AF22 AD22 V_GMCHEXP_RXP13 U33 *0.1u/10V C
2
PEG_TXN13 PEX_RX13P PEX_TX13P V_GMCHEXP_RXN13
AF23 PEX_RX13N PEX_TX13N AD23
5
+1.2V_GFX_PCIE *TC7SH08FU
PEG_TXP14 AG24 AF25 V_GMCHEXP_RXP14 2
PEX_RX14P PEX_TX14P PLTRST# 13,14,24,29,33,44
L14 PEG_TXN14 AG25 AE25 V_GMCHEXP_RXN14 4
G72_PLLAVDD PEX_RX14N PEX_TX14N
1 2 1
BLM11A121S PEG_TXP15 AG26 AE24 V_GMCHEXP_RXP15
PEX_RX15P PEX_TX15P
1
3
C242 C192 PEX_RX15N PEX_TX15N
4.7u/6.3V_6 0.1u/10V R93 *200/F
2
1
G72_PLLAVDD N9 AB14
VDD_03 PEX_IOVDD_03 C266 C274 C273 C258 C261 C277
R9 VDD_04 PEX_IOVDD_04 AB15
1
2
C247 C189 C197 C168 C181 VDD_05 PEX_IOVDD_05
J10 VDD_06 PEX_IOVDD_06 W18
100p/50V 0.01u/16V 0.01u/16V 100p/50V 0.01u/16V J11 AB20
2
VDD_07 PEX_IOVDD_07
M11 VDD_08 PEX_IOVDD_08 AB21 PLACE NEAR BALLS PLACE NEAR GPU
N11 VDD_09
R11 VDD_10
T11 VDD_11 PEX_IOVDDQ_01 AA4
L12 AB5 +1.2V_GFX_PCIE
VDD_12 PEX_IOVDDQ_02
1
VDD_15 PEX_IOVDDQ_05
1
L13 VDD_16 PEX_IOVDDQ_06 AB9
M13 AC9 C259 C271 C276 C272 C260 C606
VDD_17 PEX_IOVDDQ_07 10u/6.3V_6 0.022u/16V 0.1u/10V 0.1u/10V 1u/10V 4.7u/6.3V_6
T13 AC11
2
VDD_18 PEX_IOVDDQ_08
U13 VDD_19 PEX_IOVDDQ_09 AB12
W13 VDD_20 PEX_IOVDDQ_10 AC12
1
VDD_23 PEX_IOVDDQ_13
M15 VDD_24 PEX_IOVDDQ_14 AB17
T15 VDD_25 PEX_IOVDDQ_15 AC17
U15 VDD_26 PEX_IOVDDQ_16 AB18
W15 VDD_27 PEX_IOVDDQ_17 AB19 +VCC_GFX_CORE
L16 VDD_28 PEX_IOVDDQ_18 AC19
1
1
M16 VDD_29 PEX_IOVDDQ_19 AC20
C245 C188 T16 C209 C193 C249
10u/6.3V_6 10u/6.3V_6 VDD_30 220p/50V 0.01u/16V 0.1u/10V
U16
2
2
VDD_31
W16 VDD_32 VDD_LP_01 W9
M17 VDD_33 VDD_LP_02 W10
N17 VDD_34 VDD_LP_03 W11
R17 VDD_35 VDD_LP_04 W12
T17 +3VRUN
+1.2V_GFX_PCIE VDD_36
L17 J12
PEX_PLL_AVDD VDD33_01
1 2 Y6 PEX_PLLAVDD VDD33_02 F13
1
1
BLM11A121S J13
VDD33_03
1
2
4.7u/6.3V_6 1u/10V 1u/10V 0.1u/10V 0.01u/16V PEX_PLLDVDD VDD33_05
J16
2
VDD33_06
A A
U31B
PART 2 OF 4
+3VRUN R349 1 2 2K/F 3GIO_ADR_0 R351 Integrated
1
D RAM_CFG0 G2 F10 RP50 D
+3VRUN MIO_B_D0 I2CB_SDA DVI_DAT 23
RAM_CFG1 & DVI_CLK 1
1
PCI_DEVID1 K1
R359 R360 R370 R374 R352 MIO_B_D5 U IFPCD_PLLVDD R68 10K R73 L8
M2 MIO_B_D6 IFPCD_PLLVDD M4 2 1
*10K 10K *10K *10K *10K M1 L *10K *BLM11A121S
3
RAM_CFG2 MIO_B_D7 IFPC_IOVDD
N1 MIO_B_D8 T 1 2 IFPC_IOVDD
1
RAM_CFG3 N2 M6
2
2
MIO_B_D9 IFPCD_PLLGND
1
RAM_CFG0 N3 I C161
RAM_CFG1 PCI_DEVID3 MIO_B_D10 Q8 C160 *0.1U_10V C164
R3 M 2
2
RAM_CFG2 MIO_B_D11 36,37,38,39,41,42 HWPG *2N7002W-7-F *470P_50V *4.7U_6.3V
2
RAM_CFG3 F2 E DACA / CRT
1
PEX_PLL_EN_TERM100 MIO_B_CTL3
G1 MIO_B_DE D DACA_RED AE1 CRT_R_COM 23
DACA_GREEN AD1 CRT_G_COM 23
I
1
1
+3VRUN K5 MIO_B_VDDQ1 DACB (TV/CRT2) C187 C207 C184
K6 MIO_B_VDDQ2
L6 F4 *470P_50V *4700P_25V *4.7U_6.3V
TV_C/R 35
2
MIO_B_VDDQ3 DACB_R_C
1
C171 C154 E4
DACB_G_Y TV_Y/G 35
1
1
0001 DDR2 16Mx16x4,64bit,128MB Samsung AA1
0010 DDR2 16Mx16x4,64bit,128MB Infineon IFPB_TXD6N TXUOUT2- 22
AB1 C643 C297 C298 C300
0011 DDR2 16Mx16x4,64bit,128MB Hynix IFPB_TXD6P TXUOUT2+ 22
PLLVDD H4 AB2 0.01u/16V 4700p/25V 470p/50V 2.2u/6.3V_6
2
0100 Reserve PLLVDD IFPB_TXD7N
IFPB_TXD7P AB3
0101 DDR2 32Mx16x4,64bit,256MB Samsung H5 W6
0110 DDR2 32Mx16x4,64bit,256MB Infineon PLLGND IFPB_TXCN TXUCLKOUT- 22
IFPB_TXCP W5 TXUCLKOUT+ 22
0111 DDR2 32Mx16x4,64bit,256MB Hynix
1000 DDR2 16Mx16x2,32bit,64MB Elpida XTALSSIN C1 PLL & U6 R83 2 1 *1K/F L3
1001 DDR2 16Mx16x2,32bit,64MB Samsung C628 XTALSSIN XTAL IFPAB_RSET BLM11A121S
IFPAB_VPROBE N6 PAD T14
1010 DDR2 16Mx16x2,32bit,64MB Infineon 1 2 XTALIN B1 DACB_VDD
XTALIN +3VRUN
1011 DDR2 16Mx16x2,32bit,64MB Hynix W4 IFPAB_IOVDD DACB_VREF
18p/50V BXTALOUT IFPA_IOVDD
C3 XTALOUTBUFF
1
B Y4 C2 Y4 +3VRUN B
27MHz XTALOUT IFPB_IOVDD C146 C121 C153 C114
0.01u/16V 4700p/25V 470p/50V 2.2u/6.3V_6
2
1
3
PCI_DEVID[3:0] Description C631 AE27 V5 IFPAB_PLLVDD
JTAG_TCK IFPAB_PLLVDD
1 2 AD26 JTAG_TMS
0111 G72MV AD27 Test RP51 L12
1000 G72M 18p/50V JTAG_TDI 2.2Kx2 BLM11A121S
AE26 JTAG_TDO IFPAB_PLLGND V6
R393 1 2 10K AD25 IFPAB_IOVDD
JTAG_TRST# +1.8VRUN
2
4
1
D1 ROM_CS# I2CC_SCL E9 EDIDCLK 22
F3 D8 C237 C236 C239
+2_5VRUN ROM_SI ROM I2CC_SDA EDIDDATA 22
D3 470p/50V 4700p/25V 4.7u/6.3V_6
2
L10 BLM11A121S ROM_SO
D2 ROM_SCLK
PLLVDD
1
1
SWAPRDY A7
C265 C264 C267
AC8 D7 2 1 470p/50V 4700p/25V 4.7u/6.3V_6
2
RFU_GND TESTMODE R40 10K
+3VRUN
G72M
R51 1 2 10K I2CH_SCL
R42 1 2 10K I2CH_SDA
+3VRUN MK1726-8
A
R339 R331 0.1u/10V
Layout footprint : MSOP8 A
*10K *10K
U2 MAX6647
R332 1 6 VGA_ALERT
VGA_ALERT 4
2
U31C U31D
FB_CMD[0..26] 21
FBD[0..63] 21
FBDQM[0..7] 21
FBDQS[0..7] 21
FBDQS#[0..7] 21
FBD0
FBD1
A26
C24
FB_DQ0
Part 3 of 4
FB_CMD0 G27
D25
FB_CMD0
FB_CMD1
B2
E2
H2
GND_01
GND_02
Part 4 of 4
GND_48
GND_49
P14
R14
U14
20
FBD2 FB_DQ1 FB_CMD1 FB_CMD2 GND_03 GND_50
B24 FB_DQ2 FB_CMD2 F26 L2 GND_04 GND_51 W14
FBD3 A24 F25 FB_CMD3 P2 AC14
FBD4 FB_DQ3 FB_CMD3 FB_CMD4 GND_05 GND_52
C22 FB_DQ4 FB_CMD4 G25 U2 GND_06 GND_53 AD14
FBD5 A25 J25 FB_CMD5 Y2 N15
FBD6 FB_DQ5 FB_CMD5 FB_CMD6 GND_07 GND_54
MEMORY INTERFACE
B25 J27 AC2 P15
FBD7 D23
FB_DQ6
FB_DQ7
FB_CMD6
FB_CMD7 M26 FB_CMD7 AF2
GND_08
GND_09
GND GND_55
GND_56 R15
D FBD8 G22 C27 FB_CMD8 AF3 AF15 D
FBD9 FB_DQ8 FB_CMD8 FB_CMD9 GND_10 GND_57
J23 FB_DQ9 FB_CMD9 C25 B5 GND_11 GND_58 N16
FBD10 E24 D24 FB_CMD10 E5 P16
FBD11 FB_DQ10 FB_CMD10 FB_CMD11 GND_12 GND_59
F23 FB_DQ11 FB_CMD11 N27 L5 GND_13 GND_60 R16
FBD12 J24 G24 FB_CMD12 P5 AD16
FBD13 FB_DQ12 FB_CMD12 FB_CMD13 GND_14 GND_61
F24 FB_DQ13 FB_CMD13 J26 U5 GND_15 GND_62 B17
FBD14 G23 M27 FB_CMD14 Y5 E17
FBD15 FB_DQ14 FB_CMD14 FB_CMD15 GND_16 GND_63
H24 FB_DQ15 FB_CMD15 C26 AC5 GND_17 GND_64 L17
FBD16 D16 M25 FB_CMD16 H6 P17
FBD17 FB_DQ16 FB_CMD16 FB_CMD17 GND_18 GND_65
E16 FB_DQ17 FB_CMD17 D26 AF6 GND_19 GND_66 U17
FBD18 D17 D27 FB_CMD18 B8 AD17
FBD19 FB_DQ18 FB_CMD18 FB_CMD19 GND_20 GND_67
F18 FB_DQ19 FB_CMD19 K26 E8 GND_21 GND_68 AF18
FBD20 E19 K25 FB_CMD20 AD8 K19
FBD21 FB_DQ20 FB_CMD20 FB_CMD21 GND_22 GND_69
E18 FB_DQ21 FB_CMD21 K24 K9 GND_23 GND_70 P19
FBD22 D20 F27 FB_CMD22 P9 V19
FBD23 FB_DQ22 FB_CMD22 FB_CMD23 GND_24 GND_71
D19 FB_DQ23 FB_CMD23 K27 V9 GND_25 GND_72 AD19
FBD24 A18 G26 FB_CMD24 AD9 B20
FBD25 FB_DQ24 FB_CMD24 FB_CMD25 GND_26 GND_73
B18 FB_DQ25 FB_CMD25 B27 AF9 GND_27 GND_74 E20
FBD26 A19 N24 FB_CMD26 B11 AD20
FBD27 FB_DQ26 FB_CMD26 GND_28 GND_75
B19 FB_DQ27 E11 GND_29 GND_76 AF21
FBD28 D18 F11 B23
FBD29 FB_DQ28 GND_30 GND_77
C19 FB_DQ29 L11 GND_31 GND_78 E23
FBD30 C16 D21 FBDQM0 P11 H23
FBD31 FB_DQ30 FB_DQM0 FBDQM1 GND_32 GND_79
C18 FB_DQ31 FB_DQM1 F22 U11 GND_33 GND_80 L23
FBD32 N26 F20 FBDQM2 AD11 P23
FBD33 FB_DQ32 FB_DQM2 FBDQM3 GND_34 GND_81
N25 FB_DQ33 FB_DQM3 A21 N12 GND_35 GND_82 U23
FBD34 R25 V27 FBDQM4 P12 Y23
FBD35 FB_DQ34 FB_DQM4 FBDQM5 GND_36 GND_83
C R26 FB_DQ35 FB_DQM5 W22 R12 GND_37 GND_84 AC23 C
FBD36 R27 V22 FBDQM6 AD12 AF24
FBD37 FB_DQ36 FB_DQM6 FBDQM7 GND_38 GND_85
T25 FB_DQ37 FB_DQM7 V24 AF12 GND_39 GND_86 B26
FBD38 T27 N13 E26
FBD39 FB_DQ38 FBDQS#0 GND_40 GND_87
T26 FB_DQ39 FB_DQS_RN0 A22 P13 GND_41 GND_88 H26
FBD40 AB23 E22 FBDQS#1 R13 L26
FBD41 FB_DQ40 FB_DQS_RN1 FBDQS#2 GND_42 GND_89
Y24 F21 B14 P26
read strobe
FBD42 FB_DQ41 FB_DQS_RN2 FBDQS#3 GND_43 GND_90
AB24 FB_DQ42 FB_DQS_RN3 B21 E14 GND_44 GND_91 U26
FBD43 AB22 V26 FBDQS#4 J14 Y26
FBD44 FB_DQ43 FB_DQS_RN4 FBDQS#5 GND_45 GND_92
AC24 FB_DQ44 FB_DQS_RN5 W23 L14 GND_46 GND_93 AC26
FBD45 AC22 V23 FBDQS#6 N14 AF26
+1.8VRUN FBD46 FB_DQ45 FB_DQS_RN6 FBDQS#7 GND_47 GND_94
AA23 FB_DQ46 FB_DQS_RN7 W27
FBD47 AA22
FBD48 FB_DQ47 FBDQS0
T24 FB_DQ48 FB_DQS_WP0 B22
1
write strobe
R341 FBD51 FB_DQ50 FB_DQS_WP2 FBDQS3
Rt R23 FB_DQ51 FB_DQS_WP3 C21
1K/F FBD52 R22 V25 FBDQS4
FBD53 FB_DQ52 FB_DQS_WP4 FBDQS5
T22 W24
2
FBD58
Rb
R342 C624 FBD59
AA26
AB25
FB_DQ58 PLACE BELOW GPU +1.8VRUN
1K/F 0.1u/10V FBD60 FB_DQ59
AB26 E15
2
1
FBD63 W25 J17
FB_DQ63 FBVTT_04 C179 C213 C232 C130 C638 C661 C650
FBVTT_05 J18
L19 4700p/25V 0.022u/16V 0.1u/10V 4700p/25V 0.1u/10V 4.7u/6.3V_6 1u/10V
2
FBVTT_06
FBVREF = FBVDDQ * Rb/(Rt + Rb). FBVTT_07 N19
VREF = 0.5 * FBVDDQ. 21 FB_CLK0 L24 FB_CLK0 FBVTT_08 R19
21 FB_CLK0# K23 FB_CLK0# FBVTT_09 U19
DDR: 0.9V = 1.8V * 1K/(1K + 1K). W19
FBVTT_10
21 FB_CLK1 M22 FB_CLK1
1
21 FB_CLK1# N22 FB_CLK1#
F17 C177 C191 C251 C180 C214 C252 C235
FBVDDQ_01 4700p/25V 0.022u/16V 0.1u/10V 4700p/25V 0.022u/16V 0.1u/10V 4.7u/6.3V_6
T11 PAD M23 F19
2
FB_REFCLK FBVDDQ_02
T12 PAD M24 FB_REFCLK# FBVDDQ_03 J19
FBVDDQ_04 M19
T19 +1.8VRUN
T13 FB_DEBUG FBVDDQ_05
PAD K22 FB_DEBUG FBVDDQ_06 J22
FBVDDQ_07 L22
1
FBVREF A16 P22
FB_VREF FBVDDQ_08 C157 C166 C172 C190 C158 C630
FBVDDQ_09 U22
Y22 R53 4700p/25V 0.022u/16V 0.1u/10V 0.022u/16V 0.1u/10V 1u/10V
2
FBVDDQ_10 40.2/F
2
T52 PAD D14 D15 FBCAL_PD_VDDQ
FB_PLLVDD FBCAL_PD_VDDQ
+1.2V_GFX_PCIE FB_PLLAVDD D13 E13 FBCAL_PU_GND
FB_PLLAVDD FBCAL_PU_GND R57
1
G72M 30/F
2
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
NV72M-3
Date: Thursday, March 09, 2006 Sheet 20 of 47
5 4 3 2 1
5 4 3 2 1
FB_CMD[0..26] 20
FBD[0..63] 20 U29 U5
FBDQM[0..7] 20 FB_A0 FB_A0
FB_CMD1 M8 G8 FBD6 FB_CMD1 M8 G8 FBD24
FBDQS[0..7] 20 FB_A1 A0 DQ0 FB_A1 A0 DQ0
FB_CMD3 M3 G2 FBD0 FB_CMD3 M3 G2 FBD26
FBDQS#[0..7] 20 FB_A2 A1 DQ1 FB_A2 A1 DQ1
FB_CMD2 M7 H7 FBD7 FB_CMD2 M7 H7 FBD25
FB_CMD0 FB_A3 A2 DQ2 FBD4 FB_CMD0 FB_A3 A2 DQ2 FBD30
N2 A3 DQ3 H3 N2 A3 DQ3 H3
FB_CMD24 FB_A4 FBD3 FB_CMD24 FB_A4 FBD28
N8 A4 DQ4 H1 N8 A4 DQ4 H1
FB_CMD22 FB_A5 FBD5 FB_CMD22 FB_A5 FBD27
N3 A5 DQ5 H9 N3 A5 DQ5 H9
FB_CMD21 FB_A6 FBD2 FB_CMD21 FB_A6 FBD29
N7 A6 DQ6 F1 N7 A6 DQ6 F1
FB_CMD23 FB_A7 FBD1 FB_CMD23 FB_A7 FBD31
P2 A7 DQ7 F9 P2 A7 DQ7 F9
FB_CMD19 FB_A8 FBD11 FB_CMD19 FB_A8 FBD19
P8 A8 DQ8 C8 P8 A8 DQ8 C8
FB_CMD20 FB_A9 FBD15 FB_CMD20 FB_A9 FBD20
P3 A9 DQ9 C2 P3 A9 DQ9 C2
R100 FB_CMD17 FB_A10 FBD14 FB_CMD17 FB_A10 FBD16
M2 A10 DQ10 D7 M2 A10 DQ10 D7
D 10K FB_CMD16 FB_A11 FBD8 FB_CMD16 FB_A11 FBD18 D
P7 A11 DQ11 D3 P7 A11 DQ11 D3
1 2 FB_CMD12 FB_CMD14 R2 D1 FBD12 FB_CMD14 R2 D1 FBD23
A12 DQ12 FBD13 A12 DQ12 FBD17
DQ13 D9 DQ13 D9
FB_CMD10 FB_BA0 FBD9 FB_CMD10 FB_BA0 FBD22
L2 BA0 DQ14 B1 L2 BA0 DQ14 B1
FB_CMD18 FB_BA1 FBD10 FB_CMD18 FB_BA1 FBD21
L3 BA1 DQ15 B9 L3 BA1 DQ15 B9
FBDQM1 B3 FBDQM2 B3
FBDQM0 UDM FBDQS1 +1.8VRUN FBDQM3 UDM FBDQS2
F3 LDM UDQS B7 F3 LDM UDQS B7
A8 FBDQS#1 A8 FBDQS#2
FB_CMD15 FB_RAS* UDQS# FB_CMD15 FB_RAS* UDQS#
K7 RAS K7 RAS
1
FB_CMD25 FB_CAS* L7 F7 FBDQS0 FB_CMD25 FB_CAS* L7 F7 FBDQS3
R378 FB_CMD9 FB_WE* CAS LDQS FBDQS#0 FB_CMD9 FB_WE* CAS LDQS FBDQS#3
K3 WE LDQS# E8 K3 WE LDQS# E8
10K FB_CMD8 FB_CS0* L8 R76 FB_CMD8 FB_CS0* L8
FB_CMD11 FB_CMD11 FB_CKE CS 1K/F FB_CMD11 FB_CKE CS
1 2 K2 CKE NC1 A2 K2 CKE NC1 A2
FB_CMD12 K9 E2 FB_CMD12 K9 E2
2
ODT NC2 ODT NC2
NC3 L1 NC3 L1
FB_CLK0 J8 R3 FB_CLK0 J8 R3
20 FB_CLK0 CLK NC4 CLK NC4
1
FB_CLK0# K8 R7 FB_CLK0# K8 R7
20 FB_CLK0# CLK# NC5 CLK# NC5
2
NC6 R8 NC6 R8
R75 C634
+1.8VRUN J1 1K/F 0.1u/10V +1.8VRUN J1
1
VDDL VREF1 VDDL VREF1
J2 J2
2
VREF VREF
J7 VSSDL J7 VSSDL
A3 VSS_0 VDD_0 A1 +1.8VRUN A3 VSS_0 VDD_0 A1 +1.8VRUN
E3 VSS_1 VDD_1 E1 E3 VSS_1 VDD_1 E1
J3 VSS_2 VDD_2 J9 J3 VSS_2 VDD_2 J9
N1 VSS_3 VDD_3 M9 N1 VSS_3 VDD_3 M9
1
P9 VSS_4 VDD_4 R1 P9 VSS_4 VDD_4 R1
FB_CLK0 C632 C641 C118 C116 C622 C216
A7 A9 4.7u/6.3V_6 0.1u/10V 0.01u/16V A7 A9 4.7u/6.3V_6 0.1u/10V 0.01u/16V
2
VSSQ_0 VDDQ_0 VSSQ_0 VDDQ_0
1
1
E7 E9 E7 E9
2
FB_CLK0# VSSQ_5 VDDQ_5 C217 C640 C218 VSSQ_5 VDDQ_5 C621 C117 C263
F2 VSSQ_6 VDDQ_6 G1 F2 VSSQ_6 VDDQ_6 G1
F8 G3 0.1u/10V 0.1u/10V 0.01u/16V F8 G3 0.1u/10V 0.1u/10V 0.01u/16V
2
VSSQ_7 VDDQ_7 VSSQ_7 VDDQ_7
H2 VSSQ_8 VDDQ_8 G7 H2 VSSQ_8 VDDQ_8 G7
H8 VSSQ_9 VDDQ_9 G9 H8 VSSQ_9 VDDQ_9 G9
VRAM VRAM
U6 U34
K8 R7 FB_CLK1# K8 R7
20 FB_CLK1# CLK# NC5 CLK# NC5
2
NC6 R8 NC6 R8
R81 C639
+1.8VRUN J1 1K/F 0.1u/10V +1.8VRUN J1
1
VREF VREF
J7 VSSDL J7 VSSDL
A3 VSS_0 VDD_0 A1 +1.8VRUN A3 VSS_0 VDD_0 A1 +1.8VRUN
E3 VSS_1 VDD_1 E1 E3 VSS_1 VDD_1 E1
J3 VSS_2 VDD_2 J9 J3 VSS_2 VDD_2 J9
N1 VSS_3 VDD_3 M9 N1 VSS_3 VDD_3 M9
1
1
P9 VSS_4 VDD_4 R1 P9 VSS_4 VDD_4 R1
C359 C358 C653 C620 C636 C233
A7 A9 4.7u/6.3V_6 0.1u/10V 0.01u/16V A7 A9 4.7u/6.3V_6 0.1u/10V 0.01u/16V
2
2
VSSQ_0 VDDQ_0 VSSQ_0 VDDQ_0
B2 VSSQ_1 VDDQ_1 C1 B2 VSSQ_1 VDDQ_1 C1
B8 VSSQ_2 VDDQ_2 C3 B8 VSSQ_2 VDDQ_2 C3
D2 VSSQ_3 VDDQ_3 C7 D2 VSSQ_3 VDDQ_3 C7
D8 VSSQ_4 VDDQ_4 C9 D8 VSSQ_4 VDDQ_4 C9
1
1
E7 VSSQ_5 VDDQ_5 E9 E7 VSSQ_5 VDDQ_5 E9
F2 G1 C357 C658 C659 F2 G1 C635 C633 C234
VSSQ_6 VDDQ_6 0.1u/10V 0.1u/10V 0.01u/16V VSSQ_6 VDDQ_6 0.1u/10V 0.1u/10V 0.01u/16V
F8 G3 F8 G3
2
2
A VSSQ_7 VDDQ_7 VSSQ_7 VDDQ_7 A
H2 VSSQ_8 VDDQ_8 G7 H2 VSSQ_8 VDDQ_8 G7
H8 VSSQ_9 VDDQ_9 G9 H8 VSSQ_9 VDDQ_9 G9
VRAM VRAM
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
NV72M-4
Date: Thursday, March 09, 2006 Sheet 21 of 47
5 4 3 2 1
5 4 3 2 1
EC
36 BRIGHT
BRIGHT R320 0
L35
+3VRUN
C608
+3VRUN
LVDS
CN2
31
32
Interface
30
29
R309
R308
0_6
0_6
EDIDCLK
EDIDDATA
EDIDCLK 19
EDIDDATA 19
22
LCD_BKLTCTL R321 *0 0.1u/10V 33 28 TXLCLKOUT-
19 LCD_BKLTCTL 34 27 TXLCLKOUT- 19
R329 TXLCLKOUT+
26 TXLCLKOUT+ 19
R334 *100K_4 BK1608HS800_6 U27 *4.7K
NC7SZ08P5X_NL 25 TXLOUT2-
+3VRUN 24 TXLOUT2- 19
5
1 TXLOUT2+
D 23 TXLOUT2+ 19 D
4 ENA/PWM
22 TXLOUT1-
19 LCD_BLON_AND 2 21 TXLOUT1- 19
TXLOUT1+
TXLOUT1+ 19
3
C611 C101 20
100p/50V 0.1u/10V 19 TXLOUT0-
18 TXLOUT0- 19
Remove L54 TXLOUT0+
17 TXLOUT0+ 19
16 TXUCLKOUT-
15 TXUCLKOUT- 19
TXUCLKOUT+
14 TXUCLKOUT+ 19
3VPCU 13 TXUOUT2-
12 TXUOUT2- 19
TXUOUT2+
11 TXUOUT2+ 19
10 TXUOUT1-
9 TXUOUT1- 19
TXUOUT1+
8 TXUOUT1+ 19
R335
10K 7 TXUOUT0-
6 TXUOUT0- 19
D11 TXUOUT0+
5 TXUOUT0+ 19
2 1 R336 1K/F
LID551# 36 4 +3VRUN +3VRUN
3 LCD3V
CH500H-40
C619 2
0.1u/10V 1
C582
LCD_CON30
0.1u/10V
25 LID#
C C618 C
1000p/50V
AGND_INV
INVTER_CON10
1
2 ARRAY_MIC_R 30
3
4 ARRAY_MIC_L 30
5
6
7
8 ENA/PWM
9 R18 0_8
10 VIN_INV VIN
11
12
CN3
C80
4.7u/25V_8 C88
1000p/50V
B B
Inverter Interface
R31 0_8
AGND_INV
+3VRUN
TRACE
C585 U26
80MIL
L34
LCD3V
FBM2125HM330
0.1u/10V 6 1 LCD3V_1 LCD3V
IN OUT
A 4 2 C593 C591 C583 C586 C589 A
IN GND
ENVDD 3 5 0.1u/10V 10u/10V_8 0.1u/10V 0.01u/16V 10u/10V_8
19 ENVDD ON/OFF GND
2
AAT4280_3
R310
10K PROJECT : TW3
Quanta Computer Inc.
1
CRT_VCC
F1
23
NI for DVI
2 1 2
D12
1
CRT PORT
+5VRUN
POLY SWITCH 1.1A
CH501 C397 CN20
16
0.1u/10V CRT_CONN 2/22 Tony Huang
6 CN6
VGA_RED L47 0_6 RED_PI L46 0_6 CRT_R_1 1 11 1 2
19 DVI_TX2- TMDS2- TMDS2+ DVI_TX2+ 19
7 3 GND2 TMDS4- 4
VGA_GEN L45 0_6 GEN_PI L44 0_6 CRT_G_1 2 12 DVI_DDCDAT 5 6 DVI_DDCCLK
4
DVI_DDCDAT TMDS4+ DDC_CLK CRT_VS_1 4
8 7 DDC_DAT VSYNC 8
VGA_BLU L43 0_6 BLU_PI L42 0_6 CRT_B_1 3 13 CRT_HS_1 9 10
19 DVI_TX1- TMDS1- TMDS1+ DVI_TX1+ 19
9 11 GND3 TMDS3- 12
4 14 CRT_VS_1 13 14
R419 R414 R406 C703 C701 C694 C700 C702 C705 TMDS3+ VCC5 DVI_DET CRT_VCC
10 15 GND HP_Detect 16
150/F 150/F 150/F T61 5 15 DVI_DDCCLK TMDS_TX0- 17 18
19 DVI_TX0- TMDS0- TMDS0+ DVI_TX0+ 19
*22p/50V *22p/50V *22p/50V *10p/50V *10p/50V *10p/50V 19 20
GND5 TMDS5-
21 TMDS5+ GNDC 22
TMDS_CLK+ 23 24 TMDS_CLK-
19 DVI_CLK+ DVI_CLK- 19
17
TMDS_CLK+ TMDS_CLK-
26 26 25 25
28 28 27 27
+3VRUN CRT_VCC CRT_HS_1 C2 C1 CRT_B_1
CRT_G_1 HSYNC BLUE CRT_R_1
C4 GREEN RED C3
C6 C6 GNDA C5
ESD PROTECTION *FOX_QH01121-EW1_24P
C175 C394
0.1u/10V 0.1u/10V +5VRUN
U10
1 16 HSYNC_R R138 39 CRT_HS_1
VCC_SYNC SYNC_OUT2 CRT_HSYNC
2 VCC_VIDEO SYNC_IN2 15 add GPU's I2CA stuff option
CRT_R_1 3 14 VSYNC_R R142 39 CRT_VS_1 to TMDS I2C pin if design
VIDEO_1 SYNC_OUT1
2
4
CRT_G_1 4 13 CRT_VSYNC DVI-I (CRT + TMDS). PR_INSERT#
CRT_B_1 VIDEO_2 SYNC_IN1 DDCCLK1 R152 0 DDCCLK2 RP56
5 VIDEO_3 DDC_OUT2 12 DDCCLK2 35
6 11 DDCCLK 2.2Kx2
GND DDC_IN2 DDCCLK 19
7 VCC_DDC DDC_IN1 10 DDCDAT
DDCDAT 19 2/22 Tony Huang Q37
2
8 9 DDCDAT1 R164 0 DDCDAT2 2N7002K
BYP DDC_OUT1 DDCDAT2 35
1
3
3 CM2009 R150 0 DVI_DDCDAT1 1 3 DVI_DDCDAT 3
19 DVI_DAT
C416 R157 R160 R163 R151 DDCDAT2 R155 *0
0.22u/10V 2.2K 2.2K 2.2K 2.2K
CRT R150,R159 Q37,Q38 RP56 R513
*0
DVI R150,R160 Q37,Q39 RP56 Q38
2
+3VRUN CRT_VCC 2N7002K
C395
CRT SWITCH R514 *0
0.1u/10V
+3VRUN CC0402 U12
5 6 PR_INSERT#
VCC SEL
VGA_RED 1 4 CRT_R_COM1 +3VRUN +3VRUN
IN_B1 COM
R328 PR_RED 3
10K
35 PR_RED
+5VRUN
IN_B0
GND 2 DVI DETECT Install for DVI
NC7SB3157P6X_NL R119 R118
INTVGA_E *1K *1K
C417
3
0.1u/10V U11
CC0402 DVI_DETECT 19
5 VCC SEL 6
3
2 2
2 Q21 VGA_GEN 1 4 CRT_G_COM1 2
36 PR_INSERT# IN_B1 COM Q13
2N7002K
3
PR_GRN 3 *MMBT3904
35 PR_GRN
1
IN_B0 DVI_DET R125 *10K
GND 2 2
+5VRUN Q12
1
NC7SB3157P6X_NL *MMBT3904
1
C411
0.1u/10V U9
CC0402 5 6
VCC SEL
VGA_BLU 1 4 CRT_B_COM1 1SS355 1 2 *D1
IN_B1 COM 35,36 PR_INSERT_R#
SEL FUNCTION(COM) PR_BLU 3
35 PR_BLU IN_B0
GND 2
LOW IN_B0 +3VRUN
NC7SB3157P6X_NL
HIGH IN_B1 CRT_R_COM1 L67 BLM18BB470
CRT_R_COM 19
+3VRUN C97
U1 SN74LVC2G125DCTR 0.1u/10V CRT_G_COM1 L68 BLM18BB470
CRT_G_COM 19
INTVGA_E 1 CC0402
1OE# VCC 8 CRT_B_COM1 L69 BLM18BB470
CRT_B_COM 19
HSYNC_COM 2 7 PR_INSERT#
1A 2OE#
1 +3VRUN +3VRUN 1
U4 SN74LVC2G125DCTR
INTVGA_E 1 1OE# VCC 8 C115
VSYNC_COM 2 7 PR_INSERT# 0.1u/10V
1A 2OE# CC0402
35 PR_VSYNC PR_VSYNC 3 6 CRT_VSYNC
2Y 1Y
4 5 VSYNC_COM
PROJECT : TW3
GND 2A VSYNC_COM 19
Quanta Computer Inc.
Size Document Number Rev
B1A
CRT,TV-OUT,DVI CONN.
Date: Thursday, March 09, 2006 Sheet 23 of 47
A B C D E
5 4 3 2 1
1Mbits
24
C: Add 9 X GND Pad for LAN controller.
(20050411)
D
C: Add RC (R37 change to 200K, Add C101) delay to D
C: Add these GND pin for via hole to GND Plane.
LANVCC control LOM_DISABLE#. (20050411)
LANVCC
R96
61
45
40
65
36
37
35
34
66
67
68
69
70
71
72
73
74
U35
1
4.7K
CLOSE CHIP
VDDO_TTL_MAIN
EPAD
SPI_CLK
SPI_DO
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
SPI_CS
GND
GND
GND
GND
GND
GND
GND
GND
GND
SPI_DI
PCIE_RXP2 C350 0.1u/10V PCIE_RXP2_R 49
13 PCIE_RXP2 TX_P
10 LOM_DISABLE# LOM_DISABLE# 36
PCIE_RXN2 C349 0.1u/10V PCIE_RXN2_R LOM_DISABLEn
13 PCIE_RXN2 50 TX_N
VAUX_AVLBL 12 LANVCC
PCIE_TXP2 54
13 PCIE_TXP2 RX_P
11 C306
PCIE_TXN2 SWITCH_VCC
C: Reserve R36. Change 13 PCIE_TXN2 53 RX_N *1U/10V
LANRST# to PCIRST# source VMAIN_AVAL 47
PCIE_WAKE 6
from MB option 14,33 PCIE_WAKE# WAKEn
SWITCH_VAUX 9 Install for 8038
modify.(2005/04/11) CLK_PCIE_LAN 55 FOR 8038
3 CLK_PCIE_LAN REFCLKP
24 R387 *2K_4
CLK_PCIE_LAN# HSDACP
3 CLK_PCIE_LAN# 56 REFCLKN
HSDACN 25 R389 2K
PLTRST# 5 R92 4.75K/F
13,14,18,29,33,44 PLTRST# PERSTn
RSET 16
TX0P 17 R9 NC
25 TX0P MDIP[0]
4 CTRL_25
TX0N CTRL25
DELAY PIN10 AT LEAST 150ms 25 TX0N 18 MDIN[0]
C 3 CTRL_12 C
LANVCC 25 TX1P
TX1P
TX1N
20 MDIP[1] 88E8038/88E8055 CTRL12
NI for 8038
25 TX1N 21 MDIN[1]
TSTPT 29
TX2P 26
25 TX2P MDIP[2]
TESTMODE 46
TX2N 27
25 TX2N MDIN[2]
TX3P 30 59 LAN_ACT_LED LAN_ACT_LED 25
25 TX3P MDIP[3] LED_ACTn
R407 R405
C697 4.7K 4.7K TX3N 31 60 LAN_SPEED_10/100#
25 TX3N MDIN[3] LED_LINK10/100n PAD T62
0.1u/10V U8
62 LAN_SPEED_1G# PAD T63
LED_LINK1000n
1 A0 SCL 6 38 VPD_CLK
2 5 63 LAN_LINK_LED LAN_LINK_LED 25
A1 SDA LED_LINKn
3 A2 41 VPD_DATA C652
8 7 T58 PAD LAN_SMB_CLK 42 15 XTAL1 27p/50V_6
VCC WP SMCLK XTALI
1
4 GND LAN_SMB_DATA 43 14 R388 Y5
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
VDD25
T59 PAD SMDATA XTALO
AVDD
*1M_NC 25.0000 MHz
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
AT24C08AN-10SI-2.7
XTAL2
2
C655
27p/50V_6
13
33
39
44
48
58
19
22
28
32
51
52
57
23
64
88E8055
VDD AVDD25
LANVCC L38 HI0805R800R-10
B VDD B
5 4
2
1 C642 C215 C344 C292 C346 C289 C340 C343 C345 C290 C291 C293
PLACEMENT CLOSE TO EACH OTHER
4.7u/10V_8 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 1000p/50V 1000p/50V 1000p/50V 1000p/50V 1000p/50V
3
100K
PR165 4.7u/10V_8 0.1u/10V 4.7K LANVCC
C: Widen to 20 mils. VDD to 20
100K mils.(20050411)
2
2
Q10
5 PQ52A CTRL_12 1 2SA1797T100Q VDD 0.1u/10V 0.1u/10V 0.1u/10V 1000p/50V 1000p/50V 1000p/50V
A 2N7002DW A
4
6
2 PR166 PR163
36 LAN_POWER
200K/F 470K
PQ52B C645 C220
1
2N7002DW
2
AVDD25
C133
0.01u/16V
C174
0.01u/16V
C: Modify PCIE & LAN differential layout
trace.(20050411)
10/100M Tr: DBED2LLAN05 C139 *1500p_6
25
4
U30
10/100/1000 Tr: DB0ZH1LAN06 CC0603
C148 *1500p_6 RJ-45 4
CC0603
1 24 MCT1 R37 75/F RJ45
TCT1 MCT1 LAN_ACT_LED
24 LAN_ACT_LED 12 Y-
24 TX3P TX3P 2 23 X-TX3P R56 150/F_6 11
TD1+ MX1+ X-TX3P 35 +3VSUS Y+
24 TX3N TX3N 3 22 X-TX3N
TD1- MX1- X-TX3N 35
X-TX3N 8 NC4/3-
X-TX3P 7
MCT2 R46 75/F NC/3+
4 TCT2 MCT2 21
X-TX1N 6
TX2P X-TX2P RX-/1-
24 TX2P 5 TD2+ MX2+ 20 X-TX2P 35
X-TX2N 5
TX2N X-TX2N NC2/2-
24 TX2N 6 TD2- MX2- 19 X-TX2N 35
X-TX2P 4 NC1/2+
X-TX1P 3
MCT3 R54 75/F RX+/1+
7 TCT3 MCT3 18
X-TX0N 2
TX1P X-TX1P TX-/0-
24 TX1P 8 TD3+ MX3+ 17 X-TX1P 35
X-TX0P 1
TX1N X-TX1N TX+/0+
24 TX1N 9 TD3- MX3- 16 X-TX1N 35 GND 14
GND 13
24 LAN_LINK_LED LAN_LINK_LED 10
3 G- 3
+3VSUS 9 G+
10 15 MCT4 R64 75/F R86 150/F_6
TCT4 MCT4 CN18
TX0P 11 14 X-TX0P C275 *1500p_6
24 TX0P TD4+ MX4+ X-TX0P 35
CC0603
TX0N 12 13 X-TX0N C229 *1500p_6
24 TX0N TD4- MX4- X-TX0N 35
CC0603
LAN_1
1
C152 C140 DB0ZH1LAN06
0.01u/16V 0.01u/16V C127
1000P_3KV
2
DBED2LLAN05 for 8038
GigaLAN transformer
TX0P TX3P
2 TX0N TX3N 2
TX1P TX2N
TX1N TX2P
1 RJ-11,USB Board 1
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
LAN SW CONN& MDC CONN
Date: Thursday, March 09, 2006 Sheet 25 of 47
A B C D E
1 2 3 4 5 6 7 8
+5VSUS 3VPCU
R450 *100K
2
U19
VCC OUT1
OUT2
0816a
7
6
USBPWR0_1
USBPWR0_1
USBPWR0_1 L31
BLM21PG600SN1
USB Port
USB-L
26
3 EN1 CML6
4 EN2 OC1 8 1 8
1 5 4 3 CON_USB0-
A GND OC2 13 USBP0- 2 7 A
1 2 CON_USB0+
13 USBP0+ 3 6
3
TPS2062DR
Q26 4 5
2N7002K DLW21HN900SQ2L CN12
2
C535
USBPWR0_1 L26
0.1u/10V BLM21PG600SN1 Left
1
USB-L
CML3
USBPWR0_1 USBPWR0_1 USBPWR4 CON_USB1- 1 8
13 USBP1- 4 3 2 7
1 2 CON_USB1+
13 USBP1+ 3 6
C721 C720
4 5
1
C544 C545 C753
0.01u/16V 0.01u/16V + 0.01u/16V 150u/6.3V_7 DLW21HN900SQ2L CN9
150u/6.3V_7
2
USBPWR4 L49
BLM21PG600SN1
USB
C:Change U1 from G528 to TPS2061 CML8
B 1 8 B
13 USBP4- 3 4 CON_USB4-
CON_USB4+ 2 7
3VPCU
13 USBP4+ 2 1 3 6 Right
U37 80mil
TPS2061DGNR 4 5
2 8 USBPWR4 DLW21HN900SQ2L CN22
+5VSUS IN1 OUT3
3 IN2 OUT2 7
OUT1 6 80mil
R430 *100K 4 EN#
1 GND
9 5
GND-C OC#
For Botton Board
3
Q24
2N7002K
2
C716
1
3
33 RF_LED 4
Q33 LED_BLUE/ORANGE 5
36 NUMLED NBSWON#
HDD,SATA Led 36 BATLED_BLUE 2 PDTC144EU 35,36 NBSWON#
34,36 MY3
MY3
6
7
MX2 8
HDDLED# 34,36 MX2 MX3 9
1
29 HDDLED# 34,36 MX3 MX4
34,36 MX4 10
SATA_LED# R474 0 HDDLED# MX5 11
12 SATA_LED# 34,36 MX5 MX6
34,36 MX6 12
+5VRUN
NI for PATA Wireless Led +5VRUN 13
14
LED3 15
36 PWR_BLUE
16
RF_LED# 3 1 R299 330_6
33 RF_LED# +5VRUN
2
PDTC144EU
Q32 4 2 BUT_CN14
LED1
R297 Card reader Led
1 3 3 1 330_6 5VPCU LED_BLUE/ORANGE
+5VRUN
4 2 330_6 LED4 BLUE_LED
Q19 R300 330_6
D 1 3 R296 D
3
LED_BLUE/ORANGE
Power Led 2
PDTC144EU 27 CARD_LED
PROJECT : TW3
Quanta Computer Inc.
2
Q31
1
PDTC144EU
36 PWRLED_AMBER Size Document Number Rev
B1A
USB,LED,Buttom/B
Date: Thursday, March 09, 2006 Sheet 26 of 47
1 2 3 4 5 6 7 8
8 7 6 5 4 3 2 1
C512
TPBIAS0
C568
27
12p/50V
1394_XIN R276 R275 1u/16V_6
PN
2
56.2/F 56.2/F
Y3
D U17A 24.576MHZ D
GNT2# L2 R19 R288 0
13 GNT2#
1
REQ2# GNT# XI 1394_XOUT R289 0
13 REQ2# L3 REQ# XO R18
AD17 R202 150/F N5 C514
13 FRAME# FRAME# IDSEL R0 R241 6.34K/F 12p/50V EB2
R6 FRAME# R0 T18
13 IRDY# IRDY# V5 T19 R1 TPA0P 1 2 L1394_TPA0+
13 DEVSEL# DEVSEL# IRDY# R1 CPSR229 390K TPA0N L1394_TPA0-
U6 DEVSEL# CPS R12 4 3
13 TRDY# TRDY# W5 P12 R228 330_6
13 SERR# SERR# TRDY# TEST0 *WCM2012-90 COM-CHOKE-WCM2012-4P
W6 SERR# VSSPLL R17
1394 Interface
13 STOP# STOP# V6
13 PERR# PERR# STOP# TPA0P
R7 PERR# TPA0P V14
13 PAR PAR U7 W14 TPA0N
PAR TPA0N TPBIAS0 EB1
TPBIAS0 R13
13 C/BE3# P2 V13 TPB0P TPB0P 1 2 L1394_TPB0+
CBE3 TPB0P TPB0N TPB0N L1394_TPB0-
13 C/BE2# U5 CBE2 TPB0N W13 4 3
13 C/BE1# V7 CBE1
13 C/BE0# C/BE0# W10 V16 1394_TPA1+ *WCM2012-90
CBE0 TPA1P 1394_TPA1- R274 R273 R287 0
TPA1N W16
PCLK_PCM L1 W17 TPBIAS1 R286 0
3 PCLK_PCM PCLK TPBIAS1
V15 1394_TPB1+ 56.2/F 56.2/F
PCIRST# TPB1P 1394_TPB1- COM-CHOKE-WCM2012-4P
13 PCIRST# K3 PRST# TPB1N W15
GRST# K5 GRST#
PCI Interface
13 AD[0..31] VDDPLL15 P15
AD0 R11 P17 1394_AVDD
AD1 AD00 PHY_TEST_MA R238 4.7K R277 C567
P11 AD01
AD2 U11 U12 C510 5.11K/F_6
AD3 AD02 PC0_RSVD 1u/16V_6 270p/25V
V11 AD03 PC1_RSVD V12
AD4 W11 W12
AD5 AD04 PC2_RSVD +3VRUN
R10 AD05
C AD6 U10 U13 C
AD7 AD06 AGND_00
V10 AD07 AGND_01 U14
AD8 R9 R14 R206
AD9 AD08 AGND_02 D6 *BAS316_NC
U9 AD09
AD10 V9 J5 10K 2 1
AD10 SUSPEND# SUS_STAT# 14,44
AD11 W9 L5 R204 0
AD11 RI_OUT# PCI_PME# 13
AD12 V8 H3
AD13 AD12 SPKROUT R205 *0
U8 AD13 RI# 14
AD14 R8 K2 2A
AD15 AD14 VR_EN#
W7 AD15 USB_EN E10
Miscellaneous
AD16 W4 L1394_TPA0+
AD16 J1
AD17
AD18
T2 AD17 SCL G2 SCL_CARD
SDA_CARD
2/24 Tony L1394_TPA0-
T1 G3 5
AD19 R3
AD18
AD19
SDA
Huang 4
AD20 P5 G1 INTC# 3
AD20 MFUNC0 INTC# 13
AD21 R2 H5 INTD# 2
AD21 MFUNC1 INTD# 13
AD22 R1 H2 1
AD22 MFUNC2 CARD_LED 26
AD23 P3 H1 L1394_TPB0+ 6
AD24 AD23 MFUNC3 R207 10K SERIRQ 14,36,44
N3 AD24 MFUNC4 J1 +3VRUN
AD25 N2 J2 L1394_TPB0-
AD26 AD25 MFUNC5 020115FB004S504ZL
N1 AD26 MFUNC6 J3 CLKRUN# 14,36,44
AD27 M5
AD28 AD27
M6 AD28 LATCH/VD3/VPPD0 C9
AD29 M3 A9
AD30 AD29 CLOCK/VD1/VCCD0# 2 4
M2 AD30 DATA/VD2/VPPD1 B9
AD31 M1 C4
AD31 RSVD_03/VD0/VCCD1#/PS_MODE 1 3
PCI7402
+3VRUN
B B
2/23 Tony Huang
C501 1u/16V_6
PCLK_PCM
+3VRUN R203
*33/B
+3VRUN L29 BK1608HS800_6
*2.2K *2.2K
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
CARDBUS(PCI7412)
Date: Thursday, March 09, 2006 Sheet 27 of 47
8 7 6 5 4 3 2 1
1 2 3 4 5 6 7 8
U17C
DO NOT INSERT SD/MMC, MEMORYSTICK AND XD SIMULTANEOUSLY.
28
F2
SC_OC#
SC_PWR_CTRL
SC_VCC5
SD_CMD/SM_ALE/SC_GPIO2
G5
G6
C5
VCC_FM 3 IN1 CARD READER (push-push)
A4 SM_RE# R211 *10K_NC
SD_CLK/SM_RE#/SC_GPIO1
SM_CLE/SC_GPIO0 B4
A SM_R/B#/SC_RFU D1 A
E3 SM_PHYS_WP#/SC_FCB T44
SM_PHYS_WP#/SC_FCB
SC_CLK E2
FlashMedia Interface
SC_RST F5
SC_DATA E1
VCC_FM VCC_FM
F1 TI_CLK48M TI_CLK48M 3 CN26
CLK_48
F3 1 11 MS_DATA3_SD_DAT3_SM_D3
SC_CD# SD_CDZ# MS_BS_SD_CMD_SM_WEZ MS-GND1 SD-CD/DAT3 MS_BS_SD_CMD_SM_WEZ
SD_CD# E9 2 MS-BS SD-CMD 12
A8 MS_CDZ# MS_DATA1_SD_DAT1_SM_D1 3 13
MS_CD# MS_DATA0_SD_DAT0_SM_D0 MS-D1 SD-GND1
SM_CD# B8 4 MS-SDIO(D0) SD-VDD 14
MS_DATA2_SD_DAT2_SM_D2 5 15 MS_CLK_SD_CLK_SM_ELWPZ
VCC_FM MS_CDZ# MS-D2 SD-CLK
XD_CD#/SM_PHYS_WP# A3 6 MS-INS SD-GND2 16
MS_DATA3_SD_DAT3_SM_D3 7 17 MS_DATA0_SD_DAT0_SM_D0
MC_PWR_CTRL_0# MS_CLK_SD_CLK_SM_ELWPZ MS-D3 SD-DAT0 MS_DATA1_SD_DAT1_SM_D1
MC_PWR_CTRL_0 C8 8 MS-SCLK SD-DAT1 18
F8 SM_R/B# R224 *10K 9 19 MS_DATA2_SD_DAT2_SM_D2
MC_PWR_CTRL_1/SM_R/B# MS_BS_SD_CMD_SM_WEZ R227 10K MS-VCC SD-DAT2
MS_BS/SD_CMD/SM_WE# E8 10 MS-GND2
A7 MS_CLK_SD_CLK_SM_ELWPZ_R R219 47_6 MS_CLK_SD_CLK_SM_ELWPZ
MS_CLK/SD_CLK/SM_EL_WP#
B7 MS_DATA0_SD_DAT0_SM_D0 SD_CDZ# 20 22 SD_WP_SM_CEZ
MS_SDIO(DATA0)/SD_DATA0/SM_D0 MS_DATA1_SD_DAT1_SM_D1 SD-SW(RSV) SD-SW(WP)
MS_DATA1/SD_DATA1_SM_D1 C7 21 SD-SW(GND) SD-SW(WP-GND) 23
A6 MS_DATA2_SD_DAT2_SM_D2
MS_DATA2/SD_DATA2_SM_D2 MS_DATA3_SD_DAT3_SM_D3
MS_DATA3/SD_DATA3_SM_D3 B6
VCC_FM VCC_FM
B B
CAD06
CAD05 M18 PCI7402
CAD04 N19
M15 C733
CAD03
CAD02 N17
N18 0.1u/10V
C CAD01 C
CAD00 P19
E13 +3VRUN
CCBE3
CCBE2 E18
CCBE1 H18
CCBE0 L17
C491 C506 C471 C494 C507
RSVD_04/D2 B10
N15 0.1u/10V 0.1u/10V 10u/10V_8 0.01u/16V 0.01u/16V
CCD1#/CD1#
CCD2#/CD2# B11
CVS1/VS1# A13
CRST# C15
CBLOCK# H15
CREQ#/INPACK# C14
CSERR#/WAIT# C12
F19 +3VRUN 1394_AVDD
CDEVSEL#
CFRAME# E19
CGRANT# G17
CINT# E12
CVS2/VS2# B16
CPERR# G19
G18 C488 C485 C472 C502 C504
CSTOP#
CIRDY F17
G15 0.1u/10V 1u/16V_6 1u/16V_6 0.1u/10V 1u/16V_6
CTRDY#
RSVD_02/A18 H17
RSVD_01/D14 M19
CCLKRUN# A11
CPAR H14
VCCCA_01 A15
VCCCA_00 J19
CSTSCHG A12
CAUDIO B12
CCLK F18
D D
PCI7402
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
1394 CONTROLLER
Date: Thursday, March 09, 2006 Sheet 28 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
PATA HDD
SATA HDD
CN24
PDD[0..15]
PDCS1#
PDCS3#
PDD[0..15]
PDCS1# 12
12
29
CN25 48 47 PDCS3# 12
+5VHDD L28 2 1 +5VRUN PDA0
46 45 PDA0 12
-IDERST PDA1
44 43 PDA1 12
BLM18PG181SN1 PDD7 PDD8 PDA2
42 41 PDA2 12
PDD6 PDD9 PDIOR#
26 22 40 39 PDIOR# 12
+3VRUN PDD5 PDD10 PDIOW#
A 25 21 38 37 PDIOW# 12 A
+3VHDD L27 2 1 +3VRUN +3VRUN PDD4 PDD11 PIORDY
24 20 36 35 PIORDY 12
PDD3 PDD12 IRQ14
23 19 34 33 IRQ14 12
BLM18PG181SN1 PDD2 PDD13 PDDREQ
18 32 31 PDDREQ 12
2
PDD1 PDD14 PDDACK#
17 30 29 PDDACK# 12
R239 PDD0 PDD15
16 +3VHDD R154 28 27
15 +5VHDD 26 25
8.2K/F 4.7K PDDREQ POP FOR PATA R230
14 PDIOW# 24 23 PDDREQ
1 2
1
13 PDIOR# 22 21 R240
12 PIORDY 20 19 CSEL1 *5.6K_NC
11 18 17 1 2
C498 C497 PDDACK#
10 +3VHDD 0.1u/10V 4.7u/10V_8 IRQ14 16 15 *470_4
9 PDA1 14 13 PDIAG#
8 Near To SATA connector PDA0 12 11 PDA2
PDCS1# 10 9 PDCS3#
HDDLED# 8 7
7 26 HDDLED# 6 5
SATA_RXP0 C711 3900p/25V
SATA
6 SATA_RXP0_C 12 4 3 +5VHDD
SATA_RXN0 C710 3900p/25V
5 SATA_RXN0_C 12 2 1
R254
4 SATA_TXN0
3 SATA_TXN0 12 *HDD_CON
SATA_TXP0 *10K
2 SATA_TXP0 12 +3VRUN +5VRUN
1 POP for PATA
NI for PATA
+5VHDD
SUYIN-200138_HDD
POP for PATA C538 C530 C522
2
DFHS22FR529 C536 R438
0.1u/10V 1000p/50V 4.7u/10V_8 10u/10V_8 10K
ECN200505-2912
ODD Q25
DTC144EUA
PDD2 PDD14
PDD1 17 18 PDD15
19 20 C729 NI
CDLED# 3 1 1 3 HDDLED# PDD0 PDDREQ
21 22 PDIOR#
23 24 CN18 HDD CON
PDIOW#
PIORDY 25 26 PDDACK#
Q29 Q30 27 28 R517 NI
IRQ14
*2N7002 *2N7002 PDA1 29 30 PDIAG#
31 32 Q25 2N7002
PDA0 PDA2
PDCS1# 33 34 PDCS3#
35 36 Q26 2N7002
CDLED#
R472 37 38
+5VODD 39 40 R513 10K
41 42 +5VODD
R106 R512 0
C 43 44 C
*0 *10K 45 46
RCSEL C328 C307 C321 C279 R168 470
47 48
2 49 50 0.1u/10V 1000p/50V 1000p/50V 150u/6.3V_7
POP for PATA +5VODD
R94
51
470 52
1
DFHS50FR245
NC FOR SLAVE
NC FOR PATA
D D
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
SATA,PATA(HDD,ODD)
Date: Thursday, March 09, 2006 Sheet 29 of 47
1 2 3 4 5 6 7 8
A B C D E
+3VSUS
1
L30
2
3V_DVDD AVDD
1
U23
GMT_G910T21U
Vout Vin 3
+5VRUN
30
GND
BLM11A601S
C532 C547 C553 C550 C569 C531 C573 C548 C555 C549 C558
10u/10V_8 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 10u/10V_8 0.047u/10V 1u/10V 0.1u/10V *10u/10V_8
2
BIT_CLK_AUDIO ACZ_SDOUT_AUDIO
2
AGND AGND
R260
R256 *47_NC
*22_NC
2 1
2 1
45
20
31
37
3
8
U22
C539 C542
VDDIO
AVDD_20
AVDD_31
AVDDHP
DVDD
DVDDM
*22P_NC *22P_NC
1
ACZ_RST#_AUDIO 10 29 INT_MICBIAS_L
12 ACZ_RST#_AUDIO RESET# MIC_BIAS_L
30 INT_MICBIAS_R Internal
R257 33/F BITCLK MIC_BIAS_R INT_MIC_L
12 BIT_CLK_AUDIO 5 21
ACZ_SYNC_AUDIO 9
BIT_CLK MIC_L
22 INT_MIC_R Array
12 ACZ_SYNC_AUDIO SYNC MIC_R
12 ACZ_SDIN0 R263 33/F SDI 7 SDI
MIC
12 ACZ_SDOUT_AUDIO ACZ_SDOUT_AUDIO 4 35 LINEOUT_L 31
SDO LINEOUT_L
LINEOUT_R 36 LINEOUT_R 31 Speaker
Near To Codec
PORT-A_BIAS_L 33
32 DIBP_HS DIBP_HS R246 DIBP_R 44 34
0 DIBP PORT-A_BIAS_R LINEIN_L_1 C529 2.2u/6.3V_6 LINEIN_L
PORT-A_L 38
39 LINEIN_R_1 C528 2.2u/6.3V_6 LINEIN_R
DIBN_HS R247 DIBN_R PORT-A_R
32 DIBN_HS 43 DIBN
0 14 MICBIAS_B
PORT-B_BIAS_L MICBIAS_B
PORT-B_BIAS_R 15
23 MIC
ACZ_SPKR C557 0.1u/10V BEEP PORT-B_L MIC
14 ACZ_SPKR 11 PCBEEP PORT-B_R 24
CD_L 17
CD_GND 18
SPDIF 48 19
31 SPDIF SPDIF CD_R
SENSE R272 5.11K/F_6 AVDD
1 SENSE 13 1
47 R280 5.11K/F_6 SENSE_PORT_A#
EAPD R292 10K/F SENSE_PORT_B#
R293 39.2K/F
SENSE_LINEOUT# 31
1 R284 20K/F SENSE_MIC
NC_1 VREF_HI T47 PAD
2 NC_2 VREF_HI 26
16 27 VREF_LO C559 1u/10V
NC_16 VREF_LO VC_REFA C556 1u/10V AGND
28 Fox : JA6333L-1S0-TR => AC97
R244 237K/F_8 RCOSC VC_REFA
MIC JACK
VSSIO_42
VSSIO_46
3V_DVDD RCOSC
AVSSHP
Check
DVSS
12
25
32
40
R283
2.2K CN29
1 7
INT_MICBIAS_R 2
INT_MICBIAS_L MIC C572 10u/10V_8 MIC1 L33 FCM1608K221 MIC2 6
AGND 3
4
5 8
R475 R476 R291 *1K AGND
DIGITAL ANALOG 2.2K 2.2K
Shall install 1k ?
C576
100p/50V
2SJ-S351-001
R243 0_8
R479 0_8
+5VRUN
L32
AMPVDD
0816a
C561
1u/16V_6
AMPVDD
R281
R295
0_8
0_8 31
BK2125HS330_8
A A
C554 C560 +5VRUN AGND
0.1u/10V 0.1u/10V
R261
25
15
10
8
7
1 20 HPS
C1P
VDD
HPVDD
C1N
CPVDD
NC HPS
3
27 14 SPKL
NC HPL SPKL 35
LINEOUT_L 1 2 2 13 SPKR Q18 AMPVDD
30 LINEOUT_L INL HPR SPKR 35
C546 1u/25V_8 SENSE_LINEOUT_A#
EAPD LINEOUT_R 1 2 28 4 INSPKL+ 2N7002K
2
30 LINEOUT_R C541 1u/25V_8 INR U21 OUTL+ INSPKL-
low:mute OUTL- 5
17 INSPKR-
GAIN 24 MAX9755ETI+ OUTR- 18 INSPKR+ R250
1
GAIN OUTR+ AMPVDD
23 6 GAIN SPKR HP *1K_NC
GND PVDDL
PGNDL 3
MUTE_AMP# MODE MODE
CPGND
1 2 22 16
CPVSS
AMPVDD /SHDN PVDDR
100K R252 19 GAIN
GND
VSS
PGNDR
B 21 VBIAS B
C533 C534 C563 0 10.5 3
0.1u/10V 0.1u/10V 10u/10V_8 R251
26
11
12
2
C540 1K/F
RB500
D9 1u/16V_6
1 9 0
C562
1
AGND AGND
1u/16V_6
CN13
SPKR R278 33_6 HP_R_2 1
INSPKL+ L53 0 INSPKL+N 1 3
INSPKL- L52 0 INSPKL-N 2 SPKL R268 33_6 HP_L_2 2
INSPKR+ L51 0 INSPKR+N 3 4 11
INSPKR- L50 0 INSPKR-N 4 5 10
5 6
6 R290 R271 C575 C565
2
AGND
AGND AGND AGND AGND R294
3/9 Tony Huang SENSE_LINEOUT_A# +5VRUN
10K
AMPVDD D10
C577
2 1 HPSENSE_PR# 35
AGND RB500
1
D
0.1u/10V When Docking insert , disable BTL D
30 SENSE_LINEOUT# 4 2
PROJECT : TW3
U24 Quanta Computer Inc.
AHCT1G125DCH AGND Size Document Number Rev
A1A
AUDIO AMPLIFIER
Date: Thursday, March 09, 2006 Sheet 31 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Revision History
REV
0
Description
Initial Release
Date
April 26, 2005 32
A A
DIBN_HS
30 DIBN_HS
DIBP_HS
30 DIBP_HS
MBR1 WIRE-TO-BOARD
MR3 6.81M/F_8 MMBD3004S
4 RAC1 2
RAC AGND_LSD 1 2 1
12 CNXT-0805
TEST
4 3
MRV1
ML1 MJ2
MR1 6.81M/F_8
5 TAC1 MBR2 2
TAC MMBD3004S
B 1 B
CNXT-0805
MJ1
TAC1_TIP 5335R13-005 TIP_1 *127214FS002G200ZO_NC
2
DIBN 16 11 EIC MC11 0.1u/10V MFB1 CNXT-502R29N 1
DIBN EIC MC8 MC9
CNXT-0402 470pF/3KV 470pF/3KV MJ3
MC10 0.01u/100V_6 CNXT-502R29N *127214FS002G200ZO_NC
AGND_LSD
CNXT-0603
PWR+ 15 R810 and C810 must be placed near pin 6 (RXI) MC7
PWR and there should be no vias on the(RXI)net. AGND_LSD *470pF
GND
MC5 AVdd_20548
0.1u/10V MR2
CNXT-0402 2 6 RXI RX1_1 MC1 0.047u/200V_12 BRIDGE_CC
MC12 AVDD RXI 100.0V
GND MC3 237K/F_8
150p/50V 0.1u/10V CNXT-0805 MR9 MR5 MR6 MR10
MJ4 CNXT-0402 MT1 CNXT-0402 280/F_12 280/F_12 280/F_12 280/F_12
2 DIBN_HS 2 3 CNXT-1206 CNXT-1206 CNXT-1206 CNXT-1206
1 DIBP_HS MC6
47p/50V
*127214FS002G200ZO_NC CNXT-0402 AGND_LSD BRIDGE_CC2
1 4
MODEM-SMAR DIBP 14 10 EIO MR13 100/F MQ1 QBASE
DIBP EIO MMBTA42
MJ6 MC13 CNXT-0402
C C
1 MQ4
2 150p/50V 9 EIF MQ3 MMBTA42
CNXT-0402 EIF MMBTA42
3
4 MR8
DVdd 1 8 TXO MQ2 *47_6
*127214FS004G200ZO_NC DVDD TXO MMBTA42 5% MR11 MR12
GND
CNXT-0603 3.01/F 3.01/F
MC4 7 TXF CNXT-0402 CNXT-0402
0.1u/10V TXF
MJ5 CNXT-0402 13
MTH1 GPIO MR4
1
110_6
VC
EP
2
AGND_LSD 5% MR7
*27214FS002G200ZO_NC CNXT-0603 9.1_12
3
17
CNXT-1206
GND GND
VC_LSD
AGND_LSD
MC2
0.1u/10V
D AGND_LSD D
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
Conexant Modem
Date: Thursday, March 09, 2006 Sheet 32 of 47
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3VRUN RF_LED 26
RF_LED#
+3VSUS +3VRUN +1.5V R467 R466 RF_LED# [26]
B B
+3VRUN *10K 10K
3
Q15 Q17
1
2 BLUELED 2
C493 C489 C476 C469 C478 C747 C492 R259
0.1u/10V 1u/16V_6 0.1u/10V 10u/10V_8 0.01u/16V 0.1u/10V 10u/10V_8 4.7K
BLUELED# 2 Q28 RF_LINK# 2 Q27 DTC144EUA DTC144EUA
1
*IRLML5103 IRLML5103
HW_RADIO_DIS#
3
Q16
2 DTC144EUA
[36] BT_ON# R468 0_6
1
R469 *0_6
R267 1 2 0_6
1
1
C C
C755 C756 C524 C525 C527 C526
CML5
4 3 CARD_USBP3- 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
[13] USBP3-
2
2
1 2 CARD_USBP3+ BT_AVTIVE_R R242 1 2 *0_6 CCI_CLK
[13] USBP3+
R265 1 2 0_6 R245 1 2 0_6 CCI_DATA
*DLW21HN900SQ2L
NC1
NC2
NC3
NC4
2231_STBY# SHDN# PERST# CPPE# [13] PCIE_TXP1 PETp0
1 STBY# CPPE# 10 26 GND_4
D PLTRST# 6 9 CPUSB# D
SYSRST# CPUSB# 1CX4310C-JM
19
27
28
29
30
OC#
16 NC
PCI-Express TX and RX direct to connector
7 GND0 RCLKEN 18
JAE PX10FS16PH-26P
R5538D001-TR-F
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
BT,NEW CARD,MINI PCIE
Date: Thursday, March 09, 2006 Sheet 33 of 47
1 2 3 4 5 6 7 8
5 4 3 2 1
KeyBoard Interface
34
CN4 3VPCU
26
D RP49 CA3 220PX4 CA4 220PX4 D
MY15 25 MX2 MX3 MY8
36 MY15 24 10 1 1 2 1 2
MY10 MX1 9 2 MY0 MY5 3 4 3 4 MY7 CN14
36 MY10 23
MY11 MX7 8 3 MX5 MY1 5 6 5 6 MY4 R302 0 FAN_PWR1 +3VRUN
36 MY11 22 +5VRUN 1
MY14 MX6 7 4 MX4 MX0 7 8 7 8 MY2
36 MY14 21 36 PWM_FAN 2
MY13 MY9 6 5
36 MY13 20 3
MY12
36 MY12 19 4
MY3 10KX8 C579 C580 R301
26,36 MY3 18
MY6 CA6 220PX4 CA2 220PX4 10u/10V_8 0.1u/10V FAN
36 MY6 17
MY8 RP47 MY14 1 2 1 2 MX2 10K
36 MY8 16
MY7 10 1 MY15 MY11 3 4 3 4 MY0
36 MY7 15
MY4 MY6 9 2 MY10 MY10 5 6 5 6 MX5
36 MY4 14 FANSIG 36
MY2 MY3 8 3 MY11 MY15 7 8 7 8 MX4
36 MY2 13
MX0 MY12 7 4 MY14
36 MX0 12
MY1 MY13 6 5 FAN_PWR1 C578
36 MY1 11
MY5 0.01u/16V
36 MY5 10
MX3 3VPCU 10KX8 CA5 220PX4 CA1 220PX4
26,36 MX3 9
MX2 MY6 1 2 1 2 MY9 C584
26,36 MX2 8
MY0 RP48 MY3 3 4 3 4 MX6 0.1u/10V
36 MY0 7
MX5 10 1 MY7 MY12 5 6 5 6 MX7
26,36 MX5 6
MX4 MX3 9 2 MY8 MY13 7 8 7 8 MX1
26,36 MX4 5
MY9 MY5 8 3 MY2
36 MY9 4
MX6 MX0 7 4 MY4
26,36 MX6 3
MX7 MY1 6 5
36 MX7 2
MX1
36 MX1 1
10KX8
27
6906-25
C C
TOUCH PAD
HOLE18 HOLE17 HOLE1 HOLE14
L4
+5V_TP C124 0.1u/10V
B +5VRUN B
SW2
BK2125HS330_8
TOUCH_RIGHT R45 1K/F 1 3
2 4
1
R30 R29 5
2
10K 10K CN5 C137
HOLE19 HOLE13 HOLE15 1 0.1u/10V MISAKI_TC004-PS11AT
1
*H-C315I150D110P2 *H-C315I150D110P2 *H-C315I150D110P2 L6 BLM11A601S 2
HOLE4 HOLE8 HOLE20 1 2 3
H-C275D146P2 H-C275D146P2 *H-C178D110P2 36 TPDATA L5 BLM11A601S 4
1 2 5 SW1
36 TPCLK
6
7 TOUCH_LEFT R36 1K/F 1 3
1
8 2 4
TOUCH_LEFT 9 5
1
2
10
11 C131
HOLE11 HOLE9 TOUCH_RIGHT 12 0.1u/10V MISAKI_TC004-PS11AT
1
*H-C275D146P2 *H-C275D146P2 HOLE7 HOLE3 13
H-C275D146P2 H-C275D146P2 14
TOUCH_PAD
1
2
4
6
8
CP1
A
8P4C-10P A
1
3
5
7
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
T/P,FAN,KB
Date: Thursday, March 09, 2006 Sheet 34 of 47
5 4 3 2 1
A B C D E
X-TX0P 2 1 X-TX2P
25 X-TX0P X-TX0P X-TX2P X-TX2P 25
X-TX0N 4 3 X-TX2N
25 X-TX0N X-TX0N X-TX2N X-TX2N 25
C60 C61 X-TX1P 6 5 X-TX3P
25 X-TX1P X-TX1P X-TX3P X-TX3P 25
0.1u/50V_6 0.1u/50V_6 X-TX1N 8 7 X-TX3N
4 25 X-TX1N X-TX1N X-TX3N X-TX3N 25 4
10 PR_5VSUS PR_3VSUS 9
12 PR_5VSUS PR_3VSUS 11
EMI 14 PR_5VSUS PR_3VSUS 13
16 PR_5VSUS GND 15
18 17 DK_USBP2+
PR_5VSUS DK_USBP2+ DK_USBP2-
CRT_GND 20 GND DK_USBP2- 19
R312 1 2 0_6 DDCCLK2_C 22 21 CRT_GND
DDCDAT2_C DDCCLK2 GND PR_RED_C
24 DDCDAT2 PR_RED 23
*DLW21HN900SQ2L PR_HSYNC_C 26 PR_HSYNC PR_GRN 25 PR_GRN_C 2/22 Tony Huang
1 2 DK_USBP2- PR_VSYNC_C 28 27 PR_BLU_C
13 USBP2- PR_VSYNC PR_BLU
4 3 DK_USBP2+ 30 29
13 USBP2+ 23,36 PR_INSERT_R# PR_INSERT# CH_DVI_DETECT
32 31 R17 0_6
CML7 2 0_6 GND NBSWON# NBSWON# 26,36
R313 1 27 1394_TPA1+ 1394_TPA1+ 34 33 DOCKON
1394_TPA1- 1394_TPA1+ DOCKON 1394_TPB1+
27 1394_TPA1- 36 1394_TPA1- 1394_TPB1+ 35 1394_TPB1+ 27
38 37 1394_TPB1- 1394_TPB1- 27
GND 1394_TPB1-
40 AUDGND GND 39
23 DDCCLK2 L60 0_6 DDCCLK2_C HPSENSE_PR# 42 41
31 HPSENSE_PR# HPSENSE_PR# AUDGND
31 SPKL 44 SPK_L_PR SPK_R_PR 43 SPKR 31
23 DDCDAT2 L61 0_6 DDCDAT2_C 46 45
GND GND
VA_PR 48 VA_PR VA_PR 47 VA_PR
L62 0_6 PR_HSYNC_C
GND
GND
23 PR_HSYNC
50
49
PR_RED
23 PR_RED L64 0_6 PR_RED_C
PR_GRN
23 PR_GRN L65 0_6 PR_GRN_C
PR_BLU
3 23 PR_BLU L66 0_6 PR_BLU_C 3
R306 0_8
R497 R498 R499
*150/F *150/F *150/F
AGND_PR AGND_PR
C788 C789 C790 C791 C792 C793 AGND_PR
*5.6p/50V *5.6p/50V *5.6p/50V *5.6p/50V *5.6p/50V *5.6p/50V
R512 0_6
For EMI
CRT_GND
+3VSUS
PR_3VSUS
PR_3VSUS
C482 22p/50V
TV-OUT
1
2
5
6
PC59
TV_Y/G 1 2 TV_LUMA_1 0.1u/10V PC58 PC56
19 TV_Y/G
L25 1.8uH_8 PR_INSERT-1 3 0402
0.1u/10V 0.1u/10V
R218 C484 C483 PQ13 0402 0402
2 2
150/F AOS6402
4
270p/25V 330p/50V
PR_3VSUS
CN21
C474 22p/50V S-VIDEO
5
PC57
TV_C/R 1 2 TV_CHROMA_1 6 4 0.1u/10V
5
19 TV_C/R 6 4 PR_5VSUS
L23 1.8uH_8 0402
R209 C475
C477
VIN
PR_5VSUS
150/F 330p/50V 9 8 +5VSUS
270p/25V 9 8 PC49 PC52 PC51
+3VSUS
10u/10V_8 0.1u/10V 0.1u/10V
0805 0402 PR43
3 0402 100K
3 1
7
C479 22p/50V
1
2
5
6
PR140 PC55
7
3
+3VRUN PQ12
PC135 AOS6402
4
R212 C480 C481 DOCKON# 2 0.1u/50V_6
150/F 0603
270p/25V 330p/50V R311 PQ11
PR_5VSUS
10K DTC144EUA
1
3
1 PC48 1
2 0.1u/10V
36 DOCKON 0402
CX8PG181001 (180 ohm ,1.5A) C594 PQ48
Intel CRB 0.1u/10V DTC144EUA
1
CH00606TB04 CH00606TB04
150 ohm@ 100MHZ PROJECT : TW3
6pf
(100mA)
6pf
Quanta Computer Inc.
16V 16V Size Document Number Rev
B1A
PORT REPLICATOR
Date: Thursday, March 09, 2006 Sheet 35 of 47
A B C D E
5 4 3 2 1
3VPCU
C718
10u/10V_8
C717
0.1u/10V
C729
0.1u/10V
C713
0.1u/10V
3VPCU
C736
0.1u/10V
VCCRTC
MBCLK
MBDATA
RN2
8
4.7KX4
7
3VPCU
ENV1
BADDR0
BADDR1
SHBM
R433
R434
R435
R436
10K
10K
*10K_4_NC
10K
36
6 5
ABDATA I/O Address
0816a ABCLK
4 3
BADDR1-0 Index Data
R444 2 1
3VPCU 0 0 2E 2F
*0 0 1 4E 4F
L48 1 0 (HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
BLM18PG181SN1 1 1 Reserved
1 2
551_AVCC
D D
C725 R443
0.1u/10V C727 Should have a 0.1uF capacitor close to
0
+3VRUN
C715
0.1u/10V
0.1u/10V every GND-VCC pair + one larger cap on
LDRQ#(pin 8) internal is no use the supply.
123
136
157
166
161
C732
16
34
45
95
0.1u/10V U39
LDRQ#0 R459 *0_6 DRQ0# +3VRUN
VBAT
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VDD
AVCC
12,44 LDRQ#0
+3VRUN
2
470K LAD2 13 88 MBID1 T43
12,33,44 LAD2 LAD2 IOPE1/AD5
LAD3 10 89 MBID2 T71 PR_INSERT_R# R454 100K
12,33,44 LAD3 LAD3 IOPE2/AD6
PCLK_541 18 AD Input 90 PR_INSERT_R# 1 3
3 PCLK_541 LCLK IOPE3/AD7 PR_INSERT# 23
591RESET# 19 93 T76 NBSWON# R453 4.7K
KBSMI# 551_KBSMI# LREST DP/AD8 T73 Q34
14 KBSMI# 2 1 22 SMI DN/AD9 94
D18 BAS316 T92 23 MMBT3904 C731 +3VRUN
PWUREQ
1
0816a 99 CC-SET
DA0 CC_SET 40
C739 100 CV-SET 0.1u/10V KBSMI# R462 4.7K
DA output DA1 CV_SET 40
10p/50V SCI# 2 1 551_SCI# 31 101 EC_BRIGHT
14 SCI# T74 PR_INSERT_R# 23,35
2
MX1 72 39
34 MX1 KBSIN1 IOPA5/PWM5
R457 MX2 73 40 T88
26,34 MX2 KBSIN2 IOPA6/PWM6
*10_4 MX3 74 43 R455 0 T90
26,34 MX3 KBSIN3 IOPA7/PWM7 LOM_DISABLE# 24
MX4 77
26,34 MX4 KBSIN4
MX5 78 153 PWR_BLUE
26,34 MX5 PWR_BLUE 26
1 2
1
SUSON 149 PORTK 134 A11 6 29 C724
39,43 SUSON IOPM1/D9 IOPK3/A11 A11 NC1
MAINON 155 130 A12 5 38 T80 *PAD 0.1u/10V
39,41,42,43 MAINON IOPM2/D10 PORTM IOPK4/A12 A12 NC2
LAN_POWER 156 129 A13 4 11 3VPCU
24 LAN_POWER
2
VRON IOPM3/D11 IOPK5/A13/BE0 A14 A13 NC3
37 VRON 3 IOPM4/D12 IOPK6/A14/BE1 121 3 A14
DNBSWON# D17 2 1 BAS316 4 120 A15 2 31
14 DNBSWON# IOPM5/D13 IOPK7/A15/CBRD A15 VCC
RSMRST# 27 1 30
14 RSMRST# IOPM6/D14 A16 VCC
1
PWROK R458 0 28 113 A16 40 C726 C723
14 PWROK IOPM7/D15 IOPL0/A16 A17
112 A17 13 0.1u/10V 0.047u/10V
CS# PORTL IOPL1/A17 A18 A18
173 104 37
2
541SEL1# SEL0 IOPL2/A18 A19 A19
T87 174 SEL1 IOPL3/A19 103 GND 23
T86 541CLK 47 48 CS# 22 39
CLK IOPL4/WR1 RD# CE# GND
24 OE#
WR# 9 WE#
AGND
GND1
GND2
GND3
GND4
GND5
GND6
GND7
NC10
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
SST39VF080
AJ875410F34 AKE358AKZ61 IC EEPROM(40P)MX29LV008BTTC-70G(1M*8)LF
17
35
46
122
159
167
137
96
11
12
20
21
85
86
91
92
97
98
3VPCU
U40
AKE358AKZ87 IC EEPROM(40P)MX29LV008CTTC-70G(1M*8)LF 1.AMD-29LV081B require MAX 500nS Tready for it's hardware
MBCLK 6 1
MBDATA SCL A0 C734 reset.And MAX6326_UR29 has >100mS reset timing.So we can tie
A 5 SDA A1 2 A
*NM24C08
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
PC87541V & FLASH
Date: Thursday, March 09, 2006 Sheet 36 of 47
5 4 3 2 1
5 4 3 2 1
+5VSUS
VRM_CLKEN#
37
1
PR126
3
0_6
PR40
2
VRON 1 2 2 PR36 8771VDD
*0
1
10K/F VIN
PC36 PR120
2
10/20 0.1u/10V PQ8 10
1
D D
JERRY 2N7002K PC28 PD6
10u/25V_12 CH501
2
add 8771VCC
1
1
CLKEN PC117 VIN
2.2u/6.3V_6 8771BST1
PQ7
1
RQA130N03FD5
1
+5VSUS VIN PC32 PC44 PC40 PC30 + PC45 PC46
1
PR37 PC33 0.1u/50V_6 2200p/50V 0.1u/50V_6 2200p/50V 10u/25V_12 10u/25V_12
1
0_6 0.22u/16V_6 PC134 X6S_1206 X6S_1206
2
PR25 100u/25V
2
1
1
200K/F 4
2
PR35 PR34 PR19
19
25
10K/F 1.91K/F 10K PU2
2
8 VCC_CORE
VCC
VDD
TON
2
3
2
1
30 8771BST1_R
BST1 PL10 0.45_25A_20%_ETQP4LR45XFC
17 PHASEGD
28 8771LX1 2 1
LX1
7,14 DELAY_VR_PWRGOOD 2
3
PWRGD 8771DH1
DH1 29
5
6
7
8
9
5
6
7
8
9
VRM_CLKEN# CLKEN 1 PQ49
3,14 CLK_EN# CLKEN
1
26 8771DL1 FDS7088SN3 PC133
DL1
1
4 4 *1.5n/50V_6 + + + PC12
1
H_VID0 31 27 0.01u/16V
5 H_VID0
2
D0 PGND1
2
H_VID1 32 PC53 PQ50 PC129
5 H_VID1
2
H_VID2 D1 *1n/50V PR135 PC126 PC113 330UF_2V_7mohm
5 H_VID2 33 FDS7088SN3
1
2
3
1
2
3
H_VID3 D2 PR124 PC116 2.1K/F 330UF_2V_7mohm
5 H_VID3 34 D3
C H_VID4 35 *3.48K/F *4700p/25V *330UF_2V_7mohm C
5 H_VID4 D4
H_VID5 36 1 2 PR137 PR136
5 H_VID5
1
H_VID6 D5
5 H_VID6 37 D6
PR121 4.02K/F NTC 10K_6-B4.25K
PR33 0 PR128 100/F
4 PSI# 1 2 3 PSI FB 12 2 1
PR41 100K/F
VCCSENSE 5
1 2 38 3.9K/F 8771CSP1 PC118
36 VRON SHDN
PR39 0 PC18 0.22u/16V_6 0
PR42 0 4,12 ICH_DPRSTP# 1 2 40 4700p/25V 8771CSN12
PR38 0 DPRSTP PR17
19,36,38,39,41,42 HWPG 1 2
2 1 39 *100 PR20
14 PM_DPRSLPVR DPRSLPVR PR15 VIN
1
PC21 470p/50V 10 1 2
CCI VCC_CORE
PC35 1 2 9
100p/50V CCV PC17 20K/F PR14
2
1
PR30 71.5K/F 470p/50V 100/F
1
7 13 PC6 PC22 PC20 PC3 + PC10 PC8
TIME GNDS VSSSENSE 5
5
0.1u/50V_6 2200p/50V 0.1u/50V_6 2200p/50V 10u/25V_12 10u/25V_12
PC120 0.22u/16V_6 16 8771CSP1 PC16 PQ6 PC112 X6S_1206 X6S_1206
2
CSP1
2 1 8771REF 11 REF
100u/25V
15 8771CSN12 1000p/50V_6 PR13 RQA130N03FD5
CSN12 *100
18 GND
PR133 10K/F 41 14 8771CSP2 4
EP MAX8771 CSP2
8771VCC 1 2
6 21 8771DH2
PR134 THRM DH2
3
2
1
*NTC 10K_6-B4.25K 24 8771DL2
B DL2 PL7 0.45_25A_20%_ETQP4LR45XFC B
+5VSUS 22 8771LX2 2 1
LX2 VCC_CORE
5
3
VRHOT BST2_R
BST2 20
5
6
7
8
9
5
6
7
8
9
4 POUT PQ44 PQ43
1
23 FDS7088SN3 FDS7088SN3 PC111
PGND2
2
1
PR32 4 4 *1.5n/50V_6 + + + PC41
56 0.01u/16V
2
2
2
2
1
2
3
1
2
3
PR139 0_6 PR131
1
2 1
1
2 1
CH501
PD5 8771CSP2 PC119
0.22u/16V_6 0
2
8771CSN12
8771VDD PR21
A A
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
CPU CORE(ISL6262)
Date: Thursday, March 09, 2006 Sheet 37 of 47
5 4 3 2 1
5 4 3 2 1
38
D VIN D
VIN
2
PC80 PC87 PC163 PC164
0.1u/50V_6 *10u/25V_12 1u/10V_6 PD24 4.7u/10V_8 VIN
2
CH501
PD23
1
CH501 PC91
1
1
PC81 0.1u/50V_6 PC90 PC92
PC85 PC83 2200p/50V 2200p/50V 10u/25V_12
2
5
6
7
8
10u/25V_12 0.1u/50V_6 BST_3 BST_5
2
PU9 MAX8734AEEI+
Current Limit at
8
7
6
5
PQ33 4
RSS090N03 8734_V+ 20 18 PR180 PC167 5.7A
V+ LDO5 0_6 0.1u/50V_6
Place PC81, PC82 as close as possible to
4 17 14 BST5 5VPCU
PQ27 drain and PQ26 source VCC BST5 PQ34
PC166 PR177 1 16 DH5 RSS090N03
3VPCU 0.1u/50V_6 0_6 N.C. DH5 PL17
3
2
1
BST328 15 LX5
BST3 LX5
5
6
7
8
2.5UH_7.5A/SIL-1045-2R5PF DH3 26 19 DL5 2.5UH_7.5A/SIL-1045-2R5PF
1
2
3
PL16 DH3 DL5
LX3 27 21 PC170 + PC169
LX3 OUT5
1
C 0.1u/50V_6 220U_6.3V_ESR25 C
4
1
2
470U_4V_ESR15 0.1u/50V_6 FB3 ILIM5 ILIM3 RSS090N03
4 7 5
2
3
2
1
REF TON
3 ON3 TON 13 RDS(ON)=24m ohm
1
ON5 4 23
ON5 GND
1
SHDN
PR97 2
SKIP
PGOOD
1
0 25 PC95
LDO3 1u/10V_6 3V_AL PR89
1
2
3
2
0
2
12
6
3V_AL
1
PR91 0_6
2
RDS(ON)=24m ohm PR181
PC165 100K
4.7u/10V_8
1
5V_AL
2
PR178
2K/F PR99 HWPG 19,36,37,39,41,42
1 2 0
2
2
PR179
240K
1
PC171
*1000p/50V
1
B B
PR90 200K/F
VIN
REF=2V
1
PR86
1
100K
PC94
PR87 PR88 PR95 PR94 0.1u/50V_6 2
*0 *0 63.4K/F 63.4K/F
ILIM5
2
ILIM3
PRO#
PR101 0
TON DL3
1
PC93 PC89
PR92 PR93 PR98 PR100 0.01U/50V_6 0.01u/50V_6
0 0 91K/F 63.4K/F
3
2
PD9 PD8
BAT54S BAT54S
A A
+15V_SUS
2
1
5VPCU
PC168 PC88
0.1u/50V_6 0.1u/50V_6
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
5V/3.3V(TPS51120)
Date: Thursday, March 09, 2006 Sheet 38 of 47
5 4 3 2 1
5 4 3 2 1
39 4
D 5VPCU D
1
PR56
0_6
2
VIN PR48 10/F_6
2 1 8632VDD
SUSON
2
2
2
1
PC63 PC65
PD20 4.7u/10V_8 PR162 PR160 1u/10V_6 3VPCU
1
CH501
*0 0
1
2
1
PQ9 PU8
PC38 PC37 PC31 PC29 VIN PR50
22
26
5
2
10u/25V_12 0.1u/50V_6 RQA130N03FD5 100K
10u/25V_12 2200p/50V
VDD
OVP/UVP
AVDD
PC148 17
2
1.8V_BST PR156 VIN
20 BST
Current limit at 11.6A 0_6 POK1 5 HWPG 19,36,37,38,41,42
4 0.1u/50V_6
1.8V_DH 18 6
DH POK2
27 PR158
1 02
SHDN SUSON 36,43
C PL12 C
1
2
3
1.8VSUS 1.8V_LX 19 7 PR173
1 02
LX STBY MAINON 36,41,42,43
PQ46
1uH/ 3.5m ohm 13 1.8VSUS
MAX8632ETI+ VTTI
9
8
7
6
5
9
8
7
6
5
FDS7088SN3 PR47 0.9 Volt +/-5%
1
1
PC54 + PC61 + PC146 PQ45 14 1 2 1.8VSUS
REFIN
41.8_DL 4 1.8_DL 21 DL
PC150 PC64 Design current 1.05A
1
0.1u/50V_6 470u/2.5V/12m *FDS7088SN3 20/F 0.1u/50V_6 Peak current 1.5A
2
2
470u/2.5V/12m PC149 10u/10V_8
PGND2 11
23 0.1u/50V_6
3
2
1
3
2
1
2
PGND1
1
16 OUT
PR46
*100K/F 15 12 SMDDR_VTERM
FB VTT SMDDR_VTERM
PR49 *0 9
VTTS
1
PR54 0 1 2 1
2
2
REF
1
1
SKIP
GND
ILIM
TP0
PC68
SS
1
PR157 1u/10V_6
2
*63.4KF_6 PR159
Freq=300K
28
25
24
8
100K/F
2
2
PC154 1.8V_LIM
0.22u/16V_6
1
PR161 PC153
110K/F 1000p/50V
2
B B
2
PR53 0_6
PR51 *0 GND_DDR
8632VDD 1 2
1
PR52
0
2
3/2 Tony Huang
1.8VSUS +1.8VRUN +1.8V
7,9,16,43,44 1.8VSUS PQ14
FDS6676S +1.8VRUN 19,20,21,42,43,44
8 1
7 2
6 3
5
1
+ + PC70
4
PC71 470u/2.5V/12m
2
10u/25V_12
PC69
43 MAIND
470u/2.5V/12m
A A
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
1.8VSUS/+0.9TERM/+2.5VSUS
Date: Thursday, March 09, 2006 Sheet 39 of 47
5 4 3 2 1
5 4 3 2 1
VA_PR 2 1
PD16
PC131
0.1u/50V_8
SSM24PT
2
PD17
SSM24PT
2
RB500
1
1
VA
1 2
RB500
2 1 VA1
Iinput =(V CLS / V REF)*(0.075/ RS1)
PR1
RL3720WT-R010-GN(CYNTEC)
VA2
37
PD18 PD15 PD14 1 2 VA2
PR109
SSM24PT
PJ1.1 300mil
1P
2P
2 1 VIN PQ41
D PL8 PC123 PL1 D
10K/F_6
1
PC127 FBJ3216HS480NT_1206 PD13 + 10u/25V_12 FBJ3216HS480NT_1206 DTA124EU
6
5
4
3
2
1
1
PC128 PC124 SSM24PT + 1 3
4
3
2
1
0.1u/50V_6 1000p/50V_6 0.1u/50V_8 PC4 PC7
2
PL11 10u/25V_12 0.1u/50V_6
2
FBJ3216HS480NT_1206 PQ1
PJ1 8724_3D3_LDO
VA PC106
1u/25V_8 SI4835BDY-T1-E3
2
PWR_CON
PR11
5
6
7
8
2
VA 100K/F_6 8724_3D3_LDO
PR122 PD12 PR10
*0_6 RB500 100K/F_6 CELL-SET PC105
0 = 4 CELL 2 1 VIN
1
PR27 PR28
3
825/F_6 1.33K/F_6 1 = 3 CELL 0.1u/50V_8
1
PR127 PC109
75K/F_6 PR26 2 CELL_SEL CELL_SEL 36 0.1u/50V_6 PR112
2
200K/F_6
PQ5
2
33_6 2N7002K
27
26
1
PD4
1
1
PC115 PC23 PC11
CSSP
CSSN
PR123 0.01u/50V_6 1 17 1u/10V_6 SW1010C 1u/10V_6
2
DCIN CELLS
2
10K/F_6
1
PR12 PC121
LDO 28724LDO
1u/25V_8 PR118
1
2
3
4
C 0_6 22 8724DLOV 100K/F_6 C
Q1 DLOV PR16
10 ACIN
DTA124EU 24 8724BST
PR119 BST
ACOK 3 1 8724LDO PQ3
15 0_6
36 CV_SET VCTL
1
*0_6 SI4835BDY-T1-E3
8724_3D3_LDO 13 25 8724DH PC14 1 D1 G1 8
36 CC_SET ICTL DHI 0.1u/50V_6
8
7
6
5
12 23 8724LX 2 D1 S1/D2 7 PR110
2
1
ACOK# 11 21 8724DL 3 G2 6 1 2 V_CHG
PC9 PC13 PC15 ACOK DLO
PR5 1000p/50V_6 1000p/50V_6 0.1u/50V_6 9 20 4 S2 5 10uH 30% 4.4A(SIL104R-100PF)L-F
1P
2P
10K/F_6 ICHG PGND
28 IINP
1
8 19 PQ4 SI4914DY-T1-E3 + +
SHDN CSIP PC104 PC107 PC108
CSIN 18
7 0.1u/50V_6 10u/25V_12 10u/25V_12
2
36 ACIN CCV CSIP 8724LXR
6 CCI BATT 16 V_CHG
PR4 CSIN
15K_6 5 CCS REF 4
PR125
ICHG =(V ICTL / V REFIN)*(0.075/ RS2)
20K_6 5VPCU
VA2 PR29 3
1K_6 CLS
12,15,26,38,39,41,43 5VPCU
R1
GND
GND
VAD-5
3
29
14
1
1
PR22 24.9K/F_6
3
B ACOK# 100K/F_6 PC26 PC25 PC24 PC122 B
2 1 2 PU1
1
2
PR9 1u/25V_8 5V_AL 100K/F_6
2N7002K PD3 ACOK 2
2
SW1010C 1M/F_6 PR24 PQ39
1
20K_6 PD10
3VPCU RB500
1
22,24,35,37,38,39,41,42 VIN
1 ACOK-2
3VPCU
PL4 3VPCU
3
HI0805R800R-10 V_CHG
PR6 PR114
10K/F_6 100K/F_6
1
JP4 PL5 PF1 D/C#
2 D/C# 36
HI0805R800R-10 TR2/6125FA10A
1 VBATT PD11 PR115
2 1 2
5
SW1010C 475K/F_6 PQ42
3 PR3 0 2N7002K
1 +
1
10 4 PR2 0 BATTCLK P332
5 4
BATTDAT PR111 P331 3 -
11 6 100K/F_6 PU5
7 TEMP_MBAT 36
LMV331
2
8
1
9 PC1
PR7 PR8 0.1u/10V PR116
2
3
PR113
A 100K/F_6 A
1
PR117
5,36 MBDATA 14K/F_6 PC110 2
MBCLK 5,36 BL/C# 36
0.1u/50V_6
2
1
PQ40
2N7002K
PD1 PD2
1
ZD5.6V ZD5.6V PROJECT : DW1
Quanta Computer Inc.
2
41
D D
5VPCU
VIN VIN
1
PR57
0_6
2
PR55 20/F
MAX1845_VCC 1 2
2
PC75 PC155
2
1
PC76 PC72 PD21 1u/10V_6 4.7u/10V_12 PD7 PC84 PC160 PC161 PC79
1
1
7.8A Current Limit 10u/25V_12
22
21
1
2
PR59 0_6 PU3 +1.05V
2
1
2 1 1.05V_BST_1
VCC
VDD
8
7
6
5
5
6
7
8
C 1.5V_BST_R1 4 C
V+
1
PC74 PR172 0_6 PC78 PQ25
PQ15 4 0.1u/50V_6 1.5V_BST_R19 25 1.05V_BST 2 1 0.1u/50V_6 4
+1.5V BST2 BST1
AO4422 AO4422
2
1.5V_DH 18 26 1.05V_DH PL15
PL14 DH2 DH1 1.5UH_SIL104R-1R5_10A/8.1 mohm 1.05V_VCCP_P
3
2
1
1
2
3
2 1 1.5V_LX 17 27 1.05V_LX 1 2
LX2 LX1
8
7
6
5
5
6
7
8
3.8UH_SIL104R_6A/13mohm 16 28
CS2 CS1
1
PQ23
1
1
0.1u/10V 10K/F PQ16 FDS6676S
1
330U_2.5V_L For RC Filter 1.5V_OUT_R 15 1 PR68 + PC156 PC157
2
3
2
1
1
2
3
2
2
FB2 FB1 470u/2.5V/12m
2
PR58 *1nF_50V_NC
2
0 Setting frequency
1
10 MAX1845_REF
1
REF
*0
100K/F
100K/F
PR69 7
19,36,37,38,39,42 HWPG PGOOD
1
18.7K/F PC86
1
1 2 11 1u/10V_6
1 ON1
1
PD22 1 2 CH501 PR175 PC159
2
PR79
12 PR67
PR174
1 02 100K/F *1nF_50V_NCON2 20K/F
36,39,42,43 MAINON
2
PR81
PR80
PR77 33.2K/F
2
1 2 MAX1845_VCC 6 5
2
SKIP TON
8 OVP ILIM1 3
1
B B
619K/F
MAX1845_VCC 9 13
GND
PR83 UVP ILIM2
61.9K/F
1
1
12.7K/F
MAX8743
23
3 2
PR78
PR76
PR84
2
PQ58 *0
Setting OVP level
2N7002K
2
2
1
A A
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
1.05V&1.5V
Date: Thursday, March 09, 2006 Sheet 41 of 47
5 4 3 2 1
5 4 3 2 1
+3VSUS
42
13,14,25,27,30,33,35,43,44 +3VSUS
RQW200N03: Id= 20A, Rdson= 5.6m ohm, Qg= 40 nC 22,24,35,37,38,39,40,41 VIN VIN
1
PC39
1
PC42 PC47 PD19 PC60 PC142
PC50 CH501 1u/10V_6 1u/10V_6 +3VRUN
2
10u/25V_12 10u/25V_12 0.1u/50V_6 2200p/50V
19
24
22
1.0V/ 9.3A/ OCP= 13A
1
VGA_BST
5
VIN_1993
+VCC_GFX_CORE PR141 PR154
OVP/UVP
VDD
VCC
0_6 14
V+ 100K/F
17 BST
POK 4 HWPG 19,36,37,38,39,41
4 1993_DH 15 PC144
DH
PQ10
RQA130N03FD5 LSAT 3
PR151 0
1 2 3/9 Tony
1
23 0.1u/50V_6
PC136 SHDN MAINON 36,39,41,43
1
2
3
PL9 0.1u/50V_6 1993_LX 16 21 PR147 *0
2
LX GATE V_PWRCNTL 19
7 VGA_REFIN VGA_P_REF
REFIN
5
0.56uH/ 1.6m ohm PU6
1993_DL 18 PR150 75K
DL
1
1
+ + MAX1993ETG PC143
C C
PC132 4 PR45
0.1u/50V_6 PR31 20 470p/50V
2
2
GND
PC43 PC130
1.62K/F
75K
V_PWRCNTL:
8
PQ47 11 CSP
OD
GND 25 High(3.3V) = 1.0V
330U_2V_9m 330U_2V_9m
PC138
RQW180N03
GND 26
27
Low(0V) = 1.1V
3
2
1
GND PR148
1 2 12 CSN GND 28
GND 29 20K/F
10 OUT TON 1PR152 *0
FBLANK
0.22u/25V_6 1993_CSP 6 VGA_P_REF
REF
9
SKIP
ILIM
FB
1
PR155
13
5
137K/F_6
PC62
1u/10V_6
Tony Huang 3/2
2
PR44 NV72M:1.1V NV72MV:1.0V
PR144
G72M:
1
0_6 0
PC147 PR153
PR150 75K 75 K
B 470p/50V 20K/F B
2
PR45 75K 75K
Iout_max = 13.4A
PR148 20K 0 ohm
+1.2V_VPCIE 1.2V/ 2A
PU7
APL5331
PR147 NC NC
1 VIN VOUT 4 +1.2V_GFX_PCIE
+1.8VRUN PR149
VCNTL 1.2VA 6 5
VCNTL NC
1
+5VRUN
PL13 0 PC141 PC140 PC139
HI0805R800R-10 PR142 3 8 1000p/50V_6 10u/10V_8 10u/10V_8
2
VREF NC
AGND
GND
10K/F 9 7
GND1 NC
1
PC137 PC145
2
17
10u/10V_8 1u/10V_6
2
PR143
20K/F
A A
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
VGA CORE
Date: Thursday, March 09, 2006 Sheet 42 of 48
5 4 3 2 1
5 4 3 2 1
+1.2V_GFX_PCIE 5VPCU
+1.8VRUN
+15V_SUS +5VRUN +3VRUN +VCC_GFX_CORE +15V_SUS
MAIND 39
5VPCU 12,15,26,38,39,40,41
43
5
6
7
8
PC177
PR75 PR71 PR70 PR74 PR72 PR73 PR82 0.1u/10V
1M/F_6 22_8 22_8 22_8 22_8 22_8 1M/F_6 4
DISCHARGE MAIND
PQ59
3
D D
AO4422
3
PQ26
+5VRUN 4,15,23,26,29,30,31,34,36,42,44
PQ31 PQ30 PQ29 PQ27 PQ28
3
2
1
2
2
2N7002K
2 2 2 2
2
PC82
3A
+5VRUN
PQ24 2N7002K 2200p/50V_6
PDTC144EU 2N7002K 2N7002K 2N7002K 2N7002K
1
PC172
1
0.1u/10V
1
3VPCU
3VPCU 12,15,22,24,26,34,36,38,39,40,44
+1.05V
5
6
7
8
+15V_SUS +1.5V SMDDR_VTERM VCC_CORE +2_5VRUN PC97
0.1u/10V
4
PR62
PR65 PR63 PR60 PR61 PR64 22_8
1M/F_6 22_8 22_8 22_8 22_8 AO4422
PQ36
3
+3VRUN 3,5,7,9,10,12,13,14,15,16,18,19,22,23,27,28,29,33,34,35,36,42,44
PQ19
3
2
1
2N7002K 4.5A
3
3
2 PR104 +3VRUN
*1M_6
36,39,41,42 MAINON 2
C 2 2 2 2 PC101 C
PQ21 0.1u/10V
1
PQ22 PQ20 PQ17 PQ18 2N7002K
1
1
+2_5VRUN
200mils PU4
APL5331
2.5V/ 1A
1 VIN VOUT 4 +2_5VRUN
+3VRUN PR106
VCNTL 2.5VA
S0-S5 +5VRUN
6 VCNTL NC 5
1
3VPCU +3V_S5 PL3 0
HI0805R800R-10 3 8 PC96 PC99 PC100
0.5A VREF NC
AGND
PR103 1000p/50V_6 10u/10V_8 10u/10V_8
GND
2
+15V_SUS 8 1 6.34K/F 9 7
+3V_S5 4,14,15,44 GND1 NC
1
7 2 PC102
6 3 PC98
2
17
5VPCU 5 10u/10V_8 1u/10V_6
2
PR107 PQ62 PC103
4
10K PQ37
2 RHU002N06 PC179
B B
0.1u/50V_6
3
36 S5_ON 2
PQ38
RHU002N06
1
3VPCU
PC175
1
2
5
6
5VPCU
3
36,39 SUSON 2 2
5
6
7
8
2 2 2 PC181
PQ54 *2200P/50V_6 PC180
PQ53 PQ57 PQ55 PQ56 2N7002K 0.1u/10V
1
AO4422
PQ61
2A
3
2
1
0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
4 4
C470 C574 C597 C128 C71 C730 C464 C735 C499 C617 C520 C521 C391 C404 C495 C496 C356 C167 C629 C144 C136 C102 C106 C112
C354 C466 C751 C752 C467
0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
C413 C509 C5 C490 C581 C744 C78 C63 C588 C465 C72 C55 C660 C714 C748 C519 C95 C743 C706 C515 C487 C54 C785 C786 C787
0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
3 3
+1.5V +1.05V +1.8VRUN +1.8VRUN
B1 B2 B3 B4
C503 C305 C537 C757 C518 C455 C270 C204 C186 C749 C327 C125 C287 C302 C257 C627 C325 C74 C333 C648 C84 C83 C284 C598 C623
0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V 0.1u/10V
1
AGND
FDTW3002018FDTW3002018 FDTW3002018 FDTW3002018
2
Debug Conn. 2
B stage:
TPM (1.2) Change U10 footprint. +3VRUN
Page 3 Change R177 to install and pull low to set VGA clock to 100MHz. 5 1A
Page 19 Change R345 to install to solve back light can't enable. 6 1A
Page 29 Change R245 to NI for SATA,install for PATA. 7 1A
Page 14 Add R482,R483 for CRT/DVI option. 8 1A
Page 24 Change C645 to 10uF for LAN 1.2V per Marvell recommendation. 9 1A
Page 19 R377 to install,R362,R364,R365 to NI. (Set default to G72M) 10 1A
Page 30 3V_DVDD connect to +3VSUS to solve WOR. 11 1A
1223 to 1224 Page 32 Change MQ1,MQ2,MQ3,MQ4 to BA000420Z07 to solve MODEM low performance. 12 1A
Page 37 Delete short pad. 13 1A
Page 38 Delete short pad.PC92 change to install. 14 1A
Page 39 Delete short pad. 15 1A
Page 41 Delete short pad. 16 1A
Page 42 Delete short pad.PR45,PR150 change to 75K(CS37502FB04). 17 1A
Page 43 Delete short pad. 18 1A
C Page 5 R19 change to NI for solving power-on shutdown. 19 1A C
A. G72M to G72MV
1. change P/N to G72MV (AJ073000T14)
2. Set VGA core to 1.0V fix.
3. Change PCI_DEVID.
A B. VRAM 128MB to 64MB A
C
1.Set board ID4 to low. C
D D
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
Option Note
Date: Thursday, March 09, 2006 Sheet 47 of 47
1 2 3 4 5 6 7 8
5 4 3 2 1
20 1A
21 1A
22 1A
23 1A
24 1A
25 1A
26 1A
27 1A
28 1A
29 1A
30 1A
31 1A
32 1A
33 1A
B
34 1A B
35 1A
36 1A
37 1A
38 1A
39 1A
40 1A
41 1A
42 1A
43 1A
44 1A
45 1A
A A
PROJECT : TW3
Quanta Computer Inc.
Size Document Number Rev
B1A
Change List (B2A)
Date: Thursday, March 09, 2006 Sheet 47 of 48