Model SC Paper Musolino Blocks
Model SC Paper Musolino Blocks
Model SC Paper Musolino Blocks
Abstract—In this paper, an accurate and simple dynamic model can be easily integrated in power system simulation software.
of a supercapacitor bank system for power system dynamics stud- Furthermore, many papers use overly simplified supercapacitor
ies is presented. It is shown through comprehensive simulations models which do not adequately capture the supercapacitor
arXiv:1908.00919v2 [eess.SY] 23 Mar 2020
control system was not shown which makes it difficult in [29] while the state-of-the-art supercapacitor models can
to integrate in power system simulation software; be found in [13], [29], [30]. Basically, these models are
• there were no studies which compared different levels of all similar and are based on RC circuit identification using
supercapacitor model accuracy. impedance spectroscopy. All these models can be described
To the best of our knowledge, there were no papers that with the same type of RC circuit consisting of three parallel
developed an accurate, simple and complete model of a sections as shown in Fig. 1. The first branch (blue area) models
supercapacitor/ultracapacitor bank for power system stability fast dynamics, parallel branches (green area) model slower
studies. A complete model should include: accurate dynamics recombination phenomena after a fast charge or discharge
of a supercapacitor cell, supercapacitor DC current calculation, and the last branch (orange area) models the long-term self-
charge/discharge control, active power and voltage/reactive discharge phenomena [30]. We will gradually reduce the
power inverter control as well as frequency control loop. number of elements of this model in order to arrive to a
Therefore, the contributions of this paper are as follows: model which is suitable for power system electromechanical
• detailed analysis and comparison of different supercapac- dynamics time scale.
itor models with varying levels of detail; A few characteristics of a supercapacitor must be noted
• derivation of the adequate level of detail of the super- before we continue:
capacitor model for power system dynamics applications • majority of the ultracapacitor capacitance comes from
(voltage and frequency control, transient stability stud- Csc ;
s s s s
ies); • series combination of parallel branches R1 C1 –Rn Cn
• accurate dynamic model of the supercapacitor bank with is actually an infinite series of these parallel groups.
all the necessary controls. However, 5 elements are enough to obtain an accurate
The presented model is easy to integrate in any power model according to [30];
s s
system simulation software. Rest of the paper is structured as • capacitance Csc as well as infinite sum elements Rk , Ck
follows: methodology is described in section II; supercapacitor are dependent on the ultracapacitor voltage uC (t). This
bank model is derived in section III; complete supercapacitor model is nonlinear with time-varying parameters. That is
bank system is presented in section IV. Performance of the why ideal capacitor representation used in many papers
model and simulation results are given in section V. Section is not always appropriate;
VI concludes the paper. • the number of parallel branches in the green group is
also theoretically infinite, but between two branches and
II. M ETHODOLOGY 4 branches are sufficient to achieve accurate results [30].
We will start by reviewing the relevant literature on su- A few assumptions are made to simplify the model:
percapacitor modelling and showing the detailed state-of-the- • Rs is the series resistance determined at very high
art supercapacitor cell model. The model structure is identi- frequency and is also voltage dependent [30]. However,
fied from experimental measurements, most often impedance since this resistance is small (< 10 mΩ) and the impact
spectroscopy. Starting from the full model, we will start on the model performance is insignificant, we consider
simplifying it by gradually reducing the number of parameters it as a constant parameter which is also usually done in
describing the model with the final goal of arriving to an reviewed literature on accurate supercapacitor modelling;
accurate and as simple as possible model which captures the • temperature dependence of the parameters is neglected.
relevant supercapacitor/ultracapacitor dynamics. The model is Temperature is considered constant. The assumption is
intended to be used in power system short-term dynamics stud- that the cooling of the system is adequate and that the
ies (transient stability, voltage control, inertial response and system operates at room temperature. This effect can be
primary frequency control), i.e. the time scale of observation included in a future version of the model, but we consider
is up to 60 seconds after a disturbance. With every step of the it not important for the initial derivation of the model for
way, we will compare different models with varying levels power system dynamics.
of detail to prove the validity of our simplification. Once Parameters of the first branch are calculated according to
the simplified model is derived, it will be scaled to form a (1)–(3) [30].
supercapacitor bank of a higher rated power (MW order of Csc (uC ) = C0 + kv uC (t) (1)
magnitude). Then, the complete supercapacitor bank system
1
with controls will be developed. The performance of the model Cks = Csc , k ∈ {1...n} (2)
will be shown in a standard IEEE 14-bus test system modelled 2
in DIgSILENT PowerFactory 2019 software package. The 2τ (uC )
Rks = 2 2 (3)
type of simulations conducted are stability simulations (RMS, k π Csc
integration step 0.01 s), i.e. power electronic converters are C0 is the ultracapacitor capacitance at 0 V and kv is a constant
represented by their average models. expressed in F/V. τ (uC ) is another experimentally determined
parameter (it has a dimension of time) that can be expressed
III. S UPERCAPACITOR BANK MODEL DERIVATION
as function changing linearly with the voltage uC : τ (uC ) =
A. Supercapacitor theory τ0 + kτ uC (t) [30]. However, it can also be approximated by
Core of the supercapacitor bank model is the supercapacitor (4) [30]:
cell. Overview of different supercapacitor models can be found τ (uC ) ≈ 3Csc (Rdc − Rs ), (4)
3
p
p
Rm Cm Cell Rs [mΩ] Rdc [mΩ] C0 [F] kv [F/V]
Maxwell BCAP0150 6.3 7.1 108.4 10.8
Epcos 110 F 10.0 11.0* 89.0 29.1
{M2}:m parallel branches
*data not available, arbitrarily chosen
R1p C1p
TABLE II
E PCOS 110 F 3 BRANCH MODEL PARALLEL BRANCHES DATA [29]
C1s (uC ) Cns (uC ) Parameter R1p [Ω] C1p [F] Rleak [kΩ]
Rs Csc (uC ) +
− +
− Value 17.5 13.7 5
uC1s uCns
uRs − −
+ +
uC TABLE III
isc M AXWELL 150 4 BRANCH MODEL PARALLEL BRANCHES DATA [30]
{M1}:First branch with
R1s (uC ) Rns (uC )
n parallel groups
Parameter R1p [Ω] C1p [F] R2p [kΩ] C2p [F] Rleak [kΩ]
+
−
usc (t) Value 80.2 28.0 3.73 27.1 66.6
where Rdc is the resistance experimentally obtained at very Parameter R1p [Ω] C1p [F] R2p [Ω] C2p [F]
low frequencies (essentially DC). Naturally, Rdc > Rs . Value 32.7 15.3 275 18.1
All the parameters of the {M1} branch can be identified Parameter R3p [kΩ] C3p [F] R4p [kΩ] C4p [F]
using manufacturer’s data sheet. Value 3.5 14.4 18.4 27.1
All the parameters of the first branch can be identified using Parameter Rleak [kΩ]
manufacturer’s data sheet. Parameters of the parallel branches Value 111
are more difficult to obtain since they must be obtained ex-
perimentally. Furthermore, these parameters are not universal
and they depend on the time scale of the phenomena to be all the parallel branches as well as the self-discharge branch
observed (described by the RC time constant τRC = RC). do not have an impact on the model accuracy for the time
The time scales are arbitrary, however they usually imply a scale of interest. Therefore, all the branches except the first
range from several minutes to several weeks or even more branch can be neglected.
[29], [30].
In the next step, the adequate number of parallel RC groups
in the first branch is determined. Results are shown in Fig
B. Simplification of the supercapacitor cell model 3. Here, the models are also compared to the ideal capacitor
In this section, we will show that the supercapacitor model representation used in many papers to show the difference.
for power system dynamics studies can be described with Firstly, it can be seen that the parallel groups do not play
only the first branch and with none of the parallel groups a significant impact in the voltage response, although this
Rks Cks . Real experimental data from [29], [30] will be used depends on the model parameters since it can be seen that
in simulations for model simplification. This experimental the effect is more pronounced for the Epcos model (Fig.
data concerns two commercial supercapacitors which will be 3b). Generally, accuracy is not lost if the parallel groups are
simulated with different models with varying levels of detail to neglected, although at least one should be included if greater
show that our simplification is valid. Parameters of the parallel accuracy is to be achieved.
branches (green and orange section in Fig. 1) are determined Fig. 3a and Fig. 3b show that using the ideal capacitor
experimentally through constant current charge test (Table I – representation will yield inaccurate voltage response. The
Table IV). value of the capacitance was chosen as C0 of the respective
Simulations of different model responses are conducted in supercapacitors model which is the worst case scenario. More
MATLAB-Simulink using Simscape Electrical toolbox. The accurate profile could be obtained by choosing a value which is
number of parallel branches is being sequentially reduced and much closer to the capacitance at rated voltage (Fig. 3c). Nev-
the different model responses to the charge/discharge test are ertheless, the ideal representation will not reflect the voltage
compared. Input to the model is the current isc (t) and output transient effect which occurs when the charging or discharging
of the model is the supercapacitor voltage usc (t). Results are current is discontinued. Fig. 3c shows the difference between
shown in Fig. 2. For clarification, 6 branch model represents stored energy for a detailed model and an ideal capacitor. If
the total number of branches (first branche, 4 parallel branches ideal capacitor representation has to be used, than it is better to
and a self-discharge branch). Results for both supercapacitors use a capacitance value which is closer to the supercapacitor
with different levels of detail (Fig. 2b and Fig. 2c) show that capacitance at rated voltage as the error is significantly smaller.
5 RC g
1 RC g
2 4
0 RC g
usc [V]
5 RC groups
20
2
1 RC group ideal capaci
isc [A]
0 RC group
0
usc [V]
ideal capacitor 108 F
−20 31 1 1 RC g
0 10 20 30
Time [s]
40 50 60
0 0 RC g
0 10 20 30 40 50 60
(a) Test current 30 A
Time [s] ideal capac
2
usc [V]
6 branch model (a) Maxwell BCAP0150 voltage
2 4 branch model
0
usc [V]
1 branch model
3 1 RC groups
1 0 RC group
ideal capacitor 89 F
2
usc [V]
1 0 10 20 30 40
0
0 10 20 30 40 50 60
1
Time [s]
(b) Maxwell BCAP0150 voltage 0
0 10 20 30
Time [s]
40 50 60
3 branch model Time [s]
2
0
1 branch model
usc [V]
Time [s]
(c) Epcos 110F voltage
Fig. 2. Comparison of model response for different number of branches 0
Time [s]
0 0.5 1 1.5 2 2.5
usc [V]
C0 + ÷
R uC (t)
R uC1s (t)
2 −
uC (t) kv
÷
3(Rdc −Rs ) 1
π2 12
R uC2s (t) P usc(t) n
− s ussc(t)
÷
1
22
−
R uCns (t)
÷
1
n2
P ∗; P
quadrature axis currents of the inverter. Inverter is controlled i∗d
Q∗ ; Q
i∗q
in the grid voltage reference frame. PLL estimates the grid i0d
Charge control P
Grid frequency δP PQ
f & Inverter
voltage angle as well as the frequency for frequency control control control i0q
LVRT Q
usc max
≥ Uch S the output power will slowly diminish while the conventional
disable charging flag imax ∈ {0,1}
units pick up. Therefore, the difference between the inertia
Q ch
start
control and quasi-droop control is in the washout filter time
≤ Uch R constant (τwd τwi ).
enable charging flag
SR flip-flops
V. S IMULATION AND RESULTS
min
≤ Udch S
The performance of the proposed model is implemented and
disable discharging flag −Q̄ imax
dch ∈ {−1,0} tested on a standard IEEE 14-bus test system shown in Fig.
start
≥ Udch R 10 in DIgSILENT PowerFactory. Three scenarios are tested:
enable discharging flag underfrequency event, overfrequency event and low-voltage
ride through event. Base case is without the supercapacitor
grid
Vac
bank contribution and a response with an ideal capacitor
i0d i∗d representation is also tested. Supercapacitor bank is connected
LVRT logic
i0q and
to bus 06. Parameters of the supercapacitor bank system and
max
ich current limitation i∗q the test grid are given in Appendix A and Appendix B,
imax respectively.
dch
Fig. 6. Charge control, LVRT and current limitation block A. Underfrequency / Overfrequency event
At t = 1 s, 13.5 MW load at bus 13 is connected to
imax max
ch Ich np trigger an underfrequency event. Supercapacitor cell is initially
charged to 1 V. Results are shown in Fig. 11.
1
P ÷ τc +1 im
sc It can be seen that the ideal capacitor representation (with
constant capacitance equal to the supercapacitor capacitance at
imax max
dch Idch np
Control and
ussc measurement lag rated voltage) accurately describes the nonlinear model up to
the first nadir (Fig. 11). However, the ideal representation gives
Fig. 7. DC current calculation block overly optimistic results regarding the stored energy which
can be seen by the prolonged discharge time in Fig. 11b–Fig.
Control and 11d. On the other hand, detailed model is much more accurate
measurement lag and gives an accurate behaviour regarding discharge power
P − + − 1
τc +1 Kpd +
Kid
i0d and available energy (notice the bigger nadir of the secondary
s
P∗ frequency drop around 7 second mark in Fig. 11a).
δP Similar behavior can be observed for an overfrequency event
− i∗d
(when the same load is disconnected from the grid) in Fig.12.
Q − Initial supercapacitor cell voltage is set to 2.3 V. In this case,
q
1 the supercapacitor bank is quickly charging to compensate
Q∗ τc +1 Kpq +
Ki
s
i0q
V − for the temporary surplus of generation. In this scenario,
V∗ the ideal representation describes the nonlinear model much
Low-voltage
flag more accurately. This is because the ideal representation with
maximum capacitance much more accurately describes the
Fig. 8. Supercapacitor bank inverter PQ control nonlinear model near rated voltage as shown in Fig. 3c.
However, if the initial voltage was not near rated voltage or if
the ideal capacitor capacitance was lower, then the difference
based on the supercapacitor characteristics, in this paper we between the two models would be greater.
decided for two control loops which look identical. The bottom
loop is a standard virtual inertial response with a washout
filter to make the output signal more smooth since the time B. Low-voltage ride through
derivative operation inherently amplifies noise. The upper loop Here, the performance of the low-voltage ride through
is more akin to a standard droop control, but it also has a algorithm is tested. Initial supercapacitor cell voltage is 2 V
washout filter which means this contribution will diminish in (i.e. string voltage is 200 V). Supercapacitor bank inverter is
steady-state, hence the name quasi-droop. set to control unity power factor with the grid (Q = 0). At
The reasoning for this choice is the following: the superca- t = 1 s, 13.5 MW load at bus 13 is connected to trigger
pacitor does not have a lot of stored energy—if the standard an underfrequency event and the supercapacitor bank starts
droop control is employed then the supercapacitor output discharging. At t = 2.6 s, a three-phase short circuit is applied
power is initially proportional to the frequency deviation. to bus 6 which is cleared after 400 ms at t = 3 s. Results are
However, once the supercapacitor is discharged, the output shown in Fig. 13.
power will fall to zero which will cause a bigger secondary It can be seen in Fig. 13d and Fig. 13e that the current, thus
frequency drop. By setting a large washout filter time constant, output active power are reduced when the voltage dips at t =
7
Frequency [Hz]
Ideal capacitor C = 3000 F
59.95 Nonlinear model
sτwd
∆f Kd + δP
sτwd + 1
59.9
ussc [V]
Nonlinear model
80
60
Bus 13
Bus 12 Bus 14 0 2 4 6 8 10 12 14
L6-13
Bus 11
Time [s]
Bus 10
G01
~
SG
Bus 09
(b) Supercapacitor bank string voltage
Bus 01 Bus 06 T7-8
T7-9
G08
G06
SG
~
Bus 08
T4-9
T5-6
0
SG
~
Supercapacitor Bus 07
T4-7
Bus 05
−1,000
sc [A]
Bus 04
−2,000
im
No supercapacitor
Ideal capacitor C = 3000 F
Bus 02 −3,000
L3-4
Nonlinear model
SG
~
G02 0 2 4 6 8 10 12 14
Bus 03
Time [s]
SG
~
No supercapacitor
Ideal capacitor C = 3000 F
Fig. 10. IEEE 14-bus test system 2
P [MW]
Nonlinear model
2.6 s (Fig. 13a), i.e. voltage control takes priority over active 0
power control, supplying the grid with reactive power from 0 2 4 6 8 10 12 14
t = 2.6 s to t = 3 s (Fig. 13f). Once the fault is cleared, the Time [s]
reactive power quickly returns to the initial set-point (Q = 0). (d) Supercapacitor bank total power
Now, the whole system is speeding up and the supercapacitor
Fig. 11. Grid frequency and supercapacitor voltage, current and power profile
bank system acts as a brake reducing the change in frequency for an underfrequency event
as shown in Fig. 13b. Therefore, this simulation has shown that
the low-voltage ride through algorithm performs adequately.
performance of the presented model has been tested in an
VI. C ONCLUSION IEEE 14-bus test system to show that the model behaves
correctly. The proposed model is easy to implement in any
In this paper, an accurate and complete supercapacitor bank
power system simulation software (e.g. PSS/E, PowerFactory,
model has been presented for use in power system dynamics
etc.) since it consists of basic elements only (e.g. integrators,
simulations. Starting from the most detailed RC model of a
gains, etc.). The model structure can be easily reduced to an
supercapacitor cell, the model has been gradually reduced until
ideal capacitor representation by neglecting certain parameters
arriving to the most simple representation which adequately
(i.e. setting them to 0). The main drawback of the proposed
describes the supercapacitor dynamics, confirmed by simula-
model is that it wasn’t validated against a real supercapacitor
tion experiments. The proposed model is described with only
bank, which will be done in future research.
4 parameters which are easy to obtain from manufacturer’s
data sheet: capacitance at zero voltage, voltage-dependent
capacitance part, DC resistance and high-frequency resistance.
Furthermore, the presented model was compared to an ideal
capacitor representation to show that such representation is not
always accurate. Then, a supercapacitor bank was built using
supercapacitor cells to form strings and modules based on the
assumption of identical cells.
A complete control system is presented including DC cur-
rent calculation, charge and discharge control, PQ control,
grid frequency control and low-voltage ride through. The
8
60.3
Frequency [Hz]
260
60.2
ussc [V]
60.1 No supercapacitor No supercapacitor
Ideal capacitor C = 3000 F 240 Ideal capacitor C = 3000 F
Nonlinear model Nonlinear model
60
0 2 4 6 8 10 12 14 0 2 4 6 8 10 12 14
Time [s] Time [s]
0
No supercapacitor
1,500
Ideal C = 3000 F
P [MW]
Nonlinear model
sc [A]
1,000 −2
im
No supercapacitor
500 Ideal C = 3000 F
−4 Nonlinear model
0
0 2 4 6 8 10 12 14 0 2 4 6 8 10 12 14
Time [s] Time [s]
(c) Supercapacitor bank module current (d) Supercapacitor bank total power
Fig. 12. Grid frequency and supercapacitor voltage, current and power profile for an overfrequency event
60.5 210
Without SC bank
1
Frequency [Hz]
Voltage [p.u.]
Witch SC bank
200
60
ussc [V]
0.5 190
59.5
Without SC bank Without SC bank
With SC bank 180 With SC bank
59
0 2 4 6 8 10 12 14 0 2 4 6 8 10 12 14 0 1 2 3 4 5 6
Time [s] Time [s] Time [s]
(a) Bus 6 line-to-line voltage (b) Grid frequency (c) Supercapacitor bank string voltage
10 10
5,000 Without SC bank
With SC bank
Q [MVAr]
5
P [MW]
sc [A]
0
0
0
im
0 1 2 3 4 5 6 0 1 2 3 4 5 6 0 1 2 3 4 5 6
Time [s] Time [s] Time [s]
(d) Supercapacitor bank module current (e) Supercapacitor bank total active power (f) Supercapacitor bank total reactive power
Fig. 13. Supercapacitor bank low-voltage ride through performance
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