IEEE Power and Energy Technology Systems Journal

Received 5 November 2018; revised 13 February 2019 and 4 June 2019; accepted 10 June 2019. Date of publication 2 August 2019; date of
current version 18 September 2019.
Digital Object Identifier 10.1109/JPETS.2019.2929952

An Efficient Grid-Connected Three-Phase

Single-Stage Boost Current
Source Inverter
AKANKSHA SINGH 1 , (Senior Member, IEEE), AND
BEHROOZ MIRAFZAL 2 , (Senior Member, IEEE)
1 National Renewable Energy Laboratory, Power Systems Engineering Center, Golden, CO 80401 USA
2 Electrical and Computer Engineering Department, Kansas State University, Manhattan, KS 66506-0100, USA

CORRESPONDING AUTHOR: A. SINGH ([email protected])

ABSTRACT The proposed three-phase boost Current Source Inverter (CSI) is equipped with
Reverse-Blocking IGBTs (RB-IGBT) and the Phasor Pulse Width Modulation (PPWM) switching pattern to
provide system efficiency greater than 92% and high boost ratios (VLL /Vdc ) up to 3.5 in a single stage. The
boost CSI results in elimination of dc-dc boost converter or a step-up transformer needed in dc-ac converters
operating with a dc input voltage lower than the output line-to-line voltage. In this paper, the relationship
between the fundamental component of the inverter output current and the PPWM modulation index is derived
and then confirmed by simulation and experimentally obtained data in both stand-alone and grid-tied modes
of operation. In this work, a 2 kW , 208 VLLrms , 60 − 120 Vdc RB-IGBT-based boost CSI is prototyped to
explore capabilities of the grid-tied boost CSI in terms of efficiency and THD for various input dc voltage
and output power levels.

INDEX TERMS Current source inverter, efficiency, grid-connected operation, reverse-blocking IGBT,
single-stage boost inverter, steady-state characterization.

I. INTRODUCTION topologies employ the conventional voltage source inverter.

The continuous growth in energy demand around the globe A VSI is a buck (step-down) converter, i.e. Vdc > V(LL,rms) ,
and limited availability of fossil fuels along with the increased whereas a current source inverter (CSI) can operate as a boost
awareness in the society about the impact of these fos- converter. For example, a 60Vdc can be converted and boosted
sil fuels on the environment has resulted in exploring of to 208V(LL,rms) in a single stage using the boost CSI (shown
renewable energy sources (e.g. photovoltaic (PV) cells, fuel in Fig. 1), whereas a conventional VSI requires a dc-bus
cells, wind turbines, etc.). These renewable energy sources voltage of 350V in order to create a three-phase 208V(LL,rms) .
are integrated into the existing power grid through grid-tied Furthermore, although the boost inverter borrows the CSI
inverters. Typically, voltage source inverters (VSIs) are used topology, a special switching pattern must be employed to
in these applications. Since VSI is a buck converter, small dc create a single-stage boost inverter. Notice that a conventional
sources such as PV panels need to be connected in series. CSI is either operated based on selected harmonic elimina-
A drawback of using a series connection of dc sources is tion (SHE) modulation or space vector pulse width modula-
that a dc source with the lowest current limits the current in tion (SVPWM) switching pattern. The SVPWM switching
the entire series connection [1], [2]. The main environmental pattern for CSI is formulated based on line-current space-
reason for such uneven currents is partial shading of the PV vectors [8]–[11]. In an SHE based CSI, the shoot-through
panels [3]. In contrast to VSIs, single-stage boost inverter can state is prevented, and thus, it does not have the capability
operate with a low input voltage, and therefore, can employ to boost the input voltage [12]. However, the SVPWM based
a parallel connection of small dc sources (e.g. PV panels or CSI has a charging state, making it capable of boosting the
fuel cells [4]–[7]). input voltage. The boost ratio (VLLrms /Vdc ) obtained from an
Several power electronics circuit topologies for converting SVPWM based CSI is low (being slightly more than 1.1)
low dc voltage source outlets to a higher ac voltage have been compared to the boost ratio as high as 3.5, using a PPWM
proposed in the literature, where the majority of these circuit based boost CSI.

This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see http://creativecommons.org/licenses/by/4.0/
142 VOLUME 6, NO. 3, SEPTEMBER 2019
Singh and Mirafzal: Efficient Grid-Connected Three-Phase Single-Stage Boost CSI

however, a solid-state switch has a finite switching time.

In VSIs, the finite turn-off time may cause a short-circuit
of the dc-bus. Therefore, dead-times must be implemented
to avoid commutation overlaps between switches. On the
contrary, the presence of a dead-time in a boost CSI during
a commutation can result in a huge voltage spike across the
switches causing overvoltage failure. Kavimandan and Das
(2013) suggested the use of a circuit containing a switch and
antiparallel diode across the dc-link inductor to resolve this
problem [16]. However, this circuit adds additional switch
to the inverter which will contribute to the system losses.
Singh et al. (2015) proposed an overlap-time in order always
to guarantee a path for the dc-link current [17]. In their work,
the dynamic state-space models of the boost CSI are pre-
sented in dq-domain, whereas the steady state efficiency and
grid-connected operation have not been investigated.
Despite many investigations on the efficiency of boost
rectifiers and single-phase boost inverters, only few reports
can be found concerning the efficiency of three-phase boost
inverters verified by experimental data. Zhou and Huang
(2012) presented a three-phase boost inverter topology made
of a coupling inductor, two diodes, two capacitors, and an
inductor in the dc-side of a VSI [18]. In their work, a maxi-
mum efficiency of 83.4% was reported for a boost ratio of 2
(at the line-line output voltage of 220Vrms ) and a switch-
FIGURE 1. Picture of the prototype 2kW 208V (240V) three-phase
ing frequency of 8kHz. Anand et al. (2014) presented a
single-stage boost CSI.
transformer-less grid-connected CSI with dc-bus capacitors,
dc-link inductors, and an extra leg compared to the CSI
Recently, several investigations have been reported on topology [19]. However, this inverter provided a boost ratio
three-phase boost inverter and its application for renewable of about 1.33 (at the line-line output voltage of 400Vrms )
energy conversion systems. Kazerani et al. (1995) introduced with a switching frequency of 7.5kHz, and high efficiency of
the need for the shoot-through state to convert a dc volt- the inverter was only possible without the boost capability.
age to higher ac voltage amplitude in a single-stage boost Brito et al. (2015) presented a tri-state buck-boost integrated
inverter [13]. However, their switching pattern required a boost inverter, which is a two-stage inverter, made of a
relatively large dc-link inductor, i.e. 100mH, at Pulse Width cascaded dc-dc converter with a SVPWM based CSI [20].
Modulation (PWM) frequency of 1.2 kHz to obtain the boost In their work, an overall efficiency of 90% was reported for a
ratio of 3.3, V(LL,rms) /Vdc . Sahan et al. (2008), used conven- boost ratio of 1.27 (PV module output of ∼ 100V is boosted
tional SVPWM built on inverter output currents to identify the to a line-line output voltage of 127Vrms ). The boost inverters
switching pattern for a single-stage boost inverter [14]. How- reported so far either have a low boost ratio or have a low
ever, their switching pattern required a dc-link current regula- efficiency. This paper presents a PPWM based boost CSI with
tor loop and a high PWM frequency, i.e. 25kHz, to achieve a high boost ratio (V(LL,rms) /Vdc ) ranging to about 3.5 and also
total harmonic distortion (THD) of 4.5% for output currents. has a high system efficiency using Reverse Blocking IGBTs
Mirafzal et al. (2011) presented a modified space vector (RB-IGBTs), see Fig. 1.
PWM switching pattern for the boost inverter with a high In the next section, the inverter is characterized by deriving
boost ratio [15]. However, in their work, the THD of the the relationship between the fundamental component of the
output voltage and current waveforms exceeded 5% for R-L inverter output current, the modulation index, and the dc-link
load. Additionally, there was no investigation on the system current. The fundamental component of the inverter output
efficiency, the grid-tied inverter was not tested, and system current formula is then used to form the relationship between
characterization equations were not developed. Furthermore, active power injected to the grid and modulation index. Simu-
the inverter presented used a series combination of IGBT and lation and experimental results confirming high performance
diode as switching devices which will decrease the overall of the boost CSI, and validating the equations derived in
system efficiency. Section II are presented in Sections III and IV, respectively.
In a three-phase single-stage boost CSI, a path must In Section IV, the performance of a 2kW , 208VLLrms , 60 −
always exist in which dc-link current can circulate. Also, 120Vdc PPWM/RB-IGBT based boost CSI is examined in
the switching pattern is based on the assumption that terms of the overall system efficiency, converter efficiency,
solid-state switches can turn on and off instantly. In reality, and THD of output current with respect to power transferred

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FIGURE 2. Line-to-line voltage phasors and the associated

sectors.

to the grid and input dc-voltage. Lastly, a conclusion section

completes the paper.

II. CHARACTERIZATION OF BOOST CSI

This section is divided into two subsections. In the first sub-
section, the Phasor Pulse-Width Modulation (PPWM) switch-
ing pattern for the boost CSI is reviewed as a background for
deriving equations given later in this section. In the second
subsection, an expression for the fundamental component of
injected current and an expression for the transferred power
to the grid are formulated as a function of the PPWM modu-
lation index.

A. BOOST CSI SWITCHING PATTERN

In spite of similarities between PPWM for the boost CSI
and SVPWM for VSI, there are fundamental differences.
FIGURE 3. Equivalent circuit of the boost inverter during (a) state
These differences can be herein summarized as (i) PPWM is
C: charging time interval, (b) state D1: first discharging time
formulated based on phasor quantities (line-to-line voltages), interval, and (c) state D2: second discharging time interval of
not space-vectors, (ii) in SVPWM, six main switching states, Sector I.
and two zeroes exist with three switches conducting at any
given instant, however, in PPWM, six discharging and three the equivalent circuit of the converter and path of the dc-link
charging states are present, with only two switches conduct- current for this state in which voltage across Ldc equals Vdc .
ing at any given instant, (iii) in SVPWM, six vectors based on State - D1: During the first discharging time-interval, td1 ,
six switching states are stationary, and the desired space vec- the inductor current is directed into phase A and returned
tor is formed by switching between these states and zeroes, from phase B in Sector I (refer to Fig. 2 and Table 1), when
while in PPWM, a stationary Vdc is known and line-to-line Sap and Sbn are closed. Fig. 3(b) depicts the equivalent circuit
voltage phasors are formed by switching the dc-link current, of the boost CSI during td1 when the voltage across Ldc equals
as shown in Fig. 2. For further clarification, the charging and to Vdc − V1 = Vdc − vab .
discharging states are described as follows: State - D2: During the second discharging time-interval,
State - C: In this state, the dc circuit is shorted through td2 , the inductor current is directed into phase A and returned
two switches from a same leg. For example, in Sector I from C, when Sap , and Scn are closed (see Fig. 2 and Table 1).
(refer to Fig. 2 and Table 1) Sap and San , are closed and the Fig. 3(c) depicts the equivalent circuit of the boost CSI during
dc-link inductor is being charged over tc . Fig. 3(a) shows td2 when voltage across Ldc equals to Vdc − V2 = Vdc − vac .

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TABLE 1. Sectors and switching states in PPWM.

From the voltage-second balance law for the dc-link induc-

tor voltage at steady-state conditions, one can write Vdc Ts =
V1 td1 + V2 td2 , where, V1 and V2 are different line-to-line
voltages in each sector, as shown in Table 1. Dividing this
equation by Ts , yields:
FIGURE 4. Switching pattern obtained from using PPWM.
Vdc = V1 d1 + V2 d2 (1)
where, dc = tc /Ts , d1 = td1 /Ts and d2 = td2 /Ts , are the
charging and discharging duty ratios, which are related as
follows:
dc = 1 − (d1 + d2 ) (2)
The discharging ratios, d1 and d2 , are obtained from the Law
of Sines as d1 = m sin(π/3−θ ) and d2 = m sin(θ ). Using (2),
dc is calculated as
FIGURE 5. Output current waveform before ac-capacitor filter of
π phase a over a positive half cycle, in this figure Np = 9.
dc = 1 − m sin(θ + ) (3)
3
where, m is known as the modulation index. In order to
where M is the number of step (discretised) changes, in n1
improve the quality of generated ac voltages, a discretised
and n2 , over one sector. As mentioned earlier, a path must
version of phasor pulse width modulation (PPWM) is used
always exist for the dc-link current in a single-stage boost
based on constant charging time over each sector and stair-
CSI [16], [17]. This problem is resolved by employing an
case patterns for discharging time intervals. In the discretised
overlap-time, t∇ , i.e. a small duration when the three switches
PPWM, (i) averaged charging duty ratio, D, remains constant
associated with a commutation process are conducting before
over each sector (one-sixth of the power cycle) and (ii) dis-
turning off a switch.
charging times are discretised. In the discretised method,
the numbers of points associated with the discharging time
intervals are approximated by increasing and decreasing stair- B. BOOST CSI FUNDAMENTAL COMPONENT
case functions. In this technique, nc is obtained as nc = OF OUTPUT CURRENT, Irms (f )
inv 1
bD.NT c where, bc is the floor function, and NT is mainly In this subsection, the fundamental component of the inverter
limited by the bandwidth of D/A converters when imple- output current is calculated. For simplicity, the inverter output
menting PPWM on hardware. Herein, n1 , n2 , and nc are the current is assumed to have rectangular-shape pulses, which
number of sampling points in the discharging and charging implies that the dc-link current is ripple free, and thus,
time intervals. The relationship between m, and D can be the inverter current over a positive half-cycle can be depicted
obtained by taking the average value of dc over one sector as shown in Fig. 5, and expressed as follows:
as follows: (
Idc , tn−1 ≤ t ≤ tn−1 + td (n)n = 1, 2, . . . , Np
3 π/3 π iinv = (5)
Z
3
D= {1 − m sin(θ + )}dθ = 1 − m (4) 0 Otherwise
π 0 3 π
where tn = nTs for n = 1, 2, 3, . . . , Np , and Np is the number
The switching patterns of all switches over 18msec, i.e. of pulses in any half-cycle, see Fig. 5. Also, td (n) = d(n)Ts is
slightly more than one power cycle, are shown in Fig. 4. The the duration of discharging time, where d(n) is the discharg-
selection of NT is also very important in maintaining symmet- ing duty ratio in the nth pulse of the PWM pattern. Assuming
rical switching pattern and ensuring quarter-wave symmetry that the PWM switching frequency is much higher than the
in the output voltage and current waveforms. Therefore, NT line-frequency, from Fig. 5 and Fourier series expression,
must be chosen such that NT /6M becomes an integer number, the rms value of iinv fundamental component can be obtained

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as follows: TABLE 2. Circuit parameter values.

1 4
Z T1 /2
rms
Iinv =√ iinv (t)sin(ω1 t)dt (6)
2 T1 0
where, ω1 is the angular frequency of the grid voltage and
can be related to Np as ω1 Ts Np = π . Note that ω1 t = θ , and
θ here is same as that in (3). Now, the integral in (6) can be
rewritten in a discrete format as follows:
Np
rms 1 4 X π
Iinv =√ Idc d(n)sin( n) (7)
2 T1 n=0 Np

where, Np = T1 /(2Ts ). Herein, the summation over d(n) has

to be calculated over half power cycle, and can be calculated
for a phase (e.g. phase-A) and then generalized. For the
positive half-cycle of phase-A, sectors VI, I, and II should
be analyzed (see Table1). d(n) is computed for each sector
(sectors VI, I, and II for phase A) and shifted to the positive
cycle resulting in
π
0 ≤ n < Np /3

 msin( n); FIGURE 6. Phase current waveform for NT = 60 and its FFT
 N p
π spectrum with THD = 3.23% for Vdc = 65V , and Rload = 70.


d(n) = 2msin( + Nπ n); Np /3 ≤ n < 2Np /3 (8)
3 p
msin( π − π n); 2N /3 ≤ n < N



Np p p
3 neglecting the losses, the transferred active power to the grid
where, n = 1, 2, . . . , Np . Substituting (8) into (7) and then can be written as
2 − π
changing the variable to shift all the summations to the inter- Vdc √ (1 − D)VLL Vdc
6
val of 0 ≤ n < Np /3 yields Pg = (13)
Rdc + 2RON
Np
√ 3 −1
√ From (13), it can be observed that the active power transferred
rms 2I dc m X 3 2Idc m 3 Np to the grid linearly varies with the averaged charging duty
Iinv (f1 ) = = ( ) (9)
Np 2 Np 2 3 ratio, D, as will be demonstrated using experimental results
n=0
later in Section IV. From (11) or (13), one can also find
which can be further simplified as
the minimum value of D for √ given input and output voltage
rms Idc π Idc levels as; Dmin = 1 − ( 6/π)(Vdc /VLL ), which can be
Iinv (f1 ) = √ m = √ (1 − D) (10)
2 3 2 validated from the experimental results given in Section IV.
As can be observed from (10), the fundamental component To achieve a low total harmonic distortion (THD) of the
of the inverter output current can be regulated by controlling inverter output voltage and current, the inverter must oper-
the modulation index, m (or D). The equation Iinv rms (f ) can ate in continuous conduction mode (CCM). The minimum
1
serve as the knowledge base for steady-state analysis of the inductance, Ldc , required to keep the inverter in CCM can be
rms (f ) is presented in
boost CSI. The detailed derivation of Iinv obtained from [21]:
1 √
Appendix V. The validity of (10) is confirmed using simu- 11 Rdc + 2RON 3
lated and experimentally obtained data given in Sections III Ldc > Vdc √ (1 − m) (14)
2 fs Vdc − 3/2mVLL 2
and IV. Also, the dc-link current varies with D, the input dc
voltage, Vdc , and the grid voltage, VLL . From the following
III. SIMULATION RESULTS
dynamic equation [17]:
√ In this section, the validity of the proposed switching pat-
didc 3 tern and the developed formulas is verified using simulated
vdc = (Rdc + 2RON )idc + Ldc + mvq (11) results. The validity of the proposed switching pattern is
dt 2
Neglecting the dc-link current ripple and substituting Vq = evaluated through a set of simulations performed on the boost
√ CSI in stand-alone (feeding local loads) and grid-tied modes
2VLL leads to the steady-state equation of Idc as follows:
q of operation. The case study circuit parameters are given
Vdc − 32 mVLL Vdc − √π (1 − D)VLL in Table 2.
6 As discussed in Section II, a proper choice of NT can result
Idc = = (12)
Rdc + 2RON Rdc + 2RON in quarter-wave symmetry in inverter’s current waveforms.
where, Rdc is the dc-side resistance, RON is the on-state Fig. 6 demonstrates the line current and its frequency spec-
resistance of the IGBTs. By substituting (12) into (10) and trum for NT = 60. This value of NT provides an equal and

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TABLE 3. Measured and calculated parameters of the grid-tied

boost inverter (simulated results) for Pg = 600W .

TABLE 4. Measured and calculated parameters of the

stand-alone boost inverter (simulated results) for
VL = 208 VLLrms .

integer number of sample points per sector, which results in FIGURE 7. Block diagram of the system controller used for active
quarter-wave symmetry in the inverter’s current waveforms. and reactive power control injected into the grid.
In this study, M = 10 and fs = NT f1 = 3.6kHz. It can
TABLE 5. Measured and calculated parameters of the grid-tied
be observed from Fig. 6 that there is no even harmonic
boost inverter (experimental results) for Pg = 600 W .
component present in the current waveform.
The measured and calculated inverter fundamental current
rms (f ), using simulation as well as the expression in (10) are
Iinv 1
given in Tables 3 and 4 for grid-tied and stand-alone modes,
respectively. In the stand-alone case, the inverter output volt-
age is regulated at 208V for several input dc-voltage values.
As can be seen, the calculated results are in good agreement
with the simulated results with less than 3% deviation. In the
case of grid-tied conditions, the inverter injected 600W active
power to the grid again for different input dc-voltages. The pattern described earlier in Section II was implemented.
results are given in Table 4. As one can see, the difference In these tests, the fundamental and switching frequencies
between the measured and calculated values stays below were set to f1 = 60Hz and fs = 3.6kHz, respectively, with
3.5%. M = 10 and NT = 60 in the discretized PPWM. The
switching signals are generated by the FPGA using D and
IV. EXPERIMENTAL RESULTS θ inputs, which are generated by the dSpace interface. In this
In this section, the validity of the developed character- work, a simple direct PQ control scheme was implemented
ization equations is evaluated using a laboratory scale for the purpose of steady-state analysis of grid-tied boost CSI.
2kW , 208V (240V ), 60Hz three-phase single-stage boost CSI The control scheme is shown in Fig. 7. Basically, to build
shown in Fig. 1. Also, the efficiency of the overall system is the closed-loop control scheme, the grid-side line-to-line
calculated at different stages through a set of experiments for voltages and line currents are measured as feedback signals.
different input voltages and power levels. First, the desired reactive and active power injected into the
The boost CSI was designed and built using six indi- grid are compared to the actual active and reactive power
vidual reverse-blocking IGBTs (RB-IGBTs) [17], [22]–[24]. calculated from the measured line-to-line voltages and line
The inverter prototype, shown in Fig. 1, contains two printed currents. Then the charging duty ratio, D and the inverter
circuit boards called (i) control board and (ii) power board. switching pattern reference angle, θ are computed through
The inverter is a self-powered device with control board pow- PI controllers using the dSpace. The computed values of
ered directly by the dc input voltage. The IGBTs used in the D and θ are then provided as input signals to the FPGA
boost CSI are RB-IGBTs from Fuji, i.e. FGW85N60RB. The in order to generate the PPWM switching pattern described
inverter switching is generated by Altera’s DE0 FPGA, which in Section II. The measured and calculated quantities for
receives a control signal from dSpace 1103. The prototype grid-tied and stand-alone modes of operation are summarized
boost CSI was tested for various input dc-voltage, Vdc , values in Tables 5 and 6, respectively. The measured dc-link current
and load impedances. In these tests, the discretized switching was used to estimate Iinvrms (f ) from (10). In order to verify
1

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TABLE 6. Measured and calculated parameters of the During the grid-tied mode, efficiency of the entire system,
stand-alone boost inverter (experimental results) for inverter with filter, and just inverter were also calculated.
VL = 208 VLLrms .
It can be observed from Fig. 9 that the overall system has an
efficiency from 91 − 92%, for the entire operational range of
the input dc voltage. The efficiency of the system, excluding
the dc-link inductor loss, is about 94%. Also, the dc-link
inductor contributes to about 2.75% to 3% of the system
efficiency reduction, while the filter capacitor and inductor
contribute to 1% to 1.5% of the overall system efficiency
reduction. The dc-link inductor therefore contributes to about
34% loss incurred in the system and the loss contribution from
the ac filter is about 17%. The inverter switching and con-
duction losses contribute to about 49% of the system losses,
and the developed RB-IGBT based inverter is about 95%
efficient, as shown in Fig. 9(a). Also, Fig. 9(b) shows effi-
ciency of the overall system, inverter and ac filter, and inverter
only versus the power injected to the grid for a constant
input voltage, herein Vdc = 80V . It can be observed from
Fig. 9 that the system efficiency is higher than 91% for the
entire operating range. The efficiency of just inverter is higher
by about 12%, 3%, and 0.5% than the efficiency reported
for single-stage and two-stage boost inverters in [18], [19]
and [25], respectively. The efficiency of the prototype boost
inverter is comparable to the three-phase two-stage boost
FIGURE 8. Experimentally obtained waveform of inverter phase a inverters [25], [26].
current when the inverter is operating with Vdc = 80V and
In Fig. 10, the relationship between the power flow and the
injecting 800W active power into the grid, and the current FFT.
averaged charging duty ratio, D, is examined using exper-
imentally obtained data. Fig. 10 also shows the variation
the stand-alone case, the inverter was made to convert input of system efficiency and the THD of current injected to
dc-voltage to output 208V rms line-to-line voltage feeding a the grid with respect to power injected to the grid through
load. In the grid-tied test, the inverter injected active power experimental data. The variations of the power injected to
to the grid for different input dc-voltages, where the desired the grid, Pg , versus the charging ratio are demonstrated
reactive power was set to zero. in Fig. 10(a). Herein, two main observations can be indicated;
Fig. 8 shows the experimentally obtained waveform of (i) an increase in the charging ratio will result in an increase
the current injected into the grid and its FFT. The inverter in the power flow from the dc-source to the grid. In other
was operated using Vdc = 80V and was injecting 800W words, the larger charging ratio means the more injected
active power into the grid. The results presented in Fig. 8 power to the grid, and (ii) the D-P relationship is almost linear
show the quality of the inverter current is maintained using as indicated earlier by (13). Also, the tested boost CSI demon-
PPWM technique in grid-connected mode of operation. The strates a superior performance regarding its controllability for
measurements were performed for many operating points the boost ratios below 208VLLrms /60Vdc = 3.47. Fig. 10(b)
and the results are given in Tables 5, and 6, as well as shows the relationship between input power at the dc-source
Figs. 9, 10, and 11. It can be observed from the results given and the power injected to the grid for different values of
in Tables 5 and 6 that the measured quantities closely match input dc-voltage. It can be observed from Fig. 10(b) that
the calculated quantities with errors being less than 4%. Pdc and Pg have a linear relationship regardless of the input

FIGURE 9. Experimentally obtained efficiency of the prototype boost inverter versus (a) input dc-voltage for the grid voltage of
208VLLrms , and Pg = 600W , and (b) power injected to the grid for the input dc-voltage of Vdc = 80V .

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FIGURE 10. Experimental results for the variations of the boost inverter (a) charging duty ratio, D, vs. input power, Pdc ,
(b) charging duty ratio vs. output power, Pg , (c) system efficiency, η, vs. output power injected to grid, and (d) THD of injected
current to the grid vs. power for different input dc voltages.

operating points in the grid-tied mode of operation. It can

be further observed that THDs for Vdc = 120V and 60V
are higher than for Vdc = 80or100V . This indicates that the
optimal operating input voltage (in terms of THD level) is
between 80V and 100V for the tested inverter. Fig. 10(d) also
shows that the current THD reaches almost 5% for higher
boost ratios and the inverter operates best for boost ratios
less than 3.5. The inverter output current waveforms and
the line-to-line voltage waveforms at the point of common-
coupling, when the inverter is injecting 650W of active
power into the grid, are presented in Fig. 11. The input dc
voltage for the inverter during this test is 80V . The line
current THD for is measured to be about 4.71%. The THD
for the wider operating region of the inverter is presented
in Fig. 10(d). It can be observed from Figs. 11 and 10(d)
that the inverter current THD for the operating range remains
FIGURE 11. Measured line-to-line voltage and line current
waveforms of the prototype boost inverter when Pg = 650 W
below 5%.
with Vdc = 80V .

V. CONCLUSION
dc-voltage level. Fig. 10(c) shows the variation of the overall This paper provides the knowledge base for the steady-state
system efficiency versus Pg . It should be noted that this is analysis of the boost CSI. The switching technique generates
the combined efficiency of the inverter, the dc-link inductor, desired inverter output waveforms with THDs below 5% from
and the ac filter. As can be seen, the system efficiency for low-voltage dc-sources, with higher efficiencies in compari-
the PPWM/RB-IGBT based single-stage boost CSI is higher son with two-stage dc-ac boost converters. Furthermore, char-
than overall efficiency reported for the single-stage three- acterization equations have been derived and verified using
phase boost CSI in [18], and for the current source inverter simulation and experimental results. In this paper, a relation-
in [19], with similar ratings. It can be further deducted from ship between inverter averaged charging ratio, D and active
Fig. 10(c) that the tested system is optimal for operating power transferred to the grid is established. The simulation
around Pg = 1kW . Since there exists a maximum in the and experimentally obtained data has been presented in order
efficiency curves, it can be optimized by changing parame- to validate the derived equation for both stand-alone and
ters in Table 2 for higher output power. Finally, Fig. 10(d) grid-tied modes of operation. The efficiency of the over-
represents the variation of THD versus the transferred power all circuit, and the inverter with the filter has also been
to the grid for different input dc-voltages. As can be seen, examined using simulation and experimentally obtained data.
THD of less than 5% was successfully achieved for all the It has been verified experimentally that the efficiency of the

VOLUME 6, NO. 3, SEPTEMBER 2019 149

 IEEE Power and Energy Technology Systems Journal

prototype inverter and filter is comparable to commercial which can be further simplified as
three-phase boost converters. The family of curves represent-
ing power injected to the grid with varying the charging duty rms Idc π Idc
Iinv (f1 ) = √ m = √ (1 − D) (20)
ratio has been also presented for different input dc-voltages in 2 3 2
this paper. The presented results demonstrate that the PPWM
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150 VOLUME 6, NO. 3, SEPTEMBER 2019

Singh and Mirafzal: Efficient Grid-Connected Three-Phase Single-Stage Boost CSI

[20] M. de Brito, L. Sampaio, G. Melo, and C. A. Canesin, ‘‘Three-phase tri- BEHROOZ MIRAFZAL (S’01–M’05–SM’07)
state buck–boost integrated inverter for solar applications,’’ IET Renew. received the Ph.D. degree in electrical engineer-
Power Gener., vol. 9, no. 6, pp. 557–565, Aug. 2015. ing from Marquette University, Milwaukee, WI,
[21] A. Singh and B. Mirafzal, ‘‘A low-voltage generator-converter topology for USA, in 2005. From 2005 to 2008, he was a
Direct Drive Wind Turbines,’’ in Proc. IEEE 7th Int. Symp. Power Electron. Senior Development/Project Engineer with Rock-
Distrib. Gener. Syst. (PEDG), Jun. 2016, pp. 1–6. well Automation/Allen-Bradley, Mequon, WI,
[22] P. J. Grbovic, F. Gruson, N. Idir, and P. L. Moigne, ‘‘Turn-on performance USA, where he was involved in research and
of reverse blocking IGBT (RB IGBT) and optimization using advanced
development related to motor-drive systems. From
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2008 to 2011, he was an Assistant Professor with
Apr. 2010.
[23] K. Sun, D. Zhou, L. Huang, K. Matsuse, and K. Sasagawa, ‘‘A novel Florida International University, Miami, FL, USA.
commutation method of matrix converter fed induction motor drive using He is currently an Associate Professor with Kansas State University,
RB-IGBT,’’ IEEE Trans. Ind. Appl., vol. 43, no. 3, pp. 777–786, May 2007. Manhattan, KS, USA. He has authored or coauthored more than 80 arti-
[24] H. Sarnago, O. Lucia, A. Mediano, and J. M. Burdio, ‘‘Modulation scheme cles in professional journals and conferences and holds four U.S. patents.
for improved operation of an RB-IGBT-based resonant inverter applied to His current research interests include applications of power electronics in
domestic induction heating,’’ IEEE Trans. Ind. Electron., vol. 60, no. 5, modern energy conversion systems and microgrids. He was a recipient of the
pp. 2066–2073, May 2013. 2008 Second Best IEEE Industry Applications Society Transactions Prize
[25] U. R. Prasanna and A. K. Rathore, ‘‘A novel single-reference six-pulse- Paper Award published in 2007, the Best 2012 IEEE Power and Energy
modulation (SRSPM) technique-based interleaved high-frequency three- Society Transactions Prize Paper Award published in 2011, and the 2014 U.S.
phase inverter for fuel cell vehicles,’’ IEEE Trans. Power Electron., vol. 28, National Science Foundation CAREER Award. He has served as the Techni-
no. 12, pp. 5547–5556, Dec. 2013. cal Co-Chair of the IEEE IEMDC Conference in 2009 and currently serves
[26] U. R. Prasanna and A. K. Rathore, ‘‘Dual three-pulse modulation-based as an Associate Editor for the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS
high-frequency pulsating DC link two-stage three-phase inverter for elec- and the IEEE TRANSACTIONS ON POWER ELECTRONICS.
tric/hybrid/fuel cell vehicles applications,’’ IEEE J. Emerg. Sel. Topics
Power Electron., vol. 2, no. 3, pp. 477–486, Sep. 2014.

AKANKSHA SINGH (S’13–M’17–SM’19)

received the B.E. degree from Bengal Engineering
and Science University, Howrah, India, in 2010,
and the Ph.D. degree in electrical engineering from
Kansas State University, Manhattan, KS, USA,
in 2017. From 2010 to 2012, she was an Elec-
trical Engineer in research and development with
ESAB India Ltd. In 2017, she joined the Power
Systems Engineering Center, National Renewable
Energy Laboratory, Golden, CO, USA, where she
is currently a Research Engineer. Her research interests include the design
and control of power converters for microgrids and application of power
electronics for integration of distributed and renewable energy to the grid.

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