StrongIRFET™

IRFR7440PbF
IRFU7440PbF
HEXFET® Power MOSFET
Applications
l Brushed Motor drive applications
D VDSS 40V
l BLDC Motor drive applications RDS(on) typ. 1.9mΩ
l PWM Inverterized topologies max. 2.4mΩ
l Battery powered circuits
l Half-bridge and full-bridge topologies
G
ID (Silicon Limited) 180A c
l Electronic ballast applications S ID (Package Limited) 90A
l Synchronous rectifier applications
l Resonant mode power supplies D
D
l OR-ing and redundant power switches
l DC/DC and AC/DC converters
S S
G D
G
Benefits
D-Pak I-Pak
l Improved Gate, Avalanche and Dynamic dV/dt
IRFR7440PbF IRFU7440PbF
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA G D S
l Enhanced body diode dv/dt and dI/dt Capability Gate Drain Source
l Lead-Free
l RoHS Compliant containing no Lead, no Bromide,
and no Halogen

Standard Pack
Base Part Number Package Type Orderable Part Number
Form Quantity
Tube/Bulk 75 IRFR7440PbF
IRFR7440PbF D-PAK
Tape and Reel 2000 IRFR7440TRPbF
IRFU7440PbF I-PAK Tube/Bulk 75 IRFU7440PbF

180
( Ω)

8
RDS (on), Drain-to -Source On Resistance m

ID = 90A LIMITED BY PACKAGE

160

140
6
ID, Drain Current (A)

120

100
4
80
TJ = 125°C
60
2 40

TJ = 25°C 20

0 0
4 8 12 16 20 25 50 75 100 125 150 175

VGS, Gate-to-Source Voltage (V) TC, Case Temperature (°C)

Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Maximum Drain Current vs. Case Temperature

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 IRFR7440PbF/IRFU7440PbF

Absolute Maximum Ratings

Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 180c
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 125c
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 90

IDM Pulsed Drain Current d 760

PD @TC = 25°C Maximum Power Dissipation 140 W

Linear Derating Factor 0.95 W/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery f 4.4 V/ns
TJ Operating Junction and -55 to + 175

TSTG Storage Temperature Range °C

Soldering Temperature, for 10 seconds (1.6mm from case) 300

Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy e 160 mJ
EAS (Thermally limited) Single Pulse Avalanche Energy l 376
IAR Avalanche Current d See Fig 15,16, 23a, 23b
A
EAR Repetitive Avalanche Energy d mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case k ––– 1.05
RθJA Junction-to-Ambient (PCB Mount) j ––– 50 °C/W

RθJA Junction-to-Ambient k ––– 110

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250μA d
ΔV(BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 28 ––– mV/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 1.9 2.4 mΩ VGS = 10V, ID = 90A g
2.8 ––– mΩ VGS = 6.0V, ID = 50A g
VGS(th) Gate Threshold Voltage 2.2 3.0 3.9 V VDS = VGS, ID = 100μA
IDSS Drain-to-Source Leakage Current ––– ––– 1 μA VDS = 40V, VGS = 0V
––– ––– 150 VDS = 40V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Internal Gate Resistance ––– 2.6 ––– Ω

Notes:
 Calculated continuous current based on maximum allowable junction … Pulse width ≤ 400μs; duty cycle ≤ 2%.
temperature. Bond wire current limit is 90A. Note that current
† Coss eff. (TR) is a fixed capacitance that gives the same charging time
limitations arising from heating of the device leads may occur with
as Coss while VDS is rising from 0 to 80% VDSS.
some lead mounting arrangements. (Refer to AN-1140)
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
‚ Repetitive rating; pulse width limited by max. junction temperature.
Coss while VDS is rising from 0 to 80% VDSS.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.04mH ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
RG = 50Ω, IAS = 90A, VGS =10V. mended footprint and soldering techniques refer to application note #AN-994.
„ ISD ≤ 100A, di/dt ≤ 1306A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C. ‰ Rθ is measured at TJ approximately 90°C.
Š Limited by TJmax starting TJ = 25°C, L= 1mH, RG = 50Ω, IAS = 27A, VGS =10V.

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Dynamic @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 280 ––– ––– S VDS = 10V, ID = 90A
Qg Total Gate Charge ––– 89 134 nC ID =90A
Q gs Gate-to-Source Charge ––– 26 ––– VDS =20V
Q gd Gate-to-Drain ("Miller") Charge ––– 26 ––– VGS = 10V g
Q sync Total Gate Charge Sync. (Q g - Qgd ) ––– 63 ––– ID = 90A, VDS =0V, VGS = 10V
td(on) Turn-On Delay Time ––– 11 ––– ns VDD = 20V
tr Rise Time ––– 39 ––– ID = 30A
td(off) Turn-Off Delay Time ––– 51 ––– RG = 2.7Ω
tf Fall Time ––– 34 ––– VGS = 10V g
Ciss Input Capacitance ––– 4610 ––– pF VGS = 0V
Coss Output Capacitance ––– 690 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 460 ––– ƒ = 1.0 MHz, See Fig. 5
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 855 ––– VGS = 0V, VDS = 0V to 32V i See Fig. 12
Coss eff. (TR) Effective Output Capacitance (Time Related) ––– 1210 ––– VGS = 0V, VDS = 0V to 32V h
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– c
180 A MOSFET symbol D

(Body Diode) showing the

G
ISM Pulsed Source Current ––– ––– 760 A integral reverse
(Body Diode)d p-n junction diode.
S

VSD Diode Forward Voltage ––– 0.9 1.3 V TJ = 25°C, IS = 90A, VGS = 0V
trr Reverse Recovery Time ––– 34 ––– ns TJ = 25°C VR = 34V,
––– 35 ––– TJ = 125°C IF = 90A
Q rr Reverse Recovery Charge ––– 33 ––– nC TJ = 25°C di/dt = 100A/μs g
––– 34 ––– TJ = 125°C
IRRM Reverse Recovery Current ––– 1.8 ––– A TJ = 25°C

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 IRFR7440PbF/IRFU7440PbF
1000 1000
VGS VGS
TOP 15V TOP 15V
ID, Drain-to-Source Current (A)

10V

ID, Drain-to-Source Current (A)

10V
7.0V 7.0V
100 6.0V 6.0V
5.5V 5.5V
5.0V 100 5.0V
4.5V 4.5V
BOTTOM 4.3V BOTTOM 4.3V

10

4.3V
10
1

4.3V
≤ 60μs PULSE WIDTH ≤ 60μs PULSE WIDTH
Tj = 25°C Tj = 175°C
0.1 1
0.1 1 10 100 0.1 1 10 100

VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 3. Typical Output Characteristics Fig 4. Typical Output Characteristics

1000 2.0

RDS(on) , Drain-to-Source On Resistance ID = 90A

ID, Drain-to-Source Current (A)

VGS = 10V
100

TJ = 175°C 1.5
(Normalized)

10

TJ = 25°C
1.0
1

VDS = 10V
≤ 60μs PULSE WIDTH
0.1
0.5
2.0 3.0 4.0 5.0 6.0 7.0 8.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)

Fig 5. Typical Transfer Characteristics Fig 6. Normalized On-Resistance vs. Temperature

100000 16
VGS = 0V, f = 1 MHZ
ID= 90A
Ciss = Cgs + Cgd, Cds SHORTED
VGS, Gate-to-Source Voltage (V)

Crss = Cgd VDS = 32V

Coss = Cds + Cgd 12 VDS = 20V
C, Capacitance (pF)

10000

Ciss
8

1000 Coss
4
Crss

0
100
0 20 40 60 80 100 120
1 10 100
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)

Fig 7. Typical Capacitance vs. Drain-to-Source Voltage Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage

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1000 1000

100μsec

ID, Drain-to-Source Current (A)

ISD, Reverse Drain Current (A)

100
TJ = 175°C 100
1msec

Limited by Package
TJ = 25°C
10 10
OPERATION IN THIS AREA
LIMITED BY R (on) 10msec
DS

1 1
Tc = 25°C DC
Tj = 175°C
VGS = 0V Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.1 1 10

VSD, Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 9. Typical Source-Drain Diode Fig 10. Maximum Safe Operating Area
Forward Voltage
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)

49 0.7
Id = 1.0mA
48
0.6
47
0.5
46
Energy (μJ)

0.4
45

44 0.3

43
0.2
42
0.1
41

40 0.0
0 10 20 30 40
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Temperature ( °C ) VDS, Drain-to-Source Voltage (V)

Fig 11. Drain-to-Source Breakdown Voltage Fig 12. Typical COSS Stored Energy
10.0
( Ω)
RDS(on), Drain-to -Source On Resistance m

VGS = 5.5V
8.0
VGS = 6.0V
VGS = 7.0V
6.0 VGS = 8.0V
VGS =10V

4.0

2.0

0.0
0 20 40 60 80 100 120 140 160 180 200
ID, Drain Current (A)

Fig 13. Typical On-Resistance vs. Drain Current

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 IRFR7440PbF/IRFU7440PbF
10

Thermal Response ( ZthJC ) °C/W

1
D = 0.50
0.20
0.1 0.10
0.05
0.02
0.01
0.01

SINGLE PULSE Notes:

( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
100
Avalanche Current (A)

10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ΔΤ j = 25°C and
1 Tstart = 150°C.

0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth

180 Notes on Repetitive Avalanche Curves , Figures 15, 16:

TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
160 BOTTOM 1.0% Duty Cycle 1. Avalanche failures assumption:
ID = 90A Purely a thermal phenomenon and failure occurs at a temperature far in
EAR , Avalanche Energy (mJ)

140 excess of Tjmax. This is validated for every part type.

2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
120 3. Equation below based on circuit and waveforms shown in Figures 23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
100 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
80 6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
60
25°C in Figure 15, 16).
tav = Average time in avalanche.
40
D = Duty cycle in avalanche = tav ·f
20 ZthJC(D, tav) = Transient thermal resistance, see Figures 14)

0 PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC

25 50 75 100 125 150 175 Iav = 2DT/ [1.3·BV·Zth]
Starting TJ , Junction Temperature (°C) EAS (AR) = PD (ave)·tav

Fig 16. Maximum Avalanche Energy vs. Temperature

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 IRFR7440PbF/IRFU7440PbF

4.5 8
IF = 54A
VGS(th) Gate threshold Voltage (V)

4.0 VR = 34V

6 TJ = 25°C
TJ = 125°C
3.5

IRRM (A)
3.0 ID = 100μA 4
ID = 250μA
2.5 ID = 1.0mA
ID = 1.0A 2
2.0

1.5 0
-75 -50 -25 0 25 50 75 100 125 150 175 0 200 400 600 800 1000
TJ , Temperature ( °C ) diF /dt (A/μs)

Fig 17. Threshold Voltage vs. Temperature Fig. 18 - Typical Recovery Current vs. dif/dt

8 120
IF = 90A IF = 54A
VR = 34V 100 VR = 34V
TJ = 25°C TJ = 25°C
6
TJ = 125°C TJ = 125°C
80
QRR (nC)
IRRM (A)

4 60

40
2
20

0 0
0 200 400 600 800 1000 0 200 400 600 800 1000
diF /dt (A/μs) diF /dt (A/μs)

Fig. 19 - Typical Recovery Current vs. dif/dt Fig. 20 - Typical Stored Charge vs. dif/dt

100
IF = 90A
VR = 34V
80
TJ = 25°C
TJ = 125°C

60
QRR (nC)

40

20

0
0 200 400 600 800 1000
diF /dt (A/μs)
Fig. 21 - Typical Stored Charge vs. dif/dt

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 IRFR7440PbF/IRFU7440PbF
Driver Gate Drive
P.W.
D.U.T P.W.
Period D=
Period
+

VGS=10V *
ƒ Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance
D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG V DD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• ISD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
20V
VGS
tp 0.01Ω
I AS

Fig 23a. Unclamped Inductive Test Circuit Fig 23b. Unclamped Inductive Waveforms
RD
VDS VDS

VGS
90%
D.U.T.
RG
+
- VDD

V10V
GS 10%
Pulse Width ≤ 1 µs VGS
Duty Factor ≤ 0.1 %
td(on) tr t d(off) tf

Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms
Current Regulator Id
Same Type as D.U.T. Vds

Vgs
50KΩ

12V .2μF
.3μF

+
V
D.U.T. - DS
Vgs(th)
VGS

3mA

IG ID
Current Sampling Resistors Qgs1 Qgs2 Qgd Qgodr

Fig 25a. Gate Charge Test Circuit Fig 25b. Gate Charge Waveform
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 IRFR7440PbF/IRFU7440PbF

D-Pak (TO-252AA) Package Outline

Dimensions are shown in millimeters (inches)

D-Pak (TO-252AA) Part Marking Information

INTERNATIONAL INTERNATIONAL
RECTIFIER LOGO PART NUMBER RECTIFIER LOGO PART NUMBER
IRFR7440 IRFR7440

ASSEMBLY
PYWW?
OR ASSEMBLY
YWWP
DATE CODE DATE CODE
LOT CODE LOT CODE
LC LC P = LEAD-FREE LC LC Y = LAST DIGIT OF YEAR
Y = LAST DIGIT OF YEAR WW = WORK WEEK
WW = WORK WEEK P = LEAD-FREE
? = ASSEMBLY SITE CODE

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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 IRFR7440PbF/IRFU7440PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)

I-Pak (TO-251AA) Part Marking Information

INTERNATIONAL INTERNATIONAL
PART NUMBER PART NUMBER
RECTIFIER LOGO RECTIFIER LOGO
IRFU7440 IRFU7440

ASSEMBLY
PYWW? OR ASSEMBLY
YWWP
DATE CODE DATE CODE
LOT CODE P = LEAD-FREE LOT CODE
LC LC LC LC Y = LAST DIGIT OF YEAR
Y = LAST DIGIT OF YEAR WW = WORK WEEK
WW = WORK WEEK P = LEAD-FREE
? = ASSEMBLY SITE CODE

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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 IRFR7440PbF/IRFU7440PbF

D-Pak (TO-252AA) Tape & Reel Information

Dimensions are shown in millimeters (inches)

TR TRR TRL

16.3 ( .641 ) 16.3 ( .641 )

15.7 ( .619 ) 15.7 ( .619 )

12.1 ( .476 ) FEED DIRECTION 8.1 ( .318 )

FEED DIRECTION
11.9 ( .469 ) 7.9 ( .312 )

NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

13 INCH

16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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 IRFR7440PbF/IRFU7440PbF

†
Qualification information
††
Industrial
Qualification level †††
(per JEDEC JESD47F guidelines)
D-PAK MSL1
Moisture Sensitivity Level †††
I-PAK (per JEDEC J-STD-020D )
RoHS compliant Yes

† Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/

†† Higher qualification ratings may be available should the user have such requirements. Please contact your
International Rectifier sales representative for further information: http:www.irf.com/whoto-call/salesrep/
††† Applicable version of JEDEC standard at the time of product release.

Revision History
Date Comments
10/17/2012 • Added I-Pak -All pages
• Updated data sheet based on corporate template.
5/1/2014 • Added "Stong Fet" on header on page7.
• Updated package outline and part marking on page 9 & 10.
• Updated EAS (L =1mH) = 376mJ on page 2
1/6/2015
• Updated note 10 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50Ω, IAS = 27A, VGS =10V”. on page 2

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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