LAB No. 14: Keyboard and Monitor Interfacing With Processor

EEN 222 Computer Architecture
LAB No. 14
Keyboard and Monitor Interfacing with
Processor
Tasks
You are required to implement the following functionalities in the processor designed so far in
the lab.
1. The processor should keep on printing a specific sequence of alphabets on the monitor
screen. For example print “GROUP” on the monitor screen such that first G is displayed,
then after one second G vanishes and R is displayed, then after one second R vanishes and O
is displayed and so on till the last letter P is displayed. Then again after one second G is
displayed and so on. Note that only one letter is displayed at one time.
HELP
The hardware module to display a character on the monitor screen is available by the name
“vga_initials_top.v”. When you want to display any character on the screen, simply input the
character key code to this module. This module connects to monitor through VGA port.
2. Interface keyboard to your processor, such that when the key “A” is pressed the processor
stops functionality number one and starts printing another word say “XYZ” on the monitor
screen in the same way as in functionality one.
3. If the key “B” on the keyboard is pressed, then the processor should start performing
functionality one again.
HELP
The hardware module that interfaces keyboard with FPGA is available by the name
“ps2_rx”. It outputs the key code of the key pressed on the keyboard. This module connects
to keyboard through PS2 port.
Figure 14.1 shows the basic connections to your processor. The connections of keyboard to
ps2_rx and connections of vga_initials_top to monitor are not shown.
Lab 14. Keyboard and Monitor Interfacing with Processor

Notes
1. represents a set of different signals.
2. represents a single signal which can be of 1 or more bits
3. dout is the 8-bit key code of the key pressed on the keyboard.
ps2_rx.v and vga_initials_top modules are provided. stim.v is also provided to simulate keyboard
in Isim.
50 MHz clk FPGA

Key_code (8 bit)
key_code (8 bit)
keyboard ps2_rx processor vga_initials_top monitor
interrupt
reset 50 MHz clk reset
Fig 14.1: The overall project Design
FOR KEYBOARD
ps2.v, ps2_rx.v and stim.v. ps2_rx is the main module which you should use. Ps2.v is the module that is
instantiated in ps2_rx. If you want to simulate ps2_rx in modelsim, then use stim.v as test bench.
“stim.v” module simulates the one key press of the keyboard, that is this module outputs the same
signals which are output by the keyboard whenever any alphabet key is pressed on it.
FOR MONITOR
Vga_initials_top.v is the main module that you should use. In this module following modules are
instantiated vga_initials.v, vga_640x480.v, clkdiv.v, prom_DMH.v
UCF FILE
To handle top main modules vga_initials_top and ps2_rx, the top_level.ucf file is also provided.
Additional info about verilog modules is written in the respective .v files.

Fig 14.2: Key codes of the keyboard keys
Interrupt Key code of Interrupt The break Interrupt Key code of

pulse pressed key pulse code pulse pressed key
Fig 14.3: Simulation results for one key press (key code 10101010) on keyboard. “stim.v” is used for simulation of “ps2_rx.v”. For details of
break code etc, see comments in file “stim.v” Timings are the same as in a real keyboard
Concept of Memory Mapped Register
This concept is used when we need to interface external components such as keyboard, monitor etc
with processor. Assume that the key code output by the “ps2_rx.v” module is latched into a register
(this register is called memory mapped register). Now we design our processor such that if a load
instruction comes to load data from say last location of Data Memory, then the data is not loaded from
that memory location but from the register into which the key code was latched. In this way the
processor gets the key code of the key pressed on the keyboard. This is the reading operation from a
memory mapped register. Likewise, writing operation can also be performed on a memory mapped
register. We used the concept of writing on a memory mapped register when we introduced “done”
register in Lab 5. Actually “done” was the memory mapped register on which writing operation was
done whenever the save instruction came from processor to save to data memory location 511
(decimal).


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EEN 222 Computer Architecture

Lab 14. Keyboard and Monitor Interfacing with Processor

1. represents a set of different signals.

2. represents a single signal which can be of 1 or more bits

50 MHz clk FPGA

keyboard ps2_rx processor vga_initials_top monitor

reset 50 MHz clk reset

Fig 14.1: The overall project Design

Additional info about verilog modules is written in the respective .v files.

Lab 14. Keyboard and Monitor Interfacing with Processor

Fig 14.2: Key codes of the keyboard keys

Interrupt Key code of Interrupt The break Interrupt Key code of

Concept of Memory Mapped Register

Lab 14. Keyboard and Monitor Interfacing with Processor

Lab 14. Keyboard and Monitor Interfacing with Processor

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