LD7550

Block Diagram
VCC

40V UVLO
internal bias
16.0V/ & Vref
11.4V

EN
RT OSC Vref OK

EN
OUT
Green-Mode
Oscillator

COMP
2R R Q
R
PWM
Comparator

Leading
+ + Ramp from
CS Edge ∑ Oscillator
Blanking

GND

Absolute Maximum Ratings

Supply Voltage VCC 36V
COMP, RT, CS -0.3 ~7V
Operating Junction Temperature 150°C
Storage Temperature Range -65°C to 150°C
Package thermal resistance (DIP-8) 100°C/W
Package thermal resistance (SOT-26) 250°C/W
Lead temperature (DIP-8, Soldering, 10sec) 260°C
Lead temperature (SOT-26, Soldering, 10sec) 260°C

Caution:
Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only
rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not
limited.

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 LD7550
Electrical Characteristics
o
(TA = +25 C unless otherwise stated, VCC=15.0V)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply Voltage (Vcc Pin)
Startup Current 5 25 µA
VCOMP=0V 3 4 mA
Operating Current VCOMP=3V 2 mA
VCOMP=open 0.7 mA
UVLO (off) 10.4 11.4 12.4 V
UVLO (on) 14.8 16.0 17.5 V
Voltage Feedback (Comp Pin)
Short Circuit Current VCOMP=0V 2.2 3.0 mA
Open Loop Voltage COMP pin open 5.0 V
Green Mode Threshold VCOMP 2.35 V
Current Sensing (CS Pin)
Maximum Input Voltage 0.80 0.85 0.90 V
Leading Edge Blanking Time 250 nS
Input impedance 50 KΩ
Delay to Output 300 nS
Oscillator (RT pin)
Frequency RT=100KΩ 61.5 66.5 71.5 KHz
Green Mode Frequency Fs=66.5KHz 20 KHz
Temp. Stability (-30°C ~85°C) 5 %
Voltage Stability (VCC=12V-30V) 2 %
Gate Drive Output (OUT Pin)
Output Low Level VCC=15V, Io=20mA 1 V
Output High Level VCC=15V, Io=20mA 8 V
Rising Time Load Capacitance=1000pF 50 200 nS
Falling Time Load Capacitance=1000pF 30 125 nS

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 LD7550
Typical Performance Characteristics
12.2 17.0
16.8

12.0
16.4

11.8 16.0

UVLO (On) (V)

UVLO (Off) (V)

15.6
11.6

15.2
11.4
14.8

11.2
14.4

11.0 14.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120

Temperature (°C) Temperature (°C)

Fig. 1 UVLO (Off) vs. Temperature Fig. 2 UVLO (On) vs. Temperature

72.0 18.2

71.0 18.0
Frequency (KHz)

Frequency (KHz)

70.0 17.8

69.0 17.6

68.0 17.4

67.0 17.2

66.0 17.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120

Temperature (°C) Temperature (°C)

Fig. 3 Frequency vs. Temperature Fig. 4 Green-Mode Frequency vs. Temperature

75.9

75.6
Max. Duty-Cycle (%)

75.3

75.0

74.7

74.4

-40 -20 0 20 40 60 80 100 120

Temperature (°C)
Fig. 5 Duty-Cycle (max.) vs. Temperature

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 LD7550
Application Information
deliver the gate drive signal, the supply current is provided
Operation Overview
from the auxiliary winding of the transformer. The lower
As long as the green power requirement becomes a trend
startup current requirement on the PWM controller will help
and the power saving is getting more and more important for
to increase the R1 value and then reduce the power
the switching power supplies and switching adaptors, the
consumption on R1. By using CMOS process and the
traditional PWM controllers are not able to support such new
special circuit design, the maximum startup current of
requirements. Furthermore, the cost and size limitation force
LD7550 is only 25µA.
the PWM controllers need to be powerful to integrate more
functions to reduce the external part counts. The LD7550 Theoretically, R1 can be very high resistance value.
is targeted on such application to provide an easy and cost However, higher R1 will cause longer startup time. By
effective solution; its detail features are described as below: properly select the value of R1 and C1; it can be optimized
under the consideration of R1 power consumption and the
Under Voltage Lockout (UVLO) startup time.
An UVLO comparator is implemented to detect the voltage
on the Vcc pin to ensure the supply voltage is enough to
power on the LD7550 PWM controller and further to drive
the power MOSFET. As shown in Fig. 6, a hysteresis is AC EMI
input Filter
implemented to prevent the shutdown from the voltage dip
during startup. The turn-on and turn-off threshold level are R1
Cbulk
D1
set at 16V and 11.4V, respectively.

Vcc C1

VCC
UVLO(on)
OUT
UVLO(off)
LD7550
CS
GND
t

I(Vcc) operating current

(~ mA)
Fig. 7

startup current
Current Sensing and Leading-edge Blanking
(~uA)

t The typical current mode PWM controller feedbacks both

current signal and voltage signal to close the control loop
Fig. 6
and achieve regulation. As shown in Fig. 8, the LD7550
detects the primary MOSFET current from the CS pin, which
Startup Current and Startup Circuit is not only for the peak current mode control but also for the
pulse-by-pulse current limit. The maximum voltage
The typical startup circuit to power up the LD7550 is shown
threshold of the current sensing pin is set as 0.85V. Thus
in Fig. 7. During the startup transient, the Vcc is lower than
the MOSFET peak current can be calculated as:
the UVLO threshold thus there is no gate pulse generated
from LD7550 to drive power MOSFET. Therefore, the 0.85 V
IPEAK(MAX) =
RS
current through R1 is to provide the startup current as well
as charge the capacitor C1. Whenever the Vcc voltage is
higher enough to power on the LD7550 and further to

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 LD7550
Vin
Oscillator and Switching Frequency
R1
Cbulk Connecting a resistor from RT pin to GND according to the
D1
equation can program the normal switching frequency:
66.5
C1 fSW = × 100(KHz )
RT(KΩ )

VCC
OUT The suggested operating frequency range of LD7550 is
LD7550 within 50KHz to 130KHz.

Comp CS
GND Rs
Voltage Feedback Loop
The voltage feedback signal is provided from the TL431 in
the secondary side through the photo-coupler to the COMP
Fig. 8 pin of LD7550. The input stage of LD7550, like the
UC384X, is with 2 diodes voltage offset then feeding into the
A 250nS leading-edge blanking time is included in the input voltage divider with 1/3 ratio, that is,
of CS pin to prevent the false-trigger caused by the current 1
V+ (PWM COMPARATOR ) = × ( VCOMP − 2VF )
spike and further to eliminate the need of R-C filter which is 3
usually needed in the typical UC384X application (Fig. 9).
A pull-high resistor is embedded internally thus can be
eliminated on the external circuit.

Internal Slope Compensation

A fundamental issue of current mode control is the stability
problem when its duty-cycle is operated more than 50%. To
250ns
blanking
stabilize the control loop, the slope compensation is needed
VCC time in the traditional UC384X design by injecting the ramp signal
OUT
from the RT/CT pin through a coupling capacitor. In LD7550,
the internal slope compensation circuit has been
LD7550 implemented to simplify the external circuit design.

CS
GND On/Off Control
The LD7550 can be controlled to turn off by pulling COMP
pin to lower than 1.2V. The gate output pin of LD7550 will
be disabled immediately under such condition. The off mode
remove
can be released when the pull-low signal is removed.
Fig. 9

Dual-Oscillator Green-Mode Operation

Output Stage and Maximum Duty-Cycle There are many difference topologies has been
An output stage of a CMOS buffer, with typical 300mA implemented in different chips for the green-mode or power
driving capability, is incorporated to drive a power MOSFET saving requirements such as “burst-mode control”,
directly. And the maximum duty-cycle of LD7550 is limited “skipping-cycle Mode”, “variable off-time control “…etc. The
to 75% to avoid the transformer saturation. basic operation theory of all these approaches intended to

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 LD7550
reduce the switching cycles under light-load or no-load (voltage controlled oscillator), is a variable frequency
condition either by skip some switching pulses or reduce the oscillator. The rising time of the VCO is proportional to
switching frequency. (VGREEN-V+), thus the lower voltage on V+ will generate
What LD7550 used to implement the power-saving longer rising time on VCO as well as lower frequency on
2
operation is Leadtrend Technology’s own IP . In such VCO.
approach, as shown in the block diagram, 2 oscillators are By using this dual-oscillator control, the green-mode
implemented in LD7550. The first oscillator is to take care frequency can be well controlled and further to avoid the
the normal switching frequency, which can be set by the RT generation of audible noise.
"Set" Signal
pin through an external resistor. Under this operation mode, from OSC
(to OSC & Nor gate)
nd
as shown in Fig. 10, the 2 oscillation (green-mode
oscillator) is not activated. Therefore, the rising-time and the Level-detector
Green-Mode VCO
& Counter
falling-time of the internal ramp will be constant to achieve Oscillator

good stability over all temperature range. Under the Vgreen

(V+ -Vgreen) >=0, VCO disabled
normal operation, this oscillator is dominated the switching (V+ -Vgreen) <0, VCO activated

frequency. V+

V+

Green-Mode Osc is not activated Normal Mode

Vgreen
under normal operation. Green Mode
OSC EN=1 V-

EN
Ramp of
OUT OSC

Green-Mode
Osc
Green-Mode
Oscillator activated
Set S
V+
COMP Reset
2R
V- R Q
R
PWM
Comparator Ramp of
VCO

+ + Ramp from
CS LEB ∑ Oscillator

Fig. 11

Fig. 10

2 Note: Patent pending

As shown in Fig. 11, the green-mode oscillator detects the

Comp pin signal to determine if it is within the green-mode
operation. When the detected signal V+ is lower than the
green-mode threshold VGREEN, the green-mode oscillator is
on. The green-mode oscillator, implemented by a VCO

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 LD7550

Package Information
SOT-26

A
θ

M
J B

F I

Dimension in Millimeters Dimensions in Inches

Symbol
Min Max Min Max

A 2.692 3.099 0.106 0.122

B 1.397 1.803 0.055 0.071

C ------- 1.450 ------- 0.058

D 0.300 0.550 0.012 0.022

F 0.838 1.041 0.033 0.010

I 0.050 0.150 0.002 0.006

J 2.600 3.000 0.102 0.118

M 0.300 0.600 0.012 0.024

o o
θ 0 10 0 10

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 LD7550

DIP-8

E
J

C
L
I

D F

Dimension in Millimeters Dimensions in Inches

Symbol
Min Max Min Max

A 9.017 10.160 0.355 0.400

B 6.096 7.112 0.240 0.280

C ----- 5.334 ------ 0.210

D 0.356 0.584 0.014 0.023

E 1.143 1.778 0.045 0.070

F 2.337 2.743 0.092 0.108

I 2.921 3.556 0.115 0.14

J 7.366 8.255 0.29 0.325

L 0.381 ------ 0.015 --------

Important Notice
Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers should

verify the datasheets are current and complete before placing order.

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Leadtrend Technology Corporation
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