B154ew08 V1
B154ew08 V1
B154ew08 V1
AU OPTRONICS CORPORATION
(V ) Preliminary Specifications
( ) Final Specifications
Checked &
Prepared by
Approved by
Contents
1. Handling Precautions .......................................................................................... 4
2. General Description ............................................................................................. 4
2.1 Display Characteristics ...................................................................................................... 5
2.2 Optical Characteristics ....................................................................................................... 6
3. Functional Block Diagram ................................................................................. 11
4. Absolute Maximum Ratings .............................................................................. 12
4.1 TFT LCD Module.............................................................................................................. 12
4.2 Backlight Unit ................................................................................................................... 12
4.3 Absolute Ratings of Environment ..................................................................................... 12
5. Electrical characteristics ................................................................................... 13
5.1 TFT LCD Module.............................................................................................................. 13
5.2 Backlight Unit ................................................................................................................... 15
6. Signal Characteristic.......................................................................................... 17
6.1 Pixel Format Image .......................................................................................................... 17
6.2 The input data format ....................................................................................................... 18
6.3 Signal Description ............................................................................................................ 19
6.4 Interface Timing................................................................................................................ 22
6.5 Power ON/OFF Sequence ............................................................................................... 24
7. Connector & Pin Assignment............................................................................ 25
7.1 TFT LCD Module.............................................................................................................. 25
7.2 Backlight Unit ................................................................................................................... 25
7.3 Signal for Lamp connector ............................................................................................... 25
8. Vibration and Shock Test .................................................................................. 26
8.1 Vibration Test ................................................................................................................... 26
8.2 Shock Test Spec:.............................................................................................................. 26
9. Reliability............................................................................................................. 27
10. Mechanical Characteristics ............................................................................. 28
10.1 LCM Outline Dimension ................................................................................................. 28
10.2 Screw Hole Depth and Center Position.......................................................................... 30
11. Shipping and Package ..................................................................................... 31
11.1 Shipping Label Format ................................................................................................... 31
11.2. Carton package ............................................................................................................. 32
11.3 Shipping package of palletizing sequence ..................................................................... 32
12. Appendix: EDID description............................................................................ 33
Record of Revision
0.2 2007/03/19 33 Old EDID (checksum 45) New EDID (checksum 43)
0.3 2007/03/22 1 B154EW08 V1(HW 0A) B154EW08 V1(HW 0A & 1A & 4A)
B154EW08 V1(HW 1A)
B154EW08 V1(HW 4A)
0.4 2007/03/28 19 6.3 Signal Description/Pin 6.3 Signal Description/Pin
Assignment Assignment
PIN 25 NC / No Connection PIN 25 GND / Ground
(Reserve for AUO test)
0.4 2007/03/28 22 6.4.1 Timing Characteristics 6.4.1 Timing Characteristics
Clock frequency typ.: 68.9 MHz Clock frequency typ.: 71.1 MHz
Vertical section Period: 816 Vertical section Period: 823
Vertical section Blanking: 16 Vertical section Blanking: 23
Horizontal section Period: 1408 Horizontal section Period: 1440
1. Handling Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration or
spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard
surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure
human earth when handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) In case if a Module has to be put back into the packing container slot after once it was
taken out from the container, do not press the center of the CCFL Reflector edge.
Instead, press at the far ends of the CFL Reflector edge softly. Otherwise the TFT
Module may be damaged.
10) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor
tilt the Interface Connector of the TFT Module.
11) After installation of the TFT Module into an enclosure (Notebook PC Bezel, for
example), do not twist nor bend the TFT Module even momentary. At designing the
enclosure, it should be taken into consideration that no bending/twisting forces are
applied to the TFT Module from outside. Otherwise the TFT Module may be
damaged.
12) Cold cathode fluorescent lamp in LCD contains a small amount of mercury. Please follow
local ordinances or regulations for disposal.
13) Small amount of materials having no flammability grade is used in the LCD module. The
LCD module should be supplied by power complied with requirements of Limited Power
Source(, IEC60950 or UL1950), or be applied exemption.
14) The LCD module is designed so that the CCFL in it is supplied by Limited Current
Circuit(IEC60950 or UL1950). Do not connect the CCFL in Hazardous Voltage Circuit.
2. General Description
B154EW08 V1 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a
driver circuit, and backlight system. The screen format is intended to support the WXGA
Temperature Range
Operating [oC] 0 to +50
Storage (Non-Operating) [oC] -20 to +60
W /4 W /4 W /4 W /4
H /4
1 2
H /4
H 3
H /4
4 5
H /4
W /4 W /4 W /4 W /4
10 10
10
1 2 3
H /4
4 5
H /4
H 6 7 8
H /4
9 10
H /4 11 12 13
10
Note 3: The luminance uniformity of 5 and 13 points is defined by dividing the maximum luminance values by the
minimum test point luminance
The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change
during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight
for 30 minutes in a stable, windless and dark room.
Photo detector
Field=2°
50 cm
Measure the luminance of gray level 63 at 5 points,YL = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
L (x) is corresponding to the luminance of the point X at Figure in Note (1).
Where
YA = Luminance of measured location without gray level 0 pattern (cd/m2)
The output signals of BM-7 or equivalent are measured when the input signals are changed from “Black” to
“White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval between
the 10% and 90% of amplitudes. Refer to figure as below.
"Black"
"White" "White"
100%
Signal(Relative value)
90%
10%
0%
Tr Tf
X-Driver
Note 1: At Ta (25℃ )
Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: For quality performance, please refer to AUO IIS(Incoming Inspection Standard).
Twb=39°C
5. Electrical characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows;
+5.0V Q3
AO6402
D6 F1
D5
D2 S
VCC
D1
47K
C1
1uF/16V
(High to Low)
D1
D2
D5
D6
Control
Signal R2
Q3
AO6402
G
1K
S
C3
2
+12.0V
SW1
SW MAG-SPST VR1 0.01uF/25V
1
47K
C2
1uF/25V
90% 3.3V
10%
0V
0.5ms
Differential Input
Vcm 1.125 1.375 [V]
Common Mode Voltage
Vth
Vtl
Vcm
VSS
6. Signal Characteristic
6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.
0 1 1278 1279
1st Line R GB R GB R G B R GB
800th Line R GB R GB R G B R GB
Red-pixel Data
G5 Green Data 5 (MSB) Green-pixel Data
G4 Green Data 4 Each green pixel's brightness data consists of
G3 Green Data 3 these 6 bits pixel data.
G2 Green Data 2
G1 Green Data 1
G0 Green Data 0 (LSB)
Green-pixel Data
B5 Blue Data 5 (MSB) Blue-pixel Data
B4 Blue Data 4 Each blue pixel's brightness data consists of
B3 Blue Data 3 these 6 bits pixel data.
B2 Blue Data 2
B1 Blue Data 1
B0 Blue Data 0 (LSB)
Blue-pixel Data
RxCLKIN Data Clock The typical frequency is 68.9 MHZ.. The signal
is used to strobe the pixel data and DE signals.
All pixel data shall be valid at the falling edge
when the DE signal is high.
DE Display Timing This signal is strobed at the falling edge of
RxCLKIN. When the signal is high, the pixel
data shall be valid to be displayed.
VS Vertical Sync The signal is synchronized to RxCLKIN .
HS Horizontal Sync The signal is synchronized to RxCLKIN .
Note: Output signals from any system shall be low or High-impedance state when VDD is off.
LVDS is a differential signal technology for LCD interface and high speed data transfer device.
PIN# Signal Name Description
1 GND Ground
2 VDD +3.3V Power Supply
3 VDD +3.3V Power Supply
4 VEDID +3.3V EDID Power
5 NC No Connection (Reserve for AUO test)
6 CLKEDID EDID Clock Input
7 DATAEDID EDID Data Input
8 RxIN0- LVDS differential data input(R0-R5, G0)
9 RxIN0+ LVDS differential data input(R0-R5, G0)
10 GND Ground
11 RxIN1- LVDS differential data input(G1-G5, B0-B1)
12 RxIN1+ LVDS differential data input(G1-G5, B0-B1)
13 GND Ground
14 RxIN2- LVDS differential data input(B2-B5, HS, VS, DE)
15 RxIN2+ LVDS differential data input(B2-B5, HS, VS, DE)
16 GND Ground
17 RxCLKIN- LVDS differential clock input
18 RxCLKIN+ LVDS differential clock input
19 GND Ground
20 NC No Connection (Reserve for AUO test)
21 NC No Connection (Reserve for AUO test)
22 GND Ground
23 NC No Connection (Reserve for AUO test)
24 NC No Connection (Reserve for AUO test)
25 GND Ground
26 NC No Connection (Reserve for AUO test)
27 NC No Connection (Reserve for AUO test)
28 GND Ground
29 NC No Connection (Reserve for AUO test)
30 NC No Connection (Reserve for AUO test)
Connector
30 1
NC
GND
Note2: Input signals shall be low or High-impedance state when VDD is off.
Signal Input
LVDS Receiver
Pin No.
8 RxIN0-
9 RxIN0+
11 RxIN1-
12 RxIN1+
14 RxIN2-
15 RxIN2+
17 RxCLKIN-
18 RxCLKIN+
DOTCLK
DE
THB THD
TH
DE
TVB
TVD
TV
VDD power and lamp on/off sequence is as follows. Interface signals are also shown in the chart.
Signals from any system shall be Hi-Z state or low level when VDD is off.
T1
90% 90%
10% 10%
Power Supply VDD T3 T7 T4
T2
VALID
LVDS Interface
T5 DATA
T6
Backlight On
Value
Parameter Min. Typ. Max. Units
T1 0.5 - 10 (ms)
T2 0 - 50 (ms)
T3 0 - 50 (ms)
T4 400 - - (ms)
T5 200 - - (ms)
T6 200 - - (ms)
T7 0 - 10 (ms)
7. Connector Description
These connectors are capable of accommodating the following signals and will be following
components.
These connectors are capable of accommodating the following signals and will be following
components.
9. Reliability
Note1: According to EN61000-4-2 , ESD class B: Some performance degradation allowed. No data lost
. Self-recoverable. No hardware failures.
Note2: CCFL Life time: 12,000 hours minimum under normal module usage.
Note3: MTBF (Excluding the CCFL): 30,000 hours with a confidence level 90%
*Note#1: H/W 0A & 4Arepresents Novatek source driver and MEC gate driver combination
*Note#2: H/W 1A represents Radium source driver and TSB gate driver combination
The outside dimension of carton is 455 (L)mm x 380 (W)mm x 355 (H)mm
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