SLLS098C − MAY 1980 − REVISED FEBRUARY 2004

D Meets or Exceeds Requirements of ANSI D, N, OR NS PACKAGE

TIA/EIA-422-B and ITU (TOP VIEW)
Recommendation V.11
1A 1 16 VCC
D 3-State, TTL-Compatible Outputs
1Y 2 15 4A
D Fast Transition Times 1Z 3 14 4Y
D High-Impedance Inputs 1, 2EN 4 13 4Z
D Single 5-V Supply 2Z 5 12 3, 4EN
2Y 3Z
D Power-Up and Power-Down Protection
6 11
2A 7 10 3Y
description/ordering information GND 8 9 3A

The MC3487 offers four independent differential line drivers designed to meet the specifications of ANSI
TIA/EIA-422-B and ITU Recommendation V.11. Each driver has a TTL-compatible input buffered to reduce
current and minimize loading.
The driver outputs utilize 3-state circuitry to provide high-impedance states at any pair of differential outputs
when the appropriate output enable is at a low logic level. Internal circuitry is provided to ensure the
high-impedance state at the differential outputs during power-up and power-down transition times, provided the
output enable is low.
The MC3487 is designed for optimum performance when used with the MC3486 quadruple line receiver. It is
supplied in a 16-pin dual-in-line package and operates from a single 5-V supply.

ORDERING INFORMATION
ORDERABLE TOP-SIDE
TA PACKAGE†
PART NUMBER MARKING
PDIP − N Tube MC3487N MC3487N
Tube MC3487D
0°C to 70°C SOIC − D MC3487
Tape and reel MC3487DR
SOP − NS Tape and reel MC3487NSR MC3487
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.

FUNCTION TABLE
(each driver)
OUTPUT OUTPUTS
INPUT
ENABLE Y Z
H H H L
L H L H
X L Z Z
H = TTL high level, L = TTL low level,
X = irrelevant, Z = High impedance

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.



   !   "#$ %!& Copyright  2004, Texas Instruments Incorporated
%   "! "! '! !  !( !
%% )*& % "!+ %!  !!$* $%!
!+  $$ "!!&

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1




 
 

SLLS098C − MAY 1980 − REVISED FEBRUARY 2004

logic diagram (positive logic)

4
1, 2EN

2
1 1Y
1A 3
1Z
6
7 2Y
2A 5
2Z

12
3, 4EN

10
9 3Y
3A 11
3Z
14
15 4Y
4A 13
4Z

schematics of inputs and outputs

EQUIVALENT OF EACH INPUT TYPICAL OF ALL OUTPUTS

VCC VCC

Input

9 Ω NOM

Output

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SLLS098C − MAY 1980 − REVISED FEBRUARY 2004

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Output voltage, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Package thermal impedance, θJA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential output voltage, VOD, are with respect to the network ground terminal.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions

MIN NOM MAX UNIT
VCC Supply voltage 4.75 5 5.25 V
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
TA Operating free-air temperature 0 70 °C

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SLLS098C − MAY 1980 − REVISED FEBRUARY 2004

electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN MAX UNIT
VIK Input clamp voltage II = −18 mA −1.5 V
VOH High-level output voltage VIL = 0.8 V, VIH = 2 V, IOH = −20 mA 2.5 V
VOL Low-level output voltage VIL = 0.8 V, VIH = 2 V, IOL = 48 mA 0.5 V
|VOD| Differential output voltage RL = 100 Ω, See Figure 1 2
Change in magnitude of
∆|VOD| RL = 100 Ω, See Figure 1 ±0.4 V
differential output voltage†
VOC Common-mode output voltage‡ RL = 100 Ω, See Figure 1 3 V
Change in magnitude of
∆|VOC| RL = 100 Ω, See Figure 1 ±0.4 V
common-mode output voltage†
VO = 6 V 100
IO Output current with power off VCC = 0 µA
A
VO = −0.25 V −100
VO = 2.7 V 100
IOZ High-impedance-state output current Output enables at 0.8 V µA
A
VO = 0.5 V −100
Input current at maximum input
II VI = 5.5 V 100 µA
voltage
IIH High-level input current VI = 2.7 V 50 µA
IIL Low-level input current VI = 0.5 V −400 µA
IOS Short-circuit output current § VI = 2 V −40 −140 mA
Outputs disabled 105
ICC Supply current (all drivers) mA
Outputs enabled, No load 85
† ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low
level.
‡ In ANSI Standard TIA/EIA-422-B, VOC, which is the average of the two output voltages with respect to ground, is called output offset voltage,
VOS.
§ Only one output at a time should be shorted, and duration of the short circuit should not exceed one second.

switching characteristics over recommended operating free-air temperature range, VCC = 5 V

PARAMETER TEST CONDITIONS MIN MAX UNIT
tPLH Propagation delay time, low- to high-level output 20
CL = 15 pF, See Figure 2 ns
tPHL Propagation delay time, high- to low-level output 20
tsk Skew time CL = 15 pF, See Figure 2 6 ns
tt(OD) Differential-output transition time CL = 15 pF, See Figure 3 20 ns
tPZH Output enable time to high level 30
CL = 50 pF, See Figure 4 ns
tPZL Output enable time to low level 30
tPHZ Output disable time from high level 25
CL = 50 pF, See Figure 4 ns
tPLZ Output disable time from low level 30

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SLLS098C − MAY 1980 − REVISED FEBRUARY 2004

PARAMETER MEASUREMENT INFORMATION

50 Ω
VOD

50 Ω VOC

Figure 1. Differential and Common-Mode Output Voltages

3V
Input 1.5 V 1.5 V
0V
tPHL
tPLH
VOH
5V
Y Output 1.5 V 1.5 V
200 Ω
SW1 VOL

ÏÏÏ
Generator Skew Skew
50 Ω
(see Note A)

ÏÏÏ
CL = 15 pF tPHL tPLH
(see Note B) VOH
3V See Note C Z Output 1.5 V 1.5 V
VOL
TEST CIRCUIT VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr ≤ 5 ns, tf ≤ 5 ns, PRR ≤ 1 MHz, duty cycle = 50%,
ZO = 50 Ω.
B. CL includes probe and stray capacitance.
C. All diodes are 1N916 or 1N3064.

Figure 2. Test Circuit and Voltage Waveforms

3V
CL RL = 100 Ω Input
Generator Output 0V
(see Note A) 50 Ω tt(OD) tt(OD)
3V CL = 15 pF
Output 90%
(see Note B)
10%

TEST CIRCUIT VOLTAGE WAVEFORMS

NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr ≤ 5 ns, tf ≤ 5 ns, PRR ≤ 1 MHz, duty cycle = 50%,
ZO = 50 Ω.
B. CL includes probe and stray capacitance.

Figure 3. Test Circuit and Voltage Waveforms

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SLLS098C − MAY 1980 − REVISED FEBRUARY 2004

PARAMETER MEASUREMENT INFORMATION

5V
Output
200 Ω
SW3 SW1
0 V or 3 V

CL = 15 pF See Note C
(see Note B) 1 kΩ
Generator
(see Note A)
50 Ω

SW2

TEST CIRCUIT

Output 3V Output 3V
Enable Input Enable Input
1.5 V 1.5 V
0V 0V
tPHZ tPZL SW1 Closed
VOH
0.5 V SW1 Closed SW2 Open
SW2 Closed 1.5 V
Output Output VOL
≈1.5 V tPZH
tPLZ
≈1.5 V VOH
Output SW1 Closed Output
0.5 V SW2 Closed 1.5 V SW1 Open
VOL SW2 Closed

VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr ≤ 5 ns, tf ≤ 5 ns, PRR ≤ 1 MHz, duty cycle = 50%,
ZO = 50 Ω.
B. CL includes probe and stray capacitance.
C. All diodes are 1N916 or 1N3064.

Figure 4. Driver Test Circuit and Voltage Waveforms

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 PACKAGE OPTION ADDENDUM

www.ti.com 6-Feb-2020

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

MC3487D ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MC3487

& no Sb/Br)
MC3487DE4 ACTIVE SOIC D 16 40 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MC3487
& no Sb/Br)
MC3487DR ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MC3487
& no Sb/Br)
MC3487DRE4 ACTIVE SOIC D 16 2500 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MC3487
& no Sb/Br)
MC3487N ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 MC3487N
& no Sb/Br)
MC3487NE4 ACTIVE PDIP N 16 25 Green (RoHS NIPDAU N / A for Pkg Type 0 to 70 MC3487N
& no Sb/Br)
MC3487NSR ACTIVE SO NS 16 2000 Green (RoHS NIPDAU Level-1-260C-UNLIM 0 to 70 MC3487
& no Sb/Br)

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 6-Feb-2020

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 6-Dec-2019

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
MC3487DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
MC3487DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1
MC3487NSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 6-Dec-2019

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
MC3487DR SOIC D 16 2500 333.2 345.9 28.6
MC3487DR SOIC D 16 2500 367.0 367.0 38.0
MC3487NSR SO NS 16 2000 367.0 367.0 38.0

Pack Materials-Page 2
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