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Harmonic Elimination Pulse Width Modulation of
Modular and Hybrid Multilevel Converter Topologies
by Georgios Konstantinou
A Thesis submitted in fulfillment of the requirements for the degree of
Doctor of Philosophy
School of Electrical Engineering and Telecommunications
The University of New South Wales
©Georgios Konstantinou
May 2012
Sydney, NSW, Australia
Abstract
Recent advances in semiconductor switches, new multilevel converter topologies and advanced
converter modulation techniques have contributed to the expansion of voltage source converters
(VSCs) to higher voltage and power ratings for utility-scale and motor drive applications.
Multilevel VSC topologies extend the advantages of the fully controlled, four-quadrant, two
level converter by improving the quality of the output waveforms and minimizing filtering
requirements. Additionally, the stresses across the switching devices are reduced, converter
losses and electromagnetic interference are decreased and the overall efficiency is improved.
The challenges associated with the multilevel converters are well documented and include:
capacitor voltage deviation and voltage balancing issues, increased complexity in the circuit
configuration, control and regulation of voltages and currents. The main research efforts focus
on further minimizing the losses, increasing the efficiency of the converter topologies and
providing tight regulation of the voltages and currents while delivering a cost-effective solution
for commercial applications.
The thesis deals with selective harmonic elimination pulse width modulation (SHE-PWM)
for three-phase, two-level and multilevel converter topologies. SHE-PWM for the three-phase
two-level converter is initially treated. Different formulations of SHE-PWM based on relaxing the
symmetry requirements, previously imposed, are investigated. New solution sets are calculated
by imposing half-wave symmetry or completely eliminating the symmetry requirements. Based
on multiple harmonic performance factors, an evaluation identifies the solution sets that exhibit
superior harmonic performance. The theoretical analysis and simulations are verified through
experimental work on a laboratory prototype.
Multilevel SHE-PWM (MSHE-PWM) techniques are analyzed for various number of levels in
the output waveforms and harmonics eliminated from the output voltage harmonic spectrum.
The prime challenge of MSHE-PWM is the acquisition of the different solutions while ensuring
their continuity over the modulation index range. The solutions are evaluated for their harmonic
performance. The operation of hybrid multilevel converters, namely the five-level hybrid H-
bridge based converter and the seven-level hybrid cascaded ANPC converter under MSHE-PWM
is also analyzed. In both topologies, the regulation of the voltages in the H-bridge cells of
the converter together with the application and performance of MSHE-PWM are investigated.
Extended simulation and experimental results from both topologies are provided.
MSHE-PWM is further extended to include the voltage levels of the PWM waveform as
variables. The proposed approach offers advantages in terms of the acquired solutions. The
switchings assume constant values over the modulation index range, the voltage levels vary
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linearly with the increase of the modulation index and the formulation of the problem allows
for elimination of additional harmonics from the output voltage harmonic spectrum. The
advantages of the proposed formulations come at the cost of increased complexity in the
regulation of the DC voltages, particularly in closed loop implementations. Simulation and
experimental results based on laboratory setups for five and seven-level waveforms are provided.
The thesis also deals with the modulation of the modular multilevel converter (MMC) and
its operation in utility-scale applications. The MMC is the state-of-the-art multilevel converter
based on the cascaded connection of half-bridge sub-modules (SMs) and can be extended to
provide large number of levels in the output voltage waveform. The circuit configuration and
modular concept make the MMC a particularly attractive multilevel topology for medium and
high-voltage, medium and high-power utility-scale applications.
Two different modulation methods for the MMC are proposed and analyzed. The two meth-
ods, under the same switching frequency for the switches, provide different operating charac-
teristics. MSHE-PWM techniques for the MMC are also proposed. The techniques, requiring
calculation of switchings for large number of levels, are combined with a method to balance
the SM capacitor voltages through sorting of the SM voltage values. The operation of the MMC
under both modulation methods, based on the MSHE-PWM is verified through simulation and
experimental results.
Finally, the thesis discusses the back-to-back configuration of MMC topologies. The convert-
ers are operated with sinusoidal PWM, under both the modulation techniques and the voltage
balancing method presented earlier in the thesis. Based on controllers in the synchronous rotat-
ing reference frame, the system is investigated for its operation under steady state and during
transients in the active and reactive power references of the converters. Extensive simulation
results are provided to illustrate the system behavior.
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Acknowledgements
Firstly, I would like to thank my supervisor Professor Vassilios G. Agelidis for his continuous
guidance, motivation and inspiration during my Ph.D. studies, for sharing his experiences of the
academic and outside world and for the confidence he has shown in me for all these years.
I would like to acknowledge the financial support provided for my studies through the ABB
research scholarship at the University of New South Wales and the ABB research scholarship
and Norman I. postgraduate research award at the University of Sydney.
I would also like to thank my co-supervisor for the last two years in the University of New
South Wales, Dr. Mihai Ciobotaru for his valuable contributions to the project and comments
on the work.
I am grateful to my fellow students at the beginning of my Ph.D. at the University of Sydney, Dr.
Sridhar R. Pulikanti and Dr. Nikolas Flourentzou for the stimulating and productive discussions,
laboratory sessions and the occasional arguments. I would like to extend my gratitude to Dr.
Mohamed Dahidah from the University of Nottingham, Malaysia Campus for the extensive
conversations and pitching of ideas on selective harmonic elimination PWM.
I would like to thank Ms. Rita Wong for her assistance all these years, Dr. Baburaj Karanayil
for his technical support in the laboratory setup, Mr. Iman Sadinezhad, Ms. Wei Zhao and all my
friends in Sydney and in Greece for their encouragement during my studies.
Last, but not least I would like to thank my family for their never-ending support, encourage-
ment and love throughout my studies.
zpg
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Table of Contents
Abstract iv
Acknowledgments vi
List of Tables viii
List of Figures ix
List of Symbols x
List of Abbreviations xii
1 Introduction 1
1.1 Voltage Source Based Power Electronics Conversion . . . . . . . . . . . . . . . . . . 1
1.2 Literature Review - Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.1 Multilevel and Hybrid Converters . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2.2 Selective Harmonic Elimination PWM . . . . . . . . . . . . . . . . . . . . . . 4
1.2.3 Modular Multilevel Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3 Objectives of the Thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.4 Methodology and Tools Used . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.5 Thesis Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.6 List of publications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.6.1 Journal Papers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
1.6.2 International Conference Papers . . . . . . . . . . . . . . . . . . . . . . . . 10
1.6.3 Papers under Revision or Review . . . . . . . . . . . . . . . . . . . . . . . . . 11
1.7 Thesis Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2 Two-level Selective Harmonic Elimination PWM 13

2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2 Problem Formulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.2.1 Quarter-wave Symmetrical SHE-PWM . . . . . . . . . . . . . . . . . . . . . 15
2.2.2 Half-wave Symmetrical SHE-PWM . . . . . . . . . . . . . . . . . . . . . . . 16
2.2.3 Non Symmetrical SHE-PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.2.4 Solution Acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3 Solution Sets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.3.1 Quarter-wave Symmetrical Waveforms . . . . . . . . . . . . . . . . . . . . . 19
2.3.1.1 Elimination of the 5th and 7th harmonic . . . . . . . . . . . . . . 20
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2.3.1.2 Elimination of the 5th, 7th, 11th and 13th harmonic . . . . . . . 20
2.3.1.3 Elimination of the 5th, 7th, 11th, 13th, 17th and 19th harmonic . 20
2.3.2 Half-wave Symmetrical Waveforms . . . . . . . . . . . . . . . . . . . . . . . 20
2.3.2.1 Elimination of the 5th and 7th harmonic . . . . . . . . . . . . . . 22
2.3.2.2 Elimination of the 5th, 7th, 11th and 13th harmonic . . . . . . . 22
2.3.2.3 Elimination of the 5th, 7th, 11th, 13th, 17th and 19th harmonic . 23
2.3.3 Non-Symmetrical Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.4 Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.4.1 Evaluation Factors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.4.2 Evaluation of the Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.4.3 Comparison of solution sets . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.5 Experimental verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
3 Multilevel Selective Harmonic Elimination PWM 43

3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
3.2 Problem Formulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
3.2.1 Five-Level MSHE-PWM Waveforms . . . . . . . . . . . . . . . . . . . . . . . . 44
3.2.2 Seven-Level MSHE-PWM Waveforms . . . . . . . . . . . . . . . . . . . . . . 45
3.2.3 Waveforms with Even Number of Levels . . . . . . . . . . . . . . . . . . . . 46
3.3 Solution Patterns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.3.1 Five-level Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.3.1.1 Solution Trajectories . . . . . . . . . . . . . . . . . . . . . . . . . . 48
3.3.1.2 Harmonic Performance . . . . . . . . . . . . . . . . . . . . . . . . 52
3.3.2 Seven-level MSHE-PWM Waveforms . . . . . . . . . . . . . . . . . . . . . . . 54
3.3.2.1 Solution Trajectories . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.3.2.2 Harmonic Performance . . . . . . . . . . . . . . . . . . . . . . . . 62
3.4 Multilevel SHE-PWM in Hybrid Converters . . . . . . . . . . . . . . . . . . . . . . . . 64
3.4.1 Five-level Hybrid Cascaded Converter . . . . . . . . . . . . . . . . . . . . . . 64
3.4.2 Seven-level ANPC-based Hybrid Cascaded Converter . . . . . . . . . . . . . 67
3.4.2.1 Calculation of floating capacitor voltage ripple . . . . . . . . . . . . 71
3.4.2.2 Effect of hysteresis band on switching frequency . . . . . . . . . . 71
3.4.2.3 Limits of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
3.5 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
3.5.1 Five-level Hybrid Cascaded Converter . . . . . . . . . . . . . . . . . . . . . 75
3.5.2 Seven-level ANPC-based Hybrid Cascaded Converter . . . . . . . . . . . . . 77
3.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
4 MSHE-PWM technique with Variable DC levels 84

4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
4.2 Problem Formulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.2.1 Variable Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
4.2.2 Reduced Variable Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
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4.3 Solution Trajectories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.3.1 Five-level Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.3.2 Seven-level Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
4.3.3 Reduced variable levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.4 Harmonic Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
4.5 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
4.5.1 Five-level waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
4.5.2 Seven-level waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
4.6.1 Five-level waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
4.6.2 Seven-level waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
4.7 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
5 Selective Harmonic Elimination PWM of Modular Multilevel Converters 112

5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
5.2 Converter description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
5.3 Modulation of Modular Multilevel Converters . . . . . . . . . . . . . . . . . . . . . 116
5.3.1 H+1 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
5.3.2 2H+1 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
5.4 Balancing of the MMC sub-module voltages . . . . . . . . . . . . . . . . . . . . . . 123
5.4.1 Balancing of the sub-module voltages based on sorting . . . . . . . . . . . 123
5.4.2 Alternative voltage balancing methods . . . . . . . . . . . . . . . . . . . . . . 124
5.5 Selective Harmonic Elimination of MMC . . . . . . . . . . . . . . . . . . . . . . . . 125
5.6 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.6.1 H+1 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
5.6.2 2H+1 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
5.8 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
6 Modular Multilevel Converters for Back-to-Back systems 139

6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
6.2 VSC-HVDC and back-to-back systems . . . . . . . . . . . . . . . . . . . . . . . . . 140
6.3 Multicarrier PWM of the MMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
6.3.1 H+1 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
6.3.2 2H+1 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
6.3.3 Converter equivalent capacitance . . . . . . . . . . . . . . . . . . . . . . . . . 144
6.4 System Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
6.4.1 System Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
6.4.2 Voltage Balancing Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
6.5 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
6.5.1 H+1 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
6.5.2 2H+1 Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
6.5.3 Comparison of Modulation Methods . . . . . . . . . . . . . . . . . . . . . . 153
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6.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
7 Conclusions 158
7.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
7.2 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
7.3 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Bibliography 162
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List of Tables
Table 2.1 Summary of solution sets for the SHE-PWM cases analyzed . . . . . . . . . 37
Table 2.2 Parameters of the two-level converter experimental setup . . . . . . . . . 38
Table 3.1 Voltage output and switching states of the five-level cascaded hybrid
converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Table 3.2 Switching states of the seven-level hybrid ANPC-based cascaded converter 69
Table 3.3 Effect on FC during different switching states of the seven-level hybrid
ANPC-based cascaded converter . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 3.4 Selection of switching functions for the seven-level hybrid ANPC-based
cascaded converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table 3.5 Simulation and experimental parameters of the five-level hybrid cascaded
converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 3.6 Parameters of the seven-level ANPC-based hybrid cascaded converter
laboratory setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 4.1 Summary of solution sets for the variable MSHE-PWM . . . . . . . . . . . 99
Table 5.1 Output and charging state of a sub-module . . . . . . . . . . . . . . . . . . 114

Table 5.2 Interleaved selection of the number of sub-modules within the phase-leg
for 2H + 1 modulation with even H . . . . . . . . . . . . . . . . . . . . . . 122
Table 5.3 Interleaved selection of the number of sub-modules within the phase-leg
for 2H + 1 modulation with odd H . . . . . . . . . . . . . . . . . . . . . . . 122
Table 5.4 Simulation parameters for the H + 1 modulation . . . . . . . . . . . . . . . 127
Table 5.5 Simulation parameters for the 2H +1 modulation . . . . . . . . . . . . . . 132
Table 5.6 MMC laboratory prototype specifications . . . . . . . . . . . . . . . . . . . 137
Table 6.1 Parameters of the simulated back-to-back system . . . . . . . . . . . . . . . 147
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List of Figures
Figure 2.1 Two-level, three-phase VSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 2.2 Generic SHE-PWM waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 2.3 QWS SHE-PWM waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 2.4 Non-restricted HWS SHE-PWM waveform . . . . . . . . . . . . . . . . . . . 17
Figure 2.5 Restricted HWS SHE-PWM waveform . . . . . . . . . . . . . . . . . . . . . . 17
Figure 2.6 QWS solution sets for controlling the fundamental frequency and elimi-
nating the 5th and 7th harmonic . . . . . . . . . . . . . . . . . . . . . . . . 20
nating the first four odd, non-triplen harmonics . . . . . . . . . . . . . . . 21
nating the first six harmonics odd, non-triplen harmonics . . . . . . . . . . 21
Figure 2.9 Non-restricted HWS solution sets for controlling the fundamental fre-
quency and eliminating the 5th and 7th harmonic . . . . . . . . . . . . . 23
Figure 2.10 Restricted HWS solution sets for controlling the fundamental frequency
and eliminating the 5th and 7th harmonic . . . . . . . . . . . . . . . . . . . 24
quency and eliminating the first four odd, non-triplen harmonics . . . . 26
and eliminating the first four odd, non-triplen harmonics . . . . . . . . . . 27
quency and eliminating the first six odd, non-triplen harmonics . . . . . 29
and eliminating the first six odd, non-triplen harmonics . . . . . . . . . . . 31
Figure 2.15 Non-symmetrical solution sets . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 2.16 Non-restricted HWS formulation eliminating the 5th and 7th harmonic,
Harmonic performance factors . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 2.17 Restricted HWS formulation eliminating the 5th and 7th harmonic, Har-
monic performance factors . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 2.18 QWS formulation eliminating the first four odd, non-triplen harmonics,
Harmonic performance factors . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 2.19 Non-restricted HWS formulation eliminating the first four odd, non-
triplen harmonics, Harmonic performance factors . . . . . . . . . . . . . . 34
Figure 2.20 Restricted HWS formulation eliminating the first four odd, non-triplen
harmonics, Harmonic performance factors . . . . . . . . . . . . . . . . . . 34
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Figure 2.21 Non-restricted HWS formulation eliminating the 5th and 7th harmonic,
Zero sequence harmonics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 2.22 Restricted HWS formulation eliminating the 5th and 7th harmonic, Zero
sequence harmonics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 2.23 QWS formulation eliminating the first four odd, non-triplen, Zero se-
quence harmonics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 2.24 Non-restricted HWS formulation eliminating the first four odd, non-
triplen, Zero sequence harmonics . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 2.25 Restricted HWS formulation eliminating the first four odd, non-triplen,
Zero sequence harmonics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 2.26 Schematic of the two-level VSC experimental setup . . . . . . . . . . . . . 38
Figure 2.27 Implementation of QWS SHE-PWM . . . . . . . . . . . . . . . . . . . . . . 39
Figure 2.28 Implementation of HWS and non-symmetrical SHE-PWM . . . . . . . . 40
Figure 2.29 Experimental results: Two harmonics eliminated, line-to-line voltages
and corresponding harmonic spectrum . . . . . . . . . . . . . . . . . . . . 40
Figure 2.30 Experimental results: Four harmonics eliminated, line-to-line voltages
and corresponding harmonic spectrum . . . . . . . . . . . . . . . . . . . . 40
Figure 2.31 Experimental results: Six harmonics eliminated, line-to-line voltages and
corresponding harmonic spectrum . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 2.32 Experimental results: Non-symmetrical formulations . . . . . . . . . . . . 41
Figure 3.1 Generalized five-level PWM waveforms . . . . . . . . . . . . . . . . . . . . . 44

Figure 3.2 Generalized seven-level PWM waveforms . . . . . . . . . . . . . . . . . . 46
Figure 3.3 Five-level MSHE-PWM solutions, 5/2 switching distribution . . . . . . . 48
Figure 3.11 Five-level MSHE-PWM solutions, 7/5 switching distribution . . . . . . . . 51
Figure 3.15 Variation of non-triplen harmonics vs. MI for the 5/2 switching distribution 52
Figure 3.18 Variation of triplen harmonics vs. MI for the 5/2 switching distribution . 53
Figure 3.21 Seven-level MSHE-PWM solutions, fundamental switching frequency . 55
Figure 3.22 Seven-level MSHE-PWM solutions, four switchings per quarter-period . 55
xiii
Figure 3.23 Seven-level MSHE-PWM solutions, 5/5/1 switching distribution . . . . . 56
Figure 3.26 Seven-level MSHE-PWM solutions, 3/3/5 switching distribution . . . . . . 57
Figure 3.32 Seven-level MSHE-PWM solutions with seventeen switchings per quarter-
period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 3.33 Seven-level MSHE-PWM solutions with eighteen switchings per quarter-
period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 3.34 Variation of triplen harmonics vs. MI for three switchings per quarter-period 62
Figure 3.35 Variation of non-triplen harmonics vs. MI for three switchings per quarter-
period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 3.36 Variation of triplen harmonics vs. MI for four switchings per quarter-period 63
Figure 3.37 Variation of non-triplen harmonics vs. MI for three switchings per quarter-
period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Figure 3.38 Circuit configuration of the three-phase, five-level hybrid cascaded inverter. 65
Figure 3.39 Possible combinations of individual output voltages resulting in the five-
level waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 3.40 Charging and discharging periods for the five-level waveform . . . . . . . 67
Figure 3.41 Circuit configuration of the hybrid seven-level ANPC-based multilevel
converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 3.42 Switching patterns for voltage regulation of the H-bridge capacitor . . . 70
Figure 3.43 Effect of band selection in the switching frequency (h 1 : tight band, h 2 :
intermediate band, h 3 : loose band) . . . . . . . . . . . . . . . . . . . . . . 72
Figure 3.44 Normalized switching instances vs. hysteresis band selection for various
operating points of the converter . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 3.45 Limits of floating capacitor voltage regulation with three switchings per
quarter-period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 3.46 Limits of floating capacitor voltage regulation with four switchings per
quarter-period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 3.47 Laboratory setup of the single-phase five-level hybrid cascaded inverter 75
Figure 3.48 Experimental results: Five-level hybrid cascaded converter, load A, M =
0.95, switching distribution 7/4 . . . . . . . . . . . . . . . . . . . . . . . . . 76
Figure 3.49 Experimental results: Five-level hybrid cascaded converter, load B, M =
1.15, switching distribution 5/7 . . . . . . . . . . . . . . . . . . . . . . . . . 76
Figure 3.50 Experimental results: Five-level hybrid cascaded converter, load C, M =
1.35, switching distribution 3/8 . . . . . . . . . . . . . . . . . . . . . . . . . . 77
xiv
Figure 3.51 Experimental results: seven-level ANPC-based hybrid cascaded converter,
N=3, M =1.85 and load A (cont.) . . . . . . . . . . . . . . . . . . . . . . . . 78
N=3, M =1.85 and load A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
N=4, M =1.94 and load A (cont.) . . . . . . . . . . . . . . . . . . . . . . . . 79
N=4, M =1.94 and load A (cont.) . . . . . . . . . . . . . . . . . . . . . . . . 80
N=11, M =2.24 and load C (cont.) . . . . . . . . . . . . . . . . . . . . . . . . 80
N=11, M =2.24 and load C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
N=12, M =2.1 and load C (cont.) . . . . . . . . . . . . . . . . . . . . . . . . . 81
N=12, M =2.1 and load C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Figure 4.1 Three-phase CHB multilevel converter with variable DC voltages . . . . 85

Figure 4.2 Quarter-period of a generalized MSHE-PWM waveform with variable
voltage levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 4.3 Five-level variable MSHE-PWM, 3/3 switching distribution, Set 1 . . . . 88
Figure 4.13 Five-level variable MSHE-PWM, 5/6 switching distribution, Set 6 . . . . . 91
Figure 4.22 Seven-level variable MSHE-PWM, 3/5/3 switching distribution, Set 1 . . . 94
xv
Figure 4.26 Seven-level variable MSHE-PWM, 5/3/3 switching distribution, Set 2 . . 95
Figure 4.33 Seven-level variable MSHE-PWM with two variable DC levels, 1/1/9 switch-
ing distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
ing distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
ing distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Figure 4.36 Seven-level variable MSHE-PWM with one variable DC level, 1/1/9 switch-
ing distribution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Figure 4.37 %THD versus MI, 1/1/9 switching distribution . . . . . . . . . . . . . . . 99
Figure 4.38 %HDF versus MI, 1/1/9 switching distribution . . . . . . . . . . . . . . . 100
Figure 4.39 Simulation results: Five-level variable MSHE-PWM, six switchings per
quarter-period, M = 0.5, 3/3 switching distribution . . . . . . . . . . . . . . 101
Figure 4.40 Simulation results: Five-level variable MSHE-PWM, eight switchings per
quarter-period, M = 1.36, 3/5 switching distribution . . . . . . . . . . . . 102
Figure 4.41 Simulation results: seven-level waveform, eleven switchings per quarter-
period, M = 1.28, 1/1/9 switching distribution . . . . . . . . . . . . . . . . . 104
Figure 4.42 Simulation results: seven-level variable MSHE-PWM, eleven switchings
per quarter-period, M = 2.27, 1/1/9 switching distribution, one level
variable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Figure 4.43 Simulation results: seven-level variable MSHE-PWM, eleven switchings
per quarter-period, M = 1.96, 1/1/9 switching distribution, two levels
variable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Figure 4.44 Simulation results: seven-level waveform, eleven switchings per quarter-
period, M = 2.3, 3/3/5 switching distribution, two levels variable . . . . . . 107
Figure 4.45 Experimental results: Five-level variable MSHE-PWM, phase-voltage for 6
switchings per period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Figure 4.46 Experimental results: Five-level variable MSHE-PWM, phase-voltage for 8
switchings per period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Figure 4.47 Experimental results: Seven-level variable MSHE-PWM, all voltage levels
variable, 1/1/9 switching distribution . . . . . . . . . . . . . . . . . . . . . 109
Figure 4.48 Experimental results: Seven-level variable MSHE-PWM, two voltage levels
Figure 4.49 Experimental results: Seven-level variable MSHE-PWM, one voltage level
xvi
Figure 4.50 Experimental results: Seven-level variable MSHE-PWM, all voltage levels
Figure 5.1 Half-bridge sub-module, the building block of the modular multilevel
converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Figure 5.2 Configuration of a MMC phase-leg . . . . . . . . . . . . . . . . . . . . . . 113
Figure 5.3 Three phase configuration of the MMC . . . . . . . . . . . . . . . . . . . . . 114
Figure 5.4 The different states of an MMC for acquiring the six different levels of the
waveform under H + 1 modulation, state 1 (bottom level) to state 6 (top
level) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Figure 5.5 Possible states for acquiring the zero voltage level . . . . . . . . . . . . . . 119
Figure 5.6 Possible states for acquiring the additional positive levels under 2H + 1
modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Figure 5.7 Possible states for acquiring the additional negative levels under 2H + 1
Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Figure 5.8 Selection of sub-modules based on voltage sorting . . . . . . . . . . . . . . 124
Figure 5.9 Implementation of H + 1 modulation on SHE-PWM . . . . . . . . . . . . 126
Figure 5.10 Implementation of 2H + 1 modulation on SHE-PWM . . . . . . . . . . . . 126
Figure 5.11 Simulation results: Seven-level output waveforms for M = 2.1 (cont.) . . 128
Figure 5.12 Simulation results: Seven-level output waveforms for M = 2.1 . . . . . . 128
Figure 5.13 Simulation results: Three-phase load currents for M = 2.1 . . . . . . . . . 128
Figure 5.14 Simulation results: Variation of voltage for the sub-module capacitors . 129
Figure 5.15 Simulation results: Upper and lower arm currents for H + 1 modulation
and M = 2.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Figure 5.16 Simulation results: Sum of sub-module voltages to the phase-leg for M = 2.1129
Figure 5.17 Simulation results: Seven-level output waveforms for M = 2.25 (cont.) . 130
Figure 5.18 Simulation results: Seven-level output waveforms for M = 2.25 . . . . . . 130
and M = 2.25 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
Figure 5.21 Simulation results: Variation of voltage for the sub-module capacitors . . 131
Figure 5.22 Simulation results: Eleven-level output waveforms for M = 3.3 (cont.) . . 132
Figure 5.23 Simulation results: Eleven-level output waveforms for M = 3.3 . . . . . . 133
and M = 3.3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Figure 5.26 Simulation results: Sum of sub-module voltages to the phase-leg for M = 3.3134
Figure 5.27 Simulation results: Variation of voltage for the sub-module capacitors . . 134
Figure 5.28 Simulation results: Eleven-level output waveforms for M = 3.6 . . . . . . 135
Figure 5.29 Simulation results: Eleven-level output waveforms for M = 3.6, (a) Line-
to-line voltage, (b) Corresponding harmonic spectrum . . . . . . . . . . . 135
xvii
and M = 3.6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Figure 5.32 Simulation results: Variation of voltage for the sub-module capacitors . 136
Figure 5.33 Laboratory prototype modular multilevel converter phase-leg . . . . . . 136
Figure 5.34 Experimental results: Eleven-level SHE-PWM phase-voltage, load current
and corresponding voltage spectrum . . . . . . . . . . . . . . . . . . . . . . 137
Figure 5.35 Experimental results: Current through the upper arm (i upper ) of the MMC
under 2H + 1 modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Figure 6.1 Voltage source converters in high power applications . . . . . . . . . . . 140

Figure 6.2 Target waveform generation in the case of H+1 modulation for a converter
with 6 SMs per arm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Figure 6.3 Target waveform generation in the case of 2N+1 modulation for a con-
verter with 6 SMs per arm (12 carriers) . . . . . . . . . . . . . . . . . . . . . 144
Figure 6.4 Maximum capacitance variation vs. the number of SMs . . . . . . . . . . 146
Figure 6.5 Configuration of a MMC based back-to-back system . . . . . . . . . . . . . 147
Figure 6.6 Controller implementation: d q transformations . . . . . . . . . . . . . . 148
Figure 6.7 Controller implementation: Control structure . . . . . . . . . . . . . . . . 149
Figure 6.8 Power exchange scenario for simulation results . . . . . . . . . . . . . . . 149
Figure 6.9 Simulation results: Line-to-line voltage under H +1 modulation . . . . . 150
Figure 6.10 Simulation results: Output currents . . . . . . . . . . . . . . . . . . . . . . . 151
Figure 6.11 Simulation results: d and q currents . . . . . . . . . . . . . . . . . . . . . . . 151
Figure 6.12 Simulation results: d and q current of converter 1 during power reversal . 151
Figure 6.13 Simulation results: SM capacitor voltage variation . . . . . . . . . . . . . 152
Figure 6.14 Simulation results: Configuration of a MMC based back-to-back system 152
Figure 6.15 Simulation results: Sum of SM voltages connected to the phase-leg for
H +1 modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Figure 6.16 Simulation results: Line-to-line voltage under 2H +1 modulation . . . . . 153
Figure 6.17 Simulation results: Output currents during active power reversal . . . . . . 154
Figure 6.18 Simulation results: d and q current components . . . . . . . . . . . . . . . 154
Figure 6.19 Simulation results: SM capacitor voltage variation . . . . . . . . . . . . . 155
Figure 6.20 Simulation results: DC-link voltage under 2H +1 modulation . . . . . . . 155
Figure 6.21 Simulation results: Sum of SM voltages connected to the phase-leg for
2H +1 modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
xviii
List of symbols
Symbol Definition
An : Fourier sine term coefficient
Bn : Fourier cosine term coefficient
Cf : Floating capacitor
C sm : SM capacitance
C (...) : Cost function
f : Frequency
H : Number of SMs per arm of the MMC
Hupper : Number of SMs connected to the upper arm of the MMC
Hl ower : Number of SMs connected to the lower arm of the MMC
H t ot al : Number of SMs connected to a phase-leg of the MMC
i ar m : Current through the arms of the MMC
i ci r c : Circulating current
I char : Component of the load current charging C f
I d i schar : Component of the load current discharging C f
i l ower : Current through the lower arm of the MMC
i out : Load current
i upper : Current through the upper arm of the MMC
L ar m : Arm inductance of the MMC
L conv : Output converter inductance
Lg : Grid inductance in grid model
M : Modulation Index
mf : Frequency modulation ratio
N : Number of switchings per quarter period of a PWM waveform
n : Harmonic order
N1 : Number of switchings between zero and first level
N2 : Number of switchings between first and second level
N3 : Number of switchings between second and third level
NK : Number of switchings between K -1 and K level
P L H −1 : Number of phase-legs with H -1 SMs
P LH : Number of phase-legs with H SMs
P L H +1 : Number of phase-legs with H +1 SMs
R ar m : Arm resistance of the MMC
R conv : Output converter resistance
Rg : Grid resistance in grid model
xix
S sm : Switching state of an MMC SM
T : Period of a periodical signal / waveform
t : Time
V1 : Normalized amplitude of the voltage fundamental frequency component
Vn : Normalized amplitude of the n-th voltage harmonic component
VDC 1 : DC voltage of the first level in variable DC applications
VDC 2 : DC voltage of the second level in variable DC applications
VDC K : DC voltage of the K -th level in variable DC applications
Vd c : DC-link voltage
Vc f : Floating capacitor voltage
Vsm : Voltage at the output of the SM
Vc : SM capacitor voltage
Var m : Voltage of SMs connected to an arm of the MMC
Vupper : Voltage of SMs connected to the upper arm of the MMC
Vl ower : Voltage of SMs connected to the lower arm of the MMC
Vmi d : Voltage at the mid-point of the MMC phase-leg
Vci r c : Voltage generating the circulating current
Vg : Grid voltage
α : Switching (angle)
αi nc : initialization angle increment in SHE-PWM angle calculation algorithms
θ : Phase angle
ω : Angular frequency
Sub/Superscript Definition
∗
... : Reference value
. . .α : Alpha component in the stationary frame
. . .β : Beta component in the stationary frame
. . .d : Direct component in the synchronous frame
. . .q : Quadrature component in the synchronous frame
. . .p : Positive sequence component
. . .n : Negative sequence component
...f ilt : Filtered value
xx
List of Abbreviations
Abbreviation Definition
AC : Alternating Current
ANPC : Active Neutral Point Clamped
APOD : Alternating Phase Opposition Disposition
CHB : Cascaded H-Bridge
CSC : Current Source Converter
DC : Direct Current
DPF : Displacement Power Factor
EMC : Electromagnetic Compatibility
EMI : Electromagnetic Interference
FACTS : Flexible Alternating Current Transmission System
FC : Flying Capacitor
GA : Genetic Algorithm
HDF : Harmonic Distortion Factor
HVDC : High Voltage Direct Current
HW : Half Wave
HWS : Half-Wave Symmetry
IGBT : Insulated Gate Bipolar Transistor
IGCT : Integrated Gate Commutated Thyristor
LSC : Level Shifted Carriers
MI : Modulation Index
MMC : Modular Multilevel Converter
MSHE : Multilevel Selective Harmonic Elimination
NPC : Neutral Point Clamped
PD : Phase Disposition
PI : Proportional Integral
PLL : Phase Locked Loop
POD : Phase Opposition Disposition
PSC : Phase Shifted Carriers
PV : Photovoltaic
PWM : Pulse Width Modulation
QW : Quarter Wave
QWS : Quarter-Wave Symmetry
SF : Switching Function
SHE : Selective Harmonic Elimination
xxi
SHM : Selective Harmonic Mitigation
SM : Sub-module
SPWM : Sinusoidal Pulse Width Modulation
STATCOM : Static Compensator
THD : Total Harmonic Distortion
THI : Triplen Harmonic Injection
VSC : Voltage Source Converter
xxii
Chapter 1
Introduction
1.1 Voltage Source Based Power Electronics Conversion
The role of power electronics converters in modern power systems is becoming even more
prominent as a result of market deregulation, integration of renewable energy systems and the
need for bulk power transmission over increasing distances. The application of voltage sourced
converters (VSCs) in commercial systems has seen a substantial growth over the last fifteen years
with numerous VSC-based high-voltage direct current (HVDC) and flexible AC transmission
system (FACTS) projects operating or being under construction worldwide [1].
The main driving force behind the development of VSC-based systems is the continuous
advances in high-voltage, high-power semiconductor devices such as the insulated gate bipo-
lar transistor (IGBT) and the integrated gate commutated thyristor (IGCT). The concurrent,
exponential growth in digital signal processing and computational power has supported the
development of new converter topologies for medium and high-voltage systems and the appli-
cation of advanced converter modulation and control techniques [1]–[5].
As the voltage and power level of the converters increase, VSC-based multilevel converter
topologies provide significant advantages over the two-level VSC topology. These include
reduced semiconductor stresses, improved output waveforms that minimize the filtering re-
quirements, lower switching losses and enhanced electromagnetic compatibility (EMC).
The main multilevel converter topologies are [1]–[6] :
• The neutral-point clamped (NPC) converter [7]–[12]
• The flying capacitor (FC) converter [19]–[24] and
• The cascaded H-bridge (CHB) converter.
Each of the topologies provides specific advantages and posses a number of challenges
in their operation. These advantages and challenges are well documented in the technical
literature and will be discussed in the following Section. Combination of the main multilevel
topologies as building blocks has given rise to a new, large family of power converters, called
hybrid multilevel converters [25]–[56]. The primary aim of hybrid converters is to enhance the
advantages each main multilevel converter topology offers, while minimizing the drawbacks of
the implementation.
1
2
VSC-based two-level and multilevel converters can operate at switching frequencies higher
than the fundamental frequency of the system, minimizing harmonic distortion in the voltage
and current waveforms. A suitable pulse-width modulation (PWM) pattern, which reduces the
harmonic distortion with the minimum switching frequency attainable without unacceptably
increasing the switching losses of the topology, is necessary for the operation of VSC-based
multilevel converters. A number of PWM methods have been proposed and analyzed including:
• Carrier-based sinusoidal PWM [57], [58] and its extension through triplen harmonic
injection,
• Space Vector Modulation (SVM) [57]–[60], and
• Selective Harmonic Elimination (SHE) and similar methods based on optimization of

switching patterns [61]–[104]
The extension of the main topologies to large number of levels becomes rather complicating
and challenging. A new family of multilevel converters, the modular multilevel converter
(MMC) family, was recently introduced for medium and high-voltage, medium and high-power
applications [113]–[116]. The topology features modular design with a simple sub-module
(SM) configuration as the main building block of the converter. The converter topology can
be extended to large number of levels depending on the voltage and power requirements of a
specific application.
The minimization of switching frequency and the associated switching losses and the devel-
opment of efficient and cost-effective solutions with potential for commercialization remains
a significant challenge not only for the MMC but for the whole range of multilevel converter
topologies. The thesis treats the SHE-PWM for modular and hybrid multilevel converters.
1.2 Literature Review - Background
1.2.1 Multilevel and Hybrid Converters
Multilevel converters offer a number of advantages when compared to the typical two-level VSC
topology. The stepped switched approximation of the sinusoidal waveform and the increased
number of levels reduce the harmonic distortion of the output waveforms and minimize the
filtering requirements in the output. The increased number of levels also reduce the dV /d t
across the switches, reducing the stress imposed on them. Additionally, the requirement for
series connection of semiconductor devices is minimized or can be eliminated depending on the
voltage and power rating the converter is designed for. The reduced requirement simplifies the
voltage equalization across the switches and resolves issues with synchronization of the gating
signals across multiple series connected switches. The overall efficiency of the converter is
improved, the reduced switching frequency of the individual switches also reduces the switching
losses and lowers the electro-magnetic interference (EMI) of the topology [2]–[5].
3
A number of topologies have been proposed, including the NPC converter and multilevel
converter topologies derived from the diode clamping concept [7]-[12]. The three-level NPC
converter was and still remains the most widely applied topology in industrial applications
with power ratings up to 40MVA [5]. It is also the converter configuration behind the second
generation HVDC projects [1], [6]. The NPC converter can be extended to provide larger number
of levels in the output. However, the increase in power losses (mainly those associated with
conduction and reverse recovery of the clamping diodes) and the unequal ratings in the switches
of the converter makes the NPC a less attractive converter topology as the number of levels
increase.
An issue associated with the operation of the three level NPC converter is the unequal
distribution of losses across the semiconductors. This results in unequal thermal distribution
and limits the power ratings that can be achieved. A solution to the unequal loss distribution
is provided with the introduction of the active NPC (ANPC) converter topology [13]–[16], [45].
In the ANPC converter, the clamping diodes to the neutral point of the topology are replaced
with active switches. This modification provides additional redundancies in the acquisition of
the zero voltage level and the opportunity to equalize the losses among the switching devices
allowing for higher ratings with the same switches.
The capacitor clamped converter or flying capacitor (FC) converter [19] features a clamping
(flying) capacitor in order to equalize the voltage between the semiconductors and provide the
additional levels in the voltage waveform. A requirement for the FC converter topology is the
regulation of the voltage across the FC to the reference value in order to provide equal voltage
stress in the switches [20]–[24]. The capacitor voltage balancing becomes more challenging as
the number of levels in the output of the converter and the number of FCs used in the converter
increase. Precharging the capacitors to the required level posses an additional challenge in
the implementation of the FC topology. The converter has been widely researched, however,
commercial uptake and industrial applications utilizing the FC topology remain limited [5].
The cascaded H-bridge converter (CHB) has been widely used in medium and high-power
applications. The modular characteristics make its expansion to high number of levels easier,
compared with the NPC and the FC topology. The main challenge associated with the operation
of the CHB is the requirement for individual DC sources resulting in a complicated, heavier and
bulkier transformer or front-end structure. However, in applications where multiple DC-links
can be configured, such as the grid connection of large scale PV farms, the issue of the input
transformer can be avoided.
Hybrid multilevel converters are formed as combination of the main multilevel converter
topologies presented earlier. A particular category of the hybrid configurations features the
cascaded interconnection of H-bridge cells that only utilize capacitors as the voltage source.
These configurations provide increased number of levels in the output waveform of the topology
improving its harmonic performance but do not have an effect on the active power rating of
the system. Examples of H-bridge based hybrid multilevel converters are the five-level hybrid
cascaded converter [28]–[30] featuring a three-phase, two-level inverter as the building block
and the seven-level NPC-based hybrid converter (H-NPC) converter [25] with the three-level
4
NPC as the main topology.
The model predictive control (MPC) of the H-NPC is proposed in [25] and a carrier-based
PWM control has been implemented ([31], [32]) to control the voltage across the H-bridge capac-
itor of the H-NPC converter topology. The cascaded connection of the three-level NPC converter
and H-bridge cell can be utilized for current waveform conditioning [33], [34]. Furthermore, the
introduction of the ANPC converter provides redundant states for the regulation of the neutral
point voltage [35]. One important advantage of these topologies is that they only utilize one
DC-source in the circuit configuration.
Other arrangements of hybrid multilevel converters include the four-level ANPC converter
with a stacked multicell (SMC) converter [36], the hybrid H-bridge converter [37]–[42] the three-
level ANPC converter with a two-level cell, called the five-level ANPC converter [43], [44]–[46].
The latter has been recently applied in medium-voltage, medium-power motor drives and its
expansion to higher number of levels is investigated in [48]–[50]. A cross connected stage that
provides additional levels from a five-level ANPC has been also developed [47]. A hybrid topology
with the cascaded connection of a five-level ANPC and an H-bridge cell has been proposed [55]
for the grid side converter in large wind turbines based on phase-shifted carriers (PSC) PWM
and a hybrid multilevel converter based on the FC topology and the H-bridge cell [56].
1.2.2 Selective Harmonic Elimination PWM
SHE-PWM offers a tight control of the voltage harmonic spectrum of a pulse-width modulated
converter, eliminating low order harmonics while maintaining the number of necessary switch-
ings (also called switching angles or angles) per period to a minimum. The reduced number
of switching instants in the period of the waveform leads to a reduction in the switching losses
in high-power and high-voltage systems. SHE-PWM is beneficial for and typically employed in
utility-grade, high-power, low switching frequency, grid connected applications, such as FACTS,
HVDC power transmission systems and high-power motor drives [61]–[106].
SHE-PWM techniques are based on the Fourier decomposition of the output voltage wave-
form of a PWM converter and has been the focus in a number of papers in the technical literature
for two- [61]–[80], three- and multilevel waveforms [82]–[108]. The PWM problem is initially
transformed to a number of non-linear equations with trigonometrical terms. The trigonomet-
rical terms in the equations results in transcendental systems that need to be solved and that
exhibit multiple solutions. The number of solutions available to a formulation increases as the
number of harmonics to be eliminated from the output spectrum increases. The solutions to
the derived system of equations are then sought.
In order to acquire the SHE-PWM solutions, various algorithms and approaches for solving
the system of equations have been proposed. The two-level waveform, with respect to harmonic
elimination and voltage control techniques, is initially analyzed in [61] and [62]. The work
in [61] and [62] sets the foundations of SHE-PWM techniques. Ref. [63] presents a detailed
categorization and analysis of the sets of solutions together with a critical evaluation of the results
for both single- and three-phase converter topologies. In [64], a method to solve non-linear
5
equations for SHE-PWM waveforms using predicted initial values is discussed. However, the
prediction of initial values covers only a small number of the multiple solutions of the problem.
A systematic method for finding all SHE-PWM patterns based on a sequential homotopy-based
computation is presented in [65]. The presented method is computationally long and the
acquisition of solutions for a specific number of switchings requires the evaluation of a large
number of previous solutions. The paper also presents an estimation of solutions to the problem
but the predicted number of multiple solutions given has not been fully verified by future work.
A harmonic elimination method based on the replacement of the Fourier series with an
orthonormal set based on Walsh functions is discussed in [66] and [67]. The method is derived
from the similarities that are present between the two-level switching waveform and the Walsh
orthogonal functions. In [68], the theory of resultants is used as a method for solving the SHE-
PWM equations. The trigonometrical equations are initially transformed to a set of polynomial
equations. The polynomial equations are then solved in order to acquire the solutions to the
initial SHE-PWM problem. This approach is capable of calculating the multiple solutions to the
problem when the number of levels or switchings is rather small. As the number of the consid-
ered switchings or levels in the waveform increases, the resulting polynomials become rather
complex and of high order making the acquisition of solutions a lengthy and computationally
intensive process.
A method to acquire the multiple solutions of the problem using a minimization technique
is proposed in [69] and extended in [70]. Solutions for an operating point are found through a
minimization process with biased initial values selection. A minimization method based on
the Nelder-Mead algorithm calculates the solution for the initial operating point. The solution
trajectories for the modulation index (MI) range are derived via an iterative Newton-Rapshon
algorithm. Other methods for acquiring the solutions include linear programming optimization
[71], simplex homotopic fixed-point algorithm [72], genetic algorithms (GA) [73] and modulation
based SHE [74].
All previous work reviewed in this Section considers a quarter-wave (QW) symmetry (QWS)
of the waveform in the problem formulation. The even harmonics and the DC component of
the output voltage harmonic spectrum are eliminated by the symmetrical definition and the
coefficients of the cosine terms of the Fourier series are also equal to zero. This greatly simplifies
the problem formulation since the number of equations in the system is reduced and solutions
can be acquired for low number of switchings with low computational effort.
However, the QWS requirement is only imposed in order to simplify the problem formulation.
The imposed restrictions affect the number of solutions acquired as they limit the available
solution space and the harmonic phasing of the fundamental component to either zero or
π. With the increase in the computational power available, even complex calculations can be
performed in relatively small time and the previously applied symmetry restrictions can be lifted.
Relaxing the symmetry of the problem formulation is performed in [75] and [76]. The authors
propose a half-wave symmetrical (HWS) and a non-symmetrical problem formulation, however,
the different formulations or the multiple switching solution sets, a fundamental property of
the problem, are not provided. Furthermore, the number of switchings in the analyzed cases
6
are not optimal as the elimination of triplen harmonics does not improve the placement of the
first harmonic in the spectrum. A detailed analysis of the HWS SHE-PWM is given in [77] and a
comparative evaluation of QWS and non-symmetrical two-level SHE-PWM is presented in [78]
and [79].
The concept of SHE-PWM has also been extended to three-level and multilevel converters
[81]–[104]. Three-level SHE-PWM can be considered as a separate problem to the rest of multi-
level topologies since the waveform has a unique description and can be analyzed with a single
system of equations. The form of the equations only depends on the number of harmonics that
need to be eliminated and continuous solutions for the whole range of equations can be found
[81].
When the number of levels in the waveform increases, the formulation of the problem
becomes more complex. One approach to the problem is to consider a stepped approximation
with only one switching per level of the waveform [82]–[87]. In this case, a unique formulation
of the system of equations exists and solutions tend to be continuous over the MI range. The
main issue with such an approach is that most multilevel converter topologies (Section 1.2.1),
provide elimination of a small number of harmonics (One low order harmonic in a five-level
waveform, two harmonics in a seven-level waveform etc.). Although the stepped approximation
method is analyzed in detail in the available literature, the application of such an approach is
rather limited and the harmonic quality of the output waveform does not meet the grid codes
and harmonic current requirements [176].
In order to eliminate more harmonics from the harmonic spectrum and offer multilevel
waveforms with better harmonic performance without a large increase in the switching fre-
quency, additional switchings between the levels of the waveform can be introduced (Multilevel
SHE-PWM). The problem is reformulated and new solutions should be calculated. The five-level
waveform is analyzed in [88]–[89] and a generalization of the MSHE-PWM is presented in [90].
Solutions for seven-level waveforms are presented in [91] and a detailed analysis of the seven-
level waveform, multiple solutions to the harmonic elimination problem and an evaluation of
the calculated solutions is given in [92].
Various algorithms and methods have been reported in the literature for acquiring the
solutions to the MSHE-PWM problem. The majority of them are similar to the approaches
for the two-level waveform and include minimization and optimization algorithms [88]–[92].
Genetic algorithms (GAs) [93]–[95] provide a viable alternative in a problem that has numerous
local minima that do not represent solutions to the SHE-PWM problem. The theory of resultants
is also applied in multilevel waveforms both for the cases of equal and non-equal DC-sources
[83]–[86], though the application of the method is limited to fundamental switching frequency
patterns. A MSHE-PWM approach based on MPC is presented in [96]. Based on the model
of the system, the harmonics are estimated through discrete Fourier transformations (one for
each harmonic) and a cost function penalizing the individual harmonics and the switching
frequency is constructed. A drawback of the approach is that it requires monitoring of both odd
and even harmonics as well as the DC component in order to provide the required waveform,
complicating the implementation of the system.
7
SHE-PWM for multilevel converters with unequal DC-levels [97] and relaxed symmetry
requirements [98]–[104] are also considered. An alternative approach, named selective harmonic
mitigation (SHM) [105]–[106] formulates the problem so that the harmonic spectrum of the
PWM waveform complies with the grid code limits rather than providing complete elimination
of the corresponding harmonics. A possible advantage of such a method is that a higher number
of harmonics can be regulated compared to the number of switching instants in the output
waveform.
1.2.3 Modular Multilevel Converter
The MMC is the state-of-the-art VSC multilevel converter, based on the cascaded interconnec-
tion of half-bridge switching sub-modules (cells, SMs). The analysis and operation of the MMC
has been the interest of a number of research papers published over the last decade [111]–[154].
Although the concept of the MMC existed from the mid-90s, the first application and high-power
experimental prototype is presented in [111]–[115]. Based on the concept of cascading identical
SMs to configure a phase of the converter, a classification of modular cascaded converters is
presented in [116], including topologies such as the MMC and the CHB converter.
An important aspect in the operation of the converter is the modulation of the phase-legs
and the selection of the SMs that would be connected or bypassed from each phase-leg of
the converter while maintaining the voltages in the SM capacitors. Modulation methods for
the topology have been discussed in a number of papers in the technical literature. These
include modulation methods based on multilevel SPWM [117]–[120], such as PSC or level-
shifted carriers (LSC) techniques. A sampling based modulation method is presented in [121],
where the switching of the MMC is determined through the average of the PWM pattern over
a switching period. The direct modulation of the MMC [122]–[123] calculates the number of
inserted or bypassed SMs as the floor value between the reference sinusoidal signal and the
number of SMs in the phase-leg. Operation of the converter under optimized patterns has also
been a subject of research, with [124] presenting the MMC converter under MSHE-PWM and
[125] with a fundamental frequency switching pattern.
Ref. [122]–[129] analyzes the control and dynamics of the MMC topology. More specifically
the internal dynamics of the MMC under various modulation and control approaches are
presented in [122] and [126] investigates the interactions of external controllers with the internal
regulation, dynamics and voltage balancing requirements of the MMC topology. An integrated
current and sub-module voltage control is presented in [127] and various control strategies for
the arms of the converter are presented in [128].
As the converter is suited and so far employed in utility scale applications, averaged models
of the MMC operation are required for simulation of large systems where the switching behavior
can be omitted. A model of the MMC for simulations with PSCAD/ EMTDC [177] is presented in
[130] while additional averaged models of the topology are analyzed in [131]–[133].
The converter has been studied for a number of applications such as VSC-based HVDC trans-
mission and back-to-back systems [120], [135], high-voltage super-grids [136], [137] providing
8
the possibility of multi-terminal HVDC with the MMC as the main converter in the configuration.
The classification of the modular topologies presented in [116], does not rate the MMC as a
topology that can be widely used in motor drive applications. Yet, applications of the MMC as a
VSC in motor drives and different methods to overcome the operational behavior of the MMC
under very low fundamental frequencies have been presented [126], [138]–[140].
Other applications for the MMC topology include frequency converters [141], MMCs for
interconnection of grids based on the concept of the medium-voltage transformer [142] and
indirect AC/AC conversion applications [143]. In [144], the application of the MMC in solar
PV systems is investigated. However, with the PV as the DC-link of the MMC, the three-level
topology considered has subpar performance to the H-bridge or NPC topology requiring double
the components and more complicated control without offering any clear advantage.
Converter and SM losses estimation are discussed in [145]–[146] with [145] presenting a loss
calculation based on the switching semiconductor characteristics and [146] evaluating the losses
of different configurations that can be utilized as SMs in the MMC topology. The effect of digital
controllers and the associated sampling frequency in the operation of the MMC is analyzed
in [147]. A decrease in the sampling frequency of the digital controllers affects the converter
operation and output waveforms. Similarly the effect of the dead-time in the SMs of the MMC is
considered in [148].
Other work focuses on regulation and control of the currents through the arm of the converter
for half- and full bridge sub-modules [149] or the regulation of the arm currents in order to
extend the operating range of the MMC considering the power factor of the connected load [150]
by means of controlling the second harmonic in the arm current. A DC-link ripple minimization
method is presented in [151] and [152] develops a mathematical model for the capacitor voltage
variations and analyzes the limits of voltage balancing in the MMC topology.
Research has also been carried out considering the MMC topology as a static synchronous
compensator (STATCOM) [153]–[155] and novel configurations of SMs resulting in variations of
the main MMC topology are presented in [157]–[160].
1.3 Objectives of the Thesis
The main objectives of the thesis are:
◦ To propose formulations and solutions of the two-level SHE-PWM technique with reduced
symmetry requirements for two-level converters and applications of MSHE-PWM for
hybrid multilevel converters providing extended operation while regulating the capacitor
voltages in order to provide high-quality waveforms.
◦ To report investigations of MSHE-PWM patterns with variable DC-voltage levels for con-
verters built on cascaded H-bridges considering (a) all voltage levels to be variables and
(b) certain levels to be considered constant.
◦ To propose SHE-PWM strategies and methods for the MMC in order to operate the con-
9
verter at the minimum switching frequency without affecting the output waveforms.
Additionally the strategies should provide a modular approach and be applied to any
configuration of the MMC while providing balancing to the voltages of the sub-modules
of the converter.
1.4 Methodology and Tools Used
The results presented in the thesis are based on detailed simulation results and experimental
work on laboratory prototypes. A number of simulation tools are used to generate the simulation
results presented in this thesis. Power electronics circuits are simulated in PSCAD [177], PSIM
[178], MATLAB/Simulink [179]–[180] and also using the PLECS toolbox [181]–[182] for MATLAB.
The calculation of SHE-PWM solutions for both the two-level case of Chapter 2 and the multilevel
cases of Chapters 3 and 4 are implemented using Mathematica [183]–[185].
The experimental results for Chapters 2, 3 and 4 are implemented using a dSPACE - DS1104
[186] board on low power laboratory prototype converters using the Fuji Electric 2MBI100TA-
060 IGBT modules and the Semikron Skyper32 Pro gate drivers. The implementation of the
SHE-PWM for the MMC presented in Chapter 5 utilized the dSPACE DS1103 [187] DSP board
on a phase-leg of the topology. Finally, a number of squirrel cage AC-motors and RL banks are
used as loads for the converters and both passive rectifiers and a California Instruments MX-30i
power supply are utilized on the DC-side of the power configurations.
1.5 Thesis Contributions
The main contributions of this thesis are as follows:
? New formulations of the two-level SHE-PWM technique, when the symmetry restrictions
are relaxed to HWS or completely eliminated are proposed (Chapter 2). The different
formulations significantly extend the solutions previously reported.
? Multiple solutions for two-level (Chapter 2) and MSHE-PWM (Chapter 3) waveforms are
reported and evaluated based on a number of harmonic performance factors.
? Control and voltage regulation strategies for hybrid multilevel topologies such as the
five-level hybrid cascaded converter and the seven-level ANPC based hybrid cascaded
converter combined with the limitation of the methods are presented (Chapter 3). The
approaches and methodologies are not restricted to the specific converters and can be
applied to the whole family of hybrid cascaded converters under MSHE-PWM.
? Investigation of the MSHE-PWM under variable DC-voltage levels is proposed (Chap-

ter 4). The formulation allows for additional harmonics to be eliminated from the output
spectrum requiring, nonetheless, additional complexity in the voltage regulation and
control.
10
? MSHE-PWM of the MMC is proposed (Chapter 5). The proposed techniques provide
elimination of the low order harmonics in the output waveform while providing regulation
of the SM capacitor voltages of the converter and minimizing the switching frequency. The
implementation of the proposed strategies are modular and only limited by the solution
space of MSHE-PWM.
? The operation of a back-to-back configuration of the MMC topology under two modula-
tion methods is analyzed (Chapter 6).
1.6 List of publications
The work presented in this thesis has resulted in a number of peer-reviewed journal publications
and papers presented in refereed international conferences.
1.6.1 Journal Papers
The following papers have been published or fully accepted for publication in International
Journals:
[1] M.S.A. Dahidah, G. Konstantinou, V. G. Agelidis, “Optimized switching instants and DC

voltage levels for cascaded multilevel converters” fully accepted for publication, IET Power
Electronics, 2012
[2] G. Konstantinou, M.S.A. Dahidah, V. G. Agelidis, “Solution trajectories for selective harmonic
elimination PWM for seven-level waveforms: analysis and implementation”, in IET Power
Electronics, Vol. 5, No. 1, pp. 22–30, 2012.
[3] S.R. Pulikanti, G.Konstantinou, V. G. Agelidis, “Generalization of flying-capacitor based

active-neutral-point-clamped multilevel converter using voltage-level modulation” in IET
Power Electronics, accepted for publication, Vol. 5, 2012.
[4] M.S.A. Dahidah, G. Konstantinou, N. Flourentzou, V. G. Agelidis, “On comparing the symmet-
rical and non-symmetrical SHE-PWM technique for two-level, three-phase voltage source
converters” in IET Power Electronics, Vol. 3, No. 6, pp. 829-842, 2010.
1.6.2 International Conference Papers
The following papers have been presented in international conferences:
[5] G. Konstantinou, M. Ciobotaru, V. G. Agelidis, “Analysis of multi-carrier PWM methods

for back-to-back HVDC systems based on modular multilevel converters” in Proc. of IEEE
IECON, Nov. 2011, pp. 4238-4243.
11
[6] G. Konstantinou, M. Ciobotaru, V. G. Agelidis, “Operation of a modular multilevel converter

with selective harmonic elimination PWM” in Proc. of IEEE ICPE - ECCE Asia, Jun. 2011,
pp. 999–1004.
[7] M.S.A. Dahidah, G. Konstantinou, V. G. Agelidis, “ SHE-PWM and optimized DC voltage

levels for cascaded multilevel inverters control” in Proc. of IEEE ISIEA 2010, Dec. 2010,
pp. 143–148.
[8] S. R. Pulikanti, G. Konstantinou, and V. G. Agelidis, “Seven-level cascaded ANPC-based

multilevel converter,” in Proc. of IEEE ECCE, Sept. 2010, pp. 4575–4582.
[9] G. Konstantinou, S. Pulikanti, V. G. Agelidis, “Harmonic elimination control of a five-level

DC-AC cascaded H-bridge hybrid inverter” in Proc. of IEEE PEDG, May 2010, pp. 352–357.
[10] S. R. Pulikanti, G. Konstantinou, and V. G. Agelidis “An n-level flying capacitor based active
neutral point clamped converter,” in Proc. of IEEE PEDG, May 2010, pp. 553–558.
[11] G. Konstantinou, V. G. Agelidis, “Bipolar switching waveform: novel solutions to the selective
harmonic elimination problem,” in Proc. of IEEE ICIT, Mar. 2010, pp. 696–701.
[12] G. Konstantinou and V. G. Agelidis, “Performance evaluation of half-bridge cascaded mul-

tilevel converters operated with multi-carrier sinusoidal PWM techniques,” in Proc. IEEE
ICIEA, May 2009, pp. 3399–3404.
1.6.3 Papers under Revision or Review
The following papers have been submitted to international journals and are currently either
under revision or review .
[13] G. Konstantinou, M. Ciobotaru, V. G. Agelidis, “On re-examining symmetry of two-Level

selective harmonic elimination PWM: novel formulations, solutions and performance evalu-
ation” submitted to IEEE Transactions on Industrial Electronics, under revision, February
2012.
[14] G. Konstantinou, M. Ciobotaru, V. G. Agelidis, “Selective harmonic elimination pulse-width

modulation of the modular multilevel converter”, submitted to IET Power Electronics, under
review, January May 2012.
[15] S.R. Pulikanti, G. Konstantinou, V. G. Agelidis, “Hybrid seven-level cascaded active-neutral-

point-clamped based multilevel converter under SHE-PWM” submitted to IEEE Transactions
on Industrial Electronics, under revision, April 2012.
12
The association between the chapters of the thesis and the Journal and conference publica-
tions is as follows.
Chapters Publications
Chapter 2. Two-level Selective Harmonic Elimination PWM [4], [11], [13]
Chapter 3. Multilevel Selective Harmonic Elimination PWM [2], [3], [8], [9], [10], [11]
Chapter 4. MSHE-PWM technique with Variable DC-levels [1], [7]
Chapter 5. Selective Harmonic Elimination PWM of Modular [6], [12], [14]

Multilevel Converters
Chapter 6. Modular Multilevel Converters for Back-to-Back Sys- [5]

tems
1.7 Thesis Outline
The thesis is organized as follows:
Chapter 2 discusses SHE-PWM for two-level VSC topologies. The symmetries that are typically
considered in the formulation of the two-level SHE-PWM are relaxed, increasing the number of
available solutions. Solution sets for a number of cases are calculated, evaluated and verified
through experimental work on a laboratory prototype.
Chapter 3 presents SHE-PWM patterns and solutions for multilevel converters. The cases of
odd and even levels in the output waveforms are presented and solutions for different numbers
of switchings and levels are also provided. The chapter also proposes the implementation
of MSHE-PWM for hybrid converters such as the five-level hybrid cascaded converter or the
seven-level ANPC based hybrid cascaded converter and investigates the limits in the voltage
regulation and limitations of such converter topologies.
Chapter 4 analyzes the MSHE-PWM problem with a voltage level optimization approach. The
levels of each voltage are considered variables in the problem hence providing the opportunity
for elimination of additional harmonics from the output spectrum. The cases of five- and seven-
level variable level MSHE-PWM waveforms for cascaded converters with variable DC sources
are investigated.
Chapter 5 proposes the MSHE-PWM of the MMC, a topology highly suitable for high-voltage
and high-power applications. It analyzes two different modulation patterns and offers validation
of both approaches through simulation and experimental results.
Chapter 6 discusses the back-to-back configuration of the MMC, proposes and analyzes
two multi-carrier PWM methods for modulating the arms and phase-legs of the converter with
results from a simulation configuration for both modulation methods.
Finally, Chapter 7 concludes the work, summarizes its contributions and suggests ideas for
future research.
Chapter 2
Two-level Selective Harmonic

Elimination PWM
2.1 Introduction
This chapter discusses the two-level SHE-PWM for three-phase converters, proposes HWS
formulations and presents detailed solution sets for each formulation. The proposed HWS
formulation relaxes the constraints imposed on the two-level formulation of the SHE-PWM
increasing the number of calculated solution sets for a particular number of harmonics elim-
inated. The increased number of available solution sets provides sets that exhibit improved
characteristics with regard to harmonic performance factors. All possible formulations for
the two-level waveform, including QWS and non-symmetrical solution sets, are analyzed for
completeness and switching solution sets are presented. An evaluation of the HWS solution sets,
based on a number of harmonic performance factors, is presented and the results are compared
with the well-known QWS SHE-PWM and the non-symmetrical formulation of the problem is
order to identify those that exhibit superior harmonic performance.
The proposed formulations and calculated solutions sets are verified through experimental
results from a laboratory setup.
13
14
2.2 Problem Formulations
The topology of a two-level, three-phase VSC is given in Fig. 2.1 and a generic two-level SHE-
PWM waveform (V AO ) is shown in Fig. 2.2. The solution sets of the SHE-PWM problem depend
on the type of waveform considered and hence in the way the SHE-PWM problem is formulated.
Additionally, the considerd formulation, affects the number of calculated solution sets, their
range and continuity over the MI range.
iin
+
Vdc DA+ DB+ DC+

2
TA+ TB+ TC+
A
Vdc o B
C
TA- DA- TB- DB- TC- DC-
Vdc
2
 N
Figure 2.1. Two-level, three-phase VSC
vAO
+Vdc/2
 3
2 π 2 2π ωt
-Vdc/2
α1 α2 αN αN+1 α2N α2N+1
Figure 2.2. Generic SHE-PWM waveform
Considering a random two-level waveform, as the one shown in Fig. 2.2, the Fourier coeffi-
cients of the waveform can be calculated as
" #
2 4N
X+2 i +1
A0 = 1+ (−1) αi ) (2.1)
π i =1
" #
2 4N
X+2 i +1
An = (−1) sin(nαi ) (2.2)
nπ i =1
" #
2 4N
X+2 i
An = (−1) cos(nαi ) (2.3)
nπ i =1
15
By considering various symmetries in the required waveform, certain terms of the Fourier
expansion become equal to zero and simplify the analysis. The different formulations of the
problem for the two-level waveform are described in this Section.
2.2.1 Quarter-wave Symmetrical SHE-PWM
The QWS defined two-level waveform is shown in Fig. 2.3. This formulation to the problem has
been extensively analyzed [61]–[73] and is presented here for completeness. The QWS waveform
possesses both QW and HW symmetry (symmetrical over pi /2 and π). These symmetries result
in a simplification of the problem as the DC component and the even harmonics of eq. (2.1)–(2.3)
as well as the sine terms of the odd harmonics in the output spectrum, as given in eq. (2.2), are
equal to zero.
vAO
+Vdc/2
 3
2 π 2 2π ωt
-Vdc/2
α1 α2 αN αN+1 α2N
Figure 2.3. QWS SHE-PWM waveform
The equation describing the QWS waveform is then:

" #
4 N
i
X
An = 1 − (−1) cos(nαi ) (2.4)
nπ i =1
Over the quarter-period, N switchings (angles) are required in order to eliminate N -1 harmonics
while maintaining the fundamental frequency component to the required level as defined by
the MI, M . The system of equations describing the QWS formulation for elimination of N − 1
harmonics is then
N
X
1−2 cos(a i ) = M (2.5)
i =1
...
N
X
1−2 cos(na i ) = 0 (2.6)
i =1
in three-phase systems where n = 1, 5, 7, . . . , 3N − 2 when N is odd, n = 1, 5, 7, . . . , 3N − 1 when N

is even, M is the MI with 0 < M < 1 and a i is the i -th switching.
The normalized amplitude of the fundamental component (V1 ) is related to the MI of eq.
(2.5) with
4
V1 = M (2.7)
π
16
The only constraint on the solution sets of the waveform is posed in order to ensure a physically
correct and implementable waveform as given by eq. (2.8)
π
0 < α1 < α2 < . . . < αN < (2.8)
2
2.2.2 Half-wave Symmetrical SHE-PWM
The HWS defined waveform provides elimination of the DC component and even harmonics due
to the properties of the HWS. However, both the real and imaginary parts (sine and cosine terms
of eq.(2.2)–(2.3)) of the odd harmonics are present in the spectrum and need to be controlled.
Two switchings over the half-period of the waveform are required in order to control a particular
harmonic from the output spectrum including the fundamental frequency component. As the
number of switchings required to control N harmonics is 2N , hence an even number over the
half-period of the waveform, the HWS requirements are not fulfilled. One additional switching
is required per half-period in order to provide the required symmetry in the waveform. The
total number of switchings in the half-period in order to eliminate N -1 harmonics and control
the fundamental frequency component while maintaining the HW of the symmetry is equal to
2N +1.
Two formulations are considered in the HWS waveform, derived from the placement of the
required switching in order to maintain the HWS. The first formulation is non-restrictive in the
placement of the switching to a specific value (time instant or angle) and, therefore, allows all
of the 2N +1 switchings to vary within the half-period. The second formulation forces one of
the switchings at the zero crossing of the fundamental frequency voltage waveform, as in the
square-wave and in the QWS SHE-PWM described in Section 2.2.1. This restriction reduces
the number of switchings that need to be calculated by one and as the additional switching is
placed at zero, it is equivalent to equating α1 of the non-restricted formulation to zero, yielding
cos α1 = 1 and sin α1 = 0. Hence, the solution sets of the restricted HWS formulation can be
directly derived from the non-restricted HWS case. Due to the numerical nature of the majority
of algorithms, convergence to a particular solution can be achieved faster when the restricted
HWS formulation is explicitly used.
In the case of the non-restricted HWS formulation, all 2N +1 switchings are free to vary and
assume any value within the half-period. A generalized waveform of this formulation is shown
in Fig. 2.4. The Fourier coefficients of the voltage waveform are then given by eq. (2.9) and (2.10).
" #
4 2N
X+1 i +1
An = (−1) sin(nαi ) (2.9)
nπ i =1
" #
4 2N
X+1 i
Bn = (−1) cos(nαi ) (2.10)
nπ i =1
In the restricted case, one switching is set equal to zero and the number of switchings sought
over the half-period is reduced by one. A generalized waveform of the restricted HWS formula-
tion of Fig. 2.5. The Fourier coefficients for this formulation are given by eq. (2.11) and (2.12).
17
vAO
+Vdc/2
 3
2 π 2 2π ωt
-Vdc/2
α1 α2 α2N α2N+1
Figure 2.4. Non-restricted HWS SHE-PWM waveform
vAO Switching at π Switching at 2π

+Vdc/2
 3
2 π 2 2π ωt
-Vdc/2
α1 α2 α2N-1 α2N
Figure 2.5. Restricted HWS SHE-PWM waveform
" #
4 X 2N
i +1
An = (−1) sin(nαi ) (2.11)
nπ i =1
" #
4 2N
1 + (−1)i +1 cos(nαi )
X
Bn = (2.12)
nπ i =1
In both cases, the harmonics eliminated depend on the number of switchings assumed and are
n = 1, 5, 7, . . . , 3N − 1 for even N and n = 1, 5, 7, . . . , 3N − 2 for odd N . The formulations presented
here assume an odd value for N . The reason for selecting an odd value for N is because the
following harmonic is a triplen harmonic that is eliminated in the power circuit. The elimination
of the triplen harmonic moves the first harmonic in the line-to-line spectrum to the 3N + 2
compared to the 3N + 1 in the case of even N .
In the non-restricted HWS (eq. (2.9) and (2.10)), 2N +1 switchings are sought over the half-
period, whereas in the restricted HWS case (eq. (2.11) and (2.12)), the number of switchings
sought is reduced to 2N . In both cases, N non-triplen harmonics, including the fundamental
frequency component are controlled and the number of switching instances within a complete
period of the waveform is equal to 4N +2. The effective switching frequency of each of the
switches of the two-level converter remains constant for both formulations. The number of
switchings over the period for the HWS solution sets is also equal to the QWS solution sets [65]–
[70]. The only constraint applied in the formulation is given in eq. (2.5) for the non-restricted
formulation and in eq. (2.14) for the restricted HWS formulation. It should also be noted that
when the equality of eq. (2.13) is satisfied, the non-restricted formulation is identical to the
restricted one.
0 ≤ α1 < α2 < . . . < α2N +1 < π (2.13)
18
0 < α1 < α2 < . . . < α2N < π (2.14)
2.2.3 Non Symmetrical SHE-PWM
In the non-symmetrical formulation, the constraints of QWS and HWS are totally abolished and
the solution is searched within the entire period (from 0 to 2π). The DC component and the
even harmonics are no longer equal to zero and need to be eliminated. The waveform is defined
by eqs. (2.1)–(2.3). As the switching frequency remains constant, a total of 4N +2 switchings take
place within the period. Due to the additional elimination of the DC component though, for an
odd N , as considered in this work, the first harmonic present in the output spectrum will be the
even harmonic (3N +1) before the odd harmonic that is the first significant harmonic for the two
previous formulations (3N +2).
The non-symmetrical formulation of the two-level SHE-PWM provides a number of sub-

optimal results when compared to the other two formulations, when N is considered an odd
number. The first significant harmonic for all formulations is the same when an even N is
considered but as discussed previously, odd N provides the best output spectrum due to the
additional triplen harmonic that is eliminated in the power circuit.
The constraint imposed on the formulation of the problem for the non symmetrical formula-
tion is similar to the other two formulations, extended over the period as follows:
0 ≤ α1 < α2 < . . . < α2N < α2N +1 < . . . < α4N +2 < 2π (2.15)
2.2.4 Solution Acquisition
The different formulations presented in the previous Section generate a number of equations
that need to be solved in order to acquire the solution sets to the SHE-PWM problem. In order to
eliminate N -1 odd and non-triplen harmonics while maintaining the fundamental component
to the required level, the necessary number of equations is N for the QWS formulation, 2N
or 2N +1 for the restrictive and non-restrictive formulation of the HWS and 4N +1 for the the
non-symmetrical formulation.
For all formulations, a system of non-linear equations with trigonometrical terms is defined
for which a solution needs to be calculated. The equations define a cost function that is mini-
mized in order to acquire the solution sets to the problem. For the QWS formulation, the cost
function is defined as
C (α1 , . . . , αN ) = (B 1 − M )2 + B 52 + . . . + B n2 (2.16)
for the HWS formulations the cost function is defined as
C (α1 , . . . , α2N ) = A 21 + (B 1 − M )2 + A 25 + B 52 + . . . + A 2n + B n2 (2.17)
and for the non-symmetrical formulation as
C (α1 , . . . , α4N +2 ) = A 21 + (B 1 − M )2 + A 22 + B 22 + A 24 + B 42 + A 25 + B 52 . . . + A 2n + B n2 (2.18)

19
The cost functions defined, are then minimized based on the specific constraints of each
formulation as given in eqs. (2.8), (2.13) and (2.15). Calculation of the solutions through
minimization of the cost function is performed using the Mathematica software package [183]–
[185]. The two-level formulation presented in this chapter, considers a biased selection of points
for the initialization of the algorithm. The initial points are a random permutation of candidate
points spaced between them by an angle equal to:
2π
αi ncr = (2.19)
3N
It should be noted that these points represent an initialization point to facilitate faster conver-
gence of the algorithm to a solution.However, they are not an approximation of the solution for
the first operating point. Certain permutations of the initial points do not lead to convergence
of the algorithm to a solution and, hence, do not provide solution sets to the problem. The
solution sets for one operating point are then used as the initialization points for the calculation
of the next operating point until the whole range of modulation indices has been covered or
until the algorithm cannot converge to a solution for a particular point. By using the previously
calculated solutions as initial points the speed of convergence is significantly improved. An
algorithm that converges faster is important, especially as the number of variables increases.
The non-symmetrical formulation of the problem yields all the switchings within the period
as results that can be directly implemented. In the case of HWS and QWS, the solution sets
are calculated for the half and quarter-period respectively. The remaining switchings are calcu-
lated by mirroring the calculated solution sets over the rest of the period so that the required
symmetries can be achieved. This include a single calculation
α2N +i = π + αi (2.20)
for the HWS formulation and two calculations given by eqs. (2.21)–(2.22)
α2N −i = π − αi (2.21)
α2N +i = π + αi (2.22)
for the QWS formulation.
2.3 Solution Sets
All the cases considered in this section consider a three-phase system and for this reason, triplen
harmonics (3rd, 6th, 9th, 12th etc) are not considered in the formulation of the problem.
2.3.1 Quarter-wave Symmetrical Waveforms
The QWS waveform has been analyzed extensively and the solution sets presented here consider
the elimination of two, four and six harmonics (N = 3, 5, 7) while providing control over the
fundamental frequency component .
20
2.3.1.1 Elimination of the 5th and 7th harmonic
Considering a QWS waveform with N =3, elimination of two harmonics can be achieved while
controlling the fundamental frequency component to the required level defined by the MI.
Here, the harmonics to be eliminated are the 5th and the 7th, which are the first two odd and
non-triplen harmonics in the voltage harmonic spectrum. Three switchings (α1 , α2 and α3 ) are
sought over the MI range and two different solution sets are calculated, a number consistent
with the literature. The trajectories of the two solution sets over the MI range are shown in
Fig. 2.6. The first harmonic in the voltage waveform of a three-phase system would then be the
11th (550 Hz for a 50 Hz system).
ʌ ʌ
ʌ ʌ

ĮĮ LQUDG
ĮĮ LQUDG
ĮĮ LQUDG
ʌ ʌ

ʌ ʌ

|Ȃ| Ȃ| |Ȃ|

(a) (b)
Figure 2.6. QWS solution sets for controlling the fundamental frequency and eliminating
the 5th and 7th harmonic, (a) Set 1, (b) Set 2
2.3.1.2 Elimination of the 5th, 7th, 11th and 13th harmonic
Similarly, a waveform with N =5 can provide elimination of the first four odd and non-triplen
harmonics while controlling the amplitude of the fundamental frequency component. The five
switchings (α1 , . . . α5 ) are sought over the quarter-period and four solution sets are calculated in
this case. The solution sets are shown in Fig. 2.7a-d. The first harmonic in the voltage waveform
of a three-phase system would be the 17th (850 Hz on a 50 Hz system).
2.3.1.3 Elimination of the 5th, 7th, 11th, 13th, 17th and 19th harmonic
The next case of the quarter wave formulation would consider N =7, where six harmonics are
eliminated from the output waveform. The seven switchings are sought over the quarter-period
and provide elimination of all the odd and non-triplen harmonics up to the 19th while controlling
the fundamental frequency component. The solution sets in this case are shown in Fig. 2.8.
2.3.2 Half-wave Symmetrical Waveforms
The two different formulations of Section 2.2.2 are applied for a number of cases where an even
number (N -1 even) of odd, non-triplen harmonics and the fundamental frequency component
are controlled.
21
ʌ ʌ ʌ
3ʌ 3 3ʌ
4
Į1...Į10 in rad
4 4
Į1...Į10 in rad
Į1...Į10 in rad
ʌ ʌ ʌ
2 2 2
ʌ ʌ ʌ
4 4 4
|Ȃ| |Ȃ| |Ȃ|

0.2 0.4 0.6 0.8 1 1.2 2 0.2 0.4 0.6 0.8 1 1.2
(a) (b)
ʌ ʌ
3ʌ 3 3ʌ
4
Į1...Į10 in rad
4
Į1...Į10 in rad
Į1...Į10 in rad
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 2 0.2 0.4 0.6 0.8 1 1.2
(c) (d)
the first four odd, non-triplen harmonics, (a) Set 1, (b) Set 2, (c) Set 3, (d) Set 4
ʌ ʌ
3ʌ 3ʌ
Į1...Į14 in rad
4
Į1...Į14 in rad
4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(a) (b)
ʌ ʌ
3ʌ 3ʌ
Į1...Į14 in rad
4
Į1...Į14 in rad
4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(c) (d)
the first six harmonics odd, non-triplen harmonics, (a) Set 1, (b) Set 2, (c) Set 3,
(d) Set 4
22
In all cases, the well-known QWS solution sets that have previously presented in Section 2.3.1,
are also acquired as solution sets to the restricted HWS formulation of the problem. This occurs
because formulation of the problem based on the HWS does not modify the way the problem
itself, just relaxes the restrictions that were imposed by previous approaches. The QWS solution
sets also present HWS and are valid solution sets to the HWS formulation of the problem. As the
QWS solution sets require one switching to be set at the 0 and π in order to maintain the QW
symmetry, it is expected for the QWS solution sets to be acquired through the restricted HWS
formulation.
An important property of the HWS solution sets is the duality they present. This property can
be observed in the solution sets figures (Figs. 2.9–2.12) presented in this section. Two sets of
solutions (denoted as set A and set B) exhibit exactly the same harmonic performance in terms
of amplitudes of the non-eliminated harmonics and hence exactly the same total harmonic
distortion (%THD) or any other harmonic based performance indicator. The main difference
between the two formulations is the phase of the fundamental component between the two
sets. In the case of the non-restricted HWS case the two solution sets have a phase difference of
π rad while in the restricted HWS case the two sets have exactly the same phase (either 0 or π
rad). The trajectories of the switchings are mirrored with regard to the middle of the HW and are
given for the case of the non-restricted HWS formulation by eq. (2.23) and for the case of the
restricted HWS formulation by eq. (2.24).
αi ,set A = π − α2N +1−i ,set B (2.23)
αi ,set A = π − α2N −i ,set B (2.24)
2.3.2.1 Elimination of the 5th and 7th harmonic
Considering the non-restricted HWS case, the number of switchings in the half-period are equal
to 2N + 1 = 7. Hence, seven switchings (α1 , . . . α7 ) are sought over the half-period that eliminate
the 5th and 7th harmonics while controlling the fundamental frequency component to the
required level defined by eq. (2.7). Similarly, for the case of the restricted HWS formulation
the number of switchings in the waveform are equal to 2N = 6 and six switchings (α1 , . . . α6 ) are
sought over the half-period. Fig. 2.9 shows the four solution sets for the non-restricted HWS
formulation and Fig. 2.10 shows the six solution sets for the restricted HWS formulation.
2.3.2.2 Elimination of the 5th, 7th, 11th and 13th harmonic
Considering the non-restricted HWS case, eleven switchings are sought over the half-period that
eliminate the 5th, 7th, 11th and 13th harmonic while controlling the fundamental component
to the required level. The first significant harmonic to the voltage spectrum is the 17th. Similarly,
for the restricted HWS case, ten switchings are sought over the half-period. The QWS solution
sets previously reported are also solution sets to this formulation. A total of ten solution sets are
found for the non-restricted HWS case and are shown in Fig. 2.11 and eight for the restricted
HWS formulation shown in Fig. 2.12
23
π π
π π
3π
π 3π 3π
π 3π
4 4π 4 4π
rad7 in rad
rad7 in rad
...α7 in rad
...α7 in rad
3π
π
π 3π
π
π
42 π
3π π
42 3π
2
4π 2
4π
rad7 αin1...α
rad7 αin1...α
1...α7 inα1rad
1...α7 inα1rad
3ππ 3ππ
4π π 4π π
42 42 3π
π
3π π
4 4
α1...α7 αin1...α
α1...α7 αin1...α
42 42
α1...α7 inαrad
α1...α7 inαrad
ππ |Μ| |Μ|ππ2 |Μ||Μ|
42 ππ 4 ππ
0.2 24 0.2 0.4 0.4 0.6 0.6 (a0.8 0.8 1 1 1.2 1.2 0.224 0.2 0.4 0.4 0.6 0.6 0.80.8 1 1 1.21.2
π (a) |Μ| π (b) |Μ|
π
4 π |Μ|π4 π |Μ|
0.2 π4 0.2 0.4 0.4
0.6 0.6 0.8 0.8 1 1
1.2 1.2 0.2π4 0.2 0.4 0.4 0.6 0.6 0.80.8 1 1 1.21.2
(a |Μ| |Μ|
3π
π 3π 3π 3π
4 0.2 4π 0.4 0.6 0.8 1 1.2 |Μ|4π 0.24π 0.4 0.6 0.8 1 1.2 |Μ|
...α7 in rad
...α7 in rad
rad7 in rad
rad7 in rad
0.2 0.4 0.6 (a 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
3π
π
π π
3π 3π
π 3π
π π
42 2
4π 42 4π2
rad7 αin1...α
rad7 αin1...α
1...α7 inα1rad
1...α7 inα1rad
3ππ π 3ππ ππ
4π π
3π 4π 3π
42 4
42 42 442
α1...α7 αin1...α
α1...α7 αin1...α
α1...α7 inαrad
α1...α7 inαrad
ππ |Μ| |Μ|ππ2 ππ |Μ||Μ|

π
42
π
24 0.2 0.4 0.6 0.6 0.8 0.8 1 4 24 0.2
0.2 0.4 1 1.2 1.2 0.2 0.4 0.4 0.6 0.6 0.80.8 1 1 1.21.2
π π |Μ| |Μ|π π |Μ||Μ|
π
4 π π 4 π
0.2 4 0.2 0.4 0.4 0.6 0.6 0.8 0.8 1 1 1.2 1.2 0.24 0.2 0.4 0.4 0.6 0.6 0.80.8 1 1 1.21.2
3π (c) |Μ| 3π 3π (d) |Μ|
3π
π 4π π
|Μ| 4π |Μ|
4 0.2 0.4 0.6 0.8 1 1.2 4 0.2 0.4 0.6 0.8 1 1.2
...α7 in rad
...α7 in rad
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
rad7 in rad
rad7 in rad
π
3π π
3π
3π
π
π 2 3π
π
π
42 4π 42 42
π
1...α7 inα1rad
1...α7 inα1rad
rad7 αin1...α
rad7 αin1...α
3π π
π 3π π
π
π 3π
4 π 3π
4
4π 42 4π 2
42 42 4
α1...α7 αin1...α
α1...α7 αin1...α
α1...α7 inαrad
α1...α7 inαrad
|Μ| |Μ|
ππ ππ |Μ| π ππ
π |Μ|
42 24 0.2 0.4 0.6 0.8 1 1.2 42 42 0.2 0.4 0.6 0.8 1 1.2
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
π π |Μ| |Μ|π π |Μ||Μ|
4 4 0.2 0.4 0.6 0.6 0.8 0.8 1 4 4 0.2
0.2 0.4 1 1.2 1.2 0.2 0.4 0.4 0.6 0.6 0.80.8 1 1 1.2
1.2
|Μ| |Μ| |Μ||Μ|
0.2 0.2 0.4 0.4 0.6 0.6 0.8 0.8 1 1 1.2 1.2 0.2 0.2 0.4 0.4 0.6 0.6 0.80.8 1 1 1.21.2
(e) (f)
Figure 2.9. Non-restricted HWS solution sets for controlling the fundamental frequency
and eliminating the 5th and 7th harmonic, (a) Set 1a, (b) Set 1b, (c) Set 2a,
(d) Set 2b, (e) Set 3a, (f) Set 3b,
2.3.2.3 Elimination of the 5th, 7th, 11th, 13th, 17th and 19th harmonic
In this case, N = 7 and the non-restricted HWS formulation requires fifteen switchings per half-
period of the waveform. Similarly, the problem would be formulated with fourteen switchings
per half-period for the restricted HWS formulation. As the formulation increases the solution
space, the number of switching solution sets calculated through the relaxation of the symmetry
is significantly increased over the QWS solution sets presented in Fig. 2.8. Fig. 2.13a-p shows the
solution sets for the non-restricted HWS formulation of the problem where fifteen switchings
are sought. The restricted HWS formulation with fourteen switchings over the half-period is
shown in Fig 2.14.
3π 3π
in r
in r
4π 4
in 6rad
in 6rad
π
2 2
α1...αα61...α
α1...αα61...α
π π
2π 2
π
4 4
π π 24
4 |Μ| 4 |Μ|
0.2 0.4 0.6 (a) 0.8 1 1.2|Μ| 0.2 0.4 0.6 0.8 1 1.2|Μ|
(b)
0.2 0.4 0.6 (a) 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
ʌ π π (b)
π π
ʌ 3π 3π
4 4
ĮĮ LQUDG
ĮĮ LQUDG
in rad
in rad
3π 3π
ʌ in 6rad 4π 4
in 6rad
π
2 2
α1...αα61...α
α1...αα61...α
π π
ʌ 2π 2
π
4 4
π |Ȃ| π
4 |Μ| 4 |Μ|
0.2 0.4 0.6 0.8 1 1.2|Μ| 0.2 0.4 0.6 0.8 1 1.2|Μ|
(a) (b)
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
π π
π π
ʌ 3π 3π
4 4
in rad
in rad
3π 3π
ʌ 4π 4
in 6rad
in 6rad
π
ĮĮ LQUDG
ĮĮ LQUDG
2 2
α1...αα61...α
α1...αα61...α
π π
ʌ 2π 2
π
4 4
π π
ʌ 4 |Μ| 4 |Μ|

0.2 0.4 0.6 0.8 1 1.2|Μ| 0.2 0.4 0.6 0.8 1 1.2|Μ|
|Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(c) (d)
Figure 2.10. Restricted HWS solution sets for controlling the fundamental frequency
and eliminating the 5th and 7th harmonic, (a) Set 1a, (b) Set 1b, (c) Set 2a,
(d) Set 2b,
2.3.3 Non-Symmetrical Waveforms
The non-symmetrical formulation of the SHE-PWM requires elimination of the DC compo-

nent as well as the even and odd harmonics from the output spectrum. Only one case will
be presented here to provide a complete overview of the results. As discussed earlier in the
Chapter, non-symmetrical formulations result in even harmonics being present in the wave-
form and are sub-optimal solution sets of the SHE-PWM problem. The case presented here
is the equivalent with N =5, where the harmonics up to the 17th are eliminated in the case of
the QWS and HWS formulation. The formulation requires 4N + 2 = 22 angles to be calculated
over the period, eliminating control of nine non-triplen harmonics, including even and odd
harmonics, controlling the fundamental frequency component and the DC component. The
first harmonic in the output spectrum is then the 16th harmonic. Fig. 2.15 shows solution sets
for the non-symmetrical case. Due to its sub-optimal performance and the presence of even
harmonics int he ouput voltage spectrum, the non-symmetrical case will not be considered in
the analysis and evaluation considered in Section 2.4.
25
π π π π
π 3π
3π π 3ππ 3ππ
4 4 4 4
11 in rad
11 in rad
11 in rad
11 in rad
π π π π
3π 3π
π 3π 3π
π 4 4π 4π
24 2
in rad
in rad
in rad
in rad
2 2
3π 3π 3π 3π
1...α
1...α
1...α
1...α
4 π4 4π 4
in11αrad
in11αrad
π
in11αrad
in11αrad
π
π π π π
24 2 4 24 24
α1...αα111...α
α1...αα111...α
α1...αα111...α
π π α1...αα111...α
π π
2π 2 π |Μ||Μ| 2π 2π |Μ||Μ|
4 4 4 4
0.2
π π
0.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 π0.2 π0.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
4π 4π (a) |Μ| 4π 4π
|Μ| (b) |Μ||Μ|
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2|Μ| 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2|Μ|
|Μ| |Μ|
3π
π 3π π 3π π
π 3π
40.2
40.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 40.2 40.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
11 in rad
11 in rad
11 in rad
11 in rad
π π π π
3π
π 3π 3π 3π
24 2
π
4 4π
2 4
π
in rad
in rad
in rad
in rad
2
3π 3π 3π 3π
1...α
1...α
1...α
1...α
4 π4 4π 4
in11αrad
in11αrad
in11αrad
in11αrad
π π
π
24 π 2 π
24 π
2
4 4
α1...αα111...α
α1...αα111...α
α1...αα111...α
α1...αα111...α
π π π π
2π 2π |Μ||Μ| π 2π
2 |Μ||Μ|
4 4 4 4
0.2
π π
0.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 π0.2 π0.2
0.40.4 0.60.6 0.80.8 1 1 1.21.2
4 4 |Μ||Μ| 4 4 |Μ||Μ|
π π π π
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
|Μ||Μ| |Μ||Μ|
(c) (d)
π0.2
3π π0.2
3π 0.40.4 0.60.6 0.80.8 1 1 1.21.2 3π π0.2
π0.2
3π 0.40.4 0.60.6 0.80.8 1 1 1.21.2
4 4 4 4
11 in rad
11 in rad
11 in rad
11 in rad
π π π π
3π
π 3π 3π 3π
24 2
π
4 4π
2 4
π
in rad
in rad
in rad
in rad
2
3π 3π 3π 3π
1...α
1...α
1...α
1...α
4 π4 4π 4
in11αrad
in11αrad
in11αrad
in11αrad
π
π π π
24 π 2 24 π2
4 4
α1...αα111...α
α1...αα111...α
α1...αα111...α
α1...αα111...α
π π π π
2π 2π |Μ||Μ| π 2π
2 |Μ||Μ|
4 4 4 4
0.2
π π0.2
0.40.4 0.60.6 0.80.8 1 1 1.21.2 π0.2 π0.2
0.40.4 0.60.6 0.80.8 1 1 1.21.2
4 4 |Μ||Μ| 4 4 |Μ||Μ|
π π π π
0.2 0.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.2
0.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
|Μ||Μ| |Μ||Μ|
π0.2
3π π0.2
3π 0.40.4 0.60.6 0.80.8 1 1 1.21.2 3π π0.2
π0.2
3π 0.40.4 0.60.6 0.80.8 1 1 1.21.2
4 4 4 4
11 in rad
11 in rad
11 in rad
11 in rad
(e) (f)
π π π π
3π 3π 3π 3π
π
24 2
π
4Figure 2.11. Non-restricted HWS solution sets 4π2for4π2 controlling the fundamental frequency
in rad
in rad
in rad
in rad
3π 3π 3π 3π
1...α
1...α
1...α
1...α
4 π4
and eliminating the first fModd, non-triplen
4π 4 harmonics (a) Set 1a, (b) Set 1b,
in11αrad
in11αrad
in11αrad
in11αrad
π π
π
24 2 π
4
(c) Set 2a, (d) Set 2b, (e) Set 3a, (f)π24Set
π 3b (cont.)
2
4
α1...αα111...α
α1...αα111...α
α1...αα111...α
α1...αα111...α
π π π π
2π 2 π |Μ||Μ| 2π2
π |Μ||Μ|
4 4 4 4
0.2
π π0.2
0.40.4 0.60.6 0.80.8 1 1 1.21.2 π0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
π
4π 4π |Μ||Μ| 4π 4π |Μ||Μ|
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
|Μ||Μ| |Μ||Μ|
3π
π 3π π 3π
π 3π
π
40.2
40.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 40.2 40.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
11 in rad
11 in rad
11 in rad
11 in rad
π π π π
3π
π 3π 3π 3π
24 2
π
4 4π
2 4
π
in rad
in rad
in rad
in rad
2
3π 3π 3π 3π
1...α
1...α
1...α
1...α
4 π4 4π 4
in11αrad
in11αrad
π
in11αrad
in11αrad
π π π
24 π 2 24 π
2
4 4
α1...αα111...α
α1...αα111...α
α1...αα111...α
α1...αα111...α
π π π π
2π 2π |Μ||Μ| 2π 2π |Μ||Μ|
4 4 4 4
0.2
π π0.2
0.40.4 0.60.6 0.80.8 1 1 1.21.2 π0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
π
4 4 |Μ||Μ| 4 4 |Μ||Μ|
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
|Μ||Μ| |Μ||Μ|
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
24 4 24 4
α1...α1
α1...α1
α1...α
α1...α
π π |Μ||Μ| π π4 |Μ||Μ|
4 4 4
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
π π |Μ||Μ| π π |Μ||Μ|
26
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
3π π
π 3π π
π 3π
3π
4 4 4 4
11 in rad
11 in rad
11 in rad
11 in rad
3π 3π 3π 3π
π π 4π
4 4π
in rad
in rad
24 2
in rad
in rad
2 2
α1...α
α1...α
α1...α11α1...α
α1...α11α1...α
π π π π
π π
24 2
π 24 2
π
α1...α11
α1...α11
4 4
π π |Μ||Μ| π π4 |Μ||Μ|
4 4 4
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
|Μ||Μ| |Μ||Μ|
π π0.2 π π0.2
0.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
3π π
π 3π π
π 3π
3π
4 4 4 4
11 in rad
11 in rad
11 in rad
11 in rad
3π 3π 3π 3π
π π 4π
4 4π
in rad
in rad
24 2
in rad
in rad
2 2
α1...α
α1...α
α1...α11α1...α
α1...α11α1...α
π π π π
π π
24 2 π π
24 2
α1...α11
α1...α11
4 4
π π |Μ||Μ| π π4 |Μ||Μ|
4 4 4
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
|Μ||Μ| |Μ||Μ|
π π0.2 π π0.2
0.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
π
π 3π
3π 3π π
π 3π
4 4 4 4
11 in rad
11 in rad
11 in rad
11 in rad
3π 3π 3π 3π
π π
4 4π 4π
24 2
in rad
in rad
in rad
in rad
2 2
α1...α
α1...α
α1...α11α1...α
α1...α11α1...α
π π π π
π π
24 2 π π
24 2
α1...α11
α1...α11
4 4
π π |Μ||Μ| π π |Μ||Μ|
4 4 4 4
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
π π (g) |Μ||Μ| π π (h) |Μ||Μ|
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
3π π
π 3π 3π π
π 3π
4 4 4 4
11 in rad
11 in rad
11 in rad
11 in rad
3π 3π 3π 3π
π π
4 4π 4π
24 2
in rad
in rad
in rad
in rad
2 2
α1...α11α1...α
α1...α11α1...α
α1...α
α1...α
π π π π
π
24 π
2 π
24 π
2
α1...α11
α1...α11
4 4
π π |Μ||Μ| π π |Μ||Μ|
4 4 4 4
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
|Μ||Μ| |Μ||Μ|
0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2 0.20.2 0.40.4 0.60.6 0.80.8 1 1 1.21.2
(i) (j)
and eliminating the first four odd, non-triplen harmonics, (g) Set 4a,
(h) Set 4b, (i) Set 5a, (j) Set 5b,
(c)(c)
(c)(c)
(e)(e)
(e)(e)
27
ʌ
ʌ
ʌ
ʌ
ĮĮ LQUDG
ĮĮ LQUDG

ĮĮ LQUDG
ʌ
ʌ

ʌ ʌ

|Ȃ| |Ȃ| |Ȃ|

(a) (b)
ʌ ʌ
ʌ ʌ

ĮĮ LQUDG
ĮĮ LQUDG
ĮĮ LQUDG
ʌ ʌ

ʌ ʌ

|Ȃ| Ȃ| |Ȃ|

(c) (d)
ʌ ʌ
ʌ ʌ

ĮĮ LQUDG
ĮĮ LQUDG
ĮĮ LQUDG
ʌ ʌ

ʌ ʌ

|Ȃ| Ȃ| |Ȃ|

(e) (f)
ʌ ʌ
ʌ ʌ

ĮĮ LQUDG
ĮĮ LQUDG
ĮĮ LQUDG
ʌ ʌ

ʌ ʌ

|Ȃ| Ȃ| |Ȃ|

(g) (h)
Figure 2.12. Restricted HWS solution sets for controlling the fundamental frequency and
eliminating the first four odd, non-triplen harmonics, (a) Set 1a, (b) Set 1b,
(c) Set 2a, (d) Set 2b, (e) Set 3a, (f) Set 3b, (g) Set 4a, (h) Set 4b,
28
ʌ ʌ
3ʌ 3ʌ
Į1...Į15 in rad
Į1...Į15 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(a) (b)
ʌ ʌ
3ʌ 3ʌ
Į1...Į15 in rad
Į1...Į15 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(c) (d)
ʌ ʌ
3ʌ 3ʌ
Į1...Į15 in rad
Į1...Į15 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(e) (f)
ʌ ʌ
3ʌ 3ʌ
Į1...Į15 in rad
4 4
Į1...Į6 in rad
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(g) (h)
and eliminating the first six odd, non-triplen harmonics, (a) Set 1a, (b) Set 1b,
(c) Set 2a, (d) Set 2b, (e) Set 3a, (f) Set 3b, (g) Set 4a, (h) Set 4b (cont.)
29
ʌ ʌ
3ʌ 3ʌ
Į1...Į15 in rad
Į1...Į15 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(i) (j)
ʌ ʌ
3ʌ 3ʌ
Į1...Į15 in rad
Į1...Į15 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(k) (l)
ʌ ʌ
3ʌ 3ʌ
Į1...Į15 in rad
Į1...Į15 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(m) (n)
ʌ ʌ
3ʌ 3ʌ
Į1...Į15 in rad
Į1...Į15 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(o) (p)
and eliminating the first six odd, non-triplen harmonics, (i) Set 5a, (j) Set 5b,
(k) Set 6a, (l) Set 6b, (m) Set 7a, (n) Set ,7b (o) Set 8a, (p) Set 8b,
30
ʌ ʌ
3ʌ 3ʌ
Į1...Į14 in rad
Į1...Į14 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(a) (b)
ʌ ʌ
3ʌ 3ʌ
Į1...Į14 in rad
4 Į1...Į14 in rad
4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(c) (d)
ʌ ʌ
3ʌ 3ʌ
Į1...Į14 in rad
Į1...Į14 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(e) (f)
ʌ ʌ
3ʌ 3ʌ
Į1...Į14 in rad
Į1...Į14 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(g) (h)
Figure 2.14. Restricted HWS solution sets for controlling the fundamental frequency and
eliminating the first six odd, non-triplen harmonics, (a) Set 1a, (b) Set 1b,
(c) Set 2a, (d) Set 2b, (e) Set 3a, (f) Set 3b, (g) Set 4a, (h) Set 4b (cont.)
31
ʌ ʌ
3ʌ 3ʌ
Į1...Į14 in rad
Į1...Į14 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(i) (j)
ʌ ʌ
3ʌ 3ʌ
Į1...Į14 in rad
Į1...Į14 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(k) (l)
ʌ ʌ
3ʌ 3ʌ
Į1...Į14 in rad
Į1...Į14 in rad
4 4
ʌ ʌ
2 2
ʌ ʌ
4 4
|Ȃ| |Ȃ|
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(m) (n)
and eliminating the first six odd, non-triplen harmonics, (i) Set 5a, (j) Set 5b,
(k) Set 6a, (l) Set 6b, (m) Set 7a, (n) Set 7b,
32
2ʌ 2ʌ
3ʌ/2 3ʌ/2
Į1Į22 in rad
Į1Į22 in rad
ʌ ʌ
ʌ/2 ʌ/2
0 0
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
Modulation Index (M) Modulation Index (M)
(a) (b)
2ʌ 2ʌ
3ʌ/2 3ʌ/2
Į1Į22 in rad
Į1Į22 in rad
ʌ ʌ
ʌ/2 ʌ/2
0 0
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(c) (d)
2ʌ 2ʌ
3ʌ/2 3ʌ/2
a Į1Į22 in rad
aĮ1Į22 in rad
ʌ ʌ
ʌ/2 ʌ/2
0 0
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(e) (f)
2ʌ 2ʌ
3ʌ/2 3ʌ/2
a Į1Į22 in rad
aĮ1Į22 in rad
ʌ ʌ
ʌ/2 ʌ/2
0 0
0.2 0.4 0.6 0.8 1 1.2 0.2 0.4 0.6 0.8 1 1.2
(g) (h)
Figure 2.15. Non-symmetrical solution sets, (a) Set 1, (b) Set 2, (c) Set 3, (d) Set 4, (e) Set 5,
(f) Set 6, (g) Set 7, (h) Set 8,
33
2.4 Performance Evaluation
2.4.1 Evaluation Factors
The harmonic performance of the various solution sets presented in the previous Section is
investigated using three different evaluation factors. A harmonic distortion factor (HDF%)
taking into consideration the first two non-eliminated harmonics in the output spectrum of the
waveform (V1h and V2h ) as shown in eq. (2.25) is initially considered.
q
2 2
V1h + V2h
H DF (%) = × 100% (2.25)
V1
Secondly, a harmonic loss factor (HLF%) is considered for comparing the different solution sets.
The HLF% is also proportional to the weighted current total harmonic distortion (WTHDi ) and
is given by eq. (2.26). v
u ∞ · ¸2
100 u X Vn
H LF (%) = t (2.26)
V1 3N −1 n
Low-order, zero-sequence harmonics are not eliminated by the modulation scheme. These
harmonics result in increased stresses imposed on the insulation of motors and grid connection
transformers and also increase the shunt filter requirements for high power applications. For
this reason, the amplitude of the non-eliminated, zero-sequence harmonics is also considered
in the evaluation of the solution sets.
2.4.2 Evaluation of the Solutions
The QWS and HWS solution sets that were presented in Section 2.3 are evaluated for their
harmonic performance based on the factors of eqs. (2.25) and (2.26). Fig. 2.16a and 2.17a show
the HDF% in the case where 3 harmonics are controlled for both the QWS and HWS formulations.
Similarly, Figs. 2.16b and 2.17b shows the variation of HLF% over the range of MI for the same
solution sets.
140 HDF(%) 14 HLF(%)

120 12
100 10
80 8
60 6
40 4
20 2
|M| |M|
0 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(a) (b)
Figure 2.16. Non-restricted HWS formulation eliminating the 5th and 7th harmonic, Har-
monic performance factors, (a) %HDF, (b) %HLF, Set 1 (——), Set 2 (− − −) ,
Set 3 (· · · · · · )
The harmonic performance of the solution sets, when four odd and non-triplen harmonics
are eliminated, is presented in Figs. 2.18–2.20.
34
140 HDF(%)
14 HLF(%)
120 12
100 10
80 8
6
60
4
40 2
|M| |M|
20 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(a) (b)
Figure 2.17. Restricted HWS formulation eliminating the 5th and 7th harmonic, Harmonic
performance factors, (a) %HDF, (b) %HLF, QWS Set 1 (——), QWS Set 2 (−−−),
HWS Set 1 (· · · · · · ), HWS Set 2 (· − · − ·)
140 HDF(%) 9 HLF(%)

120 8
7
100
6
80
5
60 4
40 3
20 2 |M|
|M|
0 1
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(a) (b)
Figure 2.18. QWS formulation eliminating the first four odd, non-triplen harmonics, Har-
monic performance factors, (a) %HLF, (b) %HDF, Set 1 (——), Set 2 (− − −) ,
Set 3 (· · · · · · ), Set 4 (· − · − ·)
140 HDF(%) 8 HLF(%)

120 7
100 6
80 5
4
60
3
40 2
20 1
|M| |M|
0 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(a) (b)
Figure 2.19. QWS formulation eliminating the first four odd, non-triplen harmonics, Har-
monic performance factors, (a) %HDF, (b) %HLF, Set 1 (——), Set 2 (− − −) ,
Set 3 (· · · · · · ), Set 4 (· − · − ·), Set 5 (− · ·−)
140 HDF(%) 9 HLF(%)

120 8
100 7
80 6
5
60
4
40
3
20
|M| 2 |M|
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(a) (b)
Figure 2.20. Restricted HWS formulation eliminating the first four odd, non-triplen har-
monics, Harmonic performance factors, (a) %HDF, (b) %HLF, Set 1 (——),
Set 2 (− − −) , Set 3 (· · · · · · ), Set 4 (· − · − ·)
35
The variation of the non-eliminated triplen harmonics within the harmonic spectrum of
the output waveform when three harmonics are controlled is shown in Fig. 2.21 for the non-
restricted HWS formulation and in Fig. 2.22 for the restricted HWS and the QWS formulations.
The harmonics eliminated are the 5th and the 7th, so the triplen harmonics of interest are the
3rd and the 9th.
1.4 p.u. 0.8 p.u.

1.2 0.7
1 0.6
0.5
0.8
0.4
0.6
0.3
0.4 0.2
0.2 0.1
|M| |M|
0 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(a) (b)
Figure 2.21. Non-restricted HWS formulation eliminating the 5th and 7th harmonic, Zero
sequence harmonics, (a) Third harmonic, (b) Ninth harmonic, Set 1 (——),
Set 2 (− − −) , Set 3 (· · · · · · )
1.4 p.u. 0.8 p.u.

1.2 0.7
1 0.6
0.5
0.8
0.4
0.6
0.3
0.4 0.2
0.2 0.1
|M| |M|
0 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(a) (b)
Figure 2.22. Restricted HWS formulation eliminating the 5th and 7th harmonic, Zero
sequence harmonics, (a) 3rd harmonic, (b) 9th harmonic, QW Set 1 (——),
QW Set 2 (− − −) , HW Set 1 (· · · · · · ), HW Set 2 (· − · − ·)
Similarly, the variation of the non eliminated triplen harmonics is given in Fig. 2.23 for
the QWS formulation (Fig. 2.7) and in Fig. 2.24 for the non-restricted HWS formulation of the
problem (Fig. 2.11). Fig. 2.25 shows the variation of the 3rd, 9th and 15th harmonic for the
restricted HWS formulation (Fig. 2.12)
36
1.4 p.u. 1.4 p.u.

1.2 1.2
1 1
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
|M| |M|
0 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(a) (b)
0.7 p.u.
0.6
0.5
0.4
0.3
0.2
0.1
|M|
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(c)
Figure 2.23. QWS formulation eliminating the first four odd, non-triplen, Zero sequence
harmonics, (a) 3rd harmonic, (b) 9th harmonic, (c) 15th harmonic, Set 1 (——
), Set 2 (− − −) , Set 3 (· · · · · · ), Set 4 (· − · − ·)
1.4 p.u. 1.4 p.u.

1.2 1.2
1 1
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
|M| |M|
0 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(a) (b)
0.7 p.u.
0.6
0.5
0.4
0.3
0.2
0.1 |M|
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(c)
Figure 2.24. Non-restricted HWS formulation eliminating the first four odd, non-triplen,
Zero sequence harmonics, (a) 3rd harmonic, (b) 9th harmonic, (c) 15th har-
monic, Set 1 (——), Set 2 (− − −), Set 3 (· · · · · · ), Set 4 (· − · − ·), Set 5 (− · ·−)
37
1.4 p.u. 1.8 p.u.

1.2 1.6
1 1.4
1.2
0.8 1
0.6 0.8
0.4 0.6
0.4
0.2
|M| 0.2 |M|
0 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(a) (b)
0.7 p.u.
0.6
0.5
0.4
0.3
0.2
0.1
|M|
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
(c)
Figure 2.25. Restricted HWS formulation eliminating the first four odd, non-triplen, Zero
sequence harmonics, (a) 3rd harmonic, (b) 9th harmonic, (c) 15th harmonic,
Set 1 (——), Set 2 (− − −), Set 3 (· · · · · · ), Set 4 (· − · − ·)
2.4.3 Comparison of solution sets
The number of solution sets derived in each case depends on the formulation of the problem.
An increase in the number of variables can be acquired either by increasing the number of
eliminated harmonics or by relaxing the symmetry requirements. The increase in the number of
variables also increases the calculated solution sets for each case.
The non-symmetrical formulation provides the highest number of solution sets. The per-
formance of the non-symmetrical solution sets is, however, worse than the other formulations
and in combination with the added complexity in the calculation of the solutions renders this
formulation the least advantageous for implementation in commercial applications.
HW and QWS formulations provide the same numbers of harmonics eliminated for equal
switching frequency so both of them are equally viable in medium and high-power converter
applications. The non-restricted HWS formulation requires one additional variable in the
problem resulting in higher number of solution sets, when compared to the restricted one, and
QWS formulations and both HWS formulations provide substantially more solution sets to the
problem than the well known QW formulation. Table 2.1 summarizes the number of solution
sets calculated for each of the cases presented.
Table 2.1. S UMMARY OF SOLUTION SETS FOR THE SHE-PWM CASES ANALYZED
Harmonics eliminated Non-restricted HWS Restricted HWS QWS Total

5th, 7th 6 4 2 12
5th, 7th, 11th, 13th 10 8 4 22
5th, 7th, 11th,13th, 17th, 19th 16 14 4 34
The QW and HW formulations result in a waveform with similar first harmonic in the output
spectrum. However, the solution sets exhibit different behavior with regard to amplitudes of
38
non-eliminated odd, non-triplen harmonics as well as triplen harmonics in the output spectrum.
The previous section provided an evaluation of the different solution sets. Different sets provide
different characteristics with certain sets resulting in unacceptably high triplen harmonics.
Each application requires different harmonic performance and switching characteristics

from the PWM waveforms and an evaluation of each of the available solution sets has to be
made for each particular application. The HWS formulation provides additional solution sets to
the two-level SHE-PWM problem at the cost of a slight increase in the calculation complexity.
However, the implementation of the HWS waveform is similar for both formulations and HWS
solution sets can be readily applied to any existing converter operating under SHE-PWM.
2.5 Experimental verification
A number of operating points, for randomly selected solution sets presented in Section 2.3,
are used in the experimental verification on a two-level, three-phase laboratory setup. The
parameters of the two-level VSC used in the experimental verification are summarized in Table
2.2 and a schematic of the setup is given in Fig. 2.26. The multiple sets of solutions for the whole
range of modulation indices are calculated off-line and the implementation of the SHE-PWM
and generation the gating signals is performed using Matlab/Simulink [180] and the dSPACE
1104 R&D board [186].
Table 2.2. PARAMETERS OF THE TWO - LEVEL CONVERTER EXPERIMENTAL SETUP
Parameter Value
DC-bus voltage (Vd c ) 100 V
IGBTs FUJI Electric 2MBI100TA-060-50
Drivers Semikron SKYPER 32PRO R
Load 350 W squirrel cage induction motor
Two-level
O VSC M
topology
Induction Motor
California
Instruments
MX-30i dSPACE 1104
Gate Drivers
Figure 2.26. Schematic of the two-level VSC experimental setup
The implementation of the SHE-PWM for the two-level converter is shown in Figs. 2.27, 2.28a
and 2.28b for the QWS, HWS and non-symmetrical problem formulations respectively. The con-
sidered waveforms define the number of switchings necessary and the MI M defines the column
39
of the lookup table were the switchings (α1 . . . αN ) of the waveform are read. The switching of the
reference waveform, depends on the method of control used in each application which defines
the angle (θ) of the triangular or sawtooth waveform required for each implementation. The two
variables, assuming controllers in the synchronous rotating reference frame (dq control), are
given in eq. (2.27) and (2.28). q
Vd2 + Vq2
M =2 (2.27)
Vd c
Vq
θ = t an −1 (2.28)
Vd
For the experimental implementation presented in this work, an open-loop controller is used so
both the MI and phase angle θ are defined as constants in the inputs of the system.
θ
90
t θ
90α
N
α1 t
-90
-α1
-αN
-90
Triangle
θ
waveform
generator
Controller PWM
Gate
Switching signals
M angle look -up
table
αN
α1 t
-α1
-αN
Figure 2.27. Implementation of QWS SHE-PWM
Fig. 2.29 shows the line-to-line voltage and corresponding spectrum with six switchings per
half-period from Set 2 (Fig. 2.10(c)), for fundamental frequency of 50 Hz and MI of 0.9. The
frequency and MI has been kept constant throughout the experiments. Fig. 2.29(b) shows the
line-to-line voltage and corresponding spectrum for the non-restricted HWS formulation with
7 switchings per quarter wave (Fig. 2.9(c)). The 5th (250 Hz) and 7th (350 Hz) harmonics are
eliminated from the output waveform spectrum and the first harmonic present in the line-to-line
spectrum is the 11th (550Hz) as shown in the cursors.
Similarly, Figs. 2.30 and 2.31 show the line-to-line voltages and harmonic spectra for a
selected solution with four and six harmonics eliminated, for both the restricted HWS and the
non-restricted HWS formulation. In Fig. 2.30, four harmonics are eliminated while controlling
the fundamental frequency component and the first harmonic in the spectrum is the 17th
(850 Hz) (Set2 for both formulations). Fig. 2.31 shows line-to-line waveforms with six eliminated
harmonics for fourteen and fifteen switchings per half-period. The first harmonic in the output
spectrum is the 23rd (1150 Hz) as shown by the corresponding cursors in the FFT function.
40
θ θ
π 2π
t t
θ θ
180 360
α2N α4N+2 t
t
α2 α2
α1 α1
Triangle
θ
Triangle θ
waveform waveform
generator generator
Controller PWM Controller PWM

Gate Gate
Switching signals Switching signals
M M angle look -up
angle look -up
table table
Restricted formulation Non-restricted formulation
α2N α2N α4N+2

t t α1 t
α1 α1
(a) (b)
Figure 2.28. Implementation of SHE-PWM, (a) HWS waveforms and (b) Non-symmetrical
waveforms
11th
13th
19th 17th
11th 23rd
17th 23rd 19th
13th
(a) (b)
Figure 2.29. Experimental results: Two harmonics eliminated, line-to-line voltages and
corresponding harmonic spectrum. Cursors of FFT at 50Hz and 550Hz (11th
harmonic) (a) 6 switchings (Set 2), (b) 7 switchings (Set 2)
17th
17th
31st 19th
23rd 23rd25th 31st
19th 25th 29th 29th
(a) (b)
Figure 2.30. Experimental results: Four harmonics eliminated, line-to-line voltages and
corresponding harmonic spectrum. Cursors of FFT at 50Hz, (a) 10 switchings
(Set 3), (b) 11 switchings (Set 5)
41
23rd
25th
29th 23rd 29th
25th 31st 35th 31st 37th
37th 35th
(a) (b)
Figure 2.31. Experimental results: Six harmonics eliminated, line-to-line voltages and
corresponding harmonic spectrum. Cursors of FFT at 50Hz and 1150Hz (23rd
harmonic), (a) 14 switchings (Set 5), (b) 15 switchings (Set 3)
The non-symmetrical formulation is also validated experimentally. Fig. 2.32a shows the
phase-voltage and corresponding spectrum while Fig. 2.32b shows the line-to-line voltage in the
case of non-symmetrical formulation. Even harmonics are not eliminated from the solutions
and are present in both the phase and line-to-line output voltage spectrum. The first harmonic
in the spectrum is the 16th (800 Hz).
17th
16th
6th 15th
9th12th 20th
3rd 19th
(a) (b)
Figure 2.32. Experimental results: Non-symmetrical formulations, (a) Leg voltage and
spectrum, (b) Line-to-line voltage and spectrum
42
2.6 Conclusion
The different formulations of two-level SHE-PWM are defined and analyzed in this Chapter.
Two formulations for the HWS SHE-PWM are proposed, and detailed solution sets are derived
for a number of eliminated harmonics from the output spectrum. The additional variables of
the HWS and non-symmetrical formulation of the problem increase the number of calculated
solution sets providing a larger solution space to the problem.
Non-symmetrical formulations do not provide similar characteristics with their HW and

QW counterparts and also exhibit sub-par harmonic performance due to reduced eliminated
harmonics and the presence of even harmonics in the output voltage and subsequently current
spectrum. The computational effort to calculate non-symmetrical solution sets significantly
increases and solution sets that exhibit no symmetry do not provide a viable alternative for
SHE-PWM modulated converters.
On the other hand, HWS solution sets provide similar performance to the well-known QWS
sets. Although the computational effort required to calculate the HWS solution sets increases,
the additional sets justify the computational effort. Implementation of both QW and HWS wave-
forms is similar and the change in symmetries does not alter the application of the technique on
PWM power converters.
The calculated solution sets are evaluated for their harmonic performance based on a har-
monic distortion factor, a harmonic loss factor and the amplitude of the non-eliminated triplen
harmonics. The evaluation identifies solution sets that exhibit superior harmonic performance.
Since each application has unique specifications and requirements, an evaluation of both QWS
and HWS waveforms for the specific application is necessary before selecting the best solution.
The validity of the theoretical considerations and calculations is verified through experimen-
tal work on a laboratory prototype two-level converter
Chapter 3
Multilevel Selective Harmonic

Elimination PWM
3.1 Introduction
This chapter analyzes the multilevel SHE-PWM (MSHE-PWM) and proposes its implementation
on hybrid converters such as the five-level hybrid cascaded converter and the seven-level ANPC
based hybrid cascaded converter. The problem formulations for five and seven-level converters
are presented in detail and solution trajectories for different number of harmonics eliminated
from the spectrum are presented for both cases. Similarly to the two-level SHE-PWM, the
solutions are evaluated based on various harmonic performance factors and based on their
continuity over the MI range. The application of multilevel SHE-PWM to hybrid converters is
proposed based on the restrictions imposed by such converter topologies. The MSHE-PWM
patterns are modified so that they provide concurrent elimination of harmonics and regulation
of the voltages in the hybrid converters.
The proposed formulations of MSHE-PWM and the requirements for the implementation
are validated through extensive simulation results. Experimental waveforms from laboratory
prototypes of a five-level hybrid cascaded converter and a seven-level ANPC-based hybrid
cascaded converter under the proposed modulation method are also provided.
43
44
3.2 Problem Formulation
The fundamental difference between the two-level and three-level SHE-PWM and SHE-PWM of
higher number of levels lies in the way the SHE-PWM is formulated. In the two and three-level
formulation, the problem is defined with a single system of equations over the whole MI range
and only varies if the number of eliminated harmonics changes. In the case of waveforms
with more than four levels the formulation of the problem depends on the distribution of the
switchings to the different levels of the waveform.
The distribution of switchings refers to the number of transitions in each of the levels of the
waveform and although the number of eliminated harmonics is not affected, it modifies the MI
range as it affects the volt-second content of the output voltage waveform.
Multilevel waveforms presented and analyzed in this chapter possess both HW and QW sym-
metries over the period. Half-wave and non-symmetrical waveforms have also been presented
[98], [102]–[104]. Unlike two-level waveforms, where non-symmetrical formulations affect only
the switchings and not the level of the voltage, such formulations in multilevel waveforms
cannot be applied for high modulation indices due to the reduced volt-second integral of the
waveforms and the irregular switching pattern in the waveform.
The acquisition of solution sets depends on the formulation of the problem. Additionally,
the multiple formulations due to the various distributions of switchings affect the continuity
of the sets and the MI range for each formulation. In order to provide a complete solution to
the problem, all possible combinations of switchings to the levels of the waveform need to be
considered.
3.2.1 Five-Level MSHE-PWM Waveforms
Generalized QW symmetrical five-level waveforms are shown in Fig. 3.1.
vA vA
N2 N2
2 p.u. 2 p.u.
N1 N1
1 p.u. 1 p.u.
N N
t t
 2  2
1 N
1
1 N 1
(a) (b)
Figure 3.1. Generalized five-level PWM waveforms, (a) even N, (b) odd N
The switchings are distributed to the two levels of the first quarter-period and assuming that
the number of switchings between the zero and first level are N1 (where N1 is always an odd
45
number in order to avoid the double step in the voltage waveform) and the total number of
switchings are equal to N , the equations describing the SHE-PWM are given in eqs. (3.1)–(3.3).
N1 N
(−1)i −1 cos(a i ) + (−1)i −1+N1 cos(a i ) = M
X X
(3.1)
i =1 i =N1 +1
N1 N
(−1)i −1 cos(5a i ) + (−1)i −1+N1 cos(5a i ) = 0
X X
(3.2)
i =1 i =N1 +1
N1 N
(−1)i −1 cos(na i ) + (−1)i −1+N1 cos(na i ) = 0
X X
(3.3)
i =1 i =N1 +1
where the MI is limited to

0≤M ≤2 (3.4)
the constraint imposed in the calculation of the solution sets in order to provide a realizable
waveform is:
π
0 < a1 < a2 < . . . < a N < (3.5)
2
and the amplitude of the fundamental frequency component is:
4·M
V1 = · Vd c (3.6)
π
The system of non-linear and transcendental equations with trigonometrical terms is solved
for a number of distributions to the two levels and a number of solution sets covering different
ranges for the MI are acquired. As expected multiple solution sets are available due to the nature
of the system of equations derived.
3.2.2 Seven-Level MSHE-PWM Waveforms
Generalized seven-level waveforms for even and odd numbers of switchings, assuming a QW and
HW symmetry, are shown in Fig. 3.2. The switchings are calculated over the quarter-period of the
waveform in order to control the fundamental frequency component of the output phase-voltage
waveform to the required level and eliminate low-order, non-triplen harmonics. The number
of harmonics eliminated from the output spectrum depends on the number of switchings
considered in each particular case [91],[92].
Due to the assumed symmetries, the switchings are distributed to the three levels of the
first quarter-period. The waveform is calculated so that the number of switchings between the
zero and first level is N1 , between the first and second level is N2 and between the second and
third level is N3 with the limitation of N1 and N2 being odd. The total number of switchings per
quarter-period is equal to N = N1 + N2 + N3 and can be either odd or even (Fig. 3.2a and b respec-
tively). The equations describing the seven-level SHE-PWM are eq. (3.7) for the fundamental
46
N3 vA N3
vA
3 p.u. 3 p.u.
N2 N2
2 p.u. 2 p.u.
N1 N N1 N
1 p.u. 1 p.u.
N N N N
t
1 2
t
1 2
 2  2
1 N 1
1 N 1
(a) (b)
Figure 3.2. Generalized seven-level PWM waveforms, (a) odd N, (b) even N
frequency component and eq. (3.8)–(3.9) for the fifth and higher order harmonics respectively.
N1 N1X
+N2 N
(−1)i +1 cos(a i ) + (−1)i cos(a i ) + (−1)i +1 cos(a i ) = M
X X
(3.7)
i =1 i =N1 +1 i =N1 +N2 +1
N1 N1X
+N2 N
(−1)i +1 cos(5a i ) + (−1)i cos(5a i ) + (−1)i +1 cos(5a i ) = 0
X X
(3.8)
i =1 i =N1 +1 i =N1 +N2 +1
N1 N1X
+N2 N
(−1)i +1 cos(na i ) + (−1)i cos(na i ) + (−1)i +1 cos(na i ) = 0
X X
(3.9)
i =1 i =N1 +1 i =N1 +N2 +1
The MI is limited as
0≤M ≤3 (3.10)
the switchings are limited in the quarter-period of the waveform
π
0 < a1 < a2 < . . . < a N < (3.11)
2
and the amplitude of the fundamental component is calculated by:
4·M
V1 = · Vd c (3.12)
π
The system of non-linear and transcendental equations with trigonometrical terms is solved
for a number of switchings per quarter-period of the waveform and for various distributions
(N1 /N2 /N3 ) to the three levels of the waveform and a number of solution sets covering different
ranges of the MI are acquired.
3.2.3 Waveforms with Even Number of Levels
Multilevel SHE-PWM waveforms are not only limited to waveforms with odd number of levels
( five-level, seven-level etc) but can also be applied to waveforms with even number of levels.
Converter topologies that can provide waveforms with even number of levels are limited and
examples include the four-level FC converter, a novel four-level converter as presented in [12]
and the eight-level hybrid cascaded converter [56]. The formulation of the problem for even
47
number of levels allows two different formulations depending on the amplitude of the levels
around the zero voltage level that is not present in the waveform. The formulation required is
specific in the operation of each topology. The first formulation considers equal amplitude of all
the levels in the output waveform and is given by eq. (3.13)–(3.14).
N1 N1X
+N2 N
(−1)i +1 cos αi + cos αi + . . . + cos αi = M
X X
0.5 − (3.13)
i =1 i =N1 +1 i =N1 +N2 +...+NK −1
N1 N1X
+N2 N
(−1)i +1 cos nαi +
X X
0.5 − cos nαi + . . . + cos nαi = 0 (3.14)
i =1 i =N1 +1 i =N1 +N2 +...+NK −1
The second formulation assumes a waveform where the zero level is not present in the waveform
and the middle voltage level is double the amplitude of the rest of the waveform levels. The
formulation in this case is given by
N1 N1X
+N2 N
(−1)i +1 cos αi + cos αi + . . . + cos αi = M
X X
1−2 (3.15)
i =1 i =N1 +1 i =N1 +N2 +NK −1
N1 N1X
+N2 N
(−1)i +1 cos nαi +
X X
1−2 cos nαi + . . . + cos nαi = 0 (3.16)
i =1 i =N1 +1 i =N1 +N2 +...+NK −1
3.3 Solution Patterns
3.3.1 Five-level Waveforms
This Section presents solution sets for five-level MSHE-PWM waveforms. The calculated so-
lutions consider seven, eleven and twelve switchings over the quarter-period in a number of
distributions to the different levels. In the case of seven switchings per quarter-period with the
limitation of an odd N1 , the possible distributions to the two-levels are three, namely (5/2, 3/4
and 1/6).
The system of equations is derived for the three previous distributions. Similar derivations
can be acquired for all other switchings and distributions to the various levels of the waveform
considered. For a distribution of 5/2, five switchings are distributed between the first and second
level of the waveform and two between the first and the second level. The system of equations,
for the fundamental frequency component and higher order harmonics is given by eq. (3.17)
and eq. (3.18) respectively.
cos α1 − cos α2 + cos α3 − cos α4 + cos α5 + cos α6 − cos α7 = M (3.17)

cos(nα1 ) − cos(nα2 ) + cos(nα3 ) − cos(nα4 ) + cos(nα5 ) + cos(nα6 ) − cos(nα7 ) = 0 (3.18)
Similarly, the fundamental component defining the MI and the higher order harmonics for the
3/4 and 1/6 distributions are given in eq. (3.19)–(3.20) and eq. (3.21)–3.22) respectively.
cos(α1 ) − cos(α2 ) + cos(α3 ) + cos(α4 ) − cos(α5 ) + cos(α6 ) − cos(α7 ) = M (3.19)

cos(nα1 ) − cos(nα2 ) + cos(nα3 ) + cos(nα4 ) − cos(nα5 ) + cos(nα6 ) − cos(nα7 ) = 0 (3.20)
48
cos α1 + cos α2 − cos α3 + cos α4 − cos α5 + cos α6 − cos α7 = M (3.21)

cos(nα1 ) + cos(nα2 ) − cos(nα3 ) + cos(nα4 ) − cos(nα5 ) + cos(nα6 ) − cos(nα7 ) = 0 (3.22)
3.3.1.1 Solution Trajectories
The systems of equations formulated through eq. (3.17)–(3.22) for the case of seven switchings
per quarter-period are solved through the same approach used in Section 2.2.4. Figs. 3.3–3.5
show the solution sets acquired for this formulation. Sets for eleven and twelve switchings for
various distributions are shown in Figs. 3.6-3.14.
π/2
π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
0.75 0.8 0.85 0.9 0.95 1 0.78 0.8 0.82 0.84 0.86 0.88 0.9 0.92
(a) (b)
Figure 3.3. Five-level MSHE-PWM solutions, 5/2 switching distribution, (a) Set 1 (0.8≤
M ≤0.97), (b) Set 2 (0.8≤ M ≤0.91)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0
1 1.05 1.1 1.15 1.2 1.25 1.3 1.35 1.4 0.95 1 1.05 1.1 1.15
(a) (b)
M ≤1.36), (b) Set 2(1≤ M ≤1.12)
49
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1.6 1.65 1.7 1.75 1.8 1.85 1.25 1.3 1.35 1.4 1.45 1.5 1.55
(a) (b)
M ≤1.8), (b) Set 2(1.3≤ M ≤1.53)
π/2
3π/8
angles in rad
π/4
π/8
0
0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95
Modulation Index (M)
(a)
Figure 3.6. Five-level MSHE-PWM solutions, 9/2 switching distribution, Set 1 (0.59≤
M ≤0.93)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.24 1.26 1.28 1.3 1.32 1.34 1.36
(a) (b)
M ≤0.99), (b) Set 2 (1.25≤ M ≤1.34)
50
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1 1.1 1.2 1.3 1.4 1.5 0.9 0.95 1 1.05 1.1
(a) (b)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1 1.1 1.2 1.3 1.4 1.5 1 1.05 1.1 1.15 1.2 1.25 1.3
(c) (d)
M ≤1.42), (b) Set 2 (0.92≤ M ≤1.06), (c) Set 3 (1.1≤ M ≤1.37), (d) Set 4 (1.04≤
M ≤1.26)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1.25 1.3 1.35 1.4 1.45 1.5 1.4 1.45 1.5 1.55 1.6 1.65
(a) (b)
M ≤1.49), (b) Set 2 (1.43≤ M ≤1.62)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1.54 1.56 1.58 1.6 1.62 1.64 1.66 1.68 1.7 1.55 1.6 1.65 1.7
(a) (b)
M ≤1.68), (b) Set 2 (1.56≤ M ≤1.68)
51
π/2
3π/8
angles in rad
π/4
π/8
0
1.05 1.1 1.15 1.2 1.25 1.3 1.35
(a)
Figure 3.11. Five-level MSHE-PWM solutions, 7/5 switching distribution, Set 1 (1.07≤
M ≤1.32)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1 1.1 1.2 1.3 1.4 1.5 1 1.05 1.1 1.15 1.2 1.25 1.3 1.35
(a) (b)
M ≤1.46), (b) Set 2 (1.04≤ M ≤1.32)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1.55 1.6 1.65 1.7 1.75 1.8 1.85 1.45 1.5 1.55 1.6 1.65 1.7
(a) (b)
M ≤1.81), (b) Set 2 (1.5≤ M ≤1.69)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1.54 1.56 1.58 1.6 1.62 1.64 1.66 1.68 1.54 1.56 1.58 1.6 1.62 1.64 1.66 1.68
(a) (b)
M ≤1.67), (b) Set 2 (1.56≤ M ≤1.67)
52
3.3.1.2 Harmonic Performance
The harmonic performance of various solution sets is analyzed based on the amplitude of triplen
harmonics that are not eliminated through the modulation and the amplitude of the first three
odd and non-triplen harmonics of the output spectrum.
Figs. 3.15–3.17 show the variation of the first three odd and non-eliminated harmonics (23rd,
25th and 29th harmonic) from the output spectrum and Figs. 3.18–3.20 the variation of the 3rd,
9th and 15th harmonic for the seven switchings and 5/2, 3/4 and 1/6 switching distributions
respectively.
0.2 0.2
Normalized Amplitude
0.15 0.15
0.1 0.1
0.05 0.05
0 0
0.75 0.8 0.85 0.9 0.95 1 0.78 0.8 0.82 0.84 0.86 0.88 0.9 0.92
(a) (b)
Figure 3.15. Variation of non-triplen harmonics vs. MI for the 5/2 switching distribution,
(a) Set 1, (b) Set 2, ——- 23rd, − − − 25th, · · · · · · 29th
0.25 0.25
0.2 0.2
0.15 0.15
0.1 0.1
0.05 0.05
0 0
0.95 1 1.05 1.1 1.15 1 1.1 1.2 1.3 1.4
(a) (b)
(a) Set 1, (b) Set 2, —— 23rd, − − − 25th, · · · · · · 29th
The main conclusion that can be derived from the previous evaluation is that the non-linear
nature of the solution cannot provide a closed formula for the evaluation of the solution sets but
an individual evaluation for each of the set needs to be performed.
In an analysis per individual solution set, different sets provide different harmonic profiles
either with increased triplen harmonic content or with increased harmonic content in the non
eliminated harmonics in the voltage spectrum. In any case, the first non eliminated harmonics
in the output spectrum are the ones with the major harmonic content of the waveform and will
require filtering from the output waveform.
Increasing the number of switchings in the top level of the waveforms is the case where
the operation of the converter in the over-modulation region can be achieved. The harmonic
53
0.2 0.2
0.15 0.15
0.1 0.1
0.05 0.05
0 0
1.6 1.65 1.7 1.75 1.8 1.25 1.3 1.35 1.4 1.45 1.5 1.55
(a) (b)
(a) Set 1, (b) Set 2, —— 23rd, − − − 25th, · · · · · · 29th
0.25 0.4
0.2
0.3
0.15
0.2
0.1
0.1
0.05
0 0
0.75 0.8 0.85 0.9 0.95 1 0.78 0.8 0.82 0.84 0.86 0.88 0.9 0.92
(a) (b)
Figure 3.18. Variation of triplen harmonics vs. MI for the 5/2 switching distribution,
(a) Set 1, (b) Set 2, —— 3rd, − − − 9th, · · · · · · 15th
0.3 0.4
0.3
0.2
0.2
0.1
0.1
0 0
0.95 1 1.05 1.1 1.15 1 1.1 1.2 1.3 1.4
(a) (b)
(a) Set 1, (b) Set 2, —— 3rd, − − − 9th, · · · · · · 15th
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0 0
1.6 1.65 1.7 1.75 1.8 1.25 1.3 1.35 1.4 1.45 1.5 1.55
(a) (b)
(a) Set 1, (b) Set 2, —— 3rd, − − − 9th, · · · · · · 15th
54
content in the triplen harmonics of the phase-voltage waveform is increased. A significant

increase is observed, particularly in the third harmonic. These results are consistent with the
triplen harmonic injection in the carrier based PWM that provides operation of converters in
the over-modulation region and extended range of operation.
3.3.2 Seven-level MSHE-PWM Waveforms
A number of different formulations to the problem are considered and presented in this section.
The first two formulations consider a fundamental switching frequency and one additional
switching per period resulting in three or four switchings per quarter-period (N =3 or N =4).
Seven-level SHE-PWM is defined by the system of equations shown in eq. (3.23)–(3.25) and eq.
(3.26)–(3.29) respectively.
cos(α1 ) + cos(α2 ) + cos(α3 ) = M (3.23)

cos(5 · α1 ) + cos(5 · α2 ) + cos(5 · α3 ) = 0 (3.24)
cos(7 · α1 ) + cos(7 · α2 ) + cos(7 · α3 ) = 0 (3.25)
cos(α1 ) + cos(α2 ) + cos(α3 ) − cos(α4 ) = M (3.26)

cos(5 · α1 ) + cos(5 · α2 ) + cos(5 · α3 ) − cos(5 · α4 ) = 0 (3.27)
An important aspect of this formulation is the fact that the system derived is unique over the
range of the MI and the solution sets derived are complete. This is unique to the formulation
with fundamental switching frequency and when additional switchings are considered, various
formulations with switching distributions to the three-levels should be considered.
Further formulations considered here and whose solution sets are presented in Section 3.3.2.1
include MSHE-PWM with eleven and twelve [35], seventeen and eighteen [92] switchings per
quarter-period of the waveform. All the possible combinations of switchings to the three-levels
of the first quarter period are considered.
3.3.2.1 Solution Trajectories
Figs. 3.21 and 3.22 show the solution trajectories when the fundamental switching frequency, as
defined in the system of eq. (3.23)–(3.25) is considered. There are two unique solution sets when
three switchings shown in Fig. 3.21a and 3.21b. The two solutions are calculated over different
range in the MI. When the formulation that considers four switchings per quarter-period is
considered, the number of solution sets increases to three as shown in Figs. 3.22a, 3.22b and
3.22c. The MI range is also different and the solutions remain continuous for a smaller range.
The main challenge of MSHE-PWM is providing solutions that cover the whole range of MI
55
π/2
π/2
3π/8
3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 1.45 1.5 1.55 1.6 1.65 1.7 1.75 1.8 1.85
(a) (b)
Figure 3.21. Seven-level MSHE-PWM solutions, fundamental switching frequency,

(a) Set 1 (1.15≤ M ≤2.51), (b) Set 2 (1.47≤ M ≤1.85)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1.8 1.85 1.9 1.95 2 2.05 2.1 2.15 2.2 1.5 1.6 1.7 1.8 1.9 2
(a) (b)
π/2
3π/8
angles in rad
π/4
π/8
0
1.9 2 2.1 2.2 2.3 2.4
(c)
Figure 3.22. Seven-level MSHE-PWM solutions, 4 switchings per quarter-period, (a) Set 1
(1.84≤ M ≤2.16), (b) Set 2 (1.49≤ M ≤1.98), (c) Set 3 (1.94≤ M ≤2.4)
with the least possible transitions between solution sets and the optimal harmonic performance.
In order to overcone the issue of discontinuity, formulations are treated combined with the
formulation that eliminates one additional harmonic. For this reason, the formulations with
eleven and twelve switchings are analyzed together. Figs. 3.23 - 3.29 show solution sets for eleven
switchings per quarter-period while Figs. 3.30–3.31 illustrate solution sets with twelve switchings
per quarter-period.
56
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1.5 1.55 1.6 1.65 1.7 1.75 1.8 1.85 1.5 1.55 1.6 1.65 1.7 1.75 1.8 1.85
(a) (b)
Figure 3.23. Seven-level MSHE-PWM solutions, 5/5/1 switching distribution, (a) Set 1
(1.55≤ M ≤1.81), (b) Set 2 (1.52≤ M ≤1.81)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1.55 1.6 1.65 1.7 1.75 1.8 1.85 1.6 1.65 1.7 1.75 1.8 1.85
(a) (b)
(1.56≤ M ≤1.81), (b) Set 2 (1.65≤ M ≤1.81)
π/2
π/2
3π/8
3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
2 2.05 2.1 2.15 2.2 2.25 2.3 1.5 1.55 1.6 1.65 1.7 1.75 1.8 1.85 1.9
(a) (b)
(2.05≤ M ≤2.29), (b) Set 2 (1.56≤ M ≤1.86)
57
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1.9 2 2.1 2.2 2.05 2.1 2.15 2.2 2.25 2.3
(a) (b)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1.55 1.6 1.65 1.7 1.75 1.8 1.9 1.95 2 2.05 2.1
(c) (d)
(1.91≤ M ≤2.27), (b) Set 2 (2.07≤ M ≤2.32), (c) Set 3 (1.56≤ M ≤1.78), (d) Set 4
(1.91≤ M ≤2.08)
π/2
π/2
3π/8
angles in rad
3π/8
angles in rad
π/4
π/4
π/8
π/8
0 0
1.9 1.95 2 2.05 2.1 2.15 2.2 2.25 1.7 1.75 1.8 1.85
(a) (b)
(1.91≤ M ≤2.23), (b) Set 2 (1.7≤ M ≤1.86)
ʌ/2
π/2
3ʌ/8 3π/8
angles in rad
angles in rad
ʌ/4 π/4
ʌ/8 π/8
0 0
2.1 2.15 2.2 2.25 2.3 2.35 2.4 1.95 2 2.05 2.1 2.15 2.2 2.25 2.3 2.35
(a) (b)
(2.12≤ M ≤2.37), (b) Set 2 (1.97≤ M ≤2.31)
58
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
2.45 2.5 2.55 2.6 2.65 2.7 2.52 2.54 2.56 2.58 2.6 2.62 2.64 2.66 2.68
(a) (b)
(2.47≤ M ≤2.67), (b) Set 2 (2.53≤ M ≤2.66)
π/2
3π/8
angles in rad
π/4
π/8
0
1.5 1.55 1.6 1.65 1.7 1.75 1.8 1.85
(a)
(1.55≤ M ≤1.81)
π/2 π/2
3π/8 3π/8
angles in rad
angles in rad
π/4 π/4
π/8 π/8
0 0
1.8 1.85 1.9 1.95 2 2.05 2.1 2.15 2.2 1.8 1.85 1.9 1.95 2 2.05
(a) (b)
(1.85≤ M ≤2.16), (b) Set 2 (1.85≤ M ≤2.02)
59
Similarly the sets for seventeen and eighteen switchings per quarter period and a QWS
formulation are shown in Figs. 3.32 and 3.33 respectively [92]. The solutions for a particular
distribution of angles to the levels of the waveform are multiple. Furthermore the solutions
overlap for different operating points while certain solutions are distributions are discontinuous
over the modulation index range. It is therefore necessary to select multiple patterns and
distributions of the angles in order to provide a complete solution over the whole modulation
index range and account for any discontinuities in the pattern. Additionally, the solutions need
to be evaluated so that those that exhibit better harmonic performance and are continuous over
a certain range can be selected. An evaluation of different solutions is given in the following
section.
60
/2 /2
3/8 3/8
a1...a17 (rad)
a1...a17 (rad)
/4 /4
/8 /8
M M
0 0
1.55 1.6 1.65 1.7 1.75 1.8 1.5 1.6 1.7 1.8 1.9 2 2.1
(a) (b)
/2 /2
3/8 3/8
a1...a17 (rad)
a1...a17 (rad)
/4 /4
/8 /8
M M
0 0
1.7 1.75 1.8 1.85 1.9 1.95 2 2.05 2.1 1.95 2 2.05 2.1 2.15 2.2 2.25
(c) (d)
( )
/2 /2
3/8 3/8
a1...a17 (rad)
a1...a17 (rad)
/4 /4
/8 /8
M M
0 0
2.1 2.2 2.3 2.4 2.5 2.6 2.25 2.35 2.45 2.55
(e) (f)
/2
/2
3/8 3/8
a1...a17 (rad)
a1...a17 (rad)
/4 /4
/8 /8
M
0 M
2.2 2.3 2.4 2.5 0
2.44 2.46 2.48 2.5 2.52 2.54
(g) (h)
Figure 3.32. Seven-level MSHE-PWM solutions with seventeen switchings per quarter-
period and the following switching distributions, (a) 7/7/3, (b) 5/5/7 ,
(c) 3/7/7, (d) 3/5/9, (e) 3/3/11, (f ) 1/5/11, (g) 1/3/13, (h) 1/1/15
61
/2 /2
3/8 3/8
a1...a18 (rad)
a1...a18 (rad)
/4 /4
/8 /8
M M
0 0
1.5 1.55 1.6 1.65 1.7 1.75 1.8 1.56 1.6 1.64 1.68 1.7
(a) (b)
( )
/2
/2
3/8
3/8
a1...a18 (rad)
a1...a18 (rad)
/4
/4
/8
/8
M M
0
0
1.7 1.75 1.8 1.85 1.9 1.95 2 1.75 1.8 1.85 1.9 1.95 2
(c) (d)
/2 /2
3/8 3/8
a1...a18 (rad)
a1...a18 (rad)
/4 /4
/8 /8
M M
0 0
2.05 2.15 2.25 2.35 2.45 2.1 2.2 2.3 2.4 2.5
(e) (f)
/2
3/8
a1...a18 (rad)
/4
/8
M
0
2.1 2.15 2.2 2.25 2.3 2.35 2.4 2.45 2.5 2.55 2.6
(g)
Figure 3.33. Seven-level MSHE-PWM solutions with eighteen switchings per quarter-
period and the following switching distributions, (a) 7/5/6, (b) 7/7/4,
(c) 3/9/6, (d) 3/7/8, (e) 3/5/10, (f ) 3/3/12, (g) 1/3/14
62
3.3.2.2 Harmonic Performance
An evaluation of the solution sets for seven-level waveforms can be performed similarly to the
five-level case presented in Section 3.3.1.2. Results from the case of three and four switchings
per quarter-period are presented here and the approach can be equally applied to all solutions
sets presented in this Chapter. Figs. 3.34 and 3.35 show the triplen harmonics (3rd, 9th and
15th) and odd, non triplen harmonics (11th, 13th and 17th) for the two sets of solutions for three
switchings per quarter-period. Figs. 3.36 and 3.37 show similar results for the four-switching per
quarter-period formulation of the problem
0.8 0.25
0.6 0.2
0.15
0.4
0.1
0.2
0.05
0 0
1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 1.4 1.5 1.6 1.7 1.8 1.9
(a) (b)
Figure 3.34. Variation of triplen harmonics vs. MI for three switchings per quarter-period,
(a) Set 1, (b) Set 2, —— 3rd, − − − 9th, · · · · · · 15th
0.25 0.25
0.2 0.2
0.15 0.15
0.1 0.1
0.05 0.05
0 0
1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 1.4 1.5 1.6 1.7 1.8 1.9
Modualtion Index (M) Modulation Index (M)
(a) (b)
Figure 3.35. Variation of non-triplen harmonics vs. MI for three switchings per quarter-
period, (a) Set 1, (b) Set 2, —— 11th, − − − 13th, · · · · · · 17th
63
0.4 0.8
0.3 0.6
0.2 0.4
0.1 0.2
0 0
1.8 1.9 2 2.1 2.2 1.4 1.5 1.6 1.7 1.8 1.9 2
(a) (b)
0.5
0.4
0.3
0.2
0.1
0
1.9 2 2.1 2.2 2.3 2.4 2.5
(c)
Figure 3.36. Variation of triplen harmonics vs. MI for four switchings per quarter-period,
(a) Set 1, (b) Set 2, (c) Set 3, —— 3rd, − − − 9th, · · · · · · 15th
0.4 0.2
0.3 0.15
0.2 0.1
0.1 0.05
0 0
1.8 1.9 2 2.1 2.2 1.4 1.5 1.6 1.7 1.8 1.9 2
(a) (b)
0.2
0.15
0.1
0.05
0
1.9 2 2.1 2.2 2.3 2.4 2.5
(c)
Figure 3.37. Variation of non-triplen harmonics vs. MI for four switchings per quarter-
period, (a) Set 1, (b) Set 2, (c) Set 3, —— 13th, − − − 17th, · · · · · · 19th
64
3.4 Multilevel SHE-PWM in Hybrid Converters
MSHE-PWM is applied to multilevel hybrid converters. Hybrid converters are cascaded con-
figurations of identical or different converter building blocks with reduced numbers of DC
sources providing additional numbers of levels to the output waveform. A number of hybrid
topologies have been proposed in the technical literature, based on configuration of the basic
multilevel converters as building blocks. These include the seven-level hybrid asymmetric
multilevel inverter [25], a nine-level hybrid converter based on the NPC topology with current
waveform conditioning [33]–[34] and multilevel hybrid configurations with two-level [28]-[30]
and H-bridge converters [37]–[38].
The number of semiconductor switches in each configuration, due to the use of additional
H-bridge cells increases compared to the standard topologies. This increase also affects cer-
tain reliability factors in the topologies as control, feedback and protection requirements are
increased. The additional elements in the power and control circuit also add up to the cost
of the final configuration. However, the increase in the quality of the output waveforms in
combination with filter minimization and the capability to reach higher voltage and power levels
makes hybrid multilevel converter topologies a viable alternative for medium and high power
applications.
This section considers the operation of the five-level hybrid cascaded converter based on
the cascaded connection of a two-level and an H-bridge converter [30] and a seven-level ANPC-
based hybrid cascaded converter under multilevel SHE-PWM [35]. The basic operating prin-
ciples and voltage balancing algorithms and methods for each converter are analyzed. The
implementation of MSHE-PWM is proposed and simulation and experimental results based on
laboratory prototypes of the two converters are presented.
3.4.1 Five-level Hybrid Cascaded Converter
The five-level hybrid cascaded inverter configuration is shown in Fig. 3.38. The single DC source
is connected to all phase legs of the conventional three-phase, two-level inverter and the H-
bridge cells utilize a capacitor as an individual voltage source. Assuming that the DC voltage is
equal to 2Vd c , then the voltage of the capacitor of the H-bridge cell has to be maintained to Vd c
so that a five-level waveform is synthesized in the output. Considering a split DC source, the
output of the two-level leg can be equal to either +Vd c or −Vd c . Table 3.1 shows the switching
states and possible output voltages of the converter.
The voltage of the capacitor is affected during the converter states that the capacitor is
connected to the load. These states occur when the output voltage levels are +2Vd c and −2Vd c
and during the zero voltage level. The first two cases (±2Vd c ) can only be acquired by a single
switching state combination, as shown in Table 3.1.
The change in the capacitor voltage also depends on the direction of the load current. The
zero level can be acquired by two different states. The combination of the two zero level states
generate the two switching functions (SF) of the five-level hybrid converter. The five-level output
65
VA VB VC
SA1 SA2 SB1 SB2 SC1 SC2
CA CB CC H-bridge
SA3 SA4 SB3 SB4 SC3 SC4 cells
SA5 SB5 SC5

Vdc
2Vdc
Two-level
SA6 SB6 SC6 Converter
Vdc
Figure 3.38. Circuit configuration of the three-phase, five-level hybrid cascaded inverter.
Table 3.1. V OLTAGE O UTPUT AND S WITCHING S TATES OF THE F IVE - LEVEL CASCADED
HYBRID CONVERTER
V A ,VB ,VC S1 S2 S3 S4 S5 S6
+2Vd c 0 1 1 0 1 0
Vd c 1 1 0 0 1 0
Vd c 0 0 1 1 1 0
0 (State 1) 1 0 0 1 1 0
0 (State 2) 0 1 1 0 0 1
−Vd c 0 0 1 1 0 1
−Vd c 1 1 0 0 0 1
−2Vd c 1 0 0 1 0 1
voltage is shown in Fig. 3.39a. The capacitor is connected in such a way so that its voltage is
opposite in polarity to the voltage of the lower phase-leg. Selection of the switching state is
performed so that, together with the direction of the load current, the voltage of the floating
capacitor is regulated within the predetermined limits.
The utilization of the two zero voltage output redundant states (State 1 and State 2) regulates
the voltage level of the capacitor of the H-bridge cell. The two different switching strategies for
attaining the same five-level output waveform are shown in Fig. 3.39. Figs.3.39b and c show
the output of the two-level converter for SF 1 and SF 2 . Similarly, the output of the H-bridge cell
under the two switching functions of the converter are given in Figs. 3.39d and e respectively.
There is no explicit need to know the capacitor current and only a voltage sensor is required
on the H-bridge cell. The selection of the redundant states is based on the direction of the
load current and the voltage across the capacitor so an output current sensor for each phase is
additionally required.
The main difference between the control of typical DC source based cascaded inverters and
the five-level hybrid cascaded converter is the balancing of the voltage of the floating H-bridge
cell capacitor. Regulation of the voltage of the capacitor to the required level is important to the
66
2Vdc
Vdc
-π/2 π/2
0
-Vdc
-2Vdc
(a)
Vdc Vdc
-π/2 π/2 -π/2 π/2
-Vdc -Vdc
(b) (c)
Vdc Vdc
-π/2
0 π/2 -π/2 0 π/2
-Vdc -Vdc
(d) (e)
Figure 3.39. Possible combinations of individual output voltages resulting in the five-
level waveform, (a) Five-level output phase-voltage, (b) Two-level pattern for
SF 1 , (c) Two level pattern for SF 2 , (d) H-bridge pattern for SF 1 , (e) H-bridge
pattern for SF 2
proper operation of the converter. As discussed earlier, the two states with which the zero level
voltage can be acquired are utilized in order to regulate the voltage to the required level.
The voltage of the capacitor can be maintained to the required level if the overall amount of
charge of the capacitor over a period is at least equal to the discharge amount of the capacitor
over a fundamental period. Since the only states that can be used for voltage regulation of
the capacitor are those of the zero level, the condition can be simplified for the charging and
discharging over the half-period. This restriction can be rewritten in terms of the load current as
shown in eqn. (3.30)
Z π Z π
|i char | d θ − |i d i schar | d θ > 0 (3.30)
0 0
where i char is the part of the load current charging the floating capacitor and its maximum
value is its integral over the zero level voltages and i d i schar the part of the current discharging the
capacitor and its value calculated by the integral over the time in the top level of the waveform.
For the case of fundamental frequency switching only one switching occurs between the two
levels and a single set of solutions only exists. Therefore a closed formula can be derived that
estimates the regulation of the voltage to the required level for a given displacement power
factor (DPF) angle and with the simplification of only fundamental frequency currents [29]. For
the case of SHE-PWM, the integrals of eq. (3.30) have to be evaluated independently for a given
solution set and DPF. This can be performed in mathematical package such as MATLAB [180].
Fig. 3.40 shows half a period of the five-level waveform and the fundamental component
67
of the current for two different power factors. Here, an switching distribution of 5/6 for a total
of eleven switchings over the quarter-period is considered. During the top level, the voltage of
the capacitor is affected by the direction of the current and during the zero level, the switching
states of the converter legs can be selected so that the capacitor either charges or discharges
depending on the instantaneous voltage and the limits to which the voltage is allowed to vary.
Current direction
dependant interval cosφ=1
Voltage Control cosφ=0.85
2 p.u. Interval
1 p.u.
π/2 ωt
  a10   a8   a6   a4   a2
a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11   a11   a9   a7   a5   a3   a1
Figure 3.40. Charging and discharging periods for the five-level waveform
For this distribution, the integral of charge and hence the limits of voltage control in the
converter is given by
Z α1 Z α3 Z α5 Z π−α4 Z π−α2 Z π
Charge = |i | d θ + |i | d θ + |i | d θ + |i | d θ + |i | d θ + |i | d θ
0 α α π−α5 π−α3 π−α1
Z α7 Z α9 2 Z α114 Z π−α10 Z π−α8 Z π−α6
− |i | d θ − |i | d θ − |i | d θ − |i | d θ − |i | d θ − |i | d θ (3.31)
α6 α8 α10 π−α11 π−α9 π−α7
Such calculations for the integrals can be calculated for different switching distributions, operat-
ing points of the converter and loads based on which the limits of operation of the converter
can be found. As the charging and discharging period of the converter depends on the phase
shift between the voltage and the current, loads with which are more inductive in nature operate
allow for operation at higher modulation index than loads with power factor closer to unity. The
multiple solutions of SHE-PWM, together with the irregularity in the patterns and pulse widths
due to the modulation technique mean that the limits for each application need to be evaluated
individually for each solution and operating point. Under any loading condition and operating
point, the five-level converter is capable of extending the range of the conventional two-level
converter when operated with the same DC-link voltage.
3.4.2 Seven-level ANPC-based Hybrid Cascaded Converter
The cascaded ANPC based multilevel converter is an arrangement of a three-level ANPC con-
verter and the H-bridge cell which are connected in series as shown in Fig. 3.41. The DC-link
consists of capacitors C 1 and C 2 providing the mid-point required for the three-level ANPC
converter. Considering a DC-link voltage of 4Vd c , each DC-link capacitor voltage is maintained
to an average of 2Vd c and the voltage of the H-bridge cell capacitor (C f ) is maintained at a
voltage equal to Vd c .
68
Three-level Active-Neutral
Point Clamped Converter
cell
+
S1
D1 D2 H-bridge cell
C1
2Vdc
S5 S2 S7 S9
D5 D7 D9
w Cf, A
4Vdc O
Vdc iA
S6 S8 S10
D6 D3 D8 D10
C2
2Vdc
S4 S3
D4
-
Figure 3.41. Circuit configuration of the hybrid seven-level ANPC-based multilevel con-
verter
The twenty four switching states of the converter are shown in Table 3.2. These states generate
the seven different voltage levels, namely, +3Vd c , +2Vd c , +Vd c , 0, −Vd c , −2Vd c and −3Vd c . The
switching states are the combination of the six switching states provided by the three-level ANPC
converter and the four switching states of the H-bridge cell. The voltage across the capacitor of
the H-bridge cell is affected when it is connected to the output terminal and one of the DC-link
terminals (positive DC rail, neutral point (’O’), negative DC-rail of Fig. 3.41). This occurs when
the output phase-voltage (V AO ) is equal to +3Vd c , +Vd c , −Vd c or −3Vd c . The voltage levels
+3Vd c and −3Vd c are generated by V1 and V24 respectively.
Since these voltage levels can be acquired by only one switching state (Table 3.2) and there
are no redundant states, the voltage across the H-bridge cell capacitor is determined by the
direction of the output phase-current. Regulation of the cell voltage to its reference voltage level
of +Vd c is done through utilization of the redundant switching states that generate +Vd c and
−Vd c During these switching states (V5 , V8 , V9 , V12 , V13 , V16 , V17 , and V20 ) the neutral point (’O’)
is connected to output through the which influence the neutral point voltage of the converter.
The effect of the switching states and the current direction on the deviation of the H-bridge cell
capacitor voltage is summarized in Table 3.3.
Regulation of the voltage of the H-bridge cell capacitor can be performed when the output
phase-voltage is equal to +Vd c and −Vd c and depends on the polarity of the output phase-
current and the selection of the switching state. The selection of the SF is summarized in Table
3.4. The application is similar to the five-level converter of the previous Section with a selection
between the two patterns of the converter. The two different switching strategies for attaining
the same seven-level output waveform are shown in Fig. 3.42. Figs.3.42b and c show the output
of the three-level ANPC converter for SF 1 and SF 2 . Similarly, the output of the H-bridge cell
under the two SFs of the converter are given in Figs. 3.42d and e respectively.
69
Table 3.2. S WITCHING S TATES OF THE S EVEN -L EVEL H YBRID ANPC- BASED C ASCADED
C ONVERTER
S1 S2 S3 S4 S5 S6 S7 S8 S9 S 10 Vr O
V1 0 1 1 0 3Vd c
V2 1 0 1 0 2Vd c
1 1 0 0 0 1
V3 0 1 0 1 2Vd c
V4 1 0 0 1 Vd c
V5 0 1 1 0 Vd c
V6 1 0 1 0 0
0 1 0 1 1 0
V7 0 1 0 1 0
V8 1 0 0 1 −Vd c
V9 0 1 1 0 Vd c
V10 1 0 1 0 0
1 0 1 0 0 1
V11 0 1 0 1 0
V12 1 0 0 1 −Vd c
V13 0 1 1 0 Vd c
V14 1 0 1 1 0
0 1 0 0 1 0
V15 0 1 0 1 0
V16 1 0 0 1 −Vd c
V17 0 1 1 0 Vd c
V18 1 0 1 0 0
0 0 1 0 0 1
V19 0 1 0 1 0
V20 1 0 0 1 −Vd c
V21 0 1 1 0 −Vd c
V22 1 0 1 0 −2Vd c
0 0 1 1 1 0
V23 0 1 0 1 −2Vd c
V24 1 0 0 1 −3Vd c
Table 3.3. E FFECT ON FC DURING DIFFERENT SWITCHING STATES OF THE SEVEN - LEVEL
HYBRID ANPC- BASED CASCADED CONVERTER
Effect on C f
Switching States
iA > 0 iA < 0
V1 ,V5 ,V9 ,
Discharging Charging
V13 ,V17 ,V21
V4 ,V8 ,V12 ,
Charging Discharging
V16 ,V20 ,V24
70
2Vdc
Vdc
-π/2 π/2
-Vdc
-2Vdc
(a)
2Vdc 2Vdc
-π/2 π/2 -π/2 π/2
-2Vdc -2Vdc
(b) (c)
Vdc Vdc
-π/2
0 π/2 -π/2 0 π/2
-Vdc -Vdc
(d) (e)
Figure 3.42. Switching patterns for voltage regulation of the H-bridge capacitor, (a) Seven-
level output phase-voltage, (b) ANPC converter pattern for SF 1 , (c) ANPC
converter pattern for SF 2 , (d) H-bridge pattern for SF 1 , (e) H-bridge pattern
for SF 2
Table 3.4. S ELECTION OF SWITCHING FUNCTIONS FOR THE SEVEN - LEVEL HYBRID
ANPC- BASED CASCADED CONVERTER
Switching functions
System State Effect on C f
vr O > 0 vr O < 0
v c f > Vd c + h SF 1 SF 2 Discharging
iA > 0
v c f > Vd c − h SF 2 SF 1 Charging
v c f > Vd c + h SF 2 SF 1 Discharging
iA < 0
v c f > Vd c − h SF 1 SF 2 Charging
71
3.4.2.1 Calculation of floating capacitor voltage ripple
The variation of the voltage in the capacitor of the H-bridge is given by
iA
∆V = · ∆t (3.32)
Cf
Considering a load impedance equal to Z , the current in the output is given by
4
iA = · M · Vd c · sin ωt (3.33)
πZ
and the voltage variation of eq. (3.32) can be rewritten as
4M
∆V = · Vd c · sin(ωt − φ) · ∆t (3.34)
πC f |Z |
where ∆t is the time duration between two switchings in the SHE-PWM waveform. ∆t is defined
by the selection of the switching pattern and additionally is a function of the operating point as
given by the MI.
As the voltage reference for the floating capacitor of the H-bridge is equal to Vd c , the normal-
ized voltage ripple can be calculated by
∆V 4
= · sin(ωt − φ) · M · ∆t (M ) (3.35)
Vd c πC f |Z |
For a given load, the variation of the voltage is a function of the DPF and the operating point.
As the switching patterns in multilevel SHE-PWM are non-linear functions, closed form solution
for the maximum capacitor voltage ripple cannot be mathematically derived but eq. (3.35) needs
to be numerically evaluated for each particular solution.
3.4.2.2 Effect of hysteresis band on switching frequency
The bands of the hysteresis controller defines the limits of the voltage ripple across the floating
capacitor and affect the switching frequency of the converter as it changes between SF 1 and
SF 2 in order to regulate the voltage within the limits. Selection of tight limits in the bands
results in an unreasonably high switching frequency due to the continuous switching between
the charging and discharging patterns. Furthermore, the tight bands cannot be maintained
during the ±2Vd c levels for all operating conditions. Selection of loose bands results in high
voltage ripple and sub-par harmonic performance from the converter, as shown in Fig. 3.43. The
effect of the band selection is shown in Fig. 3.44 for different operating points of the converter
with fundamental switching frequency (three switchings per quarter-period) and for different
selection of the hysteresis band limits. The maximum deviation of the floating capacitor voltage
is additionally dependent on the load of the converter and can be calculated from eq. (3.35).
Switching losses are proportional to the switching frequency and operation under tight bands
increases significantly the switching losses for the converter. The H-bridge experiences higher
72
Floating capacitor voltages

Vdc+h3
Vdc+h2
Loose limits
Tight limits
Vdc+h1
Vdc
Vdc-h1
Vdc-h2
Vdc-h3 αi+1 αi+2

αi
Figure 3.43. Effect of band selection in the switching frequency (h 1 : tight band, h 2 : inter-
mediate band, h 3 : loose band)
switching frequency than the ANPC converter but requires lower rated switches (2:1 ratio for
the seven-level converter) due to lower DC voltage. The unequal switching within the H-bridge
is due to the sub-optimal distribution of the zero voltage states and an additional logic for the
selection of the states can be implemented to alleviate this issue.
3.4.2.3 Limits of Operation
As described in Section 3.4.2, the redundant switching states of V AO = ± 1 p.u. are utilized to
regulate the voltages of the H-bridge cell capacitor while the voltages are also affected by the
± 3 p.u. levels. The voltage across the capacitors can be maintained to the required voltage
level if the overall amount of charge is at least equal to the discharge amount of the FC over a
fundamental period. Since the only states that can be used for the regulation of the voltages are
those of the ±1 p.u. voltage level, the condition can be simplified by analyzing the waveforms
over the half-period. The voltage balancing condition is given by eq. (3.36).
Z π Z π
|I char | d θ − |I d i schar | d θ > 0 (3.36)
0 0
where I char is the part of the output phase-current charging the FC and I d i schar discharging the
capacitor, respectively.
Based on eq. (3.36), the operating point of the converter defines the duration of the charging
and discharging intervals while the DPF of the load current should also be considered. The
calculation of the integrals of eq. (3.36) can be done for the two previous parameters in order to
estimate the limits of operation of the converter. When the total charge during the +Vd c interval
of the first half-period is greater than the discharge in the +3Vd c interval the regulation of the
voltage is possible. Fig. 3.45a and b show the evaluation of eq. (3.36) for the two solution sets
when three switchings are considered in the waveform. The area where the total integral is
positive defines the operating points and loading conditions for which regulation of the voltage
is possible.
Similarly, Fig. 3.46 shows the evaluation of the three solution sets (Fig. 3.22) for four switchings
per quarter-period of the waveform. Similar calculations with the operating point and DPF of the
73
100
(%) (%)
10 cycles
90
100
80
cycles
(%)
over 90
100
70
80
cycles
90
10
60
frequency
over
70
80
10
M =1.5 50
60
frequency
over
70
40
switching
M =1.5 50
60
frequency
30
40
switching
M =1.5 50
20
30
Normalized
40
switching
10
20
30
Normalized
0
10
20 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9
(%) (%) Normalized
2%Vdc 4%Vdc 6%Vdc 8%Vdc 10%Vdc

100 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9
Hysteresis band
0 2%Vdc 4%Vdc 6%Vdc 8%Vdc 10%Vdc
S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9 (a)S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9
100 Hysteresis band
10 cycles
90
100 Hysteresis band
cycles
80
90
(%)
100
over
70
80
cycles
90
frequency 10
60
over
70
80
10
50
frequency
60
over
M =1.7 70
40
switching
50
frequency
M =1.7 60
30
40
switching
M =1.7 50
20
30
Normalized
40
switching
10
20
Normalized
30
0
10
20
(%) (%) Normalized
S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9 S1 S3 S4 S5 S7 S9
0 2%Vdc 4%Vdc Hysteresis
6%Vdcband 8%Vdc 10%Vdc
100 Hysteresis band
(b) Hysteresis band
10 cycles
90
100
80
cycles
90
100
over(%)
70
80
cycles
90
10
60
frequency
over
M =1.85 70
80
10
50
60
frequency
over
M =1.85 70
40
50
switching
60
frequency
M =1.85
30
40
switching
50
20
30
40
Normalized
switching
10
20
30
Normalized
0
10
20
Normalized
0 Hysteresis band
Hysteresis band
Hysteresis band
(c)
Figure 3.44. Normalized switching instances vs. hysteresis band selection for various
operating points of the converter, (a) M = 1.5, (b) M = 1.7, (c) M = 1.85
74
load as parameters can be derived for the operation of the converter under multilevel SHE-PWM
with multiple switchings per level of the waveform and determine the limits of operation of the
topology.
2
Total Charge
0
−2
90 80
70 60 50 3
40 30 2 2.5
20 10 1.5
0 1
Displacement Angle Modulation Index (M)
(a)
0.5
Total Charge
−0.5
90 80
70 60 2
50 40 1.8
30 20 1.6
10 0 1.4
(b)
Figure 3.45. Limits of floating capacitor voltage regulation with three switchings per
quarter-period, (a) Set 1, (b) Set 2
1 1
Total Charge
Total Charge
0 0
−1 −1
90 80 90 80
70 60 50 2.2 70 60 50 2
40 30 2 2.1 40 30 1.8
20 10 1.9 20 10 1.6
0 1.8 0 1.4
Displacement Angle Modulation Index (M) Displacement Angle Modulation Index (M)
(a) (b)
2
Total Charge
−2
90 80
70 60 50 2.5
40 30 2.3 2.4
20 10 2.1 2.2
0 1.9 2
(c)
Figure 3.46. Limits of floating capacitor voltage regulation with four switchings per
quarter-period, (a) Set 1, (b) Set 2, (c) Set 3
75
3.5 Experimental Results
3.5.1 Five-level Hybrid Cascaded Converter
The theoretical considerations and simulation results are also verified in a laboratory proto-
type shown in Fig. 3.47. A single-phase, five-level hybrid converter was built using the FUJI
21MBI100TA-060 IGBT modules. The voltage regulation and SHE-PWM previously described
have been implemented on a dSPACE 1104 R&D DSP board. A number of cases are again
investigated as shown in Table 3.5.
Figure 3.47. Laboratory setup of the single-phase five-level hybrid cascaded inverter
Fig. 3.48a shows the line-to-neutral voltage and corresponding spectrum for a 7/4 switchings
distribution and M of 0.95 when load A is connected in the output. In accordance with the
simulation results [30], the first non-triplen harmonic appearing in the line-to-neutral spectrum
is the 35th (1750 Hz for a 50Hz AC system). The top waveform of Fig. 3.48b shows the load current
at the output of the single-phase topology and the bottom waveform shows the current through
the capacitor. The effect of the voltage regulation control can be seen in the lower waveform of
Fig. 3.48b. The currents through the capacitor are not identical over consecutive periods since
they depend on the actual voltage of the capacitor and the load current direction. Fig. 3.48c
shows the deviation of the voltage of the floating capacitor over 20 periods (0.4 seconds) and the
effect of the voltage regulation control on the floating capacitor voltage.
Similarly, Fig. 3.49 shows the five-level line-to-neutral output voltage of the topology and the
corresponding output waveform of the two-level leg. Here, a 5/7 switching distribution over the
two levels and a amplitude MI of M =1.15 are considered with load B connected in the output. As
in the case with the current through the capacitor, the individual voltage of either the two-level
or the H-bridge cell is not identical for consecutive periods but rather depends on the voltage
and charging condition of the floating capacitor. Finally, an switching distribution of 3/8 over
the two levels and amplitude MI of M =1.35 is considered. Load C (11Ω, 125mH) is connected
in the output of the single phase topology. Fig. 3.50a shows the line-to-neutral waveform and
corresponding voltage harmonic spectrum and Fig. 3.50b shows the load and capacitor current.
The highly inductive nature of the load results in sinusoidal currents and a significant boost
in the fundamental frequency component amplitude compared to the DC voltage used in the
converter.
76
(a) (b)
(c)
Figure 3.48. Experimental results: Five-level hybrid cascaded converter, load A, M =

0.95, switching distribution 7/4, (a) Phase-voltage and harmonic spectrum
[50V/div], (b) load and input capacitor current [2A/div], (c) Deviation of the
floating capacitor voltage from the regulated voltage [0.5V/div]
(a)
Figure 3.49. Experimental results: Five-level hybrid cascaded converter, load B, M = 1.15,
switching distribution 5/7, Phase-voltage and two-level converter voltage
output [50V/div]
77
Table 3.5. S IMULATION AND EXPERIMENTAL PARAMETERS OF THE FIVE - LEVEL HYBRID
CASCADED CONVERTER
DC Voltage 80 V
Capacitor Voltage 40 V
Capacitor Voltage Control Band ±0.5 V
Load A R=22 Ω, L=30 mH
Load B R=11 Ω, L=30 mH
Load C R=11 Ω, L=125 mH
(a) (b)
Figure 3.50. Experimental results: Five-level hybrid cascaded converter, load C, M =

1.35, switching distribution 3/8, (a) Phase-voltage and harmonic spectrum
[50V/div], (b) load and input capacitor current [2A/div]
3.5.2 Seven-level ANPC-based Hybrid Cascaded Converter
The theoretical considerations are verified through experiments on a single-phase laboratory

prototype connected to an RL load. The parameters of the experimental setup are given in
Table 3.6.
Table 3.6. PARAMETERS OF THE SEVEN - LEVEL ANPC- BASED HYBRID CASCADED
CONVERTER LABORATORY SETUP
DC-link Voltage 80 V
Flying Capacitor 1000 µ F
DC-link Capacitors 3300 µ F
Load A R=22Ω, L=30mH
Load B R=11Ω, L=30mH
Load C R=11Ω, L=125mH
Fig. 3.51a shows the output phase-voltage waveform and corresponding spectrum when
the converter is operated under fundamental frequency (staircase waveform) and for a MI of
M = 1.85 while Fig. 3.51b shows the load current. The first low-order, non-triplen harmonic in
the spectrum is the 11th (550Hz). Fig. 3.52a shows the output of the 3L-ANPC cell and Fig. 3.52b
78
the output voltage of the H-bridge cell. As discussed in the previous section, the voltage of the
two cells is asymmetrical over consecutive periods due to the selection of the switching patterns
that provide the voltage regulation for the H-bridge cell capacitor. The variation in the voltage of
the H-bridge capacitor is shown in Fig. 3.52c.
Experimental results for the extended cases of 4 switchings per quarter wave are presented
in Figs. 3.53–3.54. Fig. 3.53 shows the output phase-voltage and harmonic spectrum for
4 switchings per quarter-period and MI of M = 1.94. The first non-eliminated, non-triplen
harmonic in the output phase-voltage spectrum is the 13th (650Hz). The load current is also
shown in Fig. 3.53a. The voltages of the individual cells of the converter, voltage regulation of
the H-bridge capacitor and output phase-current are shown in Figs. 3.54a–c.
The seven-level ANPC based hybrid topology is also operated with multiple switchings per
quarter-period under MSHE-PWM. The experimental results with 11 switchings in a distribution
of 3/5/3 to the three-levels and for a MI of M = 2.24 are given in Figs. 3.55–3.56. The output
phase-voltage harmonic spectrum of Fig. 3.55 shows that the first harmonic in the output is
the 35th (1750Hz). The range of the MI that can be achieved depends on the DPF of the load
at the output of the converter. The highly inductive nature of the load results in sinusoidal
currents in the output (Fig. 3.55b) while the H-bridge capacitor is maintained to the required
level (Fig. 3.56c).
One additional switching is considered in the top level (3/5/4 distribution of switchings to
the three levels). The experimental results are shown in Figs 3.57–3.58.
3rd 9th 11th

13th 15th
(a) (b)
Figure 3.51. Experimental results: seven-level ANPC-based hybrid cascaded converter,

N=3, M =1.85 and load A (cont.), (a) Output phase-voltage and corresponding
harmonic spectrum [50V/div], (b) Output phase-current [2A/div]
79
(a) (b)
(c)

N=3, M =1.85 and load A, (a) Output phase and 3L-ANPC voltages [50V/div],
(b) H-bridge output voltage [20V/div], (c) H-bridge capacitor voltage [5V/div]
13th
3rd 9th 15th 17th19th
(a) (b)

N=3, M =1.85 and load A (cont.), (a) Output phase-voltage and corresponding
80
(a) (b)
(c)

N=4, M =1.94and load A (cont.), (a) Output phase and 3L-ANPC voltages
[50V/div], (b) H-bridge output voltage [20V/div], (c) H-bridge capacitor volt-
age [10V/div]
3rd 9th 15th 33rd 35th 37th 39th
(a) (b)

N=11, M =2.24 and load C (cont.), (a) Output phase-voltage and correspond-
ing harmonic spectrum [50V/div], (b) Output phase-current [2A/div]
81
(a) (b)
(c)

N=11, M =2.24 and load C, (a) Output phase and 3L-ANPC voltages [50V/div],
(b) H-bridge output voltage [20V/div], (c) H-bridge capacitor voltage ripple
[2V/div]
9th
15th 21st 33rd
27th 37th 39th
(a) (b)

N=12, M =2.1 and load C (cont.), (a) Output phase-voltage and corresponding
82
(a) (b)
(c)

N=12, M =2.1 and load C, (a) Output phase and 3L-ANPC voltages [50V/-
div], (b) H-bridge output voltage [20V/div], (c) H-bridge capacitor voltage
[10V/div]
83
3.6 Conclusion
Multilevel converters provide high quality output waveforms and efficient power conversion
utilizing medium voltage semiconductor devices. This chapter analyzes the MSHE-PWM and
more specifically five- and seven-level SHE-PWM waveforms. Detailed solution patterns for
a number of formulations and switching distribution to the various levels of the waveforms
are presented and a performance evaluation based on different harmonic factors is also per-
formed. The application of SHE-PWM in such topologies provides significant advantages such
as improved harmonic spectrum and reduces switching frequency over the carrier and sampling
based PWM methods.
The application of MSHE-PWM to hybrid converters is also proposed. Hybrid topologies

provide extension in the number of levels in the output waveforms of typical converters without
additional DC sources. The different patterns for the operation of a five-level hybrid cascaded
converter and a seven-level ANPC based converter are derived. Under the proposed implemen-
tation, the converters are operating with MSHE-PWM while maintaining the floating capacitor
voltages to the required levels and without a significant increase in the switching frequency and
provide improved waveforms when compared to the standard two and three-level topologies of
the main converters.
Experimental results from laboratory prototype setups and for different operating and load
conditions are presented that verify the theoretical considerations and the proposed implemen-
tations.
Chapter 4
MSHE-PWM technique with

Variable DC levels
4.1 Introduction
This chapter proposes a novel formulation of the MSHE-PWM technique with variable DC
voltage levels suitable for high-power VSC based applications with independent DC sources. This
work reformulates the problem so that the amplitude of the DC voltage sources are considered
variables within certain constraints. The degrees of freedom increase by the number of levels
in the considered topology, when compared to the existing family of SHE-based multilevel
modulation for the same physical structure. The additional degrees of freedom allow the
elimination of a greater number of harmonics for the same number of switchings instants
within the period. Moreover, with the proposed approach, the solution of the switchings can be
calculated for a larger MI range. The waveform maintains the full number of levels for a larger
range and the waveform offers improved harmonic performance at lower modulation indices.
Solution trajectories for the switchings and voltage levels are presented for different formula-
tions considering five- and seven-level waveforms. The results are validated through simulations
and selected experimental results for both the five- and the seven-level case.
84
85
4.2 Problem Formulation
Fig. 4.1 shows a three-phase multilevel CHB VSC and a generalized MSHE-PWM output voltage
waveform with variable levels in the output is given in Fig. 4.2. For the general case, a converter
with K variable DC sources is considered together with a waveform with N switchings per
quarter-period while maintaining the QW symmetry.
vA vB vC
VDC1 VDC1 VDC1
VDC2 VDC2 VDC2
Phase A Phase B Phase C
VDCK VDCK VDCK
Figure 4.1. Three-phase CHB multilevel converter with variable DC voltages
4.2.1 Variable Levels
Considering the generalized multilevel waveform of Fig. 4.2, the Fourier coefficients of the
output phase-voltage can be expressed as:
∞
X
v AO = B n sin nθ (4.1)
n=1,3,5,...
where B n is given by:
N1 N1X
+N2 N
4
(−1)i cos nαi +VDC 2 (−1)i +1 cos nαi +. . .+VDC K (−1)i cos nαi )
X X
Bn = (VDC 1
nπ i =N1 i =N1 +1 i =N1 +N2 +...+NK −1 +1
(4.2)
where n = 1, 3, ....2(N +K )−1 for single-phase systems and n = 1, 5, ....3(N +K )−1 for three-phase
systems, while a i defines the i -th switching in the multilevel waveform.
Eq. (4.2) possesses N + K unknown variables (i.e. the switchings a 1 , a 2 , . . . , a N and the ampli-
86
va
NK
VDC1  VDC 2    VDCK
N1 N
N2
VDC1  VDC 2
N1
VDC1
4 5 6 t

1 2 3 2
Figure 4.2. Quarter-period of a generalized MSHE-PWM waveform with variable voltage

levels
tudes of the voltage levels VDC 1 ,VDC 2 , . . . ,VDC K ) and a set of solutions is obtainable by equating
(N + K − 1) odd and non-triplen, high order harmonics to zero while regulating the amplitude of
the fundamental frequency component to the required level as defined by the MI.
Therefore, a cost function describing the effectiveness in eliminating the selected harmonics
from the output spectrum while controlling the fundamental frequency component to the
required value is defined by
C (a 1 , a 2 , . . . , a N ,VDC 1 ,VDC 2 , . . . ,VDC K ) = (b 1 − M )2 + b 32 + . . . + b n2 (4.3)
where the fundamental frequency component is given by
4
V1 = M (4.4)
π
and M is the MI. The switchings are obtained by minimizing eq. (4.3), subject to the constraints
of equations (4.5) and (4.6).
π
(0 < α1 < α2 < . . . < αN < ) (4.5)
2
Vmi n ≤ VDC i ≤ Vmax (4.6)
The constraints are imposed on the formulation to ensure that the resultant waveform is realiz-
able and physically correct. Specifically equation (4.6) assures that the levels of the DC voltage
remain within the predetermined limits of the DC link regulation. In this work for simplicity, the
amplitude of the DC voltage sources is considered to have values ranging between 0.1 p.u. and
1.0 p.u but the values would be limited by the DC voltage regulation.
87
4.2.2 Reduced Variable Levels
The formulation of Section 4.2.1 considers all levels in the output waveform to be variable.
This allows the elimination of additional harmonics from the output spectrum. The number of
additional harmonics eliminated from the output waveform spectrum is equal to the number
of levels in the first quarter-period of the output voltage waveform. However, the number of
levels that are variable in a waveform can be arbitrarily selected between none (which leads to
the MSHE-PWM problem formulation discussed in Chapter 3) to the total number of levels, K .
When selecting a reduced number of variable levels, the number of harmonics eliminated from
the output spectrum decreases together with the complexity of the system as fewer DC voltage
sources need to be controlled, simplifying the converter structure.
The problem is formulated similarly to eq. (4.2) while considering certain of the voltage levels
(VDC 1 ,VDC 2 , . . . ,VDC K ) are equal to one p.u. as per eq. (4.2) and considering a reduced number
of harmonics in the problem formulation.
N1 N1X
+N2 N
4 X
( (−1)i cos nαi + (−1)i +1 cos nαi + . . . + VDC K (−1)i cos nαi )
X
bn =
nπ i =1 i =N1 +1 i =N1 +N2 +...+NK −1 +1
(4.7)
4.3 Solution Trajectories
4.3.1 Five-level Waveforms
A five-level waveform is initially implemented with six switchings, considering three transitions
between the zero and first level (N1 = 3) and three between the first and the second level of the
waveform (N2 = 3). The six switchings together with the two voltage levels provide eight variables
in the problem formulation, that eliminate the first seven odd and non-triplen harmonics (5th,
7th, 11th, 13th, 17th, 19th, 23rd) while controlling the amplitude of the fundamental frequency
component to the required level. The fundamental frequency component is given by eq. (4.8)
and the higher order harmonics are given by eq. (4.9).
V1 = VDC 1 (cos α1 − cos α2 + cos α3 ) + VDC 2 (cos α4 − cos α5 + cos α6 ) (4.8)
Vn = VDC 1 (cos nα1 − cos nα2 + cos nα3 ) + VDC 2 (cos nα4 − cos nα5 + cos nα6 ) (4.9)
Two solution sets are calculated for this formulation and presented in Figs. 4.3–4.4.
88
π/2 1.2
Voltage levels (p.u.)

3π/8 1
angles in rad
VDC2
0.8
π/4
0.6 VDC1
π/8
0.4
0 0.2
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
(a) (b)
Figure 4.3. Five-level variable MSHE-PWM, 3/3 switching distribution, Set 1, (a) Switching
trajectories, (b) Voltage levels
π/2
1

3π/8
0.8
Angles in rad
VDC2 VDC1
π/4
0.6
π/8 0.4
0 0.2
0.8 1 1.2 1.4 1.6 1.8 0.8 1 1.2 1.4 1.6 1.8 2
(a) (b)
Another example of a five-level waveform considers eight switchings over the quarter-period
with a N1 /N2 = 3/5 distribution to the two levels of the waveform. The target in this case is to find
the optimal switchings and amplitudes of the DC voltage sources that eliminate the first nine
odd and non-triplen, low order harmonics (up to the 29th) while controlling the fundamental
frequency component. The problem exhibits multiple solution sets, which cover a larger MI
range when compared to the formulation with constant DC levels. The solution sets to the
problem (switchings and voltage levels) are shown in Figs. 4.5–4.7.
1
π/2
Voltage level (p.u.)
0.8
3π/8 VDC1
angles in rad
0.6
π/4 VDC2
π/8 0.4
0 0.2
0.4 0.6 0.8 1 1.2 1.4 1.6 0.4 0.6 0.8 1 1.2 1.4 1.6
(a) (b)
89
π/2 1
0.8

3π/8 VDC1
angles in rad
0.6
π/4
0.4
VDC2
π/8
0.2
0 0
0.4 0.6 0.8 1 1.2 1.4 0.4 0.6 0.8 1 1.2 1.4 1.6
(a) (b)
π/2
1

3π/8 0.8
angles in rad
VDC1
π/4 0.6
π/8 VDC2
0.4
0 0.2
0.4 0.6 0.8 1 1.2 1.4 1.6 0.4 0.6 0.8 1 1.2 1.4 1.6
(a) (b)
Solution sets for eleven switchings per quarter-period with two variable voltage levels are
also presented in Figs. 4.8–4.21. Two distributions of switchings to the levels of the waveform
are considered, that provide elimination of twelve odd and non triplen low-order harmonics
while maintaining the fundamental component to the required level. A similar formulation
with eleven switchings per quarter-period can eliminate ten odd and non-triplen low order
harmonics from the output voltage waveform. The first distribution considers five switchings in
the lower level and six in the upper (N1 /N2 = 5/6) while the second distribution three switchings
in the lower level and eight in the upper level of the waveform. Figs. 4.8–4.15 show the sets for
the 5/6 and Figs. 4.16–4.21 for the 3/8 switching distribution.
π/2 1
3π/8 0.8 VDC2

angles in rad
π/4 0.6
VDC1
π/8 0.4
0 0.2
0.4 0.6 0.8 1 1.2 0.4 0.6 0.8 1 1.2
(a) (b)
90
π/2 1

3π/8 0.8
angles in rad
VDC2
π/4 0.6
VDC1
π/8 0.4
0 0.2
0.4 0.6 0.8 1 1.2 1.4 0.4 0.6 0.8 1 1.2 1.4
(a) (b)
π/2 1
Voltage Levels (p.u.)

3π/8 0.8
angles in rad
VDC2
π/4 0.6
VDC1
π/8 0.4
0 0.2
0.4 0.6 0.8 1 1.2 0.4 0.6 0.8 1 1.2
(a) (b)
Figure 4.10. Five-level variable MSHE-PWM, 5/6 switching distribution, Set 3, (a) Switch-
ing trajectories, (b) Voltage levels
π/2 1
3π/8 0.8
angles in rad
VDC1
0.6
π/4
0.4
VDC2
π/8
0.2
0 0
0.4 0.6 0.8 1 1.2 0.4 0.6 0.8 1 1.2
(a) (b)
π/2 1
0.8
3π/8
VDC1
angles in rad
0.6
π/4
0.4
π/8 VDC2
0.2
0 0
0.4 0.6 0.8 1 1.2 0.4 0.6 0.8 1 1.2
(a) (b)
91
π/2 1
0.8

3π/8
VDC1
angles in rad
0.6
π/4
0.4
π/8 VDC2
0.2
0 0
0.4 0.6 0.8 1 1.2 0.4 0.6 0.8 1 1.2
(a) (b)
π/2 1

0.8
3π/8 VDC1
angles in rad
0.6
π/4
0.4
VDC2
π/8
0.2
0 0
0.4 0.6 0.8 1 1.2 0.4 0.6 0.8 1 1.2
(a) (b)
π/2 1
3π/8 0.8
angles in rad
VDC1
π/4 0.6
VDC2
π/8 0.4
0 0.2
0.4 0.6 0.8 1 1.2 1.4 0.4 0.6 0.8 1 1.2 1.4
(a) (b)
π/2 1
3π/8 0.8
angles in rad
VDC1
π/4 0.6
VDC2
π/8 0.4
0 0.2
0.4 0.6 0.8 1 1.2 1.4 1.6 0.4 0.6 0.8 1 1.2 1.4 1.6
(a) (b)
92
π/2 1

3π/8
angles in rad
0.8
VDC1
π/4 VDC2
0.6
π/8 0.4
0 0.2
0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
Modulation index (M) Modulation Index (M)
(a) (b)
π/2 1

3π/8 0.8
angles in rad
VDC1
π/4 0.6
VDC2
π/8 0.4
0 0.2
0.4 0.6 0.8 1 1.2 1.4 0.4 0.6 0.8 1 1.2
(a) (b)
π/2 1
3π/8 0.8
angles in rad
VDC2
π/4 0.6
VDC1
π/8 0.4
0 0.2
0.4 0.6 0.8 1 1.2 0.4 0.6 0.8 1 1.2
(a) (b)
π/2 1
3π/8 0.8
angles in rad
VDC2
π/4 0.6
VDC1
π/8 0.4
0 0.2
0.4 0.6 0.8 1 1.2 1.4 0.4 0.6 0.8 1 1.2 1.4
(a) (b)
93
π/2 1

3π/8 0.8
angles in rad
VDC1
π/4 0.6
π/8 0.4
VDC2
0 0.2
0.4 0.6 0.8 1 1.2 1.4 0.4 0.6 0.8 1 1.2 1.4
(a) (b)
4.3.2 Seven-level Waveforms
The formulation of MSHE-PWM with variable levels is extended to seven-level waveforms and
an MSHE-PWM waveform with eleven switchings per quarter-period is analyzed, considering
various distributions of switchings to the levels of the waveform. The fundamental frequency
component of the waveform for this formulation and the high order harmonics are given in eqs.
(4.10) and (4.11).
N1 N1X
+N2
(−1)i +1 cos αi + VDC 2 (−1)i cos αi
X
V1 = VDC 1
i =1 i =N1 +1
N
(−1)i +1 cos αi
X
+ VDC 3 (4.10)
i =N1 +N2 +1
N1 N1X
+N2
(−1)i +1 cos nαi + VDC 2 (−1)i cos nαi
X
Vn = VDC 1
i =1 i =N1 +1
N
(−1)i +1 cos nαi
X
+ VDC 3 (4.11)
i =N1 +N2 +1
where VDC 1 ,VDC 2 and VDC 3 are the amplitudes of the three DC voltages and N1 , N2 and N3 are
the numbers of switchings distributed to the three levels of the waveforms. The one additional
variable level in the waveform provides elimination of one additional harmonic in the output
of the converter for the same number of switchings compared to the five-level formulation.
Figs. 4.22–4.24 show solution sets (Switching trajectories and voltage levels) for an switching
distribution of 3/5/3 to the three levels of the first quarter-period of the waveform. Figs. 4.25–
4.26, 4.27–4.28, 4.29–4.30 and 4.31–4.32 show solution trajectories for N1 /N2 /N3 equal to 5/3/3,
3/3/5, 1/5/5 and 1/1/9 respectively.
94
π/2
1
VDC1
3π/8 VDC2
0.9

Angles in rad
0.8
π/4
0.7
VDC3
π/8
0.6
0 0.5
1.45 1.5 1.55 1.6 1.65 1.7 1.45 1.5 1.55 1.6 1.65 1.7
(a) (b)
Figure 4.22. Seven-level variable MSHE-PWM, 3/5/3 switching distribution, Set 1,

(a) Switching trajectories, (b) Voltage levels
π/2 1

3π/8 VDC2
angles in rad
0.8
VDC1
π/4
0.6
π/8 VDC3
0 0.4
1.5 1.6 1.7 1.8 1.9 2 1.4 1.5 1.6 1.7 1.8 1.9 2
(a) (b)

π/2
1
3π/8
0.9
VDC1
angles in rad
0.8
π/4 VDC2
0.7
VDC3
π/8
0.6
0 0.5
1.6 1.7 1.8 1.9 2 2.1 2.1 1.6 1.7 1.8 1.9 2 2.1
(a) (b)

π/2 1
VDC2
3π/8 0.9
angles in rad
0.8
π/4 VDC1
0.7
π/8 VDC3
0.6
0 0.5
1.3 1.4 1.5 1.6 1.7 1.8 1.3 1.4 1.5 1.6 1.7 1.8
(a) (b)

95
π/2
1
VDC1
3π/8 0.9

angles in rad
0.8
π/4 VDC2
0.7
π/8 VDC3
0.6
0 0.5
1.35 1.4 1.45 1.5 1.55 1.6 1.65 1.35 1.4 1.45 1.5 1.55 1.6 1.65
(a) (b)

π/2 1

3π/8 VDC2
angles in rad
0.9
VDC1
π/4
VDC3
0.8
π/8
0 0.7
1.6 1.7 1.8 1.9 2 2.1 2.2 1.6 1.7 1.8 1.9 2 2.1 2.2
(a) (b)

π/2 1
VDC1
3π/8
angles in rad
0.8
π/4 VDC2
0.6
π/8
VDC3
0 0.4
1.6 1.7 1.8 1.9 2 2.1 1.6 1.7 1.8 1.9 2 2.1
(a) (b)

π/2
1
VDC2
3π/8 0.9
VDC1
angles in rad
0.8
π/4
0.7
π/8 VDC3
0.6
0 0.5
1.9 1.95 2 2.05 2.1 2.15 2.2 1.9 1.95 2 2.05 2.1 2.15 2.2
(a) (b)

96
π/2 1
3π/8

VDC2 VDC3
angles in rad
0.95
π/4 VDC1
0.9
π/8
0 0.85
1.95 2 2.05 2.1 2.15 2.2 1.95 2 2.05 2.1 2.15 2.2
(a) (b)

π/2 1
3π/8
angles in rad
0.8
VDC1
π/4
VDC2 VDC3
0.6
π/8
0 0.4
1 1.2 1.4 1.6 1.8 2 2.2 1 1.2 1.4 1.6 1.8 2 2.2
(a) (b)

π/2 1
3π/8 0.8 VDC1

angles in rad
π/4 0.6 VDC3
π/8 VDC2
0.4
0 0.2
1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8
(a) (b)

97
4.3.3 Reduced variable levels
The reduction in the number of variable levels in the output voltage waveform leads to a reduc-
tion in the harmonics that can be eliminated from the output spectrum. Figs. 4.33–4.35 show
switching and voltage level trajectories for eleven switchings per quarter-period when two out
of the three levels are considered variable and for switching distributions of N1 /N2 /N3 equal to
1/1/9, 1/3/7 and 3/3/5 respectively. Finally, when only one voltage level is considered variable
one less harmonic is controlled. switching and voltage level trajectories for one variable voltage
level is given in Fig. 4.36
π/2 1
VDC3
3π/8

0.8
angles in rad
π/4 0.6
π/8 0.4 VDC2
0 0.2
1.7 1.75 1.8 1.85 1.9 1.95 2 2.05 2.1 1.7 1.75 1.8 1.85 1.9 1.95 2 2.05 2.1
(a) (b)
Figure 4.33. Seven-level variable MSHE-PWM with two variable DC levels, 1/1/9 switching
distribution, (a) Switching trajectories, (b) Voltage levels
π/2 1
3π/8 VDC3
0.8
angles in rad
π/4 0.6
VDC2
π/8 0.4
0 0.2
1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4
(a) (b)
98
π/2 1
3π/8

0.8
VDC3
angles in rad
π/4 0.6
VDC2
π/8 0.4
0 0.2
1.5 1.6 1.7 1.8 1.9 2 1.5 1.6 1.7 1.8 1.9 2
(a) (b)
π/2
0.72
3π/8
Voltage Level (p.u.)

angles in rad
0.7
π/4
VDC3
0.68
π/8
0 0.66
2.1 2.15 2.2 2.25 2.3 2.1 2.15 2.2 2.25 2.3 2.35
(a) (b)
Figure 4.36. Seven-level variable MSHE-PWM with one variable DC level, 1/1/9 switching
distribution, (a) Switching trajectories, (b) Voltage Level
4.4 Harmonic Performance
An important advantage of the formulation of MSHE-PWM with variable voltage levels is the
reduced harmonic distortion and the overall improved harmonic performance in the output
waveform when compared to the MSHE-PWM with constant voltage levels. The gain that is
derived from the extra harmonics eliminated, comes at the cost of the increased complexity
in the regulation of the DC voltages for the modules of the topology. The reduced harmonic
distortion is a combined effect of two properties of the modified formulation. Firstly, additional
harmonics are eliminated from the output spectrum of the waveform due to the additional
variables. Secondly, the reduced voltage steps in the output waveform due to the variable
voltages that are typically below 1 p.u. for most of the modulation indices resulting in reduced
dV /d t and lower harmonic distortion.
Several aspects are considered for comparing the proposed approach with MSHE-PWM
including the range of the MI including the number of solution sets, eliminated harmonics and
the two harmonic quality indices considered in Chapter 2 and 3, namely the total harmonic
distortion (%THD) and harmonic distortion factor (%HDF).
From Table 4.1 with the proposed formulation, additional harmonics can be eliminated and,
furthermore, the sets acquired possess a continuous set over a wider MI range. The harmonics
performance evaluation is done based on the %THD as given in eq. (4.12) and %HDF as given in
99
Table 4.1. S UMMARY OF SOLUTION SETS FOR THE VARIABLE MSHE-PWM
All Constant One Variable Two variables All Variables

Number of solution sets 4 1 4 6
Solution Range 3.16-3.39 2.74-2.89 2.22-2.57 1.90-2.33
3.22-3.39 1.90-2.55 1.90-2.55
3.28-3.37 2.05-2.71 1.91-2.84
3.30-3.37 2.36-2.56 1.27-2.72
1.96-2.19 1.27-2.25
1.27-2.12
Harmonics Eliminated 10 11 12 13
First non-eliminated 35th 37th 41st 43rd
eq. (4.13). qP
99 2
n=2 Vn
%T H D = · 100% (4.12)
V1
q
2 2
Vh1 + Vh2
%H DF = · 100% (4.13)
V1
where, Vh1 and Vh2 the first and second odd and non-triplen, non-eliminated harmonics.
The seven-level waveform example with an switching distribution of 1/1/9 to the three-
levels of the quarter-period is chosen to evaluate the performance of different formulations and
number of variable voltage levels. The different formulations consider all three, two and one
variable sources and the case of constant DC voltage sources as presented in Section 4.4. The
proposed method where all the DC voltage levels were variables shows a lower value of THD
compared to the conventional one. It also shows a constant THD% across the selected range
of the MI due to harmonics increase linearly with the changes in the MI. On the other side, the
case when only one DC voltage level is variable even a better THD for the selected solution set,
however it has a very narrow MI range.
The variation of the THD% and HDF% are shown in Figs. 4.37 and 4.38
0.15
All constant
2 variables
0.1
%THD
All variables
0.05 1 variable
0
1.4 1.6 1.8 2 2.2 2.4 2.6 2.8
Figure 4.37. %THD versus MI, 1/1/9 switching distribution
100
0.1
%HDF 2 variables All constant
0.05 1 variable
All variables
0
1.4 1.6 1.8 2 2.2 2.4 2.6 2.8
Figure 4.38. %HDF versus MI, 1/1/9 switching distribution
4.5 Simulation Results
4.5.1 Five-level waveforms
MSHE-PWM is firstly investigated with extensive simulation studies to prove its feasibility.
Simulation results in PSIM [178] from both a five and seven-level converter are presented. In the
five-level waveform, an operating point from a low and a high MI are provided. Specifically, for
an switching distribution of 3/3, an operating point is selected from the low MI region (M = 0.5)
of solution set 1 (Fig. 4.3a). In a formulation with constant DC levels this MI is achieved through
a three-level and not a five-level waveform. Fig. 4.39 shows the implementation of this particular
point. The waveform possesses five-levels and only triplen harmonics appeared its associated
line-to-neutral output voltage spectrum presented in Fig. 4.39b. The first harmonics in the
spectrum of the line-to-line output voltage (Fig. 4.39b) are the 25th and the 29th, as expected
from the formulation. Another point from the solution set 2 of the second five-level waveform
(3/5 switching distribution) was chosen with a high MI (i.e. M = 1.36). As the formulation
suggests, the first harmonics in the line-to-line output voltage waveform is the 31st and the 35th.
The line-to-neutral and line-to-line output voltage waveforms and the associated spectra are
shown in Figs. 4.40.
101
0.5
VAO (p.u.)
-0.5
-1
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(a)
0.8
0.6
VAO (p.u.)
0.4
0.2
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(b)
1
VAB (p.u.)
-1
-2
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(c)
1
0.8
VAB (p.u.)
0.6
0.4
0.2
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(d)
Figure 4.39. Simulation results: Five-level variable MSHE-PWM, six switchings per
quarter-period, M = 0.5, 3/3 switching distribution, (a) Phase-voltage,
(b) Harmonic spectrum of the phase-voltage, (c) Line-to-line voltage, (d) Har-
monic spectrum of the line-to-line spectrum
102
1
VAO (p.u.)
-1
-2
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(a)
0.5
0.4
VAO (p.u.)
0.3
0.2
0.1
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(b)
2
VAB (p.u.)
-2
-4
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(c)
0.8
VAB (p.u.)
0.6
0.4
0.2
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(d)
Figure 4.40. Simulation results: Five-level variable MSHE-PWM, eight switchings per
quarter-period, M = 1.36, 3/5 switching distribution, (a) Phase-voltage,
(b) Harmonic spectrum of the phase-voltage, (c) Line-to-line voltage, (d) Har-
monic spectrum of the line-to-line spectrum
103
4.5.2 Seven-level waveforms
A number of operating points for the seven-level waveform are also simulated. Fig. 4.41 shows
the implementation of the seven-level waveform with an switching distribution of 1/1/9. With
this arrangement, thirteen low order odd and non-triplen harmonics are eliminated while
maintaining the fundamental frequency component to the required value. The spectrum of
the waveform, shown in Fig. 4.41b, shows that the first harmonic in the line-to-line output
voltage is the 43rd (2150 Hz for a 50 Hz system). Two other waveforms are simulated for the
seven-level waveform with only one and two variable DC voltage levels. The simulations are
shown in Figs. 4.42 and 4.43 respectively. The number of low order harmonics eliminated is
reduced due to the reduction in the number of variables in the formulation when compared to
the former case. The first harmonic in the spectrum of the line-to-line output voltage when only
the top DC voltage level made variable is the 37th (Fig. 4.42b).
Fig. 4.43 also illustrates an example of the seven-level waveform implementation when
the two top DC voltage levels are considered variable, allowing only eleven harmonics to be
eliminated while controlling the fundamental frequency component. For this waveform, the first
harmonic in the line-to-line voltage spectrum is the 41st as the 39th is eliminated in the power
circuit. The implementation of another seven-level waveform with an switching distribution of
3/3/5 and a MI of M = 2.3 is also simulated and presented in Fig. 4.44. The first harmonic in the
spectrum, as defined by the formulation and shown in Fig. 4.44b, is the 43rd.
104
1
VAO (p.u.)
-1
-2
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(a)
1.5
1
VAO (p.u.)
0.5
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(b)
2
VAB (p.u.)
-2
-4
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(c)
2.5
2
VAB (p.u.)
1.5
0.5
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(d)
Figure 4.41. Simulation results: seven-level waveform, eleven switchings per quarter-
period, M = 1.28, 1/1/9 switching distribution, (a) Phase-voltage, (b) Har-
monic spectrum of the phase-voltage, (c) Line-to-line voltage, (d) Harmonic
spectrum of the line-to-line spectrum
105
2
VAO (p.u.)
-2
-4
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(a)
2
VAO (p.u.)
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(b)
5
VAB (p.u.)
-5
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(c)
4
VAB (p.u.)
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(d)
Figure 4.42. Simulation results: seven-level variable MSHE-PWM, eleven switchings per
quarter-period, M = 2.27, 1/1/9 switching distribution, one level variable,
(a) Phase-voltage, (b) Harmonic spectrum of the phase-voltage, (c) Line-to-
line voltage, (d) Harmonic spectrum of the line-to-line spectrum
106
2
VAO (p.u.)
-2
-4
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(a)
2
VAO (p.u.)
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(b)
5
VAB (p.u.)
-5
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(c)
4
VAB (p.u.)
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(d)
Figure 4.43. Simulation results: seven-level variable MSHE-PWM, eleven switchings per
quarter-period, M = 1.96, 1/1/9 switching distribution, two levels variable,
(a) Phase-voltage, (b) Harmonic spectrum of the phase-voltage, (c) Line-to-
line voltage, (d) Harmonic spectrum of the line-to-line spectrum
107
2
VAO (p.u.)
-2
-4
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(a)
2
VAO (p.u.)
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(b)
6
4
2
VAB (p.u.)
0
-2
-4
-6
0.04 0.045 0.05 0.055 0.06 0.065 0.07 0.075 0.08
time (sec)
(c)
4
VAB (p.u.)
0
0 500 1000 1500 2000 2500
Frequency (Hz)
(d)
Figure 4.44. Simulation results: seven-level waveform, eleven switchings per quarter-
period, M = 2.3, 3/3/5 switching distribution, two levels variable, (a) Phase-
voltage, (b) Harmonic spectrum of the phase-voltage, (c) Line-to-line voltage,
(d) Harmonic spectrum of the line-to-line spectrum
108
4.6.1 Five-level waveforms
A five-level single-phase laboratory prototype based on two cascaded H-bridge converters has
been developed using the 2MBI100TA-060 IGBT modules from Fuji Electric to carry out the
experiments and to verify the feasibility of the theoretical considerations and simulation results.
The pre-calculated PWM signals are implemented using a dSPACE DS1104 R&D controller board
from dSPACE [186].
Two selected operating points from each case of the five-level waveforms were experimentally
verified and the results are presented in Fig. 4.45a and 4.45b respectively. As expected, the most
significant odd and non-triplen harmonic in the case of a 3/3 switching distribution is the 25th
(1250 Hz), which confirms the theoretical and the simulation findings. A five-level waveform with
8 switchings per quarter-period is also presented. The output voltage waveform and associated
spectrum based on line-to-neutral output voltage for different solution sets are illustrated in
Fig. 4.46. The intended harmonics (i.e. 5th, 7th, 11th, 13th, 17th, 19th, 23rd, 25th and 29th)
which were meant to be eliminated, are absent and the next harmonic appears in the line-to-line
spectrum would be the 31st (1550 Hz). The experimental results were in a good agreement with
the predicted and simulated ones presented in Section 4.5.
3rd 3rd 9th 15th 21st 25th

9th 21st 25th
(a) (b)
Figure 4.45. Experimental results: Five-level variable MSHE-PWM, phase-voltage for 6

switchings per period, (a) 3/3 switching distribution, M = 0.4, (b) 3/3 switch-
ing distribution, M = 1.35
4.6.2 Seven-level waveforms
The seven-level formulations are verified from a laboratory prototype based on cascaded H-
bridges and built using the IRG4BC20FD modules and IR2112 drivers. A low cost, high speed
Texas instrument TMS320F2812 DSP board was used for the implementation of the modulation
method. Fig. 4.47a shows the phase-voltage of the converter in the case where all DC voltage
109
3rd
3rd 9th
31st 21st 31st
33rd 15th 33rd
( ) (b)
(a) (b)
Figure 4.46. Experimental results: Five-level variable MSHE-PWM, phase-voltage for 8

switchings per period, (a) 3/5 switching distribution, M = 1.36 (Set 1), (b) 3/5
switching distribution, M = 1.36 (Set 2)
levels are considered variable. The corresponding harmonic spectrum is given in Fig. 4.47b.
The phase-voltages and harmonic spectra when one voltage level is considered constant
(two variable voltage levels) and two voltage levels are considered constant (one variable voltage
level) are given in Figs. 4.48 and 4.49 respectively. Compared with Fig. 4.47a, the number of
harmonics eliminated is reduced by the number of constant DC-voltage levels, as derived in
the formulation and in the simulation results of Section 4.5. Finally, the phase-voltage for an
switching distribution to the three levels of N1 /N2 /N3 = 3/3/5 and the corresponding spectrum
is given in Fig. 4.50a and 4.50b respectively.
3rd
27th
45th
43rd
(a) (b)
Figure 4.47. Experimental results: Seven-level variable MSHE-PWM, all voltage levels vari-
able, 1/1/9 switching distribution, (a) Phase-voltage, (b) Harmonic Spectrum
110
3rd 9th 15th 39th

27th 43rd
(a) (b)
Figure 4.48. Experimental results: Seven-level variable MSHE-PWM, two voltage levels
variable, 1/1/9 switching distribution, (a) Phase-voltage, (b) Harmonic Spec-
trum
3rd
27th
33rd
21st
(a) (b)
Figure 4.49. Experimental results: Seven-level variable MSHE-PWM, one voltage level
variable, 1/1/9 switching distribution, (a) Phase-voltage, (b) Harmonic Spec-
trum
3rd
43rd
45th
(a) (b)
Figure 4.50. Experimental results: Seven-level variable MSHE-PWM, all voltage levels vari-
able, 3/3/5 switching distribution, (a) Phase-voltage, (b) Harmonic Spectrum
111
4.7 Conclusion
A new variation of the MSHE-PWM technique suitable for cascaded topologies with independent
and controllable DC voltage sources is proposed in this chapter. The proposed formulation
offers additional degrees of freedom in the formulation of the problem as the voltage levels are
considered variables. Therefore, the number of odd and non-triplen harmonics that can be
eliminated from the output spectrum is increased by the number of variable DC voltage sources,
when compared to the formulation with constant DC voltage sources.
An important feature of the presented technique is that it extends the MI range for which
solution sets can be calculated. The sets also offer constant trajectories for the switchings and
linear variation of the DC voltage levels with respect to the fundamental frequency component.
This makes the method attractive for systems with variable DC sources (PV applications) as well
as AC motor drives. Five- and seven-level waveforms with various switching distributions to the
levels of the waveform and DC voltage levels combinations were investigated. Multiple solution
sets for each formulation are presented for the cases discussed in this chapter.
The main challenge with the proposed technique is the regulation of variable DC voltage
sources which can be obtained by a front end PWM rectifier or controlled DC sources. In order to
reduce the complexity of the system, the seven-level waveform was reformulated by considering
one and/or additional voltage levels as constant. In this case, multiple and continuous solution
sets are again acquired. When one (or more) of the DC voltage sources kept fixed, the solution
of the switchings and the DC voltage levels are no longer linear for the range of the MI. The
presented method is compared with the conventional MSHE-PWM with fixed and constant DC
voltage levels considering various harmonic performance indices. The method outperforms the
latter due to the elimination of additional harmonics in the variable voltage formulation. The
findings are experimentally verified using laboratory prototypes of a five-level and a seven-level
CHB converter. The cases of five- and seven-level waveforms are considered but the proposed
method can be applied to waveforms and topologies with higher number of levels.
Chapter 5
Selective Harmonic Elimination PWM

of Modular Multilevel Converters
5.1 Introduction
The MMC is a VSC topology based on the cascaded connection of half-bridge switching SMs,
featuring modular characteristics that allow its expandability to high voltage and high power
ratings. The topology can provide large number of levels in the output, generating high quality
voltage and current waveforms with reduced harmonic distortion. This chapter discusses PWM
modulation methods for the MMC and proposes the operation of the converter under MSHE-
PWM. The derivation of the MSHE-PWM waveforms based on the modulation method selected
and the number of SMs in the converter configuration, in combination with a method for
balancing the voltages of each individual sub-module capacitor of the converter, are analyzed.
Simulation results for the presented modulation methods and a number of configurations are
presented verifying the theoretical considerations and analysis.
The proposed techniques are applied as the modulation methods of a low-power single-
phase laboratory prototype of the modular multilevel converter with 10 SMs in the phase-leg
with the experimental results matching the theoretical analysis and simulation results.
112
113
5.2 Converter description
The MMC consists of a series of half-bridge SMs (Fig. 5.1) cascaded in series. The series cascaded
SMs form the upper and lower arms of the converter, which in turn construct the phase-leg of
the topology. An inductor in each of the arms provides additional control of the arm currents
and limits the short-circuit current level.
SW1 D1
VC
SW2 D2 Vsm
Figure 5.1. Half-bridge sub-module, the building block of the modular multilevel con-
verter
The operation of the switches within the SM is complementary. When the upper switch
(S 1 ) of the SM is closed, the capacitor is connected in the arm of the converter while when
the lower switch (S 2 ) is closed the SM is bypassed. Since the cells are connected in series, the
current through the arm flows through each of the SMs and affects the voltage of the capacitor.
Considering Fig. 5.2, the capacitors are charged when a positive current flows through the arm
of the converter while they discharge if a negative current flows though it. The possible states of
a SM of the MMC are summarized in Table 5.1.
SM1
upper- SM2
arm vupper
Vdc
2 SMH +
D1
iupper Larm SW1
icirc Vc
iout Csm
Rarm
vmiddle D2
SW2 –
Rarm
ilower
Larm
Vdc SM1
2
lower- SM2 vlower
arm
SMH
Figure 5.2. Configuration of a MMC phase-leg
The voltage at the output of each SM (Vsm ) depends on the switching state of the SM and the
capacitor voltage and is given by:
v sm = S sm · VC (5.1)
114
where S sm is the switching state of the SM and VC the SM capacitor voltage.
Table 5.1. O UTPUT AND CHARGING STATE OF A SUB - MODULE
SW1 SW2 Vsm Effect on Vc

1 0 Vc Charging when i ar m > 0
Discharging when i ar m < 0
0 1 0 None
The phase-leg of the MMC converter is shown in Fig. 5.2. The phase-legs of the converter
can be configured either for single-phase [111], [114] or three-phase applications [115]–[154]
and Fig. 5.3 shows the three-phase configuration of a MMC topology. From Fig. 5.2, the upper
and lower arm equations can be derived for the phase-leg of the converter. Considering the sum
of the upper (v upper ) or lower (v l ower ) arm SMs that are connected at a given time instant to the
converter equal to
N
X d i ar m
v ar m = v sm + L ar m (5.2)
i =1 dt
The equations for the upper and lower arm are calculated as:
+
SM1 SM1 SM1
SM2 SM2 SM2
SMH SMH SMH

iupper Larm Larm Larm
Rarm Rarm Rarm
Vdc
Rarm Rarm Rarm
ilower
Larm Larm Larm
SM1 SM1 SM1
SM2 SM2 SM2
SMH SMH SMH

–
Figure 5.3. Three phase configuration of the MMC
Vd c d i upper
− v upper − R ar m · i upper − L ar m · − v mi d d l e = 0 (5.3)
2 dt
Vd c d i l ower
− + v l ower + R ar m · i l ower + L ar m · − v mi d d l e = 0 (5.4)
2 dt
115
From the two previous equations we can derive two distinct terms. By adding eq. (5.3) and
(5.4), the output voltage and current terms are derived as:
d (i upper − i l ower )
v upper − v l ower + 2v mi d d l e + R ar m · (i upper − i l ower ) + L ar m · ( =0 (5.5)
dt
Subtracting eq. (5.3) and (5.4)
d (i upper + i l ower )
Vd c − v upper − v l ower − R ar m · (i upper + i l ower ) − L ar m · =0 (5.6)
dt
The output current (i out ) is defined as the difference between the upper and lower arm
current and the circulating current within the arms of the converter (i ci r c ) as one half of the sum
of the upper and lower arm current as:
i out = i upper − i l ower (5.7)
i upper + i l ower
i ci r c = (5.8)
2
From eqs. (5.5)–(5.6) and (5.7)–(5.8), the voltage terms that generate the output and the
circulating current can be derived as:
v upper − v l ower
v out = (5.9)
2
Vd c − (v upper + v l ower )
v ci r c = (5.10)
2
Both of these terms depend on the upper and lower arm voltages (v upper and v l ower ), which
are defined by eq. (5.2). The output and the arm currents of the converter depend on the
switching states of the arm SMs which are then defined by the modulation method selected for
the operation of the converter. The modulation approaches and the derivation of the switching
states of the SMs for the MMC will be analyzed in the coming section.
Disregarding the switching component in the selection of the states of the SMs and according
to eq. (5.2), each arm of the converter can be treated as a variable voltage source where the
voltage of the SMs can be arbitrarily selected with a range from 0 to the total Vd c .
116
5.3 Modulation of Modular Multilevel Converters
As described in the previous section, the MMC output and circulating currents are determined
by the state of the SMs within the arms of the converter. From eq. (5.7), the voltage determining
the output current of the converter is derived by the variation of the SM voltages connected to
the upper and lower arm. A sinusoidal waveform in the output can therefore be achieved by
varying the number of the SMs in the upper and lower arm with a sinusoidal manner.
Since the voltage of each arm is not continuous but varies based on the switching of the SMs,
the selection of the SMs and the PWM method applied to the converter affects its operation and
output waveforms. The two arms that comprise the phase-leg of the converter can be modulated
either simulataneously or independent of each other.
5.3.1 H+1 Modulation
Considering an MMC converter phase-leg as shown in Fig. 5.2, with H SMs per arm of the
converter (and 2H SMs in the phase-leg), a multilevel pulse-width modulated waveform with
H +1 levels can be derived in the output, if the upper and the lower arm are modulated in a
combined manner.
In order to acquire H +1 levels in the output of the converter, the total number of SMs
connected to the phase-leg of the converter is maintained to H over the entire fundamental
period. This means that at any switching of the waveform, and in order to maintain the constant
number of SMs, one SM is connected on one of the arms of the phase-leg (either the upper or
the lower) while one is disconnected from the other arm (either the lower or the upper) at the
same time instant.
The level of the voltage waveform is defined by the number of SMs connected to the upper
arm of the topology (Hupper ) and are given by:
H
Level = − Hupper (5.11)
2
The number of SMs in the lower arm of the converter (Hl ower ) is then:
Hl ower = H − Hupper (5.12)
If all the SMs of the upper arm are connected to the arm (Hupper = H ) and consequently
H
S sm = 1 for all upper arm SMs, the level in the output of the converter is 2 − H = − H2 and the
converter provides the lowest level of the waveform. Here, the number of SMs in the lower arm
is equal to zero. Similarly, when the number of SMs in the upper arm of the converter is equal to
H
H − 1, the level in the waveform is 2 − (H − 1) = − H2 − 1 and there is one SM connected in the
lower arm (Hl ower = 1).
The rest of the levels in the waveforms can be acquired with a similar approach and by
varying the number of SMs in the upper arm from H to zero. The number of levels of an MMC
117
under H + 1 modulation is given by eq. (5.11) and even numbers of SMs per arm of the converter
generate waveforms with odd number of levels. It is possible to obtain a waveform with even
levels in the output if the number of SMs per arm is odd. In the case of even waveforms, the levels
are all equal in amplitude and there is no zero level in the waveform as discussed in Chapter 3.
Fig. 5.4 shows all the possible combination of SMs in the case of H + 1 modulation when a
phase-leg with 5 SMs per arm is considered. The output voltage waveform contains six levels
which are derived from the bottom (state 1) ito the top (state 6) when the grey SMs are the ones
bypassed from the arm while the white ones are connected to each arm.
The number of SMs constantly connected to the phase-leg of the converter is equal to H .
The DC-link voltage (Vd c ) should be equally shared between each of the SM capacitors and the
voltage of each capacitor, if the voltage variation due to the arm currents flowing through the
SM capacitors is not considered, is then equal to
Vd c
VC = (5.13)
H
In order to maintain the voltage of the SM capacitor to the reference value of eq. (5.13) an
active balancing method is required. Balancing methods for the MMC topology are discussed in
Section 5.4.
118
+ SM1 + SM1 + SM1
SM2 SM2 SM2
SM3 SM3 SM3
SM4 SM4 SM4
SM5 SM5 SM5
Larm Larm Larm

Rarm iout Rarm iout Rarm iout
Vdc Vdc Vdc
Rarm Rarm Rarm
Larm Larm Larm
SM1 SM1 SM1
SM2 SM2 SM2
SM3 SM3 SM3
SM4 SM4 SM4
– SM5 SM5 SM5

– –
State 1 State 2 State 3
+ +
+
SM1 SM1 SM1
SM2 SM2 SM2
SM3 SM3 SM3
SM4 SM4 SM4
SM5 SM5 SM5
Larm Larm Larm

Rarm iout Rarm iout Rarm iout
Vdc Vdc Vdc
Rarm Rarm Rarm
Larm Larm Larm
SM1 SM1 SM1
SM2 SM2 SM2
SM3 SM3 SM3
SM4 SM4 SM4
– SM5 SM5 SM5

– –
State 4 State 5 State 6
Figure 5.4. The different states of an MMC for acquiring the six different levels of the
waveform under H + 1 modulation, state 1 (bottom level) to state 6 (top level)
119
5.3.2 2H+1 Modulation
The total number of levels in the output can be increased if the two arms in the phase-leg are
modulated independently. Considering a converter with H SMs per arm, the total number of
levels that can be acquired in the output waveform is increased from H + 1 to 2H + 1. The level
in the waveform of the converter depends on the number of SMs that are connected in both the
upper (Hupper ) and lower (Hl ower ) arms as given by
Level = Hl ower − Hupper (5.14)
Out of the 2H +1 levels of the waveform, H +1 can be derived as shown in the H +1 modulation
described in the previous section. The additional H levels, are intermediate to the H + 1 levels.
+ SM1 + SM1
SM2 SM2
SM3 SM3
SM4 SM4
SM5 SM5
Larm Larm
Rarm iout Rarm iout
Vdc Vdc
Rarm Rarm
Larm Larm
SM1 SM1
SM2 SM2
SM3 SM3
SM4 SM4
– SM5 SM5
–
Figure 5.5. Possible states for acquiring the zero voltage level
The levels in the waveform can be acquired by numerous combinations of SMs in the upper
and lower arm. However, the DC voltage is shared between the SMs that are constantly connected
to the phase-leg and large variations in the number of connected SMs creates issues in the
operation of the converter.
As the number of SMs connected to the phase-leg deviates from H (either more or less
SMs are connected to the phase-leg), the voltage of each SMs deviates from the reference
value of eq. (5.13) as the DC voltage is now shared by more or less SMs. This also affects
the balancing of the SM voltages and the effectiveness of the voltage balancing algorithm.
Additionally, from eq. (5.5) and (5.10), a variation in the number of SMs connected to the phase-
leg affects the voltages v upper and v l ower and, therefore, the circulating current through the legs
of the converter.
In order to minimize the effects of the variation in the number of SMs connected to the
120
+ +
SM1 SM1
+ SM1 + SM1
SM2 SM2
SM2 SM2
SM3 SM3
SM3 SM3
SM4 SM4
SM4 SM4
SM5 SM5
SM5 SM5
Larm Larm
Larm Larm Rarm iout Rarm iout
Rarm iout Rarm iout Vdc Vdc
Rarm Rarm
Vdc Vdc
Rarm Rarm Larm Larm
Larm Larm SM1 SM1
SM1 SM1
SM2 SM2
SM2 SM2
SM3 SM3
SM3 SM3
SM4 SM4
SM4 SM4
SM5 SM5
– –
– SM5 SM5
– State 6 State 6
(a) (b)
Figure 5.6. Possible states for acquiring the additional positive levels under 2H + 1 modu-
lation, (a) 2nd Level, (b) 4th Level
+ SM1 + SM1 + SM1 + SM1

SM2 SM2
SM2 SM2
SM3 SM3
SM3 SM3
SM4 SM4
SM4 SM4
SM5 SM5
SM5 SM5
Larm Larm
Larm Larm
Rarm iout Rarm iout
Rarm iout Rarm iout
Vdc Vdc Vdc Vdc
Rarm Rarm Rarm Rarm
Larm Larm Larm Larm
SM1 SM1 SM1 SM1
SM2 SM2 SM2 SM2
SM3 SM3 SM3 SM3
SM4 SM4 SM4 SM4
SM5 SM5 – SM5 SM5

– – –
(a) (b)
Figure 5.7. Possible states for acquiring the additional negative levels under 2H + 1 modu-
lation, (a) 2nd Level, (b) 4th Level
121
phase-leg on the MMC, only the combinations that modify the number of SMs in the phase-leg
by one are considered. The valid and preferrable combinations are those with either H -1 or H +1
SMs in the phase-leg.
Hl ower + Hupper = H − 1 (5.15)
Hl ower + Hupper = H + 1 (5.16)
If all the SMs of the upper arm are connected to the arm and consequently S sm = 1 for
all upper arm SMs, while no SM in the lower arm is connected, the level in the output of the
converter is Hl ower − Hupper = 0 − H = −H and the converter provides the lowest level of the
waveform. In order to acquire the next level in the waveform either a SM from the lower arm of
the converter can be connected to the phase-leg, in which case, H t ot al = H + 1 or one SM can be
removed from the lower arm of the converter and H t ot al = H − 1. The level in the waveform is
then −H + 1.
The third level in the waveform can be acquired by only one combination, that is H − 1 SMs
connected in the upper arm and one SM in the lower. The switching of the SMs also depends on
the previous state of the phase-leg and in order to acquire the next level, a SM from the upper leg
has to be switched if the previous switching happened in the lower leg, or a SM from the lower
leg if the previous switching happened in the upper leg. The remaining levels in the waveform
can be acquired in a similar manner.
An additional issue that rises in the 2H + 1 modulation is the selection of the number of
SMs in order to acquire the different levels. One can select to operate the converter only
between H and H + 1 SMs in the arm, or only between H − 1 and H SMs in the arm. However,
unequal distribution of the two states results in an offset in the voltage of the SM capacitors and
additionally complicates the voltage balancing process of the converter. For this reason, the
converter is chosen to operate with the number of SMs being interleaved and the number of
SMs alternating between H − 1 and H + 1 during consecutive intermediate levels. An example of
this additional interleaving is given in Table 5.2 for an odd H and in Table 5.3 for an even H .
122
Table 5.2. I NTERLEAVED SELECTION OF THE NUMBER OF SUB - MODULES WITHIN THE
PHASE - LEG FOR 2H + 1 MODULATION WITH EVEN H
Waveform Level Hupper Hl ower H t ot al

H H
0 2 2 H
H H
2 −1 2 H −1
1
H H
2 2 +1 H +1
H H
0 2 2 H
H H
2 2 +1 H +1
1
H H
2 −1 2 H −1
H H
2 2 −1 2 +1 H
H H
2 −1 2 H −1
1
H H
2 2 +1 H +1
H H
2 2 −1 2 +1 H
H H
2 −1 2 +2 H +1
3
H H
2 −2 2 +1 H −1
Table 5.3. I NTERLEAVED SELECTION OF THE NUMBER OF SUB - MODULES WITHIN THE
PHASE - LEG FOR 2H + 1 MODULATION WITH ODD H
Waveform Level Hupper Hl ower H t ot al

H −1 H −1
2 2 H −1
0
H +1 H +1
2 2 +1 H +1
H −1 H −1
1 2 2 +1 H
H +1 H +1
2 2 +1 H +1
0
H −1 H −1
2 2 H −1
H −1 H −1
1 2 2 +1 H
H −1 H −1
2 −1 2 +1 H −1
2
H +1 H +1
2 −1 2 +2 H +1
H −1 H −1
1 2 2 +1 H
H +1 H +1
2 −1 2 +2 H +1
2
H −1 H −1
2 −1 2 +1 H −1
H −1 H −1
3 2 2 +2 H
123
5.4 Balancing of the MMC sub-module voltages
An important aspect in the operation of the MMC is maintaining the voltage of the individual
SMs to the reference value as given in eq (5.13). The variation of the SM voltages is due to the
arm current that flows through them and as previously analyzed includes a component of the
load current and a circulating current due to the unbalance in the voltages of the upper and
lower SMs. This voltage variation is described in general as
1
Z T
Vc = S sm · i ar m (5.17)
C 0
5.4.1 Balancing of the sub-module voltages based on sorting
In order to maintain the individual voltage of each SM an active balancing method is required.
The voltage of each individual SM together with the arm current needs to be measured and be
available in the voltage balancing algorithm. The voltage balancing algorithm selects the SMs in
each of the arms of the converter based on the relative voltage values of all the arm SMs and the
direction of the arm current. Referring back to Fig. 5.2, a positive current within the arms of the
converter causes the capacitors to charge while a negative current causes them to discharge.
The voltage balancing algorithm is applied independently on each of the converter arms. The
capacitor voltages are sorted in either an ascending or descending order. Based on the direction
of the current and the sorted voltages the next SM that switches in the arm is selected so that
• If the arm current is positive (i ar m > 0) and the PWM method requires the addition of one
SM in the arm, the SM with the lowest voltage that is not connected to the arm will be
selected and added to the arm.
• If the arm current is positive (i ar m > 0) and the PWM method requires the subtraction of
one SM in the arm, the SM with the highest voltage that is connected to the arm will be
selected and removed from the arm.
• If the arm current is negative (i ar m < 0) and the PWM method requires the addition of one
SM in the arm, the SM with the highest voltage that is not connected to the arm will be
selected and added to the arm.
• If the arm current is negative (i ar m < 0) and the PWM method requires the subtraction of
one SM in the arm, the SM with the lowest voltage that is connected to the arm will be
selected and removed from the arm.
When the SM is not connected to the arm of the converter, the voltage of its capacitors will
not change but remain to the level that it was before it was removed from the arm of converter.
The voltage balancing algorithm is independent of the modulation of the arm and the
implementation of the algorithm for an arm of the MMC is given in Fig. 5.8. Its main task is to
maintain the voltages of the capacitors close to the reference values. This is achieved over the
124
whole period of the waveform and the capacitors actual voltages drift from their reference value
within this period due to the load current flowing through them. Additionally, the algorithm
does not consider the actual reference value in the selection of the SMs, but their relative voltage
with relation to the remaining SMs in the arm. In certain cases, the SM that is selected to be
connected to the arm of the converter according to the logic of the algorithm will further deviate
from the reference voltage. The balancing of the SMs is not an instantaneous process and
balancing around the reference occurs over the fundamental period
Number of SMs required in the

arm from modulation stage
Harm
SM voltage
measurements Sorted SMs
Sorting Selection of Switching pulses to
Ascending / SMs the SMs of the arm
Descending
iarm >0
(ilower or iupper) Polarity of the arm
current
Figure 5.8. Selection of sub-modules based on voltage sorting
5.4.2 Alternative voltage balancing methods
Voltage balancing based on the sorting algorithm provides a method of regulating the voltages
of the capacitors by actively selecting the most or least charged SMs based on the direction of
the current. One of its additional benefits is that is does not affect the switching frequency of
the converter and of the SMs as it happens when hysteresis controllers are utilized, such as in
hybrid converters [35].
A number of additional methods for balancing the voltages of the converter have also been
proposed. In [118], the balancing of the capacitors is achieved through proportional-integral
(PI) controllers that modify the reference waveform in such a way so that the voltage is equally
shared between the SMs of the arms and the overall phase-leg. This approach is similar to
approaches used for NPC converters in order to maintain the voltage of the neutral point of the
converter. Its main drawbacks is that it is applied to the whole leg of the converter and each arm
separately and it is limited to certain SPWM methods rather that being applied universally.
Another method is based on pulse patterns that maintain the energy stored in the SMs of
the converter constant over a number of periods [125]. A significant advantage of this method
is that it allows the operation of the converter without any voltage feedback from the SMs
simplifying the design and operation of the converter. However, an approach based on stored
energy depends on the type of the load and the operating state of the converter and it the total
energy sum of zero cannot be satisfied at all times. Furthermore, the balancing of the SMs in
125
such an approach happens over a number of periods which are typically equal to the number of
SMs in the arm of the converter that leads to greater deviations from the reference and significant
distortion in the output waveform.
5.5 Selective Harmonic Elimination of MMC
The generation of the PWM waveform for the MMC is a process independent of the switching
of the SMs within the arms of the converter. For this reason, generation of the pulse pattern
for the switching of a phase-leg under MSHE-PWM does not directly control the switching of
the SMs. A multilevel target waveform is generated at the modulation stage of the converter
and the selection of the switching SMs is based on the voltage balancing algorithm described in
Section 5.4.
MSHE-PWM is based on pre-calculated switching patterns that have been selected in order
to eliminate the low-order harmonics of the output voltage waveform. This means that the
derivation of the waveforms and acquisition of solution sets should be done based on the modu-
lation method (either H + 1 modulation or 2H + 1 modulation) selected for the operation of the
converter. As the two methods provide different levels in the waveform, different formulations
and solution sets should be calculated.
The solution sets are calculated for the two formulations of the problem. Based on the
operating point of the converter, the switching pattern for the converter and hence the number
of SMs that need to be connected to each of the two arms of a converter phase-leg are derived.
The number of SMs is used by the voltage balancing algorithm in combination with the polarity
of the arm current and the sorted voltages of the SM capacitors in order to determine which SM
will be connected or removed from the arms of the converter phase-leg.
The implementation of MSHE-PWM for the two different modulation methods is shown in
Fig. 5.9 and 5.10 respectively.
An additional challenge associated with the operation of the MMC under SHE-PWM is its
application for a number of switching distribution ratios over the levels of the waveform. This
complexity is increased as the number of levels in the waveform increase resulting in solution
sets that are continuous over reducing MI ranges as not only the transitions between the different
solution sets but the complexity in calculating set of solutions is increased.
126
Modulation Index
5
(M) 4
3
2
Angle angles 1
Phase Angle 0
Look-up -1
-2
(θ) Table -3
-4
-5
0. 0.005 0.01 0.015 0.02
Target Waveform Generation
Level in the
waveform
Required
Eq. (5.12)
SMs in arms
Hupper Hlower
Figure 5.9. Implementation of H + 1 modulation on SHE-PWM
Modulation Index
5
(M) 4
3
2
Angle angles 1
Phase Angle 0
Look-up -1
-2
(θ) Table -3
-4
-5
0. 0.005 0.01 0.015 0.02
Target Waveform Generation
Level in the
waveform
Required
SMs in arms
Interleaving
between
H+1 and H-1
Hupper Hlower
Figure 5.10. Implementation of 2H + 1 modulation on SHE-PWM
127
The operation of the MMC under SHE-PWM is verified through a number of simulations in
Matlab/Simulink [180] and PLECS [181]. Both the H + 1 and the 2H + 1 modulation methods
of the converter are considered for converters that result in odd number of levels in the output
voltage waveform.
In the case of H + 1 modulation and in order to derive a waveform with odd number of levels , a
converter with six SMs per arm of the converter is considered. The parameters of the system
under consideration are given in Table 5.4. As analyzed in section 5.3.1, under H +1 modulation a
converter with six SMs in the arm will generate seven-levels in the output waveform. Seven-level
SHE-PWM waveforms have been previously presented in section 3.3.2. Based on the derivation
of the problem, a number of solution sets acquired for seven-level waveforms with seventeen
switchings per quarter-period [92] (Fig. 3.32) are used for the modulation of the MMC.
Table 5.4. S IMULATION PARAMETERS FOR THE H + 1 MODULATION
Parameter H +1
DC Voltage 3 kV
R l oad 15 Ω
L l oad 15 mH
SM Capacitance 3.5 mF
Arm Inductance 3.6 mH
Number of SMs per arm 6
SM Voltage 500 V
Number of Output Levels 7
switching Distribution 3-5-9
Number of switchings per quarter wave 17
First harmonic in spectrum 53rd
Two different operating points are selected from the 3/5/9 distribution of Fig 3.32. The phase
and line-to-line voltages for a MI of M = 2.1 are shown in Figs. 5.11a and 5.12a respectively.
The waveforms are calculated, as analyzed in Chapter 3, so that the low-order harmonics are
eliminated from the output spectrum. The harmonic analysis of the voltage waveforms are given
in Fig. 5.11b and Fig. 5.12b respectively. The low-order, non-triplen harmonics are eliminated
from the spectrum of the phase-voltage while the first harmonic present in the line-to-line
voltage is the 53rd. The low-order, non-triplen harmonics are eliminated from the spectrum of
the phase-voltage while the first harmonic present in the line-to-line voltage is the 53rd (2650 Hz
for a 50 Hz system). The high quality voltage waveform results in nearly sinusoidal currents with
very small harmonic distortion as shown in Fig. 5.13.
1000
500
0
0 500 1000 1500 2000 2500 3000
frequency (Hz)
128
2000
Voltage (V) 1000
-1000
-2000
0.4 0.41 0.42 0.43 0.44 0.45 0.46 0.47 0.48 0.49 0.5
time (sec)
(a)
1500
Voltage (V)
1000
500
0
0 500 1000 1500 2000 2500 3000
frequency (Hz)
(b)
Figure 5.11. Simulation results: Seven-level output waveforms for M = 2.1, (a) Phase-
voltage, (b) Corresponding harmonic spectrum
3000
2000
Voltage (V)
1000
0
-1000
-2000
-3000
0.4 0.41 0.42 0.43 0.44 0.45 0.46 0.47 0.48 0.49 0.5
time (sec)
(a)
2500
Voltage (V)
2000
1500
1000
500
0
0 500 1000 1500 2000 2500 3000
frequency (Hz)
(b)
Figure 5.12. Simulation results: Seven-level output waveforms for M = 2.1, (a) Line-to-line
100
50
Current (A)
-50 Phase A
Phase B
Phase C
-100
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
1500
Figure 5.13. Simulation results: Three-phase load currents for M = 2.1
Voltage (V)
1000
500
0
0 500 1000 1500 2000 2500 3000
frequency (Hz)
129
Eq. (5.17) describes the variation of the SM voltages based on the switching function of each
of the SMs and the current through the arm of the converter (i ar m ). The voltage is maintained
to the required level based on the balancing algorithm of Section 5.4 and the variation of the
voltages over two periods of operation for the SMs of one phase-leg of the converter are shown
in Fig. 5.14. The currents through the arms include a component of the load current and a
circulating current due to the variation of the total voltage within the arm and the DC-link
voltage that is considered constant as shown in eq. (5.7) and (5.8). The upper (i upper ) and
lower (i l ower ) arm currents for phase A of the converter under H+1 modulation are shown in
Fig. 5.15. Besides the fundamental frequency component due to the load current, a second
order harmonic current is also present in the arm currents. This circulating current is due to
the second order harmonic variation in the total voltage of the connected SMs as defined by
eq. (5.8). The variation in voltage of the connected SMs is shown in Fig. 5.16.
550
525
Voltage (V)
500
475
450
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
Figure 5.14. Simulation results: Variation of voltage for the sub-module capacitors
100
50
Current (A)
-50
Upper Arm
Lower Arm
-100
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
Figure 5.15. Simulation results: Upper and lower arm currents for H + 1 modulation and
M = 2.1
3200
SM voltage sum (V)
3100
3000
2900
2800
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
Figure 5.16. Simulation results: Sum of sub-module voltages to the phase-leg for M = 2.1
The same simulations are repeated for a different operating point with the same distribution
(N1 /N2 /N3 = 3/5/9) to the previous case and for a different MI (M = 2.25). The phase and line
voltages are shown in Figs. 5.17a and 5.18a with the harmonic analysis of the waveforms for both
the phase and the line voltage given in Fig. 5.17b and 5.18b respectively.
130
2000
1000
Voltage (V)
-1000
-2000
0.4 0.41 0.42 0.43 0.44 0.45 0.46 0.47 0.48 0.49 0.5
time (sec)
(a)
1500
Voltage (V)
1000
500
0
0 500 1000 1500 2000 2500 3000
3000 (b)
Figure 5.17. Simulation results: Seven-level output waveforms for M = 2.25, (a) Phase-
Voltage (V)
2000
1000
0
0 500 1000 1500 2000 2500 3000
frequency (Hz)
2000
Voltage (V)Voltage (V)
1000
1500
0
-1000
1000
-2000
500 0.4 0.41 0.42 0.43 0.44 0.45 0.46 0.47 0.48 0.49 0.5
time (sec)
0 (a)
0 500 1000 1500 2000 2500 3000
3000
Voltage (V)
2000
1000
0
0 500 1000 1500 2000 2500 3000
frequency (Hz)
(b)
Figure 5.18. Simulation results: Seven-level output waveforms for M = 2.25, (a) Line-to-
line voltage, (b) Corresponding harmonic spectrum
131
The three-phase and the upper and lower arm currents of the MMC for this operating point
are shown in Figs. 5.19 and 5.20 respectively. The variation in the voltage of the SM capacitors is
shown in Fig. 5.21.
100
50
Current (A)
-50 Phase A
Phase B
Phase C
-100
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
100
50
Current (A)
-50
Upper Arm
Lower Arm
-100
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
M = 2.25
550
525
Voltage (V)
500
475
450
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
Under 2H +1 modulation, a converter with 5 SMs per arm is considered. The specifications of the
MMC for the simulations are summarized in Table 5.5. The converter generates an eleven-level
waveform in the output. The DC-link for the converter is reduced to 2.5 kV in order to maintain
the SM voltage to the same level (500 V) between the two modulation cases. Similarly to the
case of H + 1 modulation, the SHE-PWM problem is formulated for the eleven-levels of the
waveform as presented in Sections 3.2.1 and 3.2.2 for the five and seven-level waveforms. The
switching distribution considered in this case is that of N1 /N2 /N3 /N4 /N5 is 3/3/3/3/3 with a
total of fifteen switchings per quarter-period, eliminating all the odd and non-triplen harmonics
in the output spectrum up to the 47th.
The phase and line-to-line voltage of the MMC of Table 5.5 under 2H + 1 modulation and
for M = 3.3 are shown in Figs. 5.22a and 5.23a respectively. The number of SMs in the arms
132
Table 5.5. S IMULATION PARAMETERS FOR THE 2H +1 MODULATION
Parameter 2H +1
DC Voltage 2.5 kV
R l oad 15 Ω
L l oad 15 mH
SM Capacitance (Vsm ) 3.5 mF
Arm Inductance (L ar m ) 3.6 mH
Number of SMs per arm (H ) 5
SM capacitor voltage (Vc ) 500 V
Number of output levels 11
Switching Distribution 3-3-3-3-3
Number of switchings per quarter wave 15
First harmonic in spectrum 47th
of the converter is reduced but the different modulation method used provides additional
number of levels in the waveform and improves the harmonic characteristics of the output. The
harmonic analysis of the phase and line-to-line voltage waveforms is shown in Figs. 5.22b and
5.23b respectively. As expected from the formulation of the problem, all harmonics up to the
47th (2350 Hz for a 50 Hz system) are eliminated from the output spectrum of the line-to-line
waveform. The output currents for the three-phases of the converter are given in Fig. 5.24.
1500
1000
Voltage (V)
500
0
-500
-1000
-1500
0.4 0.41 0.42 0.43 0.44 0.45 0.46 0.47 0.48 0.49 0.5
time (sec)
(a)
1500
Voltage (V)
1000
500
0
0 500 1000 1500 2000 2500
frequency (Hz)
(b)
Figure 5.22. Simulation results: Eleven-level output waveforms for M = 3.3, (a) Phase-
Referring again to eq. (5.7), the different states in the output as shown in Figs. 5.5–5.7 generate
the required level in the output and increase the number of levels in the converter. From eq. (5.8),
the sum of the voltages of the SMs that is constantly connected to the phase-leg of the converter
133
3000
2000
Voltage (V) 1000
0
-1000
-2000
-3000
0.4 0.41 0.42 0.43 0.44 0.45 0.46 0.47 0.48 0.49 0.5
time (sec)
(a)
2000
1500
Voltage (V)
1000
500
0
0 500 1000 1500 2000 2500
frequency (Hz)
(b)
Figure 5.23. Simulation results: Eleven-level output waveforms for M = 3.3, (a) Line-to-
100
50
Current (A)
-50 Phase A
Phase B
Phase C
-100
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
is not always constant due to the variation in the number of SMs connected in order to acquire
the intermediate levels. The variation in the number of SMs in the the phase-leg between H − 1
and H + 1 generates additional distortion in the circulating current within the phase-leg of
the converter and therefore in the currents that flow through the arms. The variation can be
calculated from eq. (5.8) and depends on the voltage of each SM as given by eq. (5.13). The upper
and lower arm currents of the topology are shown in Fig. 5.25 and the variation in the voltage of
the SMs connected to the phase-leg is given in Fig. 5.26. The second harmonic that was present
in the case of H + 1 modulation is super-imposed to the variation with a frequency equal to the
equivalent switching frequency of the phase-leg of the converter.
100
50
Current (A)
-50
Upper Arm
Lower Arm
-100
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
M = 3.3
134
3500
SM voltage sum (V) 3000
2500
2000
1500
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
Figure 5.26. Simulation results: Sum of sub-module voltages to the phase-leg for M = 3.3
The second order harmonic and the harmonics in the equivalent switching frequency that
are present in the circulating current and hence in the arm currents of the converter together
with the variation in the number of SMs connected to the arm result in a slight variation of the
voltages in the SMs due to the voltage balancing algorithm. The variation in the voltage of the
SMs is shown in Fig. 5.27.
550
Voltage (V)
500
450
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
The simulation results are repeated with a different operating point (M = 3.6) and solution
set for the same switching distribution to the levels of the waveform. The phase-voltage and
its harmonic spectrum is given in Fig. 5.28a and b respectively while the line-to-line voltage is
shown in Fig. 5.29.
As expected, all low order harmonics are eliminated from the output spectrum and the first
harmonic in the line-to-line spectrum would be the 47th. The three-phase output currents and
the upper and lower arm currents are shown in Figs. 5.30 and 5.31, while the variation in the
voltage of the SMs for two periods of operation is given in 5.32.
135
1500
1000
Voltage (V)
500
0
-500
-1000
-1500
0.4 0.41 0.42 0.43 0.44 0.45 0.46 0.47 0.48 0.49 0.5
time (sec)
(a)
1500
Voltage (V)
1000
500
0
0 500 1000 1500 2000 2500
frequency (Hz)
(b)
Figure 5.28. Simulation results: Eleven-level output waveforms for M = 3.6, (a) Phase-
3000
2000
Voltage (V)
1000
0
-1000
-2000
-3000
0.4 0.41 0.42 0.43 0.44 0.45 0.46 0.47 0.48 0.49 0.5
time (sec)
(a)
2500
2000
Voltage (V)
1500
1000
500
0
0 500 1000 1500 2000 2500
frequency (Hz)
(b)
Figure 5.29. Simulation results: Eleven-level output waveforms for M = 3.6, (a) Line-to-
100
50
Currents (A)
-50 Phase A
Phase B
Phase C
-100
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)

136
100
50
Current (A)
0
-50
Upper Arm
Lower Arm
-100
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
M = 3.6
550
525
Voltage (V)
500
475
450
0.46 0.465 0.47 0.475 0.48 0.485 0.49 0.495 0.5
time (sec)
The proposed modulation for the MMC is also verified on a phase-leg experimental prototype
with five SMs per arm (Fig 5.33). The specifications of the laboratory prototype are given in Table
5.6. The modulation and voltage sorting and balancing algorithms are implemented using the
dSPACE 1103 board [187]. The resulting output phase-voltage has eleven levels and is operated
with 15 switchings per quarter-period and an average switching frequency per SM of 150 Hz.
The low-order triplen harmonics are present in the harmonic spectrum of the phase-leg as they
are not eliminated through the modulation and the first non-triplen harmonics are the 47th
(2350 Hz) and the 49th (2450 Hz) harmonic.
Figure 5.33. Laboratory prototype modular multilevel converter phase-leg
Fig. 5.34 shows the output voltage of the phase-leg, the current through the load at the output
and the harmonic spectrum (Frequency: 500 Hz/div). The SM capacitor voltage balancing
algorithm maintains the voltages of the individual capacitors at the required level. Also, Fig. 5.35
shows the current flowing through the upper arm of the converter.
137
Table 5.6. MMC LABORATORY PROTOTYPE SPECIFICATIONS
Parameter Value
DC Voltage 250 V
R l oad 9Ω
L l oad 11 mH
SM Capacitance 3.6 mF
Arm Inductance 3.6 mH
Number of SMs per arm 5
SM Voltage 50 V
Number of Output Levels 11
Switching Distribution 15 switchings (3-3-3-3-3)
Figure 5.34. Experimental results: Eleven-level SHE-PWM phase-voltage, load current

and corresponding voltage spectrum
Figure 5.35. Experimental results: Current through the upper arm (i upper ) of the MMC
under 2H + 1 modulation
138
5.8 Conclusion
This chapter analyzed the MMC topology operated under the MSHE-PWM presented in Chapter
3. The converter topology is analyzed and two different modulation techniques for the phase-
legs of the converter are presented. A voltage balancing technique that selects the SMs in the
phase leg based on sorting of the sub-module capacitors and limiting the number of switchings
is also implemented. The operation of the MMC under SHE-PWM for both the modulation
methods analyzed, is proposed.
The proposed modulation of the converter under MSHE-PWM, offers independent control
in the switching of each of the arms in a phase-leg of the converter. It is also modular and
can be extended and applied to any MMC topology, regardless of the number of SMs in the
phase-leg. MSHE-PWM can be applied to the MMC for both modulation strategies and while
2H +1 modulation results in circulating current with switching components within the phase-leg
of the converter it provides additional levels and superior harmonic performance to the H + 1
modulation for the same switching frequency of the switches.
The theoretical calculations have been verified through extended simulation results for
both the techniques, while the 2H + 1 modulation has also been verified experimentally on a
laboratory prototype phase-leg of the MMC with 10 SMs.
Chapter 6
Modular Multilevel Converters for

Back-to-Back systems
6.1 Introduction
The modular characteristics, the reduced requirements for series connected switches and the re-
quirements for high-voltage, high-power DC transmission make the MMC an attractive topology
for HVDC power transmission and back-to-back applications in power systems.
This chapter investigates the operation of the MMC in a back-to-back configuration and
applies the two multilevel PWM methods for the modulation of such a system. The two con-
verters are controlled based on the well-known d q-theory. The effect of the modulation in the
equivalent capacitance of the converter and the DC-link voltage are analyzed. Simulation results
for a power exchange scenario under the two modulation methods are provided to illustrate the
operation of each converter and of the system as a whole.
139
140
6.2 VSC-HVDC and back-to-back systems
VSC based HVDC transmission systems provide a number of advantages over conventional
thyristor-based HVDC such as [1], [174]
• Independent control of active and reactive power without additional compensating equip-
ment.
• Mitigation of power quality disturbances.
• Reduced risk of commutation failures
• No need for communication between the terminals.
• Capability to feed islands and passive AC networks.
• Opportunities for Multi-terminal DC grids
The application of multilevel converters can improve the quality of the output waveforms and
reduce semiconductor stresses [5], [175]. The use of conventional topologies (NPC converter,
flying capacitor converter, H-bridge converter) in HVDC systems is challenging due to their
limited scalability, modularity and fault tolerance for HVDC applications [120].
DC cable
Lconv1 Lconv2
Lg1 Lg2
AC system 1 AC system 2
VSC1 VSC2
Vs1 Vs2
Reactive Power Active Power flow Reactive Power
Control (Q1) (P) Control (Q2)
(a)
Lconv1 Lconv2
Lg1 Lg2
AC system 1 AC system 2
VSC1 VSC2
Vs1 Vs2
(b)
Figure 6.1. Voltage source converters in high power applications, (a) HVDC Transmission,
(b) Back-to-back Interconnection
The MMC is an attractive topology for HVDC transmission and back-to-back interconnec-
tions (Figs 6.1a and 6.1b respectively) as it features modular design which can be extended to the
141
required voltage level, filter-less operation, high quality output waveforms and a single DC-link
for the overall topology allowing high-voltage transmission with two HV cables. It has also been
proposed for other medium and high-power applications such as static synchronous compen-
sators (STATCOMs) as well as certain motor drives (Fans and blowers) [116]. The configuration
of a three-phase MMC topology was described in Section 5.2.
6.3 Multicarrier PWM of the MMC
The number of levels in the output of the MMC topology depends on the number of sub-modules
in the phase-leg 2H and in the modulation method selected [124]. The two different modulation
methods have been described in Section 5.3, where the converter was operated under selective
harmonic elimination PWM. This section only summarizes the differences between the SHE-
PWM and multi-carrier sinusoidal PWM of the MMC.
As described in section 5.3.1, an MMC with H SMs per arm of the converter can generate H +1
levels in the output when the upper and lower arm of the converter are modulated simultane-
ously. For the multi-carrier based PWM, this results in H carrier waveforms being required in
the generation of the target waveform [120].
The modulation method only requires the number of carriers to be equal to the number of
SMs in the arm of the converter and all possible carrier waveforms configurations such as level
shifted carriers (LSC) including phase disposition (PD), phase opposition disposition (POD),
alternating phase opposition disposition (APOD) and phase shifted carrier (PSC) PWM can be
utilized [57],[58], [119].
Under LSC-PWM the equation describing the h-th carrier waveform is
H + 1 2h
· ¸
1 2
h − th carrier = 1 − cos−1 (cos(2π · m f · f · t − π) − + (6.1)
H π H H
where h = 1 defines the lowest carrier waveform and h = H defines the one on the top.
Similarly for PSC-PWM, the equation describing the h-th carrier is
π 2πh
· ¸
2
h − th carrier = 1 − cos−1 cos(2π · m f · f · t − + ) (6.2)
π 2 H
The designation of the carrier is not directly related to a particular SM as the voltage balancing
method with the sorting algorithm used in the converter (Section 5.4) determines which SM will
be connected or bypassed in each arm of the phase-leg.
The target waveform generation based on the H +1 modulation is shown in Fig. 6.2. A
converter with H = 6 SMs per arm is considered, in order to demonstrate the multi carrier PWM
technique. Nonetheless, the approach can be extended to fit any converter configuration.
142
1.0
0.8 Carrier 6
0.6
Carrier 5
0.4
0.2
Carrier 4
0.001 0.002 0.003 0.004 0.005

-0.2 Carrier 3
-0.4
Carrier 2
-0.6
-0.8
Carrier 1
-1
3 Switchings in both
upper and lower
Waveform level (p.u.)
arm
0.001 0.002 0.003 0.004 0.005

time (sec)
Figure 6.2. Target waveform generation in the case of H+1 modulation for a converter
with 6 SMs per arm
143
An MMC with H SMs per arm of the converter can be modulated to generate 2H +1 levels in
the output as described in section 5.3.2. In the case of the multicarrier SPWM techniques, 2H
carrier waveforms are required in the generation of the target waveform. Similarly to the case of
H +1 modulation of section 6.3.1, both PSC and LSC carriers can be used.
For the case of a converter with H SMs per arm, the equations describing the LSC modulation
carrier waveforms is Under LSC-PWM the equation describing the h-th carrier waveforms is
2H + 1 h
· ¸
1 2 −1
h − th carrier = 1 − cos (cos(2πm f · f · t − π) − + (6.3)
2H π 2H H
where h = 1 defines the lowest carrier waveform and h = 2H defines the uppermost triangular
carrier.
Similarly for PSC-PWM, the equation describing the h-th carrier is
π 2πh
· ¸
2
h − th carrier = 1 − cos−1 cos(2πm f · f · t − + ) (6.4)
π 2 2H
Two consecutive carriers in this sort of modulation modify the number of SMs in the upper
or the lower arm of the phase-leg with the 1st carrier assigned to the upper arm, the 2nd carrier
assigned to the lower arm and so on. The derivation of the target waveform for the 2H +1
modulation for a converter with H = 6 under PSC modulation is shown in Fig. 6.3.
As analyzed in section 5.3.2, 2H +1 modulation requires an additional interleaving in the

number of SMs that are connected to the arm of the converter. The interleaving of the SM
number shares the time intervals in which H + 1 or H − 1 SMs are connected in the phase-leg of
the converter assisting the voltage balancing algorithm. Deviation from the interleaved pulses
results in unequal time intervals and hence in a drift in the total voltage of the arm and phase-leg
SMs that cannot be compensated directly from the balancing algorithm.
The interleaving process for a converter with H SMs per arm is illustrated in Table 5.2 for
even H and 5.3 for odd H . An analysis of the carriers waveforms of eq. (6.4) and their assignment
to the upper and lower arms of the phase-leg shows that phase-shift modulation provides
interleaving of the carrier waveforms and the H +1 and H -1 numbers are equally shared. In this
case, the interleaving stage of Section 5.3.2 can be omitted.
However, a similar assignment of carrier waveforms cannot be performed when level shifted
carriers are utilized in the modulation process. The interleaving process described in Tables 5.2
and 5.3 is implemented as an additional stage between the target waveform generation and the
switching of SMs as number of SMs is changed at every switching. It should also be noted that
only the additional states where H +1 or H -1 SMs are connected to the phase-leg affect the SM
voltage balancing algorithm as they create an additional unbalance between the SM voltage and
the DC-link voltage.
The effects of the modulation method to the equivalent capacitance of the converter and the
144
1.0
0.5
0.001 0.002 0.003 0.004 0.005
- 0.5
- 1.0
Upper or
6
Waveform level (p.u.)
Lower Arm
5 Switchings
4
3
2
1
0.001 0.002 0.003 0.004 0.005

time (sec)
Figure 6.3. Target waveform generation in the case of 2N+1 modulation for a converter
with 6 SMs per arm (12 carriers)
DC-link voltage of a back-to-back system are analyzed in the following section.
6.3.3 Converter equivalent capacitance
The equivalent capacitance of the MMC depends on the number of SMs connected in each
of the arms of both the converters. No capacitance or any other passive component is used
in the DC-link and therefore the PWM stage directly affects the equivalent capacitance of the
configuration. When the back-to-back system operates under H +1 modulation, the number
of SMs connected to each leg of the converter is equal to H as described in sections 5.3.1 and
6.3.1. The equivalent capacitance for the back-to-back system of Fig. 6.5 with six phase-legs is
constant and given by
C sub
C eq = ×6 (6.5)
H
When the converter operates under 2H +1 modulation, the number of SMs in the arms of
the converter is not constant, but can be equal to H -1, H or H +1 depending to the level of the
output waveform and the interleaving of the SM number. The number of SMs in each of the legs
145
depends on the PWM scheme, the overall switching frequency of the phase-leg and the operating
point (MI and phase angle) of each of the converters. Additionally, the number of SMs in each
leg is independent from the number of SMs in the other legs of the converter. Assuming that
P L H −1 , P L H and P L H +1 is the number of legs with H -1, H and H +1 SMs connected respectively
then the equivalent capacitance is
C sub C sub C sub

C eq = × P L H −1 + × P LH + × P L H +1 (6.6)
H −1 H H +1
where P L H −1 + P L H + P L H +1 = 6 as the total number of phase-legs in the back-to-back

configuration.
The equivalent capacitance of the configuration varies between the minimum value given by:
C sub
C mi n = ×6 (6.7)
H +1
and the maximum value given by:

C sub
C max = ×6 (6.8)
H −1
The variation in the number of the total SMs of the converter as a result of the modulation
method used affects the DC-link voltage with every SM affecting the DC-link voltage by
∗
Vc VDC
= (6.9)
6 6·H
under a balanced operation of the converter.
As the DC-link of the converter does not include any passive storage elements this change
affects the DC-link voltage directly. When 6H SMs are connected in the phase-legs of the
converter either H in each arm as in the case of the H +1 modulation or when this occurs in
the 2H +1 modulation, the DC-link voltage is equal to the reference value of eq. (6.9). However,
when the 2H +1 modulation results in a different number of SMs in the phase-legs as it is often
the case, the voltage of the DC-link is equal to
VDC ,r e f
Vd c = [P L H −1 · (H − 1) + P L H · H + P L H +1 · (H + 1)] (6.10)
6·H
As the value of H increases (considering larger number of SMs in the arms of the converter),
the effect of the 2H +1 modulation in the DC-link and the variation of the DC-link voltage reduces
significantly and the equivalent capacitance of the converter asymptotically approaches the
constant value of eq. (6.5). The maximum absolute variation in the equivalent capacitance due
to 2H +1 modulation versus the number of SMs in the arms of the phase-leg is given in Fig. 6.4.
146
0.4
Maximum Capacitance
Deviation 0.2
-0.2 10 20 30 40 50
-0.4
Number of sub-modules (H)

Figure 6.4. Maximum capacitance variation vs. the number of SMs
6.4 System Description
The configuration of the back-to-back system of two MMCs is shown in Fig. 6.5. It consists of two
identical MMCs with H SMs per arm connected on the DC side without any additional passive
elements in the common DC-link of the interconnection. Each of the converter is configured
similarly (upper and lower arms of SMs within the phase-leg of the converter with an inductor
on each arm) to the MMC configuration presented Chapter 5 for the SHE modulation.
Both converters are connected to identical grids on each side through a phase inductor
(L conv ) while the losses in the inductor and the cable are modeled through a resistor (R conv ) and
this resistance is not physically present in the circuit. Both grids up to the point of common
coupling (PCC) are modeled through their impedance (R g and L g ) and are denoted as system 1
and system 2.
The parameters for the AC systems and the converters considered in the simulations are
given in Table 6.1. The converters in the simulated configuration consist of 20 SMs per phase-leg
(H =10). According to Section 5.3 either 11 or 21 levels can be derived in the output of the phase-
leg depending on the modulation algorithm. Operation of the converter under H +1 modulation
yields a total of 11 levels (Section 5.3.1) while the 2H +1 modulation results in 21 levels in the
output of the converter (section 5.3.2).
6.4.1 System Control
The two converters of the back-to-back system are controlled with the well-known d q control.
Each of the converter controls the reactive power flow at the corresponding PCC while one of
the two converters controls the DC-link voltage and the other one the active power exchange
between the two converters through the DC-link. The DC-link voltage is usually controlled by
the converter connected to the strongest grid but since in this case the two grids are considered
identical this role can be arbitrarily defined. In the configuration, converter 1 controls the active
power flow and converter 2 controls the DC-link voltage.
The d q transformations of the variables in each of the converter are given by eq. (6.11) and
147
SM1 SM1 SM1 + SM1 SM1 SM1
SM2 SM2 SM2 SM2 SM2 SM2
SMH SMH SMH SMH SMH SMH
Larm Larm Larm Iupper Larm Larm Larm

Rarm Rarm Rarm Rarm Rarm Rarm
Vdc
Rarm Rarm Rarm Rarm Rarm Rarm
Ilower
Larm Larm Larm Larm Larm Larm
SMH SMH SMH SMH SMH SMH

–
Rconv1 Rconv1 Rconv1 Rconv2 Rconv2 Rconv2

Lconv1 Lconv1 Lconv1 Lconv2 Lconv2 Lconv2
VPCC,a1 VPCC,b1 VPCC,c1
Rg1 Rg1 Rg1 Rg2 Rg2 Rg2
Lg1 Lg1 Lg1 Lg2 Lg2 Lg2
Vg1 Vg1 Vg1 Vg Vg Vg2
Figure 6.5. Configuration of a MMC based back-to-back system
Table 6.1. PARAMETERS OF THE SIMULATED BACK - TO - BACK SYSTEM
Rated Power 50MVA

Number of SMs (phase-leg 2H ) 20
Number of levels 11 and 21
DC-link voltage 50kV
SM capacitance C sub 3.5mF
SM voltage 5kV
Arm Inductor L ar m 3.6mH
Cell Equivalent Switching Frequency 266 Hz
Vac (rms line-to-line) 25kV
Output Conv. Inductance L conv 3 mH
148
(6.12)
Vd q = Td q · Vabc (6.11)
I d q = Td q · I abc (6.12)
where " #
2 cos θ cos(θ − 2π 4π
3 ) cos(θ − 3 )
Td q (θ) = (6.13)
3 sin θ sin(θ − 2π
3 ) sin(θ − 4π
3 )
and the angle θ is given by the synchronization method for each converter. In this analysis,
grid synchronization is performed by phase-locked loops (PLL).
The equations describing the current control of both converters in the d q frame are given by
eq. (6.14) and (6.15).
d Id
VPCC ,d − Vmi d d l e,d = −R conv · I d − L conv · + ω · Iq (6.14)
dt
d Iq
VPCC ,q − Vmi d d l e,q = −R conv · I q − L conv · − ω · Id (6.15)
dt
Fig. 6.6 shows the d q transformations and Fig. 6.7 shows the implementation of the controller
for the DC-link voltage control of converter 2. The controllers of converter 1 are identical to those
of converter 2 with the reference signals generated by the corresponding active and reactive
power controllers.
V*dc Vdc
v p
vdqp
positive &
vabc vabc_ fil abc v negative
v*a
PLL
sequence v n dq vdqn
extractor
v*b
Controller
i p idqp
positive &
iabc abc i negative
v *c
sequence i n dq idqn
extractor
Q*
Figure 6.6. Controller implementation: d q transformations
6.4.2 Voltage Balancing Algorithm
In order to ensure the proper operation of the converter and to maintain the voltages of the SMs
to the required level a voltage balancing algorithm is also used in the back-to-back configuration.
The voltage balancing algorithm is similar to the one presented in section 5.4.1 where the SM to
be switched is selected based on the sorting of the SM voltages, the level of the waveform and
the direction of the current through the arm.
149
i*dp vdp
V*dc + + - + v*dp
-  PI
-
 PI 
Vdc +
idp
L
iqp
L
i*qp - - v*qp
 
+ -
PI
+
vqp
Figure 6.7. Controller implementation: Control structure
The system of the back-to-back MMCs described in Table 6.1 and without any passive elements
on the DC-link under both H +1 and 2H +1 modulation is simulated using Matlab/Simulink [180]
and PLECS [182]. A power exchange scenario (Fig. 6.8) where both flow of active power and
control of reactive power are considered, is investigated in order to illustrate the two modulation
methods of the MMC.
The back-to-back system is initially operated under H +1 modulation for both converters of the
systems. Fig. 6.9 shows the line-to-line voltage of the converters for two periods of operation
under this modulation method. With 10 SMs in the arms of the capacitors, a maximum of 11
levels can be attained in the phase-voltage. Fig. 6.10a and 6.10b show the currents at the output
of converters 1 and 2 respectively. The large number of levels in the voltage of the converters
provides a high-quality current with reduced harmonic distortion. The requirement for filters in
50
40 P
Q
P (MW), Q(MVAr)
30
20
10 t
0
0.1 0.3 0.5 0.7 0.9 1 1.2 1.4 1.6 1.8 2
-10
-20
-30
-40
-50
Figure 6.8. Power exchange scenario for simulation results
150
the output of the converters is also eliminated as the low order harmonic distortion is below the
grid code requirements.
Line-to-Line voltage (kV)
50
25
-25
-50
0.7 0.705 0.71 0.715 0.72 0.725 0.73 0.735 0.74
time (sec)
(a)
Line-to-Line Voltage (kV)
50
25
-25
-50
0.7 0.705 0.71 0.715 0.72 0.725 0.73 0.735 0.74
time (sec)
(b)
Figure 6.9. Simulation results: Line-to-line voltage under H +1 modulation, (a) Con-
verter 1, (b) Converter 2
The d q currents of converters 1 and 2 for the 2 seconds of the simulated power exchange
scenario are shown in Fig. 6.11a and 6.11b and a detail of the converter 1 current during the
power reversal is given in Fig. 6.12. The variation of the SM capacitors over two periods of
operation for the two converters is shown in Figs. 6.13a and 6.13b respectively. The variation
in the capacitor voltages are a function of the load and hence the arm current and the voltage
balancing algorithm of the converter maintains the average voltage of the converter to the
required level.
The DC-link of the back-to-back configuration features no passive element and the voltage
on the DC-link depends on the switching of the converter as described in Section 6.3.3. The
DC-link voltage of the converter is given in Fig. 6.14.
In Section 5.2 it was shown that the circulating current in the converter depends on the
difference between the sum of total SM voltage that is connected to the phase-leg of the converter
and the DC-link voltage. Figs. 6.15a and 6.15b show the variation in the sum of the connected
voltages for two periods of operation and for the phase-leg A of converters 1 and 2 respectively.
The presence of a second order harmonic which results in a second order harmonic current
through the converter arms can be observed.
The simulation is repeated for the 2H +1 modulation. The line-to-line voltages of converters 1
and 2 under this modulation and for two periods of operation are given in Figs. 6.16a and 6.16b.
151
1500
1000
Iabc (A)
500
0
-500
Phase A
-1000 Phase B
Phase C
-1500
0.96 0.97 0.98 0.99 1 1.01 1.02 1.03 1.04 1.05 1.06
time (sec)
(a)
1500
1000
Iabc (A)
500
0
-500
Phase A
-1000 Phase B
Phase C
-1500
0.96 0.97 0.98 0.99 1 1.01 1.02 1.03 1.04 1.05 1.06
time (sec)
(b)
Figure 6.10. Simulation results: Output currents, (a) Converter 1, (b) Converter 2
2000
Id
dq currents (A)
Iq
1000
-1000
-2000
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
time (sec)
(a)
2000
dq currents (A)
1000
-1000
Id
Iq
-2000
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
time (sec)
(b)
Figure 6.11. Simulation results: d and q currents, (a) Converter 1, (b) Converter 2
2000
Id
Iq
dq currents (A)
1000
-1000
-2000
0.96 0.97 0.98 0.99 1 1.01 1.02 1.03 1.04 1.05 1.06
time (sec)
Figure 6.12. Simulation results: d and q current of converter 1 during power reversal
152
6000
SM Voltages (V)
5500
5000
4500
4000
1.2 1.205 1.21 1.215 1.22 1.225 1.23 1.235 1.24
time (sec)
(a)
6000
SM Voltages (V)
5500
5000
4500
4000
1.2 1.205 1.21 1.215 1.22 1.225 1.23 1.235 1.24
time (sec)
(b)
Figure 6.13. Simulation results: SM capacitor voltage variation, (a) Converter 1, (b) Con-
verter 2
60
DC Voltage (kV)
40
20
0
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
time (sec)
Figure 6.14. Simulation results: Configuration of a MMC based back-to-back system
60
SM sum voltage (kV)
55
50
45
40
1.2 1.205 1.21 1.215 1.22 1.225 1.23 1.235 1.24
time (sec)
(a)
60
SM sum voltage (kV)
55
50
45
40
1.2 1.205 1.21 1.215 1.22 1.225 1.23 1.235 1.24
time (sec)
(b)
Figure 6.15. Simulation results: Sum of SM voltages connected to the phase-leg for H+1
modulation, (a) Converter 1, (b) Converter 2
153
The output currents of the two converters during the power reversal are shown in Figs. 6.17a for
converter 1 and 6.17b for converter 2. The d and q components of the output current during
the total power exchange scenario are shown in Figs. 6.18a and 6.18b respectively. The initial
low frequency oscillation in the d current is mainly due to the effect of the voltage balancing
algorithm which supersedes the current controller references in order to maintain the voltages
of the SM capacitors to the required level.
50
25
-25
-50
0.7 0.705 0.71 0.715 0.72 0.725 0.73 0.735 0.74
time (sec)
(a)
50
25
-25
-50
0.7 0.705 0.71 0.715 0.72 0.725 0.73 0.735 0.74
time (sec)
(b)
Figure 6.16. Simulation results: Line-to-line voltage under 2H +1 modulation, (a) Con-
The variation in the SM capacitor voltages for converters 1 and 2 (phase-leg A) is shown
in Figs. 6.19a and 6.19b respectively. The voltage balancing algorithm of each converter arm
maintains the voltage of the SMs to the required level. The DC-link voltage of the converter
under 2H +1 modulation is given in Fig. 6.20. The filtered DC-link voltage of Fig. 6.20 is used in
the control algorithms as it removes the effect of the 2H +1 modulation on the DC-link voltage
which is in the order of the switching frequency due to the variable number of SMs in the phase-
legs of the converter. This variation due to the switching with the arms of the converter can be
observed in the sum of the total phase-leg SM voltage connected to the arm for both converter 1
(Fig. 6.21a) and converter 2 (Fig. 6.21b).
6.5.3 Comparison of Modulation Methods
Both modulation methods provide proper operation of the MMC (Figs. 6.9–6.16) for the back-to-
back application of Fig. 6.5, providing active, reactive and dc-link voltage control. Figs. 6.14a
and 6.20a show the DC-link voltage (filtered) of the back-to-back configuration that does not
utilize any passive elements. In the case of the H+1 modulation, the constant number of SMs
connected to the converter phase-leg means that the DC-link link voltage will only have the
DC-link voltage controller dynamics together with the additional dynamics caused by the voltage
154
1500
1000
500
Iabc (A)
0
-500
Phase A
-1000 Phase B
Phase C
-1500
0.96 0.97 0.98 0.99 1 1.01 1.02 1.03 1.04 1.05 1.06
time (sec)
(a)
1500
1000
500
Iabc (A)
0
-500
Phase A
-1000 Phase B
Phase C
-1500
0.96 0.97 0.98 0.99 1 1.01 1.02 1.03 1.04 1.05 1.06
time (sec)
(b)
Figure 6.17. Simulation results: Output currents during active power reversal, (a) Con-
1500
Id
1000 Iq
dq currents (A)
500
0
-500
-1000
-1500
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
time (sec)
(a)
2000
dq current (A)
1000
-1000
Id
Iq
-2000
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
time (sec)
(b)
Figure 6.18. Simulation results: d and q current components, (a) Converter 1, (b) Con-
verter 2
155
6000
SM Voltage (V)
5500
5000
4500
4000
1.2 1.205 1.21 1.215 1.22 1.225 1.23 1.235 1.24
time (sec)
(a)
6000
SM Voltage (V)
5500
5000
4500
4000
1.2 1.205 1.21 1.215 1.22
time 1.225 1.23 1.235 1.24
(sec)
(b)
Figure 6.19. Simulation results: SM capacitor voltage variation, (a) Converter 1, (b) Con-
verter 2
60
DC Voltage (kV)
50
40
30
20
10
0
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
time (sec)
(a)
60
DC Voltage (kV)
55
50
45
40
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
time (sec)
(b)
Figure 6.20. Simulation results: DC-link voltage under 2H +1 modulation, (a) Filtered,
(b) Unfiltered
156
SM sum voltage (kV) 60
55
50
45
40
0.62 0.625 0.63 0.635 0.64 0.645 0.65 0.655 0.66
time (sec)
(a)
60
SM sum voltage (kV)
55
50
45
40
0.6 0.605 0.61 0.615 0.62 0.625 0.63 0.635 0.64
time (sec)
(b)
Figure 6.21. Simulation results: Sum of SM voltages connected to the phase-leg for 2H +1
modulation, (a) Converter 1, (b) Converter 2
sorting and balancing algorithm. However, in the case of the 2H+1 modulation, the switching
between the number of SMs in the phase-leg means that a high-frequency component (shown
in Fig. 6.20b) is present in the DC-link.
The higher number of levels of the 2H +1 modulation results in reduced ripple of the wave-
forms and reduced filtering requirements for the same switching frequency. Also, as the number
of SMs in a phase-leg increases the effect of the variable SM number in the arms of the con-
verter becomes less significant than it is in topologies with low number of levels as shown in
Section 6.3.3. The application of 2H +1 modulation as the number of levels increases results in
improved operating characteristics of the converter and the method becomes a more attractive
modulation method.
The voltage balancing algorithm maintains the voltages of the SM capacitor to the required
level. The behavior of the SM voltages for H +1 and 2H +1 modulation are shown in Figs. 6.13 and
6.19 respectively for both the upper and lower arm voltages. The SM capacitor voltages of the
same arm are maintained close to the reference value of 5 kV for both cases. The presence of the
voltage ripple in the SM voltage is due to the arm currents through the converter and includes a
fundamental and a second harmonic component. The DC-link voltage ripple is determined by
the arm and load current and also on the SM capacitor value and average switching frequency
of each SM.
157
6.6 Conclusion
The MMC is a topology suitable for medium and high voltage, medium and high power ap-
plications. In this chapter, two multi-carrier PWM methods for a back-to-back configuration
based on the MMC, namely H +1 and 2H +1 modulation, are analyzed. The application of the
modulation methods and their effect on the back-to-back system for each case are presented
through simulation results. The voltage balancing algorithm maintains the voltages of the in-
dividual SMs to the required level. As the number of levels and SMs in the phase-legs of the
converter increases, the effect of the interleaved switching and variable number of SMs becomes
less significant and the application of the 2H +1 modulation becomes more attractive. The 2H +1
modulation results in output waveforms with improved harmonic characteristics and further
reduces the filtering requirements for the same switching frequency of the SMs in the arms of
the converter.
Chapter 7
Conclusions
7.1 Summary
The thesis analyzes SHE-PWM for two-level and multilevel VSCs and proposes its application for
modular and hybrid multilevel converters. It describes solution trajectories and optimized DC
levels for the waveforms and also deals with symmetry and formulation issues. More specifically :
• Chapter 2 discussed SHE-PWM for two-level VSC topologies. The assumed quarter-
wave symmetry was no longer considered a requirement for the waveform and problem
formulations as well as solution trajectories for HWS and non-symmetrical waveforms
were calculated. The relaxation of the symmetries provided additional solution sets.
The evaluation of the extended solution sets identified sets with improved harmonic
performance.
• Chapter 3 presented MSHE-PWM patterns and proposed its implementation for five
and seven-level hybrid converter systems. This approach provided improved harmonic
performance when compared to the stepped approximation of the multilevel waveform.
The calculated solution sets were utilized in a five level hybrid cascaded converter and a
seven-level hybrid ANPC based hybrid cascaded converter. The effects of the modulation
and the limits the application were also analyzed.
• Chapter 4 analyzed the multilevel SHE-PWM problem with a variable DC voltage approach.
The levels of each voltage were considered variables in the problem hence providing the
opportunity for elimination of additional harmonics from the output spectrum. The
cases of five and seven-level converters, based on the cascaded H-bridge topology, were
investigated.
• Chapter 5 proposed the MSHE-PWM of the MMC, a topology highly suitable for high
voltage and high power applications. The modulation strategies of the converter were
discussed analytically together with a SM capacitor voltage balancing method based on
sorting of the voltages, in order to regulate the SM voltages to the required voltage level.
• Chapter 6 discussed the back-to-back configuration of MMCs, proposed and analyzed

two multi-carrier PWM methods for modulating the arms and phase-legs of the converter
and provided extended simulation results for the operation of the system under both
modulation methods.
158
159
7.2 Conclusions
• The assumption of QWS in the definition of the two-level SHE-PWM is not a necessary
requirement. QWS reduces the complexity of the problem and the computational intensity
in the calculation of the solutions with the cost of reduced solution space and significantly
less available solutions. HWS formulations extend the available number of solution sets
to the SHE-PWM problem. The relaxation in the constraints provides sets that exhibit
improved harmonic performance (improved THD%, WTHD%, angle separation etc) over
the well know QWS solutions. An evaluation of each formulation in order to select the set
delivering the optimal results for the requirements of a particular application is required.
• Solutions based on the complete relaxation of all the constraints of symmetry in the
waveform can also be calculated given a proper formulation of the problem. However,
non-symmetrical formulations result in a rather complicated problem requiring additional
computational effort. Moreover, solutions that do not consider any symmetries result
in sub-optimal harmonic performance. The first harmonic in the spectrum does not
always correspond to the one in the case of HWS and QWS depending on the number of
transitions of the PWM waveform. Additionally, non-symmetrical waveforms generate
even harmonics in the output waveform further worsening the harmonic performance of
such an approach.
• The stepped approximation SHE-PWM for multilevel converters does not provide satis-
factory results as only a small number of harmonics can be eliminated due to the limited
number of harmonics in the output waveform. Multilevel SHE-PWM patterns can be
calculated with additional switchings in the levels of the waveform significantly improving
the output waveform. Solutions for various levels in the waveform and different number
of switchings and switching distributions to the levels of the waveform are calculated.
These solution sets exhibit different harmonic performance and should be individually
evaluated as part of the calculation process.
• Hybrid multilevel converters extend the operation of typical multilevel converters and
improve their output as they increase the number of levels for a given number of available
DC-links and DC-link voltages. Multilevel SHE-PWM is a viable alternative for their
modulation. However, their proper operation requires active regulation of the H-bridge
capacitor voltages to the required level in order to generate the necessary output waveform.
Thus monitoring and active regulation of the floating capacitor voltages and output
currents of the converter are necessary in order to select the necessary switching states
and provide regulation of the converter voltages. Additional requirements include the
minimization of the voltage ripple in the converter and the reduction in the number of
transitions between the states of the converter due to voltage regulation.
• The limits of operation in a hybrid multilevel converter, for which regulation of the floating
capacitor voltages can be achieved depend on the load power factor and the selection
of solution set from the available ones. Evaluation of the voltage regulation based on
160
off-line determination provided the solution set, active regulation of the voltages and
approximations to the harmonic content of the current waveform illustrate the limits in
the application of each hybrid multilevel configuration.
• Calculation of optimized levels in multilevel waveforms offers elimination of additional

harmonics due to the increased number of variables in the problem formulation. The
calculated solutions are constant over the whole range of the modulation indices with
linear variation in the voltage levels. The problem can be formulated for different number
of levels and multiple solutions also exist for this formulation of SHE-PWM. However,
inherent in these variable DC voltage methods are issues of voltage regulation, DC voltage
control and the slow dynamics inherent in this process.
• The MMC is the state-of-the-art multilevel converter, expandable to a large number of

levels. The circuit configuration requires different approaches then the typical multilevel
converters due to the large number of sub-modules and capacitors in each phase-leg.
Combined with a proper algorithm that regulates the voltage of the sub-module capacitors,
the converter topology can operate under MSHE-PWM providing high quality waveforms
while maintaining the low switching frequency of the SM switches.
• Based on the configuration of the MMC, two modulation schemes are proposed for the
MSHE-PWM. Both of them provide high quality waveforms while generating different
number of levels in the output and different internal operational characteristics for the
same switching frequency in the for the switching devices. Both SHE-PWM methods
are verified through simulation and experimental results illustrating the feasibility of the
method.
• The MMC topology is suitable for high power applications and the operation of a back-to-
back configuration of MMCs under multi-carrier SPWM is investigated. The configuration
does not feature a DC-link capacitor or any other passive elements in the DC-link. The
different modulation methods provide distinct waveforms and behavior of the converters.
Under H +1 modulation , the number of levels in the output is reduced while the converter
maintains a constant DC-link voltage. Additionally the arm currents do not have any high
frequency components in them. Under 2H +1 modulation, the higher number of levels
comes at the cost of switching frequency harmonics in the DC-link voltage due to the
variable number of SMs connected to the back-to-back configuration and additional har-
monic components in the arm currents. Overall, the performance of the H +1 modulation
method is preferable for the MMC topology, but as the number of SMs in the arms increase
the effects of the 2H +1 modulation are minimized and the methods become equivalent.
161
7.3 Future Work
At the conclusion of this work, a number of topics are suggested for future research.
• A comparison of the MMC with the well-known topologies of converters for low number of
levels in the output and identification of possible advantages in the configuration versus
drawbacks in the implementation.
• Closed loop operation of the MMC under SHE-PWM. Modulation methods of multilevel
converters under closed loop controllers suffer from sub-optimal dynamic performance.
Future research could investigate the operation of the converter, together with the voltage
balancing strategies for applications that require closed loop control.
• Alternative and hybrid configurations of multilevel converters with combinations of

half-bridge and full-bridge converters within the arms of the topology. Both converters
have been separately proposed and future research could investigate the advantages
and drawbacks of combining the two building blocks of modular converters for various
applications.
• Implementations of the MMC with multiple DC voltage sources in the bridges of the
converter as part of renewable energy systems grid integration and comparison with
equivalent topologies such as the cascaded H-bridge converter.
• Evaluation of the MSHE-PWM and the limits of its application based on increasing num-
ber of levels, continuity of the calculated solutions and advantages over sampled PWM
methods as the number of levels increase.
• Closed loop implementation of the variable DC voltage MSHE-PWM technique and inves-
tigation of possible applications of the method to grid applications such as STATCOMs
and converters for grid support where the slower dynamics of the voltage regulation can
be accepted.
• Hybrid and modular multilevel converters are a viable alternative for the grid integration
of renewable energy systems such as wind turbines and large scale PV plants. Their
superior harmonic performance allows for medium voltage integration while avoiding or
limiting the use of filters in the output and grid transformers if isolation of the system is
not necessary.
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Harmonic Elimination Pulse Width Modulation of

Modular and Hybrid Multilevel Converter Topologies

A Thesis submitted in fulfillment of the requirements for the degree of

School of Electrical Engineering and Telecommunications

The University of New South Wales

List of Tables viii

List of Abbreviations xii

2 Two-level Selective Harmonic Elimination PWM 13

3 Multilevel Selective Harmonic Elimination PWM 43

4 MSHE-PWM technique with Variable DC levels 84

5 Selective Harmonic Elimination PWM of Modular Multilevel Converters 112

6 Modular Multilevel Converters for Back-to-Back systems 139

Table 4.1 Summary of solution sets for the variable MSHE-PWM . . . . . . . . . . . 99

Table 5.1 Output and charging state of a sub-module . . . . . . . . . . . . . . . . . . 114

Table 6.1 Parameters of the simulated back-to-back system . . . . . . . . . . . . . . . 147

Figure 2.1 Two-level, three-phase VSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 3.1 Generalized five-level PWM waveforms . . . . . . . . . . . . . . . . . . . . . 44

Figure 4.1 Three-phase CHB multilevel converter with variable DC voltages . . . . 85

Figure 6.1 Voltage source converters in high power applications . . . . . . . . . . . 140

1.1 Voltage Source Based Power Electronics Conversion

The main multilevel converter topologies are [1]–[6] :

• The neutral-point clamped (NPC) converter [7]–[12]

• The flying capacitor (FC) converter [19]–[24] and

• The cascaded H-bridge (CHB) converter.

• Space Vector Modulation (SVM) [57]–[60], and

• Selective Harmonic Elimination (SHE) and similar methods based on optimization of

1.2 Literature Review - Background

1.2.1 Multilevel and Hybrid Converters

NPC as the main topology.

1.2.2 Selective Harmonic Elimination PWM

1.2.3 Modular Multilevel Converter

1.3 Objectives of the Thesis

The main objectives of the thesis are:

1.4 Methodology and Tools Used

1.5 Thesis Contributions

The main contributions of this thesis are as follows:

? Investigation of the MSHE-PWM under variable DC-voltage levels is proposed (Chap-

1.6 List of publications

1.6.1 Journal Papers

[1] M.S.A. Dahidah, G. Konstantinou, V. G. Agelidis, “Optimized switching instants and DC

[3] S.R. Pulikanti, G.Konstantinou, V. G. Agelidis, “Generalization of flying-capacitor based

1.6.2 International Conference Papers

The following papers have been presented in international conferences:

[5] G. Konstantinou, M. Ciobotaru, V. G. Agelidis, “Analysis of multi-carrier PWM methods

[6] G. Konstantinou, M. Ciobotaru, V. G. Agelidis, “Operation of a modular multilevel converter

[7] M.S.A. Dahidah, G. Konstantinou, V. G. Agelidis, “ SHE-PWM and optimized DC voltage

[8] S. R. Pulikanti, G. Konstantinou, and V. G. Agelidis, “Seven-level cascaded ANPC-based

[9] G. Konstantinou, S. Pulikanti, V. G. Agelidis, “Harmonic elimination control of a five-level

[12] G. Konstantinou and V. G. Agelidis, “Performance evaluation of half-bridge cascaded mul-

1.6.3 Papers under Revision or Review

[13] G. Konstantinou, M. Ciobotaru, V. G. Agelidis, “On re-examining symmetry of two-Level

[14] G. Konstantinou, M. Ciobotaru, V. G. Agelidis, “Selective harmonic elimination pulse-width

[15] S.R. Pulikanti, G. Konstantinou, V. G. Agelidis, “Hybrid seven-level cascaded active-neutral-

Chapter 2. Two-level Selective Harmonic Elimination PWM [4], [11], [13]

Chapter 4. MSHE-PWM technique with Variable DC-levels [1], [7]

Chapter 5. Selective Harmonic Elimination PWM of Modular [6], [12], [14]

Chapter 6. Modular Multilevel Converters for Back-to-Back Sys- [5]

1.7 Thesis Outline

The thesis is organized as follows: