UEEA1333

Analogue Electronics

Topic 7

Power amplifiers

Jan 2020 1
 Output Stage
• Output stage refers to the part of an electronic device which
sends out signal and connects with an external device.

3 performance specifications of power amps:

•Linearity between the input and output signals should be
maintained, to give low total harmonic distortion (THD)
•The output stage should provide a low output resistance, so that
output signals are delivered to the load without attenuation (i.e.
minimize loading effect).
•Efficient signal power delivery to the load, to minimize the 2
power consumption of transistors and resistors in the stage.
 Types of Output Stage
• The output stage of power amplifier is classified according to the
time the output transistors are turned on (conducting):
– Class A : Transistor conducts for the entire cycle of the input signal.
– Class B : Transistor conducts for half of each sine wave cycle.
– Class AB: Transistor conducts for slightly more than half a cycle.
– Class C : Transistor conducts for less than half a cycle.

3
 Types of Output Stage
Class Conduction angle
A 2
B  time and angle domain
AB  <  << 2 Time Angle
C < t t
T T = 2

4
 Class A
• Transistor is biased in the
active region so that it is
always on (ideally)
• Transistor conducts for the
entire cycle of the input
signal, i.e. the conduction
angle  = 360° =2.
• Transistor’s DC biasing
collector current ICQ should
be > amplitude of output
signal current Îc
• Total collector current iC  I C  Iˆc sin t I C  Iˆc 5
In the example below, ICQ is 1 mA. So the amplitude of the
output signal current Îc cannot be more than this for class A
operation. Otherwise the transistor will go into cut-off or
saturation. Transistor should only operate in the active region
for class A operation.

6
 Emitter follower
• The emitter follower is the
most popular class A output
stage, because the advantage of
having a low output resistance.

• Output transistor Q1 is biased

with a constant biasing current I,
supplied by the constant current
source circuit (current mirror),
ICQ1  IEQ1 = I
Constant
current
current mirror 7
 • The current mirror circuit generates a fixed current I for biasing
Q1. Using the diode’s (exponential) voltage-current relationship,
I is very close to IR. So,

0  (VCC  VBE2 ) VCC  VBE2

I  IR  
R R

KCL: iE1 = I + iL
IR
• So the current I must be
greater than the largest
negative load current;
otherwise, Q1 cuts off and
class A operation will no
longer be maintained.
current mirror 8
• The transfer characteristic
(input voltage vs. output voltage)
of the class A circuit can be
obtained as follows
v0 = vI – VBE1

A linear transfer
characteristic
curve is obtained
over this range
9
• The upper limit is due to Q1 saturation:
vo(max) = VCC – VCE1sat

VCE1sat 10
• The bottom limit is determined either by
Q1 turning off: vo(min) = -IRL (premature cut-off)
or
Q2 saturating: vo(min) = -VCC + VCE2sat (ideal design)

Consider KCL at vO:

iE1 = I + iL

The ideal case can be

obtained provided that
I > |iL|
to keep Q1 on (i.e. iE1>0)
vO (min)  VCC  VCE 2 sat
I  
RL RL
VCC  VBE 2 sat
where I  I R  11
R
• To summarize, for maximum output voltage swing
without clipping (ideal case), we need
iE > 0 (to ensure Q1 on)
IR – |iL| > 0 (during negative swing)
IR > |iL|
(VCC – VBE2)/R > (VCC – VCE2sat)/RL
RL > R(VCC – VCE2sat)/(VCC – VBE2)
RL > R (approx. by ignoring VBE2 and VCE2sat)

• If RL < R, the peak negative output voltage will be

higher than -VCC + VCE2sat, resulting in premature
clipping of the negative cycle for a sine wave (signal
becomes distorted) 12
 Example
• For the emitter follower, assume
VCC = 12 V
VCEsat = 0.5 V
VBE = 0.7 V
IR = 5 mA
RL = 650 Ω.
Assume also identical transistors of
hfe = 100 (=)
(a) Determine the critical value of load
resistor to avoid clipping.
(b) Find the max output voltage swing
without clipping if RL= 650 Ω.
(c) Find the max output voltage swing
without clipping if RL= 2.5 kΩ. 13
 VCC  VBE 2 12  0.7
a) R    2260
I 5m
RL ( critical )  R  2260

b) 650   2260, i.e. RL  RL ( critical ) (premature cut-off)

vo (min)   I R RL  5m(650)  3.25 V
vo (max)  VCC  VCE 1( sat )  12  0.5  11.5 V
max output voltage swing will be from - 3.25 V to 11.5 V

c) 2500  2260, i.e. RL  RL ( critical ) , (ideal case)

vo (min)  VCC  VCE 1( sat )  12  0.5  11.5 V
vo (max)  VCC  VCE 1( sat )  12  0.5  11.5 V
max output voltage swing will be from - 11.5 V to 11.5 V 14
 Example
• For the emitter follower in figure,
VCC = 15 V
For both transistors:
VCEsat = 0.2 V
VBE = 0.7 V (constant)
 is very high
i) Without neglecting VCEsat and VBE ,
find the value of R that will establish
a bias current sufficiently large to
allow the largest possible output
signal swing for RL= 1 kΩ.
ii) Determine the resulting output
signal swing and the minimum and
maximum emitter currents.
15
i)
iE > 0 (to ensure Q1 on)
IR – |iL| > 0 (during negative swing)
IR > |iL|
(VCC – VBE2)/R > (VCC – VCE2sat)/RL
R < RL (VCC – VBE2)/(VCC – VCE2sat)
R < 1000(15-0.7)/(15-0.2)
R < 966 

ii)
Max. output voltage = VCC – VCE1sat = 15-0.2 = 14.8 V
Min. output voltage = – VCC +VCE2sat = – 15+0.2 = – 14.8 V
The output swing is between – 14.8 to +14.8 V

Minimum emitter current = 0 A

Maximum emitter current = 2I = 29.6 mA
16
Class A Signal Ideal Sine Waveforms

(neglect VCE1sat)

vCE1 = VCC – v0

pQ1 = vCE1 iC1

IR =

17
 Class A: Power dissipation
• Let the output be sinusoidal, vo = Vmsint and iL= vo / RL
• Consider when output voltage is at maximum swing. Assuming
VCEsat is negligible: vo(max)  VCC and iL(max)= I= VCC/RL

• Instantaneous power dissipation in Q1 is

pQ1 = vCE1iC1 = (VCC – vo )(I + I sint)
= (VCC – VCCsint)(I + VCC sint / RL)

18
If RL  or 0:
pQ1 = VCC(1 – sint) I (1 + sint)= VCC I (1 – sin2t)
= VCC I (1+ cos 2t)/2

Average power dissipation:

pQ1(ave) = VCC I /2 = VCC2 /2RL (average of cos2t is 0)

Maximum instantaneous power dissipation is when cos2t =1 :

pQ1(max) = VCC I (1+1)/2= VCC I
which happens during quiescent condition (when input
signal is zero) i.e. the transistor dissipate the largest amount of
power when v0= 0. Since the condition can stay for a long time, Q1
must be able to withstand power dissipation of VCC I
19
 Example
• Consider the emitter follower
shown, with
VCC = 10 V
I = 100 mA
RL = 100 
VBE negligible
a) Find the power dissipated in Q1
and Q2 under quiescent conditions
(i.e. v0 = 0).
b) For a sinusoidal output voltage
of maximum possible amplitude
(neglecting VCEsat), find the
average power dissipation in Q1
and Q2.
c) Find the load power.
20
a) In quiescent,
pD1 = vCE1iC1 = VCC I = 1 W
pD2 = vCE2iC2 = VCC I = 1 W
b) For max sinusoidal output,
pD1(ave) = VCC I /2 = 0.5 W
pD2(ave) = VCC I = 1 W (because I is a constant current)
c) Maximum output amplitude Vm = vo(max) = VCC (neglect VCEsat)
i.e. Vm = 10 V peak

2 2
Vrms (Vm / 2 ) 2 Vm 10 2
 load power      0.5 W
RL RL 2 RL 2(100)

21
Class A: Power Conversion Efficiency
• Assume sinusoidal output with peak Vm,
The average current in
Q1 is equal to I, thus the
average power drawn
from the positive supply
is VCC I

2
V 2
 Vm  1 Vm2
load power PL   
rms
 
RL  2  RL 2 RL

current in Q2 is constant (I), so average power

from negative supply is VCC I

• Thus total average power from supply is PS = 2 VCC I 22

 Class A: Power conversion efficiency
• The power conversion efficiency is defined as

 = Load power PL / supply power PS

Vm2 Vm2
 / 2VCC I 
2 RL 4VCC IRL

1 Vm Vm Since Vm  VCC and Vm  IRL,

 ( )( ) maximum efficiency is obtained
4 IRL VCC
when Vm = VCC = IRL. Thus the
maximum efficiency is 25%
23
 Class B
• Transistor conducts for only
half of a cycle (i.e.
conduction angle = 180°)
• Bias Q-point at cutoff region

24
 Class B Output Stage
• Consists of a complementary
pair of transistors (pnp and
npn) connected in series, so
that both cannot conduct at the
same time.
• When the input voltage vI is
zero, both the transistors are
cut off and v0 = 0.
• Each transistor takes turn to
conduct – QN for positive
output voltage and QP for
negative output voltage
25
• Class B is also known as push-pull amplifier:
– QN pushes (sources) current into the load when vI is positive.
– QP pulls (sinks) current from load when vI is negative.

Push

Pull

26
• For vI > 0.5 V (approx.),
transistor QN conducts and
operates as an emitter follower.
QP is cut off. +
The output voltage is 

vo = vI – VBEN
+
• QN will saturate with a

maximum output
vo(max) = VCC – VCEN(sat)

• Similarly, for the negative cycle

vo = vI + VEBP
vo(min) = – VCC + VECP(sat)
27
Transfer characteristics:

• The interval when both QP and QN remain off is known as

dead zone, which causes crossover distortion of the output
signal 28
 Crossover
distortion
Dead zone

Clipping
distortion

1. For small input signal, crossover distortion is obvious

2. For large input signal, crossover distortion is not so obvious
29
3. If input signal is too large, it will cause output clipping
 Class B: Power Conversion Efficiency
• To simplify analysis, we neglect cross-over distortion. Let us
consider the case of an output sinusoid of peak amplitude Vm.
• The average output load power is similar to class A:
Vm2
PL 
2 RL
• The current drawn from each supply consists of a half sine
wave with a peak value Im = Vm/RL. So, the average current is:

1  1
2 0

I C ( ave)  I sin t d (t )  I [  cos t ]
2
m m 0

I m Vm
 
 RL
30
• The average power drawn from each of the positive/negative
power supply are the same by symmetry, so the total supply
power is
2VCCVm
PS  2VCC I C ( ave) 
RL
• Thus, we can obtain the power conversion efficiency PL/PS as

V
 m

4VCC

• The maximum efficiency is obtained when Vm reaches

maximum. So, substituting Vm  VCC (ignore saturation) gives

 max   78.5%
4
31
 Class B: Power Dissipation
• The quiescent power dissipation of class B is 0 because both
transistors are off when there is no input signal.
• The average power dissipation for the output stage is
2VCC Vm Vm2
PD  PS  PL  
RL 2 RL
• Find the worst-case power dissipation,
dPD 2V CC Vm 2VCC
  0  Vm P 
dVm RL RL 
D max

2
2VCC
 PD (max)  2 (half of PD(max) in QN; the other half in QP)
 RL
2
VCC Each transistor must be able to
PDN (max)  PDP (max)  2
 RL withstand this amount of power

• At the point of maximum power dissipation, η = 50%. 32

 2VCC Vm Vm2
Plot PD vs Vm : PD  
RL 2 RL
Maximum transistor power

Maximum efficiency

Vm

Increasing Vm beyond 2Vcc/π decreases the class B stage’s power

dissipation while increasing the load power. However, this increases
nonlinear distortion as a result of approaching the saturation region of
transistor, and should be avoided in applications requiring low distortion.
33
 Example
A class B output stage is designed to deliver an average power of
20W to an 8 Ω load. The power supply is selected such that VCC
is about 5 V greater than the peak output voltage to avoid
transistor saturation and the associated nonlinear distortion.
Determine
a) the supply voltage required
b) the peak current drawn from each supply
c) the total supply power
d) the power-conversion efficiency
e) the maximum power that each transistor must be able to
dissipate safely

34
 1 Vm2
a) Since PL   Vm  2PL RL  2  20  8  17.9 V
2 RL
So, we choose VCC = 23 V
Vm 17.9
b) Peak current drawn per supply: I m    2.24 A
RL 8
c) Average power drawn per supply:
V I 2.24(23)
PS   PS   VCC I ave  CC m   16.4 W
 
Total supply power PS = 16.4 + 16.4 = 32.8 W
d) PL 20
Efficiency    100  61%
PS 32.8
e) Max power per transistor
2
VCC 232
PDN max  PDP max  2  2  6.7 W
 RL  8 35
 Class AB
• Biased at a nonzero dc current IQ (which is much smaller than the
amplitude of signal current Îc)
• Transistor conducts for an interval slightly greater than half of a
cycle (i.e. 180° < conduction angle << 360°)

iC = ÎC sint + IQ

where IQ < ÎC

IQ
36
• During an interval around the zero crossing, both transistors
conduct.
• Class AB is a preferred choice for audio amplifiers because
crossover distortion is almost eliminated (no dead zone),
therefore low output distortion (close to class A) but low
power dissipation and high efficiency (close to class B).

37
 Class AB Circuit
• A bias voltage VBB is applied
between the bases of QN and QP.
Choose VBEN = VEBP =VBB/2.
• For quiescent condition, VBB/2
appears across the BE junction
of each of QN and QP (so, both
transistors are on the verge of
conducting).
• A small positive input voltage vI
will cause QN to conduct;
similarly, a small negative input
voltage will cause QP to conduct.

vO  vI  VBB 2  VBEN = vVIEBP 

38
(for identical transistors: VBEN=VEBP=VBB/2)
• For identical transistors vo = vI Transfer characteristics:
therefore, no crossover distortion.
• Class AB operates in much the
same manner as class B, except
that for small vI, both the
transistors conduct, and as vI
increases or decreases, one will
take over the operation. Since the
transition is smooth, crossover
distortion will be almost totally
eliminated.

• Quiescent (no signal) power dissipation = VCC IQ per transistor.

Since IQ is usually much smaller than the peak load current, the
quiescent power dissipation is usually small.
• Note that actual biasing (not shown here) is provided by circuit
39
consisting of diode (diode biasing) or transistors (VBE multiplier)
 Class C
• Transistor is biased so that it is
well below cut-off point
• The transistor conducts for an
interval shorter than half a cycle
(i.e. the conduction angle < 180°)
• Output is highly distorted
• Usually used in high-power, high-
frequency applications, such as
radio-frequency transmitters.

40
 Comparison of power amp classes

Class A B AB C
Conduction 2  >, <<2 <
angle (entire cycle) (half cycle) (slightly more (less than half
than half cycle) cycle)
Q-point Active region Slightly cut-off Active region Cut-off
(near cut-off)
Quiescent high zero low zero
power
dissipation
Power low high high very high
efficiency
Output lowest medium low high
distortion
41