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    Toshiba Qosmio x70-A Quanta Bdd Da0bddmb8h0 Rev a1a Схема

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    Deyan Proynov
    This document contains a block diagram of an Intel Shark Bay platform with the following key components: 1) An Intel Haswell dual/quad core processor up to 45W with integrated graphics. 2) Up to 4GB of DDR3L memory on each of the 4 SODIMM slots across two channels for a maximum of 16GB total. 3) Display output options include eDP, HDMI, and LVDS interfaces to support integrated or discrete graphics solutions.

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    © All Rights Reserved
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    Toshiba Qosmio x70-A Quanta Bdd Da0bddmb8h0 Rev a1a Схема

    Uploaded by

    Deyan Proynov
    738 views37 pages
    This document contains a block diagram of an Intel Shark Bay platform with the following key components: 1) An Intel Haswell dual/quad core processor up to 45W with integrated graphics. 2) Up to 4GB of DDR3L memory on each of the 4 SODIMM slots across two channels for a maximum of 16GB total. 3) Display output options include eDP, HDMI, and LVDS interfaces to support integrated or discrete graphics solutions.

    Original Description:

    Toshiba Qosmio X70-A Quanta BDD DA0BDDMB8H0 Rev A1A Схема

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    © © All Rights Reserved

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    This document contains a block diagram of an Intel Shark Bay platform with the following key components: 1) An Intel Haswell dual/quad core processor up to 45W with integrated graphics. 2) Up to 4GB of DDR3L memory on each of the 4 SODIMM slots across two channels for a maximum of 16GB total. 3) Display output options include eDP, HDMI, and LVDS interfaces to support integrated or discrete graphics solutions.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    738 views37 pages

    Toshiba Qosmio x70-A Quanta Bdd Da0bddmb8h0 Rev a1a Схема

    Uploaded by

    Deyan Proynov
    This document contains a block diagram of an Intel Shark Bay platform with the following key components: 1) An Intel Haswell dual/quad core processor up to 45W with integrated graphics. 2) Up to 4GB of DDR3L memory on each of the 4 SODIMM slots across two channels for a maximum of 16GB total. 3) Display output options include eDP, HDMI, and LVDS interfaces to support integrated or discrete graphics solutions.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 37
    At a glance
    Powered by AI
    The document discusses the various power components, voltage regulators, and power distribution involved in powering a computer system. It details the different power rails and integrated circuits used to supply and regulate voltage to components like the CPU, memory, and I/O.

    The document outlines the different integrated circuits and components used to convert AC power to DC, regulate voltages, and distribute power. These include AC/DC converters, voltage regulators for various rails (+5V, +3V, +1.5V etc.), and power distribution traces on the motherboard.

    Power is distributed from the AC/DC converter to voltage regulators, then to the various components that require different voltages. Voltage regulators ensure stable voltages within tolerance even with varying loads. Traces on the motherboard further distribute power to connectors and ports.

    5 4 3 2 1

    (17.3") Intel Shark Bay Platform Block Diagram 01


    PCB 8L STACK UP
    Realtek RTD2136R LAYER 1 : TOP
    ILVDS LVDS Interface
    eDP to LVDS Converter LAYER 2 : SGND
    LVDS Panel
    D
    DDR3L SODIMM1 (STN 8H) CHA0 PAGE 21 OR LAYER 3 : IN1(High) D
    Maximam 4GBs eDP Panel LAYER 4 : SVCC
    BOT Side PAGE 13 DDR3L CHA 1600MT/s LAYER 5 : IN2(Low)
    eDP (5.4Gb/s) IEDP eDP Interface
    LAYER 6 : IN3(High)
    DDR3L SODIMM2 (STN 4H) CHA1
    Intel Proccesor N4K2K
    PAGE 22
    LAYER 7 : SGND
    Maximam 4GBs LAYER 8 : BOT
    HDMI (5.4Gb/s)
    TOP Side PAGE 14
    Haswell PIHM PS8401A 4K2K
    HDMI Repeater
    Port B
    HDMI Conn
    Power Source
    Processor : Daul / Quad Core PAGE 20 PAGE 20
    DDR3L SODIMM3 (STN 4H) CHB0
    Power : 35 / 45 (Watt) Intersil ISL88732HRTZ-T
    Maximam 4GBs
    Package : rPGA947 System Charger Power
    BOT Side PAGE 15 DDR3L CHB 1600MT/s
    Size : 37.5 x 37.5 (mm) PAGE 30
    PAGE 2-5
    DDR3L SODIMM4 (RUV 4H) CHB1
    Richtek RT8223P
    Maximam 4GBs

    DP SSC PLL CLK 135MHz


    OEHM System 5V/3V Power
    TOP Side PAGE 16 dLVDS

    DMI CLK 100MHz


    FDI x 2 (2.7Gb/s)
    DMI x 4 (2.5Gb/s)

    DP PLL CLK 135MHz


    PAGE 31
    PEG 16-LANE MXM Module
    N14E-GS TI TPS51216RUKR
    dEDP
    +1.35V DDR3L Power
    C
    MXM VGA PAGE 32 C

    PAGE 17
    TI TPS51211DSCR
    MXM VGA +1.05V PCH Power
    PCH VGA PAGE 33
    CRT Conn Intel PCH USB3.0 (6Gb/s)
    PAGE 20
    Intersil ISL95812HRZ-T
    Port1 Port2 Port3 Port4
    +VCCIN CPU Power
    mSATA Conn.
    Gen3 as HM87. PCH XDP TP
    JTAG Interface Lynx Point USB3.0/2.0 Conn.
    w/S&C(MAX14640)
    USB3.0/2.0 Conn.
    w/S&C(MAX14651) USB3.0/2.0 Conn. USB3.0/2.0 Conn.
    PAGE 34
    PAGE 19 PAGE 7 HM86/*HM87 PAGE 26 PAGE 26 PAGE 26 PAGE 26
    AOS AON7406
    *Port1 SATA Gen3 (6Gb/s) USB2.0 (480Mb/s) Port0 Port1 Port2 Port3
    Platform Controller Hub Power Switch IC
    Port0 Port4 Port3 Power : 3.5 Watt Port10 Port11 Port 9 PAGE 31

    32.768MHz
    25MHz

    Package : FCBGA695
    WLAN Conn.
    ODD Conn.(Gen2) 2nd HDD Conn. 1st HDD Conn. Size : 20 x 20 (mm) mPCIe/NGFF CCD Camera 3D IR module
    PAGE 18 PAGE 18 PAGE 18 PAGE 6-11 PAGE 24 PAGE 18 PAGE 18
    SMBus ME0
    AZALIA

    Function Code Description Function Code Description


    B
    PCIE Gen2 (2.5Gb/s) Port3 AOAC@ Support wake up on lan. 47W@ Haswell CPU 47W B
    NFC Module 8MB SPI ROM CS0# SPI Interface
    NXP PN544PC PCH(ME+EC+BIOS) NAOAC@ No support wake up on lan. 37W@ Haswell CPU 37W
    Port0 Port1
    PAGE 23 PAGE 7 LPC Interface E@ EMC solution NGFF@ Intel NGFF WLAN CARD
    Atheros QCA8171B Realtek RTS5227 GS@ G-Sensor WLAN@ WLAN mini card
    Giga LAN NGS@ None G-Sensor NMP@ Debug Mode
    Nuvoton Conexant LAN Controller Card Reader H1D@ 1st HDD WIN8@ Support WIN8
    NPCE985LA0DX CX20755-11Z Power : Power : 1.1 Watt H2D@ 2nd HDD WIN7@ Support WIN7
    Embedded Controller Audio Codec Package : QFN40 Package : QFN32 ZRP@ Zero power ODD CRT@ CRT function
    Power : Power :2 Watt Size : 5 x 5 (mm) Size : 4 x 4 (mm) ZRP-N@ None Zero power ODD ICRT@ Internal CRT function
    NCT5605Y 3ND_SMBus
    Extenal GPIO Package : LQFP128 Package : 40-QFN PAGE 26 PAGE 25 SSD@ SSD ECRT@ External CRT function
    PAGE 29 Size : 14 x 14 (mm) Size : 5 x 5 (mm) HM86@ PCH HM86 ECO@ ECO Mode
    PAGE 29 PAGE 24 25MHz
    HM87@ PCH HM87 3D@ 3D Mode
    PIV@ PX mode HM@ HDMI function
    APE8872M OEV@ Only discrete mode NHM@ None HDMI function
    Touch Pad Conn. Keyboard Conn. FAN Controller Function Code Description KBP@ Keyboard power 4K@ 4K2K support
    PAGE 27 PAGE 27 PAGE 2 IEDP@ Internal EDP mode NKBP@ None keyboard power N4K@ None 4K2K support
    dEDP@ external EDP mode Logo_LED@ Logo LED function 8401@ Use HDMI Repeater IC 8401.
    ILVDS@ Internal LVDS mode S&C@ Sleep and charge PIHM@ PX mode internal HDMI
    A
    dLVDS@ external LVDS mode NS&C@ None sleep and charge OEHM@ Only external HDMI A
    EDPLVDS@ EDP / LVDS optional S3@ Power S3 mode N4KPIHM@ None 4K2K PX mode internal HDMI
    OLVDS@ Only LVDS mode NS3@ None power S3 mode N4KOEHM@ None 4K2K Only external HDMI
    OEDP@ Only EDP mode NFC@ NFC support

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    Block Diagram
    Date: Tuesday, February 05, 2013 Sheet 1 of 37
    5 4 3 2 1
    5 4 3 2 1

    +1.05V

    Haswell Processor (DMI,PEG,FDI)


    Haswell rPGA EDS
    U22A

    E23 PEG_RCOMP
    PEG_RXN[0..15] [17]
    R486

    TP9
    *0_4 VCCST

    C341
    Haswell Processor (CLK,MISC,JTAG)
    *0.1U/10V_4X

    SKTOCC# AP32
    Haswell rPGA EDS

    MISC
    U22B

    AP3 SM_RCOMP_0 R73 100/F_4


    02
    PEG_RCOMP M29 PEG_RXN0 SKTOCC SM_RCOMP_0 AR3 SM_RCOMP_1 R71 75/F_4

    DDR3
    PEG_RXN_0 SM_RCOMP_1

    THERMAL
    D21 K28 PEG_RXN1 TP10 CATERR# AN32 AP2 SM_RCOMP_2 R75 100/F_4
    [6] DMI_TXN0 DMI_RXN_0 PEG_RXN_1 CATERR SM_RCOMP_2
    C21 M31 PEG_RXN2 EC_PECI AR27 AN3 CPU_DRAMRST#
    [6] DMI_TXN1 DMI_RXN_1 PEG_RXN_2 [9,29] EC_PECI PECI SM_DRAMRST CPU_DRAMRST# [12]
    B21 L30 PEG_RXN3 TP59 AK31
    [6] DMI_TXN2 DMI_RXN_2 PEG_RXN_3 FC_AK31
    A21 M33 PEG_RXN4 H_PROCHOT# R82 56_4 H_PROCHOT#_R AM30 AR29 XDP_PRDY#
    [6] DMI_TXN3 DMI_RXN_3 PEG_RXN_4 [30,34] H_PROCHOT# PROCHOT PRDY TP47
    L32 PEG_RXN5 PM_THRMTRIP# AM35 AT29 XDP_PREQ#
    PEG_RXN_5 THERMTRIP PREQ TP46
    D20 M35 PEG_RXN6 AM34 XDP_TCLK

    PEG
    [6] DMI_TXP0 DMI_RXP_0 PEG_RXN_6 TCK
    C20 L34 PEG_RXN7 AN33 XDP_TMS

    JTAG
    [6] DMI_TXP1 DMI_RXP_1 PEG_RXN_7 TMS
    D
    B20 E29 PEG_RXN8 AM33 XDP_TRST# D
    [6] DMI_TXP2 DMI_RXP_2 PEG_RXN_8 TRST
    A20 D28 PEG_RXN9 R55 0_4 PM_SYNC_R AT28 AM31 XDP_TDI
    [6] DMI_TXP3 [6] PM_SYNC

    DMI

    PWR
    DMI_RXP_3 PEG_RXN_9 E31 PEG_RXN10 R77 0_4 H_PWRGOOD_R AL34 PM_SYNC TDI AL33 XDP_TDO
    PEG_RXN_10 [9] H_PWRGOOD PWRGOOD TDO TP4
    D18 D30 PEG_RXN11 [12] PM_DRAM_PWRGD_R PM_DRAM_PWRGD_R AC10 AP33 XDP_DBRST# XDP_DBRST# [6]
    [6] DMI_RXN0 DMI_TXN_0 PEG_RXN_11 SM_DRAMPWROK DBR
    C17 E35 PEG_RXN12 R61 0_4 CPU_RST#_R AT26
    [6] DMI_RXN1 DMI_TXN_1 PEG_RXN_12 [9] CPU_PLTRST# PLTRSTIN
    B17 D34 PEG_RXN13 AR30 XDP_BPM#0
    [6] DMI_RXN2 DMI_TXN_2 PEG_RXN_13 BPM_N_0 TP51
    A17 E33 PEG_RXN14 AN31 XDP_BPM#1
    [6] DMI_RXN3 DMI_TXN_3 PEG_RXN_14 BPM_N_1 TP11
    E32 PEG_RXN15 3 4 CLK_DPLL_NSCLKN_R G28 AN29 XDP_BPM#2
    PEG_RXP[0..15] [17] [8] CLK_DPLL_NSCLKN TP7

    CLOCK
    D17 PEG_RXN_15 L29 PEG_RXP0 1 2 CLK_DPLL_NSCLKP_R H28 DPLL_REF_CLKN BPM_N_2 AP31 XDP_BPM#3
    [6] DMI_RXP0 DMI_TXP_0 PEG_RXP_0 [8] CLK_DPLL_NSCLKP DPLL_REF_CLKP BPM_N_3 TP53
    C18 L28 PEG_RXP1 RP16 3 4 0X2 CLK_DPLL_SSCLKN_R F27 AP30 XDP_BPM#4
    [6] DMI_RXP1 DMI_TXP_1 PEG_RXP_1 [8] CLK_DPLL_SSCLKN SSC_DPLL_REF_CLKN BPM_N_4 TP52
    B18 L31 PEG_RXP2 [8] CLK_DPLL_SSCLKP
    1 2 CLK_DPLL_SSCLKP_R E27 AN28 XDP_BPM#5
    [6] DMI_RXP2 DMI_TXP_2 PEG_RXP_2 SSC_DPLL_REF_CLKP BPM_N_5 TP45
    A18 K30 PEG_RXP3 RP18 3 4 0X2 CLK_CPU_BCLKN_R D26 AP29 XDP_BPM#6
    [6] DMI_RXP3 DMI_TXP_3 PEG_RXP_3 [8] CLK_CPU_BCLKN BCLKN BPM_N_6 TP48
    L33 PEG_RXP4 1 2 CLK_CPU_BCLKP_R E26 AP28 XDP_BPM#7
    PEG_RXP_4 [8] CLK_CPU_BCLKP BCLKP TP49
    K32 PEG_RXP5 RP20 0X2 2 OF 9 BPM_N_7
    PEG_RXP_5 L35 PEG_RXP6
    PEG_RXP_6 K34 PEG_RXP7 HSW_RPGA_EDS_PGA
    PEG_RXP_7 F29 PEG_RXP8
    R96 0_4 FDI_CSYNC_R H29 PEG_RXP_8 E28 PEG_RXP9
    [6] FDI_CSYNC
    FDI

    J29 FDI_CSYNC PEG_RXP_9 F31 PEG_RXP10


    [6] FDI_INT DISP_INT PEG_RXP_10 E30 PEG_RXP11
    PEG_RXP_11 F35 PEG_RXP12
    PEG_RXP_12 E34 PEG_RXP13
    PEG_RXP_13 F33 PEG_RXP14
    PEG_RXP_14 D32 PEG_RXP15
    PEG_RXP_15
    PEG_TXN_0
    H35
    H34
    PEG_TXN0
    PEG_TXN1
    PEG_TXN[0..15] [17]
    Haswell Processor (DDI,eDP,FDI)
    PEG_TXN_1 J33 PEG_TXN2
    PEG_TXN_2 H32 PEG_TXN3 Haswell rPGA EDS U22H
    PEG_TXN_3 J31 PEG_TXN4
    PEG_TXN_4 G30 PEG_TXN5 T28 M27 INT_EDP_AUXN
    PEG_TXN_5 [20] INT_HDMITX2N DDIB_TXBN_0 EDP_AUXN INT_EDP_AUXN [21]
    C33 PEG_TXN6 U28 N27 INT_EDP_AUXP
    PEG_TXN_6 [20] INT_HDMITX2P DDIB_TXBP_0 EDP_AUXP INT_EDP_AUXP [21]
    B32 PEG_TXN7 T30 P27 EDP_HPD#_Q

    HDMI
    PEG_TXN_7 [20] INT_HDMITX1N DDIB_TXBN_1 EDP_HPD
    B31 PEG_TXN8 U30 eDP E24 EDP_RCOMP
    PEG_TXN_8 [20] INT_HDMITX1P DDIB_TXBP_1 EDP_RCOMP
    A30 PEG_TXN9 U29 R27
    PEG_TXN_9 [20] INT_HDMITX0N DDIB_TXBN_2 EDP_DISP_UTIL
    B29 PEG_TXN10 V29
    PEG_TXN_10 [20] INT_HDMITX0P DDIB_TXBP_2
    A28 PEG_TXN11 U31
    PEG_TXN_11 [20] INT_HDMICLK- DDIB_TXBN_3
    B27 PEG_TXN12 V31
    PEG_TXN_12 [20] INT_HDMICLK+ DDIB_TXBP_3
    A26 PEG_TXN13 P35 INT_EDP_TXN0
    C PEG_TXN_13 EDP_TXN_0 INT_EDP_TXN0 [21] C
    B25 PEG_TXN14 T34 R35 INT_EDP_TXP0 INT_EDP_TXP0 [21]
    PEG_TXN_14 A24 PEG_TXN15 U34 DDIC_TXCN_0 EDP_TXP_0 N34 INT_EDP_TXN1
    PEG_TXN_15 PEG_TXP[0..15] [17] DDIC_TXCP_0 EDP_TXN_1 INT_EDP_TXN1 [21]
    J35 PEG_TXP0 U35 P34 INT_EDP_TXP1
    PEG_TXP_0 DDIC_TXCN_1 EDP_TXP_1 INT_EDP_TXP1 [21]
    G34 PEG_TXP1 V35 P33 FDI_TXN0
    PEG_TXP_1 DDIC_TXCP_1 FDI_TXN_0 FDI_TXN0 [6]
    H33 PEG_TXP2 U32 R33 FDI_TXP0
    PEG_TXP_2 DDIC_TXCN_2 FDI_TXP_0 FDI_TXP0 [6]
    G32 PEG_TXP3 T32 N32 FDI_TXN1 FDI_TXN1 [6]
    PEG_TXP_3 H31 PEG_TXP4 U33 DDIC_TXCP_2 FDI_TXN_1 P32 FDI_TXP1
    PEG_TXP_4 DDIC_TXCN_3 FDI_TXP_1 FDI_TXP1 [6]
    H30 PEG_TXP5 V33
    PEG_TXP_5 B33 PEG_TXP6 DDIC_TXCP_3
    PEG_TXP_6 A32 PEG_TXP7 P29
    PEG_TXP_7 C31 PEG_TXP8 R29 DDID_TXDN_0
    PEG_TXP_8 B30 PEG_TXP9 N28 DDID_TXDP_0
    PEG_TXP_9 C29 PEG_TXP10 P28 DDID_TXDN_1 DDI
    PEG_TXP_10 B28 PEG_TXP11 P31 DDID_TXDP_1
    PEG_TXP_11 C27 PEG_TXP12 R31 DDID_TXDN_2
    PEG_TXP_12 B26 PEG_TXP13 N30 DDID_TXDP_2
    PEG_TXP_13 C25 PEG_TXP14 P30 DDID_TXDN_3
    PEG_TXP_14 B24 PEG_TXP15 DDID_TXDP_3
    PEG_TXP_15 8 OF 9
    1 OF 9 HSW_RPGA_EDS_PGA

    HSW_RPGA_EDS_PGA

    ESD Solution reserve


    CPU_RST#_R
    PM_DRAM_PWRGD_R
    C694
    C695
    *0.1U/10V_4X
    *0.1U/10V_4X Reserved For buffer reset of PLTRSRIN# CPU Thermal Trip & Process HOT CPU eDP Hot Plug Detect CPU
    PM_THRMTRIP# C696 *0.1U/10V_4X +3V
    +1.05V +VCCIO_OUT
    +1.05V

    U21
    1 5 C331 R475
    PU/PD of CPU

    6
    +VCCIO_OUT NC VCC *0.1U/10V_4X *1K_4 R491 R479
    [6,23,25,28,29] PLTRST# 2 *1K_4 PIV@10K_4
    H_PROCHOT# R81 62_4 IN 2
    B
    FDI Disabling (Discrete Only) DP & PEG Compensation CLK_DPLL_SSCLKN_R R108
    R796
    OEV@10K_4
    OEV@10K_4
    3
    GNDOUT
    4 CPU_PLTRST#_Q R476 *43_4 CPU_RST#_R
    [6,34] DELAY_VR_PWRGOOD
    Q34A
    B

    <CPU> <CPU> CLK_DPLL_SSCLKP_R R109 *OEV@10K_4 *74LVC1G07GW 2N7002KDW_115MA EDP_HPD#_Q

    1
    H_PWRGOOD_R R78 10K_4

    3
    +VCCIOA_OUT R477 R485 100K_4
    REV_D3A Add R796 *20K_4 +1.05V
    (update from new checklist 1.5)
    R95 OEV@1K_4 FDI_INT R118 24.9/F_4 PEG_RCOMP +VCCIO_OUT R483 2
    INT_EDP_HPD [21,22]
    R94 OEV@1K_4 FDI_CSYNC_R XDP_TMS R62 51/F_4 R484 1K_4 Q36
    +VCCIOA_OUT XDP_TDI R480 51/F_4 R472 *1.5K/F_4 CPU_RST#_R PIV@BSS138_200MA
    XDP_TDO R63 51/F_4 *100/F_4 Q33 R102

    1
    2
    R474 PIV@100K_4
    R119 24.9/F_4 EDP_RCOMP XDP_TCLK R79 51/F_4 REV_D3A Reserve R474,R472 METR3904-G_200MA
    XDP_TRST# R80 51/F_4 *750/F_4 PM_THRMTRIP#_R 1 3
    SYS_SHDN# [17,31]
    PM_THRMTRIP# [9]

    FAN Control-->For one FAN solution <THC> Intel Turbo mode only CPU CPU Thermal sensor / MB Local <THC>
    TEMP Local TEMP = 85
    U20
    +3VPCU R51 150_4 +3VPCU_HW_SD 5 1 R52 25.5K/F_4
    VCC SET
    C44 2
    +3V GND
    0.1U/10V_4X
    H_PROCHOT# 4 3 THER_SHD# R53 0_4
    HYST OT# S5_ON [29,31]
    R453 G708T1U
    C46 R54 *470K_4 D2 *1SS355_100MA +3VPCU
    +5V
    40mils *10K_4 *47P/50V_4N
    3

    CN14
    A
    U18 40mils [29] FANSIG1 FANSIG1 Rset(Kohm)=0.0012T*T-0.9308T+96.147,Shut down on A

    C326 2.2U/6.3V_6X 2
    VIN VO
    3
    5
    TH_FAN_POWER1
    1 [29] H_PROCHOT_EC
    H_PROCHOT_EC 5
    85dgree
    1 GND
    /FON GND
    6 2
    3
    Q7B Hysteresis is 30C
    7
    4

    4 GND 8 C328 C327 C318 R76 2N7002KDW_115MA


    [29] VFAN1 VSET GND 100K_4
    APE8872M 10U/6.3V_6X 0.01U/25V_4X *0.01U/25V_4X 85205-0300L

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    Haswell 1/4 (PEG/DMI/FDI)
    Date: Tuesday, February 05, 2013 Sheet 2 of 37
    5 4 3 2 1
    5 4 3 2 1

    03
    D
    Haswell Processor (DDR3) D

    Haswell rPGA EDS Haswell rPGA EDS


    U22C U22D
    M_B_DQ[63:0] [15,16]
    M_A_DQ[63:0] [13,14]
    TP15 AC7 AR15 M_A_DQ0 TP14 AG8 AR18 M_B_DQ0
    U4 RSVD_AC7 SA_DQ_0 AT14 M_A_DQ1 Y4 RSVD SB_DQ_0 AT18 M_B_DQ1
    [13] M_A_CLKN0 SA_CK_N_0 SA_DQ_1 [15] M_B_CLKN0 SB_CKN0 SB_DQ_1
    [13] M_A_CLKP0 V4 AM14 M_A_DQ2 [15] M_B_CLKP0 AA4 AM17 M_B_DQ2
    AD9 SA_CK_P_0 SA_DQ_2 AN14 M_A_DQ3 AF10 SB_CK0 SB_DQ_2 AM18 M_B_DQ3
    [13] M_A_CKE0 SA_CKE_0 SA_DQ_3 [15] M_B_CKE0 SB_CKE_0 SB_DQ_3
    [13] M_A_CLKN1 U3 AT15 M_A_DQ4 [15] M_B_CLKN1 Y3 AR17 M_B_DQ4
    V3 SA_CK_N_1 SA_DQ_4 AR14 M_A_DQ5 AA3 SB_CKN1 SB_DQ_4 AT17 M_B_DQ5
    [13] M_A_CLKP1 SA_CK_P_1 SA_DQ_5 [15] M_B_CLKP1 SB_CK1 SB_DQ_5
    [13] M_A_CKE1 AC9 AN15 M_A_DQ6 [15] M_B_CKE1 AG10 AN17 M_B_DQ6
    U2 SA_CKE_1 SA_DQ_6 AM15 M_A_DQ7 Y2 SB_CKE_1 SB_DQ_6 AN18 M_B_DQ7
    [14] M_A_CLKN2 SA_CK_N_2 SA_DQ_7 [16] M_B_CLKN2 SB_CKN2 SB_DQ_7
    [14] M_A_CLKP2 V2 AM9 M_A_DQ8 [16] M_B_CLKP2 AA2 AT12 M_B_DQ8
    AD8 SA_CK_P_2 SA_DQ_8 AN9 M_A_DQ9 AG9 SB_CK2 SB_DQ_8 AR12 M_B_DQ9
    [14] M_A_CKE2 SA_CKE_2 SA_DQ_9 [16] M_B_CKE2 SB_CKE_2 SB_DQ_9
    [14] M_A_CLKN3 U1 AM8 M_A_DQ10 [16] M_B_CLKN3 Y1 AN12 M_B_DQ10
    V1 SA_CK_N_3 SA_DQ_10 AN8 M_A_DQ11 AA1 SB_CKN3 SB_DQ_10 AM11 M_B_DQ11
    [14] M_A_CLKP3 SA_CK_P_3 SA_DQ_11 [16] M_B_CLKP3 SB_CK3 SB_DQ_11
    [14] M_A_CKE3 AC8 AR9 M_A_DQ12 [16] M_B_CKE3 AF9 AT11 M_B_DQ12
    SA_CKE_3 SA_DQ_12 AT9 M_A_DQ13 SB_CKE_3 SB_DQ_12 AR11 M_B_DQ13
    M7 SA_DQ_13 AR8 M_A_DQ14 P4 SB_DQ_13 AM12 M_B_DQ14
    [13] M_A_CS#0 SA_CS_N_0 SA_DQ_14 [15] M_B_CS#0 SB_CS_N_0 SB_DQ_14
    [13] M_A_CS#1 L9 AT8 M_A_DQ15 [15] M_B_CS#1 R2 AN11 M_B_DQ15
    M9 SA_CS_N_1 SA_DQ_15 AJ9 M_A_DQ16 P3 SB_CS_N_1 SB_DQ_15 AR5 M_B_DQ16
    [14] M_A_CS#2 SA_CS_N_2 SA_DQ_16 [16] M_B_CS#2 SB_CS_N_2 SB_DQ_16
    [14] M_A_CS#3 M10 AK9 M_A_DQ17 [16] M_B_CS#3 P1 AR6 M_B_DQ17
    M8 SA_CS_N_3 SA_DQ_17 AJ6 M_A_DQ18 SB_CS_N_3 SB_DQ_17 AM5 M_B_DQ18
    [13] M_A_ODT0 SA_ODT_0 SA_DQ_18 SB_DQ_18
    [13] M_A_ODT1 L7 AK6 M_A_DQ19 [15] M_B_ODT0 R4 AM6 M_B_DQ19
    L8 SA_ODT_1 SA_DQ_19 AJ10 M_A_DQ20 R3 SB_ODT_0 SB_DQ_19 AT5 M_B_DQ20
    [14] M_A_ODT2 SA_ODT_2 SA_DQ_20 [15] M_B_ODT1 SB_ODT_1 SB_DQ_20
    [14] M_A_ODT3 L10 AK10 M_A_DQ21 [16] M_B_ODT2 R1 AT6 M_B_DQ21
    V5 SA_ODT_3 SA_DQ_21 AJ7 M_A_DQ22 P2 SB_ODT_2 SB_DQ_21 AN5 M_B_DQ22
    [13,14] M_A_BS#0 SA_BS_0 SA_DQ_22 [16] M_B_ODT3 SB_ODT_3 SB_DQ_22
    [13,14] M_A_BS#1 U5 AK7 M_A_DQ23 [15,16] M_B_BS#0 R7 AN6 M_B_DQ23
    AD1 SA_BS_1 SA_DQ_23 AF4 M_A_DQ24 P8 SB_BS_0 SB_DQ_23 AJ4 M_B_DQ24
    [13,14] M_A_BS#2 SA_BS_2 SA_DQ_24 [15,16] M_B_BS#1 SB_BS_1 SB_DQ_24
    AF5 M_A_DQ25 [15,16] M_B_BS#2 AA9 AK4 M_B_DQ25
    R90 0_4 V10 SA_DQ_25 AF1 M_A_DQ26 SB_BS_2 SB_DQ_25 AJ1 M_B_DQ26
    C
    RSVD_V10 must be grounded VSS SA_DQ_26 SB_DQ_26 C
    [13,14] M_A_RAS# U6 AF2 M_A_DQ27 RSVD_R10 must be grounded R91 0_4 R10 AJ2 M_B_DQ27
    U7 SA_RAS SA_DQ_27 AG4 M_A_DQ28 R6 VSS SB_DQ_27 AM1 M_B_DQ28
    [13,14] M_A_WE# SA_WE SA_DQ_28 [15,16] M_B_RAS# SB_RAS SB_DQ_28
    [13,14] M_A_CAS# U8 AG5 M_A_DQ29 [15,16] M_B_WE# P6 AN1 M_B_DQ29
    SA_CAS SA_DQ_29 AG1 M_A_DQ30 P7 SB_WE SB_DQ_29 AK2 M_B_DQ30
    [13,14] M_A_A[15:0] SA_DQ_30 [15,16] M_B_CAS# SB_CAS SB_DQ_30
    M_A_A0 V8 AG2 M_A_DQ31 [15,16] M_B_A[15:0] AK1 M_B_DQ31
    M_A_A1 AC6 SA_MA_0 SA_DQ_31 J1 M_A_DQ32 M_B_A0 R8 SB_DQ_31 L2 M_B_DQ32
    M_A_A2 V9 SA_MA_1 SA_DQ_32 J2 M_A_DQ33 M_B_A1 Y5 SB_MA_0 SB_DQ_32 M2 M_B_DQ33
    M_A_A3 U9 SA_MA_2 SA_DQ_33 J5 M_A_DQ34 M_B_A2 Y10 SB_MA_1 SB_DQ_33 L4 M_B_DQ34
    M_A_A4 AC5 SA_MA_3 SA_DQ_34 H5 M_A_DQ35 M_B_A3 AA5 SB_MA_2 SB_DQ_34 M4 M_B_DQ35
    M_A_A5 AC4 SA_MA_4 SA_DQ_35 H2 M_A_DQ36 M_B_A4 Y7 SB_MA_3 SB_DQ_35 L1 M_B_DQ36
    M_A_A6 AD6 SA_MA_5 SA_DQ_36 H1 M_A_DQ37 M_B_A5 AA6 SB_MA_4 SB_DQ_36 M1 M_B_DQ37
    M_A_A7 AC3 SA_MA_6 SA_DQ_37 J4 M_A_DQ38 M_B_A6 Y6 SB_MA_5 SB_DQ_37 L5 M_B_DQ38
    M_A_A8 AD5 SA_MA_7 SA_DQ_38 H4 M_A_DQ39 M_B_A7 AA7 SB_MA_6 SB_DQ_38 M5 M_B_DQ39
    M_A_A9 AC2 SA_MA_8 SA_DQ_39 F2 M_A_DQ40 M_B_A8 Y8 SB_MA_7 SB_DQ_39 G7 M_B_DQ40
    M_A_A10 V6 SA_MA_9 SA_DQ_40 F1 M_A_DQ41 M_B_A9 AA10 SB_MA_8 SB_DQ_40 J8 M_B_DQ41
    M_A_A11 AC1 SA_MA_10 SA_DQ_41 D2 M_A_DQ42 M_B_A10 R9 SB_MA_9 SB_DQ_41 G8 M_B_DQ42
    M_A_A12 AD4 SA_MA_11 SA_DQ_42 D3 M_A_DQ43 M_B_A11 Y9 SB_MA_10 SB_DQ_42 G9 M_B_DQ43
    M_A_A13 V7 SA_MA_12 SA_DQ_43 D1 M_A_DQ44 M_B_A12 AF7 SB_MA_11 SB_DQ_43 J7 M_B_DQ44
    M_A_A14 AD3 SA_MA_13 SA_DQ_44 F3 M_A_DQ45 M_B_A13 P9 SB_MA_12 SB_DQ_44 J9 M_B_DQ45
    M_A_A15 AD2 SA_MA_14 SA_DQ_45 C3 M_A_DQ46 M_B_A14 AA8 SB_MA_13 SB_DQ_45 G10 M_B_DQ46
    SA_MA_15 SA_DQ_46 B3 M_A_DQ47 M_B_A15 AG7 SB_MA_14 SB_DQ_46 J10 M_B_DQ47
    SA_DQ_47 B5 M_A_DQ48 SB_MA_15 SB_DQ_47 A8 M_B_DQ48
    [13,14] M_A_DQSN[7:0] SA_DQ_48 SB_DQ_48
    M_A_DQSN0 AP15 E6 M_A_DQ49 [15,16] M_B_DQSN[7:0] B8 M_B_DQ49
    M_A_DQSN1 AP8 SA_DQS_N_0 SA_DQ_49 A5 M_A_DQ50 M_B_DQSN0 AP18 SB_DQ_49 A9 M_B_DQ50
    M_A_DQSN2 AJ8 SA_DQS_N_1 SA_DQ_50 D6 M_A_DQ51 M_B_DQSN1 AP11 SB_DQS_N_0 SB_DQ_50 B9 M_B_DQ51
    M_A_DQSN3 AF3 SA_DQS_N_2 SA_DQ_51 D5 M_A_DQ52 M_B_DQSN2 AP5 SB_DQS_N_1 SB_DQ_51 D8 M_B_DQ52
    M_A_DQSN4 J3 SA_DQS_N_3 SA_DQ_52 E5 M_A_DQ53 M_B_DQSN3 AJ3 SB_DQS_N_2 SB_DQ_52 E8 M_B_DQ53
    M_A_DQSN5 E2 SA_DQS_N_4 SA_DQ_53 B6 M_A_DQ54 M_B_DQSN4 L3 SB_DQS_N_3 SB_DQ_53 D9 M_B_DQ54
    M_A_DQSN6 C5 SA_DQS_N_5 SA_DQ_54 A6 M_A_DQ55 M_B_DQSN5 H9 SB_DQS_N_4 SB_DQ_54 E9 M_B_DQ55
    M_A_DQSN7 C11 SA_DQS_N_6 SA_DQ_55 E12 M_A_DQ56 M_B_DQSN6 C8 SB_DQS_N_5 SB_DQ_55 E15 M_B_DQ56
    [13,14] M_A_DQSP[7:0] SA_DQS_N_7 SA_DQ_56 SB_DQS_N_6 SB_DQ_56
    M_A_DQSP0 AP14 D12 M_A_DQ57 [15,16] M_B_DQSP[7:0] M_B_DQSN7 C14 D15 M_B_DQ57
    M_A_DQSP1 AP9 SA_DQS_P_0 SA_DQ_57 B11 M_A_DQ58 M_B_DQSP0 AP17 SB_DQS_N_7 SB_DQ_57 A15 M_B_DQ58
    B M_A_DQSP2 AK8 SA_DQS_P_1 SA_DQ_58 A11 M_A_DQ59 M_B_DQSP1 AP12 SB_DQS_P_0 SB_DQ_58 B15 M_B_DQ59 B
    M_A_DQSP3 AG3 SA_DQS_P_2 SA_DQ_59 E11 M_A_DQ60 M_B_DQSP2 AP6 SB_DQS_P_1 SB_DQ_59 E14 M_B_DQ60
    M_A_DQSP4 H3 SA_DQS_P_3 SA_DQ_60 D11 M_A_DQ61 M_B_DQSP3 AK3 SB_DQS_P_2 SB_DQ_60 D14 M_B_DQ61
    M_A_DQSP5 E3 SA_DQS_P_4 SA_DQ_61 B12 M_A_DQ62 M_B_DQSP4 M3 SB_DQS_P_3 SB_DQ_61 A14 M_B_DQ62
    M_A_DQSP6 C6 SA_DQS_P_5 SA_DQ_62 A12 M_A_DQ63 M_B_DQSP5 H8 SB_DQS_P_4 SB_DQ_62 B14 M_B_DQ63
    M_A_DQSP7 C12 SA_DQS_P_6 SA_DQ_63 AM3 +VDDR_REF_CPU M_B_DQSP6 C9 SB_DQS_P_5 SB_DQ_63
    SA_DQS_P_7 SM_VREF +VDDR_REF_CPU SB_DQS_P_6
    F16 VREFDQ_SA_CPU VREFDQ_SA_CPU [13] M_B_DQSP7 C15
    SA_DIMM_VREFDQ F13 VREFDQ_SB_CPU SB_DQS_P_7
    SB_DIMM_VREFDQ VREFDQ_SB_CPU [15]
    4 OF 9

    3 OF 9
    HSW_RPGA_EDS_PGA HSW_RPGA_EDS_PGA

    A A

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    Haswell 2/4 (DDR3 I/F)
    Date: Tuesday, February 05, 2013 Sheet 3 of 37
    5 4 3 2 1
    5 4 3 2 1

    +1.35V_CPU 4.2A
    +1.35V_CPU
    Haswell Processor (POWER)
    Haswell rPGA EDS
    U22E

    AA26
    +VCCIN 95A
    04
    VCC +VCC_CORE
    C377 C360 C403 C53 C414 C359 AA28
    22U/6.3V_8X 22U/6.3V_8X *22U/6.3V_8X *22U/6.3V_8X *22U/6.3V_8X *22U/6.3V_8X K27 VCC AA34
    TP24 L27 RSVD VCC AA30 C413 C411 C397 C407 C396 C378
    TP23 T27 RSVD VCC AA32 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X
    TP20 V27 RSVD VCC AB26
    D TP19 RSVD VCC AB29 D
    VCC AB25
    VCC AB27
    C54 C395 C65 C48 C59 VCC AB28
    *22U/6.3V_8X *22U/6.3V_8X *22U/6.3V_8X *22U/6.3V_8X *22U/6.3V_8X AB11 VCC AB30
    AB2 VDDQ VCC AB31 C363 C67 C362 C361 C406 C412
    AB5 VDDQ VCC AB33 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X
    AB8 VDDQ VCC AB34
    AE11 VDDQ VCC AB32
    AE2 VDDQ VCC AC26
    AE5 VDDQ VCC AB35
    C74 C376 C394 C58 C73 AE8 VDDQ VCC AC28
    10U/6.3V_6X 10U/6.3V_6X *10U/6.3V_6X *10U/6.3V_6X *10U/6.3V_6X AH11 VDDQ VCC AD25
    K11 VDDQ VCC AC30 C398 C68 C51 C50 C49 C66
    N11 VDDQ VCC AD28 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X
    N8 VDDQ VCC AC32
    T11 VDDQ VCC AD31
    T2 VDDQ VCC AC34
    T5 VDDQ VCC AD34
    C409 C404 C64 C410 C47 T8 VDDQ VCC AD26
    *10U/6.3V_6X *10U/6.3V_6X *10U/6.3V_6X *10U/6.3V_6X *10U/6.3V_6X W11 VDDQ VCC AD27
    W2 VDDQ VCC AD29 C76 C55 C60 C75 C57 C56
    W5 VDDQ
    VDDQ
    VCC
    VCC
    AD30 22U/6.3V_8X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X Power Test Propose
    W8 AD32
    VDDQ VCC AD33 +1.05V +1.05V +VCCIO_OUT
    VDDQ Output Decoupling Recommendations VCC
    N26 AD35
    TP22 K26 RSVD VCC AE26
    330uFx2 7343 BOT socket side +VCC_CORE R69 *0_8
    AL27 VCC VCC AE32
    TP3 RSVD VCC REV 1.0 change
    C 22uFx11 0805 5 onTOP, 6 on BOT inside socket cavity AK27 AE28 R92 C
    TP8 RSVD VCC AE30 C61 C62 C77 C405 C379 C380 150_4 Pop R741 C45
    VCC AG28 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X *4.7U/6.3V_6X
    10uFx10 0805 5 onTOP, 5 on BOT inside socket cavity VCC AG34
    VCC AE34 PWR_DEBUG_R
    R86 100_4 VCC AF25
    +VCC_CORE VCC AF26
    R85 0_4 VCC_SENSE_R AL35 VCC AF27 R93
    [34] VCC_SENSE VCC_SENSE VCC +1.05V +VCCIO_PCH
    E17 AF28 *10K_4
    R72 0_1206 +VCCIO_OUT_R AN35 RSVD VCC AF29
    300mA +VCCIO_OUT VCCIO_OUT VCC VCC Output Decoupling Recommendations
    R120 *0_1206 +VCCIO_PCH_R A23 AF30 R126 0_6
    +VCCIO_PCH FC_A23 VCC
    R121 0_1206 +VCCIOA_OUT_R F22 AF31 470uFx4 7343 TOP socket side
    +VCCIOA_OUT VCOMP_OUT VCC
    300mA W32 AF32 REV 1.0 change
    TP16 AL16 RSVD VCC AF33 22uFx8 0805 4 on TOP, 4 on BOT near socket edge C95
    TP13 J27 RSVD VCC AF34 MOW WW12-->if PWR_DEBUG# is routed
    REV 1.0 change, depop R724 Pop R16059 *4.7U/6.3V_6X
    TP25 AL13 RSVD VCC AF35 to the XDP the R741 value is 150 ohm
    TP12 RSVD VCC 22uFx11 0805 TOP, inside socket cavity
    AG26
    VCC AH26
    VCC 10uFx11 0805 BOT, inside socket cavity
    H_CPU_SVIDART# AM28 AH29
    H_CPU_SVIDCLK AM29 VIDALERT VCC AG30
    H_CPU_SVIDDAT AL28 VIDSCLK VCC AG32
    VIDSOUT VCC AH32 SVID Layout note: need routing together
    AP35 VCC AH35 and ALERT need between CLK and DATA.
    PWR_DEBUG_R H27 VSS VCC AH25
    TP21 AP34 PWR_DEBUG VCC AH27 +VCCIO_OUT
    R74 0_4
    AT35 VSS VCC AH28
    TP57 AR35 RSVD_TP VCC AH30
    TP58 AR32 RSVD_TP VCC AH31
    TP56 AL26 RSVD_TP VCC AH33
    B TP5 RSVD_TP VCC Place PU resistor DG V0.7 -> 110 Ohm B
    AT34 AH34 close to CPU R65
    AL22 VSS VCC AJ25 130/F_4
    SCH V0.7 -> 130 Ohm
    AT33 VSS VCC AJ26
    AM21 VSS VCC AJ27 H_CPU_SVIDDAT R64 0_4
    VSS VCC VR_SVIDDAT [34]
    AM25 AJ28
    AM22 VSS VCC AJ29 +VCCIO_OUT
    AM20 VSS VCC AJ30
    AM24 VSS VCC AJ31
    AL19 VSS VCC AJ32
    AM23 VSS VCC AJ33
    VSS VCC Place PU resistor DG V0.7 -> 44 Ohm
    AT32 AJ34 close to CPU R66
    VSS VCC AJ35 SCH V0.7 -> 43 Ohm 75/F_4
    VCC G25
    VCC H25 H_CPU_SVIDART# R67 43_4
    VCC VR_SVIDART# [34]
    J25
    VCC K25
    VCC L25
    VCC M25
    Y25 VCC N25
    +VCC_CORE VCC VCC
    Y26 P25
    Y27 VCC VCC R25
    Y28 VCC VCC T25 H_CPU_SVIDCLK R68 0_4
    VCC VCC VR_SVIDCLK [34]
    Y29
    Y30 VCC U25
    Y31 VCC VCC U26
    Y32 VCC VCC V25
    Y33 VCC VCC V26
    Y34 VCC VCC
    A Y35 VCC W26 A
    VCC 5 OF 9 VCC W27
    VCC
    HSW_RPGA_EDS_PGA

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    Haswell 3/4 (POWER) A1A

    Date: Tuesday, February 05, 2013 Sheet 4 of 37


    5 4 3 2 1
    5 4 3 2 1

    Haswell rPGA EDS


    Haswell Processor (GND)
    U22F Haswell rPGA EDS
    U22G
    Haswell Processor (CFG,RSVD)
    Haswell rPGA EDS
    05
    U22I
    A10 AK34 B34 K10
    A13 VSS VSS AK5 B4 VSS VSS K2
    A16 VSS VSS AL1 B7 VSS VSS K29 AT1
    A19 VSS VSS AL10 C1 VSS VSS K3 AT2 RSVD_TP C23
    D VSS VSS VSS VSS RSVD_TP RSVD_TP D
    A22 AL11 C10 K31 AD10 B23
    A25 VSS VSS AL12 C13 VSS VSS K33 RSVD RSVD_TP D24
    A27 VSS VSS AL14 C16 VSS VSS K35 A34 RSVD_TP D23
    A29 VSS VSS AL15 C19 VSS VSS K4 A35 RSVD_TP RSVD_TP
    A3 VSS VSS AL17 C2 VSS VSS K5 RSVD_TP
    A31 VSS VSS AL18 C22 VSS VSS K7 W 29
    A33 VSS VSS AL2 C24 VSS VSS K8 W 28 RSVD_TP AT31 CFG_RCOMP R70 49.9/F_4
    A4 VSS VSS AL20 C26 VSS VSS K9 R99 49.9/F_4 RSVD30 G26 RSVD_TP CFG_RCOMP AR21 CFG16
    VSS VSS VSS VSS TESTLO_G26 CFG_16 TP6
    A7 AL21 C28 L11 W 33 AR23 CFG17
    AA11 VSS VSS AL23 C30 VSS VSS L26 AL30 RSVD CFG_18 AP21 CFG18
    AA25 VSS VSS E22 C32 VSS VSS L6 AL29 RSVD CFG_17 AP23 CFG19
    AA27 VSS VSS AL3 C34 VSS VSS M11 F25 RSVD CFG_19
    VSS VSS VSS VSS +VCC_CORE VCC
    AA31 AL4 C4 M26
    AA29 VSS VSS AL5 C7 VSS VSS M28 C35 AR33
    AB1 VSS VSS AL6 D10 VSS VSS M30 B35 RSVD_TP RSVD G6 R794 *2.2K_4 SYS_PWROK
    VSS VSS VSS VSS RSVD_TP RSVD SYS_PWROK [6,12]
    AB10 AL7 D13 M32 AM27
    AA33 VSS VSS AL8 D16 VSS VSS M34 AL25 RSVD AM26
    VSS VSS VSS VSS For CPU debug. RSVD_TP RSVD
    AA35 AL9 D19 M6 F5 R795
    AB3 VSS VSS AM10 D22 VSS VSS N1 RSVD38 W 30 RSVD AM2
    VSS VSS VSS VSS TP18 RSVD_TP RSVD
    AC25 AM13 D25 N10 RSVD39 W 31 K6 *1K_4
    VSS VSS VSS VSS TP17 RSVD_TP RSVD
    AC27 AM16 D27 N2 R89 49.9/F_4 TESTLO W 34 REV_D3A RESERVE THIS CIRCUIT
    AB4 VSS VSS AM19 D29 VSS VSS N29 TESTLO E18 FOR FUTURE COMPATIBILITY
    AB6 VSS VSS E25 D31 VSS VSS N3 CFG0 AT20 RSVD
    VSS VSS VSS VSS TP54 CFG_0
    AB7 AM32 D33 N31 CFG1 AR20 U10
    VSS VSS VSS VSS TP55 CFG_1 RSVD
    AB9 AM4 D35 N33 CFG2 AP20 P10
    AC11 VSS VSS AM7 D4 VSS VSS N35 CFG3 AP22 CFG_2 RSVD
    AD11 VSS VSS AN10 D7 VSS VSS N4 CFG4 AT22 CFG_3 B1
    C VSS VSS VSS VSS CFG_4 NC C
    AC29 AN13 E1 N5 CFG5 AN22 A2
    AC31 VSS VSS AN16 E10 VSS VSS N6 CFG6 AT25 CFG_5 RSVD AR1
    AC33 VSS VSS AN19 E13 VSS VSS N7 CFG7 AN23 CFG_6 RSVD_TP
    AC35 VSS VSS AN2 E16 VSS VSS N9 CFG8 AR24 CFG_7 E21
    AD7 VSS VSS AN21 E4 VSS VSS P11 CFG9 AT23 CFG_8 RSVD_TP E20
    AE1 VSS VSS AN24 E7 VSS VSS P26 CFG10 AN20 CFG_9 RSVD_TP
    AE10 VSS VSS AN27 F10 VSS VSS P5 CFG11 AP24 CFG_10 AP27
    AE25 VSS VSS AN30 F11 VSS VSS R11 CFG12 AP26 CFG_11 RSVD AR26
    AE29 VSS VSS AN34 F12 VSS VSS R26 CFG13 AN25 CFG_12 RSVD
    AE3 VSS VSS AN4 F14 VSS VSS R28 CFG14 AN26 CFG_13 AL31 R792 0_4
    AE27 VSS VSS AN7 F15 VSS VSS R30 CFG15 AP25 CFG_14 RSVD AL32 R793 0_4
    AE35 VSS VSS AP1 F17 VSS VSS R32 CFG_15 RSVD
    AE4 VSS VSS AP10 F18 VSS VSS R34
    AE6 VSS VSS AP13 F20 VSS VSS R5 9 OF 9
    VSS VSS VSS VSS
    REV_D3A Add R792 and R793
    AE7 AP16 F21 T1
    AE9 VSS VSS AP19 F23 VSS VSS T10 HSW_RPGA_EDS_PGA
    AF11 VSS VSS AP4 F24 VSS VSS T29
    AF6 VSS VSS AP7 F26 VSS VSS T3
    AF8 VSS VSS W 25 F28 VSS VSS T31
    AG11 VSS VSS AR10 F30 VSS VSS T33
    VSS VSS VSS VSS Configuration Signals: The CFG signals have a default value of '1' if not terminated on the board.
    AG25 AR13 F32 T35
    AE31 VSS VSS AR16 F34 VSS VSS T4
    VSS VSS VSS VSS x1 = Normal operation
    AG31 AR19 F4 T6 CFG[2] PCI Express Static Lane Reversal CFG2 R56 *1K_4
    AE33 VSS VSS AR2 F6 VSS VSS T7
    VSS VSS VSS VSS x0 = Lane numbers reversed
    AG6 AR22 F7 T9
    AH1 VSS VSS AR25 F8 VSS VSS U11
    VSS VSS VSS VSS x1 = Disabled
    B
    AH10 AR28 F9 U27 CFG[4] eDP enable CFG4 R57 PIV@1K_4 B
    AH2 VSS VSS AR31 G1 VSS VSS V11
    VSS VSS VSS VSS x0 = Enabled
    AG27 AR34 G11 V28
    AG29 VSS VSS AR4 G2 VSS VSS V30
    VSS VSS VSS VSS x00 = 1 x8 & 2 x4 PCI Express
    AH3 AR7 G27 V32
    AG33 VSS VSS AT10 G29 VSS VSS V34 CFG6 R60 *1K_4
    VSS VSS VSS VSS x01 = reserved
    AG35 AT13 G3 W1 CFG[6:5] PCI Express Bifurcation
    AH4 VSS VSS AT16 G31 VSS VSS W 10 CFG5 R58 *1K_4
    VSS VSS VSS VSS x10 = 2 x8 PCI Express
    AH5 AT19 G33 W3
    AH6 VSS VSS AT21 G35 VSS VSS W 35
    VSS VSS VSS VSS x11 = 1 x16 PCI Express
    AH7 AT24 G4 W4
    AH8 VSS VSS AT27 G5 VSS VSS W6
    VSS VSS VSS VSS x1 = PEG train follow RESETB de-asseted
    AH9 AT3 H10 W7 CFG[7] PEG defer training CFG7 R59 *1K_4
    AJ11 VSS VSS AT30 H26 VSS VSS W9
    VSS VSS VSS VSS x0 = PEG wait for BIOS fro training
    AJ5 AT4 H6 Y11
    AK11 VSS VSS AT7 H7 VSS VSS H11
    AK25 VSS VSS B10 J11 VSS VSS AL24
    AK26 VSS VSS B13 J26 VSS VSS F19
    AK28 VSS VSS B16 J28 VSS VSS T26
    AK29 VSS VSS B19 J30 VSS VSS AK35 VSS_SENSE_R R83 0_4
    VSS VSS VSS VSS_SENSE VSS_SENSE [34]
    AK30 B2 J32 AK33
    AK32 VSS VSS B22 J34 VSS RSVD R84 100_4
    E19 VSS VSS J6 VSS
    VSS K1 VSS
    VSS

    6 OF 9
    7 OF 9
    A HSW_RPGA_EDS_PGA HSW_RPGA_EDS_PGA A

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    Haswell 4/4 (CFG/GND)
    Date: Tuesday, February 05, 2013 Sheet 5 of 37
    5 4 3 2 1
    5 4 3 2 1

    Lynx Point (DMI,FDI,PM)


    C510

    C509
    *6.8P/50V_4N INT_CRT_BLU

    *6.8P/50V_4N INT_CRT_GRN
    R568

    R567
    ICRT@150/F_4

    ICRT@150/F_4
    INT_CRT_BLU

    INT_CRT_GRN
    Lynx Point (CRT,PCI,DDI CNTL)
    06
    C508 *6.8P/50V_4N INT_CRT_RED R566 ICRT@150/F_4 INT_CRT_RED
    LPT_PCH_M_EDS LPT_PCH_M_EV
    U26B U26E

    AW22 REV = 5 T45 REV = 5 R40 HDMI_DDCCLK


    [2] DMI_RXN0 DMI_RXN_0 [20] INT_CRT_BLU VGA_BLUE DDPB_CTRLCLK HDMI_DDCCLK [20]
    AR20
    [2] DMI_RXN1 DMI_RXN_1
    D AJ35 U44 R39 HDMI_DDCDATA D
    FDI_RXN_0 FDI_TXN0 [2] [20] INT_CRT_GRN VGA_GREEN DDPB_CTRLDATA HDMI_DDCDATA [20]
    [2] DMI_RXN2 AP17
    AV20 DMI_RXN_2 AL35 V45 R35
    [2] DMI_RXN3 DMI_RXN_3 FDI_RXN_1 FDI_TXN1 [2] [20] INT_CRT_RED VGA_RED DDPC_CTRLCLK
    AY22 AJ36 M43 R36
    [2] DMI_RXP0 DMI_RXP_0 FDI_RXP_0 FDI_TXP0 [2] [20] INT_CRT_DDCCLK VGA_DDC_CLK DDPC_CTRLDATA
    AP20
    [2] DMI_RXP1 DMI_RXP_1 FDI
    AL36 M45 N40

    CRT
    FDI_RXP_1 FDI_TXP1 [2] [20] INT_CRT_DDCDAT VGA_DDC_DATA DDPD_CTRLCLK
    AR17
    [2] DMI_RXP2 DMI_RXP_2
    [2] DMI_RXP3 AW20 DMI AV43 [20] INT_HSYNC R573 ICRT@33_4 CRT_HSYNC_R N42 N38
    DMI_RXP_3 TP16 VGA_HSYNC DDPD_CTRLDATA
    BD21 AY45 R572 ICRT@33_4 CRT_VSYNC_R N44
    [2] DMI_TXN0 DMI_TXN_0 TP5 [20] INT_VSYNC VGA_VSYNC
    [2] DMI_TXN1 BE20 H45
    DMI_TXN_1 AV45 R256 ICRT@649/F_4 DAC_IREF U40 DDPB_AUXN
    BD17 TP15 R797 OEV@0_4 DAC_IREF K43
    [2] DMI_TXN2 DMI_TXN_2 DDPC_AUXN

    DISPLAY
    BE18 AW44 U39
    [2] DMI_TXN3 DMI_TXN_3 TP10 VGA_IRTN J42
    BB21 AL39 DDPD_AUXN
    [2] DMI_TXP0 DMI_TXP_0 FDI_CSYNC FDI_CSYNC [2]
    BC20 PCH_PWM N36 H43
    [2] DMI_TXP1 DMI_TXP_1 [21,22] PCH_PWM EDP_BKLTCTL DDPB_AUXP
    AL40

    LVDS
    FDI_INT FDI_INT [2]
    BB17 PCH_BLON K36 K45
    [2] DMI_TXP2 DMI_TXP_2 [22] PCH_BLON EDP_BKLTEN DDPC_AUXP
    BC18 AT45 FDI_IREF R570 0_4
    [2] DMI_TXP3 DMI_TXP_3 FDI_IREF +1.5V
    [22] PCH_VDDEN PCH_VDDEN G36 J44
    R605 0_4 DMI_IREF BE16 AU42 EDP_VDDEN DDPD_AUXP
    +1.5V DMI_IREF TP17 K40 HDMI_CON_HP_PCH
    DDPB_HPD HDMI_CON_HP_PCH [20]
    AW17 AU44 PCI_PIRQA# H20
    TP12 TP13 OPTIMUS POWER PCH control pin PIRQA# K38
    AV17 AR44 FDI_RCOMP R571 7.5K/F_4 PCI_PIRQB# L20 DDPC_HPD
    TP7 FDI_RCOMP DGPU_PWROK GPIO17 PIRQB# H39
    R290 7.5K/F_4 DMI_RCOMP AY17 PCI_PIRQC# K17 DDPD_HPD
    DMI_RCOMP DGPU_HOLD_RST# GPIO50 PIRQC#
    PCI_PIRQD# M20
    C DGPU_PWR_EN# GPIO54 PIRQD# PCI
    (CORE) G17 GPIO2 C
    SUSACK#_R R6 C8 DSWVREN DGPU_HOLD_RST# A12 PIRQE#/GPIO2
    SUSACK# DSWVRMEN DSWVREN [7] [17] DGPU_HOLD_RST# GPIO50 (CORE) F17 ODD_MD#
    System Power (CORE) PIRQF#/GPIO3 ODD_MD# [18]
    R675 0_4 SYS_RESET# AM1 L13 DPWROK GPIO52 B13
    [2] XDP_DBRST# SYS_RESET# Management DPWROK GPIO52 (CORE) L15 EXTTS_SNI_DRV0_PCH
    (CORE) PIRQG#/GPIO4
    SYS_PWROK R378 0_4 SYS_PWROK_R AD7 K3 PCIE_WAKE# DGPU_PWR_EN# C12
    R824 *0_4 SYS_PWROK WAKE# PCIE_WAKE# [23,28] [17] DGPU_PWR_EN# GPIO54 (CORE) M15 EXTTS_SNI_DRV1_PCH
    (CORE) PIRQH#/GPIO5
    EC_PWROK_R F10 AN7 CLKRUN# BBS_BIT1 C10
    R389 0_4 PWROK CLKRUN# CLKRUN# [29] [7] BBS_BIT1 GPIO51 (CORE) AD10 PCI_PME#
    PME# TP38
    MPWROK R823 0_4 APWROK_R AB7 (SUS) U7 SUS_STAT# GPIO53 A10
    APWROK SUS_STAT#/GPIO61 TP37 TP65 GPIO53 (CORE) Y11 PCI_PLTRST#
    H3 Y6 PCH_SUSCLK R342 0_4 STP_A16OVR AL6 PLTRST#
    [12] PM_DRAM_PWRGD DRAMPWROK (SUS) SUSCLK/GPIO62 SUSCLK [7,23,29] [7] STP_A16OVR GPIO55 (CORE)
    R685 0_4 PCH_RSMRST# J2 (SUS) Y7 PCH_SLP_S5#
    [29] RSMRST# RSMRST# SLP_S5#/GPIO63 TP44 5 OF 11
    LPT_PCH_M_EDS/BGA
    PCH_SUSPWRACK J4 (SUS) C6 PCH_SLP_S4# R622 0_4 SUSC# [29]
    SUSWARN#/SUSPWRNACK/GPIO30 SLP_S4#

    [29] DNBSWON# R655 0_4 PCH_PWRBTN# K1 H1 PCH_SLP_S3# R648 0_4 SUSB# [29,30]
    PWRBTN# SLP_S3#
    PCH_ACPRESENT E6 (DSW) F3 PCH_SLP_A#
    ACPRESENT/GPIO31 SLP_A# TP68
    PCH_BATLOW# K7 (SUS) F1 PCH_SLP_SUS# PCI PU +3V
    BATLOW#/GPIO72 SLP_SUS# PLTRST# Buffer
    PCH_RI# N4 AY3 PCH_SYNCH R630 0_4 +3V_S5 RP38
    RI# PMSYNCH PM_SYNC [2]
    10 1 ODD_MD#
    TP36 AB10 G5 PCH_SLP_LAN# C583 *0.1U/10V_4X DGPU_HOLD_RST# 9 2 GPIO2
    TP21 SLP_LAN# DGPU_PWR_EN# 8 3 BBS_BIT1

    5
    [23] SLP_WLAN# R330 0_4 PCH_SLP_WLAN# D2 (DSW) GPIO52 7 4
    SLP_WLAN#/GPIO29 2 6 5
    4
    4 OF 11 PLTRST# [2,23,25,28,29]
    LPT_PCH_M_EDS/BGA PCI_PLTRST# 1 10KX8
    B B
    U29 +3V

    3
    *TC7SH08FU R702
    ESD Solution reserve 100K_4 PCI_PIRQA# R270 8.2K_4
    SYS_PWROK_R C689 *0.1U/10V_4X PCI_PIRQB# R268 8.2K_4
    PCI_PLTRST# C690 *0.1U/10V_4X PCI_PIRQC# R275 8.2K_4
    EC_PWROK_R C691 *0.1U/10V_4X PCI_PIRQD# R278 8.2K_4
    APWROK_R C692 *0.1U/10V_4X EXTTS_SNI_DRV0_PCH R604 *10K_4
    PCH_RSMRST# C693 *0.1U/10V_4X R699 *SHORT_4 R704 0_4 VGA_PLTRST# [17] EXTTS_SNI_DRV1_PCH R603 *10K_4

    R306 10K_4 Ra
    SYSPWOK DSW Circuit +3V_S5 DS Power
    PCH PM PU/PD +3V R307 *10K_4 Rb +3V_DSW +3VPCU +3V_DSW +3VPCU +3V_S5 +3V_DS3
    SYS_RESET# R676 1K_4 PCH_ACPRESENT R308 *0_4 Rc AC_PRESENT [29]
    CLKRUN# R320 8.2K_4 R364 0_4
    R646 *0_4 Rd SUSACK#_R Rg can option to
    +3V_S5 R387 R384
    +3V_S5 +3V_DSW
    stuff R16725 or R16409,Q16039,C16344
    PCH_SUSPWRACK R660 0_4 Re *10K_4 *10K_4 R385 1 3
    SUS_PWR_ACK [29]
    *4.7K_4
    R349 8.2K_4 R672 0_4 Rf PCH_RSMRST# +3V_DSW DPWROK Q22
    PCH_BATLOW# R335 *8.2K_4 C261 *0.1U/10V_4X D9 *ME2303T1

    2
    3
    DPWROK R688 *0_4 Rg SYS_HWPG [29,31] +3V_S5
    +3V_S5 +3V_DS3 C267
    5

    3
    PCH_SLP_SUS# R666 *0_4 Rh SLP_SUS# [10,29] *RB500V-40_100MA *0.1U/10V_4X
    R659 10K_4 2 2
    4 DELAY_VR_PWRGOOD [2,34] 2 2
    PCIE_WAKE# R644 *1K_4 [5,12] SYS_PWROK SYS_PWROK +3VPCU R390 *0_4 SLP_SUS# PQ13
    1 MPWROK MPWROK [29,34] *DTC144EUA
    +3V_S5 Q23 Q24
    A
    U15 *TC7SH08FU(F) Net Name Deep Sx Support Deep Sx No Support *DTC144EUA *ME2N7002E_200MA
    A
    3

    1
    PM_DRAM_PWRGD R627 S3@200/F_4
    PCH_SLP_LAN# R318 10K_4 R392 AC_PRESENT Rb,Rc stuff Ra stuff
    PCH_RI# R640 10K_4 *100K_4
    PCH_SUSPWRACK R647 10K_4 Deep Sx Support (Need to stuff)
    PCH_PWRBTN# R645 *10K_4 SUS_PWR_ACK Rd stuff Re stuff Deep Sx Support (Need to stuff)
    SYS_PWROK
    PCH_RSMRST#
    R377
    R665
    10K_4
    10K_4 R376 0_4
    Quanta Computer Inc.
    DPWROK Rg stuff Rf stuff
    PCH_SUSCLK R358 *1K_4
    PROJECT : BDD
    SLP_SUS Rh stuff Rh No stuff Size Document Number Rev
    A1A
    LPT 1/6 (DMI/FDI/VGA)
    Date: Tuesday, February 05, 2013 Sheet 6 of 37
    5 4 3 2 1
    5 4 3 2 1

    RTC Clock 32.768KHz (RTC)


    C554 18P/50V_4C RTC_X1
    Lynx Point (RTC,IHDA,SATA,JTAG)
    U26A LPT_PCH_M_EDS
    Lynx Point (LPC,SPI,SMBUS,C-LINK,THERMAL)
    07
    2
    1
    REV = 5 BC8 SATA_RXN_ODD#
    B5 SATA_RXN_0 BE8 SATA_RXP_ODD SATA_RXN_ODD# [18]
    RTC_X1
    RTCX1 SATA_RXP_0 SATA_RXP_ODD [18]
    Y3 R623 SATA ODD
    32.768KHZ_10 10M_4 RTC_X2 B4 AW8 SATA_TXN_ODD#
    RTCX2 SATA_TXN_0 SATA_TXN_ODD# [18]
    AY8 SATA_TXP_ODD

    RTC
    SATA_TXP_ODD [18]

    3
    4
    C563 18P/50V_4C RTC_X2 SRTC_RST# B9 SATA_TXP_0
    SRTCRST# BC10 SATA_RXN_1#
    R304 1M_4 SM_INTRUDER# A8 SATA_RXN_1 BE10 SATA_RXP_1
    +3V_RTC INTRUDER# SATA_RXP_1 LPT_PCH_M_EDS
    HM86: NC U26D
    PCH_INVRMEN G10 AV10 SATA_TXN_1#
    INTVRMEN SATA_TXN_1 AW10SATA_TXP_1
    HM87: mSATA REV = 5
    RTC_RST# D9 SATA_TXP_1
    RTCRST#

    SATA
    BB9 SATA_RXN_2# (SUS) N7 SMBALERT#
    D RTC Circuitry (RTC) SATA_RXN_2 BD9 SATA_RXP_2
    [23,29] LAD0 LAD0 A20 SMBALERT#/GPIO11
    For DDR/WLAN
    D

    ACZ_BITCLK_R B25 SATA_RXP_2 LAD_0 R10 SCLK


    Trace = 30mils for power HDA_BCLK HM86: 2nd SATA HDD SMBus
    SMBCLK SCLK [13,23]
    +3V_RTC AY13 SATA_TXN_2# LAD1 C20
    ACZ_SYNC_R A22 SATA_TXN_2 AW13SATA_TXP_2 HM87: NC [23,29] LAD1 LAD_1 U11 SDATA
    HDA_SYNC SATA_TXP_2 SMBDATA SDATA [13,23]
    D14 *RB500V-40_100MA R450 20K/F_6 RTC_RST# LAD2 A18

    LPC
    +3VPCU [23,29] LAD2 LAD_2
    PCBEEP AL10 BC12 (SUS) N8 DRAMRST_CNTRL_PCH
    [24] PCBEEP SPKR SATA_RXN_3 SML0ALERT#/GPIO60 DRAMRST_CNTRL_PCH [12]
    D13 C317 G2 BE12 [23,29] LAD3 LAD3 C18
    ACZ_RST#_R C24 SATA_RXP_3 LAD_3 U8 SMB_ME0_CLK
    1U/6.3V_4X HDA_RST# AR13 LFRAME# B21 SML0CLK
    SATA_TXN_3 [23,29] LFRAME# LFRAME#

    AZALIA
    *SHORT PAD ACZ_SDIN0_AUDIO L22 AT13 R7 SMB_ME0_DAT
    HDA_SDI0 SATA_TXP_3 PCH_DRQ#0 D21 SML0DATA
    TP63 LDRQ0#
    BAT54C-7-F_200MA K22 (SUS) H6 SML1ALERT#_R For NFC
    HDA_SDI1 BD13 SATA_RXN_1ST_HDD# PCH_DRQ#1 G20 SML1ALERT#/PCHHOT#/GPIO74
    SATA_RXN4/PERN1 SATA_RXN_1ST_HDD# [18] TP35 LDRQ1#/GPIO23 (CORE)
    R_3VRTC D15 *RB500V-40_100MA R443 20K/F_6 SRTC_RST# G22 BB13 SATA_RXP_1ST_HDD (SUS) SML1CLK/GPIO58 K6 SMB_ME1_CLK For EC,G-SENSOR,ID ROM
    HDA_SDI2 SATA_RXP4/PERP1 SATA_RXP_1ST_HDD [18] AL11
    1st SATA HDD SERIRQ
    R451 C316 C309 G1 F22 AV15 SATA_TXN_1ST_HDD#
    [29] SERIRQ SERIRQ N11 SMB_ME1_DAT ,EDP2LVDS
    HDA_SDI3 SATA_TXN4/PETN1 SATA_TXN_1ST_HDD# [18] (SUS) SML1DATA/GPIO75
    AW15SATA_TXP_1ST_HDD PCH and EC for monitoring PCH temps over SMLink
    SATA_TXP4/PETP1 SATA_TXP_1ST_HDD [18]
    1K_4 1U/6.3V_4X 1U/6.3V_4X ACZ_SDOUT_R A24
    *SHORT PAD HDA_SDO BC14 SATA_RXN_5# AF11 CL_CLK
    SATA_RXN5/PERN2 CL_CLK TP40
    TP64 GPIO33 B17 (CORE) BE14 SATA_RXP_5 PCH_SPI_CLK_R2R R360 33_4 AJ11
    PCH_SPI_CLK_R2

    SPI
    DOCKEN#/GPIO33 SATA_RXP5/PERP2 SPI_CLK AF10 CL_DAT
    HM86: mSATA C-Link CL_DATA TP41
    C22 (SUS) AP15 SATA_TXN_5# PCH_SPI_CS0#_R2RR687 33_4 AJ7
    PCH_SPI_CS0#_R2
    R_3VRTC_R [19] HDPLOC HDA_DOCK_RST#/GPIO13 SATA_TXN5/PETN2 AR15 SATA_TXP_5
    HM87: 2nd SATA HDD SPI_CS0# AF7 CL_RST#
    SATA_TXP5/PETP2 CL_RST# TP39
    R673 AL7
    *10K_4 PCH_SPI_CS1#_R2
    +3VPCU SPI_CS1#
    For Wireless LAN Device supporting
    1

    AY5 SATA_RCOMP R309 7.5K/F_4 AJ10


    CN13 SATA_RCOMP +1.5V SPI_CS2# Intel Active Management Technology
    BA45
    AP3 SATA_LED# PCH_SPI_SI_R2R R371 33_4 PCH_SPI_SI_R2 AH1 TP1
    SATALED# SPI_MOSI BC45
    PCH_JTAG_TCK AB3 AT1 ODD_PRSNT# PCH_SPI_SO_RR R374 33_4 PCH_SPI_SO_R AH3 Thermal TP2
    JTAG_TCK (CORE) SATA0GP/GPIO21 ODD_PRSNT# [18] SPI_MISO
    AAA-BAT-054-K01 BE43
    PCH_JTAG_TMS AD1 AU2 BBS_BIT0 PCH_SPI_IO2 AJ4 TP4
    (CORE) SATA1GP/GPIO19 TP69
    2

    JTAG_TMS SPI_IO2 BE44


    PCH_JTAG_TDI AE2 BD4 SATA_IREF R314 0_4 PCH_SPI_IO3 AJ2 TP3

    JTAG
    JTAG_TDI SATA_IREF +1.5V TP70 SPI_IO3 AY43 TD_IREF R569 8.2K_4
    PCH_JTAG_TDO AD3 BA2 TD_IREF
    TP66 JTAG_TDO TP9
    C HDA R310 0_4 F8 BB2
    C
    TP25 TP8 3 OF 11
    C26 LPT_PCH_M_EDS/BGA
    ACZ_SDIN0_AUDIO TP22
    [24] ACZ_SDIN0_AUDIO
    AB6
    R277 33_4 ACZ_RST#_R TP20
    [24] ACZ_RST#_AUDIO

    [24] ACZ_SDOUT_AUDIO R596 33_4 ACZ_SDOUT_R +5V 1 OF 11


    LPT_PCH_M_EDS/BGA
    2

    [24] BIT_CLK_AUDIO R264 33_4 ACZ_BITCLK_R Q19 As close as possible


    *2N7002K_300MA
    C180 10P/50V_4C 1 3
    As close as possible SATA_RXN_1# RP78 2 1 *0X2 SATA_RXN_1ST_SSD#
    SATA_RXN_1ST_SSD# [19] +3V_S5
    SATA_RXP_1 4 3 SATA_RXP_1ST_SSD
    SATA_RXP_1ST_SSD [19]
    R267 33_4 ACZ_SYNC_R1 R281 0_4 ACZ_SYNC_R SATA_RXN_5# RP69 4 3 0X2 SATA_RXN_1ST_SSD#_R
    RP75 4 3 0X2
    [24] ACZ_SYNC_AUDIO
    C186 10P/50V_4C
    SATA_RXP_5 2
    RP70 2
    1
    1 *0X2
    SATA_RXP_1ST_SSD_R
    SATA_RXN_2ND_HDD#_R
    2 1
    CLG SMBus/Pull-up CLG
    R266 1M_4 4 3 SATA_RXP_2ND_HDD_R mSATA
    SATA_TXN_5# RP72 4 3 *0X2 SATA_TXN_2ND_HDD#_R +3V +3V_S5 BY1-A1A Pull up R2139 R295
    SATA_TXP_5 2 1 SATA_TXP_2ND_HDD_R to disable S3 function Strap 2.2K_4

    2
    RP71 2 1 0X2 SATA_TXN_1ST_SSD#_R
    RP77 2 1 0X2 SATA_TXN_1ST_SSD# R337 10K_4 SERIRQ
    4 3 4 3 SATA_TXN_1ST_SSD# [19]
    SATA_TXP_1ST_SSD_R SATA_TXP_1ST_SSD R641 10K_4 SATA_LED# R311 1K_4 DRAMRST_CNTRL_PCH
    4 3 *0X2 SATA_TXP_1ST_SSD [19] 3 1
    SATA_TXN_1# RP76 R667 10K_4 ODD_PRSNT# R303 *10K_4 [19,21,29] 2ND_MBCLK SMB_ME1_CLK
    SATA_TXP_1 2 1 R634 10K_4 BBS_BIT0
    Q20
    ME2N7002E_200MA
    PCH JTAG +3V_S5 +3V_S5
    +3V_S5
    JTAG_TCK,JTAG_TMS RP80 2
    SATA_RXN_2ND_HDD#_R 1 *0X2 SATA_RXN_2ND_HDD#
    SATA_RXN_2ND_HDD# [18]
    SATA_RXP_2ND_HDD_R 4 3 SATA_RXP_2ND_HDD R369 2.2K_4 SDATA
    Trace Length < 9000mils SATA_RXN_2# RP79 4 3 0X2
    SATA_RXP_2ND_HDD [18]
    R359 2.2K_4 SCLK
    SATA_RXP_2 2 1 R324 2.2K_4 SMB_ME0_CLK R299
    R680 R681 R325 2.2K_4 SMB_ME0_DAT 2.2K_4

    2
    *210/F_4 *210/F_4 2nd SATA HDD
    As close as possible R322 10K_4 SMBALERT# 3 1 SMB_ME1_DAT
    [19,21,29] 2ND_MBDATA
    B PCH_JTAG_TDI SATA_TXN_2# RP81 2 1 0X2 SATA_TXN_2ND_HDD# R317 10K_4 SML1ALERT#_R B
    4 3 SATA_TXN_2ND_HDD# [18]
    PCH_JTAG_TMS SATA_TXP_2 SATA_TXP_2ND_HDD Q21
    SATA_TXP_2ND_HDD [18]
    PCH_JTAG_TCK RP82 4
    SATA_TXN_2ND_HDD#_R 3 *0X2 ME2N7002E_200MA
    SATA_TXP_2ND_HDD_R 2 1

    R636 R670 R656


    *51/F_4 *100/F_4 *100/F_4
    PCH STRAPING
    Pin Name Usage Sampled Configuration Circuitry
    0 = Disable (Int PD)
    SPKR No Reboot PWROK 1 = Enable PCBEEP R363 *1K_4 +3V
    PCH SPI CLG PLL On-Die Voltage 0 = Disable
    R357 *1K_4
    GPIO62 / SUSCLK Regulator Enable RSMRST# 1 = Enable (Int PU) [6,23,29] SUSCLK
    0 = Top-Block Swap mode
    GPIO55 Top-Block Swap Override PWROK 1 = Default (Int PU) [6] STP_A16OVR R315 *1K_4

    Change to single 8M SPI.20121017 0 = Disable


    INTVRMEN Integrated VRM Enable Always 1 = Enable PCH_INVRMEN
    R319 330K_4 +3V_RTC

    8M Bit1 Bit0
    +3V_S5 Boot BIOS Strap bit 1 PWROK R294 *1K_4
    GPIO51 1 0 Resvered [6] BBS_BIT1
    U14
    1 8
    1 1 SPI
    [29] PCH_SPI_CS0# R350 33_4 PCH_SPI_CS0#_R2R BBS_BIT0 R635 *1K_4
    R366 33_4 PCH_SPI_CLK_R2R 6 CE# VDD 0 0 LPC
    [29] PCH_SPI_CLK SCK SATA1GP/GPIO19 Boot BIOS Strap bit 0 PWROK
    [29] PCH_SPI_SO R367 33_4 PCH_SPI_SI_R2R 5
    R353 33_4 PCH_SPI_SO_RR 2 SI 7 SPI_HOLD# R352 3.3K/F_4
    [29] PCH_SPI_SI SO HOLD# Flash Descriptor Security 0 = Security Effect (Int PD)
    HDA_SDO PWROK 1 = Can be Override ACZ_SDOUT_R
    R590 *1K_4 +VCC_HDA_IO
    R361 3.3K/F_4 SPI_WP# 3 4 R379 15_4 PCH_SPI_IO3 Override / Intel ME Debug Mode [29] ACZ_SDOUT_R
    +3V_S5 WP# VSS
    PCH_SPI_IO2 R375 15_4 C258 W25Q64FVSSIQ GPIO36 RSVD PWROK Internal PD [9] GPIO36 R669 *1K_4 +3V
    *22P/50V_4N C254 0 = TLS no confidentiality (Int PD)
    A REV-B2A Connected PCH_SPI_IO2 and PCH_SPI_IO3 SATA3GP/GPIO37 TLS Confidentiality PWROK 1 = TLS with confidentiality [9] FDI_OVRVLTG R677 1K_4 +3V A
    to PCH for supporting Quad SPI function 0.1U/16V_4Y

    GPIO8 RSVD RSMRST# Internal PU R658 10K_4


    EC (EC+BIOS):SPI_CS0# [9] GPIO8
    0 = Disable Check list V1.0 Removed the GPIO28
    GPIO28 PLL on die VR enable RSMRST# 1 = Enable (Int PU) [9] PLL_ODVR_EN R300 *1K_4 signal information of PLL VR enable signal

    0 = Disable [6] DSWVREN R614 330K_4 +3V_RTC


    DSWVREN On Die DSW VR Enable Always 1 = Enable Must be PU to VCCRTC R615 *330K_4
    Quanta Computer Inc.
    PROJECT : BDD
    Size Document Number Rev
    A1A
    LPT 2/6 (SATA/HDA/SPI)
    Date: Tuesday, February 05, 2013 Sheet 7 of 37
    5 4 3 2 1
    5 4 3 2 1

    Lynx Point (PCIE,USB3.0,USB2.0)


    U26I
    LPT_PCH_M_EDS
    U26C
    Lynx Point (CLOCK)
    LPT_PCH_M_EDS
    08
    [26] USB3_RXN3 USB3_RXN3 AW31 B37 USBP0-
    PERN1/USB3RN3 USB2N0 USBP0- [26]
    [26] USB3_RXP3 USB3_RXP3 AY31 D37 USBP0+ M/B side(up port) R556 0_4 CLK_PCIE_LAN#_R Y43 AB35 CLK_PCIE_VGAN [17]
    PERP1/USB3RP3 USB2P0 USBP0+ [26] [28] CLK_PCIE_LAN# CLKOUT_PCIE_N_0 CLKOUT_PEG_A
    Small board(up port) A38 USBP1-
    BE32 USB2N1 C38 USBP1- [26] Y45 AB36
    [26] USB3_TXN3 USB3_TXN3 USBP1+ M/B side(Down port) LAN R555 0_4 CLK_PCIE_LAN_R CLK_PCIE_VGAP [17]
    PETN1/USB3TN3 USB2P1 USBP1+ [26] [28] CLK_PCIE_LAN CLKOUT_PCIE_P_0 CLKOUT_PEG_A_P
    D [26] USB3_TXP3 USB3_TXP3 BC32 A36 USBP2_EXT1# D
    PETP1/USB3TP3 USB2N2 USBP2_EXT1# [26]
    C36 USBP2_EXT1 Small board(up port) R657 0_4 PCIE_CLK_REQ_LAN#_R AB1 (SUS) (SUS) AF6 CLK_PEGA_REQ# CLK_PEGA_REQ# [17]
    USB2P2 USBP2_EXT1 [26] [28] PCIE_CLK_REQ_LAN# PCIECLKRQ0#/GPIO73 PEGA_CLKRQ#/GPIO47
    [26] USB3_RXN4 USB3_RXN4 AT31 A34 USBP3_EXT2#
    PERN2/USB3RN4 USB2N3 USBP3_EXT2# [26]
    [26] USB3_RXP4 USB3_RXP4 AR31 C34 USBP3_EXT2 Small board(Down port) R550 0_4 CLK_PCIE_CR#_R AA44 Y39
    PERP2/USB3RP4 USB2P3 B33 USBP3_EXT2 [26] [25] CLK_PCIE_CR# AA42 CLKOUT_PCIE_N_1 CLKOUT_PEG_B
    Small board(Down port) R549 0_4 CLK_PCIE_CR_R
    USB2N4 [25] CLK_PCIE_CR CLKOUT_PCIE_P_1
    [26] USB3_TXN4 USB3_TXN4 BD33 D33 Card Reader Y38
    USB3_TXP4 BB33 PETN2/USB3TN4 USB2P4 F31 R679 0_4 PCIE_CLK_CR_REQ#_R AF1 CLKOUT_PEG_B_P
    [26] USB3_TXP4 PETP2/USB3TP4 USB2N5 [25] PCIE_CLK_CR_REQ# PCIECLKRQ1#/GPIO18 (CORE)
    G31 (SUS) U4 S3_STRAP
    USB2P5 K31 AB43 PEGB_CLKRQ#/GPIO56
    AW33 USB2N6 L31 CLKOUT_PCIE_N_2 AF39
    [23] PCIE_RXN_WLAN# PERN_3 USB2P6 CLKOUT_DMI CLK_CPU_BCLKN [2]
    AY33 G29 AB45
    [23] PCIE_RXP_WLAN PERP_3 USB2N7 H29 CLKOUT_PCIE_P_2 AF40
    WLAN USB2P7 CLKOUT_DMI_P CLK_CPU_BCLKP [2]
    [23] PCIE_TXN_WLAN# C525 0.1U/10V_4XPCIE_TXN_WLAN#_CBE34 A32 CLK_PCIE_REQ2# AF3 (CORE)
    C523 0.1U/10V_4XPCIE_TXP_WLAN_C BC34 PETN_3 USB2N8 C32 Add CLK_PCIE_WLAN netnames.20121012 PCIECLKRQ2#/GPIO20/SMI# AJ40
    [23] PCIE_TXP_WLAN PETP_3 USB2P8 CLKOUT_DP CLK_DPLL_SSCLKN [2]
    A30 USBP9_3D_IR# [23] CLK_PCIE_WLAN# R553 0_4 CLK_PCIE_WLAN#_R AD43 AJ39 CLK_DPLL_SSCLKP [2]
    AT33 USB2N9 C30 USBP9_3D_IR# [22] AD45 CLKOUT_PCIE_N_3 CLKOUT_DP_P
    USBP9_3D_IR WLAN [23] CLK_PCIE_WLAN R554 0_4 CLK_PCIE_WLAN_R
    [28] PCIE_RXN_LAN# PERN_4 USB2P9 USBP9_3D_IR [22] CLKOUT_PCIE_P_3
    AR33 B29 USBP10_WLAN# [23] PCIE_CLK_WLAN_REQ# R351 0_4 PCIE_CLK_WLAN_REQ#_R T3 (SUS) AF35 CLK_DPLL_NSCLKN [2]
    [28] PCIE_RXP_LAN PERP_4 USB2N10 USBP10_WLAN# [23] PCIECLKRQ3#/GPIO25 CLKOUT_DPNS
    D29 USBP10_WLAN AF36 CLK_DPLL_NSCLKP [2]
    USB2P10 USBP10_WLAN [23] CLKOUT_DPNS_P
    [28] PCIE_TXN_LAN# C518 0.1U/10V_4XPCIE_TXN_LAN#_C BE36 LAN A28 USBP11_CCD# AF43
    PETN_4 USB2N11 USBP11_CCD# [22] CLKOUT_PCIE_N_4
    [28] PCIE_TXP_LAN C520 0.1U/10V_4XPCIE_TXP_LAN_C BC36 C28 USBP11_CCD AF45 AY24 CLK_BUF_EXPN
    PETP_4 USB2P11 G26 USBP11_CCD [22] V3 CLKOUT_PCIE_P_4 CLKIN_DMI AW24CLK_BUF_EXPP
    TP32 GPIO26 (SUS)
    PCIe

    AW36 USB USB2N12 F26 PCIECLKRQ4#/GPIO26 CLKIN_DMI_P


    [25] PCIE_RXN_CR# PERN_5 USB2P12 TP33
    [25] PCIE_RXP_CR
    AV36 F24 AE44 AR24 CLK_BUF_CPYCKN
    PERP_5 USB2N13 G24 AE42 CLKOUT_PCIE_N5 CLKIN_GND AT24 CLK_BUF_CPYCKP
    C515 0.1U/10V_4XPCIE_TXN_CR#_C BD37 Card Reader USB2P13 GPIO44 AA2 CLKOUT_PCIE_P_5 CLKIN_GND_P
    [25] PCIE_TXN_CR# PETN_5 PCIECLKRQ5#/GPIO44 (SUS)
    [25] PCIE_TXP_CR C516 0.1U/10V_4XPCIE_TXP_CR_C BB37 H33 CLK_BUF_DOT96N
    PETP_5 AR26 USB3_RXN1 AB40 CLKIN_DOT96N G33 CLK_BUF_DOT96P
    USB3RN1 USB3_RXN1 [26] CLKOUT_PCIE_N_6 CLKIN_DOT96P
    C AY38 AP26 USB3_RXP1 AB39 C
    PERN_6 USB3RP1 USB3_RXP1 [26] CLKOUT_PCIE_P_6
    AW38 BE24 USB3_TXN1 M/B side(up port) GPIO45 AE4 (SUS) BE6 CLK_BUF_CKSSCDN
    PERP_6 USB3TN1 USB3_TXN1 [26] PCIECLKRQ6#/GPIO45 CLKIN_SATA
    BD23 USB3_TXP1 BC6 CLK_BUF_CKSSCDP
    USB3TP1 USB3_TXP1 [26] CLKIN_SATA_P
    BC38 AW26 USB3_RXN2 AJ44
    PETN_6 USB3RN2 USB3_RXN2 [26] CLKOUT_PCIE_N_7
    BE38 AV26 USB3_RXP2 F45 CLK_BUF_REF14
    PETP_6 USB3RP2 USB3_RXP2 [26] REFCLK14IN
    BD25 USB3_TXN2 M/B side(Down port) AJ42 D17 CLK_PCI_FB
    USB3TN2 USB3_TXN2 [26] CLKOUT_PCIE_P_7 CLKIN_33MHZLOOPBACK
    AT40 BC24 USB3_TXP2
    PERN_7 USB3TP2 USB3_TXP2 [26]
    AT39 AW29 GPIO46 Y3 (SUS) AM43 XTAL25_IN
    PERP_7 USB3RN5 AV29 PCIECLKRQ7#/GPIO46 XTAL25_IN AL44 XTAL25_OUT
    BE40 USB3RP5 BE26 AH43 XTAL25_OUT
    BC40 PETN_7 USB3TN5 BC26 CLKOUT_ITPXDP C40 CLK_FLEX0
    PETP_7 USB3TP5 (CORE)CLKOUTFLEX0/GPIO64 TP62
    AR29 AH45
    AN38 USB3RN6 AP29 CLKOUT_ITPXDP_P F38 CLK_FLEX1
    PERN_8 USB3RP6 (CORE)CLKOUTFLEX1/GPIO65 TP60
    AN39 BD27 TP30 CLK_PCH_PCI0 D44
    PERP_8 USB3TN6 BE28 CLKOUT_33MHZ0 F36 CLK_FLEX2
    USB3TP6 (CORE)CLKOUTFLEX2/GPIO66 TP34
    BD42 TP61 CLK_PCH_PCI1 E44
    BD41 PETN_8 K24 USBCOMP R279 22.6/F_4 CLKOUT_33MHZ1 F39 DGPU_PRSNT#_R
    PETP_8 USBRBIAS# (CORE)CLKOUTFLEX3/GPIO67 TP31
    K26 CLK_PCI_FB R254 22_4 CLK_PCI_FB_R B42
    USBRBIAS CLKOUT_33MHZ2 AM45 ICLK_IREF R242 0_4
    ICLK_IREF +1.5V
    +1.5V R585 0_4 PCIE_IREF BE30 M33 [23] PCLK_DEBUG PCLK_DEBUG R575 22_4 PCLK_DEBUG_R F41
    PCIE_IREF TP24 L33 CLKOUT_33MHZ3 AD39
    TP23 PCLK_591 R578 22_4 PCLK_591_R A40 TP19 AD38
    [29] PCLK_591 CLKOUT_33MHZ4 TP18
    BC30 (SUS) P3 USB_SC_OC#_R R674 0_4
    TP11 OC0#/GPIO59 USB_SC_OC# [26]
    (SUS) V1 USB_Normal_OC#_R R684 0_4 AN44 ICLK_BIAS R250 *7.5K/F_4
    OC1#/GPIO40 USB_Normal_OC# [26,29] DIFFCLK_BIASREF
    (SUS) U2 USB_OC2# C512 C517 CLOCK SIGNAL
    BB29 OC2#/GPIO41 P1 USB_OC3# 18P/50V_4C 18P/50V_4C 2 OF 11 R251 7.5K/F_4
    TP6 (SUS) OC3#/GPIO42 +VCCAXCK_VRM
    (SUS) M3 USB_OC4#
    OC4#/GPIO43 T1 USB_OC5# LPT_PCH_M_EDS/BGA
    B (SUS) OC5#/GPIO9 B
    R589 7.5K/F_4 PCIE_RCOMP BD29 (SUS) N2 USB_OC6#
    PCIE_RCOMP OC6#/GPIO10 M1 SCI#
    (SUS) OC7#/GPIO14 SCI# [29]
    9 OF 11
    LPT_PCH_M_EDS/BGA

    USB Overcurrent PCH Intenal Clock 25MHz Crystal for PCH


    +3V_S5 +3V_S5

    +3V_S5 PCIE_CLK_REQ_LAN#_R R682 10K_4 CLK_BUF_EXPN R285 10K_4 R373 10K_4 CLK_PEGA_REQ#
    RP42 PCIE_CLK_WLAN_REQ#_R R631 10K_4 CLK_BUF_EXPP R286 10K_4
    10 1 USB_OC6# GPIO26 R683 10K_4 CLK_BUF_CPYCKN R283 10K_4 R372 *10K_4 XTAL25_IN C513 15P/50V_4C
    USB_OC4# 9 2 USB_SC_OC#_R GPIO44 R637 10K_4 CLK_BUF_CPYCKP R284 10K_4

    2
    1
    USB_Normal_OC#_R 8 3 SCI# GPIO45 R643 10K_4 CLK_BUF_DOT96N R259 10K_4
    USB_OC2# 7 4 USB_OC5# GPIO46 R638 10K_4 CLK_BUF_DOT96P R263 10K_4
    A USB_OC3# 6 5 CLK_BUF_CKSSCDN R620 10K_4 R576 Y2 A
    CLK_BUF_CKSSCDP R621 10K_4 +3V_S5 1M_4 25MHZ_30
    10KX8 CLK_BUF_REF14 R574 10K_4

    3
    4
    +3V R346 NS3@10K_4 S3_STRAP XTAL25_OUT C514 15P/50V_4C

    PCIE_CLK_CR_REQ#_R R664 10K_4 R343 S3@10K_4


    CLK_PCIE_REQ2# R678 10K_4 Quanta Computer Inc.
    REV-D3A Change C513 and C514
    from 27pf to 15pf for Vendor suggestion PROJECT : BDD
    Size Document Number Rev
    A1A
    LPT 3/6 (PCIE/USB/CLK)
    Date: Tuesday, February 05, 2013 Sheet 8 of 37
    5 4 3 2 1
    5 4 3 2 1

    OPTIMUS POWER PCH control pin


    BOARD ID SETTING CLG/PX/OEV/UGA/CLG-Strap
    DGPU_PWROK
    DGPU_HOLD_RST#
    DGPU_PWR_EN#
    GPIO17
    GPIO50
    GPIO54
    BOARD_ID4

    BOARD_ID5
    Lynx Point (GPIO,CPU/MISC,NCTF)
    AT8

    F13
    U26F LPT_PCH_M_EDS

    BMBUSY#/GPIO0 (CORE)
    (CORE)
    Board ID
    HM86
    HM87
    ID1
    H
    L
    ID2 ID3 ID4 ID5 ID6 ID7 ID8 ID9 ID10 ID11 ID12 09
    TACH1/GPIO1
    Only VGA H
    BOARD_ID6 A14 (CORE) OPTIMUS L
    [19] BOARD_ID6 TACH2/GPIO6
    CPU/Misc
    BOARD_ID2 G15 (CORE) W/O LED KB H
    TACH3/GPIO7
    W/ LED KB L
    D GPIO8 Y1 (SUS) D
    [7] GPIO8 GPIO8
    ChiefRiver H
    HDPACT K13 (SUS) Shark Bay L
    [19] HDPACT LAN_PHY_PW R_CTRL/GPIO12 AN10
    TP14 GATEA20 [29]
    GPIO15 AB11
    GPIO15 (SUS) AY1 PCH_PECI R628 *0_4
    17" Premium H
    PECI EC_PECI [2,29] 17" Gaming L
    GPIO16 AN2 (CORE)
    SATA4GP/GPIO16 AT6 RCIN#
    GPIO RCIN# RCIN# [29] W/ HDMI H
    DGPU_PWROK C14 (CORE) W/O HDMI L
    [17,29] DGPU_PWROK TACH0/GPIO17 AV3
    PROCPW RGD H_PWRGOOD [2]
    GPIO22 BB4 W/ G-sensor
    SCLOCK/GPIO22 (CORE) AV1 PCH_THRMTRIP# R633 390_4
    H
    THRMTRIP# PM_THRMTRIP# [2] W/O G-sensor L
    GPIO24 Y10
    GPIO24 (SUS) AU4
    PLTRST_PROC# CPU_PLTRST# [2] WIN7 H
    DSW_WAKE#_R R11
    [29] DSW_WAKE#_R GPIO27 (DSW) N10
    WIN8 L
    PLL_ODVR_EN AD11 VSS
    [7] PLL_ODVR_EN GPIO28 (SUS) ECO Mode H
    PCH GPIO PU/PD 3D Mode L
    BOARD_ID9 AN6
    GPIO34 (CORE) +3V H
    BOARD_ID7 AP1 (CORE) L
    GPIO35/NMI#
    GPIO36 AT3 (CORE) HDPINT R362 *10K_4 H
    [7] GPIO36 SATA2GP/GPIO36 GPIO22 R321 10K_4 L
    FDI_OVRVLTG AK1 (CORE) GPIO16 R661 10K_4
    [7] FDI_OVRVLTG SATA3GP/GPIO37
    H
    BOARD_ID1 AT7 (CORE) TEMP_ALERT# R368 10K_4 L
    SLOAD/GPIO38 PCH_ODD_EN R606 10K_4
    C BOARD_ID8 AM3 (CORE) A2 GPIO70 R611 10K_4 C
    SDATAOUT0/GPIO39 VSS A41 GPIO71 R610 10K_4
    HDPINT AN4 VSS A43 DGPU_PWROK R305 10K_4 +3V +3V +3V +3V
    [19] HDPINT SDATAOUT1/GPIO48 (CORE) VSS A44
    TEMP_ALERT# AK3 VSS B1
    [29] TEMP_ALERT# SATA5GP/GPIO49 (CORE) VSS B2
    NFC_IRQ# U12 VSS B44 R339 R609 R607 R301
    GPIO57 (SUS) VSS B45
    PCH_ODD_EN C16 VSS BA1 +3V_S5 HM86@10K_4 OEV@10K_4 10K_4 *10K_4
    [18] PCH_ODD_EN TACH4/GPIO68 (CORE) VSS BC1
    BOARD_ID3 D13 VSS BD1 PLL_ODVR_EN R327 10K_4 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4
    TACH5/GPIO69 (CORE) VSS BOARD_ID3 [27]
    BD2 GPIO15 R355 10K_4
    GPIO70 G13 VSS BD44 HDPACT R612 *10K_4
    GPIO27 TACH6/GPIO70 (CORE) VSS BD45 NFC_IRQ# R329 10K_4
    GPIO71 H15 VSS BE2 R348 10K_4 R338 R616 R302
    With Intel LAN: TACH7/GPIO71 (CORE) VSS REV 1.5 change
    BE3 Mount R348 +3V_DS3
    Connect to LANWAKE# pin on the LAN VSS
    Without Intel LAN: D1 HM87@10K_4 PIV@10K_4 10K_4
    BE41 VSS E1 R347 *10K_4
    Used to wake event from DSx R624 0_4 TP_VSS_NCTF2 BE5 VSS NCTF VSS E45 DSW_WAKE#_R R344 *10K_4
    C45 VSS VSS A4 GPIO36 R668 10K_4
    A5 VSS VSS
    VSS
    6 OF 11 +3V +3V +3V +3V +3V
    LPT_PCH_M_EDS/BGA

    R618 R608 R649 R663 R323


    PCH MISC PU/PD +3V
    B
    *10K_4 HM@10K_4 GS@10K_4 WIN7@10K_4 10K_4 B
    GATEA20 R340 8.2K_4
    RCIN# R336 10K_4 BOARD_ID5 BOARD_ID6 BOARD_ID7 BOARD_ID8 BOARD_ID9

    PU & Password Clear +1.05V

    PCH_THRMTRIP# R632 *1K_4 R617 R613 R642 R662 R333

    GPIO16 10K_4 NHM@10K_4 NGS@10K_4 WIN8@10K_4 *10K_4


    1

    G3

    *SHORT_ PAD +3V_S5


    2

    R341 10K_4 GPIO24 R328 *10K_4

    Change G3 for Clear CMOS password from GPIO21 to GPIO16

    A A

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    LPT 4/6 (GPIO/MISC) A1A

    Date: Tuesday, February 05, 2013 Sheet 9 of 37


    5 4 3 2 1
    5 4 3 2 1

    +3V_S5 R598 0_8 +V3.3A_VCCPUSB

    C196
    0.1U/10V_4X
    R287

    R288
    *0_6

    0_6
    +3V_DSW

    +3V_S5
    10
    Lynx Point (Power) R252 0_6 +V1.05S_VCCAUSB
    Lynx Point (Power) C216
    +1.05V LPT_PCH_M_EDS
    70mA (15mils) U26H 0.1U/10V_4X
    +VCCA_DAC_1_2 L9 PIV@HCB1608KF-181T15_1.5A +1.5V
    1.29A (60mils) C174
    U26G LPT_PCH_M_EDS 0.1U/10V_4X
    D
    +1.05V R313 0_1206 +V1.05S_PCH_VCC R236 C153 C511 C154 R24 R20 +V3.3A_VCCPSUS
    D
    P45 OEV@0_4 [email protected]/25V_4X
    [email protected]/10V_4X PIV@10U/6.3V_6X R26 VCCSUS3_3 VCCSUS3_3 R22
    VCCADAC1_5 R273 0_6 +V3.3S_VCCAUBG R28 VCCSUS3_3 VCCSUS3_3 C223
    +3V VCCSUS3_3 GPIO/LPC
    C229 C213 AA24 P43 U26 13mA (10mils) 0.1U/10V_4X
    10U/6.3V_6X 1U/6.3V_4X AA26 VCC CRT DAC VSS VCCSUS3_3 A16 +VCCPDSW
    VCC 13mA (10mils) VCCDSW3_3
    AD20 M31 +V3.3S_ADACBG R257 PIV@0_6 +3V C199 M24
    AD22 VCC VCCADACBG3_3 R255 OEV@0_4 0.1U/10V_4X VSS AA14 +VCCSST R331 0_8
    VCC DCPSST +3V
    AD24 R248 *PIV@0_6 +3V_BG U35
    AD26 VCC BB44 VCCUSBPLL AE14 +V3.3S_VCCPCORE

    USB
    VCC VCCVRM +V1.05S_VCCAPLL_FDI VCC3_3
    AD28 +1.05V R232 0_8 +V1.05S_VCCUSBCORE L24 AF12 C222
    AE18 VCC FDI AN34 +V3.3S_VCC_GIO R591 0_6 VCC3_3 VCC3_3 AG14 0.01U/25V_4X
    VCC VCCIO +V1.05S_VCC_EXP +3V VCC3_3
    C194 C207 AE20 U30
    1U/6.3V_4X 1U/6.3V_4X AE22 VCC AN35 C184 V28 VCCIO
    AE24 VCC VCCIO C175 1U/6.3V_4X V30 VCCIO U36 +V1.05S_VCCAUX R246 0_6
    VCC VCCIO VCCIO +1.05V
    AE26 R30 0.1U/10V_4X Y30
    AG18 VCC HVCMOS VCC3_3_R30 R32 VCCIO R298 *0_6
    VCC VCC3_3_R32 28mA (10mils) +3V_DSW
    AG20 98mA (15mils) +V1.05M_VCCDUSBSUS Y35 Azalia
    R345 5.11/F_4 +PCH_VCCDSW AG22 VCC Y12 +V1.05M_VCCSUS DCPSUS2 A26 R296 0_6
    VCC DCPSUS1 VCCSUSHDA +VCC_HDA_IO +3V_S5
    AG24 +VCCAXCK_VRM AF34
    Y26 VCC AJ30 C164 VCCVRM
    VCC VCCSUS3_3 +V3.3A_VCCPSUS
    Core

    C253 AJ32 C240 *1U/6.3V_4X +V1.05S_VCC_AXCK_DCB AP45 K8 +VCCPRTCSUS_3P3 C233


    1U/6.3V_4X VCCSUS3_3 *1U/6.3V_4X VCC VCCSUS3_3 1U/6.3V_4X
    0.67A (40mils) AJ26 +V1.05S_VCC_SSCFF Y32 A6
    U14 USB3 DCPSUS3 AJ28 R260 0_6 +V3.3S_VCC_FLEX0 VCCCLK VCCRTC
    DCPSUSBYP DCPSUS3 0.476A (30mils) +3V RTC
    +1.05V R282 0_1206 +V1.05M_VCCASW AA18 AK20 +V1.05S_VCC_EXP +VCCA_USBSUS M29 P14 +VCCRTCEXT +3V_RTC
    U18 VCCASW VCCIO AK26 VCCCLK3_3 DCPRTC P16
    VCCASW VCCVRM +VCCAPLL_USB3 DCPRTC
    U20 AK28 C176 L29
    C205 C208 U22 VCCASW VCCVRM C189 C193 1U/6.3V_4X VCCCLK3_3 C221 C552 C549 C553
    VCCASW 4mA (10mils)
    22U/6.3V_8X 1U/6.3V_4X U24 BE22 +V1.05S_VCCAPLL_EXP *1U/6.3V_4X *10U/6.3V_6X L26 AJ12 +V1.05S_VCCPCPU 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 1U/6.3V_4X
    V18 VCCASW VCCVRM M26 VCCCLK3_3 V_PROC_IO AJ14
    PCIe/DMI CPU
    V20 VCCASW AK18 R265 0_6 +V3.3S_VCC_FLEX1 VCCCLK3_3 V_PROC_IO
    VCCASW VCCIO +V1.05S_VCC_EXP +3V
    V22 U32 22mA (10mils)
    C V24 VCCASW AN11 V32 VCCCLK3_3 AD12 C

    ICC
    +V1.05S_VCCAPLL_SATA3 +V3.3M_VCCPSPI R289 0_6 +VCCIO_PCH
    Y18 VCCASW VCCVRM C181 VCCCLK3_3 SPI VCCSPI
    Y20 VCCASW SATA AK22 1U/6.3V_4X AD34
    VCCASW VCCIO +V1.05S_VCC_EXP VCCCLK
    C214 Y22 P18 +V3.3S_VCCPFUSE C225 C226 C217
    1U/6.3V_4X VCCASW AM18 AA30 VCC P20 0.1U/10V_4X 0.1U/10V_4X 1U/6.3V_4X
    VCCIO +V1.05S_VCC_SSCFF VCCCLK VCC
    AM20 +3V R272 0_6 +V3.3S_VCC_FLEX23 AA32
    VCCIO AM22 VCCCLK L17
    VCCMPHY VCCIO AP22 AD35 Fuse VCCASW
    VCCIO +V1.05S_VCCCLKF100 VCCCLK
    AR22 C185 R18 R326 0_6 +3V_S5
    VCCIO AT22 1U/6.3V_4X AG30 VCCASW
    VCCIO +V1.05S_VCCSSCF100 VCCCLK
    7 OF 11 AG32 REV_B2A Change VCCSPI
    VCCCLK AW40 C227
    VCCVRM power rail from +3V to +3V_S5
    LPT_PCH_M_EDS/BGA +3V R247 0_6 +V3.3S_VCC_ASEPCI +V1.05S_VCCCLKF100 AD36 1U/6.3V_4X
    VCCCLK AK30
    AE30 VCC3_3
    +V1.05S_VCCSSCF100 Thermal
    C160 AE32 VCCCLK AK32 R291 0_6
    VCCCLK VCC3_3 +3V
    1U/6.3V_4X
    8 OF 11 R293 *0_6 +1.05V
    PCH VRM Power 1.05V OPTION IS PROVIDED
    R244 0_6 +VCCCLKF135 LPT_PCH_M_EDS/BGA
    FOR VALIDATION PURPOSES
    0.179A (20mils)
    PCH VCCIO Power +1.05V
    C215
    1U/6.3V_4X
    +1.05V +V1.05S_VCCAPLL_FDI C163
    3.629A (160mils)
    +1.05V +V1.05S_VCC_EXP 1U/6.3V_4X
    L11 *1uh_6_25MA PCH_VCC_1_1_20 R292 0_6 +1.05V
    R601 0_1206
    +1.5V R749 0_1206 PCH_VCC_1_1_21 R597 0_6 +1.05V
    C165
    R243 0_8 *10U/6.3V_6X C218 C206 C200 C201 C212 C170 +3VPCU +3V_S5 +V3.3A_VCCPSUS +V1.5S_VCCATS R245 0_6
    10U/6.3V_6X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X PCH VCCSUS +1.5V
    R602 0_8 +V3.3S_VCCPTS R269 0_6 +3V
    B R599 B
    +1.05V +VCCAPLL_USB3 *4.7K_4 1 3 C178
    0.1U/10V_4X
    L12 *10uh_8_100MA Q46
    PCH band gap Power *ME2303T1 C197
    2
    +1.5V 0.1U/10V_4X
    C191
    R276 0_8 *10U/6.3V_6X
    3

    +3V_S5 +3V_BG

    3 1 [6,29] SLP_SUS# 2 Q47


    *DTC144EUA
    +1.05V +V1.05S_VCCAPLL_EXP Q16
    *PIV@ME2N7002E_200MA
    2

    L22 *1uh_6_25MA [12,31,35] MAIND


    +1.5V
    C532
    R595 0_8 *10U/6.3V_6X 0.01A (10mils)
    +1.05V +VCC_AXCK_DCB +V1.05S_VCC_AXCK_DCB PCH HDA Power
    +1.05V +VCCAXCK_VRM_R +VCCAXCK_VRM +3V_S5 +VCC_HDA_IO
    R561 0_8 L21 0_6 +1.05V +V1.05S_VCCCLKF100 +1.05V +V1.05S_VCC_SSCFF +1.05V +V1.05S_VCCSSCF100
    R233 *1/F_4 L10 *10uh_8_100MA R587 0_6
    +1.05V +V1.05S_VCCAPLL_SATA3 R240 0_8 R231 0_8 R239 0_8
    +1.5V REV_D3A Reserve L10 C506 C507
    L13 *10uh_8_100MA C156 *10U/6.3V_6X 1U/6.3V_4X C531
    R237 0_8 10U/6.3V_6X 0.1U/10V_4X C162 C183 C173
    +1.5V 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X
    C232
    R297 0_8 *10U/6.3V_6X

    A A

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    LPT 5/6 (POWER)
    Date: Tuesday, February 05, 2013 Sheet 10 of 37
    5 4 3 2 1
    5 4 3 2 1

    Lynx Point (GND) Lynx Point (GND) 11


    D D
    LPT_PCH_M_EDS LPT_PCH_M_EDS
    U26J U26K

    AL34 K39 AA16 B19


    AL38 VSS VSS L2 AA20 VSS VSS B23
    AL8 VSS VSS L44 AA22 VSS VSS B27
    AM14 VSS VSS M17 AA28 VSS VSS B31
    AM24 VSS VSS M22 AA4 VSS VSS B35
    AM26 VSS VSS N12 AB12 VSS VSS B39
    AM28 VSS VSS N35 AB34 VSS VSS B7
    AM30 VSS VSS N39 AB38 VSS VSS BA40
    AM32 VSS VSS N6 AB8 VSS VSS BD11
    AM16 VSS VSS P22 AC2 VSS VSS BD15
    AN36 VSS VSS P24 AC44 VSS VSS BD19
    AN40 VSS VSS P26 AD14 VSS VSS AY36
    AN42 VSS VSS P28 AD16 VSS VSS AT43
    AN8 VSS VSS P30 AD18 VSS VSS BD31
    AP13 VSS VSS P32 AD30 VSS VSS BD35
    AP24 VSS VSS R12 AD32 VSS VSS BD39
    C AP31 VSS VSS R14 AD40 VSS VSS BD7 C
    AP43 VSS VSS R16 AD6 VSS VSS D25
    AR2 VSS VSS R2 AD8 VSS VSS AV7
    AK16 VSS VSS R34 AE16 VSS VSS F15
    AT10 VSS VSS R38 AE28 VSS VSS F20
    AT15 VSS VSS R44 AF38 VSS VSS F29
    AT17 VSS VSS R8 AF8 VSS VSS F33
    AT20 VSS VSS T43 AG16 VSS VSS BC16
    AT26 VSS VSS U10 AG2 VSS VSS D4
    AT29 VSS VSS U16 AG26 VSS VSS G2
    AT36 VSS VSS U28 AG28 VSS VSS G38
    AT38 VSS VSS U34 AG44 VSS VSS G44
    D42 VSS VSS U38 AJ16 VSS VSS G8
    AV13 VSS VSS U42 AJ18 VSS VSS H10
    AV22 VSS VSS U6 AJ20 VSS VSS H13
    AV24 VSS VSS V14 AJ22 VSS VSS H17
    AV31 VSS VSS V16 AJ24 VSS VSS H22
    AV33 VSS VSS V26 AJ34 VSS VSS H24
    BB25 VSS VSS V43 AJ38 VSS VSS H26
    AV40 VSS VSS W2 AJ6 VSS VSS H31
    B
    AV6 VSS VSS W44 AJ8 VSS VSS H36 B
    AW2 VSS VSS Y14 AK14 VSS VSS H40
    F43 VSS VSS Y16 AK24 VSS VSS H7
    AY10 VSS VSS Y24 AK43 VSS VSS K10
    AY15 VSS VSS Y28 AK45 VSS VSS K15
    AY20 VSS VSS Y34 AL12 VSS VSS K20
    AY26 VSS VSS Y36 AL2 VSS VSS K29
    AY29 VSS VSS Y40 BC22 VSS VSS K33
    AY7 VSS VSS Y8 BB42 VSS VSS BC28
    B11 VSS VSS VSS VSS
    B15 VSS 11 OF 11
    VSS
    10 OF 11 LPT_PCH_M_EDS/BGA

    LPT_PCH_M_EDS/BGA

    A A

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    LPT 6/6 (GND)
    Date: Tuesday, February 05, 2013 Sheet 11 of 37
    5 4 3 2 1
    5 4 3 2 1

    For S3 power Reduction Sequence SM_DRAMRST# Topology S3P/NS3P/CPU


    S3P/NS3P/CPU

    +3V_S5 +1.35V_CPU
    12
    R452 NS3@0_6
    +1.35VSUS
    +3V_S5 DDR3_DRAMRST#_R (50ohm)
    Trace Length < 5 inches
    R455

    5
    R454 R471 NS3@0_4 R468
    2 S3@10K_4 *1K_4
    MAINON [19,29,32,33,35]
    [32] S3_1.35V R456 S3@100K_4 4 S3@10K_4
    D D
    1
    CPU_DRAMRST# 1 3 DDR3_DRAMRST#_R R467 0_4
    [2] CPU_DRAMRST# DDR3_DRAMRST# [13,14,15,16]
    U17 S3@TC7SH08FU(F)

    3
    Q31 R469 S3@1K_4 +3V_S5

    3
    S3@ME2N7002E_200MA

    2
    DRAMRST_CNTRL R473 S3@0_4 DRAMRST_CNTRL_PCH [7]
    5 2 R457 S3@1K_4
    R478 *S3@0_4
    Q27 R470 C330
    TP50
    To EC
    Q26B S3@FDV301N_200MA [email protected]/F_4 [email protected]/10V_4X

    4
    S3@2N7002KDW_115MA C323

    1
    3

    *[email protected]/10V_4X

    5 MAINON_ON_G MAINON_ON_G [35]


    Q25B
    S3@2N7002KDW_115MA
    4

    S3 power Reduction (SM_DRAMPWROK) S3P/NS3P/CPU For S3 power Reduction VTT discharge S3P/NS3P/CPU

    C C
    +3V_S5 PM_DRAM_PWRGD_Q (50ohm) +VTT
    Trace Length: 2~8 inches

    +1.35V_CPU R465
    C329
    [email protected]/10V_4X S3@22_4
    PM_DRAM_PWRGD (50ohm)
    Trace Length: 2~8 inches DG V1.5 -> 1.8K
    R462
    SCH V0.7 -> 1K
    5

    3
    1.8K/F_4
    [5,6] SYS_PWROK 2 Q30
    4 PM_DRAM_PWRGD_Q R466 0_4 PM_DRAM_PWRGD_R S3@ME2N7002E_200MA
    PM_DRAM_PWRGD_R [2]
    1 MAINON_ON_G 2
    [6] PM_DRAM_PWRGD
    U19 S3@TC7SH08FU(F) R463 DG V1.5 -> 3.3K
    3

    3.3K/F_4
    SCH V0.7 -> 2K

    1
    R461 NS3@0_4 R464 *S3@39/F_4 3 1

    Q29 *S3@2N7002K_300MA
    2

    MAINON_ON_G

    B B

    CPU SM_VREF S3P/NS3P/CPU S3 power Reduction (CPU Power) S3P/NS3P/CPU

    +1.35VSUS +1.35V_CPU

    R487 NS3@0_1206

    R488 NS3@0_1206

    6
    5 4
    2
    1
    Q35
    S3@AO6402A

    3
    [10,31,35] MAIND MAIND

    C345 R482
    *S3@470P/50V_4X S3@220_8

    3
    MAINON_ON_G 2

    Q32
    S3@ME2N7002E_200MA

    1
    A A
    +1.35VSUS

    C402 C408 C401 C393


    *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X

    +1.35V_CPU Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    S3 Power Reduction
    Date: Tuesday, February 05, 2013 Sheet 12 of 37
    5 4 3 2 1
    5 4 3 2 1

    [3,14] M_A_A[15:0]
    BOT Side Close to CPU
    M_A_A0
    M_A_A1
    M_A_A2
    M_A_A3
    98
    97
    96
    95
    JDIM4A
    A0
    A1
    A2
    DQ0
    DQ1
    DQ2
    5
    7
    15
    17
    M_A_DQ4
    M_A_DQ5
    M_A_DQ7
    M_A_DQ6
    M_A_DQ[63:0] [3,14]
    2.48A
    +1.35VSUS

    75
    76
    81
    JDIM4B
    VDD1
    VDD2
    VSS16
    VSS17
    44
    48
    49
    13
    M_A_A4 92 A3 DQ3 4 M_A_DQ1 82 VDD3 VSS18 54
    M_A_A5 91 A4 DQ4 6 M_A_DQ0 87 VDD4 VSS19 55
    M_A_A6 90 A5 DQ5 16 M_A_DQ3 88 VDD5 VSS20 60
    M_A_A7 86 A6 DQ6 18 M_A_DQ2 93 VDD6 VSS21 61
    M_A_A8 89 A7 DQ7 21 M_A_DQ9 94 VDD7 VSS22 65
    M_A_A9 85 A8 DQ8 23 M_A_DQ8 99 VDD8 VSS23 66
    M_A_A10 107 A9 DQ9 33 M_A_DQ15 100 VDD9 VSS24 71
    M_A_A11 84 A10/AP DQ10 35 M_A_DQ10 105 VDD10 VSS25 72
    A11 DQ11 VDD11 VSS26

    PC2100 DDR3 SDRAM SO-DIMM


    M_A_A12 83 22 M_A_DQ12 106 127
    M_A_A13 119 A12/BC# DQ12 24 M_A_DQ13 111 VDD12 VSS27 128
    D
    M_A_A14 80 A13 DQ13 34 M_A_DQ14 112 VDD13 VSS28 133 D
    SA1 SA0 M_A_A15 78 A14 DQ14 36 M_A_DQ11 117 VDD14 VSS29 134
    A15 DQ15 VDD15 VSS30

    PC2100 DDR3 SDRAM SO-DIMM


    39 M_A_DQ21 118 138
    CHA0 0 0 109 DQ16 41 M_A_DQ16 123 VDD16 VSS31 139
    [3,14] M_A_BS#0 BA0 DQ17 VDD17 VSS32
    108 51 M_A_DQ19 124 144
    [3,14] M_A_BS#1 BA1 DQ18 VDD18 VSS33
    79 53 M_A_DQ18 145
    CHA1 0 1 [3,14] M_A_BS#2 114 BA2 DQ19 40 M_A_DQ20 199 VSS34 150
    [3] M_A_CS#0 S0# DQ20 +3V VDDSPD VSS35
    121 42 M_A_DQ17 151
    [3] M_A_CS#1 101 S1# DQ21 50 77 VSS36 155
    M_A_DQ23
    CHB0 1 0 [3] M_A_CLKP0
    103 CK0 DQ22 52 M_A_DQ22 122 NC1 VSS37 156
    [3] M_A_CLKN0 CK0# DQ23 NC2 VSS38
    102 57 M_A_DQ25 125 161
    [3] M_A_CLKP1 104 CK1 DQ24 59 NCTEST VSS39 162
    M_A_DQ24
    CHB1 1 1 [3] M_A_CLKN1
    73 CK1# DQ25 67 M_A_DQ30 R459 *10K_4 PM_EXTTS#A0 198 VSS40 167
    [3] M_A_CKE0 74 CKE0 DQ26 69 +3V 30 EVENT# VSS41 168
    M_A_DQ26 [12,14,15,16] DDR3_DRAMRST#
    [3] M_A_CKE1 CKE1 DQ27 RESET# VSS42
    115 56 M_A_DQ28 172
    [3,14] M_A_CAS# CAS# DQ28 VSS43
    110 58 M_A_DQ29 173
    [3,14] M_A_RAS# 113 RAS# DQ29 68 1 VSS44 178
    M_A_DQ31 +SMDDR_VREF_DQ0
    [3,14] M_A_WE# WE# DQ30 VREF_DQ VSS45
    R513 10K_4 DIMM0A_SA0 197 70 M_A_DQ27 +SMDDR_VREF_DIMM +SMDDR_VREF_DIMM 126 179
    R514 10K_4 DIMM0A_SA1 201 SA0 DQ31 129 M_A_DQ36 VREF_CA VSS46 184
    CGCLK_SMB 202 SA1 DQ32 131 M_A_DQ37 VSS47 185
    [14,15,16,23,27] CGCLK_SMB SCL DQ33 VSS48
    CGDAT_SMB 200 141 M_A_DQ34 2 189
    [14,15,16,23,27] CGDAT_SMB SDA DQ34 VSS1 VSS49
    143 M_A_DQ38 3 190
    116 DQ35 130 M_A_DQ32 8 VSS2 VSS50 195

    (204P)
    [3] M_A_ODT0 120 ODT0 DQ36 132 9 VSS3 VSS51 196
    M_A_DQ33
    [3] M_A_ODT1 ODT1 DQ37 VSS4 VSS52
    140 M_A_DQ35 13
    M_A_DM1 11 DQ38 142 M_A_DQ39 14 VSS5
    28 DM0 DQ39 147 M_A_DQ41 19 VSS6
    46 DM1 DQ40 149 M_A_DQ45 20 VSS7

    (204P)
    63 DM2 DQ41 157 M_A_DQ47 25 VSS8
    M_A_DM2 136 DM3 DQ42 159 M_A_DQ46 26 VSS9 203
    DM4 DQ43 VSS10 VTT1 +VTT
    153 146 M_A_DQ40 31 204
    170 DM5 DQ44 148 M_A_DQ44 32 VSS11 VTT2
    187 DM6 DQ45 158 M_A_DQ42 37 VSS12 205
    DM7 DQ46 160 M_A_DQ43 38 VSS13 GND 206
    [3,14] M_A_DQSP[7:0] DQ47 VSS14 GND
    M_A_DQSP0 12 163 M_A_DQ49 43
    M_A_DQSP1 29 DQS0 DQ48 165 M_A_DQ48 VSS15
    M_A_DQSP2 47 DQS1 DQ49 175 M_A_DQ54
    M_A_DQSP3 64 DQS2 DQ50 177 M_A_DQ55 DDR3-DIMM0_H=8_STN
    C C
    M_A_DQSP4 137 DQS3 DQ51 164 M_A_DQ53
    M_A_DQSP5 154 DQS4 DQ52 166 M_A_DQ52
    M_A_DQSP6 171 DQS5 DQ53 174 M_A_DQ50
    M_A_DQSP7 188 DQS6 DQ54 176 M_A_DQ51
    [3,14] M_A_DQSN[7:0] DQS7 DQ55
    M_A_DQSN0 10 181 M_A_DQ61
    M_A_DQSN1 27 DQS#0 DQ56 183 M_A_DQ60
    M_A_DQSN2 45 DQS#1 DQ57 191 M_A_DQ62
    M_A_DQSN3 62 DQS#2 DQ58 193 M_A_DQ63
    M_A_DQSN4 135 DQS#3 DQ59 180 M_A_DQ56
    M_A_DQSN5 152 DQS#4 DQ60 182 M_A_DQ57
    M_A_DQSN6 169 DQS#5 DQ61 192 M_A_DQ59
    M_A_DQSN7 186 DQS#6 DQ62 194 M_A_DQ58
    DQS#7 DQ63
    [2,6,7,8,9,10,14,15,16,17,18,19,20,21,22,23,25,27,29,31,35] +3V
    DDR3-DIMM0_H=8_STN
    [12,14,15,16,32] +VTT

    DDR3 VREF CA DDR SMBus Isolation DDR +3V


    Place these Caps near So-Dimm0.
    +1.35VSUS +VTT_VREF
    +VDDR_REF_CPU TO CPU SM_VREF
    +1.35VSUS +VTT
    R435 R437 R460
    4.7K_4
    B B
    C432 1U/6.3V_4X 1K/F_4 *0_4

    2
    C338 *39P/50V_4N R433 0_4 R438 2.2/F_4 +SMDDR_VREF_DIMM
    +SMDDR_VREF_DIMM [14,15,16] 6 1
    C433 1U/6.3V_4X CGDAT_SMB
    [7,23] SDATA
    C354 *39P/50V_4N C308 Q28A 2N7002KDW_115MA
    C434 1U/6.3V_4X R436 C305
    0.022U/16V_4X
    C388 4.7U/6.3V_6X 1K/F_4 0.1U/10V_4X
    C431 1U/6.3V_4X +3V R458
    4.7K_4
    C384 4.7U/6.3V_6X R439

    5
    24.9/F_4
    C399 4.7U/6.3V_6X
    +SMDDR_VREF_DIMM 3 4 CGCLK_SMB
    [7,23] SCLK
    C342 *4.7U/6.3V_6X Q28B 2N7002KDW_115MA
    C301 0.1U/10V_4X

    C367 *4.7U/6.3V_6X
    C302 *2.2U/6.3V_6X

    C358 *4.7U/6.3V_6X

    C375 0.1U/10V_4X DDR3 VREF DQ0 (M1+M3) DDR


    +SMDDR_VREF_DQ0 +1.35VSUS +VTT_VREF
    C371 0.1U/10V_4X

    C306 0.1U/10V_4X
    C349 0.1U/10V_4X R35 R36

    C307 *2.2U/6.3V_6X 1K/F_4 *0_4


    C336 0.1U/10V_4X
    [3] VREFDQ_SA_CPU VREFDQ_SA_CPU R32 0_4 R33 2.2/F_4 +SMDDR_VREF_DQ0
    +SMDDR_VREF_DQ0 [14]
    A A

    C33
    R34 C23
    +3V 0.022U/16V_4X
    1K/F_4 0.1U/10V_4X

    C472 2.2U/6.3V_6X
    R31

    C466 *0.1U/10V_4X 24.9/F_4


    Quanta Computer Inc.
    PROJECT : BDD
    Size Document Number Rev
    A1A
    System Memory A0 STD (8H)
    Date: Tuesday, February 05, 2013 Sheet 13 of 37
    5 4 3 2 1
    5 4 3 2 1

    TOP Side Close to CPU


    [3,13] M_A_A[15:0]
    M_A_A0
    M_A_A1
    M_A_A2
    M_A_A3
    98
    97
    96
    95
    JDIM2A
    A0
    A1
    A2
    DQ0
    DQ1
    DQ2
    5
    7
    15
    17
    M_A_DQ4
    M_A_DQ5
    M_A_DQ7
    M_A_DQ6
    M_A_DQ[63:0] [3,13]
    2.48A
    +1.35VSUS

    75
    76
    81
    JDIM2B
    VDD1
    VDD2
    VSS16
    VSS17
    44
    48
    49
    14
    M_A_A4 92 A3 DQ3 4 M_A_DQ1 82 VDD3 VSS18 54
    M_A_A5 91 A4 DQ4 6 M_A_DQ0 87 VDD4 VSS19 55
    M_A_A6 90 A5 DQ5 16 M_A_DQ3 88 VDD5 VSS20 60
    M_A_A7 86 A6 DQ6 18 M_A_DQ2 93 VDD6 VSS21 61
    M_A_A8 89 A7 DQ7 21 M_A_DQ9 94 VDD7 VSS22 65
    M_A_A9 85 A8 DQ8 23 M_A_DQ8 99 VDD8 VSS23 66
    M_A_A10 107 A9 DQ9 33 M_A_DQ15 100 VDD9 VSS24 71
    M_A_A11 84 A10/AP DQ10 35 M_A_DQ10 105 VDD10 VSS25 72
    A11 DQ11 VDD11 VSS26

    PC2100 DDR3 SDRAM SO-DIMM


    M_A_A12 83 22 M_A_DQ12 106 127
    D
    M_A_A13 119 A12/BC# DQ12 24 M_A_DQ13 111 VDD12 VSS27 128 D
    SA1 SA0 M_A_A14 80 A13 DQ13 34 M_A_DQ14 112 VDD13 VSS28 133
    M_A_A15 78 A14 DQ14 36 M_A_DQ11 117 VDD14 VSS29 134
    CHA0 0 0 A15 DQ15 VDD15 VSS30

    PC2100 DDR3 SDRAM SO-DIMM


    39 M_A_DQ21 118 138
    109 DQ16 41 M_A_DQ16 123 VDD16 VSS31 139
    [3,13] M_A_BS#0 BA0 DQ17 VDD17 VSS32
    108 51 M_A_DQ19 124 144
    CHA1 0 1 [3,13] M_A_BS#1 79 BA1 DQ18 53 M_A_DQ18 VDD18 VSS33 145
    [3,13] M_A_BS#2 BA2 DQ19 VSS34
    114 40 M_A_DQ20 199 150
    [3] M_A_CS#2 121 S0# DQ20 42 +3V VDDSPD VSS35 151
    M_A_DQ17
    CHB0 1 0 [3] M_A_CS#3
    101 S1# DQ21 50 M_A_DQ23 77 VSS36 155
    [3] M_A_CLKP2 CK0 DQ22 NC1 VSS37
    103 52 M_A_DQ22 122 156
    [3] M_A_CLKN2 102 CK0# DQ23 57 125 NC2 VSS38 161
    M_A_DQ25
    CHB1 1 1 [3] M_A_CLKP3
    104 CK1 DQ24 59 M_A_DQ24 NCTEST VSS39 162
    [3] M_A_CLKN3 73 CK1# DQ25 67 198 VSS40 167
    M_A_DQ30 R502 *10K_4 PM_EXTTS#A1
    [3] M_A_CKE2 CKE0 DQ26 +3V EVENT# VSS41
    74 69 M_A_DQ26 [12,13,15,16] DDR3_DRAMRST# 30 168
    [3] M_A_CKE3 CKE1 DQ27 RESET# VSS42
    115 56 M_A_DQ28 172
    [3,13] M_A_CAS# 110 CAS# DQ28 58 VSS43 173
    M_A_DQ29
    [3,13] M_A_RAS# RAS# DQ29 VSS44
    113 68 M_A_DQ31 [13] +SMDDR_VREF_DQ0 +SMDDR_VREF_DQ0 1 178
    [3,13] M_A_WE# 197 WE# DQ30 70 126 VREF_DQ VSS45 179
    R138 10K_4 DIMM0B_SA0 M_A_DQ27 +SMDDR_VREF_DIMM +SMDDR_VREF_DIMM
    +3V SA0 DQ31 VREF_CA VSS46
    R512 10K_4 DIMM0B_SA1 201 129 M_A_DQ36 184
    CGCLK_SMB 202 SA1 DQ32 131 M_A_DQ37 VSS47 185
    [13,15,16,23,27] CGCLK_SMB SCL DQ33 VSS48
    CGDAT_SMB 200 141 M_A_DQ34 2 189
    [13,15,16,23,27] CGDAT_SMB SDA DQ34 VSS1 VSS49
    143 M_A_DQ38 3 190
    116 DQ35 130 M_A_DQ32 8 VSS2 VSS50 195

    (204P)
    [3] M_A_ODT2 ODT0 DQ36 VSS3 VSS51
    120 132 M_A_DQ33 9 196
    [3] M_A_ODT3 ODT1 DQ37 VSS4 VSS52
    140 M_A_DQ35 13
    M_A_DM1 11 DQ38 142 M_A_DQ39 14 VSS5
    28 DM0 DQ39 147 M_A_DQ41 19 VSS6
    46 DM1 DQ40 149 M_A_DQ45 20 VSS7

    (204P)
    63 DM2 DQ41 157 M_A_DQ47 25 VSS8
    M_A_DM2 136 DM3 DQ42 159 M_A_DQ46 26 VSS9 203
    DM4 DQ43 VSS10 VTT1 +VTT
    153 146 M_A_DQ40 31 204
    170 DM5 DQ44 148 M_A_DQ44 32 VSS11 VTT2
    187 DM6 DQ45 158 M_A_DQ42 37 VSS12 205
    DM7 DQ46 160 M_A_DQ43 38 VSS13 GND 206
    [3,13] M_A_DQSP[7:0] DQ47 VSS14 GND
    M_A_DQSP0 12 163 M_A_DQ49 43
    M_A_DQSP1 29 DQS0 DQ48 165 M_A_DQ48 VSS15
    M_A_DQSP2 47 DQS1 DQ49 175 M_A_DQ54
    C C
    M_A_DQSP3 64 DQS2 DQ50 177 M_A_DQ55 DDR3-DIMM1_H=4_STN
    M_A_DQSP4 137 DQS3 DQ51 164 M_A_DQ53
    M_A_DQSP5 154 DQS4 DQ52 166 M_A_DQ52
    M_A_DQSP6 171 DQS5 DQ53 174 M_A_DQ50
    M_A_DQSP7 188 DQS6 DQ54 176 M_A_DQ51
    [3,13] M_A_DQSN[7:0] 10 DQS7 DQ55 181
    M_A_DQSN0 M_A_DQ61
    M_A_DQSN1 27 DQS#0 DQ56 183 M_A_DQ60
    M_A_DQSN2 45 DQS#1 DQ57 191 M_A_DQ62
    M_A_DQSN3 62 DQS#2 DQ58 193 M_A_DQ63
    M_A_DQSN4 135 DQS#3 DQ59 180 M_A_DQ56
    M_A_DQSN5 152 DQS#4 DQ60 182 M_A_DQ57
    M_A_DQSN6 169 DQS#5 DQ61 192 M_A_DQ59
    M_A_DQSN7 186 DQS#6 DQ62 194 M_A_DQ58
    DQS#7 DQ63

    DDR3-DIMM1_H=4_STN
    [2,6,7,8,9,10,13,15,16,17,18,19,20,21,22,23,25,27,29,31,35] +3V

    [12,13,15,16,32] +VTT

    [13,15,16] +SMDDR_VREF_DIMM

    Place these Caps near So-Dimm0.

    +VTT
    +1.35VSUS +SMDDR_VREF_DIMM
    B B
    C435 1U/6.3V_4X
    C32 0.1U/10V_4X

    C340 *39P/50V_4N C436 1U/6.3V_4X


    C31 *2.2U/6.3V_6X

    C382 *39P/50V_4N C437 1U/6.3V_4X

    C364 4.7U/6.3V_6X C438 1U/6.3V_4X

    +SMDDR_VREF_DQ0
    C347 4.7U/6.3V_6X

    C24 0.1U/10V_4X
    C337 4.7U/6.3V_6X

    C25 *2.2U/6.3V_6X
    C372 *4.7U/6.3V_6X

    C385 *4.7U/6.3V_6X

    C355 *4.7U/6.3V_6X +3V

    C368 0.1U/10V_4X C425 2.2U/6.3V_6X

    C351 0.1U/10V_4X C427 *0.1U/10V_4X

    C400 0.1U/10V_4X

    C390 0.1U/10V_4X
    A A

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    System Memory A1 STD (4H)
    Date: Tuesday, February 05, 2013 Sheet 14 of 37
    5 4 3 2 1
    5 4 3 2 1

    [3,16] M_B_A[15:0]
    BOT Side Far away CPU
    M_B_A0
    M_B_A1
    M_B_A2
    98
    97
    96
    JDIM3A
    A0
    A1
    DQ0
    DQ1
    5
    7
    15
    M_B_DQ5
    M_B_DQ4
    M_B_DQ3
    M_B_DQ[63:0] [3,16]
    +1.35VSUS

    75
    76
    81
    JDIM3B
    VDD1
    VDD2
    VSS16
    VSS17
    44
    48
    49
    15
    M_B_A3 95 A2 DQ2 17 M_B_DQ2 82 VDD3 VSS18 54
    M_B_A4 92 A3 DQ3 4 M_B_DQ0 87 VDD4 VSS19 55
    M_B_A5 91 A4 DQ4 6 M_B_DQ1 88 VDD5 VSS20 60
    M_B_A6 90 A5 DQ5 16 M_B_DQ6 93 VDD6 VSS21 61
    M_B_A7 86 A6 DQ6 18 M_B_DQ7 94 VDD7 VSS22 65
    M_B_A8 89 A7 DQ7 21 M_B_DQ12 99 VDD8 VSS23 66
    M_B_A9 85 A8 DQ8 23 M_B_DQ13
    2.48A 100 VDD9 VSS24 71
    D M_B_A10 107 A9 DQ9 33 M_B_DQ14 105 VDD10 VSS25 72 D
    A10/AP DQ10 VDD11 VSS26

    PC2100 DDR3 SDRAM SO-DIMM


    M_B_A11 84 35 M_B_DQ10 106 127
    M_B_A12 83 A11 DQ11 22 M_B_DQ8 111 VDD12 VSS27 128
    M_B_A13 119 A12/BC# DQ12 24 M_B_DQ9 112 VDD13 VSS28 133
    SA1 SA0 M_B_A14 80 A13 DQ13 34 M_B_DQ11 117 VDD14 VSS29 134
    M_B_A15 78 A14 DQ14 36 M_B_DQ15 118 VDD15 VSS30 138
    CHA0 0 0 A15 DQ15 VDD16 VSS31

    PC2100 DDR3 SDRAM SO-DIMM


    39 M_B_DQ20 123 139
    109 DQ16 41 M_B_DQ21 124 VDD17 VSS32 144
    [3,16] M_B_BS#0 BA0 DQ17 VDD18 VSS33
    108 51 M_B_DQ18 145
    CHA1 0 1 [3,16] M_B_BS#1
    79 BA1 DQ18 53 M_B_DQ22 199 VSS34 150
    [3,16] M_B_BS#2 BA2 DQ19 +3V VDDSPD VSS35
    114 40 M_B_DQ17 151
    [3] M_B_CS#0 S0# DQ20 VSS36
    121 42 M_B_DQ16 77 155
    CHB0 1 0 [3] M_B_CS#1
    101 S1# DQ21 50 M_B_DQ19 122 NC1 VSS37 156
    [3] M_B_CLKP0 CK0 DQ22 NC2 VSS38
    103 52 M_B_DQ23 125 161
    [3] M_B_CLKN0 CK0# DQ23 NCTEST VSS39
    102 57 M_B_DQ25 162
    CHB1 1 1 [3] M_B_CLKP1 104 CK1 DQ24 59 M_B_DQ29 R134 *10K_4 PM_EXTTS#B0 198 VSS40 167
    [3] M_B_CLKN1 CK1# DQ25 +3V EVENT# VSS41
    73 67 M_B_DQ27 [12,13,14,16] DDR3_DRAMRST# 30 168
    [3] M_B_CKE0 CKE0 DQ26 RESET# VSS42
    74 69 M_B_DQ26 172
    [3] M_B_CKE1 CKE1 DQ27 VSS43
    115 56 M_B_DQ28 173
    [3,16] M_B_CAS# CAS# DQ28 VSS44
    110 58 M_B_DQ24 +SMDDR_VREF_DQ1 1 178
    [3,16] M_B_RAS# 113 RAS# DQ29 68 126 VREF_DQ VSS45 179
    M_B_DQ31 +SMDDR_VREF_DIMM +SMDDR_VREF_DIMM
    [3,16] M_B_WE# WE# DQ30 VREF_CA VSS46
    R135 10K_4 DIMM1A_SA0 197 70 M_B_DQ30 184
    R136 10K_4 DIMM1A_SA1 201 SA0 DQ31 129 M_B_DQ36 VSS47 185
    +3V SA1 DQ32 VSS48
    CGCLK_SMB 202 131 M_B_DQ37 2 189
    [13,14,16,23,27] CGCLK_SMB SCL DQ33 VSS1 VSS49
    CGDAT_SMB 200 141 M_B_DQ35 3 190
    [13,14,16,23,27] CGDAT_SMB SDA DQ34 VSS2 VSS50
    143 M_B_DQ34 8 195

    (204P)
    116 DQ35 130 M_B_DQ33 9 VSS3 VSS51 196
    [3] M_B_ODT0 ODT0 DQ36 VSS4 VSS52
    [3] M_B_ODT1 120 132 M_B_DQ32 13
    ODT1 DQ37 140 M_B_DQ39 14 VSS5
    M_B_DM1 11 DQ38 142 M_B_DQ38 19 VSS6
    28 DM0 DQ39 147 M_B_DQ44 20 VSS7
    46 DM1 DQ40 149 M_B_DQ40 25 VSS8

    (204P)
    63 DM2 DQ41 157 M_B_DQ42 26 VSS9 203
    C DM3 DQ42 VSS10 VTT1 +VTT C
    M_B_DM2 136 159 M_B_DQ43 31 204
    153 DM4 DQ43 146 M_B_DQ45 32 VSS11 VTT2
    170 DM5 DQ44 148 M_B_DQ41 37 VSS12 205
    187 DM6 DQ45 158 M_B_DQ46 38 VSS13 GND 206
    DM7 DQ46 160 M_B_DQ47 43 VSS14 GND
    [3,16] M_B_DQSP[7:0] DQ47 VSS15
    M_B_DQSP0 12 163 M_B_DQ49
    M_B_DQSP1 29 DQS0 DQ48 165 M_B_DQ48
    M_B_DQSP2 47 DQS1 DQ49 175 M_B_DQ54
    M_B_DQSP3 64 DQS2 DQ50 177 M_B_DQ55
    M_B_DQSP4 137 DQS3 DQ51 164 M_B_DQ52
    M_B_DQSP5 154 DQS4 DQ52 166 M_B_DQ53
    M_B_DQSP6 171 DQS5 DQ53 174 M_B_DQ50
    M_B_DQSP7 188 DQS6 DQ54 176 M_B_DQ51
    [3,16] M_B_DQSN[7:0] DQS7 DQ55
    M_B_DQSN0 10 181 M_B_DQ61
    M_B_DQSN1 27 DQS#0 DQ56 183 M_B_DQ56
    M_B_DQSN2 45 DQS#1 DQ57 191 M_B_DQ62
    M_B_DQSN3 62 DQS#2 DQ58 193 M_B_DQ63
    M_B_DQSN4 135 DQS#3 DQ59 180 M_B_DQ57
    M_B_DQSN5 152 DQS#4 DQ60 182 M_B_DQ60
    M_B_DQSN6 169 DQS#5 DQ61 192 M_B_DQ59 [2,6,7,8,9,10,13,14,16,17,18,19,20,21,22,23,25,27,29,31,35] +3V
    M_B_DQSN7 186 DQS#6 DQ62 194 M_B_DQ58
    DQS#7 DQ63
    [12,13,14,16,32] +VTT
    DDR3-DIMM1_H=4_STN DDR3-DIMM1_H=4_STN
    [13,14,16] +SMDDR_VREF_DIMM

    B B

    Place these Caps near So-Dimm1. DDR3 VREF DQ1 (M1+M3) DDR

    +1.35VSUS +VTT +SMDDR_VREF_DQ1

    +1.35VSUS +VTT_VREF
    C467 1U/6.3V_4X C310 0.1U/10V_4X
    C352 4.7U/6.3V_6X

    C468 1U/6.3V_4X C312 *2.2U/6.3V_6X R445 R444


    C386 4.7U/6.3V_6X
    1K/F_4 *0_4
    C470 1U/6.3V_4X
    C391 4.7U/6.3V_6X [3] VREFDQ_SB_CPU VREFDQ_SB_CPU R447 0_4 R446 2.2/F_4 +SMDDR_VREF_DQ1 +SMDDR_VREF_DQ1 [16]
    C469 1U/6.3V_4X
    C343 *4.7U/6.3V_6X C311
    R449 C315
    0.022U/16V_4X
    C365 *4.7U/6.3V_6X 1K/F_4 0.1U/10V_4X

    +SMDDR_VREF_DIMM +3V
    C373 *4.7U/6.3V_6X R448

    C304 0.1U/10V_4X C424 2.2U/6.3V_6X 24.9/F_4


    C356 0.1U/10V_4X

    C303 *2.2U/6.3V_6X C428 *0.1U/10V_4X


    C381 0.1U/10V_4X
    A A

    C369 0.1U/10V_4X

    C350 0.1U/10V_4X

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    System Memory B0 STD (4H)
    Date: Tuesday, February 05, 2013 Sheet 15 of 37
    5 4 3 2 1
    [3,15] M_B_A[15:0]
    TOP Side Far away CPU
    M_B_A0
    M_B_A1
    M_B_A2
    98
    97
    96
    JDIM1A
    A0
    A1
    DQ0
    DQ1
    5
    7
    15
    M_B_DQ5
    M_B_DQ4
    M_B_DQ3
    M_B_DQ[63:0] [3,15]
    +1.35VSUS

    75
    76
    81
    JDIM1B
    VDD1
    VDD2
    VSS16
    VSS17
    44
    48
    49
    16
    M_B_A3 95 A2 DQ2 17 M_B_DQ2 82 VDD3 VSS18 54
    M_B_A4 92 A3 DQ3 4 M_B_DQ0 87 VDD4 VSS19 55
    M_B_A5 91 A4 DQ4 6 M_B_DQ1 88 VDD5 VSS20 60
    M_B_A6 90 A5 DQ5 16 M_B_DQ6 93 VDD6 VSS21 61
    M_B_A7 86 A6 DQ6 18 M_B_DQ7 94 VDD7 VSS22 65
    M_B_A8 89 A7 DQ7 21 M_B_DQ12 99 VDD8 VSS23 66
    M_B_A9 85 A8 DQ8 23 M_B_DQ13
    2.48A 100 VDD9 VSS24 71
    M_B_A10 107 A9 DQ9 33 M_B_DQ14 105 VDD10 VSS25 72
    A10/AP DQ10 VDD11 VSS26

    PC2100 DDR3 SDRAM SO-DIMM


    M_B_A11 84 35 M_B_DQ10 106 127
    M_B_A12 83 A11 DQ11 22 M_B_DQ8 111 VDD12 VSS27 128
    M_B_A13 119 A12/BC# DQ12 24 M_B_DQ9 112 VDD13 VSS28 133
    SA1 SA0 M_B_A14 80 A13 DQ13 34 M_B_DQ11 117 VDD14 VSS29 134
    M_B_A15 78 A14 DQ14 36 M_B_DQ15 118 VDD15 VSS30 138
    CHA0 0 0 A15 DQ15 VDD16 VSS31

    PC2100 DDR3 SDRAM SO-DIMM


    39 M_B_DQ20 123 139
    109 DQ16 41 M_B_DQ21 124 VDD17 VSS32 144
    [3,15] M_B_BS#0 BA0 DQ17 VDD18 VSS33
    108 51 M_B_DQ18 145
    CHA1 0 1 [3,15] M_B_BS#1
    79 BA1 DQ18 53 M_B_DQ22 199 VSS34 150
    [3,15] M_B_BS#2 BA2 DQ19 +3V VDDSPD VSS35
    114 40 M_B_DQ17 151
    [3] M_B_CS#2 S0# DQ20 VSS36
    121 42 M_B_DQ16 77 155
    CHB0 1 0 [3] M_B_CS#3
    101 S1# DQ21 50 M_B_DQ19 122 NC1 VSS37 156
    [3] M_B_CLKP2 CK0 DQ22 NC2 VSS38
    103 52 M_B_DQ23 125 161
    [3] M_B_CLKN2 CK0# DQ23 NCTEST VSS39
    102 57 M_B_DQ25 162
    CHB1 1 1 [3] M_B_CLKP3 104 CK1 DQ24 59 M_B_DQ29 R137 *10K_4 PM_EXTTS#B1 198 VSS40 167
    [3] M_B_CLKN3 CK1# DQ25 +3V EVENT# VSS41
    73 67 M_B_DQ27 [12,13,14,15] DDR3_DRAMRST# DDR3_DRAMRST# 30 168
    [3] M_B_CKE2 CKE0 DQ26 RESET# VSS42
    74 69 M_B_DQ26 172
    [3] M_B_CKE3 CKE1 DQ27 VSS43
    115 56 M_B_DQ28 173
    [3,15] M_B_CAS# CAS# DQ28 VSS44
    110 58 M_B_DQ24 +SMDDR_VREF_DQ1 1 178
    [3,15] M_B_RAS# RAS# DQ29 [15] +SMDDR_VREF_DQ1 VREF_DQ VSS45
    113 68 M_B_DQ31 +SMDDR_VREF_DIMM 126 179
    [3,15] M_B_WE# WE# DQ30 +SMDDR_VREF_DIMM VREF_CA VSS46
    R132 10K_4 DIMM1B_SA0 197 70 M_B_DQ30 184
    R133 10K_4 DIMM1B_SA1 201 SA0 DQ31 129 M_B_DQ36 VSS47 185
    +3V SA1 DQ32 VSS48
    CGCLK_SMB 202 131 M_B_DQ37 2 189
    [13,14,15,23,27] CGCLK_SMB SCL DQ33 VSS1 VSS49
    CGDAT_SMB 200 141 M_B_DQ35 3 190
    [13,14,15,23,27] CGDAT_SMB SDA DQ34 VSS2 VSS50
    143 M_B_DQ34 8 195

    (204P)
    116 DQ35 130 M_B_DQ33 9 VSS3 VSS51 196
    [3] M_B_ODT2 ODT0 DQ36 VSS4 VSS52
    [3] M_B_ODT3 120 132 M_B_DQ32 13
    ODT1 DQ37 140 M_B_DQ39 14 VSS5
    M_B_DM1 11 DQ38 142 M_B_DQ38 19 VSS6
    28 DM0 DQ39 147 M_B_DQ44 20 VSS7
    46 DM1 DQ40 149 M_B_DQ40 25 VSS8

    (204P)
    63 DM2 DQ41 157 M_B_DQ42 26 VSS9 203
    DM3 DQ42 VSS10 VTT1 +VTT
    M_B_DM2 136 159 M_B_DQ43 31 204
    153 DM4 DQ43 146 M_B_DQ45 32 VSS11 VTT2
    170 DM5 DQ44 148 M_B_DQ41 37 VSS12 205
    187 DM6 DQ45 158 M_B_DQ46 38 VSS13 GND 206
    DM7 DQ46 160 M_B_DQ47 43 VSS14 GND
    [3,15] M_B_DQSP[7:0] DQ47 VSS15
    M_B_DQSP0 12 163 M_B_DQ49
    M_B_DQSP1 29 DQS0 DQ48 165 M_B_DQ48
    DQS1 DQ49
    NC for fixing DDR3 DIMMB-RVS type -4H
    M_B_DQSP2 47 175 M_B_DQ54 DDR3-DIMM3_H=4_RUV footprint Issue
    M_B_DQSP3 64 DQS2 DQ50 177 M_B_DQ55
    M_B_DQSP4 137 DQS3 DQ51 164 M_B_DQ52
    M_B_DQSP5 154 DQS4 DQ52 166 M_B_DQ53
    M_B_DQSP6 171 DQS5 DQ53 174 M_B_DQ50
    M_B_DQSP7 188 DQS6 DQ54 176 M_B_DQ51
    [3,15] M_B_DQSN[7:0] DQS7 DQ55
    M_B_DQSN0 10 181 M_B_DQ61
    M_B_DQSN1 27 DQS#0 DQ56 183 M_B_DQ56
    M_B_DQSN2 45 DQS#1 DQ57 191 M_B_DQ62
    M_B_DQSN3 62 DQS#2 DQ58 193 M_B_DQ63
    M_B_DQSN4 135 DQS#3 DQ59 180 M_B_DQ57
    M_B_DQSN5 152 DQS#4 DQ60 182 M_B_DQ60
    M_B_DQSN6 169 DQS#5 DQ61 192 M_B_DQ59 [2,6,7,8,9,10,13,14,15,17,18,19,20,21,22,23,25,27,29,31,35] +3V
    M_B_DQSN7 186 DQS#6 DQ62 194 M_B_DQ58
    DQS#7 DQ63
    [12,13,14,15,32] +VTT
    DDR3-DIMM3_H=4_RUV
    [13,14,15] +SMDDR_VREF_DIMM

    Place these Caps near So-Dimm1.


    +1.35VSUS +VTT +SMDDR_VREF_DQ1

    C106 1U/6.3V_4X C314 0.1U/10V_4X


    C353 4.7U/6.3V_6X

    C104 1U/6.3V_4X C313 *2.2U/6.3V_6X


    C344 4.7U/6.3V_6X

    C103 1U/6.3V_4X
    C374 4.7U/6.3V_6X

    C105 1U/6.3V_4X
    C366 *4.7U/6.3V_6X

    C387 *4.7U/6.3V_6X

    +SMDDR_VREF_DIMM +3V
    C392 *4.7U/6.3V_6X

    C29 0.1U/10V_4X C101 2.2U/6.3V_6X


    C383 0.1U/10V_4X

    C30 *2.2U/6.3V_6X C102 *0.1U/10V_4X


    C348 0.1U/10V_4X

    C357 0.1U/10V_4X

    C370 0.1U/10V_4X

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    System Memory B1 RVS (4H)
    Date: Tuesday, February 05, 2013 Sheet 16 of 37
    MXM 3.0
    N14E-GS GPU +VIN power (5A)
    REV-B2A Change Footprint to mxm-106322be75c-314p 17
    PWR_SRC(10A)--7-20V VIN VIN
    JP1A
    5VS(2.5A)--5V E1-1 E2-1
    JP1B
    E1-2 PWR_SRC PWR_SRC E2-2 153 154 CLK_PEGA_REQ#_R
    3VS(2A)--3V E1-3 PWR_SRC PWR_SRC E2-3 C606 C592
    [8] CLK_PCIE_VGAN
    155 PEX_REFCLK# CLK_REQ# 156 GPU_RST#
    PWR_SRC PWR_SRC [8] CLK_PCIE_VGAP PEX_REFCLK PEX_RST#
    E1-4 E2-4 157 158
    E1-5 PWR_SRC PWR_SRC E2-5 159 GND VGA_DDC_DAT 160 EV_CRTDDAT [20]
    10U/25V_8X 10U/25V_8X
    PWR_SRC PWR_SRC JTAG_TDO VGA_DDC_CLK EV_CRTDCLK [20]
    E1-6 E2-6 161 162
    +5V PWR_SRC PWR_SRC JTAG_TDI VGA_VSYNC EXT_VSYNC [20]
    E1-7 E2-7 163 164
    PWR_SRC PWR_SRC JTAG_TCLK VGA_HSYNC EXT_HSYNC [20]
    E1-8 E2-8 165 166
    E1-9 PWR_SRC PWR_SRC E2-9 167 JTAG_TMS GND 168
    PWR_SRC PWR_SRC CLOSE TO MXM PIN E2 JTAG_TRST# VGA_RED EXT_CRT_RED [20]
    E1-10 E2-10 169 170
    PWR_SRC PWR_SRC [22] EV_TXUCLKOUT- LVDS_UCLK# VGA_GREEN EXT_CRT_GRN [20]
    C576 E3-1 E4-1 171 172
    GND GND [22] EV_TXUCLKOUT+ LVDS_UCLK VGA_BLUE EXT_CRT_BLU [20]
    *10U/6.3V_6X E3-2 E4-2 173 174
    E3-3 GND GND E4-3 175 GND GND 176
    GND GND LVDS_UTX3# LVDS_LCLK# EV_TXLCLKOUT- [22]
    E3-4 E4-4 177 178
    E3-5 GND GND E4-5 179 LVDS_UTX3 LVDS_LCLK 180 EV_TXLCLKOUT+ [22]
    E3-6 GND GND E4-6 181 GND GND 182
    GND GND [22] EV_TXUOUT2- LVDS_UTX2# LVDS_LTX3#
    E3-7 E4-7 183 184
    +5V GND GND [22] EV_TXUOUT2+ LVDS_UTX2 LVDS_LTX3
    E3-8 E4-8 R361 For NC.20121012 185 186
    E3-9 GND GND E4-9 187 GND GND 188
    GPU +5V power (2.5A) E3-10 GND GND E4-10 [22] EV_TXUOUT1- 189 LVDS_UTX1# LVDS_LTX2# 190 EV_TXLOUT2- [22]

    MXM 3.0 MODULE BOARD CONNECTOR


    GND GND [22] EV_TXUOUT1+ LVDS_UTX1 LVDS_LTX2 EV_TXLOUT2+ [22]
    1 2 R698 *10K_4 191 192
    5V PRSNT_R# +3V GND GND
    3 4 193 194

    MXM 3.0 MODULE BOARD CONNECTOR


    5V WAKE# [22] EV_TXUOUT0- LVDS_UTX0# LVDS_LTX1# EV_TXLOUT1- [22]
    Low swing Unstuff 5 6 195 196
    5V PWR_GOOD DGPU_PWROK [9,29] [22] EV_TXUOUT0+ LVDS_UTX0 LVDS_LTX1 EV_TXLOUT1+ [22]
    7 8 DGPU_PWR_EN 197 198
    PEX_STD_SW# 5V PWR_EN GND GND
    9 10 199 200
    5V 27MMHZ_REF [20] EXT_HDMITX2N DP_C_L0# LVDS_LTX0# EV_TXLOUT0- [22]
    High swing Stuff 11 12 NV PWR EN:High Active 201 202
    GND GND [20] EXT_HDMITX2P DP_C_L0 LVDS_LTX0 EV_TXLOUT0+ [22]
    13 14 203 204
    15 GND LVDS_U_HPD 16 205 GND GND 206
    GND JTAG_TESTEN [20] EXT_HDMITX1N DP_C_L1# DP_D_L0# EV_EDP_TXN0 [22]
    17 18 AC/BATL#_R 207 208
    19 GND PWR_LEVEL 20 [20] EXT_HDMITX1P 209 DP_C_L1 DP_D_L0 210 EV_EDP_TXP0 [22]
    0_4 R654 PEX_STD_SW#1 TH_OVERT# R693 *2.2K_4
    PEX_STD_SW# TH_OVERT# +3V_GPU GND GND
    PIV@0_4 R652 21 22 TH_ALERT# R691 *2.2K_4 211 212
    VGA_DISABLE# TH_ALERT# [20] EXT_HDMITX0N DP_C_L2# DP_D_L1# EV_EDP_TXN1 [22]
    23 24 213 214
    [22] EV_LVDS_DIGON PNL_PWR_EN TH_PWM [20] EXT_HDMITX0P DP_C_L2 DP_D_L1 EV_EDP_TXP1 [22]
    25 26 215 216
    [22] EV_LVDS_BLON PNL_BL_EN GPIO0 GND GND
    27 28 +3V=>+3V_GPU.20121016 217 218
    [22] EV_LVDS_PWM PNL_BL_PWM GPIO1 [20] EXT_HDMICLK- DP_C_L3# DP_D_L2# EV_EDP_TXN2 [22]
    *10K_4 R651 29 30 219 220
    HDMI_CEC GPIO2 [20] EXT_HDMICLK+ DP_C_L3 DP_D_L2 EV_EDP_TXP2 [22]
    31 32 GPU_SMBDAT 221 222
    33 DVI_HPD SMB_DAT 34 GPU_SMBCLK 223 GND GND 224
    [22] EV_LVDS_DDCDAT LVDS_DDC_DAT SMB_CLK [20] EV_HDMI_DDCDAT DP_C_AUX# DP_D_L3# EV_EDP_TXN3 [22]
    35 36 225 226
    [22] EV_LVDS_DDCCLK LVDS_DDC_CLK GND [20] EV_HDMI_DDCCLK DP_C_AUX DP_D_L3 EV_EDP_TXP3 [22]
    37 38 Add MXM_FRAME_LOCK.20121012 227 228
    39 GND OEM 40 229 RSVD GND 230
    Add 0ohm/nc for MXM_3D_STEREO.20121012 OEM OEM RSVD DP_D_AUX# EV_EDP_AUXN [22]
    41 42 MXM_FB_CLAMP_TGL_REQ_R 231 232
    OEM OEM RSVD DP_D_AUX EV_EDP_AUXP [22]
    MXM_FB_CLAMP_GPU_R 43 44 MXM_FRAME_LOCK_R 233 234
    OEM OEM TP42 RSVD DP_C_HPD EXT_HDMI_HPD [20]
    TP43 MXM_3D_STEREO_R 45 46 235 236
    OEM GND RSVD DP_D_HPD EXT_EDP_HPD [22]
    47 48 PEG_TXN15_C C255 0.22U/10V_4X PEG_TXN15 237 238
    49 GND PEX_TX15# 50 PEG_TXN15 [2] 239 RSVD RSVD 240
    PEG_RXN15 0.22U/10V_4X C562 PEG_RXN15_C PEG_TXP15_C C251 0.22U/10V_4X PEG_TXP15
    [2] PEG_RXN15 PEX_RX15# PEX_TX15 PEG_TXP15 [2] RSVD 3V3 +3V
    PEG_RXP15 0.22U/10V_4X C561 PEG_RXP15_C 51 52 241 242
    [2] PEG_RXP15 PEX_RX15 GND RSVD 3V3
    53 54 PEG_TXN14_C C250 0.22U/10V_4X PEG_TXN14 243 244
    GND PEX_TX14# PEG_TXN14 [2] RSVD GND
    PEG_RXN14 0.22U/10V_4X C560 PEG_RXN14_C 55 56 PEG_TXP14_C C249 0.22U/10V_4X PEG_TXP14 245 246
    [2] PEG_RXN14 PEX_RX14# PEX_TX14 PEG_TXP14 [2] RSVD DP_B_L0#
    PEG_RXP14 0.22U/10V_4X C558 PEG_RXP14_C 57 58 247 248
    [2] PEG_RXP14 PEX_RX14 GND RSVD DP_B_L0
    59 60 PEG_TXN13_C C248 0.22U/10V_4X PEG_TXN13 249 250
    GND PEX_TX13# PEG_TXN13 [2] RSVD GND
    PEG_RXN13 0.22U/10V_4X C557 PEG_RXN13_C 61 62 PEG_TXP13_C C245 0.22U/10V_4X PEG_TXP13 251 252
    [2] PEG_RXN13 PEX_RX13# PEX_TX13 PEG_TXP13 [2] GND DP_B_L1#
    PEG_RXP13 0.22U/10V_4X C556 PEG_RXP13_C 63 64 253 254
    [2] PEG_RXP13 PEX_RX13 GND DP_A_L0# DP_B_L1
    65 66 PEG_TXN12_C C244 0.22U/10V_4X PEG_TXN12 255 256
    [2] PEG_RXN12 PEG_RXN12 0.22U/10V_4X C555 PEG_RXN12_C 67 GND PEX_TX12# 68 PEG_TXP12_C C242 0.22U/10V_4X PEG_TXP12
    PEG_TXN12 [2]
    PEG_TXP12 [2]
    257 DP_A_L0 GND 258 GPU +3V power (2A)
    PEG_RXP12 0.22U/10V_4X C551 PEG_RXP12_C 69 PEX_RX12# PEX_TX12 70 259 GND DP_B_L2# 260
    [2] PEG_RXP12 PEX_RX12 GND DP_A_L1# DP_B_L2
    71 72 PEG_TXN11_C C241 0.22U/10V_4X PEG_TXN11 261 262
    GND PEX_TX11# PEG_TXN11 [2] DP_A_L1 GND
    PEG_RXN11 0.22U/10V_4X C550 PEG_RXN11_C 73 74 PEG_TXP11_C C238 0.22U/10V_4X PEG_TXP11 263 264
    [2] PEG_RXN11 PEX_RX11# PEX_TX11 PEG_TXP11 [2] GND DP_B_L3#
    PEG_RXP11 0.22U/10V_4X C548 PEG_RXP11_C 75 76 265 266
    [2] PEG_RXP11 PEX_RX11 GND DP_A_L2# DP_B_L3
    77 78 PEG_TXN10_C C237 0.22U/10V_4X PEG_TXN10 267 268
    GND PEX_TX10# PEG_TXN10 [2] DP_A_L2 GND
    PEG_RXN10 0.22U/10V_4X C547 PEG_RXN10_C 79 80 PEG_TXP10_C C236 0.22U/10V_4X PEG_TXP10 269 270
    [2] PEG_RXN10 PEX_RX10# PEX_TX10 PEG_TXP10 [2] GND DP_B_AUX#
    PEG_RXP10 0.22U/10V_4X C546 PEG_RXP10_C 81 82 271 272
    [2] PEG_RXP10 PEX_RX10 GND DP_A_L3# DP_B_AUX
    83 84 PEG_TXN9_C C234 0.22U/10V_4X PEG_TXN9 PEG_TXN9 [2] 273 274
    PEG_RXN9 0.22U/10V_4X C545 PEG_RXN9_C 85 GND PEX_TX9# 86 PEG_TXP9_C C230 0.22U/10V_4X PEG_TXP9 275 DP_A_L3 DP_B_HPD 276
    [2] PEG_RXN9 PEX_RX9# PEX_TX9 PEG_TXP9 [2] GND DP_A_HPD
    PEG_RXP9 0.22U/10V_4X C543 PEG_RXP9_C 87 88 277 278
    [2] PEG_RXP9 PEX_RX9 GND DP_A_AUX# 3V3 +3V
    89 90 PEG_TXN8_C C228 0.22U/10V_4X PEG_TXN8 PEG_TXN8 [2] 279 280
    PEG_RXN8 0.22U/10V_4X C542 PEG_RXN8_C 91 GND PEX_TX8# 92 PEG_TXP8_C C224 0.22U/10V_4X PEG_TXP8 281 DP_A_AUX 3V3
    [2] PEG_RXN8 PEX_RX8# PEX_TX8 PEG_TXP8 [2] PRSNT_L#
    PEG_RXP8 0.22U/10V_4X C541 PEG_RXP8_C 93 94 C121
    [2] PEG_RXP8 PEX_RX8 GND
    95 96 PEG_TXN7_C C211 0.22U/10V_4X PEG_TXN7 PEG_TXN7 [2] *4.7U/6.3V_6X
    PEG_RXN7 0.22U/10V_4X C540 PEG_RXN7_C 97 GND PEX_TX7# 98 PEG_TXP7_C C220 0.22U/10V_4X PEG_TXP7 106322BE75C
    [2] PEG_RXN7 PEX_RX7# PEX_TX7 PEG_TXP7 [2]
    PEG_RXP7 0.22U/10V_4X C538 PEG_RXP7_C 99 100
    [2] PEG_RXP7 PEX_RX7 GND
    101 102 PEG_TXN6_C C204 0.22U/10V_4X PEG_TXN6 PEG_TXN6 [2]
    PEG_RXN6 0.22U/10V_4X C537 PEG_RXN6_C 103 GND PEX_TX6# 104 PEG_TXP6_C C209 0.22U/10V_4X PEG_TXP6
    [2] PEG_RXN6 PEX_RX6# PEX_TX6 PEG_TXP6 [2]
    PEG_RXP6 0.22U/10V_4X C536 PEG_RXP6_C 105 106
    [2] PEG_RXP6
    PEG_RXN5 0.22U/10V_4X C535 PEG_RXN5_C
    107
    109
    PEX_RX6
    GND
    GND
    PEX_TX5#
    108
    110
    PEG_TXN5_C
    PEG_TXP5_C
    C195
    C203
    0.22U/10V_4X
    0.22U/10V_4X
    PEG_TXN5
    PEG_TXP5
    PEG_TXN5 [2]
    +3V=>+3V_GPU.20121016
    SMBUS power plane isolate
    +3V=>+3V_GPU.20121016
    [2] PEG_RXN5 PEX_RX5# PEX_TX5 PEG_TXP5 [2]
    PEG_RXP5 0.22U/10V_4X C534 PEG_RXP5_C 111 112
    [2] PEG_RXP5 PEX_RX5 GND +3V_GPU
    113 114 PEG_TXN4_C C192 0.22U/10V_4X PEG_TXN4 PEG_TXN4 [2]
    PEG_RXN4 0.22U/10V_4X C533 PEG_RXN4_C 115 GND PEX_TX4# 116 PEG_TXP4_C C187 0.22U/10V_4X PEG_TXP4 +3V_GPU +3V_GPU
    [2] PEG_RXN4 PEX_RX4# PEX_TX4 PEG_TXP4 [2]
    PEG_RXP4 0.22U/10V_4X C530 PEG_RXP4_C 117 118
    [2] PEG_RXP4 PEX_RX4 GND
    119 120 PEG_TXN3_C C182 0.22U/10V_4X PEG_TXN3 PEG_TXN3 [2]
    PEG_RXN3 0.22U/10V_4X C529 PEG_RXN3_C 121 GND PEX_TX3# 122 PEG_TXP3_C C179 0.22U/10V_4X PEG_TXP3
    [2] PEG_RXN3 PEX_RX3# PEX_TX3 PEG_TXP3 [2]
    PEG_RXP3 0.22U/10V_4X C528 PEG_RXP3_C 123 124
    [2] PEG_RXP3 PEX_RX3 GND
    125 134
    133 GND GND 136 PEG_TXN2_C C177 0.22U/10V_4X PEG_TXN2
    GND PEX_TX2# PEG_TXN2 [2]
    PEG_RXN2 0.22U/10V_4X C527 PEG_RXN2_C 135 138 PEG_TXP2_C C171 0.22U/10V_4X PEG_TXP2 PEG_TXP2 [2] R690 R671 R700
    [2] PEG_RXN2 PEX_RX2# PEX_TX2
    PEG_RXP2 0.22U/10V_4X C526 PEG_RXP2_C 137 140 10K/F_4 10K/F_4 10K/F_4
    [2] PEG_RXP2 PEX_RX2 GND
    139 142 PEG_TXN1_C C169 0.22U/10V_4X PEG_TXN1 PEG_TXN1 [2]
    GND PEX_TX1#

    2
    PEG_RXN1 0.22U/10V_4X C524 PEG_RXN1_C 141 144 PEG_TXP1_C C166 0.22U/10V_4X PEG_TXP1 PEG_TXP1 [2]
    [2] PEG_RXN1 PEX_RX1# PEX_TX1
    PEG_RXP1 0.22U/10V_4X C522 PEG_RXP1_C 143 146
    [2] PEG_RXP1 PEX_RX1 GND

    5
    145 148 PEG_TXN0_C C161 0.22U/10V_4X PEG_TXN0 PEG_TXN0 [2] 3 1 AC/BATL#_R
    PEG_RXN0 0.22U/10V_4X C521 PEG_RXN0_C 147 GND PEX_TX0# 150 PEG_TXP0_C C158 0.22U/10V_4X PEG_TXP0 [29] AC/BATL#
    [2] PEG_RXN0 PEX_RX0# PEX_TX0 PEG_TXP0 [2]
    PEG_RXP0 0.22U/10V_4X C519 PEG_RXP0_C 149 152 6 1 GPU_SMBCLK 3 4 GPU_SMBDAT Q54 ME2N7002E_200MA
    [2] PEG_RXP0 PEX_RX0 GND [26,29] 3ND_MBCLK [26,29] 3ND_MBDATA
    151
    GND Q51A 2N7002KDW_115MA Q51B 2N7002KDW_115MA
    106322BE75C
    within 500mils R697 *0_6
    +3V_GPU +3V_GPU
    OPTIMUS POWER PCH control pin within 500mils
    DGPU_PWROK GPIO17
    DGPU_HOLD_RST# GPIO50
    DGPU_PWR_EN# GPIO54 GPU_RST# R653 R625
    *10K/F_4 *10K/F_4
    2

    2
    3 1 TH_OVERT# 3 1 MXM_FB_CLAMP_GPU_R 3 1 MXM_FB_CLAMP_TGL_REQ_R
    [2,31] SYS_SHDN# [29] MXM_FB_CLAMP_GPU [29] MXM_FB_CLAMP_TGL_REQ
    Q53 *ME2N7002E_200MA Q50 *ME2N7002E_200MA Q49 ME2N7002E_200MA

    R639 0_4 R619 *0_4


    +3V_GPU
    VGA Power Enable Reverse
    (Intel --> Low Active) Platform Reset
    +3V +3V_GPU
    +3V PEG (CLK_REQ) CLK_PEGA_REQ# [8]

    R577 R580

    3
    +3V R692 *0_6 10K_4 4.7K_4
    R695
    PIV@1K_4 CLKREQ_C1 2 Q45
    C152 [email protected]/10V_4X LTC044EUBFS8TL_30MA
    1 3
    [29] GFX_MAINON R694 OEV@0_4 DGPU_PWR_EN

    1
    Q55 ME2347_2.6A
    2
    5

    U11 R701 10K_4 R696 R579 *0_4 DGPU_PWROK


    +5V
    3

    2 100K_4
    [6] DGPU_HOLD_RST#
    3

    3
    4 GPU_RST#
    1
    [6] VGA_PLTRST#
    2 CLK_PEGA_REQ#_R 2
    [6] DGPU_PWR_EN#
    PIV@TC7SH08FU(F) DGPU_PWR_EN R703 0_4 DGPU_PWR_EN_Q 2
    3

    Q56
    PIV@ME2N7002E_200MA Q57 Q44 Quanta Computer Inc.

    1
    C584 ME2N7002E_200MA LTC044EUBFS8TL_30MA
    1

    PROJECT : BDD
    1

    *0.1U/10V_4X
    Size Document Number Rev
    A1A
    MXM CONN
    Date: Tuesday, February 05, 2013 Sheet 17 of 37
    5 4 3 2 1

    HDD Interface <H1D> <H2D> [Connector Checked]


    2nd HDD SATA Re-driver
    Layout Note:
    +3V_HDD2
    Closed to IC +3V_HDD2

    R37 H2D@0_4
    +3V
    18
    C37
    C20 C36 C19 C35
    H2D@10U/25V_8X [email protected]/25V_4X [email protected]/25V_4X
    CN15
    [email protected]/25V_4X [email protected]/25V_4X
    CN25
    SATA4 23
    23 GND
    GND 1
    1 GND1 2 SATA_TXP_2ND_HDD_C C320 H2D@4700P/25V_4X SATA_TXP_2ND_HDD_C_RD +3V_HDD2
    D GND1 2 SATA_TXP_1ST_HDD_C C210 [email protected]/25V_4X RXP 3 SATA_TXN_2ND_HDD#_C C322 H2D@4700P/25V_4X SATA_TXN_2ND_HDD#_C_RD D
    RXP SATA_TXP_1ST_HDD [7] RXN
    3 SATA_TXN_1ST_HDD#_C C219 [email protected]/25V_4X SATA_TXN_1ST_HDD# [7] 4 +3V_HDD2
    RXN 4 GND2 5 SATA_RXN_2ND_HDD#_C C324 H2D@4700P/25V_4X SATA_RXN_2ND_HDD#_C_RD
    GND2 5 SATA_RXN_1ST_HDD#_C C231 [email protected]/25V_4X TXN 6 SATA_RXP_2ND_HDD_C C325 H2D@4700P/25V_4X SATA_RXP_2ND_HDD_C_RD
    TXN SATA_RXN_1ST_HDD# [7] TXP
    6 SATA_RXP_1ST_HDD_C C235 [email protected]/25V_4X 7 R18
    TXP SATA_RXP_1ST_HDD [7] GND3
    7
    GND3 H2D@0_4

    10
    20

    16
    6
    8 U2
    8 3.3V 9
    Connect to PCH side of SATA 7

    VDD
    VDD

    NC
    NC
    3.3V 9 3.3V 10 EN
    3.3V 10 3.3V 11 C27 H2D@4700P/25V_4X SATA_TXP_2ND_HDD_IC 1 15 SATA_TXP_2ND_HDD_C_RD
    3.3V GND [7] SATA_TXP_2ND_HDD AI+ AO+
    11 12 C26 H2D@4700P/25V_4X SATA_TXN_2ND_HDD#_IC 2 14 SATA_TXN_2ND_HDD#_C_RD
    GND GND [7] SATA_TXN_2ND_HDD# AI- AO-
    12 13
    GND 13 GND 14 +5V_HDD2 R481 H2D@0_8
    GND 5V +5V HOST DEVICE
    14 +5V_HDD1 R370 H1D@0_8 +5V 15 [7] SATA_RXN_2ND_HDD# C22 H2D@4700P/25V_4X SATA_RXN_2ND_HDD#_IC 4 12 SATA_RXN_2ND_HDD#_C_RD
    5V 15 5V 16 C21 H2D@4700P/25V_4X SATA_RXP_2ND_HDD_IC 5 BO- BI- 11 SATA_RXP_2ND_HDD_C_RD
    [7] SATA_RXP_2ND_HDD

    TDet_EN
    5V 5V BO+ BI+

    TDet_B#
    TDet_A#
    16 17 C333 C334 + C332

    G_PAD
    5V GND

    B_EM
    A_EM

    A_EQ
    B_EQ
    17 C265 + C564 18
    GND 18 C264 RSVD 19 *[email protected]/25V_6X *H2D@100U/6.3V_3528P_E45b
    RSVD 19 *[email protected]/25V_6X*H1D@10U/6.3V_6X *H1D@100U/6.3V_3528P_E45b GND 20 *H2D@10U/6.3V_6X
    GND 12V SATA5
    20 21 H2D@PI3EQX6741STZDE

    8
    9

    21

    3
    13
    18

    17
    19
    12V 21 12V 22
    12V 22 12V R803 *H2D@0_4 R42 *H2D@0_4
    12V +3V_HDD2 +3V_HDD2
    24 R802 *H2D@0_4 R38 *H2D@0_4
    24 GND
    GND H2D@197802-1 R17 H2D@0_4
    H1D@193201-1 R16 H2D@0_4 R41 H2D@0_4
    R39 H2D@0_4
    R40 H2D@0_4

    Primary HDD(H3.2) Secondary HDD(H7.8) TP2 TP1


    A_EQ B_EQ 1.5 Gb/s 3 Gb/s 6 Gb/s
    0 0 1 bB 2.5 bB 3 bB
    1 1 4 bB 7.5 bB 9 bB
    C floating 2.5 bB 5 bB 6 bB C

    A_EM B_EM 3 Gb/s 6 Gb/s


    0 0 550mV pp 650mV pp
    1 1 550mV pp+3dB Pre-emphasis 650mV pp+1.5dB Pre-emphasis

    ODD Zero Power <OZP>


    ODD Interface <ODD>

    [Connector Checked] +5V +5V_ODD

    B B

    L19 ZRP-N@HCB1608KF-121T30_3A
    +5V

    1 3

    C480 Q39 C481 R530

    2
    CN16 [email protected]_4
    14 [email protected]/25V_4X ZRP@ME1303_3A *[email protected]/25V_4X
    GND14
    1 R526 [email protected]/F_4
    GND1 2 SATA_TXP_ODD_C C91 0.01U/25V_4X SATA_TXP_ODD
    RXP SATA_TXP_ODD [7]

    3
    3 SATA_TXN_ODD#_C C90 0.01U/25V_4X SATA_TXN_ODD#
    RXN SATA_TXN_ODD# [7]
    4 GPIO68
    GND2 5 SATA_RXN_ODD#_C C89 0.01U/25V_4X SATA_RXN_ODD# +5V_ODD 2
    TXN SATA_RXN_ODD# [7] PCH_ODD_EN [9]
    6 SATA_RXP_ODD_C C88 0.01U/25V_4X SATA_RXP_ODD
    TXP SATA_RXP_ODD [7]
    7
    GND3 Q40

    1
    GPIO16 R522
    8 ZRP@LTC044EUBFS8TL_30MA
    DP ODD_PRSNT# [7]
    9 ZRP@22_8
    +5V 10 +5V_ODD
    +5V +5V_ODD
    11
    RSVD ODD_MD# [6]
    12
    GND

    3
    13 GPIO3 C446 C458 + C478
    GND
    15 *0.1U/16V_4Y 10U/6.3V_6X *100U/6.3V_3528P_E45b
    GND15 2
    6030D-13G20

    Q37

    1
    REV_C Change footprint to sata-c185n1-11309-l-13p-r ZRP@ME2N7002E_200MA

    A A
    ODD (H2.4)
    REV-B2A Fix ODD power discharge timing issue

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    HDD/ODD/G-sensor
    Date: Tuesday, February 05, 2013 Sheet 18 of 37
    5 4 3 2 1
    A B C D E

    3D-SMBus <GSR> 3D-LDO Power <GSR>


    1
    U7
    4
    +3V_HDP
    FS (Full Scale) selection

    FS
    0
    2g Full-Scale
    1
    6g Full-Scale
    mSATA <SSD> [Connector Checked]
    19
    [12,29,32,33,35] MAINON SHDN VO
    PD (Power Down) selection
    +3V_HDP +5V_S5 2 C109
    GND *GS@10U/6.3V_6X 0 1
    4 3 5 PD 4
    VIN SET
    Normal Mode Power-down mode
    C131 GS@G913C
    R116 R101
    SML1 [email protected]/10V_4X HDPPD selection +1.5V
    [email protected]_4 [email protected]_4
    2

    0 1
    HDPPD
    KXP84_SDA 1 3 Normal Mode Power-down mode R399
    2ND_MBDATA [7,21,29]
    *SSD@0_6
    Q12 GS@ME2N7002E_200MA BY1-A1A Add mSATA 0728
    +3V_HDP 3D-Sensor IC <GSR> +3V_HDP
    2

    U3 C575 C567
    +3V_HDP 2
    Vdd Voutx
    3 ACCELX 128GB Write peak 4W, current 1.33A C273
    KXP84_SCL 1 3 12 5 ACCELY +3V *[email protected]/25V_4X *SSD@10U/6.3V_6X
    2ND_MBCLK [7,21,29] Vdd Vouty
    Voutz
    7 ACCELZ R87 Via need 2pcs, trace need 60mil *[email protected]/16V_4Y
    Q11 GS@ME2N7002E_200MA C389 *GS@10K_4
    C52 9 4 AXSTST R354 SSD@0_1206 +3V_HDD
    GS@10U/6.3V_6X [email protected]/10V_4X 10 Reserve ST 8 FS
    11 Reserve FS C568 C577 C565
    Reserve C280
    6 14 R88 *[email protected]/16V_4Y *SSD@10U/6.3V_6X CN4
    3
    13 PD NC 15 GS@0_4 [email protected]/16V_4Y *[email protected]/16V_4Y 51 52 3
    1 GND NC 16 49 NC +3.3V 50
    GND NC 47 C-Link_RST GND 48
    GS@TSH352TR R686 45 C-Link_DAT +1.5V 46
    SSD@220_4 43 C-Link_CLK LED_WPAN# 44
    41 GND LED_WLAN# 42
    39 NC NC 40
    37 NC NC 38
    SATA1 or SATA5 GND USB_D+
    35 36
    C572 [email protected]/25V_4X SATA_TXP_1ST_SSD_C 33 GND USB_D- 34
    3D-u-micro P <GSR> +3V_HDP
    [7] SATA_TXP_1ST_SSD
    [7] SATA_TXN_1ST_SSD# C571 [email protected]/25V_4X SATA_TXN_1ST_SSD#_C 31
    29
    PERp0
    PERn0
    GND
    SMB_DATA
    32
    30
    27 GND SMB_CLK 28
    C570 [email protected]/25V_4X SATA_RXN_1ST_SSD#_C 25 GND +1.5V 26
    [7] SATA_RXN_1ST_SSD# PETn0 GND
    C569 [email protected]/25V_4X SATA_RXP_1ST_SSD_C 23 24
    [7] SATA_RXP_1ST_SSD PETp0 +3.3Vaux
    3 21 22
    1 Vcc 19 GND PERST# 20
    2 Reset# 17 NC W_DISABLE# 18
    GND NC GND
    U23 *GS@G691L308T73UF 15 16
    U4 13 GND NC 14
    Close to Pin 7 and Pin 16 +3V_HDP 11 REFCLK+ NC 12
    16 1 KXP84_SCL 9 REFCLK- NC 10
    +3V_HDP VCC HDPSCL GND NC
    7 20 KXP84_SDA 7 8
    2 C415 C416 C69 VCC HDPSDA 5 CLKREQ# NC 6 2
    C72 [email protected]/10V_4X ACCELY 18 3 G-RESET# R494 [email protected]_4 3 BT_CHCLK +1.5V 4

    GND
    GND
    GS@1U/10V_6X [email protected]/10V_4X [email protected]/10V_4X C71 [email protected]/10V_4X ACCELX 17 ACCELX RESET 8 R492 [email protected]_4 1 BT_DATA GND 2
    REV-B2A Reserve HDPACT_R to PCH GPIO6 ACCELY MODE WAKE# +3.3V
    C70 [email protected]/10V_4X ACCELZ 15
    AXSTST 2 ACCELZ 4 XIN_G R504 [email protected]_4 SSD@MPCET-S5201-TP40

    53
    54
    R490 *GS@0_4 Close Chipset AXSTST Reserved 6 XOUT_G R505 [email protected]_4
    [9] BOARD_ID6 Reserved
    GPIO6 R489 GS@0_4 HDPACT_R 11 12
    [9] HDPACT HDPACT Reserved
    GPIO12 R98 GS@47K/F_6 GND 10 13
    R498 GS@1K_4 HD_PINT 9 HDPPD Reserved
    [9] HDPINT HDPINT
    GPIO48 R100 GS@0_4 HD_PLOC 14 19 C418 *GS@22P/50V_4N
    [7] HDPLOC HDPLOC Reserved
    GPIO13 R97 GS@47K/F_6 5
    VSS
    1
    Y1
    Close Chipset GS@R5F211B4D34SP#W4(3B25H)
    *GS@8MHZ_30
    2

    C419 *GS@22P/50V_4N

    1 1

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    MINI PCIE CONN/LED
    Date: Tuesday, February 05, 2013 Sheet 19 of 37
    A B C D E
    5 4 3 2 1

    Non-4K2K Route CN22


    HDMI Conn HDM/HMU/HMV
    [2] INT_HDMITX2P
    [2] INT_HDMITX2N
    [17] EXT_HDMITX2P
    IV_HDMITX2
    IV_HDMITX2#
    RP34 3
    1
    EXT_HDMITX2P RP67 1
    EXT_HDMITX2N 3
    4 PIHM@0X2
    2
    2 OEHM@0X2
    4
    HDMITX2_RC
    HDMITX2#_RC
    C148
    C150
    [email protected]/10V_4X HDMITX2_R_PA
    [email protected]/10V_4X HDMITX2#_R_PA
    Cost Reduced Level Shifter
    RP61 3
    1
    4 N4K@0X2
    2
    HDMITX2_R
    HDMITX2#_R
    FOR EMI
    HDMITX2_R
    HDMITX1_R
    HDMITX0_R
    R202
    R214
    R197
    <EMC>
    *HM@120/F_4
    *HM@120/F_4
    *HM@120/F_4
    HDMITX2#_R
    HDMITX1#_R
    HDMITX0#_R
    Reserve EMI solution.20121012

    C497
    HDMI_CON_DDCCLK
    *E@68P/50V_4C
    HDMITX2_R

    HDMITX2#_R
    HDMITX1_R

    HDMITX1#_R
    1
    2
    3
    4
    5
    6
    D2+
    D2 Shield
    D2-
    D1+
    D1 Shield
    SHELL1
    20

    20
    [17] EXT_HDMITX2N D1-
    HDMICLK_R R218 *HM@120/F_4 HDMICLK#_R HDMITX0_R 7
    HDMI_CON_DDCDATA 8 D0+
    IV_HDMITX1 RP33 3 4 PIHM@0X2 HDMITX1_RC C146 [email protected]/10V_4X HDMITX1_R_PA RP63 3 4 N4K@0X2 HDMITX1_R C493 *E@68P/50V_4C HDMITX0#_R 9 D0 Shield 23
    [2] INT_HDMITX1P D0- GND
    IV_HDMITX1# 1 2 HDMITX1#_RC C147 [email protected]/10V_4X HDMITX1#_R_PA 1 2 HDMITX1#_R HDMICLK_R 10
    [2] INT_HDMITX1N CK+
    EXT_HDMITX1P RP66 1 2 OEHM@0X2 11 22
    [17] EXT_HDMITX1P CK Shield GND
    EXT_HDMITX1N 3 4 HDMICLK#_R 12
    [17] EXT_HDMITX1N CK-
    13
    14 CE Remote
    IV_HDMITX0 RP31 3 4 PIHM@0X2 HDMITX0_RC C144 [email protected]/10V_4X HDMITX0_R_PA RP60 3 4 N4K@0X2 HDMITX0_R +DDC5V_F HDMI_CON_DDCCLK 15 NC
    [2] INT_HDMITX0P Change to correct diode (BC000220Z01) DDC CLK
    IV_HDMITX0# 1 2 HDMITX0#_RC C145 [email protected]/10V_4X HDMITX0#_R_PA 1 2 HDMITX0#_R 0.055A HDMI_CON_DDCDATA 16
    [2] INT_HDMITX0N DDC DATA
    D EXT_HDMITX0P RP64 1 2 OEHM@0X2 17 D
    [17] EXT_HDMITX0P GND
    EXT_HDMITX0N 3 4 +5V R558 HM@0_6 +DDC5V_F F3 *HM@SMD1206P110TFT +DDC5V 2 1 *HM@B220LFA-13-F +5V_HDMI 18
    [17] EXT_HDMITX0N +5V
    D16 HDMI_CON_HP 19
    HP DET 21
    IV_HDMICLK RP29 3 4 PIHM@0X2 HDMICLK_RC C142 [email protected]/10V_4X HDMICLK_R_PA RP65 3 4 N4K@0X2 HDMICLK_R U32 SHELL2
    [2] INT_HDMICLK+
    IV_HDMICLK# 1 2 HDMICLK#_RC C143 [email protected]/10V_4X HDMICLK#_R_PA 1 2 HDMICLK#_R 3 1 C149 C151 HM@2HE1638-000111F
    [2] INT_HDMICLK- IN OUT
    EXT_HDMICLK+ RP62 1 2 OEHM@0X2 2
    [17] EXT_HDMICLK+ GND
    EXT_HDMICLK- 3 4 *HM@220P/50V_4X [email protected]/16V_4Y
    [17] EXT_HDMICLK-
    HM@AP2337SA-7
    As close as Resistors of Connector.
    SKU Note:
    As close as caps of 4K2K. C659 C658
    PIHM->CPU Internal HDMI.(85ohms) *[email protected]/16V_4Y *[email protected]/16V_4Y
    OEHM->dGPU External HDMI.(90 ohms)
    BDD_B Add LDO on HDMI power -1121
    4K2K Note: Support 4K2K Route
    4K->HDMI Support 4K2K.
    N4K->Non-4K2K HDMI LEVEL HDM/HMU/HMV Non-4K2K STUFF HDMI-HPD HDM/HMU/HMV
    N4KPIHM->Internal HDMI Non-4K2K. SHIFT
    N4KOEHM->External HDMI Non-4K2K. As close as caps of non-4K2K. As close as Resistors of Non-4K2K. REV-B2A Co-lay for BOM Option +3V +3V

    HDMITX2_RC C499 [email protected]/10V_4X HDMITX2_4K HDMITX2 RP28 1 2 4K@0X2 HDMITX2_R


    HDMITX2#_RC C502 [email protected]/10V_4X HDMITX2#_4K HDMITX2# 3 4 HDMITX2#_R INT HDMI stuff 680 ohm.
    +3V +5V R198 N4KPIHM@680_4 HDMITX0#_R_PA
    HDMITX1_RC C492 [email protected]/10V_4X HDMITX1_4K HDMITX1 RP30 1 2 4K@0X2 HDMITX1_R R195 N4KPIHM@680_4 HDMITX0_R_PA R560
    HDMITX1#_RC C496 [email protected]/10V_4X HDMITX1#_4K HDMITX1# 3 4 HDMITX1#_R R215 N4KPIHM@680_4 HDMITX1#_R_PA N4K@1M_4

    2
    R210 N4KPIHM@680_4 HDMITX1_R_PA Q41 N4K@ME2N7002E_200MA
    HDMITX0_RC C490 [email protected]/10V_4X HDMITX0_4K
    4K2K IC HDMITX0 RP27 1 2 4K@0X2 HDMITX0_R R532 R529 R205 N4KPIHM@680_4 HDMITX2#_R_PA
    HDMITX0#_RC C491 [email protected]/10V_4X HDMITX0#_4K HDMITX0# 3 4 HDMITX0#_R *0_6 *SHORT_6 R201 N4KPIHM@680_4 HDMITX2_R_PA R562 PIHM@0_4 HDMI_CON_HP_PCH_R 1 3 HDMI_CON_HP
    [6] HDMI_CON_HP_PCH

    3
    R219 N4KPIHM@680_4 HDMICLK#_R_PA
    HDMICLK_RC C488 [email protected]/10V_4X HDMICLK_4K HDMICLK RP32 1 2 4K@0X2 HDMICLK_R R217 N4KPIHM@680_4 HDMICLK_R_PA
    HDMICLK#_RC C489 [email protected]/10V_4X HDMICLK#_4K HDMICLK# 3 4 HDMICLK#_R R548
    2 R778 N4KOEHM@499/F_4 HDMITX0#_R_PA R565 OEHM@0_4 R547
    [17] EXT_HDMI_HPD
    R779 N4KOEHM@499/F_4 HDMITX0_R_PA
    Q13 R780 N4KOEHM@499/F_4 HDMITX1#_R_PA N4KPIHM@20K_4 N4KOEHM@100K_4
    Support 4K2K STUFF Support 4K2K STUFF R531
    N4K@ME2N7002E_200MA R781
    R782
    N4KOEHM@499/F_4
    N4KOEHM@499/F_4
    HDMITX1_R_PA
    HDMITX2#_R_PA

    1
    C N4K@100K_4 R783 N4KOEHM@499/F_4 HDMITX2_R_PA C
    R784 N4KOEHM@499/F_4 HDMICLK#_R_PA
    R785 N4KOEHM@499/F_4 HDMICLK_R_PA
    EXT HDMI stuff 499 ohm.
    +DDC5V_F +3V +DDC5V_F
    HDMI-SMBus HDM/HMU/HMV
    +3V
    D6 D5

    HDMI RPT Pin PS8401A PS8201A HM@RB500V-40_100MA HM@RB500V-40_100MA

    +3V 12 VDDRX NC +3V

    C504 [email protected]/25V_4X
    15 GND NC R206 +3V R203 R213 R204

    C505 [email protected]/10V_4X
    34 ISET NC [email protected]_4
    [email protected]_4
    [email protected]_4
    [email protected]_4

    37 VDD33 NC

    2
    +1.5V
    C494 [email protected]/10V_4X
    Support 4K2K STUFF HDMI_DDCCLK R207 PIHM@0_4 HDMI_DDCCLK_R 1 3 HDMI_CON_DDCCLK HDMI_DDCDATA R212 PIHM@0_4 HDMI_DDCDATA_R 1 3 HDMI_CON_DDCDATA
    [6] HDMI_DDCCLK [6] HDMI_DDCDATA
    U10
    C501 [email protected]/10V_4X
    HDMITX2_4K 1 30 HDMITX2 EV_HDMI_DDCCLK
    R208 OEHM@0_4 Q14 N4K@FDV301N_200MA EV_HDMI_DDCDAT
    R211 OEHM@0_4 Q15 N4K@FDV301N_200MA
    IN_D2+ OUT_D2+ [17] EV_HDMI_DDCCLK [17] EV_HDMI_DDCDAT
    C500 [email protected]/10V_4X HDMITX2#_4K 2 29 HDMITX2#
    IN_D2- OUT_D2-
    C498 [email protected]/10V_4X HDMITX1_4K 4 27 HDMITX1
    HDMITX1#_4K 5 IN_D1+ OUT_D1+ 26 HDMITX1#
    C495 [email protected]/25V_4X IN_D1- OUT_D1-
    HDMITX0_4K 6 25 HDMITX0
    C503 [email protected]/25V_4X HDMITX0#_4K 7 IN_D0+ OUT_D0+ 24 HDMITX0#
    IN_D0- OUT_D0-
    HDMICLK_4K 9 22 HDMICLK
    HDMICLK#_4K 10 IN_CLK+ OUT_CLK+ 21 HDMICLK#
    IN_CLK- OUT_CLK-
    HDMI_DDCCLK_R R220 4K@0_4 HDMI4K2K_SCL_SRC 38 32 HDMI_CON_DDCCLK
    B
    HDMI_DDCDATA_R R222 4K@0_4 HDMI4K2K_SDA_SRC 39 SCL_SRC
    SDA_SRC
    SCL_SINK
    SDA_SINK
    33 HDMI_CON_DDCDATA CRT CRT/CRU/CRV B
    HDMI_CON_HP_PCH_R
    R234 4K@0_4 HDMI4K2K_HPD_SRC 3 28 HDMI_CON_HP +3V
    HPD_SRC HPD_SINK
    +3V 36 11 CRT_DDCCLK R131 [email protected]_4 C420 [email protected]/16V_4Y U25
    PD# VCC33[1] +3V
    R235 *[email protected]_4 8 37 R216 8401@0_4 CRT_DDCDAT R130 [email protected]_4 +5V_CRT
    1 16 CRTVSYNC
    HDMI4K2K_PRE 16 I2C_STL_EN VCC33[2] C422 [email protected]/16V_4Y VCC_SYNC SYNC_OUT2 14 CRTHSYNC
    HDMI4K2K_ISET R546 8401@0_4 34 PRE +1.5V 7 SYNC_OUT1
    ISET +5V VCC_DDC
    20 CRTDCLK R150 [email protected]_4 C423 [email protected]/10V_4X 8 C97 C98
    VCCTX15[1] +5V_CRT BYP
    31 CRTDDAT R147 [email protected]_4 15 CRT_VSYNC
    HDMI4K2K_DDCBUF 14 VCCTX15[2] 12 R563 8401@0_4 2 SYNC_IN2 13 CRT_HSYNC CRT@10P/50V_4C CRT@10P/50V_4C
    DDCBUF/SDA_CTL VCCRX15[1] 460mA (30mils) +3V VCC_VIDEO SYNC_IN1
    HDMI4K2K_EN 13 40 C421 [email protected]/16V_4Y
    DCIN_EN/SCL_STL VCCRX15[2] 19
    HDMI4K2K_EQ 17 VCCTA15[1] CRT_RED L4 CRT@BLM18BA470SN1D_300MA CRT_R1 3 10 CRT_DDCCLK
    Add 0ohms for compatible with PS8201A.
    HDMI4K2K_CFG 23 EQ/I2C_ADDR0 CRT_GRN L5 CRT@BLM18BA470SN1D_300MA CRT_G1 4 VIDEO_1 DDC_IN1 11 CRT_DDCDAT
    CFG/I2C_ADDR1
    R2586 for NC.20121112 VIDEO_2 DDC_IN2
    15 R557 8401@0_4 CRT_BLU L6 CRT@BLM18BA470SN1D_300MA CRT_B1 5
    R223 [email protected]/F_4 18 GND1] 35 VIDEO_3 9 CRTDCLK
    REXT GND[2] 41 R123 C85 R125 C93 R129 C96 C86 C84 C82 6 DDC_OUT1 12 CRTDDAT
    GND_PAD[1] 42 GND DDC_OUT2
    GND_PAD[2] 43 CRT@150/F_4 [email protected]/50V_4N CRT@150/F_4 [email protected]/50V_4N CRT@150/F_4 [email protected]/50V_4N [email protected]/50V_4N [email protected]/50V_4N [email protected]/50V_4N CRT@CM2009-02QR C459 C460
    GND_PAD[3] 44
    GND_PAD[4] 45 CRT@10P/50V_4C CRT@10P/50V_4C
    GND_PAD[5] 46
    GND_PAD[6] 47
    GND_PAD[7] 48
    GND_PAD[8] 49
    GND_PAD[9] 50
    GND_PAD[10]

    16
    4K@PS8401ATQFN40GTR2-A4
    R506 ICRT@0_4 CRT_RED
    [6] INT_CRT_RED
    6
    R509 ICRT@0_4 CRT_GRN CRT_R1 1 11
    [6] INT_CRT_GRN
    7
    R511 ICRT@0_4 CRT_BLU CRT_G1 2 12 CRTDDAT
    [6] INT_CRT_BLU +5V_CRT 8
    Pre ISET EQ CFG DDCBUF DCIN_EN CRT_B1 3 13 CRTHSYNC
    default,AC coupling input R122 ECRT@0_4 D3 CRT@SS14L_1A +5V_CRT1 F2 CRT@SMD1206P110TFT 9
    NC(Low) 0 dB default 12.4 dB HDMI ID disable default [17] EXT_CRT_RED +5V
    4 14 CRTVSYNC
    active DDC buffer with R124 ECRT@0_4 10
    [17] EXT_CRT_GRN
    5 15 CRTDCLK

    1
    1(High) 1.6 dB +13% 4.3 dB HDMI ID enable default threshold DC coupling input
    R128 ECRT@0_4 D4
    [17] EXT_CRT_BLU
    active DDC buffer without CN17
    A *CRT@LCP0G050M0R2R A
    M 2.5 dB -13% 8.6 dB N/A internal pull up resistor N/A

    17
    R149 ICRT@0_4 CRT_DDCCLK CRT@10292-10001
    [6] INT_CRT_DDCCLK

    2
    R148 ICRT@0_4 CRT_DDCDAT
    +3V [6] INT_CRT_DDCDAT
    Pre Output pre-emphasis setting R146 ICRT@0_4 CRT_HSYNC
    [6] INT_HSYNC
    R227 *[email protected]_4 HDMI4K2K_PRE R226 [email protected]_4
    R544 *[email protected]_4 HDMI4K2K_ISET R545 *[email protected]_4
    ISET TMDS output swing adjustment R145 ICRT@0_4 CRT_VSYNC
    [6] INT_VSYNC
    R225 *[email protected]_4 HDMI4K2K_EQ R224 *[email protected]_4
    HDMI4K2K_CFG R221 *[email protected]_4
    EQ Receiver equalization setting
    R229 *[email protected]_4 HDMI4K2K_DDCBUF R228 [email protected]_4 R519 ECRT@0_4
    HDMI4K2K_EN R230 *[email protected]_4
    CFG Configuration pin [17] EV_CRTDCLK

    DDCBUF enable active DDC buffer [17] EV_CRTDDAT


    R518 ECRT@0_4 Quanta Computer Inc.
    REV-D3A Mount R545 for FAE suggestion R517 ECRT@0_4
    DCIN_EN DC coupling enable [17] EXT_HSYNC PROJECT : BDD
    R516 ECRT@0_4 Size Document Number Rev
    [17] EXT_VSYNC
    A1A
    HDMI CONN
    Date: Tuesday, February 05, 2013 Sheet 20 of 37
    5 4 3 2 1
    5 4 3 2 1

    20
    SKU Note:
    ILVDS->CPU eDP(85ohms) to Internal LVDS (100 ohms) Panel. C426 [email protected]/10V_4X

    INT_TXLOUT0-_2136 INT_TXLOUT0-_2136 [22]


    INT_TXLOUT0+_2136

    MODE_CFG1

    MODE_CFG0
    INT_TXLOUT0+_2136 [22]
    Co-Layout to EDP CON,INT EDP only please stuff INT_TXLOUT1-_2136

    VCCK_V12
    D INT_TXLOUT1-_2136 [22] D
    INT_TXLOUT1+_2136

    MIICSDA
    MIICSCL
    INT_TXLOUT1+_2136 [22]

    BL_EN
    INT_TXLOUT2-_2136 INT_TXLOUT2-_2136 [22]
    INT_TXLOUT2+_2136 INT_TXLOUT2+_2136 [22]
    R500 IEDP@0_4 INT_EDP_AUXN_R [22]
    R501 IEDP@0_4 INT_EDP_AUXP_R [22]
    R503 IEDP@0_4

    49

    48

    47

    46

    45

    44

    43

    42

    41

    40

    39

    38

    37
    INT_EDP_TXP0_R [22] U5
    R507 IEDP@0_4 INT_EDP_TXN0_R [22]
    R508 IEDP@0_4

    MODE_CFG1

    MODE_CFG0

    MIICSCL

    MIICSDA

    VCCK

    TXO0-

    TXO1-

    TXO2-
    TXO0+

    TXO1+

    TXO2+
    EPAD_GND

    BL_EN
    INT_EDP_TXP1_R [22]
    R510 IEDP@0_4 INT_EDP_TXN1_R [22]
    BL_EN R107 ILVDS@0_4 INT_LVDS_BLON_2136 [22]
    R115 ILVDS@100K_4

    INT_EDP_HPD R110 ILVDS@1K_4 EDP_HPD_2136 1 36


    [2,22] INT_EDP_HPD DP_HPD TXOC- INT_TXLCLKOUT-_2136 [22]
    PWM_OUT R154 ILVDS@0_4 INT_LVDS_PWM_2136 [22]
    R117 ILVDS@100K_4 TEST_MODE 2 35
    TEST_MODE TXOC+ INT_TXLCLKOUT+_2136 [22]
    R142 ILVDS@100K_4
    INT_EDP_AUXN C80 [email protected]/10V_4X EDP_AUXN_2136 3 34
    [2] INT_EDP_AUXN AUX_CH_N TXO3-
    [2] INT_EDP_AUXP INT_EDP_AUXP C81 [email protected]/10V_4X EDP_AUXP_2136 4 33
    AUX_CH_P TXO3+ PANEL_VCC R153 ILVDS@0_4 VDDEN [22]
    AVCC33 5 32
    DP_V33 TXE0- INT_TXUOUT0-_2136 [22]
    6 31
    INT_TXUOUT0+_2136 [22]

    [2] INT_EDP_TXP0 INT_EDP_TXP0 C83 [email protected]/10V_4X EDP_TXP0_2136 7


    DP_GND

    LANE0_P
    RTD2136R TXE0+

    TXE1-
    30
    INT_TXUOUT1-_2136 [22]
    INT_EDP_TXN0 C87 [email protected]/10V_4X EDP_TXN0_2136 8 29
    [2] INT_EDP_TXN0 LANE0_N TXE1+ INT_TXUOUT1+_2136 [22]

    [2] INT_EDP_TXP1 INT_EDP_TXP1 C92 [email protected]/10V_4X EDP_TXP1_2136 9 28 INT_TXUOUT2-_2136 [22]


    LANE1_P TXE2-
    INT_EDP_TXN1 C94 [email protected]/10V_4X EDP_TXN1_2136 10 27
    [2] INT_EDP_TXN1 LANE1_N TXE2+ INT_TXUOUT2+_2136 [22]

    SWR_VCCK/LDO_VCCK
    VCCK_V12 11 26
    DP_V12 TXEC- INT_TXUCLKOUT-_2136 [22]

    SWR_VDD/LDO_VDD
    DP_REXT 12 25 +3V
    INT_TXUCLKOUT+_2136 [22]

    SWR_LX/LDO_FB
    DP_REXT TXEC+
    C440 R127

    PANEL_VCC
    [email protected]/10V_4X ILVDS@12K/F_4

    PWMOUT
    0912 Need to PU 4.7K to +3V on IC or conn side

    CIICSDA
    CIICSCL
    R113 R114

    PWMIN

    TXE3+

    TXE3-
    PVCC
    GND
    C C
    *[email protected]_4 *[email protected]_4

    ILVDS@RTD2136R-CG

    13

    14

    VCCK_V12 15

    16

    17

    18

    PWM_OUT 19

    PANEL_VCC20

    21

    22

    23

    24
    MIICSCL R105 ILVDS@0_4 INT_LVDS_EDIDCLK_2136 [22]
    MIICSDA R106 ILVDS@0_4

    CIICSDA

    PWM_IN
    CIICSCL

    DVCC33

    DVCC33
    INT_LVDS_EDIDDATA_2136 [22]

    PIN17
    +3V Close to chip
    L16 ILVDS@HCB1608KF-221T20_2A AVCC33
    DVCC33=80mils

    C429 C430 C439


    Note: R144 ILVDS@0_4
    PCH_PWM [6,22]
    ILVDS@10U/6.3V_6X [email protected]/10V_4X
    1. C1,C4,C7,C8,C9,C16 should be closed to chip
    [email protected]/10V_4X 2. C9 should be X5R material
    3. R8 should be 12K olm with +/- 1% R143

    4 Entire trace of Panel VCC should be wider than 80-mil ILVDS@100K_4

    +3V
    L17 ILVDS@HCB1608KF-221T20_2A DVCC33

    C448 C445 C444 C447 C443

    ILVDS@10U/6.3V_6X [email protected]/10V_4X [email protected]/10V_4X


    [email protected]/10V_4X ILVDS@22U/6.3V_6X

    B
    Mode Configure Table(Power On Latch) B

    CFG0 Dual Mode Regulator Configuration


    EEPROM Mode EP Mode
    0 1 In EEPROM mode, an additional EEPROM is needed. External device connect to DP2LVDS by
    4.7-uH(L2602) 0 Olm(R2632)
    EEPROM should configure with following condition. Pin13/Pin14, I2C protocol is used
    0 X EP MODE SWR Connect NC
    CFG1
    1 ROM ONLY MODE EEPROM MODE
    1- EEPROM with a size 8K-Byte To EC LDO NC Connect
    2- EEPROM device should be 2-byte addressing device
    ROM ONLY Mode : CFG0 4.7K pull low, CFG1 4.7K pull high 3- Slave address should configure as 0xA8 CIICSCL 1 6
    2ND_MBCLK [7,19,29]
    Q8A ILVDS@2N7002KDW_115MA
    EP Mode : CFG0 4.7K pull high, CFG1 4.7K pull low L18 *ILVDS@TLPC3010C-4R7M Close to PIN17
    R139

    2
    EEPROM Mode : CFG0 4.7K pull high, CFG1 4.7K pull high 0918 FAE suggest reserve [email protected]_4
    SMbus connect to FCH PIN17 R515 ILVDS@0_6 VCCK_V12
    0918 FAE suggest
    +3V +3V +3V SMbus connect to EC
    +3V 60mils C442 C441
    R141 0918 FAE suggest

    5
    C417 *[email protected]/10V_4X [email protected]_4 C2611 used 22uF X5R ILVDS@22U/6.3V_6X [email protected]/10V_4X
    L2602 used TLPC3010C-4R7M
    R104 R103 U24 CIICSDA 4 3
    2ND_MBDATA [7,19,29]
    8 7 Q8B ILVDS@2N7002KDW_115MA
    *[email protected]_4 [email protected]_4 MIICSDA R495 *ILVDS@0_4 5 VCC WP 3
    RTD2136R MIICSCL R496 *ILVDS@0_4 6 SDA A2 2
    MODE_CFG0 MODE_CFG1 4 SCL A1 1
    MODE_CFG0 R493 *ILVDS@0_4 GND A0
    RTD2136S MODE_CFG1 R499 *ILVDS@0_4
    1. C2602 22-uF capacitor should be X5R material
    *ILVDS@M24C64
    R112 R111 2. Inductor should be withstand current >600-mA
    [email protected]_4 *[email protected]_4 3. Capacitors should be closed to PIN17
    I2C address=0xA8

    A A

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    eDP to LVDS (PS8625)
    Date: Tuesday, February 05, 2013 Sheet 21 of 37
    5 4 3 2 1
    5 4 3 2 1

    REV-D3A Add RP68,Del R418&R415


    Panel backlight control LDS LCD POWER LDS/LDU/LDV CAMERA CCD CO-Lay for fixing SMT issue HALL Logo LED Connector for LCD base

    DISPON_O
    DISPON_O [29]
    SWITCH
    +3V +5V
    USB_CCD_R
    USB_CCD#_R
    1
    4
    RP68
    2
    3

    MCM2012D900FBE_300MA
    USBP11_CCD
    USBP11_CCD#
    USBP11_CCD [8]
    USBP11_CCD# [8]
    Sensor
    HSR
    +5V 90mA(Max) For safety concern

    +5V_S5
    22
    FROM EC R23 R15

    2
    OLVDS@0_1206 OEDP@0_1206
    R13 +3VPCU R745 100K_4 CN6
    Logo_led@87212-0200L
    D 100K_4 LCDVCC of eDP Panel is 5V. +3V F1 2 1 LITTLE-0603-2A-32V CCD_POWER D

    U1 LCDVCC C10 *10U/6.3V_6X

    +
    C17

    1
    1U/6.3V_4X 5 1 1 2 LID591# REV-D3A Change CN6 footprint
    IN OUT LID591# [29]
    to 87212-0200l-2p-l

    3
    4 2 MR1
    IN GND C7 C8 C6 LOGO_LEDR43 Logo_led@300_4 2 Q3
    TO Panel Side VDDEN 3 C633 APX9132H AI-TRG
    [27,29] LOGO_LED
    [21] VDDEN

    3
    ON/OFF 0.1U/16V_4Y *0.01U/25V_4X *10U/6.3V_6X Logo_led@MMBT3904-7-F
    IR Module

    1
    DISPON_O R14 1.2K/F_4 DISPON_O_R R3 +5V 0.1U/16V_4Y C39
    AP2821KTR-G1
    PIV@100K_4
    REV_C Modify footprint and symbol
    CONN 82mA (10mils)
    1
    CN8 *Logo_led@1U/6.3V_4X

    D1 2 1
    of LCDVCC IC 2
    LCP0G050M0R2R 3
    4 3
    USBP9_3D_IR# 5 4
    [8] USBP9_3D_IR# 5
    USBP9_3D_IR 6
    [8] USBP9_3D_IR 6
    3D@50273-0060N-001

    REV-B2A Change Footprint to 50273-0060n-001-6p-l

    INT LVDS INT EDP R3 For EDP only (INT EDP or EXT EDP) :
    Signals R6 Signals As close as possible Stuff +3V
    As close as possible
    RP7 3 4 IEDP@0X2 TXLOUT0-
    R431
    R442
    OEDP@100K_4
    OEDP@100K_4
    TXUOUT0-
    TXUOUT0+
    Panel Module <LDS>
    [21] INT_EDP_TXN0_R
    C INT_LVDS_EDIDCLK_2136RP15 1 2 ILVDS@0X2 EDIDCLK [21] INT_EDP_TXP0_R
    1 2 TXLOUT0+ C
    [21] INT_LVDS_EDIDCLK_2136 3 4 3 4 IEDP@0X2
    INT_LVDS_EDIDDATA_2136 EDIDDATA [21] INT_EDP_TXN1_R RP8 TXLOUT1-
    [21] INT_LVDS_EDIDDATA_2136
    1 2 TXLOUT1+
    [21] INT_EDP_TXP1_R +3V
    INT_TXLOUT0-_2136 RP17 1 2 ILVDS@0X2 TXLOUT0-_LDS RP9 3 4 IEDP@0X2 TXUOUT0-
    [21] INT_TXLOUT0-_2136
    [21] INT_TXLOUT0+_2136 INT_TXLOUT0+_2136 3 4 TXLOUT0+_LDS
    [21]
    [21]
    INT_EDP_AUXN_R
    INT_EDP_AUXP_R 1 2 TXUOUT0+ For INT EDP or EXT EDP Only: Stuff Ra
    R24 OEDP@1K_4 DPST_PWM CN11
    INT_TXLOUT1-_2136 RP19 1 2 ILVDS@0X2 TXLOUT1-_LDS R12 OEDP@1K_4 DISPON_O For INT LVDS or EXT LVDS Only: Stuff Rb

    G_0
    [21] INT_TXLOUT1-_2136
    INT_TXLOUT1+_2136 3 4 TXLOUT1+_LDS
    [21] INT_TXLOUT1+_2136
    R209 IEDP@0_4 LVDS_BKLT TO +VIN_BLIGHT 1
    [6] PCH_BLON LVDS_BKLT [22,29]
    [21] INT_TXLOUT2-_2136
    INT_TXLOUT2-_2136 RP21 1 2 ILVDS@0X2 TXLOUT2-_LDS [6,21] PCH_PWM R27 IEDP@0_4 DPST_PWM EC 2
    3
    INT_TXLOUT2+_2136 3 4 TXLOUT2+_LDS R2 IEDP@0_4 VDDEN
    [21] INT_TXLOUT2+_2136
    INT_TXLCLKOUT-_2136 RP22 1 2 ILVDS@0X2 TXLCLKOUT-_LDS
    [6] PCH_VDDEN
    R8 IEDP@0_4 EDP_HPD_R
    For LVDS only (INT LVDS or EXT LVDS) : LCDVCC
    EDP_HPD_R R11
    R10
    Ra
    Rb
    OEDP@0_4
    OLVDS@0_4
    4
    5
    [21] INT_TXLCLKOUT-_2136
    [21] INT_TXLCLKOUT+_2136 INT_TXLCLKOUT+_2136 3 4 TXLCLKOUT+_LDS
    [2,21] INT_EDP_HPD
    Stuff+3V MIC +3V
    CCD_POWER 6
    R22 [email protected]_4 EDIDCLK 7
    [21] INT_TXUOUT0-_2136 INT_TXUOUT0-_2136
    INT_TXUOUT0+_2136
    RP23 1
    3
    2 ILVDS@0X2
    4
    TXUOUT0-_LDS
    TXUOUT0+_LDS
    EXT EDP R25 [email protected]_4 EDIDDATA
    [24] INT_DMIC_DATA
    L1
    L2
    FCM1005KF-221T03_300MA
    FCM1005KF-221T03_300MA
    DIGITAL_D1_R
    DIGITAL_CLK_R
    8
    9
    [21] INT_TXUOUT0+_2136
    INT_TXUOUT1-_2136 RP24 1 2 ILVDS@0X2 TXUOUT1-
    Signals R4 [24] INT_DMIC_CLK
    C11
    DPST_PWM_R
    DISPON_O_R
    10
    11
    G_1
    [21] INT_TXUOUT1-_2136 12
    [21] INT_TXUOUT1+_2136 INT_TXUOUT1+_2136 3 4 TXUOUT1+ [17] EV_EDP_TXN0 RP10 1 2 dEDP@0X2 TXLOUT0- C13 EDIDCLK
    3 4 TXLOUT0+ 100P/50V_4N 100P/50V_4N EDIDDATA 13
    [17] EV_EDP_TXP0 14
    INT_TXUOUT2-_2136 RP25 1 2 ILVDS@0X2 TXUOUT2- [17] EV_EDP_TXN1 RP11 1 2 dEDP@0X2 TXLOUT1- USB_CCD#_R
    [21] INT_TXUOUT2-_2136 15
    INT_TXUOUT2+_2136 3 4 TXUOUT2+ 3 4 TXLOUT1+ USB_CCD_R
    [21] INT_TXUOUT2+_2136 [17] EV_EDP_TXP1 16
    RP12 1 2 dEDP@0X2 TXLOUT2-
    [21] INT_TXUCLKOUT-_2136 INT_TXUCLKOUT-_2136 RP26 1
    INT_TXUCLKOUT+_2136 3
    2 ILVDS@0X2
    4
    TXUCLKOUT-
    TXUCLKOUT+
    [17]
    [17]
    EV_EDP_TXN2
    EV_EDP_TXP2 3
    RP13 1
    4
    2 dEDP@0X2
    TXLOUT2+
    TXLCLKOUT-
    INT LVDS(Max 7000mil) TXLOUT0-_R
    TXLOUT0+_R
    17
    18 G_2
    [21] INT_TXUCLKOUT+_2136 [17] EV_EDP_TXN3
    3 4 TXLCLKOUT+ For INT LVDS or EXT LVDS:Stuff 0_4 19
    TO [17] EV_EDP_TXP3
    RP14 1 2 dEDP@0X2 TXUOUT0- For INT EDP or EXT EDP :Stuff 0.1U/10V_4X TXLOUT1-_R 20
    [17] EV_EDP_AUXN
    EC [17] EV_EDP_AUXP 3 4 TXUOUT0+ TXLOUT1+_R 21
    22
    [21] INT_LVDS_BLON_2136 R497 ILVDS@0_4 LVDS_BKLT LVDS_BKLT [22,29]
    R26 ILVDS@0_4 DPST_PWM TXLOUT0- R421 OLVDS@0_4 TXLOUT0-_R TXLOUT2-_R 23
    [21] INT_LVDS_PWM_2136 24 G_3
    [17] EXT_EDP_HPD R6 dEDP@0_4 EDP_HPD_R TXLOUT0+ R422 OLVDS@0_4 TXLOUT0+_R TXLOUT2+_R
    TXLOUT1- R423 OLVDS@0_4 TXLOUT1-_R 25
    TXLOUT1+ R424 OLVDS@0_4 TXLOUT1+_R TXLCLKOUT-_R 26
    TXLOUT2- R425 OLVDS@0_4 TXLOUT2-_R TXLCLKOUT+_R 27
    B EXT LVDS TXLOUT2+
    TXLCLKOUT-
    R426
    R427
    OLVDS@0_4
    OLVDS@0_4
    TXLOUT2+_R
    TXLCLKOUT-_R TXUOUT0-_R
    28
    29 B

    Signals R5 INT EDP&EXT EDP&INT LVDS&EXT LVDS combo Signals TXLCLKOUT+


    TXUOUT0-
    R428
    R432
    OLVDS@0_4
    OLVDS@0_4
    TXLCLKOUT+_R
    TXUOUT0-_R
    TXUOUT0+_R 30
    31 G_4

    EV_LVDS_DDCCLK RP50 1 2 dLVDS@0X2 EDIDCLK


    R2 TXUOUT0+ R441 OLVDS@0_4 TXUOUT0+_R TXUOUT1-
    TXUOUT1+
    32
    33
    [17] EV_LVDS_DDCCLK 3 4 34
    EV_LVDS_DDCDAT EDIDDATA TXLOUT0-_LDS RP45 1 2 OLVDS@0X2 TXLOUT0- Close to connector within 750mil within 750mils
    [17] EV_LVDS_DDCDAT 35
    TXLOUT0+_LDS 3 4 TXLOUT0+ TXUOUT2-
    EV_TXLOUT0- RP51 1 2 dLVDS@0X2 TXLOUT0-_LDS TXLOUT0- C697 [email protected]/10V_4X TXLOUT0-_R TXUOUT2+ 36
    [17] EV_TXLOUT0- 37
    [17] EV_TXLOUT0+ EV_TXLOUT0+ 3 4 TXLOUT0+_LDS TXLOUT1-_LDS RP46 1 2 OLVDS@0X2 TXLOUT1- TXLOUT0+ C698 [email protected]/10V_4X TXLOUT0+_R
    TXLOUT1+_LDS 3 4 TXLOUT1+ TXLOUT1- C699 [email protected]/10V_4X TXLOUT1-_R TXUCLKOUT- 38
    EV_TXLOUT1- RP52 1 2 dLVDS@0X2 TXLOUT1-_LDS TXLOUT1+ C700 [email protected]/10V_4X TXLOUT1+_R TXUCLKOUT+ 39
    [17] EV_TXLOUT1- 40

    G_5
    EV_TXLOUT1+ 3 4 TXLOUT1+_LDS TXLOUT2-_LDS RP47 1 2 OLVDS@0X2 TXLOUT2- TXLOUT2- C701 [email protected]/10V_4X TXLOUT2-_R
    [17] EV_TXLOUT1+
    TXLOUT2+_LDS 3 4 TXLOUT2+ TXLOUT2+ C702 [email protected]/10V_4X TXLOUT2+_R
    [17] EV_TXLOUT2- EV_TXLOUT2- RP53 1 2 dLVDS@0X2 TXLOUT2-_LDS TXLCLKOUT- C703 [email protected]/10V_4X TXLCLKOUT-_R
    EV_TXLOUT2+ 3 4 TXLOUT2+_LDS TXLCLKOUT-_LDS RP48 1 2 OLVDS@0X2 TXLCLKOUT- TXLCLKOUT+ C704 [email protected]/10V_4X TXLCLKOUT+_R 7300L40-000000-G4
    [17] EV_TXLOUT2+
    TXLCLKOUT+_LDS 3 4 TXLCLKOUT+ TXUOUT0- C705 [email protected]/10V_4X TXUOUT0-_R
    [17] EV_TXLCLKOUT- EV_TXLCLKOUT- RP54 1 2 dLVDS@0X2 TXLCLKOUT-_LDS TXUOUT0+ C706 [email protected]/10V_4X TXUOUT0+_R REV-B2A Change Footprint to
    [17] EV_TXLCLKOUT+ EV_TXLCLKOUT+ 3 4 TXLCLKOUT+_LDS TXUOUT0-_LDS RP49 1 2 OLVDS@0X2 TXUOUT0- gs12401-1011-40p-r-nh-smt
    TXUOUT0+_LDS 3 4 TXUOUT0+
    [17] EV_TXUOUT0- EV_TXUOUT0- RP55 1 2 dLVDS@0X2 TXUOUT0-_LDS
    EV_TXUOUT0+ 3 4 TXUOUT0+_LDS
    [17] EV_TXUOUT0+
    EV_TXUOUT1- RP56 1 2 dLVDS@0X2 TXUOUT1-
    R1 or C1 Co-lay for BOM Option
    [17] EV_TXUOUT1-
    [17] EV_TXUOUT1+ EV_TXUOUT1+ 3 4 TXUOUT1+ For Discreate only (EXT EDP or EXT +3V

    [17] EV_TXUOUT2-
    [17] EV_TXUOUT2+
    EV_TXUOUT2-
    EV_TXUOUT2+
    RP57 1
    3
    2 dLVDS@0X2
    4
    TXUOUT2-
    TXUOUT2+
    LVDS)[17] EV_LVDS_BLON R650 OEV@0_4 LVDS_BKLT LVDS_BKLT [22,29]
    TO
    [17] EV_LVDS_PWM R21 OEV@0_4 DPST_PWM EC C12
    [17] EV_TXUCLKOUT- EV_TXUCLKOUT- RP58 1 2 dLVDS@0X2 TXUCLKOUT- [17] EV_LVDS_DIGON R4 OEV@0_4 VDDEN 1000P/50V_4X
    [17] EV_TXUCLKOUT+ EV_TXUCLKOUT+ 3 4 TXUCLKOUT+

    R3 R1,C1 need to
    A
    SKU Note: INT EDP 85ohm close Panel A
    ILVDS->CPU eDP(85 Ohms) to Internal LVDS (90 Ohms) Panel. CNT EDIDCLK
    EDIDDATA
    C15
    C18
    E@2200P/50V_4X
    E@2200P/50V_4X
    dLVDS->GPU dLVDS(90 Ohms) to Panel. EXT EDP 90ohm R4 R2 R1 TXLCLKOUT- C298 *6.8P/50V_4N
    IEDP->CPU eDP(85 Ohms) to Panel. 90ohm 90ohm Panel Backlight PWM Panel Backlight Power TXLCLKOUT+ C300 *6.8P/50V_4N

    dEDP->GPU eDP(85 Ohms) to Panel. INT EDP 85ohmC2 90ohm R6 Panel CNT VIN +VIN_BLIGHT
    RTS2136R DPST_PWM R20 0_4 DPST_PWM_R
    R1 0_6
    OEV@->Only for dEDP or dLVDS mode. EXT LVDS 90ohm R5 C1
    OEDP@->Only for IEDP or dEDP. Stuff R1 for C16
    *4.7U/6.3V_6X
    C14
    0.1U/10V_4X C2 C3 C1 C5
    Quanta Computer Inc.
    LVDS
    OLVDS@->Only for ILVDS or dLVDS. RTS2136R&R6 very interface
    0.1U/50V_6X 0.01U/25V_4X 0.1U/50V_6X 10U/25V_1206X
    PROJECT : BDD
    close R2,R3,R4,R5 as Stuff C1 for Size Document Number Rev
    passible EDP interface. eDP/LCD Connector A1A
    R2 is option LVDS and
    Date: Tuesday, February 05, 2013 Sheet 22 of 37
    5 4
    EDP signals 3 2 1
    5 4 3 2 1

    MINI Card Slot#1(WiFi / Wimax MNW/DEG


    / Combo)
    [AOAC]
    WIMAX_P WIMAX_P +1.5V WIMAX_P
    +3V WIMAX_P

    R7 L3 NAOAC@HCB1608KF-121T30_3A
    10K_4

    B2A 0.5A(30mils) B2A 1 3 +3V_S5


    2.75A(120mils) +3V_S5
    2

    D
    Q4 AOAC@ME1303_3A D
    3 1 PCIE_CLK_WLAN_REQ#_RR
    [8] PCIE_CLK_WLAN_REQ#

    2
    C299 C292 C319 C297 C41 C296 C290 C40 C321
    Q1 ME2N7002E_200MA C43 C42
    *47P/50V_4N [email protected]/10V_4X [email protected]/10V_4X *10U/6.3V_6X [email protected]/16V_4Y *0.1U/16V_4Y [email protected]/10V_4X *10U/6.3V_6X *47P/50V_4N R48
    [email protected]/25V_4X *[email protected]/25V_4X [email protected]_4
    R9 *0_4
    R47 [email protected]/F_4

    Q5 R50 *0_4
    SLP_WLAN# [6]

    3
    CN10
    BT_DISABLE#_INTEL 51 52 2 R49 AOAC@0_4
    NC +3.3V WIMAXP [29]
    49 50
    PLTRST# R44 NMP@0_4 PLTRST#_debug 47 C-Link_RST GND 48
    [2,6,25,28,29] PLTRST# C-Link_DAT +1.5V
    R45 NMP@0_4 PCLK__debug_R 45 46 AOAC@LTC044EUBFS8TL_30MA
    [8] PCLK_DEBUG

    1
    43 C-Link_CLK LED_WPAN# 44
    WIMAX_P 41 GND LED_WLAN# 42 Co-layout with NGFF card.
    Co-layout with NGFF card. 39 NC NC 40
    37 NC NC 38 USBP10_WLAN_R RP5 3 4 WLAN@0X2
    GND USB_D+ USBP10_WLAN [8]
    35 36 USBP10_WLAN#_R 1 2
    GND USB_D- USBP10_WLAN# [8]
    RP3 1 2 WLAN@0X2 PCIE_TXP_WLAN_R 33 34
    [8] PCIE_TXP_WLAN PETp0 GND
    R46 3 4 PCIE_TXN_WLAN#_R 31 32 SDATA_WLAN
    [8] PCIE_TXN_WLAN# PETn0 SMB_DATA
    10K_4 29 30 SCLK_WLAN WIMAX_P
    27 GND SMB_CLK 28
    RP1 1 2 WLAN@0X2 PCIE_RXP_WLAN_R 25 GND +1.5V 26
    [8] PCIE_RXP_WLAN PERp0 GND
    BT_DISABLE#_INTEL 3 4 PCIE_RXN_WLAN#_R 23 24
    [8] PCIE_RXN_WLAN# PERn0 +3.3Vaux
    21 22 PLTRST#
    19 GND PERST# 20 RF_EN
    NC W_DISABLE# RF_EN [29]
    17 18 R30 R29
    NC GND
    3

    2
    15 16 LFRAME#_PCIE R420 NMP@0_4 [email protected]_4 [email protected]_4
    RP43 1 2 WLAN@0X2 CLK_PCIE_WLAN_RR 13 GND NC 14 LAD3_PCIE R417 NMP@0_4 LFRAME# [7,29]
    [8] CLK_PCIE_WLAN REFCLK+ NC LAD3 [7,29]
    2 Q6 3 4 CLK_PCIE_WLAN#_RR 11 12 LAD2_PCIE R414 NMP@0_4 6 1 SDATA_WLAN
    [29] BT_RFCTRL [8] CLK_PCIE_WLAN# REFCLK- NC [7,13] SDATA
    9 10 LAD1_PCIE R413 NMP@0_4 LAD2 [7,29]
    LTC044EUBFS8TL_30MA PCIE_CLK_WLAN_REQ#_RR 7 GND NC 8 LAD0_PCIE R412 NMP@0_4 LAD1 [7,29] Q2A AOAC@2N7002KDW_115MA
    5 CLKREQ# NC 6 LAD0 [7,29]
    1

    3 BT_CHCLK +1.5V 4 R434 NAOAC@0_4


    C BT_DATA GND [13,14,15,16,27] CGDAT_SMB C
    R5 AOAC@0_4 1 2
    [6,28] PCIE_WAKE# WAKE# +3.3V
    WLAN@MPCET-S5201-TP70 WIMAX_P

    5
    3 4 SCLK_WLAN
    [7,13] SCLK
    Q2B AOAC@2N7002KDW_115MA

    R430 NAOAC@0_4
    [13,14,15,16,27] CGCLK_SMB

    NFC Connector
    NGFF 2230 TYPE NGFF WIMAX_P

    REV-C2A Del NFC circuit


    WIMAX_P
    1A(120mils) B2A

    C291 C293 C38 C28 C34


    CN12
    [email protected]/16V_4Y [email protected]/10V_4X *NGFF@47P/50V_4N
    B B
    75 74 *[email protected]/16V_4Y *NGFF@10U/6.3V_6X
    73 GND 3.3V 72
    71 Reserved 3.3V 70
    69 Reserved Reserved 68
    67 GND Reserved 66
    65 2nd Lane PERn1 Reserved 64
    63 2nd Lane PERp1 GPIO0 ME Bias Rail 62
    61 GND I2C IRQ(O)(0/3.3) 60
    59 2nd Lane PETn1 I2C CLK(I)(0/3.3) 58
    57 2nd Lane PETp1 I2C DATA(IO)(0/3.3) 56 RF_EN
    PCIE_WAKE# R429 NGFF@0_4 55 GND W_DISABLE#1(I)(0/3.3V) 54 BT_DISABLE#_INTEL
    PCIE_CLK_WLAN_REQ#_RR 53 PEWake0(IO)(0/3.3V)W_DISABLE#2(I)(0/3.3V) 52 PLTRST#
    NGFF@0X2 51 CLKREQ(IO)(0/3.3V) PERST0(I)(0/3.3V) 50 SUSCLK_R R28 NGFF@0_4
    GND SUSCLK(32kHz)(I)(0/3.3V) SUSCLK [6,7,29]
    CLK_PCIE_WLAN# RP44 1 2 CLK_PCIE_WLAN#_NGFF 49 48
    CLK_PCIE_WLAN 3 4 CLK_PCIE_WLAN_NGFF 47 REFCLKN COEX2(?)(?) 46
    NGFF@0X2 45 REFCLKP COEX1(?)(?) 44
    PCIE_TXN_WLAN# RP4 1 2 PCIE_TXN_WLAN#_NGFF 43 GND COEX0(?)(?) 42 R440 NMP@0_4 PCLK_DEBUG
    PCIE_TXP_WLAN 3 4 PCIE_TXP_WLAN_NGFF 41 PETn0 Reserved 40 R19 NMP@0_4 PLTRST#
    NGFF@0X2 39 PETp0 Reserved 38
    PCIE_RXN_WLAN# RP2 1 2 PCIE_RXN_WLAN#_NGFF 37 GND Reserved 36
    PCIE_RXP_WLAN 3 4 PCIE_RXP_WLAN_NGFF 35 PERn0 UART CTS(I)(0/1.8V) 34
    33 PERp0 UART RTS(O)(0/1.8V) 32
    GND UART Rx(I)(0/1.8V)

    Co-layout with Mini-PCIe card. 23 22


    21 SDIO Reset(I)(0/1.8V) UART Tx(O)(0/1.8V) 20
    19 SDIO Wake(O)(0/1.8V)UART Wake(O)(0/3.3V) 18
    17 SDIO DAT3(IO)(0/1.8V) GND 16
    15 SDIO DAT2(IO)(0/1.8V) LED#2(O)(OD) 14
    13 SDIO DAT1(IO)(0/1.8V) PCMIN(I)(0/1.8V) 12
    11 SDIO DAT0(IO)(0/1.8V) PCMOUT(O)(0/1.8V) 10
    9 SDIO CMD(IO)(0/1.8V) PCMFR1(I)(0/1.8V) 8
    NGFF@0X2 7 SDIO CLK(I)(0/1.8V) PCMCLK(IO)(0/1.8V) 6
    USBP10_WLAN# RP6 1 2 USBP10_WLAN#_NGFF 5 GND LED#1(O)(OD) 4
    USBP10_WLAN 3 4 USBP10_WLAN_NGFF 3 USB_D- 3.3V 2
    A USB_D+ 3.3V A
    1
    GND

    NGFF@51739-0750P-005

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    A1A
    MINI-PCIE(WLAN/NGFF)
    Date: Tuesday, February 05, 2013 Sheet 23 of 37
    5 4 3 2 1
    A B C D E

    Codec (CX20755-11Z) <ADO>


    FILT_1.65V AVDD_3.3
    External MIC <ADO> <EMC>
    MIC1-VREFO 24

    3
    C617 C621 C616 C611
    1U/6.3V_4X 0.1U/16V_4Y 2.2U/6.3V_6X 0.1U/16V_4Y D11
    BAT54A-7-F_200MA

    ADOGND ADOGND

    1
    1.2mA(20mils)
    +3V_S5 R709 0_6 +3AVDD_S5 R405 R406
    1A(100mils)
    R710 0_6 +5V_S5
    C620 C607 3.01K/F_4 3.01K/F_4
    0.1U/16V_4Y 1U/6.3V_4X 3 CN3
    4 6 4
    C598
    0.1U/16V_4Y MIC1_L1 C624 2.2U/6.3V_6X MIC1_L2 R396 0_4 MIC1_L3 1

    0.061mA(15mils) GND MIC1_R1 C630 2.2U/6.3V_6X MIC1_R2 R386 0_4 MIC1_R3 2


    R717 0_6 755_VDD_IO 4
    +3V_S5 +3V_S5
    GND
    (40mils) Port_B# 5
    C605 CLASSD_5V +3V_S5 C270 2SJ3061-003111F
    0.1U/16V_4Y SENSE_A_MIC1# R721 C263
    C266 Normal Open Jack

    3
    C597 C586 C614 C585 *100P/50V_4N
    GND 0.1U/16V_4Y 4.7U/6.3V_6X 0.1U/16V_4Y 4.7U/6.3V_6X 20K/F_4 *100P/50V_4N *0.1U/10V_4X
    48.7mA(20mils) Q60 R391 ADOGND
    +3AVDD_S5 2 SENSE_MIC_IN Port_B#
    C593 100K_4

    3
    FILT_1.8V 0.1U/16V_4Y Close to pin13, 16 D8
    C594 GND ME2N7002E_200MA GND
    0.1U/16V_4Y C615 C613 Q59

    1
    4.7U/6.3V_6X 0.1U/16V_4Y 2 R393 0_4 Port_B# *VPORT 0603 220K-V05

    GND +3AVDD_S5 ADOGND C629

    18

    24

    29

    27

    28

    13
    16

    11
    3

    2
    7
    GND U30 ME2N7002E_200MA GND D10 *VPORT 0603 220K-V05 MIC1_L3
    *0.1U/10V_4X GND
    To EC High Active

    VDD_IO

    CLASS-D_REF
    VDDO33

    DVDD33

    LPWR_5.0
    RPWR_5.0
    FILT_1.8V

    AVDD_HP

    FILT_1.65V

    AVDD_3.3V

    AVDD_5V

    1
    GND C601 *0.1U/16V_4Y
    R734 [29] SENSE_MIC_IN SENSE_MIC_IN GND D7 *VPORT 0603 220K-V05 MIC1_R3
    9 5.11K/F_4
    [7] ACZ_RST#_AUDIO RESET# ADOGND ADOGND
    R735 20K/F_4 SENSE_A_MIC1#
    R720 *SHORT_4 ACZ_BITCLK_RR 5
    [7] BIT_CLK_AUDIO
    [7] ACZ_SYNC_AUDIO
    R719 33_4 SDATA_IN
    8
    6
    BIT_CLK
    SYNC JSENSE
    38
    35
    SENSE_A
    TP73
    R400 39.2K/F_4 Port_A# Headphone <ADO> 3 CN5
    [7] ACZ_SDIN0_AUDIO SDATA_IN MICBIASC
    4 34 MIC1-VREFO_B R738 *SHORT_4 MIC1-VREFO 6
    [7] ACZ_SDOUT_AUDIO SDATA_OUT MICBIASB HP_A_L R715 5.1/F_6 HPOUT-L2 L14 HCB1608KF-121T20_2A HPOUT-L3 1

    33 MIC1-RR R743 100/F_4 MIC1_R1 HP_A_R R718 5.1/F_6 HPOUT-R2 L15 HCB1608KF-121T20_2A HPOUT-R3 2
    PORTB_R_LINE 32 MIC1-LL R729 100/F_4 MIC1_L1 4
    AMP_MUTE#_R 39 PORTB_L_LINE
    SPKR_MUTE# 26 Port_A# 5
    C599 0.1U/16V_4Y PCBEEP_C 10 HGNDB 25 MIC1-RR C627 *0.47U/6.3V_4X
    [7] PCBEEP 2SJ3061-003111F
    PCBEEP HGNDA 31 TP72
    3 3
    PORTD_B_MIC 30 TP71 MIC1-LL C628 *0.47U/6.3V_4X C286 C277 C272
    PORTD_A_MIC ADOGND
    Normal Open Jack
    INT_DMIC_DATA 1 23 HP_A_R *100P/50V_4N *100P/50V_4N *0.1U/16V_4Y
    [22] INT_DMIC_DATA 40 DMIC_DAT/GPIO1 PORTA_R 22
    R732 33_4 DMIC_CLK HP_A_L
    [22] INT_DMIC_CLK DMIC_CLK/MUSIC_REQ/GPIO0 PORTA_L GND
    ADOGND
    +3V_S5 21 AVEE
    AVEE 20 FLY_N HPOUT-L3 C274 *0.1U/10V_4X
    FLY_N 19 FLY_P C595 1U/6.3V_4X GND
    ADO_GPIO1 R736 0_4 ADO_GPIO1_R 37 FLY_P C600 C591 HPOUT-R3 C285 *0.1U/10V_4X
    R741 36 GPIO1/PORTC_R_MIC
    MUSIC_REQ/GPIO0/PORTC_L_MIC GND
    100K_4 0.1U/16V_4Y 2.2U/6.3V_6X
    From EC
    [29] AMP_MUTE#
    AMP_MUTE# R733 0_4 4 Speakers <ADO>

    EP_GND
    RIGHT+
    RIGHT-
    LEFT+

    LEFT-

    R737 0_4 S&M_EN_R GND


    [29] S&M_EN
    Close to IC Close to Connector
    CX20755-11Z +3VPCU CN21
    High Active
    12

    14

    15

    17

    41
    SPK_L+ R705 0_6 INSPKL+N R181 BLM18AG221SN1D_200MAINSPKL+N_C 1
    SPK_L- R706 0_6 INSPKL-N R189 BLM18AG221SN1D_200MAINSPKL-N_C 2 1
    SPK_R- R707 0_6 INSPKR-N R188 BLM18AG221SN1D_200MAINSPKR-N_C 3 2
    C610 0.1U/16V_4Y R799
    INT:SPK SPK_R+ R708 0_6 INSPKR+N R187 BLM18AG221SN1D_200MAINSPKR+N_C 4 3
    SPK_L+ 105_AMP_MUTE# 105_SPK_L+ R711 0_6 105_INSPKL+N R186 BLM18AG221SN1D_200MA105_INSPKL+N_C 5 4
    C262 0.1U/16V_4Y 10K_4 105_SPK_L- R712 0_6 105_INSPKL-N R185 BLM18AG221SN1D_200MA105_INSPKL-N_C 6 5
    6

    3
    SPK_L- 105_SPK_R- R713 0_6 105_INSPKR-N R184 BLM18AG221SN1D_200MA105_INSPKR-N_C 7
    C289 *0.1U/16V_4Y
    EXT:105_SPK 105_SPK_R+ R714 0_6 105_INSPKR+N R183 BLM18AG221SN1D_200MA105_INSPKR+N_C 8 7
    SPK_R- 8 9
    C288 *0.1U/16V_4Y 2 9 10
    [29] 105_AMP_MUTE REV-B2A Modify 220ohm bead for EMI Suggestion 10
    SPK_R+
    Place all FB options and caps very close to codec and Amp.
    Twitter SPK R744
    R402
    *0_4
    *0_4
    Q68
    ME2N7002E_200MA
    88266-080L

    +3V_S5 INSPKL-N GND

    1
    INSPKL+N
    +3V_S5 +3V_S5 +5V_S5 INSPKR-N
    GND ADOGND INSPKR+N
    R742 GND
    2
    Need to connect ADOGND to system 2
    20K/F_4 R728 R727 GND under codec using copper trace REV-D3A Add Q68 for fixed SPK pop noise issue C581 C580 C578 C579
    about 200mils wide. 1000P/50V_4X 1000P/50V_4X 1000P/50V_4X 1000P/50V_4X
    10K_4 10K_4
    2

    ADO_GPIO1 2
    GND GND GND GND
    3 105_AMP_MUTE#_Q 1 3 105_AMP_MUTE#
    105_INSPKL-N
    AMP_MUTE# 1 D21 Q61 +5V_S5 C626 *0.47U/6.3V_4X DMIC_CLK 105_INSPKL+N
    2N7002K_300MA 105_INSPKR-N
    BAT54A-7-F_200MA C625 C623 *0.47U/6.3V_4X INT_DMIC_DATA 105_INSPKR+N
    0.1U/16V_4Y Close to IC
    R726 *0_4 105_PVDD 105_PVDD C602 *10P/50V_4C ACZ_RST#_AUDIO
    105_AMP_MUTE# L23 HCB1608KF-121T20_2A C590 C589 C587 C588
    GND C603 C596 C609 *10P/50V_4C ACZ_BITCLK_RR 680P/50V_4X 680P/50V_4X 680P/50V_4X 680P/50V_4X

    C707 0.1U/16V_4Y 10U/6.3V_6X C608 C612 *10P/50V_4C ACZ_SDOUT_AUDIO


    GND GND GND GND
    *10U/6.3V_6X U31 10U/6.3V_6X
    Close to IC
    3

    GND GND
    FAE suggestion_0924 GND
    PVDD1

    PVDD2

    REV-D3A Add 105_AMP_MUTE# GND


    GND to 10U/6.3V_6X PD for fixed SPK pop noise issue
    R725 3.9K/F_4 105_INSPKR+N_C
    ADOGND
    Output Gain Table 105_INSPKR-N_C
    HP_A_R C632 1U/6.3V_4X 105_IN_R_C R731 1K_4 105_IN_R_R C619 1U/6.3V_4X 105_IN_R 9 5 105_SPK_R- 105_PVDD 105_PVDD INSPKR+N_C
    INPUT-R OUT-RN INSPKR-N_C
    OUT-RP
    6 105_SPK_R+
    R740 R739
    G1 G2 Gain INSPKL-N_C
    INSPKL+N_C
    105_AMP_MUTE# 7 *0_4 *0_4 105_INSPKL-N_C
    PD# 105_INSPKL+N_C
    105_G1 105_G2 0 0 11dB
    HP_A_L C631 1U/6.3V_4X 105_IN_L_C R730 1K_4 105_IN_L_R C618 1U/6.3V_4X 105_IN_L 10 2 105_SPK_L-
    INPUT-L OUT-LN
    R724 3.9K/F_4 1 105_SPK_L+ 0 1 14dB C127 C126 C134 C130 C129 C128 C125 C124
    ADOGND OUT-LP
    8 R723 R722 1000P/50V_4X 1000P/50V_4X 1000P/50V_4X 1000P/50V_4X 1000P/50V_4X 1000P/50V_4X 1000P/50V_4X 1000P/50V_4X
    BYPASS 11 105_G1
    +3VPCU G1 12 105_G2
    0_4 0_4
    1 0 19dB
    G2
    GND

    C622 GND GND GND GND GND GND GND GND


    1
    1 1 25dB 1
    R798 2.2U/6.3V_6X ADOGND ADOGND
    13

    ALC105-GRT
    1K_4
    For EMI reserve, close to connector
    Close to IC dB value follow FAE suggestion 09/17
    Port_A 105_IN_R_R 105_IN_L_R
    ADOGND GND
    3

    Port_A# 2 Port_A 2 Port_A 2

    Q65
    ME2N7002E_200MA
    Q66
    ME2N7002E_200MA
    Q67
    ME2N7002E_200MA
    Quanta Computer Inc.
    PROJECT : BDD
    1

    REV-D3A Add Q65,Q66,Q67 for fixed HP input pop noise issue Size Document Number Rev
    GND GND GND A1A
    Codec(CX20755 S&M+4SPKS)
    Date: Tuesday, February 05, 2013 Sheet 24 of 37
    A B C D E
    A B C D E

    2 IN 1 CARD READER (Type: MS/SD)


    Card Reader (RTS5227-GRT PCI-E)
    <MMC>
    SP1 => SD_D1
    25
    [2,6,7,8,9,10,13,14,15,16,17,18,19,20,21,22,23,27,29,31,35] +3V
    SP2 => MS_D1 /SD_D0
    SP3 => MS_D0 /SD_CLK
    SP4 => MS_D2 /SD_CMD

    C275
    4 4
    +3VCARD +3V
    SP5 => MS_D3 /SD_D3

    DV33_18
    SP6 => MS_CLK/SD_D2

    1U/10V_4X
    C287 C281
    SP7 => MS_BS /SD_WP
    Chanege interface from USB3.0 to PCIE 10U/6.3V_6X 0.1U/10V_4X

    A1A

    25

    10

    15
    U16

    9
    SD / MMC

    CARD_3V3

    DV33_18
    GND

    3V3_IN
    1
    [8] PCIE_TXP_CR
    [8] PCIE_TXN_CR#
    2 HSIP
    HSIN
    CARD READER
    EMI solution
    20 SD_WP CN27
    [8] CLK_PCIE_CR
    3
    REFCLKP
    SP7
    SP6
    18 SP6_R R401 0_4 SD_D2 Place close to
    [8] CLK_PCIE_CR# 4
    REFCLKN SP5
    17
    16
    SP5_R R755
    SP4_R R756
    0_4 SD_D3 C655
    0_4 SD_CMD
    *10P/50V_4C
    Connector +3VCARD 4
    VDD
    [8] PCIE_RXP_CR C276 0.1U/10V_4XPCIE_RXP_CR_C 5
    6 HSOP
    RTS5229 SP4
    SP3
    14
    13
    SP3_R R758 22_4 SD_CLK C654 10P/50V_4C +3VCARD SD_D0 7
    8 DAT0
    [8] PCIE_RXN_CR# C278 0.1U/10V_4XPCIE_RXN_CR#_C SP2_R R757 0_4 SD_D0 SD_D1
    HSON SP2 11 DV12_S SD_D2 9 DAT1
    DV12_S SD_D3 1 DAT2
    23 DAT3 10
    [2,6,23,28,29] PLTRST#

    MS_INS#
    PERST# GND

    SD_CD#
    24 C653 C284
    [8] PCIE_CLK_CR_REQ# CLKREQ#

    RREF
    0.1U/10V_4X 4.7U/10V_6X 3

    GPIO
    AV12
    VSS1

    SP1
    C634 C657 SD_CMD 2 6
    0.1U/10V_4X SD_CLK 5 CMD VSS2 13
    3 10U/6.3V_6X CLK GND
    3
    RTS5229-GRT SD_CD# 11 14
    7

    19

    21
    22
    12
    SD_WP 12 C/D GND 15
    W/P GND 16
    RREF

    Close to chip pin GND

    SD_CD#

    SP1_R
    AV12
    PSDBT0-09GLBS1N14H1
    6.2K/F_4
    R404

    C656 C282
    4.7U/10V_6X 0.1U/10V_4X ｜CLK – DATA︱
    ︱trace length ≦ 300 mils
    R759 0_4 SD_D1

    R760 10K/F_4 +3V

    Share Pin
    EMI Solution
    Please help to close to connector
    2 2
    SD_CMD SD_D0 SD_D1 SD_D2 SD_D3 SD_CLK

    C638 C636 C640 C637 C639 C641


    *5.6P/50V_4C 5.6P/50V_4C 5.6P/50V_4C 5.6P/50V_4C 5.6P/50V_4C *5.6P/50V_4C
    B test

    1 1

    Quanta Computer Inc.


    PROJECT :BDD
    Size Document Number Rev
    A1A
    Card Reader (RTS5229) & CR SOCKET
    Date: Tuesday, February 05, 2013 Sheet 25 of 37
    A B C D E
    5 4 3 2 1

    <SLC> <SLC> For EMI <SLC>


    USB w S&C MAXIM solution
    27
    +3V_S5 +3VPCU +5V_S5 For EMI
    +5V_S5 RP36
    USBP0+ 1 2 USBP0+_R +5V_S5 RP40
    [8] USBP0+ 4 3 1 2
    REV-C2A Add pull-up USBP0- USBP0-_R USBP1+ USBP1+_R
    [8] USBP0- [8] USBP1+
    to +3V_S5 for fixing leakage [8] USBP1- USBP1- 4 3 USBP1-_R
    R787 R786 R261 MCM2012D900FBE_300MA
    14566/14600/14617 MCM2012D900FBE_300MA
    S&C@0_4 *S&C@0_4 *S&C@10K_4 C167
    R1 R2 R3 R4 R5 R6 R7 C246
    M/B side(up port)
    14566 V V V S&[email protected]/10V_4X M/B side(Down port)
    U12 S&[email protected]/10V_4X

    2
    14600 V V Close to U12 IC U13
    Close to U13 IC
    14617(no CB2) V V V 1 3 SC_SCL 5 6 USBP0+_R R583 NS&C@0_4
    [17,29] 3ND_MBCLK VCC TDP 7 USBP0-_R R586 NS&C@0_4 5 6 USBP1+_R R626 NS&C@0_4
    14641/14642/14644 V V Q17 S&C@ME2N7002E_200MA R594
    R7 *S&C@0_4 TDM VCC TDP 7 USBP1-_R R629 NS&C@0_4
    R593 *S&C@0_4 CB1_CEN#_CB2 1 TDM
    D
    14640/14651 V V +3V_S5 +3VPCU +5V_S5 [29] USB_BUS_SW3 R1 R592 *S&C@0_4 CB0_SDA 8 CB1/CEN#/CB2/INT# CB1_CEN#_CB2 R816 *S&C@0_4 CB1_CEN#_CB2_51 1
    D
    [29] USB_BUS_SW2 R2
    SC_SDA R588 S&C@0_4 CB0/SDA 3 USBP0+_S&C_R CB0_SDA 8 CB1/CEN#/CB2/INT#
    DP 2 USBP0-_S&C#_R CB0/SDA 3 USBP1+_S&C_R
    R3 DM DP 2 USBP1-_S&C#_R
    DM
    R789 R788 R271 9 4 GND_CB1 R581
    R4 *S&C@0_4 USB_BUS_SW3
    GND GND/CB1/SCL 9 4 GND_CB1
    S&C@0_4 *S&C@0_4 *S&C@10K_4 R584
    R5 S&C@0_4 SC_SCL GND GND/CB1/SCL
    S&C@MAX14640ETA+
    R582
    R6 *S&C@0_4 S&C@MAX14651ETA+

    2
    SW2 SW3 14600
    1 3 SC_SDA <EMI> <U3B> <USB> <EMI> <U3B> <USB>
    CB0 CB1 Status
    [17,29] 3ND_MBDATA
    Q18 S&C@ME2N7002E_200MA
    USB 3.0 CONN USB 3.0 CONN
    0 0 Auto mode Charger , AM
    CN23
    Force dedicated charger mode Charger , FM +5VSUS_USBP0 1 CN24
    0 1 USBP0-_S&C#_R 2 1 VBUS +5VSUS_USBP1 1
    2 D- 1 VBUS
    Pass-Through(USB) mode USB , PM USBP0+_S&C_R 3 USBP1-_S&C#_R 2
    1 0 4 3 D+ USBP1+_S&C_R 3 2 D-
    USB3_RXN1 R249 0_4 USB3_RXN1_R 5 4 GND 4 3 D+
    1 1 pass-through(USB) with CDP USB , CM [8] USB3_RXN1 5 SSRX- 4 GND
    USB3_RXP1 R253 0_4 USB3_RXP1_R 6 USB3_RXN2 R312 0_4 USB3_RXN2_R 5
    Emulation [8] USB3_RXP1
    7 6 SSRX+ [8] USB3_RXN2
    USB3_RXP2 R316 0_4 USB3_RXP2_R 6 5 SSRX-
    7 GND [8] USB3_RXP2 6 SSRX+
    [8] USB3_TXN1 USB3_TXN1 C190 0.1U/10V_4X USB3_TXN1_C R274 0_4 USB3_TXN1_R 8 7
    USB3_TXP1 C198 0.1U/10V_4X USB3_TXP1_C R280 0_4 USB3_TXP1_R 9 8 SSTX- USB3_TXN2 C257 0.1U/10V_4X USB3_TXN2_C R356 0_4 USB3_TXN2_R 8 7 GND
    [8] USB3_TXP1 9 SSTX+ [8] USB3_TXN2 8 SSTX-
    SW2 SW3 14641 USB3_TXP2 C259 0.1U/10V_4X USB3_TXP2_C R365 0_4 USB3_TXP2_R 9

    13
    12
    11
    10
    [8] USB3_TXP2 9 SSTX+

    13
    12
    11
    10
    CB0 CB1 Status 2UB4039-900101F

    13
    12
    11
    10
    For EMI 2UB4039-900101F

    13
    12
    11
    10
    0 0 2A Auto mode for Apple device Charger , AM2 For EMI

    1 0 Force 1A for Apple device Charger , AP1


    0 1 Pass-Through(USB) mode USB , PM USB3.0: DFHS09FR355
    REV-D3A Del co-lay EMI common chock M/B side(up port) USB3.0: DFHS09FR355
    C
    1 1 pass-through(USB) with CDP USB , CM for fixing SMT solder open risk. Support Sleep REV-D3A Del co-lay EMI common chock M/B side(Down port) C

    Emulation & Charge for fixing SMT solder open risk. Support Sleep
    & Charge

    SW2 SW3 14644


    CB0 CB1 Status
    0 0 2A Auto mode for Apple device Charger , AM2
    USB 3.0 Power switch <U2B><USB><U3B> USB 3.0 Power switch <U2B> <USB><U3B>
    1 0 Force dedicated charger mode Charger , FM +3V_S5 +5V_S5
    Pass-Through(USB) mode USB , PM +3V_S5 +5V_S5
    0 1 Change power CAP to 220U. 20121017
    150 mils (Iout=3.5A) Change power CAP to 220U. 20121017
    1 1 pass-through(USB) with CDP USB , CM 150 mils (Iout=3.5A)
    R810 U27
    Emulation UP7534BRA8-15 R822 U28
    2 8
    80 mils (Iout=2A)
    10K_4 +5VSUS_USBP0 UP7534BRA8-15 80 mils (Iout=2A)
    3 IN1 OUT3 7 10K_4 2 8 +5VSUS_USBP1
    IN2 OUT2 6 3 IN1 OUT3 7
    SW2 SW3 14642 OUT1 IN2 OUT2
    USB_SC_EN#_0 4 C539 6
    1 EN# C544 R600 USB_SC_EN#_1 4 OUT1 C566
    CB0 CB1 Status GND EN#
    9 5 *10U/6.3V_6X 220U/6.3V_105CS_E18e 1 C573 R689
    C559 GND-C OC# 470/F_4 9 GND 5 *10U/6.3V_6X 220U/6.3V_105CS_E18e
    X 0 2A Auto mode for Apple device Charger , AM2 GND-C OC#
    C582 470/F_4
    Pass-Through(USB) mode USB , PM 1U/16V_6X
    0 1

    3
    1U/16V_6X

    3
    1 1 pass-through(USB) with CDP USB , CM
    Emulation 2
    2
    Q48
    ME2N7002E_200MA Q52
    USB_P0_OC# ME2N7002E_200MA
    USB_P0_OC# [29]

    1
    USB_P1_OC#
    USB_P1_OC# [29]

    1
    B B

    REV-B2A Del LAN PCIE signals and Add LAN signals to Daughter board
    ESD Protect
    USB_P0_OC# R806 *S&C@0_4 USB_P1_OC#
    USB2.0 & Lan (Daughter/B) +5V_S5 +3V_S5 USBP0-_S&C#_R C172
    1 2
    *PGB1010402KR USBP1-_S&C#_R C252
    1 2
    *PGB1010402KR

    CN1 R805 *S&C@0_4


    1 TX0P TX0P [28] +3V_S5 R804 S&C@10K_4
    2 TX0N TX0N [28] D26
    3 C339 C346 C335 USB_P0_OC# 2
    4 TX1P TX1P [28] USBP0+_S&C_R C168 *PGB1010402KR USBP1+_S&C_R C247 *PGB1010402KR
    5 TX1N *0.1U/10V_4X *10U/6.3V_6X *0.1U/10V_4X 3 USB_SC_OC# 1 2 1 2
    TX1N [28] USB_SC_OC# [8]
    6
    7 TX2P USB_P1_OC# 1
    TX2P [28]
    8 TX2N TX2N [28]
    9 +3V_S5 R807 S&C@10K_4 BAT54A-7-F_200MA
    10 TX3P TX3P [28]
    11 TX3N TX3N [28] USB3_RXN1_R C157 *PGB1010402KR USB3_RXN2_R C239 *PGB1010402KR
    12 1 2 1 2
    13 REV-D3A Add for wake on USB
    14 USBP2_EXT1
    USBP2_EXT1 [8]
    15 USBP2_EXT1# Small board(up port)
    USBP2_EXT1# [8]
    16
    17 USBP3_EXT2 USB_SC_EN#_0 R817 *S&C@0_4 USB_SC_EN#_1 USB3_RXP1_R C159 *PGB1010402KR USB3_RXP2_R C243 *PGB1010402KR
    USBP3_EXT2 [8] 1 2 1 2
    18 USBP3_EXT2#
    USBP3_EXT2# [8] Small board(Down port)
    19
    USB_Normal_EN# [29]
    20 R812 *S&C@0_4
    USB_Normal_OC# [8,29]
    21
    22 USB3_TXP3
    USB3_TXP3 [8] +3V_S5 +3V_S5
    23 USB3_TXN3 USB3_TXN3 [8]
    24 USB3_TXN1_R C188 *PGB1010402KR USB3_TXN2_R C256 *PGB1010402KR
    25 USB3_RXP3 1 2 1 2
    USB3_RXP3 [8] Small board(up port)
    26 USB3_RXN3 USB3_RXN3 [8] C708 0.1U/10V_4X C709 0.1U/10V_4X
    A 27 R811 S&C@10K_4 +3V_S5 R818 S&C@10K_4 +3V_S5 A
    28 USB3_TXP4 U34 U35
    USB3_TXP4 [8]
    5

    5
    29 USB3_TXN4 1 1
    USB3_TXN4 [8] USB_SC_EN# [29] SKU_STRAP_3 [29]
    30 Small board(Down port) USB_SC_EN#_0 4 USB_SC_EN#_1 4 USB3_TXP1_R C202 *PGB1010402KR USB3_TXP2_R C260 *PGB1010402KR
    31 USB3_RXP4 2 CB1_CEN#_CB2 2 CB1_CEN#_CB2_51 1 2 1 2
    USB3_RXP4 [8]
    32 USB3_RXN4 USB3_RXN4 [8] R814 *S&C@10K_4 +5V_S5 R820 *S&C@10K_4 +5V_S5
    3

    3
    33 S&C@TC7SH32FU R815 S&C@10K_4 S&C@TC7SH32FU R821 S&C@10K_4
    34 +3V_S5
    35
    36
    37
    38
    39
    Quanta Computer Inc.
    40 +5V_S5 PROJECT : BDD
    AF7401-N2G1Z Size Document Number Rev
    A1A
    USB 3.0/IO Board
    Date: Tuesday, February 05, 2013 Sheet 26 of 37
    5 4 3 2 1
    A B C D E

    Keyboard Connector <KBC> <EMI> Touch Pad Connector <TPD> <EMI> Power Botton Connector <PSW>
    +3VPCU
    CN18
    35

    34
    K_LED_P
    +3V_TP

    C475
    +3V_TP

    C476 Need check


    28

    5
    RP59 MY16 CN7
    33 MY16 [29]
    10 1 10KX8 MX4 [email protected]/6.3V_6X [email protected]/10V_4X

    5
    32 +3VPCU 1
    MX0 9 2 MX3 MY17 NBSWON#
    31 MY17 [29] [29] NBSWON# 2
    MX5 8 3 MX2 PB_LED
    30 [29] PB_LED 3
    MX6 7 4 MX7
    29 4

    6
    MX1 6 5 MY2
    28 MY2 [29]
    MY1 88266-040L
    MY1 [29] (20mils)

    6
    4 27 MY0 R521 *0_6 4
    26 MY0 [29] +5V
    MY4 CN19
    25 MY4 [29]
    C457 *220P/50V_4X MX7 MY3 +3V R524 0_6 +3V_TP 1
    24 MY3 [29] 2 1
    C456 *220P/50V_4X MX2 MY5 L8 FCM1608KF-121T04_400MA
    23 MY5 [29] [29] TPDATA 3 2
    C449 *220P/50V_4X MX3 MY14 L7 FCM1608KF-121T04_400MA
    C450 *220P/50V_4X MX4 22
    21
    MY6
    MY14 [29]
    MY6 [29]
    [29] TPCLK 4
    5
    3
    4
    <EMC> NBSWON#
    MY7 CGCLK_SMB R152 0_6
    20 MY7 [29] [13,14,15,16,23] CGCLK_SMB 5
    MY13 CGDAT_SMB R151 0_6 6
    19 MY13 [29] [13,14,15,16,23] CGDAT_SMB 6
    MY8 C294
    18 MY8 [29]
    C451 *220P/50V_4X MX0 MY9 50503-0060N-001
    17 MY9 [29]
    C452 *220P/50V_4X MX5 MY10 1000P/50V_4X
    16 MY10 [29]
    C453 *220P/50V_4X MX6 MY11 C463 C464 C462 C461
    15 MY11 [29]
    C454 *220P/50V_4X MX1 MY12 *220P/50V_4X *220P/50V_4X *1000P/50V_4X*1000P/50V_4X
    14 MY15
    MY12 [29] Touchpad default SMBUS address: 0x2C
    13 MY15 [29]
    MX7
    12 MX7 [29]
    MX2
    11 MX2 [29]
    C118 *220P/50V_4X MY7 MX3
    10 MX3 [29]
    C119 *220P/50V_4X MY13 MX4
    9 MX4 [29]
    C471 *220P/50V_4X MY12 MX0
    8 MX0 [29]
    C455 *220P/50V_4X MY15
    7
    6
    MX5
    MX6
    MX5 [29]
    MX6 [29] LED <LED>
    MX1
    5
    4
    K_LED_P
    MX1 [29]
    LED-Power BATERRY
    CAPSLED
    3 CAPSLED [29]
    C115 *220P/50V_4X MY3
    C114 *220P/50V_4X MY5 2 NUMLED
    1 NUMLED [29]
    C116
    C117
    *220P/50V_4X
    *220P/50V_4X
    MY14
    MY6
    POWER BATT LED (DC-IN)
    36 Full Charge = Red 2mA
    196497-34041-3 +3VPCU
    3
    C111 *220P/50V_4X MY2
    Power on = Red 3

    C110 *220P/50V_4X MY1 2 -BATLED0 R411 150/F_4 BAT_SAT0#


    BAT_SAT0# [29]
    C113 *220P/50V_4X MY0 REV-D3A Change KB 2 1 -SUSLED R746 120/F_4 SUSLED_EC#
    C112 *220P/50V_4X MY4 LED2 12-21/R6C-AP1Q2L/2C SUSLED_EC# [29] 1
    footprint to 196497-34041-3 +3VPCU

    3
    NUMLED
    CAPSLED 3 -BATLED1 R409 150/F_4 BAT_SAT1#
    C107 *100P/50V_4N MY17 K_LED_P
    S3 Mode = Red 2mA LED1 12-22/S2SR6C-C30/2C BAT_SAT1# [29]

    Charging = Amber 2mA


    C465 C473 C474
    C108 *100P/50V_4N MY16 220P/50V_4X 220P/50V_4X 220P/50V_4X RF
    LED Red
    (10mils) R748 AOAC@100_4 2 1 RF_LED#
    +3V R520 150_4 K_LED_P ESD +3V_S5
    +3V R747 NAOAC@100_4 LED3 12-21/R6C-AP1Q2L/2C RF_LED# [29]

    Protect <EMC>

    3
    REV-C2A Modify CN20 footprint
    FOR POWER FOR BATTERY LED
    K/B LED power
    LED and W-LAN
    0.35A(20mils) LED D22 Control Switch Button Connector
    CN20 D12

    5
    R525 0_6 +5V_KBLED RF_LED# -BATLED1 CN9
    <KBP> +5V 4 5 1 1

    5
    [9] BOARD_ID3 3 6 1
    2 3 3 [29] 3D_ECO_LED 2
    2 1 [29] 3D_ECO_EN# 3 2
    -SUSLED -BATLED0 R419 *ECO@0_4
    2 2 +5V 4

    6
    KBP@91523-00401-001
    *PJMBZ5V6 *PJMBZ5V6 R416 **ECO@0_4 *ECO@0503-0040N-001
    +3V

    6
    3

    KB_LED R523 KBP@300_4 2 Q38


    [29] KB_LED
    KBP@MMBT2222A_600MA
    +5V for White/Green LED
    +3V for Red LED
    1

    REV-A1A EMI suggestion C477


    +5V *KBP@1U/6.3V_4X DC IN/BAT charge Power Wireless

    C479 10F/10FG/10S/10SG White/Amber(+5VPCU) White/Amber(+5VPCU) Amber

    *0.1U/10V_4X
    10FH/10SH Red/Amber(+3VPCU) Red/Amber(+3VPCU) Red
    For safety concern

    DC IN/BAT charge Power Wireless


    Logo LED Connector for front TOP base +5V_S5
    +5V 90mA(Max) Control I/O net name BAT_SAT0# BAT_SAT1# PWRLED# SUSLED_EC# RF_LED#
    2

    CN26 Active Status Low Low Low Low Low


    *Logo_led@87212-0200L

    1 1
    1

    REV-D3A Change CN6 footprint


    to 87212-0200l-2p-l
    3

    LOGO_LEDR716 *Logo_led@300_4 2 Q58


    [22,29] LOGO_LED
    *Logo_led@MMBT3904-7-F
    Quanta Computer Inc.
    1

    C604

    **Logo_led@1U/6.3V_4X
    PROJECT : BDD
    Size Document Number Rev
    A1A
    HDD/ODD/FAN/KEY CONN
    Date: Tuesday, February 05, 2013 Sheet 27 of 37
    A B C D E
    5 4 3 2 1

    277mA(30mils)
    LAN <LAN/LN1.LNG> LAN_VDD33
    C660 C661 C662
    LAN_VDD33

    C663 C664
    U33
    34
    G=

    G=
    1 39 LAN_LINKLED#
    4.7U/6.3V_6X 10U/6.3V_6X *1000P/50V_4X 1U/6.3V_4X 0.1U/16V_4Y VDD33 LED1/LED_LINK10/100n 38 LAN_ACTLED AR8161/8162 Pin 23 for LAN LED, No use NC.
    i1

    i1
    LED0/LED_ACTn 23
    LED2/CLKREQn
    AVDDVCO add C5456,5547,C5548 by FAE's
    gA

    g=
    C665 1U/6.3V_4X
    R9867 are pull-up resisters,which might command.20120914
    A
    0

    0 R761 *4.7K_4 37 DVDDL C666 0.1U/16V_4Y AVDDVCO C667


    PPS is used for IEEE 1588 timing synchronization 0.1U/16V_4Y
    aL

    aL LAN_VDD33 not be necessory due to existence on DVDD_REG 24 R762 *499/F_4 PPS and is an output pin to output an accurate 1Hz
    motherboard. PPS clock.
    /

    /
    2 31 AVDDL C668 0.1U/16V_4Y C669 4.7U/6.3V_6X
    :0

    :A
    [2,6,23,25,29] PLTRST# PERSTn AVDDL Currently this pin can be floating.
    PCIE_LAN_WAKE# 3
    WAKEn
    Atheros AVDDL
    34 AVDDVCO
    0

    D CKREQ# 4 C670 1U/6.3V_4X D


    1

    1
    A0

    QL

    CLKREQn 33 CLK_PCIE_LAN
    R763 30K/F_4 DEBUGMODE 5 REFCLKP 32 CLK_PCIE_LAN# CLK_PCIE_LAN [8]
    0
    0

    LAN_VDD33 DEBUGMODE REFCLKN CLK_PCIE_LAN# [8]


    R8

    C0

    36
    LAN_VDD33 LAN_VDD33 RX_N 35 PCIE_TXN_LAN# [8]
    If AVDDL/DVDDL comes from internal SWR:
    8
    0

    AVDDL 6 RX_P 30 PCIE_RXP_LAN_C C671 0.1U/10V_4X PCIE_TXP_LAN [8]


    81

    A0

    AVDDL_REG TX_P PCIE_RXP_LAN [8] mount L5036.


    AR8161/AR8162 TX_N
    29 PCIE_RXN_LAN#_C C672 0.1U/10V_4X
    PCIE_RXN_LAN# [8]
    1

    But,if comes from internal LDO, no mount L5036.


    :

    :
    16

    88

    C674 C675 C673 15P/50V_4C LAN_XTLO 7 28 AR8161/62/71/72 PIN28 NC


    XTLO NC
    7

    R764 27 AVDDVCO L24 AVDDL L25 DVDDL


    A

    Q
    61

    11

    TESTMODE

    2
    1
    4.7K_4 0.1U/16V_4Y 1U/6.3V_4X HCB1608KF-601T10_1A *SWR@HCB1608KF-601T10_1A
    LAN_XTLI 8 QCA8171/QCA8172 26
    1
    R

    XTLI SMDATA TP74


    2
    10

    77

    Y4 25 (30mils)
    SMCLK TP75
    25MHZ_30
    0
    8

    6 1 PCIE_LAN_WAKE# 40 LX L26 *[email protected]_C_1A DVDDL


    -0

    12

    [6,23] PCIE_WAKE#

    3
    4
    C676 15P/50V_4C AVDDH 9 LX
    AVDDH_REG If AVDDL/DVDDL comes from internal SWR:
    0
    1

    Q64A 2N7002KDW_115MA C677 C678 C679


    B3

    -0

    R765 2.37K/F_4 RBIAS 10 41 mount L5035,C5467,C5468,C5469.


    RBIAS GND1 But,if comes from internal LDO, no mount.
    *

    *SWR@1000P/50V_4X *SWR@10U/6.3V_6X *[email protected]/16V_4Y


    6

    1
    L2

    B0

    R766 *0_4 REV-D3A Change C673 and C676 C680 C681 Close to PIN10 TX0P 11
    TX0N 12 TRXP0
    from 27pf to 15pf for Vendor suggestion
    7

    TRXN0
    3-

    L*

    0.1U/16V_4Y 1U/6.3V_4X 22 AVDDH C682 0.1U/16V_4Y


    TX1P 14 AVDDH C683 1U/6.3V_4X
    2

    TX1N 15 TRXP1
    AB

    3-

    TRXN1 16 AVDD33 C684 0.1U/16V_4Y


    TX2P 17 AVDD33 19 R767 61_71@0_4 AVDDL C685 [email protected]/16V_4Y
    -L

    AB

    LAN_VDD33 LAN_VDD33 TX2N 18 TRXP2 AVDDL 13


    TRXN2 AVDDL
    R3

    -L

    TX3P 20 AVDDL C686 0.1U/16V_4Y R768 0_6

    GND10
    TRXP3 LAN_VDD33

    GND2

    GND3

    GND4

    GND5

    GND6

    GND7

    GND8

    GND9
    TX3N 21
    TRXN3
    LA - R

    R3 A - R

    AR8162,QCA8172 :
    R769
    C 4.7K_4 AR8161-BL3A-R
    Pin17,18,19,20,21=>NC C
    1 High core voltage.(default = 1)

    42

    43

    44

    45

    46

    47

    48

    49

    50
    LED0 = LAN_ACTLED
    5

    0 Low core voltage.


    3 4 CKREQ#
    [8] PCIE_CLK_REQ_LAN#
    SWR switch-mode regulator select
    Q64B 2N7002KDW_115MA
    1
    LED1 = LAN_LINKLED#
    L =

    R770 *0_4
    LDO linear regulator select
    0 (default = 0)

    1 25MHz External clock input


    A L 0 0 8 1 6 2 0 0 2

    +3V_S5 LAN_VDD33
    LED2 = EXTCLK
    TX0P TX0P [26] Use Xtal=>NC
    TX0N 48MHz External clock input
    LAN-Wake up Power Control TX0N [26] 0
    R771 *0_6
    Circuit TX1P
    TX1N
    TX1P [26]
    TX1N [26]
    R772 *0_6
    TX2P TX2P [26] The pin 38 "LED0" doesn't pull down
    +3V_S5 TX2N to choose low core voltage. (It's internal pull
    LAN_P [29] TX2N [26] up)
    TX3P by FAE's command.20120914
    TX3P [26] The AR8161/AR8162 & QCA8171/QCA8172 pin38, pin39 &
    1 3 TX3N TX3N [26] pin23
    R773
    (LED0, LED1 & LED2) has internal pull up,
    C687 Q62 C688 so don't need reserve pull up resistor. (Remove R9767)
    REV-B2A Connected to Daughter board 20120918
    2

    B 4.7K_4 B
    0.01U/25V_4X ME1303_3A *0.01U/25V_4X Q63 LAN_LINKLED# R774 5.1K/F_6

    LTC044EUBFS8TL_30MA
    R775 3.01K/F_4 3 1

    LAN_LINKLED#
    High for SWR
    Mode,
    Low for LDO Mode.

    HOLE
    EMI
    hg-c276d118p2 hg-c236d118p2
    HOLE12 HOLE3 HOLE9 HOLE5 HOLE15 HOLE19 HOLE10 HOLE2 HOLE7 HOLE20 HOLE11 HOLE16
    7 6 7 6 7 6 7 6 7 6 7 6 7 6 7 6 7 6 7 6 7 6
    8 5 8 5 8 5 8 5 8 5 8 5 8 5 8 5 8 5 8 5 8 5
    9 4 9 4 9 4 9 4 9 4 9 4 9 4 9 4 9 4 9 4 9 4 VIN
    1
    2
    3

    1
    2
    3

    1
    2
    3

    1
    2
    3

    1
    2
    3

    1
    2
    3

    1
    2
    3

    1
    2
    3

    1
    2
    3

    1
    2
    3

    1
    2
    3
    *hg-c276d118p2 *hg-c276d118p2 *hg-c276d118p2 *hg-c276d118p2 *hg-c276d118p2 *hg-c276d118p2 *hg-c276d118p2 *hg-c276d118p2 *H-TC276BC236IC118D118P2 *hg-c276d118p2 *hg-c276d118p2 *hg-c236d118p2 C155 C79 C78 C295 C4 C63 C9 C574 C133

    0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X 0.1U/10V_4X

    A
    H-TIC161BC236D161PB H-TC236BIC142D142PT HG-TC217BIC104D104PT HG-TC236BIC148D148PT H-C91D91N H-tc197bc91d91pt A
    CPU BKT INTEL-CPU-BKT2
    HOLE4 HOLE21 HOLE22 HOLE6 HOLE18 HOLE1 HOLE14 HOLE23 HOLE24
    7 6 7 6
    HOLE8 8 5 8 5
    VGA NUT 9 4 9 4
    REV-C2A Del NFC NUT
    1

    1
    2
    3

    1
    2
    3

    1
    *CPU BKT WLAN@h-tc236bc161d161pt h-tc236bic142d142pt h-tc236bic142d142pt NGFF@hg-tc236bc146d146pt SSD@hg-tc217ic102bc102d102pt
    *H-C91D91N *H-O91X130D91X130N
    *H-tc197bc91d91pt *H-tc197bc91d91pt
    Quanta Computer Inc.
    1
    2
    3
    4

    PROJECT : BDD
    Size Document Number Rev
    A1A
    LAN Controller (RTL8171)
    Date: Tuesday, February 05, 2013 Sheet 28 of 37
    5 4 3 2 1
    5 4 3 2 1

    EC <KBC>
    +3VPCU

    R537 HCB1608KF-601T10_1A +A3VPCU +3V_VDD_EC R190 2.2_6


    +3V
    SM BUS

    MBCLK
    <KBC>
    PU/Address
    R165 4.7K_4
    +3VPCU
    SMBUS
    1
    Devices
    Battery(A)
    PCH(S5)
    Address

    29
    G-sensor(S0)
    MBDATA R164 4.7K_4 2
    R193 C487 C484 C135 C136 TEMP_MBAT C485 *10U/6.3V_6X 2ND_MBCLK R170 4.7K_4 IDROM(A)
    2.2_6 2ND_MBDATA R172 4.7K_4
    0.1U/16V_4Y 10U/6.3V_6X 0.1U/16V_4Y 10U/6.3V_6X EDP2LVDS IC 94H or 6AH
    ICMNT C482 *10U/6.3V_6X +3V_S5
    +3VPCU_EC
    3ND_MBCLK R790 4.7K_4
    C140 C483 C137 C122 C99 C123 8769AGND AC SET_EC C486 *10U/6.3V_6X 3ND_MBDATA R791 4.7K_4 VGA Thermal(A or S0) 98H

    115

    102
    19
    46
    76
    88

    4
    10U/6.3V_6X 0.1U/16V_4Y 0.1U/16V_4Y *0.1U/16V_4Y 0.1U/16V_4Y *0.1U/16V_4Y U8 +3VPCU
    3 Extend GPIO
    REV-C2A Add pull-up

    AVCC

    VDD
    VCC1
    VCC2
    VCC3
    VCC4
    VCC5
    D D
    R536 *100K/F_4 3ND_MBCLK R541 *4.7K_4 S&C IC 14640 Up Port 35H
    H=1.6mm +3VPCU to +3V_S5 for fixing leakage
    3ND_MBDATA R540 *4.7K_4 S&C IC 14651 Down Port 15H
    3 97 R801 0_4
    [7,23] LFRAME# LFRAME GPIO90/AD0 TEMP_MBAT [30] 105_AMP_MUTE [24]
    126 98 ICMNT R800 *0_4
    [7,23] LAD0
    [7,23] LAD1
    127
    128
    LAD0
    LAD1 A/D
    GPIO91/AD1
    GPIO92/AD2
    99
    100
    AC SET_EC
    ICMNT [30]
    AC SET_EC [30]
    3D_ECO_EN# [27]
    TP <KBC> +3V
    [7,23] LAD2 LAD2 GPIO93/AD3 MXM_FB_CLAMP_TGL_REQ [17]
    1 108 R533 *S&C@0_4 TPCLK R171 *4.7K_4
    [7,23] LAD3 LAD3 GPIO05/AD4 USB_BUS_SW2 [26]
    2 96 R534 0_4 LAN_P TPDATA R169 *4.7K_4
    [8] PCLK_591 LCLK GPIO04/AD5 LAN_P [28]
    95 R196 1.2K/F_4
    GPIO03/AD6 NBSWON# [27]
    [6] CLKRUN# 8 94
    GPIO11/CLKRUN GPIO07/AD7 SUSB# [6,30] +3VPCU
    [9] GATEA20
    121
    GPIO85/GA20 101 R199 AOAC@0_4 WIMAXP
    LED <LED> Need check
    D/A
    [9] RCIN#
    122
    KBRST/GPIO86
    GPIO94/DA0
    GPIO95/DA1
    105
    106
    VFAN1 [2]
    R200 *S&C@0_4
    WIMAXP [23]
    USB_BUS_SW3 [26] PU/PD RF_LED#
    R194
    R191
    NAOAC@10K_4
    AOAC@10K_4
    +3V
    GPIO96/DA2 LID591# [22] +3V_S5
    29 LPC SUSLED_EC# R542 10K_4 3D_ECO_LED R156 *10K_4 +3VPCU
    [8] SCI# ECSCI/GPIO54 BAT_SAT0# R140 10K_4 R776 *10K_4 +5VPCU
    CAPSLED [27]
    Add USB_SC_OC# and USB_Normal_EN,.20121017 REV-D3A Change pin124 to USB_P0_OC# 6 BAT_SAT1# R155 10K_4
    GPIO24 DISPON_O [22]
    64 PB_LED R538 *10K_4
    GPIO01/TB2 ACIN [30]

    3
    USB_P0_OC# 124 79 SKU_STRAP_2 R777 100K_4
    [26] USB_P0_OC# GPIO10/LPCPD GPIO02 93 RF_LED# Q10
    GPIO06/IOX_DOUT RF_LED# [27]
    7 114 PB_LED ME2N7002E_200MA
    [2,6,23,25,28] PLTRST# LREST GPIO16 PB_LED [27]
    109 CAPSLED_Q 2 RF_EN R179 10K_4
    123 GPIO30 15
    [26] USB_Normal_EN# GPIO67/PWUREQ GPIO36 VRON [34]
    80 SKU_STRAP_3 REV-D3A Change pin80 to USB_SC_EN# port1
    GPIO41 SKU_STRAP_3 [26]
    125 17 H_PROCHOT_EC
    [7] SERIRQ SERIRQ GPIO42/TCK H_PROCHOT_EC [2]
    20
    AMP_MUTE# [24]

    1
    USB_Normal_OC# 9 GPIO43/TMS 21
    [8,26] USB_Normal_OC# GPIO65/SMI GPIO44/TDI GFX_MAINON [17]
    GPIO 24 SENSE_MIC_IN:High Active
    GPO47/SCL4 SENSE_MIC_IN [24]
    25
    [27] MX0
    54
    55 KBSIN0
    GPIO50/PSCLK3/TDO
    GPIO51
    26
    27
    D/C# [30]
    S5_ON [2,31] INTERNAL KEYBOARD <KBC>
    [27]
    [27]
    MX1
    MX2
    56
    57
    KBSIN1
    KBSIN2
    GPIO52/PSDAT3/RDY
    GPIO53/SDA4
    28
    73
    HWPG
    LVDS_BKLT [22]
    STRIP SET MY0 R157 10K_4 +3VPCU
    [27] MX3 KBSIN3 GPIO70 SUSC# [6]
    58 74
    [27] MX4 KBSIN4 GPIO71 MPWROK [6,34]
    59 75
    [27]
    [27]
    MX5
    MX6
    60
    61
    KBSIN5
    KBSIN6
    GPIO72
    GPIO75
    82
    83 RF_EN
    RSMRST# [6]
    SLP_SUS# [6,10] ID <KBC> +3VPCU
    RF_EN [23]
    C
    [27] MX7
    53
    KBSIN7 GPO76/SHBM
    GPIO77
    84
    91
    AC/BATL# [17] EEPROM 2ND_MBCLK 6
    U6
    1
    C
    [27] MY0 KBSOUT0/JENK GPIO81 DNBSWON# [6] NUMLED [27] SCL A0
    52 110 S&M_EN [24] 2ND_MBDATA 5 2
    [27] MY1 KBSOUT1/TCK GPO82/IOX_LDSH/TEST SDA A1
    51 112 SKU_STRAP_4 3
    [27] MY2 KBSOUT2/TMS GPO84/IOX_SCLK/XORTR A2

    3
    50 107
    [27] MY3 KBSOUT3/TDI GPIO97 DGPU_PWROK [9,17]
    49 KB Q9 7 8
    [27] MY4 KBSOUT4/JENO WP VCC
    48 ME2N7002E_200MA 4
    [27] MY5 KBSOUT5/TDO GND
    47 31 NUMLED_EC 2 C120
    [27] MY6 KBSOUT6/RDY GPIO56/TA1
    43 TIMER GPIO20/TA2/IOX_DIN_DIO 117 TEMP_ALERT# [9] M24C08-WMN6TP
    [27] MY7 KBSOUT7
    42 63 0.1U/16V_4Y
    [27] MY8 KBSOUT8 GPIO14/TB1 FANSIG1 [2]
    41
    [27] MY9 KBSOUT9/SDP_VIS
    40 ADDRESS: A0H
    [27] MY10

    1
    39 KBSOUT10/P80_CLK 32
    [27] MY11 KBSOUT11/P80_DAT GPIO15/A_PWM KB_LED [27]
    38 118 SUSLED_EC#
    [27] MY12 KBSOUT12/GPIO64 GPIO21/B_PWM SUSLED_EC# [27]
    37 TIMER 62 BAT_SAT0#
    [27] MY13 KBSOUT13/GPIO63 GPIO13/C_PWM BAT_SAT0# [27]
    36 65 BAT_SAT1#
    [27]
    [27]
    MY14
    MY15
    35
    34
    KBSOUT14/GPIO62
    KBSOUT15/GPIO61/XOR_OUT
    GPIO32/D_PWM
    GPIO45/E_PWM
    22
    16
    BAT_SAT1# [27]
    SUSON [32]
    REV-D3A Change pin66 to USB_P1_OC#
    SPI <KBC>
    [27]
    [27]
    MY16
    MY17
    33 GPIO60/KBSOUT16
    GPIO57/KBSOUT17
    GPIO40/F_PWM
    GPIO66/G_PWM
    81
    66
    MAINON [12,19,32,33,35]
    LOGO_LED [22,27]
    R809 *0_4 3D_ECO_LED
    FLASH
    GPIO33/H_PWM 3D_ECO_LED [27]
    R808 S&C@0_4
    USB_P1_OC# [26]
    MBCLK 70 14 SPI_SDI_uR
    [30] MBCLK GPIO17/SCL1 GPIO34 BT_RFCTRL [23] PCH_SPI_SI [7]
    MBDATA 69
    [30] MBDATA GPIO22/SDA1
    2ND_MBCLK 67 SMB 20121019 updated. SPI_SDO_uR
    [7,19,21] 2ND_MBCLK GPIO73/SCL2 PCH_SPI_SO [7]
    2ND_MBDATA 68 113 DSW_WAKE# R825 *0_4
    [7,19,21] 2ND_MBDATA GPIO74/SDA2 GPIO87/SIN_CR DSW_WAKE#_R [9]
    3ND_MBCLK 119 IR 23 R166 1K_4 SPI_SCK_uR
    [17,26] 3ND_MBCLK GPIO23/SCL3 GPIO46/TRST ACZ_SDOUT_R [7] PCH_SPI_CLK [7]
    3ND_MBDATA 120 111
    [17,26] 3ND_MBDATA GPIO31/SDA3 GPO83/SOUT_CR/TRIST MXM_FB_CLAMP_GPU [17]
    R168 *10K_4 +3VPCU SPI_CS0#_uR
    R182 *100K/F_4 PCH_SPI_CS0# [7]
    TPCLK 72 86 SPI_SDI_uR
    [27] TPCLK GPIO37/PSCLK1 F_SDI/F_SDIO1
    TPDATA 71 87 SPI_SDO_uR R180 10K_4
    [27] TPDATA GPIO35/PSDAT1 F_SDIO&F_SDIO0 +3V_S5
    10 PS/2 FIU 90 SPI_CS0#_uR
    [6] AC_PRESENT GPIO26/PSCLK2 F_CS0
    11 92 SPI_SCK_uR
    [26] USB_SC_EN# GPIO27PSDAT2 F_SCK
    77 30
    [6,7,23] SUSCLK GPIO00/EXTCLK GPIO55/CLKOUT/IOX_DIN_DIO SUS_PWR_ACK [6]
    85 VCC_POR# R178 4.7K_4 +3VPCU
    12 VCC_POR
    VCORF

    +1.05V VTT
    AGND
    GND1
    GND2
    GND3
    GND4
    GND5
    GND6

    [2,9] EC_PECI R175 43_4 EC_PECR_R 13 104 SKU_STRAP_1


    PECI GPIO80/VD_IN1
    B
    PCLK_591
    HWPG circuit <KBC> B

    P985L Pin104 is GPIO80/VD_IN1


    5
    18
    45
    78
    89
    116

    103

    44

    C132 NPCE985LA0DX +3VPCU


    P885L Pin104 is VREF U9
    VCORF_uR

    *0.1U/16V_4Y 20 18
    3VDD INT# TP26 +3VPCU
    R192 19 PLTRST#
    L20 *SHORT_6 RST#
    *22_4 3ND_MBCLK 1 3 CAPSLED
    3ND_MBDATA 2 SCLK LED0/GP10 4 NUMLED R162
    C100 SDAT LED1/GP11 5
    C139 L5037 Can't del, DG link WIMAXP 8 LED2/GP12 6 Change short pad to 0R.20121017 10K_4
    GND/AGND w 0ohm or one point 1U/6.3V_4X LAN_P 9 GP20 LED3/GP13
    *10P/50V_4C USB_P0_OC# 10 GP21 14
    8769AGND USB_Normal_OC# 11 GP22 BEEP/GP14 15
    DSW_WAKE# 12 GP23 A2/GP15 16 R163 0_4 HWPG
    GP24 A1/GP16 [33] HWPG_1.05V
    13 17
    GP25 A0/GP17 R167 0_4
    [6,31] SYS_HWPG
    21 7
    GND PAD VSS R160 *0_4
    [32] HWPG_1.35V
    *NCT5605Y
    R161 0_4
    [32] HWPG_1.5V

    17P/17G not co-code do not control.20121012

    SKU_STRAP_1 R158 10K_4 +3VPCU

    Power Button <KBC> Need to pull-high +3V_S5 for fixing USB leakage
    R159 *10K_4 MS Strap SKU_STRAP_1 SKU_STRAP_2 SKU_STRAP_3 SKU_STRAP_4
    17"P 0
    +3V_S5 High for Shark Bay platform.20121012 17"G 1
    SKU_STRAP_2 R173 10K_4 +3VPCU Chief River 0
    USB_Normal_EN# R527 10K_4
    DNBSWON# C138 *0.1U/16V_4Y USB_SC_EN# R528 *10K_4 R174 *10K_4 Shark Bay 1
    A A
    W/ 3D 0
    NBSWON# C141 *0.1U/16V_4Y W/O 3D 1
    SKU_STRAP_3 R176 *ECO@10K_4 UMA 0
    Place on easy use location R177 *10K_4
    +3VPCU

    Discrete(Optmius) 1

    SKU_STRAP_4 R539 10K_4


    Quanta Computer Inc.
    +3VPCU
    Need check PROJECT : BDD
    R535 *10K_4
    Size Document Number Rev
    A1A
    EC NPCE985L
    Date: Tuesday, February 05, 2013 Sheet 29 of 37
    5 4 3 2 1
    5 4 3 2 1

    10
    PCN1

    1 DC_JACK 1
    PF2
    F1206HA20V024TM
    2 VA0
    VA1 PD4

    1
    3 VA2 1
    0.01_3720
    PR64

    2
    R1
    VA3 3
    PQ7
    AOD403
    4
    VIN

    3
    PQ1
    AOD403
    4
    P1
    BAT-V-2
    2
    2

    E@1U/25V_6X
    E@2200P/50V_4X

    [email protected]/25V_4X
    SBR1045SP5-13

    1
    1
    3 PD3 PC44 PR67 PC10

    PC98

    PC33

    PC36
    1 0.1U/25V_6X 220K/F_4 E@1U/25V_6X PR125
    4 3 PD1 33K_6
    2
    5 PR63 PR65

    2
    SBR1045SP5-13 TVS_SMAJ20A 10/F_6 10/F_6
    6 PD2 PC11 PR127
    1SS355_100MA ( Near by sense R side) E@2200P/50V_4X

    10K/F_6
    7 1 6

    9 8 PR68 2 5

    3
    220K/F_4
    3 4
    PQ16
    D D
    50302-00841-001 PR133 CSIN PQ9 2 2N7002K_300MA
    [29] D/C#
    82.5K/F_6 IMD2AT108
    +3VPCU
    CSIP
    [29] AC SET_EC

    1
    VIN

    PR120

    10U/6.3V_6X
    PR132 10K/F_4 PC75 PC77 1U/6.3V_4X

    PC113
    10K/F_4 0.1U/10V_4X 1 2

    10U/25V_8X

    10U/25V_8X
    0.1U/25V_4X

    *10U/25V_8X

    *10U/25V_8X
    *2200P/50V_4X
    PC86

    PC85

    PC28

    PC27

    PC87

    PC84
    PR17
    ( Near by IC side) 4.7_6
    PC8 1U/6.3V_4X
    1 2

    ACIN

    33
    32
    31
    30
    28

    27

    26

    21
    [29] ACIN

    5
    +3VPCU

    NC
    GND
    GND
    GND
    GND

    CSSN

    VCC
    CSSP

    VDDP
    PQ2
    PC78 0.1U/10V_4X PR118 PC81
    2.7_6 0.1U/25V_6X 4 AON7410
    11 25
    VDDSMB BOOT
    MBDATA 0.01_3720

    3
    2
    1
    9 24 88731A_U_GATE PR23
    MBCLK SDA UGATE
    PL1
    10 23 88731A_PHASE 1 2 BAT-V-1
    SCL PHASE

    5
    PD7 3.3UH_7X7_TOK

    10U/25V_8X

    10U/25V_8X

    10U/25V_8X

    10U/25V_8X
    TVLST2304AD0 13 20 88731A_L_GATE
    1 6 ACOK LGATE

    PC2

    PC6
    ID MBDATA PQ3 PR129

    PC163

    PC164
    CH1 CH4 PC92 [email protected]/F_6
    2 5 +3VPCU PR121 0.1U/25V_6X 19 4 AON7410
    VN VP 49.9/F_6 PU9 PGND PR33 PR32
    TEMP_MBAT 3 4 MBCLK DCIN 22 ISL88732HRTZ-T 10/F_6 10/F_6
    CH2 CH3 DCIN PC105

    3
    2
    1
    PR112 E@1000P/50V_4X
    82.5K/F_6 3.2V 18
    88731ACIN 2 CSOP
    ACIN ( Near by sense R side)
    PC91
    0.1U/10V_4X CSOP
    PR114 3 ( Near by IC side)
    22K/F_6 VREF 17 CSON
    +3VPCU CSON
    C 4 C
    PR104 ICOMP 16
    PR106 NC
    SHORT_4
    *100K_4 5
    NC
    PCN2 PF1 15 PR122 100_4 BAT-V-1
    F1206HA20V024TM 6 VBF
    10 MBAT+ 1 2 BAT-V-1 VCOMP 29
    1 GND (Please place this R near by battery pack side)

    GND
    2

    ICM
    PR105 1K_4 ID

    NC

    NC
    3 BAT-GND
    4 TEMP_MBAT_C

    14

    12
    5 M-DATA
    6 M-CLOCK PR111
    7 2.21K/F_6

    2200P/50V_4X
    8 PC67 +3VPCU

    *1U/6.3V_4X
    9 PC72
    11

    1
    PC69 47P/50V_4N

    PC70

    PC71
    PR110 PR107
    100/F_4 PR108 0.01U/25V_4X PR113

    2
    100/F_4 ICMNT [29]
    100K_4
    53050-00971-001 47P/50V_4N MBDATA [29] 100_4
    1K_4

    10U/6.3V_6X
    MBCLK [29]

    PC74
    TEMP_MBAT [29]
    PR109
    1

    PC68
    0.01U/25V_4X
    2

    +5V_S5 +5V_PTC

    PR135
    *0_8
    1 2
    +5VPCU +15V

    6
    5 4
    1

    1
    2
    1
    B B
    PR138 PR140
    *100K_4 *100K_4 PQ4 *AO6402A

    3
    2

    1
    PC108
    *0.1U/25V_4X

    2
    3
    0.01_3720
    PQ5B PR3
    5 *2N7002KDW_115MA
    6

    BAT-V-1 1 2 BAT-V-2
    +5V_PTC PQ5A
    4

    1
    2 *2N7002KDW_115MA
    [6,29] SUSB#
    PC115
    +5V_PTC *4700P/25V_4X

    2
    1
    1

    1
    PR143 PR141
    1

    *100K/F_4 *1.5M_4 PR38 PR29


    PC110 PC109 *0_4 *0_4
    *0.01U/25V_4X *100P/50V_4N
    2

    2
    1

    PC119 3
    *0.01U/25V_4X + 1
    2

    ICMNT 2
    - PU4A PC18
    1

    *BA10393F-GE2 *0.1U/25V_4X
    4

    PC116 PC118 1 2
    *0.01U/25V_4X *100P/50V_4N
    2

    1
    1

    PC21 PC14
    PR142 *0.1U/25V_4X *0.1U/25V_4X

    2
    *17.4K/F_4
    1

    PC117 +5V_PTC +5V_PTC *BA10393F-GE2


    2

    *100P/50V_4N PU4B - 6
    2

    7
    + 5 2 1 +5V_PTC

    4
    PR139 PR131
    1

    *1.5M_4 *100K/F_4

    IN+
    OUT

    IN-
    PR66 2 1
    [2,34] H_PROCHOT# *100K/F_4
    1

    PC121 *INA199A2DCKR
    2

    *0.01U/25V_4X PC114 PC111 PR136 PU2


    2

    A PU5 PD8 *100P/50V_4N *100P/50V_4N *91K_4 A


    2

    2
    8

    *SN74LVC2G00DCUR *1SS355_100MA
    GND
    REF
    3

    2 1
    V+
    2

    1 PR52
    1

    2 7 *0_6
    2 2 1 2 1 +5V_PTC
    1

    PQ8
    *2N7002K_300MA PC123
    1

    *0.1U/10V_4X *1SS355_100MA
    1

    6 PD9 PC23
    3 *0.1U/25V_4X
    2

    5
    1

    PR146
    *220K/F_4

    Quanta Computer Inc.


    4
    2

    PROJECT : BDD
    Size Document Number Rev
    Charger (ISL88732HRTZ-T) A1A
    Date: Tuesday, February 05, 2013 Sheet 30 of 37
    5 4 3 2 1
    5 4 3 2 1

    VIN
    VIN
    P2

    10U/25V_8X
    *2200P/50V_4X
    VIN

    PC145

    PC144
    +5VPCU PC146

    10U/25V_8X

    10U/25V_8X
    PC61 0.1U/25V_4X

    *2200P/50V_4X
    [2,17] SYS_SHDN#
    1 2

    PC138

    PC139

    PC137
    PC140
    0.1U/25V_4X PR89
    D 2.2/F_8 10U/6.3V_6X D

    +3VPCU +2VREF

    10U/6.3V_6X
    1

    1
    PC62 PC54
    PC53

    1
    0.1U/25V_6X 1U/6.3V_4X

    2
    PR85 PR75
    0_4 *0_2/S

    5
    PQ19

    16

    17
    8

    5
    AON6414AL PU6 PQ20

    VIN

    VREG3

    VREG5

    REF
    (Peak 14.689A ,AVG 10.282A) 13 4 AON7410
    4 EN TONSEL
    (Peak 7.480A, AVG 5.236A)
    OCP:19A 5V_UGATE1 21 10 3V_UGATE2 4
    PR80 UGATE1 UGATE2 PR78 PC56
    +5V_S5 PC57 0.1U/25V_6X 1 25V_BST1 22 9 1 2
    OCP:9.5A +3V_S5

    1
    2
    3
    BOOT1 BOOT2

    3
    2
    1
    PL8 2.2_6 RT8223P 2.2_6 0.1U/25V_6X PL7
    +5V_1 5V_PHASE1 20 11 3V_PHASE2 +3.3V_1
    2.2UH_10X10 PHASE1 TOP Side PHASE2 2.2UH_7X7_TOK

    5
    5V_LGATE1 19 12 3V_LGATE2

    220U/6.3V_7343P_E15b
    220U/6.3V_105CS_E18e

    PR160 LGATE1 LGATE2


    24
    PC155

    PC154
    ENTRIP1

    ENTRIP2

    SKIPSEL
    + *2.2/F_6 5V_FB1 2 VOUT1 7 PR157 +
    C FB1 OUT2 C
    4 4

    EMC

    GND
    GND
    DDPW RGD_R 23 5 3V_FB2 *2.2/F_6 PR90
    *0_2/S

    *0_4/S

    PGOOD FB2 PQ23 PR92


    PQ21 *0_4/S *0_2/S
    1
    2
    3

    18

    14
    25
    15

    3
    2
    1
    PC149 AON6758 AON7752 PC147
    *1000P/50V_4X
    PR96

    PR95

    PR71 *1000P/50V_4X
    Rds(on) 4.6m ohm
    82.5K/F_4 PR86

    PR72 *0_4/S
    +3VPCU
    Rds(on) 14.5m ohm
    120K/F_4
    PR69
    15.4K/F_4

    1
    PR70 PR88
    0_6 PR74
    10K/F_4 PR156
    10K_4

    PR158

    2
    SHORT_4 6.8K/F_4
    PC59 PR73 +3VPCU
    2 [2,29] S5_ON
    0.1U/25V_6X
    PD5
    BAV99W -7-F_150MA 3 10K/F_4
    1
    PC64

    PR155
    0.1U/25V_6X

    B B
    2 *10K_4
    PD6
    BAV99W -7-F_150MA
    3
    PC60
    1 0.1U/25V_6X DDPW RGD_R
    SYS_HW PG [6,29]
    PR91
    +15V_ALW P +5V_S5 +3V_S5
    +15V

    22_8
    PC63

    0.1U/25V_6X

    5
    PQ26 PQ25

    AON7406 AON7406

    [10,12,35] MAIND MAIND 4 MAIND 4


    3
    2
    1

    3
    2
    1
    TOP Side TOP Side

    A A

    +5V +3V
    Quanta Computer Inc.
    (Peak 9.889A, AVG 6.922A) (Peak 4.729A, AVG 3.311A)
    PROJECT : BDD
    Size Document Number Rev
    System 3V/5V(RT8223P) A1A
    Date: Tuesday, February 05, 2013 Sheet 31 of 37
    5 4 3 2 1
    5 4 3 2 1

    Be careful to this two net name.

    P3

    PR55
    VIN
    PR53 SHORT_4

    62K/F_4
    PR59

    10U/25V_8X
    S3_1.35V [12]

    200K_4
    +3VPCU
    *100K_4 S5_1.35V

    PC83
    *2200P/50V_4X
    SUSON [29]
    PR47 SHORT_4 PC89

    PC93
    D PQ15 D
    [29] HWPG_1.35V PR42 0.1U/25V_4X
    AON6414AL

    5
    PC19 0.1U/25V_6X

    PR57
    2.2/F_6

    23

    22

    21

    20

    19

    18

    17

    16
    PU3 OCP:18A
    ( Near by Output PR130 (Peak 16.904A, AVG 11.833A)

    MODE

    TRIP
    PGOOD
    PwPad-2

    PwPad-1

    PwPad

    S3

    S5
    cap side) 1 15

    3
    2
    1
    VTTSNS VBST
    ESR : 9mΩ
    +1.35VSUS_1_LOD *0_2/S 2 14 1.35SUS_HG
    VLDOIN DRVH
    f : 400k Hz
    3 TPS51216RUKR 13
    +VTT VTT SW
    10U/6.3V_6X

    10U/6.3V_6X

    VDDQSNS
    4 12 PL2
    PC38

    PC37

    (Peak 2.4A, AVG 1.68A) VTTGND V5IN


    PwPad-3
    PwPad-4
    PwPad-5
    1.35SUS_PHASE +1.35VSUS_1
    +1.35VSUS

    REFIN

    PGND
    5 VREF 11

    GND
    VTTREF DRVL 2.2UH_10X10
    +5V_S5

    330U/2V_7343P_E9c
    5
    PR126
    24
    25
    26

    10
    PR61 PC20 1 2 1U/6.3V_4X + PC102
    C +VTT_VREF C
    [email protected]/F_6

    *0_2/S
    0_8 *10U/6.3V_6X

    PC97
    *0_6/S
    PC34 1.35SUS_LG 4
    0.22U/10V_4X

    PQ14 PC96

    PR37
    3
    2
    1
    RDSon=4.6m ohm AON6758 PC106

    PR43
    E@1000P/50V_4X 0.1U/10V_4X

    +1.35VSUS_1_LOD
    PR50 +1.35VSUS_1_VDDQSNS
    10K/F_4
    R1
    Vout = (R1/R2) X 0.75 + 0.75
    PC31
    B 0.1U/10V_4X PC26 B
    0.01U/25V_4X +3V_S5
    PR51
    30.1K/F_4 +5V_S5
    R2 PR103
    *100K_4
    PC66 PU8
    0.1U/10V_4X G9661-25ADJF12U HWPG_1.5V [29]
    4 1
    VPP PGOOD
    PR102 0_4 2 6
    [12,19,29,33,35] MAINON VEN VO +1.5V

    +3V_S5 3 (Peak 0.753A)


    8 VIN
    GND

    ADJ
    9 5
    GND NC PR161 PC157

    7
    PC156 30K/F_4 10U/6.3V_6X
    10U/6.3V_6X

    A A
    PC158 PC159
    0.1U/10V_4X *0.1U/10V_4X
    PR162 Quanta Computer Inc.
    Vout =0.8(1+R1/R2) =1.5V 34K/F_4
    PROJECT : BDD
    Size Document Number Rev
    A1A
    DDR1.5V (TPS51216RUKR)
    Date: Tuesday, February 05, 2013 Sheet 32 of 37
    5 4 3 2 1
    5 4 3 2 1

    VIN

    P4

    10U/25V_8X
    0.1U/25V_4X

    *2200P/50V_4X
    PC152

    PC153

    PC151
    +5V_S5
    OCP:8A
    D D
    PC150

    5
    PQ24 (Peak 6.523A, AVG 4.566A)
    1 2
    AON7410
    1U/6.3V_4X Total capacitor : 400uF
    PR159 PC148 4
    F: 320k Hz
    PU7 TPS51211DSCR 2.2_6 0.1U/25V_6X
    PR84 7 10 1 2

    3
    2
    1
    91K/F_4 V5IN VBST +1.05V
    1 2 2 9 +1.05V_DRVH
    PR83 TRIP DRVH PL6
    MAINON [12,19,29,32,35]
    3 8 +1.05V_SW
    EN SW 2.2UH_7X7_TOK
    0_4 4 1
    100K/F_4

    VFB PGOOD HWPG_1.05V [29]


    1

    PR82

    PC58
    *1U/6.3V_4X 5 6 +1.05V_DRVL +3V_S5
    TST DRVL

    330U/2.5V_105CS_E12e
    2

    16 11 *10K_4 PR87
    GND GND
    1
    PR154

    *10U/6.3V_6X
    PC142

    PC162

    0.1U/10V_4X
    PR79 +

    GND

    GND

    GND

    GND

    PC141
    470K/F_4 4 *2.2/F_6
    C PR81 PR76 C
    R2 R1 PQ22
    2

    12

    13

    14

    15
    PC143

    3
    2
    1
    AON7752
    10K/F_4 4.99K/F_4 *1000P/50V_4X
    PC55 RDSon=14.5m ohm

    PR77

    *0_2/S
    2 1

    *39P/50V_4N
    ( Near by Output
    Vout=0.704V*(R1+R2)/R2 cap side)

    B B

    A A

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    +1.05V_A(TPS51211DSCR) A1A

    Date: Tuesday, February 05, 2013 Sheet 33 of 37


    5 4 3 2 1
    5 4 3 2 1

    P7
    VIN

    CPU Core : Loadline = CPU Core : Loadline =

    10U/25V_8X

    10U/25V_8X
    -1.5mV/A -1.5mV/A

    0.1U/25V_4X

    1
    PC41

    PC40

    PC42

    *2200P/50V_4X
    TDC = 33A ICCMAX=95A TDC = 26A ICCMAX=55A

    PC43
    UGATE_1 +
    PC103
    100U/25V_105CE_f

    2
    1

    2
    PQ18

    G1

    D1

    D1

    D1
    HP8S36TB
    PR45 PC25
    2.2/F_6 0.22U/25V_6X
    BOOT_1 PL3
    C

    S1/D2
    0.22UH_7X7X4 Max. DCR=1.1m
    PHASE_1 9 +VCC_CORE

    22U/6.3V_8X

    22U/6.3V_8X

    22U/6.3V_8X

    22U/6.3V_8X

    22U/6.3V_8X

    22U/6.3V_8X
    D D

    G2

    47W@330U/2V_7343P_E9c
    S2

    S2

    S2

    2.2/F_6
    = 1 2 0 A

    = 6 6 A

    PC45

    PC50
    PR137

    PC127

    PC131

    PC126

    PC133

    PC135
    +

    PR147

    PR150
    *0_2/S

    *0_2/S
    102K/F_4

    3.24K/F_6

    49.9K/F_4

    1000P/50V_4X
    LGATE_1

    PC112
    +VCCIO_OUT

    PR16

    PR20

    PR24
    +3V_S5

    PR11
    PC1

    *75/F_4
    PC5 0.1U/10V_4X PR6 PR13 PR22 3.65K/F_6
    0.1U/10V_4X 54.9/F_4 130/F_4 ISUMP PR12 10_4 ISUMN

    PR19 100K/F_4 ISEN2


    *100K/F_4
    PR5

    [6,29] MPWROK PR1 0_4 PR10 [4] VR_SVIDDAT PR25 47W@100K/F_4


    100K/F_4 100K/F_4 PR15 ISEN3

    UGATE_2

    PHASE_2
    BOOT_2
    [4] VR_SVIDART#
    [29] VRON PR2 *0_4
    [4] VR_SVIDCLK
    ISEN1
    +3V_S5

    32

    31

    30

    29

    28

    27

    26

    25
    VIN

    *499/F_4
    1.91K/F_4

    ALERT#

    PROGE1

    PROG3

    PROG2

    BOOT2

    UGATE2

    PHASE2
    SDA
    PR8

    PR4

    10U/25V_8X

    10U/25V_8X

    0.1U/25V_4X

    *2200P/50V_4X
    +5V_S5

    PC99
    UGATE_2

    PC107

    PC104

    PC101
    1 24 LGATE_2
    SCLK LGATE2 PQ17
    [2,6] DELAY_VR_PWRGOOD HP8S36TB

    2
    2 23
    VR_ON VDDP

    G1

    D1

    D1

    D1
    PC4 PR26
    PR40 PC15

    1
    3 22 PWM3 2.2/F_6 0.22U/25V_6X PL4
    1000P/50V_4X PGOOD PWM3 37W@0_6 PC17 BOOT_2
    C C

    S1/D2
    PR115 1U/10V_4X 0.22UH_7X7X4 Max. DCR=1.1m

    2
    PR7 100K/F_4 4 21 LGATE_1 PHASE_2 9 +VCC_CORE
    IMON PU1 LGATE1
    27.4K/F_4

    22U/6.3V_8X

    22U/6.3V_8X

    22U/6.3V_8X

    22U/6.3V_8X

    22U/6.3V_8X

    22U/6.3V_8X
    G2

    S2

    S2

    S2
    5 20

    PR148

    PR151
    [2,30] H_PROCHOT# PR9 0_4 H_PROCHOT#_VR ISL95812HRZ-T PHASE_1
    VR_HOT# PHASE1

    PC49

    PC48
    PC136

    PC129

    PC128

    PC130
    2.2/F_6
    8

    5
    PR134 PR117
    1 2

    PR144
    PC3
    6 19 UGATE_1
    NTC UGATE1
    NTC_470K_4 3.83K/F_4 43P/50V_4N LGATE_2

    *0_2/S

    *0_2/S
    7 18 BOOT_1

    1000P/50V_4X
    COMP BOOT1

    PC120
    PR128 0_4
    8 17 VIN
    FB VIN
    PR165 37W@1K/F_4 PC161 37W@390P/50V_4X
    SLOPE

    ISUMN

    ISUMP
    ISEN3

    ISEN2

    ISEN1
    33
    [email protected]/F_4

    [email protected]/F_4

    VDD
    RTN
    PAD
    PR116

    PR163

    PR14 47W@1K/F_4 PC7 47W@220P/50V_4X PC94 ISUMP PR44 3.65K/F_6 PR30 10_4 ISUMN
    9

    10

    11

    12

    13

    14

    15

    16
    0.22U/25V_6X
    PR119 PR124 PR27 100K/F_4 ISEN1
    56P/50V_4N
    PC76

    1/F_4 PR49
    PR164 [email protected]/F_4 +5V_S5 100K/F_4 PR28 47W@100K/F_4 ISEN3
    6.04K/F_4
    47W@8200P/50V_4X

    37W@3300P/50V_4X

    1
    ISEN2
    PC88
    PC73

    PC160

    PR18 [email protected]/F_4 1U/10V_4X

    2
    VIN
    ISUMP

    [email protected]/25V_4X
    PR21 +5V_S5 UGATE_3

    47W@10U/25V_8X

    47W@10U/25V_8X
    *2K/F_4

    *47W@2200P/50V_4X
    PC39

    PC35

    PC30

    PC32
    PR48 PQ6

    0.1U/10V_4X
    B B

    PC24

    PC29
    2.61K/F_4 PR46 47W@HP8S36TB

    *0.22U/25V_6X

    2
    PC12 PC9 47W@0_6 PR123 PC95

    G1

    D1

    D1

    D1
    *330P/50V_4X 0.1U/10V_4X PU10 [email protected]/F_6 [email protected]/25V_6X
    6 2
    PC22

    [4] VCC_SENSE PR34 0_4 PL5 +VCC_CORE


    *330P/50V_4X PR36 VCC BOOT BOOT_3 [email protected]_7X7X4 Max. DCR=1.1m
    [5] VSS_SENSE PR39 0_4 11K/F_4 7 1

    S1/D2
    PC13 FCCM UGATE
    PWM3 3 8 PHASE_3 9

    22U/6.3V_8X

    22U/6.3V_8X

    22U/6.3V_8X

    330U/2V_7343P_E9c
    PWM PHASE

    PR149

    PR152
    PAD
    1
    4 5

    PC46

    PC51

    PC47
    LGATE_3

    PR145

    PC124
    0.01U/25V_4X PR166 +

    47W@1U/6.3V_4X

    [email protected]/F_6
    G2
    GND LGATE

    S2

    S2

    S2
    PC100
    PR41 PR153 47W@ISL6208BCRZ-T

    5
    ISEN1 37W@511/F_4 NTC_10K_4

    *0_2/S

    *0_2/S
    47W@1000P/50V_4X
    0_4
    ISEN2 PR35
    ISUMN

    PC122
    ISEN3
    PC80

    PC82

    47W@523/F_4 * PR135 PLACE NEAR PL8


    [email protected]/25V_6X
    PC79

    PC16 PR31
    0.022U/25V_6X

    0.022U/25V_6X

    2200P/50V_4X [email protected]/F_4 ( Near by Choke side) PR60


    PR167 ISUMP PR58 47W@10_4 ISUMN

    [email protected]/F_6 PR56 47W@100K/F_4


    ISEN1
    37W@2K/F_4 PR62
    PC90 47W@100K/F_4 PR54 47W@100K/F_4
    ISEN2

    ( Near by IC side)
    0.1U/10V_4X ISEN3

    +VCC_CORE

    22U/6.3V_8X

    22U/6.3V_8X

    22U/6.3V_8X

    22U/6.3V_8X
    A A

    PC52

    PC132

    PC125

    PC134
    Quanta Computer Inc.
    PROJECT : BDD
    Size Document Number Rev
    +VCCIN (ISL95812) 47/57W A1A

    Date: Tuesday, February 05, 2013 Sheet 34 of 37


    5 4 3 2 1
    5 4 3 2 1

    VIN +3V +5V +1.5V +15V

    D
    PR98
    1M_4
    PR97
    22_8
    PR99
    22_8
    PR94
    22_8
    PR93
    1M_4 [10,12,31] MAIND
    P7 D
    3

    3
    C PR100 PQ11A PQ11B PQ10A PQ10B C
    2 1M_4 2 5 2 5 PC65
    [12,19,29,32,33] MAINON 2200P/50V_4X
    2N7002KDW_115MA 2N7002KDW_115MA 2N7002KDW_115MA 2N7002KDW_115MA
    PQ12
    1

    4
    PR101
    100K_4

    B B
    LTC044EUBFS8TL_30MA

    Quanta Computer Inc.


    [12] MAINON_ON_G
    A
    PROJECT :Chief River A
    Size Document Number Rev
    A1A
    +1.8V/Discharge
    Date: Tuesday, February 05, 2013 Sheet 35 of 37
    5 4 3 2 1
    5 4 3 2 1

    36
    +5VPCU +-5% 7 +5V +-5%
    MAIND enable
    AC/DC Insert enable OCP:0.3A
    AON7406
    D P.31 (Peak 9.889A, AVG 6.922A) D

    +5V_S5 +-5%
    S5_ON enable
    (Peak 14.689A ,AVG 10.282A) OCP:19A
    2
    RT8223P +3VPCU +-5%
    P.31 AC/DC Insert enable OCP:0.3A 8 +3V +-5%
    MAIND enable
    AON7406
    P.31 (Peak 4.729A, AVG 3.311A)

    Power Tree Table (MXM) +3V_S5 +-5%


    S5_ON enable +1.5V +-5%
    1 9
    (Peak 7.480A, AVG 5.236A) OCP:9.5A MAINON enable
    AC System
    Charger G9661
    P.32 (Peak 0.753A)
    ISL88732HRTZ-T
    +SMDDR_VTERM
    DC P.30 SUSON enable
    C C

    3 +SMDDR_VREF
    TPS51216RUKR SUSON enable
    P.32
    +1.35VSUS +-3%
    S3_1.35V enable
    (Peak 16.904A, AVG 11.833A) OCP:18A

    +1.05V +-5%
    4
    TPS51211DSCR SUSON enable
    P.33 (Peak 6.523A, AVG 4.566A) OCP:8A

    +VCC_CORE +-2%
    6 MPWROK enable
    B
    ISL95812HRZ-T B
    (Peak 93A ,AVG 33A) OCP 120A
    P.34

    MXM

    Power Distribution List

    Power Distribution

    A A

    Quanta Computer Inc.


    PROJECT : BDD
    Size Document Number Rev
    1A
    POWER TREE TABLE
    Date: Tuesday, February 05, 2013 Sheet 36 of 37
    5 4 3 2 1
    5 4 3 2 1

    MODEL TE5
    Model REV CHANGE LIST PAGE FROM To

    1 1A
    2 1A
    1A 3 1A
    BDD MB 4 1A
    5 1A
    D 6 1A D

    7 1A
    8 1A
    9 1A
    10 1A
    11 1A
    12 1A
    13 1A
    14 1A
    15 1A
    16 1A
    17 1A
    18 1A
    19 1A
    20 1A
    21 1A
    22 1A
    23 1A
    24 1A
    C
    25 1A C

    26 1A
    27 1A
    28 1A
    29 1A
    30 1A

    B B

    A A

    Quanta Computer Inc.


    PROJECT MODEL : TE5 APPROVED BY: Andy Wang DATE: 2010/10/01
    PROJECT : BDD
    DOC NO. 204 Size Document Number Rev
    PART NUMBER: DRAWING BY: Andy Wang REVISON: 1A Power change list 1A

    Date: Tuesday, February 05, 2013 Sheet 37 of 37

    5 4 3 2 1

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