145 Royal Crest Court Unit 42 Markham, ON, Canada L3R 9Z4

Tel: 905-477-1166 Fax: 905-477-1782 http://www.orientdisplay.com

SPECIFICATIONS
FOR LCD MODULE

CUSTOMER

CUSTOMER PART NO.

25,(17DISPLAY NO. AMC1602L

DESCRIPTION

APPROVED BY

DATE

PREPARED BY CHECKED BY APPROVED BY

Liang yuan wu

PAGE 1 OF 21
DOCUMENT REVISION HISTORY:

DATE PAGE DESCRIPTION

2007/3/7 - First release

-

PAGE 2 OF 21
Contents
1.Module Classification Information

2.Precautions in use of LCD Modules

3.General Specification

4.Absolute Maximum Ratings

5.Electrical Characteristics

6.Optical Characteristics

7.Interface Pin Function

8.Power Supply

9.Contour Drawing & Block Diagram

10.Function Description

11.Character Generator ROM Pattern

12.Instruction Table

13.Timing Characteristics

14.Initializing of LCM

15.Quality Assurance

16.Reliability

PAGE 3 OF 21
1.Module Classification Information

AMC 1 6 0 2 AR - B - B 6WT DW - S P
1 2 3 4 5 6 7 8 9 10 11 12 13

1 BrandΚ2ULHQW Display (N.A.) Ltd.

2 Display TypeΚC Character Type, G Graphic Type,
NONE Custom-made
3 Display FontΚCharacters X Lines / Rows X Columns /Others
4 Model serials no.
5 RoHS compliant: RYES NONE NO
6 IC Package Type˖ M SMT Type
B COB Type
T TAB Type
G COG Type
F COF Type
S Special
7 LCD Mode˖ PTN Positive
NTN Negative
Y STN Positive, Yellow Green
B STN Negative, Blue
G STN Positive, Gray
W FSTN Positive
T FSTN Negative
F FFSTN Negative
S Special
8 Viewing direction 6 6:00,1212:00, SSpecial
9 Temperature range N  Normal Temperature
W Wide Temperature
S Special
10 LCD Polarizer Type R Reflective
T Transmissive
F Transflective
S Special
11 Backlight Type N None
D LED
E EL
F CCFL
S Special
12 Backlight Color Y Yellow-green
B Blue
A Amber
W White
G Green
R Red
S Special
13 Internal Code

PAGE 4 OF 21
2. Precautions in use of LCD Modules

(1)Avoid applying excessive shocks to the module or making any alterations or modifications to
it.
(2)Don’t make extra holes on the printed circuit board, modify its shape or change the
components of LCD module.
(3)Don’t disassemble the LCM.
(4)Don’t operate it above the absolute maximum rating.
(5)Don’t drop, bend or twist LCM.
(6)Soldering: only to the I/O terminals.
(7)Storage: please storage in anti-static electricity container and clean environment.

3. General Specification

Item Dimension Unit

Number of Characters 16 characters x 2 Lines Ё

Module dimension(With LED Backlight ) 85.0 x 36.0 x 14.0˄MAX˅ mm

View area 64.5 x 15.5 mm
Active area 56.20 x 11.50 mm
Dot size 0.55x 0.65 mm
Dot pitch 0.60 x 0.70 mm
Character size 2.95 x 5.55 mm
Character pitch 3.55 x 5.59 mm
LCD type STN
Duty 1/16
View direction 6 o’clock
Backlight Type YELLOW-GREEN

4.Absolute Maximum Ratings

Item Symbol Min Max Unit

Input Voltage VI -0.3 VDD+0.3 V
Supply Voltage For Logic VDD-VSS -0.3 7.0 V

PAGE 5 OF 21
 Supply Voltage For LCD VDD-V0 Vdd-13.5 0 V
Standard Operating Temp. Top 0 50 ć
Temperature LCM Storage Temp. Tstr -10 60 ć
Wide Temperature Operating Temp. Top -20 70 ć
LCM Storage Temp. Tstr -30 80 ć

5. Electrical Characteristics

Item Symbol Condition Min Typ Max Unit

Supply Voltage For Logic VDD-VSS Ё 4.5 5.0 5.5 V
Supply Voltage For LCD VDD-V0 Ta=25ć 4.5 4.7 5.0 V
Input High Volt. VIH Ё 0.7 VDD Ё VDD V

Input Low Volt. VIL Ё VSS Ё 0.3 VDD V

Supply Current IDD VDD=5V 0.8 1.2 1.5 mA
Forward
current
Supply Voltage of =120 mA
VLED 3.8 4.1 4.3 V
Yellow-green backlight Number of
LED die
2x12= 24

6. Optical Characteristics

Item Symbol Condition Min Typ Max Unit

(V) CṞ2 -20 Ё 35 deg

View Angle
(H) CṞ2 -30 Ё 30 deg

Contrast Ratio CR Ё Ё 3 Ё Ё

T rise Ё Ё Ё 250 ms
Response Time
T fall Ё Ё Ё 250 ms

Definition of Operation Voltage (Vop) Definition of Response Time ( Tr , Tf )

PAGE 6 OF 21
 Non-selected Non-selected
Conition Selected Conition Conition
Intensity Selected Wave
100ˁ Non-selected Wave Intensity

10ˁ
Cr Max
Cr = Lon / Loff 90ˁ
100ˁ

Vop
Driving Voltage(V) Tr Tf

[positive type] [positive type]

Conditions :
Operating Voltage : Vop Viewing Angle(Δ) : 0°Δ 0°
Frame Frequency : 64 HZ Driving Waveform : 1/N duty , 1/a bias
Definition of viewing angle(CṞ2)
 b
 f
 = 180°
 l
 r

 = 270°  = 90°

 = 0°

7. Interface Pin Function

Pin No. Symbol Level Description

1 VDD 5.0V Supply Voltage for logic
2 VSS 0V Ground
3 V0 (Variable) Operating voltage for LCD
4 RS H/L H: DATA, L: Instruction code
5 R/W H/L H: Read(MPUModule) L: Write(MPUModule)
6 E HL Chip enable signal
7 DB0 H/L Data bit 0
8 DB1 H/L Data bit 1
9 DB2 H/L Data bit 2

PAGE 7 OF 21
10 DB3 H/L Data bit 3
11 DB4 H/L Data bit 4
12 DB5 H/L Data bit 5
13 DB6 H/L Data bit 6
14 DB7 H/L Data bit 7
15 LED(+) Anode of LED Backlight
16 LED(-) Cathode of LED Backlight

PAGE 8 OF 21
8. POWER SUPPLY

SINGLE SUPPLY VOLTAGE TYPE

DUAL SUPPLY VOLTAGE TYPE

PAGE 9 OF 21
9. Contour Drawing &Block Diagram

AMC1602L

PAGE 10 OF 21
10. Function Description

The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an
instruction register (IR) and a data register (DR).
The IR stores instruction codes, such as display clear and cursor shift, and address information
for display data RAM (DDRAM) and character generator (CGRAM). The IR can only be written
from the MPU. The DR temporarily stores data to be written or read from DDRAM or
CGRAM. When address information is written into the IR, then data is stored into the DR from
DDRAM or CGRAM. By the register selector (RS) signal, these two registers can be selected.

RS R/W Operation
0 0 IR write as an internal operation (display clear, etc.)
0 1 Read busy flag (DB7) and address counter (DB0 to DB7)
1 0 Write data to DDRAM or CGRAM (DR to DDRAM or CGRAM)
1 1 Read data from DDRAM or CGRAM (DDRAM or CGRAM to DR)

Busy Flag (BF)

When the busy flag is 1, the controller LSI is in the internal operation mode, and the next
instruction will not be accepted. When RS=0 and R/W=1, the busy flag is output to DB7. The
next instruction must be written after ensuring that the busy flag is 0.

Address Counter (AC)

The address counter (AC) assigns addresses to both DDRAM and CGRAM

Display Data RAM (DDRAM)

This DDRAM is used to store the display data represented in 8-bit character codes. Its extended
capacity is 80×8 bits or 80 characters. Below figure is the relationships between DDRAM
addresses and positions on the liquid crystal display.

High bits Low bits

Example: DDRAM addresses 4E

AC
AC6 AC5 AC4 AC3 AC2 AC1 AC0 1 0 0 1 1 1 0
(hexadecimal)

PAGE 11 OF 21
 Display position DDRAM address

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
-Line by 16-Character Display

Character Generator ROM (CGROM)

The CGROM generate 5×8 dot or 5×10 dot character patterns from 8-bit character codes. See
Table 2.

Character Generator RAM (CGRAM)

In CGRAM, the user can rewrite character by program. For 5×8 dots, eight character patterns
can be written, and for 5×10 dots, four character patterns can be written.
Write into DDRAM the character code at the addresses shown as the left column of table 1. To
show the character patterns stored in CGRAM.

PAGE 12 OF 21
 Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character
patterns

Table 1.

F o r 5 * 8 d o t c h a ra c te r p a tte rn s
C h a ra c te r C o d e s C h a ra c te r P a tte rn s
C G R A M A d d re ss
( D D R A M d a ta ) ( C G R A M d a ta )

7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
H ig h Low H ig h Low H ig h Low
0 0 0 * * * 0
0 0 1 * * * 0 0 0
0 1 0 * * * 0 0 0
0 1 1 * * * 0 C h a ra c te r
0 0 0 1 0 0 * * * 0 0 0 p a tte rn ( 1 )
0 0 0 0 * 0 0 0
1 0 1 * * * 0 0 0
1 1 0 * * * 0 0 0
1 1 1 * * * 0 0 0 0 0 C u rs o r p a tte r n
0 0 0 * * * 0 0 0
0 0 1 * * * 0 0 0
0 1 0 * * *
0 1 1 * * * 0 0 0 0 C h a ra c te r
0 0 0 0 * 0 0 1 0 0 1 1 0 0 * * * p a tte rn ( 2 )
1 0 1 * * * 0 0 0 0
1 1 0 * * * 0 0 0 0
1 1 1 * * * 0 0 0 0 0 C u rs o r p a tte r n
0 0 0 * * *
0 0 1

0 0 0 0 * 1 1 1 1 1 1 1 0 0
1 0 1
1 1 0
1 1 1 * * *
F o r 5 * 1 0 d o t c h a ra c te r p a tte rn s
C h a ra c te r C o d e s C h a ra c te r P a tte rn s
C G R A M A d d re ss
( D D R A M d a ta ) ( C G R A M d a ta )

7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
H ig h Low H ig h Low H ig h Low
0 0 0 0 * * * 0 0 0 0 0
0 0 0 1 * * * 0 0 0 0 0
0 0 1 0 * * * 0 0
0 0 1 1 * * * 0 0
0 1 0 0 * * * 0 0 0
0 0 0 0 * 0 0 0 0 0 0 1 0 1 * * * 0 0 0
0 1 1 0 * * * 0 C h a ra c te r
0 1 1 1 * * * 0 0 0 0 p a tte rn
1 0 0 0 * * * 0 0 0 0
1 0 0 1 * * * 0 0 0 0
1 0 1 0 * * * 0 0 0 0 0 C u rs o r p a tte r n

1 1 1 1 * * * * * * * *

: " H ig h "

PAGE 13 OF 21
11. Character Generator ROM Pattern

Table.2

PAGE 14 OF 21
12. Instruction Table

Instruction Code
Execution time
Instruction Description
(fosc=270Khz)
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

Write “00H” to DDRAM and set

Clear Display 0 0 0 0 0 0 0 0 0 1 1.53ms
DDRAM address to “00H” from AC
Set DDRAM address to “00H” from AC
and return cursor to its original position
Return Home 0 0 0 0 0 0 0 0 1 Ё 1.53ms
if shifted. The contents of DDRAM are
not changed.
Entry Mode Assign cursor moving direction and
0 0 0 0 0 0 0 1 I/D SH 39μs
Set enable the shift of entire display.
Display
Set display (D), cursor (C), and blinking
ON/OFF 0 0 0 0 0 0 1 D C B 39μs
of cursor (B) on/off control bit.
Control
Set cursor moving and display shift
Cursor or
0 0 0 0 0 1 S/C R/L Ё Ё control bit, and the direction, without 39μs
Display Shift
changing of DDRAM data.
Set interface data length
(DL:8-bit/4-bit), numbers of display line
Function Set 0 0 0 0 1 DL N F Ё Ё 39μs
(N:2-line/1-line)and, display font type
(F:5×11 dots/5×8 dots)
Set CGRAM
0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter. 39μs
Address
Set DDRAM
0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address counter. 39μs
Address
Whether during internal operation or not
Read Busy
can be known by reading BF. The
Flag and 0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 0μs
contents of address counter can also be
Address
read.
Write Data to Write data into internal RAM
1 0 D7 D6 D5 D4 D3 D2 D1 D0 43μs
RAM (DDRAM/CGRAM).
Read Data Read data from internal RAM
1 1 D7 D6 D5 D4 D3 D2 D1 D0 43μs
from RAM (DDRAM/CGRAM).

Ϡ ”Ё”Κdon’t care

PAGE 15 OF 21
13. Timing Characteristics
13.1ʳ Write Operation

VIH1 VIH1
RS VIL1 VIL1

tAS tAH

R/W VIL1 VIL1

PWEH tAH
tEf
VIH1 VIH1
E VIL1 VIL1 VIL1
tEr tDSW tH
VIH1 VIH1
DB0 to DB7 VIL1 Valid data VIL1
tcycE

Ta=25ć, VDD=5.0± 0.5V

Item Symbol Min Typ Max Unit

Enable cycle time tcycE 1200 Ё Ё ns

Enable pulse width (high level) PWEH 140 Ё Ё ns

Enable rise/fall time tEr,tEf Ё Ё 25 ns

Address set-up time (RS, R/W to E) tAS 0 Ё Ё ns

Address hold time tAH 10 Ё Ё ns

Data set-up time tDSW 40 Ё Ё ns

Data hold time tH 10 Ё Ё ns

PAGE 16 OF 21
13.2ʳ Read Operation

VIH1 VIH1
RS VIL1 VIL1

tAS tAH
VIH1 VIH1
R/W
PWEH tAH
tEf
VIH1 VIH1
E VIL1 VIL1 VIL1
tEr tDDR tDHR
VOH1 VOH1
DB0 to DB7 VOL1*
Valid data
*VOL1
tcycE

NOTE: *VOL1 is assumed to be 0.8V at 2 MHZ operation.

Ta=25ć, VDD=5.0± 0.5V

Item Symbol Min Typ Max Unit

Enable cycle time tcycE 1200 Ё Ё ns

Enable pulse width (high level) PWEH 140 Ё Ё ns

Enable rise/fall time tEr,tEf Ё Ё 25 ns

Address set-up time (RS, R/W to E) tAS 0 Ё Ё ns

Address hold time tAH 10 Ё Ё ns

Data delay time tDDR Ё Ё 100 ns

Data hold time tDHR 10 Ё Ё ns

13.3 Timing Diagram of VDD Against V0.

Power on sequence shall meet the requirement of Figure 4, the timing diagram of VDD against
V0.
VDD

95%

LOGIC SUPPLY
VOLTAGE

0V V0
50ms(typical)

0V

LCD SUPPLY
VOLTAGE

PAGE 17 OF 21
14.Initializing of LCM

Power on

Wait for more than 40 ms after VDD rises to 4.5 V

BF can not be checked before this instruction.

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set
0 0 0 0 1 1 * * * *

Wait for more than 39us

BF can not be checked before this instruction.

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Function set
0 0 0 0 1 0 * * * *
0 0 N F * * * * * *

Wait for more than 39 Ps

BF can not be checked before this instruction.

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 1 0 * * * * Function set
0 0 N F * * * * * *

Wait for more than 37us

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display ON/OFF control
0 0 0 0 0 0 * * * *
0 0 1 D C B * * * *

Wait for more than 37 Ps

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display Clear
0 0 0 0 0 0 * * * *
0 0 0 0 0 1 * * * *

Wait for more than 1ms

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Entry Mode Set
0 0 0 0 0 0 * * * *
0 0 0 1 I/D SH * * * *

Initialization ends

4-Bit Ineterface

PAGE 18 OF 21
 Power on

Wait for more than 40 ms after VDDrises to 4.5 V

BF can not be checked before this instruction.

RS R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set
0 0 0 0 1 1 N F * *

Wait for more than 39us

BF can not be checked before this instruction.

RS R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Function set
0 0 0 0 1 1 N F * *

Wait for more than 37us

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display ON/OFF control
0 0 0 0 0 0 1 B C D

Wait for more than 37 Ps

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display Clear
0 0 0 0 0 0 0 0 0 1

Wait for more than 1ms

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Entry Mode Set
0 0 0 0 0 0 0 1 I/D S

Initialization ends

8-Bit Ineterface

PAGE 19 OF 21
15.Quality Assurance

Screen Cosmetic Criteria

Item Defect Judgment Criterion Partition
A)Clear
Size: d mm Acceptable Qty in active area
d ̰0.1 Disregard
0.1<d̰0.2 6
0.2<d̰0.3 2
0.3<d 0
Note: Including pin holes and defective dots which must
1 Spots Minor
be within one pixel size.
B)Unclear
Size: d mm Acceptable Qty in active area
d ̰0.2 Disregard
0.2<d̰0.5 6
0.5<d̰0.7 2
0.7<d 0
Size: d mm Acceptable Qty in active area
d̰0.3 Disregard
2 Bubbles in Polarizer 0.3<d̰1.0 3 Minor
1.0<d̰1.5 1
1.5<d 0
In accordance with spots cosmetic criteria. When the light
3 Scratch reflects on the panel surface, the scratches are not to be Minor
remarkable.
Above defects should be separated more than 30mm each
4 Allowable Density Minor
other.
Not to be noticeable coloration in the viewing area of the
LCD panels.
5 Coloration Minor
Back-light type should be judged with back-light on state
only.

PAGE 20 OF 21
16.Reliability

Content of Reliability Test

Environmental Test
Applicable
Test Item Content of Test Test Condition
Standard
High
Endurance test applying the high storage 60ć
Temperature ——
temperature for a long time. 96hrs
storage
Low
Endurance test applying the high storage -10ć
Temperature ——
temperature for a long time. 96hrs
storage
High Endurance test applying the electric stress
50ć
Temperature (Voltage & Current) and the thermal stress ——
96hrs
Operation to the element for a long time.
Low
Endurance test applying the electric stress 0ć
Temperature ——
under low temperature for a long time. 96hrs
Operation
High
Endurance test applying the high
Temperature/ 60ć,90%RH
temperature and high humidity storage for a ——
Humidity 96hrs
long time.
Storage
High Endurance test applying the electric stress
Temperature/ (Voltage & Current) and temperature / 50ć,90%RH
——
Humidity humidity stress to the element for a long 96hrs
Operation time.
Endurance test applying the low and high
temperature cycle.
Temperature -10ć 25ć 60ć -10ć/60ć
——
Cycle 10 cycles
30min 5min 30min
1 cycle
Mechanical Test
10~22Hz1.5mmp-p
Endurance test applying the vibration
Vibration test 22~500Hz1.5G ——
during transportation and using.
Total 0.5hrs
50G Half sign
Constructional and mechanical endurance
wave 11 msedc
Shock test test applying the shock during ——
3 times of each
transportation.
direction
***Supply voltage for logic system=5V. Supply voltage for LCD system =Operating voltage at 25ć

PAGE 21 OF 21