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SERVICE MANUAL
Model:
LCT3201TD
Safety Instructions.......................................................................1~2
Production specification...........................................................3~11
DVD Player's Spec. for LCD Comb..............................................12
LCD COMBO Connection............................................................13
Panel Inverter Power..............................................................14~29
Basic Operations & Circuit Description..................................... ..30
PCB Function........................................................................... .. 31
PCB Failure Analysis................................................................. 32
Basic Operation of LCD-TV...................................................33~34
IC Descriptions..................................................................... .35~45
LCD Panel specification........................................................ 46~101
Exploded View Diagram.............................................................. 102
Spare parts list.....................................................................103~104
V-Chip Password....................................................................... 105
Software Upgrade................................................................105~106
This manual is the latest at the time of printing, and does not
include the modification which may be made after the printing,
by the constant improvement of product.
I. Safety Instructions
The l ig h tn i ng fla sh w i th arro wh e ad symb ol ,

within an equilatera l triangle, is intended to alert
CAUTION the user to the presence of uninsulated “ dangerous
voltage” within the prod uct’ s enclosure that may
RISK O F ELECT RIC SHO CK be of sufficie nt mag nitud e to consti tute a risk of
DO NO T O PEN electric shock to persons.
The excla mati on po i nt wi thi n a n e q ui l ate ra l

CAUTION: TO REDUCE THE RISK OF ELECTRIC tri a n gl e is i nte n de d to a le rt th e u se r to th e
SHOCK, DO NOT REMOVE COVER (OR BACK). NO presence of important operating and maintenance
USER-SERVICEABLE PARTSINSIDE. REFER (s e rv i ci n g ) i n str u ct i o n s i n th e l i te r a tu re
SERVICING TO QUALIFIED SERVICE PERSONNEL accompanying the appliance.
ONLY.
PRECAUTIONS DURING SERVICING WARNING:

1. In a ddition to safe ty, othe r parts and assemblies are
speci fied for conformance with such regulatio ns as Before servicing this TV receiver, read the X-RAY
those applyi ng to sp urious radiation . These must RADIATION PRECAUTION, SAFETY INSTRUCTION
also be replace d only with specifie d replacements. and PRODUCT SAFETY NOTICE.
Exampl es: RF converters, tun er units, a ntenna
selection switches, RF cables, noise-blo cking X-RAY RADIATION PRECAUTION
capacitors, noise-bl ocking filters, etc. 1. Excessively high can prod uce potentially hazardous
2. Use sp ecified inte rnal Wiring . Note especially: X-RAY RADIATION. To avoid such hazards, the high
1) Wires covered with PVC tubing volta ge must no t exceed the speci fied limit. The
2) Do uble insulated w ires normal va lue of the high voltage of this TV receiver
3) Hig h voltage leads is 2 7 KV at zero b ean current (mi nimum b rightne ss).
3. Use specified i nsulating material s for haza rdous The high voltage must no t exceed 30 KV u nder any
live pa rts. Note espe cially: circu mstances. Each time when a re ceiver req uires
1) In sulating Tape servici ng, the high voltage sho uld be checked. The
2) PVC tubing readi ng of the high voltage is re commended to be
3) Spa cers (insu lating barriers) reco rded as a part o f the service record, It is
4) Insula ting sheets for transistors important to u se an accurate and reliable high
5) Plastic screws for fixing micro switches voltage meter.
4. When replacing AC primary side compo nents 2. The only source of X-RAY RADIATION in this TV
(tran sformers, power cords, n oise blo cking receiver is the picture tube. For con tinued X-RAY
capacitors, e tc.), wra p ends o f wires securely about RADIATION protectio n, the repla cement tube must be
the te rminals be fore solde ring. exactly the sa me type as specified in th e parts list.
3. Some parts in this TV receiver have special safety
related characteristics fo r X-RADIATION protection.
For continued safety, the parts rep lacement should
be under taken only afte r referring the PRODUCT
5. Make sure that w ires do no t contact heat generating SAFETY NOTICE.
parts (he at sin ks, oxide me tal fi lm resistors, fusi ble
resistors, etc.) SAFETY INSTRUCTION
6. Check if replace d wires do not conta ct sharply edged The se rvice shoul d not be attempted by anyone
or po inted pa rts. unfamiliar with the ne cessary i nstructio ns on th is TV
7. Make sure that foreign objects (screws, solder receiver. The fo llowing are the necessary instru ctions
drop lets, etc.) do not remain insi de the set. to be ob served before se rvicing.
1. An isolation transformer shoul d be con nected i n the
MAKE YOUR CONTRIBUTION TO PROTECT THE power li ne between the receiver and the AC line
ENVIRONMENT when a service is performed o n the primary of the
Used batte ries wi th the ISO symbol conve rter tra nsformer of the set.
for recycling a s well as small 2. Comply wi th all caution an d safety related provided
accumu lators (re chargeable batteries), mini-batteries on th e back of the cabi net, inside the cabinet, o n the
(cell s) and starter b atteries should not be thrown chassis or p icture tube.
into the garbage can. 3. To avo id a shock hazard, alw ays discharge the
Please leave the m at an ap propriate depot. pictu re tube's anode to the chassis g round be fore
removi ng the anod e cap.
-2-
ˋ
4. Completely discharge the high pote ntial voltage of the PRODUCT SAFETY NOTICE
picture tube before handli ng. The pi cture tube is a
Many e lectrical an d mechanica l parts in this TV
vacuum and if bro ken, the gl ass will explode.
5. When rep lacing a MAIN PC B in the cabinet, always receiver have special safety-related characteristics.
These characteri stics are offer passed unnoticed by
be certai n that all protective are installed properly
visual spection and the protecti on afforded by them
such as co ntrol knobs, adjustment co vers o r shie lds,
barri ers, iso lation resistor networks etc. cannot necessari ly be obta ined by using replacement
compon ents rates for a hig her voltag e, wattage , etc.
6. When se rvicing is re quired, observe the origin al lead
The replacemen t parts w hich have these sp ecial
dressing. Extra precau tion sho uld be gi ven to a ssure
correct lead dressing in the high voltage area. safety characteristics are identifie d by marks on
the schematic diag ram and on the parts l ist.
7. Keep wires away from high voltage or high te mpera
Before replacin g any of these compo nents, rea d the
ture compone nts.
8. Befo re returning the set to the customer, al ways parts list in thi s manua l care fully. The use of
substitute re placemen t parts which do not have the
perform an AC leaka ge current check on the exposed
same safety chara cteristics as speci fied in the p arts
meta llic parts of th e cabine t, such as anten nas,
termin als, screw heads, meta l overlay, control shafts, list may cre ate shock, fire, X-RAY RADIATION or
other h azards.
etc., to be sure the set i s safe to operate without
danger of electrica l shock. Plu g the AC lin e cord
directly to the AC outlet (do not use a line iso lation
transformer d uring th is check). Use an AC voltmeter
havin g 5K ohms volt sen sitivity or more i n the
following manner.
Conne ct a 1.5 K ohm 10 watt resistor pa ralleled by a
0.15µF AC type capacito r, between a go od earth
ground (water pipe, conductor etc.,) and the exposed
metallic parts, one a t a ti me.
Measure the AC vol tage across the combination of
the 1 .5K ohm resistor and 0.15 uF capacitor. Re verse
the AC p lug at the AC o utlet and repea t the AC
volta ge measurements fo r each exposed metallic
part.
The me asured voltage must not exceed 0.3 V RMS.
This correspo nds to 0.5mA AC. Any val ue exceeding
this limit co nstitute s a poten tial sho ck hazard and
must be corrected immedia tely.
The resista nce me asureme nt shou ld be done
betwe en accessi ble exposed metal parts and power
cord plug prong s with th e power switch "ON". The
resi stance should be mo re tha n 6M o hms.
AC VOLTMETER
Goo d ea rth grou nd Pl ace this pro be

su ch as th e wat er on eac h e x -
p ip e , c o n du c t or , p os ed me t al li c
etc. part
AC Leak age Curr ent Check
-3-
ˋ
KAWA ELECTRONIC RESEARCH & DEVELOPMENT CENTRE
Reference No : LCT3201TD
Product Specification
1.1 VIDEO SECTION CHIMEI V320B1-L01

MK8205
USA
Display size 32”/16:9

Display Resolution 1366 X 768
Pixel Pitch 0.17025mm×0.51075mm
Peak Brightness 550(nits)
Contract Ratio 1000:1, Typical (1/100 White Window, Dark Room)
View Angle Hor. And Vert. ≥170 degree
Color Deeps 16.7M Color (R / G/ B each 256 Scales)
PC Resolution Supporting VGA, SVGA, XGA,WXGA
HDTV Compatible 480p / 720p / 1080i
Progressive Scanning Yes
Film Mode Pull Down Yes
“GAMMA” Correction Yes
Color Temperature Control Yes
Comb Filter Yes
Second De-interlace for Sub picture No
Wide Mode Normal, Full, Wide 1, Wide 2, Wide 3, 4:3, No scale and
Panoramic.
TV System NTSC M
Dual Tuner System No
AV Input Color System PAL /NTSC
PIP Basic mode (video on graphic mode,resolution≥1024×768)
1.2 AUDIO SECTION
Audio Output Power 6W×2 Max.(8 ohm)
Sound Effect Spatial Effect and Surround
Tone Control Yes
1.3 Input Terminals D-Sub 15 Pin Type(Analog-RGB Input ) ×1
D-Sub 9 Pin (RS-232)
RF (F-type Input) ×1
Component Video-YPbPr ×1 RCA Terminals
S-Video Input (Mini Din 4Pin) ×1
Video Input RCA Terminals
Stereo Audio Input for YPbPr x 1
(3.5mm Phone Type) x 1
1.4 Output Terminals Audio Output (RCA ; L&R Type) ×1
1.5 Others
Closed Caption / V-Chip Yes
Teletext No
OSD Language English, FranÇais, Español
ˋ
Stereo Decode MTS with SAP

Power Rating AC 100-240V, 50/60Hz
Power Consumption 220W
1.6 Support the Signal Mode

This machine can support the different from VGA signal mode in 7 kinds
Horizontal Vertical
Resolution Frequency Frequency
(kHz) (Hz)
31.50 60.00
640 x 480
37.86 72.81
35.16 56.25
37.90 60.32
800 x 600
46.90 75.00
48.08 72.19
1024 x 768 48.40 60.00
1.7 HDTV Mode (YPbPr)

Horizontal Vertical
Resolution Frequency Frequency
(KHz) (Hz)
480i 15.734 59.94
480p(720x480) 31.468 59.94
720p(1280x720) 45.00 60.00
1080i(1920x1080) 33.75 60.00
ˋ
1.8 Remote Control
Power ( ): Press to turn on and off.

Mute ( ): Press to mute the sound.
Press again or press , to restore
the sound.
CCD: Press to select the Closed
Caption mode.
V-CHIP: Press to select the child
protect mode.
MTS: Press repeatedly to cycle through
the Multi-channel TV sound (MTS)
options: Mono, Stereo and SAP
(Second Audio Program).
Favorite: Press repeatedly to cycle
through the favorite channel list.
PIP. Pos: Press to change the PIP
window position under PIP mode.
PIP. Size: Press to cycle through the
PIP size, such as Large, Medium,
Small.
Add/Erase: Press to add or delete
favorite channel.
PIP: Press to cycles through the
different POP or PIP modes, such as
Basic PIP, LR POP, and exit.
0~9 Number Buttons: In TV mode,
press 0~9 to select a channel; the
channel changes after 2 seconds.
In DVD mode, press 0~9 to input the
items.
Zoom: Press to zoom the image max
from 8 times to minimally 1/8 times.
Recall: Press to return to previous
channel.
P.Mode: Press repeatedly to cycle
through the picture mode: Hi-Bright, User, Dark, Normal and Vivid.
P.Size: Press repeatedly to cycle through the picture size that best corresponds your
viewing requirements: Normal, Full, Wide1, Wide2, Wide3, 4:3, No scale, Panoramic
and Normal.
When in POP mode, it can select picture size is: Full, 4:3 and Normal.
Vol / : Press to adjust the volume.
Ch / : Press to scan through channels. To scan quickly through channels, press
and hold down either channels.
Freeze: Press to freeze the picture, press again to restore the picture.
(Continued on next page)
ˋ
Menu: Press to enter into the on-screen
setup menu, press again to exit.
S.Mode: Press repeatedly to cycle
through the sound mode: Normal,
News, Cinema, Flat and User.
, , , , Enter: Press , , ,
to move the on-screen cursor. To
select an item, press ENTER to
conﬁrm. And it can also press or
to scan through channels, press
or to adjust the volume excepting
DVD mode.
System: Press repeatedly to cycle
through the system options: AUTO
and NTSC3.58.
(This button is inactive for TV, VGA,
COMPONENT input source.)
Source: Press to select the signal
source, such as TV, AV, S-Video,
Component, DVD or VGA.
Sleep: Press repeatedly until it
displays the time in minutes (5 Min,
10 Min, 15 Min, 30 Min, 60 Min, 90
Min, 120 Min and, OFF) that you
want the TV to remain on before
shutting off. To cancel sleep time,
press Sleep button repeatedly
until sleep OFF appears.
Display: Press to display the channel
information and it disappear after 3
seconds.
Play/Pause: Press to play or pause
the DVD disc.
Stop: Press to stop playing the disc.
Angle: Press to select desired viewing
angle of the Video (disc feature).
Open/Close: Press to open or close
the disc tray.
Skip+/-: Press to skip the forward or backward.
Search+/- : Press to search the forward or backward.
DVD Menu: Press to return DVD disc menu.
(Continued on next page)
ˋ
DVD Info: Press to display DVD
information.
Setup: Press to display a menu.
Press it again to exit menu.
Repeat: Press repeatedly to cycle
through the options: CHAPTER,
TITLE, ALL and nothing.
Audio: Press to select desired audio
track.
Prog: Press to display the program
menu. Press it again to exit.
Sub. title: Press to select desired
DVD subtitle.
Title: Press to display to DVD disc
title.
Note: Press Ch / on the remote

control can turn on TV set from
last preview mode.
l
.
ˋ
Reference No : LCT32ADTD
Technical Data
1. Power supply TV AC 100-240, 50/ 60Hz

Remote control Battery 3V (UM-3/R6P/AA×2)
2. TV system RF input NTSC M
Video input PAL/NTSC 3.58
3. Receiving channels TV VHF-L : 2~6CH
VHF-H : 7~13CH
UHF : 14~69CH
CATV 1~125CH
4. Intermediate Picture 45.75MHz

frequencies
5 . Scanning Horizontal (Hz) 15625/15750
Vertical (Hz) 50/60
6 . AC plug UL Plug
7. Panel V320B1-L01
8. Speaker Internal 8 ohm 10W (max) ×2
9. Operating Fulfill all specifications 15°C ~ 30°C
temperature
Accept picture/sound 5°C ~ 33°C
reproduction
10. Operating relative Fulfill all specifications 45% ~ 75%
humidity
Accept picture/sound 20% ~ 80%
reproduction
11. Electrical & See the attachment 1.
optical
specification
12. Circuit diagram LCT32HAB
drawing No.
13. Cabinet
14. Cabinet color
15. Packing 1 set per
16. Container stuffing RD/05/P/LC26HAB/CSI/02 REV: 01
method
17. Dimension (mm) LCD-TV 799(W) × 569.7(H)× 107(D)mm (w/o Stand)
(No packing) 799(W) × 635.8(H) × 267.5(D)mm (with Stand)
Remote control unit 183(L) × 53(W) ×28(T)mm
18. Net weight LCD-TV 18.8Kg (with Stand) approx.
Remote control 70g (approx.)
19. Cell Defect Subject to Panel supplier specification
ˋ
Attachment 1：Electrical & Optical Specification

No. Items Instruction Typical Limit Unit
1 Video sensitivity For 30dB S/N 44 ≤51 dBuV
2 FM sound sensitivity For 30dB S/N 21 ≤35 dBuV
3 Color sensitivity For RF transmission 37 ≤40 dBuV
4 CCD sensitivity TV screen refreshes 40 times 43 ≤50 dBuV
number of mistakes≤8
5 Minimum NICAM threshold Without crackline noise N/A N/A dBuV
6 Stereo Channel Separation BTSC. 18 ≥15 dB
7 AGC static characteristic Accept. Picture/Sound repr. 90 ≥90 dBuV

8 Selectivity Adjacent sound carrier 30 ≥28
Below adjacent sound carrier 30 ≥30 dB
Adjacent picture carrier 45 ≥40
Up adjacent picture carrier 40 ≥30
9 IF rejection 55 ≥45 dB
10 Image rejection VHF 57 ≥45 dB
UHF 55 ≥40
11 AFT pull-in range ±1.0 ≥⏐±1.0⏐ MHz
12 Chroma sync pull-in range ±500 ≥⏐±200⏐ Hz
13 Color killer function -11 ≤-10 dB
14 Resolution RF Horizontal PAL 300 ≥300 Lines
NTSC 260 ≥240 Lines
Vertical PAL 410 ≥400 Lines
NTSC 320 ≥300 Lines
Video Horizontal 450 ≥450 Lines
Vertical 400 ≥400 Lines
15 Color White XW Full Pattern 0.295 0.295±0.02

Coordination YW 0.300 0.300±0.02
16 View Horizontal 170 ≥170 Degree
Angle(Lo/3) Vertical
17 Overscan Cross hatch signal 96 94~98 %
18 Picture position In all direction ±2 ≤⏐±3⏐ mm
19 H sync pull-in range ±400 ≥⏐±200⏐ Hz
20 V sync pull-in range 6 ≥6 Hz
21 Audio frequency response ±3dB ref. to 1KHz 0.15~12 0.2~12 KHz
ˋ
22 Max Audio Output Power 7×2 ≥5.0×2 W
23 Audio output power 1KHz 10% THD 6×2 ≥4.0×2 W

10% THD
24 THD Po=0.5W 0.5 ≤3 %
25 Signal to buzz ratio coeighting 50 ≥30 dB
26 Minimum volume hum coeighting 6 ≤10 mVrms
27 Maximum woofer output power N/A N/A W
28 Woofer audio frequency ±3dB ref. to 15Hz AV N/A N/A Hz
response mode
29 Tone low frequency 100Hz ref. to 1KHz ±8 ≥⏐±3⏐ dB
AV mode
30 Tone high frequency 10KHz ref. to 1KHz ±8 ≥⏐±3⏐ dB
AV mode
31 Balance Center 0 ≤⏐±2⏐
Max. 3 >2 dB
Min. -35 ≤-30
32 Video input level 1.0 1±0.3 Vpp

33 Audio input level*（1） 1.0 * 0.5±0.3 Vrms
34 Video output level N/A N/A Vrms
35 Audio output level*（2） 0.3 * 0.5±0.3 Vrms
36 AV Audio input max. level 2 ≤2 Vrms
37 AV Audio output L/R 35 ≥30 dB
Separation
38 Power consumpution Operating 200 ≤200 W
Stand by 3 ≤5 W
39 IR receiving distance 0 Degree 7 ≥6 m
40 IR receiving left/right 5m 60 ≥45 Degree
angle Up/down 20 ≥15 Degree
41 Dielectric strength DC 3KV 1min. 5 ≤10 mArms
42 The vibration noise from The distance between No obvious vibration noise can be
electromagnetic devices in LCD- the tester and the heard
TV set LCD-TV set is four
times as many as the
screen height
ˋ
Test Condition
All tests shall be performed under the following conditions unless otherwise specified
1 Picture Modulation 87.5%
2 Sound Modulation 27KHz Dev. For DK/I/BG
15KHz Dev. For M/N
3 Picture to Sound Ratio 10dB
4 Sound Artificial Load 8 ohm
Resistor
5 Video signal Stair and Special
6 Audio signal 1KHz sine wave 0.5Vrms
7 Other conditions:
A. Switch LCD-TV on and let it warm up for more than 30 minutes.
Viewing distance: 3H (H: Panel High) in front of LCD, about 2M.
Ambient light: ≤0.1 cd/ m2
B. Brightness, Contrast, Saturation, Tint, sharpness set at normal.
C. Connect RMS volt meter to speaker terminals and adjust the LCD volume to get 500mW RMS
power at each terminals.
D. With image sticking protection of LCD module. The luminance will descend by time on a same
still screen and rapidly go down in 5 minutes, when measuring the color tracking and luminance
of a same still screen, be sure to accomplish the measurement in one minute to ensure its
accuracy.
E. Due to the structure of LCD module. The extra-high-bright same screen should not hold over 5
minutes for fear of branding on the panel.
F. RF test point: Video output.
8 Note:
*(1) Now this project cannot fit the limited spec. the typical audio input level is 1.0 Vrms,
*(2) The audio out level is controlled by the volume level, the range is from 0 to 0.5Vrms.
ˋ
DVD player's spec. For LCD-TV Combo
Division Section Remarks
name AKAI
Marketing Area( setup default language) USA
General Power supply +5v,+3.3v
Power Consumption 15W
Manufactruer of Loader mechanism Foryou DL06-LS
Opitical Pick UP Sanyo HD-62/65
DVD Module
Chipset used MTK 1389FE
Playback Playable Media Type Playable Disc Type: DVD, CD,
Disc Type Playable Disc Type DVD(Single/ Dual layer, Double sided), CD
Disc Size 8cm/12cm
Regional code Regional 1
NTSC/ PAL Disc playback O/O
Video Video output signal NTSC
Video DAC 27MHz/ 10bit
Audio Audio DAC 48Khz/ 96KHz/24-bit:selectable
Dynamic range Present
Dolby digital decoder Present
DTS decoder optional
SRS + TruSurround for 2 channel Not present
3D Virtual surround for 2 channel Not present
Playback Fast forward/backward x2,x4,x8,x16,x32
Features Slow motion forward x1/2,x1/4,x1/8,x1/16
Slow motion backward optional
Still picture Present
Frame by frame forward/reverse Forward only (Step function)
Skip forward/reverse Present
Repeat function Present
DVD closed caption Present
Transition Effect for picture CD Not present
Rotation of picture for picture CDs Present
Last Memory Present
Display Graphical user interface Not present
user OSD Language 3 (ENG is base ,SPA and French)
operation Subtitle Present
Screen saver Present
Resume play Present
Program function Present
PBC ON/OFF Default on PCB
Parental lock Passward : 0000
Picture mode selector 16:9, 4:3 LB, 4:3 PS(4:3 PS as default)
Intro scan Not present
Digest in VCD Present, only for PIC CD
Time search Present
Multi angle Present
Selectable audio language streams Present
kalaoke function x
Front Panel VFD/ LED x
No. of keys 3(Open/Close, Play, Stop)
Rear Panel Composite Video output x
Component Video output x
Progressive scan output (480P) Present
2 channel audio output Present
Coaxial audio output Present
ˋ
LCD COMBO Connection
L
Key Board
PWM
On/Off
Turner+Amp LVDS×1 Panel Backlight
Main board PWM
+24V
+24V IR1
+5V +5V STB
+5V IR2 +12V
Power board
Key Board
DVD Y/Pb/Pr (480p)
L/R
３ˋ
5 4 3 2 1
Dimming
Dimming
BL_ON/OFF
BL_ON/OFF
Inverter_PWR
PANEL INVERTER POWER Inverter_PWR
D D
HOLE/GND + CE1 + CE2 C1 C2
H1 470uF/50v 470uF/50v 0.1uF 0.1uF
9 9 2 2
8 3 PWR_GND
8 3
7 7 4 4
6 6 5 5
1
FB5 J1
1
120R
Inverter_PWR 1
2
3
4 J2
5
R. ANGLE
HOLE/GND 6 1 INVERTER_PWR
H2
7 2
C 9 9 2 2 8 3 C
8 3 9 4 PWR_GND
8 3
7 7 4 4 10 5
6 5 Dimming 11 6
6 5 BL_ON/OFF 12
1
FB6 8x1 W/HOUSING

1
120R 12x1 W/HOUSING R.A SIP6\2.54

SIP12\2
J3
1
C3 2
0.1uF 3
HOLE/GND 4
H3
R. ANGLE
5
9 9 2 2 6
B
8 8 3 3 7 B
7 7 4 4 8
6 6 5 5 9
10 HOLE/GND
H5
1
FB7 PWR_GND 9 2
9 2
1
120R 10x1 W/HOUSING R.A. 8 3

SIP10\2 8 3
7 7 4 4
6 6 5 5
FB1 FB2
120R 120R
1
1206 FB9
1
HOLE/GND 1206 120R
H4
9 9 2 2
8 8 3 3
7 7 4 4
6 6 5 5
A A
1
FB8 Title
1
120R <Title>
ˋ Size Document Number Rev

A <Doc> <RevCode>
４ˋ Date: Wednesday, August 24, 2005 Sheet 1 of 2
5 4 3 2 1
5 4 3 2 1
J5 Dimming
BL_ON/OFF Dimming
VGA_R BL_ON/OFF
R 1
2 Dimming 2 1 BL_ON/OFF
D D
3 4 3 J6
J4 L 4 VGA_L RSTXD 6 5 RSRXD
VGA AUDIO G 8 7 CON\SVHS
PHONEJACK/DIP VGA_R 10 9 VGA_L SC_IN 2 3 SY _IN
12 11 SC_GND1 1 4 SY_GND1
K1
K2
K3
K4
K5
RED 14 13
RED_GND 16 15 GREEN 7 5
BLUE 18 17 GRN_GND
BLU_GND 20 19
6
22 21 VGA_PWR
VGA_SDA 24 23
VSYNC# 26 25 HS YNC#
16
J7 DSUB15/DIP/F 28 27 VGA_SCL
DB15
RSRXD RED PC CONNECTOR J8
11 1
6 RED_GND DIP14X2/P2.54/R2 1 Y1_INB
C VGA_SDA 12 2 GREEN 2 Y1_GNDB C
7 GRN_GND
HS YNC# 13 3 BLUE 3 CB1_INB
8 BLU_GND 4 CB1_GNDB
VSYNC# 14 4 RSTXD J9
9 VGA_PWR 5 CR1_INB
VGA_SCL 15 5 Y1_INB 2 1 CB1_INB 6 CR1_GNDB
10 Y1_GNDB 4 3 CB1_GNDB
CR1_INB 6 5 RCA1X3
CR1_GNDB 8 7 YPBPR1/L RCA3/6P/DIP
10 9 YPBPR1/R
J10
17
AV1_IN 12 11
14 13 AV_L 1 YPBPR1/L
SC_IN 16 15 AV_R 2
SC_GND1 18 17
SY _IN 20 19 SY_GND1 3 YPBPR1/R
4
RCA1X2
B B
VIDEO CONNECTOR RCA2/4P/DIP
DIP10X2/P2.54/R2
J11
1 AV1_IN
2
FB3 FB4 3 AV_L

120R 120R 4
5 AV_R
6
RCA1X3
RCA3/6P/DIP
AUIO IN/OUT GND ANALOG INPUT GND DIGITAL GND
A A
Title
<Title>
ˋ Size Document Number Rev

A <Doc> <RevCode>
５ˋ Date: Wednesday, August 24, 2005 Sheet 2 of 2
5 4 3 2 1
A B C D E
J1
AN0 1
AP0 2
AN1 3
AP1 4
4 VSYNC 4
VSYNC 3 AN2 5
HSYNC
HSYNC 3 AP2 6
R
R 3 7
G CLK1-
G 3 8
B CLK1+
B 3 9
AN3 10
CLK1+ AP3
CLK1+ 3 11
CLK1- VCC +12V AN4
CLK1- 3 12
CLK2+ AP4 13
CLK2+ 3
CLK2- 14
CLK2- 3
AN5
CRT OUT
Optinal for 12V pannel.Added by bin_wang 16/7/05 15
ORO1 AP5 16
ORO1 3
17
FB1 FB2 AN6 18
75R 75R/NC AP6 19 R R
0805 0805 CLK2- 20
CLK2+ 21 R1
AP[0..7] AP[0..7] 3 AN7 22
AN[0..7] AN[0..7] 3 Add LVDS VCC control by Zheng_guo 15/9/05. AP7 23 75 1%
24 GND
25
26 G G
Q9
+12V F1 27
+12V 1 LVDSVDD R2 HSYNC
1 S1 D1 8 28
2 G1 D1 7 29
3 6 30 75 1% VSYNC
4A/32v + CE1 S2 D2 GND
4 G2 D2 5
1206 330uF/25v
IR7314 FI-SE30P-HF B
C330UF25V/D8H14 SOP8 + CE2 + CE3 LVDS/30P/P1.25/S B VS HS
220uF/16v 220uF/16v C1 C2 R3
+12V 0.1uF 0.1uF
75 1%
GND
R209 R210
3 22k 22k 3
RGB OUTPUT FOR DEBUGGING
ORO1 High :LVDSVDD POWER OFF
ORO1 LOW :LVDSVDD POWER ON
R211
3
ORO1 1 Q10
2N3904
2k
ORO3
ORO3 3
PWM0
PWM0 3
Dimming
Dimming 6
BL_ON/OFF
BL_ON/OFF 6
2 ORO3 High :PANEL BACKLIGHT POWER OFF 2
ORO3 LOW :PANEL BACKLIGHT POWER ON
FOR CHI-MEI INVERTER
VCC CONNECTOR
R4 0
R5
10k
R6
Dimming
3
R7 100k
PWM0 1 Q1 C3
2N3904 0.1uF VCC
SOT23
4.7k
2
R8
10k
Back Light circuit BL_ON/OFF

3
R9
ORO3 1 Q2
2N3904
4.7k SOT23
2
1 1
MiCO Confidential
Title
ˋ MiCO LCD TV - MediaTek MT8203 Solution
Size Doc Number Rev
C LVDS/CRT/BACKLIGHT CONTROL V0.1
Date: Wednesday, September 28, 2005 Sheet 1 of 10
A B C D E
６ˋ
A B C D E
VGASOG
VGASOG 3
RED+ R11 C4
RED+ 3 R13 C5 Y Y+
RED- CVBS0 R12 18 CVBS0+
RED- 3
100
22 47nF
GREEN+ 47nF
GREEN+ 3
R15 C6
GREEN- C7 15pF
GREEN- 3 330pF
56 R16 C8
R17 C9 Y_GND Y-
BLUE+ CVBS0_GND CVBS0-
BLUE+ 3
100
4 4
BLUE- 0 47nF
BLUE- 3
47nF
R19 C10
CB+ CB CB+
CB+ 3 R21 C11
CB- CVBS1 CVBS1+ 100
CB- 3
47nF
CR+ 22 C12
CR+ 3 15pF
47nF
CR-
CR- 3
C13 R24 C14
Y+ 330pF CB_GND CB-
Y+ 3
C15
Y- CVBS1_GND CVBS1- 100
Y- 3
47nF
Change.
SY+ 47nF
SY+ 3
R27 C16
SY- CR CR+
SY- 3
100
SC+ 47nF
SC+ 3
C17
SC- 15pF
SC- 3
R29 C18
CVBS0+ CR_GND CR-
CVBS0+ 3
CVBS0- Change. 100
CVBS0- 3
47nF
CVBS1+
CVBS1+ 3 R31 C19
CVBS1- SY SY+
CVBS1- 3
22
3 47nF 3
CE4
FROM Tuner C20
+
330pF
C21
47uF/16v /NC SY_GND SY-
MPX1 C22
MPX1 3
SIF1_OUT R35 8.2K MPX1 47nF
MPX2
MPX2 3
47nF R37 C25
C23 C24 SC SC+
OUTPUT 15pF/NC 15pF/NC
22
47nF
C26
C27
Y 330pF
Y 7
C28
Y_GND 47nF/NC SC_GND SC-
Y_GND 7
CB
AF Path CE5
CB 7
AF1_OUT R40 39k R41 39k MPX2 47nF
+
CB_GND
CB_GND 7
CR 47uF/16v
CR 7
C29 C30 ATTENTION:WHEN PCB LAYOUT,MUST NEAR VGA INPUT PORT! BIN_WANG. 16/7/05
CR_GND 15pF 15pF
CR_GND 7
C31
SOY RED R42 68 RED+
SOY 3,7
SY 47nF
SY 7
SY_GND
SY_GND 7
C32
5pF C33
2 2
SC RED_GND R44 100 RED-
SC 7
SC_GND
SC_GND 7
FB4 47nF
70R C34
VGASOG
4.7nF
CVBS0
CVBS0 7
C35
CVBS0_GND GREEN R46 68 GREEN+
CVBS0_GND 7
CVBS1 47nF
CVBS1 7
CVBS1_GND C36
CVBS1_GND 7 5pF
C37
SIF1_OUT GRN_GND R48 100 GREEN-
SIF1_OUT 7
AF1_OUT
AF1_OUT 7
FB6 47nF
RED 70R
RED 6
GREEN
GREEN 6
BLUE C38
BLUE 6
BLUE R49 68 BLUE+
RED_GND
RED_GND 6
47nF
GRN_GND
GRN_GND 6
C39
BLU_GND 5pF
BLU_GND 6
C40
1 BLU_GND R51 100 BLUE- 1
FB8 47nF
70R
INPUT
MODIFIED BY BIN_WANG 16/7/05.
MiCO Confidential
Title
Size Doc Number Rev
C AV IN V0.1
Date: Thursday, September 15, 2005 Sheet 2 of 10
A B C D E
７ˋ
A B C D E
TXD
TXD 3
RXD
RXD 3
VGA_IN_L
Dimming VGA_IN_L 10
Dimming 9 VGA_IN_R
BL_ON/OFF VGA_IN_R 10
BL_ON/OFF 9 VGASDA
VGASDA 3
VGASCL
VGASCL 3
HSYNC_VGA
4 HSYNC_VGA 3 4
VGA_PLUGPWR
RSRXD VGAVSYNC#
VGAVSYNC# 3
U1 VGA_PLUGPWR RED_GND
RED_GND 8
RSTXD 13 12 VGA_PLUGPWR
R1IN R1OUT GRN_GND
8 R2IN R2OUT 9 GRN_GND 8
11 T1IN T1OUT 14
10 7 BLU_GND
T2IN T2OUT BLU_GND 8
+5V RED
C41 0.1uF 1 TXD RED 8
C+
3 C1- C43 R52 R53 GREEN
C42 0.1uF 4 16 RXD U2 4.7k 4.7k GREEN 8
C2+ VCC
+5V 5 C2- 1 8 BLUE
C44 0.1uF 2 C45 0.1uF NC VCC BLUE 8
V+ 0.1uF 2 NC WP 7
6 V- GND 15 3 6 VGASCL
C46 0.1uF NC SCL VGASDA
4 GND SDA 5
MAX232A
EEPROM 24C02 GND
Modified by MICO. R54 15K

3 3
VGA_R VGA_IN_R
Dimming 28 27 BL_ON/OFF
26 25 R55 15K
RSTXD 24 23 RSRXD VGA_L VGA_IN_L
22 21
VGA_R 20 19 VGA_L
18 17 R56 R57
RED 16 15 75K 75K
RED_GND 14 13 GREEN
BLUE 12 11 GRN_GND
BLU_GND 10 9
8 7 VGA_PWR
VGA_SDA 6 5
VSYNC# 4 3 HSYNC#
2J2 1 VGA_SCL
PC CONNECTOR
DIP14X2/P2.54/R1
VCC
FB9
2 2
VSYNC# VGAVSYNC#
D1
70R
0603 DIODE SMD
R58 D2 1N4148/SMD
2.2k
C47 VGA_PWR VGA_PLUGPWR
100pF
VGASDA R59 33 VGA_SDA DIODE SMD

FB10 1N4148/SMD
HSYNC# HSYNC_VGA
VGASCL R60 33 VGA_SCL
70R
0603 R61
2.2k
C48
5pF
1 1
MiCO Confidential
Title
MiCO LCD TV - MediaTek MT8203 Solution
Size Doc Number Rev
B VGA IN & PC AUDIO IN V0.1
A B C D E
８ˋ
ˋ
A B C D E
D1V25
RN4 U3
F_D[0..7] F_D[0..7] 3 A_RA3 7 8 D_RA3 SDV25 SDV25 RN1 F_A1 25 29 F_D0
F_A[0..21] F_A[0..21] 3 A_RA2 D_RA2 D_RA0 F_A2 A0 D0 F_D1
5 6 U4 7 8 24 A1 D1 31
A_RA1 3 4 D_RA1 D_RA1 5 6 F_A3 23 33 F_D2
A_RA0 D_RA0 D_RA2 F_A4 A2 D2 F_D3
1 2 1 VDD VSS 66 3 4 22 A3 D3 35
D_DQ0 2 65 D_DQ15 D_RA3 1 2 F_A5 21 38 F_D4
A_DQS[0..3] A_DQS[0..3] 3 RN5 22x4 DQ0 DQ15 F_A6 A4 D4 F_D5
3 VDDQ VSSQ 64 20 A5 D5 40
A_RA[0..11] A_RA[0..11] 3 A_RA4 7 8 D_RA4 D_DQ1 4 63 D_DQ14 75x4 F_A7 19 42 F_D6
A_BA[0..1] A_BA[0..1] 3 A_RA5 D_RA5 D_DQ2 DQ1 DQ14 D_DQ13 RN2 F_A8 A6 D6 F_D7
5 6 5 DQ2 DQ13 62 18 A7 D7 44
A_DQM[0..1] A_DQM[0..1] 3 A_RA6 3 4 D_RA6 6 61 D_RA4 8 7 F_A9 8 30
A_DQ[0..31] A_DQ[0..31] 3 A_RA7 D_RA7 D_DQ3 VSSQ VDDQ D_DQ12 D_RA5 F_A10 A8 D8
1 2 7 DQ3 DQ12 60 6 5 7 A9 D9 32
D_DQ4 8 59 D_DQ11 D_RA6 4 3 F_A11 6 34 DV33A
A_CLK A_CLK 3 RN7 22x4 DQ4 DQ11 D_RA7 F_A12 A10 D10
9 VDDQ VSSQ 58 2 1 5 A11 D11 36
A_CLK# A_CLK# 3 A_RA8 7 8 D_RA8 D_DQ5 10 57 D_DQ10 F_A13 4 39
4
A_CKE A_CKE 3 A_RA9 D_RA9 D_DQ6 DQ5 DQ10 D_DQ9 75x4 F_A14 A12 D12 4
5 6 11 DQ6 DQ9 56 3 A13 D13 41
A_CS# A_CS# 3 A_RA11 3 4 D_RA11 12 55 RN3 DV33A F_A15 2 43 R62
A_RAS# A_RAS# 3 A_RA10 D_RA10 D_DQ7 VSSQ VDDQ D_DQ8 F_A16 A14 D14 F_A0
1 2 13 DQ7 DQ8 54 2 1 1 A15 D15 45
A_CAS# A_CAS# 3 14 53 D_RA11 4 3 F_A17 48 16 F_A19
A_WE# A_WE# 3 22x4 NC NC D_RA9 F_A18 A16 A18 10k
15 VDDQ VSSQ 52 6 5 17 A17 NC 13
D_DQS0 16 51 D_DQS1 D_RA8 8 7 15 14 DV33A
LDQS UDQS R63 F_A20 RY/BY WP/ACC
17 NC NC 50 9 A19 BYTE 47
SDV25 SDV25 3 18 49 VREF 75x4 F_A21 10
VREF VREF 3 RN9 VDD VREF IOCE# A20 FLASHVCC
19 DNU VSS 48 26 CE VCC 37
IOWR# IOWR# 3 A_DQ0 7 8 D_DQ0 D_DQM0 20 47 D_DQM0 C66 D_RA10 R64 75 10k F_OE# 28
IOCE# IOCE# 3 A_DQ1 D_DQ1 D_WE# LDM UDM D_CLK# IOWR# OE
5 6 21 WE CK 46 11 WE GND1 27
F_OE# F_OE# 3 A_DQ2 3 4 D_DQ2 D_CAS# 22 45 D_CLK 46 C49
A_DQ3 D_DQ3 D_RAS# CAS CK D_CKE 0.1uF RN6 GND2 0.1uF
1 2 23 RAS CKE 44 DV33A 12 RESET
D_CS# 24 43 D_DQ0 7 8
RN11 47x4 CS NC D_DQ1
25 NC A12 42 5 6
A_DQ4 7 8 D_DQ4 D_BA0 26 41 D_RA11 D_DQ2 3 4 MX29LV800BT
F_D[0..7] F_D[0..7] 3 A_DQ5 D_DQ5 D_BA1 BA0 A11 D_RA9 D_DQ3
5 6 27 BA1 A9 40 1 2 TSOP 48 pin
A_DQ6 3 4 D_DQ6 D_RA10 28 39 D_RA8
A_DQ7 D_DQ7 D_RA0 A10/AP A8 D_RA7 75x4 D1V25
1 2 29 A0 A7 38
F_OE# F_OE# 3 D_RA1 30 37 D_RA6 RN8
RN13 47x4 D_RA2 A1 A6
A2 8M x 16
31 36 D_RA5 D_DQ4 7 8 D1V25
A_DQ8 D_DQ8 D_RA3 A5 D_RA4 D_DQ5
7 8 32 A3 DDR A4 35 5 6
A_DQ9 5 6 D_DQ9 33 34 D_DQ6 3 4
F_A[0..21] F_A[0..21] 3 D_DQ10 VDD VSS D_DQ7 C50 C51 C52 C53 C54 C55 C56 C57
A_DQ10 3 4 1 2
A_DQ11 1 2 D_DQ11 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
M13S128168 8Mx16-6
75x4
RN14 47x4 RN10
A_DQ12 7 8 D_DQ12 D_DQ8 7 8
A_DQ13 5 6 D_DQ13 D_DQ9 5 6
A_DQ14 3 4 D_DQ14 D_DQ10 3 4
A_DQ15 1 2 D_DQ15 D_DQ11 1 2
C192 C193 C194 C195 C196 C197 C198 C199
47x4 SDV25 SDV25 75x4 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
RN12
RN24 U16 D_DQ12 7 8
A_DQ16 7 8 D_DQ16 1 66 D_DQ13 5 6
A_DQ17 D_DQ17 D_DQ16 VDD VSS D_DQ31 D_DQ14 3
5 6 2 DQ0 DQ15 65 4
3 A_DQ18 3 4 D_DQ18 3 64 D_DQ15 1 2 3
A_DQ19 D_DQ19 D_DQ17 VDDQ VSSQ D_DQ30
1 2 4 DQ1 DQ14 63
D_DQ18 5 62 D_DQ29 75x4 C58 C59 C60 C61 C62 C63 C64 C65
47x4 DQ2 DQ13 RN25 3300pF 3300pF 3300pF 3300pF 3300pF 3300pF 3300pF 3300pF
6 VSSQ VDDQ 61
RN26 D_DQ19 7 60 D_DQ28 D_DQ16 2 1
A_DQ20 D_DQ20 D_DQ20 DQ3 DQ12 D_DQ27 D_DQ17 4
7 8 8 DQ4 DQ11 59 3
A_DQ21 5 6 D_DQ21 9 58 D_DQ18 6 5
A_DQ22 D_DQ22 D_DQ21 VDDQ VSSQ D_DQ26 D_DQ19 8
3 4 10 DQ5 DQ10 57 7
A_DQ23 1 2 D_DQ23 D_DQ22 11 56 D_DQ25
DQ6 DQ9 75x4
12 VSSQ VDDQ 55
RN27 47x4 D_DQ23 13 54 D_DQ24 RN28 C200 C201 C202 C203 C204 C205 C206 C207
A_DQ24 D_DQ24 DQ7 DQ8 D_DQ20 2 3300pF 3300pF 3300pF 3300pF 3300pF 3300pF 3300pF 3300pF
7 8 14 NC NC 53 1
A_DQ25 5 6 D_DQ25 15 52 D_DQ21 4 3
A_DQ26 D_DQ26 D_DQS2 VDDQ VSSQ D_DQS3 D_DQ22 6
3 4 16 LDQS UDQS 51 5
A_DQ27 1 2 D_DQ27 17 50 D_DQ23 8 7 D1V25
NC NC VREF
18 VDD VREF 49
RN29 47x4 19 48 75x4
A_DQ28 D_DQ28 D_DQM1 DNU VSS D_DQM1 RN30
7 8 20 LDM UDM 47
A_DQ29 5 6 D_DQ29 D_WE# 21 46 D_CLK# C208 D_DQ27 1 2 + CE7 + CE6
A_DQ30 D_DQ30 D_CAS# WE CK D_CLK D_DQ26 3
3 4 22 CAS CK 45 4 220uF/16v
A_DQ31 1 2 D_DQ31 D_RAS# 23 44 D_CKE 0.1uF D_DQ25 5 6 C270UF16V/D10H12
D_CS# RAS CKE D_DQ24 7
24 CS NC 43 8
47x4 25 42
D_BA0 NC A12 D_RA11 75x4
26 BA0 A11 41
D_BA1 27 40 D_RA9 RN31
D_RA10 BA1 A9 D_RA8 D_DQ31 1
28 A10/AP A8 39 2
A_DQS0 R65 47 D_DQS0 D_RA0 29 38 D_RA7 D_DQ30 3 4
D_RA1 A0 A7 D_RA6 D_DQ29 5
30 A1 A6 37 6
A2 8M x 16
A_DQS1 R66 47 D_DQS1 D_RA2 31 36 D_RA5 D_DQ28 7 8
D_RA3 A5 D_RA4
32 A3 DDR A4 35
A_DQS2 R201 47 D_DQS2 33 34 75x4
VDD VSS
A_DQS3 R202 47 D_DQS3 M13S128168 8Mx16-6 RN15
D_RAS# 7 8
D_CS# 5 6
D_BA0 3 4
D_BA1 1 2 SDV25
RN16
2 2
A_CS# 7 8 D_CS# 75x4 SDV25 SDV25
A_RAS# 5 6 D_RAS#
A_CAS# 3 4 D_CAS#
A_WE# 1 2 D_WE# D_DQS2 R203 75 C74
C67 C68 C69 C70 C71 C72 C73 0.1uF
22x4 D_DQS3 R204 75 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
A_BA1 R67 22 D_BA1 R69 4.7k
D_CAS# R70 75
A_BA0 R68 22 D_BA0 D1V25 U5 SDV25
1 8 D_WE# R72 75
A_DQM0 R71 22 D_DQM0 GND VTT
2 SD PVIN 7
D1V25 3 6 D_DQM1 R205 75
A_DQM1 R206 22 D_DQM1 VREF VREF VSENSE AVIN
4 VREF VDDQ 5
D_DQS1 R74 75
A_CKE R73 22 D_CKE IC LP2996 DDR Termination SOP8 + CE8 C75 C76 C77 C78 C79 C80 C81 C82
47uF/16v D_DQS0 R76 75 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
A_CLK R75 22 D_CLK
C83 C84 + CE9 D_DQM0 R78 75
A_CLK# R77 22 D_CLK# 220uF/16v
0.1uF 0.1uF SDV25
C85 C86 C87 C88 C89 C90 C91 C92

3300pF 3300pF 3300pF 3300pF 3300pF 3300pF 3300pF 3300pF
SDV25
SDV25
Modified by BIN_WANG.
C93 C94 C95 C96 C97 VCC
VREF
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C209 C210 C211 C212 C213 C214 C215 C216
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
VREF U6 CM1117-2.5V
1 1
SDV25
ADJ/GND
VREF 3 2 SDV25
VREF DECOUPLING IN OUT
OUT 4
VREF + CE10
+ CE11
220uF/16v
1
C98 C99 C100 C217 C218 + CE12 SOT223 220uF/16v
0.1uF 3300pF 3300pF 0.1uF 0.1uF 220uF/16v

MiCO Confidential
Title
Size Doc Number Rev
C DDR MEMORY & FLASH V0.1
A B C D E
９ˋ
A B C D E
MT8203 ANALOG&DIGITAL DECOUPLING R79
100k
DV18A
FB11
DACVREF DACVREF DACFS DV18A ADCPLLVDD1
DACVREF 3
Y1
DACFS 70R C101 C102
DACFS 3
ADCPLLVDD1 C103 R80 XTALI XTALO 0603 4.7uF 0.1uF
ADCPLLVDD1 3
ADCPLLVDD 0.1uF/NC 560 C0603 C0603
ADCPLLVDD 3 C0603 27MHz GND
APLLVDD
APLLVDD 3
ANALOGVDD GND GND C104 C105
ANALOGVDD 3 33pF 33pF
VPLLVDD
VPLLVDD 3
AV33
4 LVDDA 4
LVDDA 3 DV33A
ADCVDD FB12 FB13
DACVDD
ADCVDD
DACVDD
3
3
AV33 FOR DACVDD DACVDD GND ANALOGVDD
AVCM
AVCM 3
VOCM CE13 70R C106 C107 70R C108
VOCM 3
VICM + C109 0603 CE14 4.7uF 0.1uF 0603 4.7uF
VICM 3
VREFP4 + C0603 C0603 C110 C0603
VREFP4 3
VREFN4
VREFN4 3
10uF/50v 0.1uF GND AVCM 0.1uF GND
ADCVDD0 10uF/50v R81
ADCVDD0 3
PWM2VREF DACVDD ADCPLLVDD
PWM2VREF 3
AUXTOP
AUXTOP 3
AUXBOTTOM C111 C112 0 C114 C115
AUXBOTTOM 3
REXTA 4.7uF 0.1uF C113 + CE15 4.7uF 0.1uF
REXTA 3 4.7uF 22uF/25v
APLL_CAP C0603 C0603 C0603 C0603
APLL_CAP 3 C0603
GND
XTALI
XTALI 3
GND
XTALO DACVDD GND
XTALO 3
ADCVDD4 C116 C117 APLL_CAP ANALOGVDD
ADCVDD4 3
4.7uF 0.1uF
ADDED BASE ON P1V5 COMMON BOARD BY BIN_WANG 16/7/05. C0603 C0603 C118 C119
GND VOCM + CE16 4.7uF 0.1uF
C120 47uF/16v C0603 C0603
FOR ADCVDD 1500pF
C0603 GND
C121
Note for Fix or Adj Regulator 0.1uF
C0603
GND
R82
VCC
U7 CM1117-3.3V VICM APLLVDD
ADC_VDD GND
FB14 0 C122 C123
ADJ/GND
3 2 + CE17 4.7uF 0.1uF

IN OUT CE18 C124 22uF/25v C0603 C0603
OUT 4
+ 75R Vout 0.1uF
0805 C125 C0603 GND
+ CE19 10uF/25v + CE20 + CE21 C127
3 100uF/16v C126 220uF/16v 10uF/50v 0.1uF 3
1
0.1uF SOT223 0.1uF GND ANALOGVDD
GND AV33 C128 C129

FB15 4.7uF 0.1uF
AV33 LVDDA C0603 C0603
GND
70R C130
0603 0.1uF
CE22 C0603
GND
AZ1117 Rdown Rup
+
C131
0.1uF 47uF/16v AV33
LVDDA FB16
Fix regulator 0 ohm OFF 1.25x(1+Rdown/Rup) C132
AV33 VPLLVDD
0.1uF 70R C133 C134

Adj regulator 180 1% 110 1% 1.25x(1+180/110)=3.3V C0603 0603 4.7uF 0.1uF
GND C0603 C0603
GND
C135 + CE23
LVDDA 0.1uF 47uF/16v
VPLLVDD
C136
0.1uF C137 C138
ADC_VDD C0603 4.7uF 0.1uF
GND C0603 C0603
FB17 DV33A GND
ADC_VDD ADCVDD0
75R C139 VPLLVDD

0805 0.1uF VREFP4
C0603 C142 C143
GND C140 C141 4.7uF 0.1uF
0.1uF 0.1uF C144 C0603 C0603
ADCVDD0 4.7uF GND
C0603
C145 GND
2 0.1uF 2
C146
C0603 4.7uF
GND 0603 PUT ON NEARLY BGA C0603 REXTA
R83
GND
C147
ADCVDD0 4.7uF 3.3k
VREFN4 C0603
C151 C148 C149 C150
0.1uF 0.1uF 0.01uF 3300pF
C0603 C0603 C0603 C0603
GND
ADCVDD0 FB18
ADCVDD0 ADCVDD
C152
0.1uF 70R TP1
C0603 C154 C155
GND C153 4.7uF 0.1uF R84
FB20
0.1uF C0603 C0603 LVDDA FB19 70R AUXTOP
ADCVDD4
DV18A GND
70R C156 ADCVDD4 0603 PUT ON NEARLY BGA GND 50 TP2
0603 4.7uF DV18A PWM2VREF R85

P1-V5 C0603 AUXBOTTOM
GND C157
+ CE24 0.1uF 50
ADCVDD4 C158 C159 C160 C161 47uF/16v C0603
VFEVDD1 0.1uF 0.1uF 0.1uF 0.1uF
C162 C0603 C0603 C0603 C0603 GND
0.1uF
C0603
GND
0603 PUT ON NEARLY BGA
ADCVDD0
C163
0.1uF
C0603 C164 C165 C166 C167
1 GND 3300pF 3300pF 3300pF 3300pF 1
C0603 C0603 C0603 C0603
MiCO Confidential
Title
Size Doc Number Rev
C MT8203 ANALOG&DIGIT DECOUPLE V0.1
A B C D E
２０ˋ
A B C D E
DV33A
ANALOGVDD
ANALOGVDD
GND
GND
ADCPLLVDD1
ANALOGVDD
APLL_CAP
VGAVSYNC#
HSYNC_VGA
ADCPLLVDD
ADCVDD0
ADCVDD0
ADCVDD0
ADCVDD0
ADCVDD0
APLLVDD
D3 R86
GND
DVIODCK
DV18A
VGASOG
DV18A
GREEN+
GREEN-
CVBS2+
CVBS1+
CVBS0+
CVBS2-
CVBS1-
CVBS0-
1N4148/SMD 10k
XTALO
BLUE+
VOCM
BLUE-
XTALI
AVCM
RED+
VICM
RED-
GND
GND
GND
GND
GND
GND
GND
SOY
GND
SC+
CB+
VI10
VI11
VI12
VI13
VI14
VI15
VI16
VI17
VI18
VI19
VI20
VI21
VI22
VI23
CR+
SY+
SC-
CB-
CR-
SY-
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
VI8
VI9
URST# URST#
Y+
GND
GND
GND
GND
Y-
URST# A_DQS[0..3] A_DQS[0..3] 5
U8 A_RA[0..11] A_RA[0..11] 5
M13
M14
M15
M16
N13
D10
D11
C11
D13
C10
D12
C12
C13
C14
N14
D14
D15
C15
D16
C16
D18
D17
C17
C18
C19
D19
C20
D20
C21
D21
C22
D22
C23
D23
B10
A10
B11
A11
B12
A12
B13
A13
B14
A14
B15
A15
A16
B16
A17
B17
A18
B18
E23
A19
B19
A20
B20
A21
B21
A22
B22
A23
B23
L12
L13
L14
L15
L16
A_BA[0..1] A_BA[0..1] 5
D5
C4
C5
D6
C6
D7
C7
C8
D9
C9
D8
B1
A1
B2
A2
B3
A3
B4
A4
B5
A5
B6
A6
B7
A7
B8
A8
B9
A9
A_DQM[0..1] A_DQM[0..1] 5
SW1
A_DQ[0..31] A_DQ[0..31] 5
AVCM
VOCM
VICM
SOG
CVBS2N
RN
XTALO
CVBS2P
CVBS1N
CVBS1P
CVBS0N
CVBS0P
SCN
SCP
SYN
SYP
CRN
CRP
CBN
CBP
YN
YP
SOY
RP
GN
GP
BN
BP
VSYNC
HSYNC
DVSS
DVDD
DMPLLVDD
TESTP
TESTN
XTALVDD
MON0
MON1
ADCPLLVDD
ADCPLLVSS
SYSPLLVSS
SYSPLLVDD
XTALI
XTALVSS
APLL_CAP
APLLVDD
APLLVSS
VFEVSS1
ADCVDD0
ADCVSS0
REFP0
REFN0
ADCVDD1
ADCVSS1
REFP1
REFN1
VFEVDD0
VFEVSS0
ADCVDD2
ADCVSS2
REFP2
REFN2
ADCVDD3
ADCVSS3
REFP3
REFN3
ADCPLLVSS1
DMPLLVSS
VI0
VI1
VI2
VI3
VI4
VI5
VI6
DVSS3
VI12
VI13
VI14
VI15
DVSS18
VI16
VI17
VI18
VI19
VI20
VI21
VI22
VI23
VCLK_DVI
ADCPLLVDD1
DVDD18
VI7
VI8
VI9
VI10
VI11
4 4
XTALI 2 4 A_CLK A_CLK 5
2=4
XTALI 4
XTALO 1 3 + CE25 A_CLK# A_CLK# 5
XTALO 4 10uF/50v
ANALOGVDD A_CKE A_CKE 5
1=3
ANALOGVDD 4
ADCVDD ADCVDD4 C3 C24 DE_DVI SW4P/DIP/FLAT A_CS# A_CS# 5
ADCVDD 4 VFEVDD1 DE_DVI
APLLVDD ADCVDD4 D3 D24 VSYNC_DVI A_RAS# A_RAS# 5
APLLVDD 4 ADCVDD4 VSYNC_DVI
VPLLVDD MPX1 C1 A24 HSYNC_DVI A_CAS# A_CAS# 5
VPLLVDD 4 SIF HSYNC_DVI
MPX2 C2 Y24 DV18A A_WE# A_WE# 5
GND AF DVDD18 SDV25 SDV25 5
L11 ADCVSS4 AOSDATA0 A25
VREFP4 D1 A26 AOSDATA1 VREF VREF 5
VREFN4 REFP4 AOSDATA1
D2 REFN4 AOSDATA2 B26
GND F2 F23 DV33A IOWR#
ADCVSS DVDD3I IOWR# 5
ADIN4 D4 B25 IOCE#
ADIN4 AOSDATA3 IOCE# 5
ADIN3 E1 B24 DOUT GND
ADCPLLVDD1 ADIN2 ADIN3 LIN DACBCLK
ADCPLLVDD1 4 E2 ADIN2 AOBCK C26
ADCPLLVDD ADIN1 E3 C25 DACLRC
ADCPLLVDD 4 ADIN1 AOLRCK
AUXTOP ADIN0 E4 E24 DACMCLK
AUXTOP 4 ADIN0 AOMCLK
AUXBOTTOM ADCVDD F1 N15 GND
AUXBOTTOM 4 ADCVDD DVSS3
PWM2VREF F4 G26 A_DQ24
REXTA AUXTOP PWM2VREF DQ24 A_DQ25
REXTA 4 F3 AUXVTOP DQ25 G25
APLL_CAP
APLL_CAP 4
AUXBOTTOM G3 AUXVBOTTOM DQ26 F26 A_DQ26 DV33A
PWM2VREF GND J3 F24 SDV25 F_A[0..21] F_A[0..21] 5
PWM2VREF 4 VPLLVSS DVDD2
VPLLVDD G4 F25 A_DQ27 F_D[0..7] F_D[0..7] 5
ADCVDD0 VPLLVDD VPLLVDD DQ27 A_DQ28
ADCVDD0 4 H3 DLLVDD DQ28 E26
GND K3 N16 GND F_OE# F_OE# 5
AVCM GND DLLVSS DVSS2 A_DQ29 ORO6
AVCM 4 K4 BGVSS DQ29 E25 ORO6 7
REXTA J4 G24 SDV25 R87 ORO7
VOCM VPLLVDD REXTA DVDD2 A_DQ30 47k ORO5 ORO7 1
VOCM 4 H4 BGVDD DQ30 D26 ORO5 7
VICM LVDDA L3 D25 A_DQ31 ORO4
VICM 4 LVDDA DQ31 ORO4 7
AP7 G2 H25 A_DQS3
VREFP4 AN7 A7P DQS3 A_DQM1 ORO3
VREFP4 4 G1 H26 ORO3 9
VREFN4 CLK2+ A7N DQM1 GND DACBCLK ORO2
VREFN4 4 H2 P14 ORO2 7
CLK2- CLK2P DVSS18 A_DQS2 ORO1
H1 CLK2N DQS2 J25 ORO1 9
DACFS GND M12 J26 A_DQ23 ORO0
DACFS 4 LVSSA DQ23 ORO0 10
DACVREF AP6 J2 K25 A_DQ22 MPX1
DACVREF 4 A6P DQ22 MPX1 8
DACVDD AN6 J1 P16 GND MPX2
DACVDD 4 A6N DVSS2 MPX2 8
LVDDA AP5 K2 K26 A_DQ21
LVDDA 4 A5P DQ21
AN5 K1 L25 A_DQ20
IR LVDDA A5N DQ20 DV18A RN17 10Kx4
3
IR 7,10 L4 LVDDB DVDD18 AA24 3
AP4 L2 L26 A_DQ19 DVIODCK 7 8 OGO[0..1] OGO[0..1] 7
ADCVDD4 A4P DQ19
ADCVDD4 4 AN4 L1 H24 SDV25 HSYNC_DVI 5 6 OBO[0..7] OBO[0..7] 10
AP3 A4N DVDD2 A_DQ18 DE_DVI
M2 A3P DQ18 M25 3 4
AN3 M1 M26 A_DQ17 VSYNC_DVI 1 2
GND A3N DQ17 A_DQ16
M11 LVSSB DQ16 N25
CLK1+ N2 J23 A_RA4 RN18 10Kx4 VSYNC VSYNC 9
CLK1- CLK1P RA4 GND VI0 HSYNC HSYNC 9
N1 CLK1N DVSS2 R16 7 8
AP2 P2 J24 A_RA5 VI2 5 6
AN2 A2P RA5 A_RA6 VI5
P1 A2N RA6 K23 3 4
LVDDA M3 K24 A_RA7 VI6 1 2
LVDDC RA7
MT8205
AP1 R2 L23 A_RA8 VGASDA VGASDA 6
AN1 A1P RA8 GND RN19 10Kx4 VGASCL VGASCL 6
R1 A1N DVSS18 R14
AP0 T2 L24 A_RA9 VI9 7 8
AN0 A0P RA9 A_RA11 VI10 RED+ RED+ 8
T1 A0N RA11 M23 5 6
GND N12 N26 A_CKE VI13 3 4 RED- RED- 8
DACVDD LVSSC CKE SDV25 VI14 GREEN+ GREEN+ 8
N3 DACVDDC DVDD2 H23 1 2
DACVREF M4 P26 A_CLK GREEN- GREEN- 8
DACFS VREF RCLK A_CLK# RN20 10Kx4 BLUE+ BLUE+ 8
N4 FS RCLKB P25
GND N11 P15 GND VI17 7 8 BLUE- BLUE- 8
DACVSSC DVSS2 A_RA3 VI18
T4 SVM RA3 M24 5 6
DACVDD P3 N23 A_RA2 VI21 3 4 VGASOG VGASOG 8
GND DACVDDB RA2 A_RA1 VI22
R3 DACVSSB RA1 N24 1 2
DACVDD P4 R26 A_RA0 HSYNC_VGA
DACVDDA RA0 HSYNC_VGA 6
G U4 P24 A_RA10 RN21 10Kx4
GND G RA10 A_BA1 VI7 VGAVSYNC# VGAVSYNC# 6
R4 DACVSSA BA1 P23 7 8
B U3 U23 SDV25 VI4 5 6
R B DVDD2I DV18A VI3 CVBS0+ CVBS0+ 8
V4 R DVDD18 AA23 3 4
T3 R24 A_BA0 VI1 1 2 CVBS0- CVBS0- 8
VSYNC DE BA0 A_CS# SY+ SY+ 8
U1 VSYNCO RCS# R23
HSYNC U2 T24 A_RAS# RN22 10Kx4 SY- SY- 8
HSYNCO RAS# GND VI15 SC+ SC+ 8
V1 VCLK DVSS2 R15 7 8
V2 T23 A_CAS# VI12 5 6 SC- SC- 8
EBO7 CAS# A_WE# VI11 Y+ Y+ 8
V3 EBO6 RWE# U24 3 4
W1 W26 A_DQ8 VI8 1 2 Y- Y- 8
EBO5 DQ8 A_DQ9 CB+ CB+ 8
W2 EBO4 DQ9 V25
DV33A AC9 V26 A_DQ10 RN23 10Kx4 CB- CB- 8
DVDD3I DQ10 SDV25 VI23 CR+ CR+ 8
2
W3 EBO3 DVDD2 V23 7 8 2
W4 U25 A_DQ11 VI20 5 6 CR- CR- 8
EBO2 DQ11 GND VI19
Y1 EBO1 DVSS18 T13 3 4
Y2 U26 A_DQ12 VI16 1 2 AP[0..7] AP[0..7] 9
EBO0 DQ12 A_DQ13 AN[0..7] AN[0..7] 9
Y3 EGO7 DQ13 T25
GND P11 T15 GND
DVSS18 DVSS2 A_DQ14 CLK1+ CLK1+ 9
Y4 EGO6 DQ14 T26
AA1 R25 A_DQ15 CLK1- CLK1- 9
EGO5 DQ15 A_DQS1 CLK2+ CLK2+ 9
AA2 EGO4 DQS1 W25
AA3 W23 GND CLK2- CLK2- 9
EGO3 AVSS18 DV18A
AA4 EGO2 AVDD18 Y23
AB1 G23 VREF
EGO1 RVREF GND SCL SCL 10
AB2 EGO0 DVSS18 T16
AB3 Y26 A_DQM0 SDA SDA 10
ERO7 DQM0 A_DQS0
AB4 ERO6 DQS0 Y25
AC1 AA26 A_DQ7
DV18A ERO5 DQ7 SDV25 DACBCLK DACBCLK 10
AC18 DVDD18 DVDD2 V24
AC2 AA25 A_DQ6 DACMCLK DACMCLK 10
ERO4 DQ6 A_DQ5 DACLRC DACLRC 10
AC3 ERO3 DQ5 AB26
AC4 T14 GND
GND ERO2 DVSS2 A_DQ4 DOUT DOUT 10
R11 DVSS3 DQ4 AB25
AD1 AC26 A_DQ3 SOY SOY 7
ERO1 DQ3 SDV25
AD2 ERO0 DVDD2 W24
OBO7 AD3 AC25 A_DQ2 CVBS1+ CVBS1+ 8
OBO6 OBO7 DQ2 A_DQ1
AD4 OBO6 DQ1 AD26 CVBS1- CVBS1- 8
OBO5 AE1 AD25 A_DQ0
OBO5 DQ0 R
R 9
AD18DVDD18
AC19DVDD18
AD19DVDD18
G
AE22 FCICMD
T11 DVSS18
P12 DVSS18
T12 DVSS18
P13 DVSS18
AF8 HIGHA7
AE9 HIGHA6
AF9 HIGHA5
AE10 HIGHA4
AF10 HIGHA3
AC11HIGHA2
AD11HIGHA1
AF12 HIGHA0
AC10DVDD3I
AF23 FCIDAT
AF22 FCICLK
AD9 DVDD3
AD10DVDD3
G 9
R12 DVSS3
R13 DVSS3
AC12IOWR#
AC21PRST#
AF15 IOOE#
AE23 GPIO0
AC14IOCS#
AD23PWM0
AC23PWM1
AE17 IOALE
AE4 OGO7
AF4 OGO6
AC5 OGO5
AD5 OGO4
AE5 OGO3
AF5 OGO2
AC6 OGO1
AD6 OGO0
AE12 IOA18
AD12IOA19
AE11 IOA20
AF11 IOA21
AE6 ORO7
AF6 ORO6
AC7 ORO5
AD7 ORO4
AE7 ORO3
AF7 ORO2
AC8 ORO1
AD8 ORO0
B
AE2 OBO4
AF1 OBO3
AF2 OBO2
AE3 OBO1
AF3 OBO0
AF19 INT0#
AE26 SDA0
AB24 SDA1
AF26 SCL0
AB23 SCL1
AE19 UP12
AF20 UP13
AE20 UP14
AD20UP15
AC20UP16
AF21 UP17
AE21 UP30
AD21UP31
AD22UP34
AC22UP35
AD17IOA0
AD14IOA1
AE14 IOA2
AF14 IOA3
AF13 IOA4
AE13 IOA5
AD13IOA6
AC13IOA7
B 9
AF18 WR#
AE24 RXD
AE25 SDA
AD24TXD
AE18 RD#
AE15 AD0
AD15AD1
AC15AD2
AF16 AD3
AE16 AD4
AD16AD5
AC16AD6
AF17 AD7
AF25 SCL
AE8 A16
AC17A17
PWM0
AC24ICE
PWM0 9
AF24 IR
PWM1
PWM1 10
AOSDATA1
AOSDATA1 10
BGA388/ TXD
TXD 6
VGASDA
VGASCL
HWSCL RXD
HWSDA
MT8203
URST#
IOWR#
RXD 6
UP3_4
UP3_5
F_OE#
IOCE#
PWM0
PWM1
OGO1
OGO0
F_A15
F_A14
F_A13
F_A12
F_A11
F_A10
F_A16
F_A17
F_A18
F_A19
F_A20
F_A21
ORO7
ORO6
ORO5
ORO4
MUTE
OBO4
OBO3
OBO2
OBO1
OBO0
F_A9
F_A8
F_A0
F_A1
F_A2
F_A3
F_A4
F_A5
F_A6
F_A7
F_D0
F_D1
F_D2
F_D3
F_D4
F_D5
F_D6
F_D7
MUTE
DV33A
DV18A
DV18A
DV33A
DV33A
DV18A
TxD
RxD
ORO3
ORO2
ORO1
ORO0
MUTE 10
IR
GND
GND
GND
GND
GND
GND
1 1
ADIN0
ADIN1
ADIN2
ADIN3
ADIN4
R88 R89 R90 R91 R92

TP3 TP4 UP3_4 FOR S/W SCL
10k 10k 10k 10k 10k R93
TP5
1k UP3_5 FOR S/W SDA
CVBS2+
CVBS2-
HWSDA R94 R/NC SDA

DV33A DV18A HWSCL R95 R/NC SCL
MiCO Confidential
C168 C169 Title
ˋ 0.1uF 0.1uF DV33A DV18A MiCO LCD TV - MediaTek MT8203 Solution
UP3_5 R96 0 Size Doc Number Rev
UP3_4 R97 0 C MT8205 PBGA 388 V0.1
A B C D E
２１ˋ
A B C D E
Power ON alive source
4 4
+5V
VCC
U9 CM1117-3.3V U10 M1117-3.3V
FB21
DV33 FB22
ADJ/GND Vout
ADJ/GND
3 2 DV33 3 2
IN OUT IN OUT
OUT 4 OUT 4
75R 75R CE26
0805 0805 +
+ CE27 + CE28 C170 + CE29
220uF/16v C171 220uF/16v C172 220uF/16v 0.1uF 220uF/16v C173
1
1
0.1uF SOT223 0.1uF SOT223 0.1uF
3 3
DV33A
DV33A
U11 CM1117-1.8V
FB23
Vout
DV18A
U12 CM1117-3.3V
AV33
ADJ/GND
3 IN OUT 2
FB24
OUT 4
ADJ/GND
3 2 AV33 75R
IN OUT 0805
OUT 4
75R + CE30 + CE31
0805 CE32 100uF/16v C174 220uF/16v C175
1
+
220uF/16v C176 C177 0.1uF SOT223 0.1uF
10uF/10v 0.1uF
1
SOT223
1.25x(1+300/680)=1.8V
1.25x(1+180/110)=3.3V
2 2
1 1
MiCO Confidential
Title
Size Doc Number Rev
C LDO V0.1
A B C D E
２２ˋ
A B C D E
MT8203E (PBGA388) LCDTV BOARD 4 LAYERS

TXD
TXD 3,6
RXD
RXD 3,6
SCL_5V
SCL_5V 7,10
01.INDEX & POWER CONNECTOR

SDA_5V
SDA_5V 7,10
+12V
+12V 9
02. LDO
TUNER_12V
ORO7 TUNER_12V 7
4 ORO7 3 4
03.MT8203 PBGA 388

04.MT8203 ANALOG&DIGIT DECOUPLE
05.DDR MEMORY & FLASH J3
VCC +5V
06.VGA IN & PC AUDIO IN 1

2
+12V
R98
3 10k
J4
07.VIDEO IN & TUNER IO 4
5
ORO7 High :POWER OFF
ORO7 LOW :POWER ON
08. AV IN
6 5 SYS_PWR
7 4 +5V Q3
8 3
09.LVDS/CRT/BACK LIGHT CONTROL

R99
3
2
1 1 ORO7
DIP8/P2.0
10.AUDIO WM8776/ KEYPAD

SOT23 4.7k
5x1 W/HOUSING 2N3904
2
SIP5\2
TO Power BD
+5V
+ CE33
220uF/16v
C220UF16V/D6H11
3 3
HOLE/GND
H1
9 9 2 2
8 8 3 3
7 7 4 4
6 6 5 5
+12V For Tuner
1
FB25
120R FB26
1
FOR Tuner
TUNER_12V
75R
+ CE34 0805 + CE35
220uF/16v 47uF/16v C178
HOLE/GND C220UF16V/D6H11 0.1uF
H2
9 9 2 2
8 8 3 3
7 7 4 4
6 6 5 5
1
FB27
120R
1
2 2
+5V
+5V
HOLE/GND
SYSTEM EEPROM
H3
9 9 2 2 R100 R101 AUIO IN/OUT GND DIGITAL GND ANALOG INPUT GND
8 3 4.7k 4.7k
8 3 C179 U13
7 7 4 4
6 6 5 5 1 NC VCC 8
0.1uF 2 7
NC WP SCL_5V
1
3 NC SCL 6
FB30 4 5 SDA_5V
120R GND SDA
1
EEPROM 24C16
SOP8
HOLE/GND
H4
9 9 2 2
8 8 3 3
7 7 4 4
6 6 5 5
1
FB31
120R
1
1 1
MiCO Confidential
Title
Size Doc Number Rev
C INDEX & POWER CONNECTOR V0.1
A B C D E
２３ˋ
A B C D E
Modify I2C by Zheng.Guo. 16/8
S1_AV1_L
S1_AV1_L 7
S1_AV1_R DV33A
S1_AV1_R 7
VGA_IN_L
VGA_IN_L 6
VGA_IN_R
VGA_IN_R 6
YPBPR1_L
YPBPR1_L 7
YPBPR1_R
YPBPR1_R 7
YPBPR2_L R190
YPBPR2_L 7
YPBPR2_R 4.7k
4 YPBPR2_R 7 QF1 4
SCL SCL 3
SDA SDA 3 2N7002
DACBCLK DACBCLK 3 MODIFIED FROM 10K-->100K BY BIN_WANG .16/7/05.AVOID AUDIO BOMB WHEN OPEN THE POWER SCL_5V 3 2 SCL
DACMCLK DACMCLK 3 Del Parts VCC
DACLRC DACLRC 3 FB32 DV33A
DOUT DOUT 3 YPBPR2_R CE36 10uF/25v R102 100k HPVDD
+
AOSDATA1 AOSDATA1 3 C181
1
PWM1 YPBPR2_L CE37 10uF/25v R104 100k 0603 120R R192 10pF
+
PWM1 3
MUTE CE38 4.7k
MUTE 3
SCL_5V + C180
SCL_5V 1,7 QF2
SDA_5V VGA_IN_R CE39 10uF/25v R106 100k 0.1uF
+
SDA_5V 1,7 2N7002
10uF/25v
VGA_IN_L CE40 10uF/25v R107 100k SDA_5V 3 2 SDA
+
MODIFIED FROM 10K-->100K BY BIN_WANG .16/7/05.AVOID AUDIO BOMB WHEN OPEN THE POWER
DV33A
50k
50k
S1_AV1_R CE41 10uF/25v R108 100k
+
C182
1
10pF
S1_AV1_L CE42 10uF/25v R111 100k HPVDD
R109
R110
YPBPR1_R CE43 10uF/25v R112 100k
+
YPBPR1_L CE44 10uF/25v R113 100k
+
+ CE45 SCL R207 33 SCL14
10uF/25v C183 R/SMD/0603
48
47
46
45
44
43
42
41
40
39
38
37
U14 HPVDD 0.1uF
SDA R208 33 SDA14
AIN2R
AIN3R
AIN4R
AIN5R
AINOPR
AINVGR
AGND
AIN3L
AIN4L
AIN5L
AINOPL
AINVGL
R193 R/SMD/0603
33R
J5
1 AIN2L AVDD 36
2 35 ADCREFP ADCREFP AUSPR
AIN1R ADCREFP 1
3 AIN1L ADCREFGND 34 AUSPL 2
DACBCLK 4 33 VMIDADC VMIDADC
DACMCLK DACBCLK VMIDADC AUXL CE46 10uF/25v CE47 3
5 DACMCLK AUXL 32 TP6
+ MUTE 4
AOSDATA1 6 31 AUXR 10uF/25v C184
+
3 DACLRC DIN AUXR HPVDD_A CE48 10uF/25v CE49 0.1uF 3
7 DACLRC DACREFP 30 TP7
+
8 29 10uF/25v C185
+
ZFLAGR DACREFN 4x1 W/HOUSING
9 28 VMIDDAC 0.1uF
ZFLAGL VMIDDAC SIP4\2
DACBCLK 10 27 COD_VOUTR
DACMCLK ADCBCLK VOUTR COD_VOUTL
11 ADCMCLK VOUTL 26
GND DOUT 12 25 + CE50 MUST USE SHIELD CABLE
DOUT NC 10uF/25v C186
HPOUTR
ADCLRC
HPOUTL
0.1uF
HPGND
HPVDD
MODE
DGND
DVDD
TO AUDIO BD
NC
CE
CL
DI
DACLRC WM8776
13
14
15
16
17
18
19
20
21
22
23
24
DV33 R114
TP8
HPVDD
1k CE51 CE52
SDA14
SCL14
DACLRC
DVDD
FB33 DVDD COD_VOUTR AUSPR CODHPOUTR HPOUTR
+
DV33 DVDD
0603 120R CODHPOUTR 10uF/25V R115 220uF/16v R116

+ CE53
47uF/16v C187 CODHPOUTL 10k 47k
0.1uF
FB28
CE54 CE55 TP9
COD_VOUTL AUSPL CODHPOUTL HPOUTL
+
0603 120R
TWO WIRE SERIAL CONTROL DEVICE ADDRESS 0x34h
10uF/25v R117 220uF/16v R118
TP10 10k 47k
PWM1
2 2
+5V
KEYPAD - MAX 8-KEYS

R194
R195
R196
R197
R198
R199
R200
ORO0
ORO0 3
URST#
IR
URST# 3 ORO0 High :SYSTEM POWER OFF J6
IR 3,7 ORO0 LOW :SYSTEM POWER ON
10k 10k 10k 10k 10k 10k 10k 1
OBO0 FB34 FB TV/AV 2
OBO[0..7] OBO[0..7] 3 OBO1 FB35 FB MENU 3
DV33A OBO2 FB36 FB VOL- 4
OBO3 FB37 FB VOL+ 5
OBO4 FB38 FB CH- 6
OBO5 FB39 FB CH+ 7
IR 8
R119 510 LED_RED 9
R120 R121 R122 510 LED_GRN 10
10K 10K ORO0 11
R0603 R0603 POWER ON/OFF 12
R123 NC/0 13
DV33A
3
OBO6 R124 4.7K 1 Q4 13x1 W/HOUSING

2N3906 SIP13\2
3
OBO7 1 Q5 R126 0
2
R125 4.7K +5V

2N3906
2
1 1
DV33A
IR & POWER ON LED
MiCO Confidential
Title
Size Doc Number Rev
C AUDIO WM8776/ KEYPAD V0.1
Date: Wednesday, September 28, 2005 Sheet 9 of 10
A B C D E
２４ˋ
A B C D E
CVBS0---TUNER1
CVBS1---FRONT BD AV_IN
TU_VCC
J7
AV , TUNER I/O TU_12V
1 DIP11X2/P2.54/R2
2 VIDEO CONNECTOR
3 VCC
4
SDA_5V 5
SCL_5V 6 22 21
7 Y1_INB 20 19 CB1_INB
SIF1_OUT
8 Y1_GNDB 18 17 CB1_GNDB
AF1_OUT
9 CR1_INB 16 15
10 CR1_GNDB 14 13 YPBPR1/L
TV_GND
11 12 11 YPBPR1/R
CVBS0
12 CVBS1 10 9
4 4
CVBS1_GND 8 7 AV_L
CON12
Y SC 6 5 AV_R
Y 8 SIP12\2
Y_GND SC_GND 4 3
Y_GND 8
CB SY 2 1 SY_GND
CB 8
CB_GND
CB_GND 8
CR
CR 8
CR_GND J9
CR_GND 8
SOY VCC
SOY 3 FB41
SY
SY 8
SY_GND TU_VCC
SY_GND 8
SC 70R CE56
SC 8
SC_GND +
SC_GND 8
CVBS0 C188
CVBS0 8
TV_GND 1000uF/16v 0.1uF
CVBS0_GND 8
CVBS1
CVBS1 8
CVBS1_GND
CVBS1_GND 8
SIF1_OUT Added by Zheng_guo 21/7/05
SIF1_OUT 8
VCC Optional for one component.Added by Bin_wang 14/7/05
AF1_OUT TUNER_12V
AF1_OUT 8
SCL_5V FB43 R137
SCL_5V 1,10
TU_12V 10K R138
SDA_5V
SDA_5V 1,10
70R + CE57 Y1_INB CE58 22uF/10V Y1SWB Y
TUNER_12V 1000uF/16v C189 VCC
+
TUNER_12V 1 0.1uF Y2_INDVD R158 0 Y2B R139 VCC
OGO[0..1] OGO[0..1] 3 Y1_GNDB 0/NC
3
ORO6 R160 10K R140
ORO6 3
ORO4 D7 75 10K
ORO4 3 R141
ORO5 BAV99
ORO5 3
ORO2 CB1_INB CE59 22uF/10V CB1SWB CB
ORO2 3
Y2_GNDB Y2_GNDB
2
DVD Connector
+
S1_AV1_L R143 VCC
S1_AV1_L 10 0/NC
VCC CB1_GNDB
3 S1_AV1_R VCC 3
S1_AV1_R 10
VCC 10K R144
YPBPR1_L CB2_INDVD R165 0 CB2B 10K
YPBPR1_L 10 R147
YPBPR1_R 8/18 modify by steven R146 J9
YPBPR1_R 10
3
YPBPR2_L 10k YPBPR2/R CR1_INB CE60 22uF/10V CR1SWB CR
YPBPR2_L 10 1
YPBPR2_R R149 YPBPR2/L R167
+
YPBPR2_R 10 2
10k D8 75 R148
IR_DVD IR_DVD 3 BAV99 CR1_GNDB 0/NC
+12V CB2_GNDB 4 VCC
+12V 1,9 SOT23 5
3
CB2_INDVD CB2_GNDB CB2_GNDB 10K
2
IR ORO4 2N3904 Y2_GNDB 6
IR 3,10 1 7
Q6 Y2_INDVD R151
CR2_GNDB 8 VCC
9 10K R153
IR CR2_INDVD
2
10 CR2_INDVD R168 0 CR2B Y2B CE61 22uF/10V Y2SWB Y

CON10
+
3
VCC VCC R154 VCC
0/NC
VCC R170 Y2_GNDB
D9 75
BAV99 10K R155
10k Q7 10K R159
R157 J10 CR2_GNDB CR2_GNDB
2
4.7k R156 1 8 VDVD CB2B CE62 22uF/10V CB2SWB CB
S1 D1 1
2 7
+
G1 D1 2 VCC R161 VCC
3 S2 D2 6 3 0/NC
SOT23 4 5 CB2_GNDB
R162 G2 D2 4
3
ORO5 2N3904 IR7314 5 10K R163

1
Q8 SOP8 CE63 CON5 10K R164
470uF/16v +
4.7k C470UF16V/D8H14 C190 CR2B CE64 22uF/10V CR2SWB CR
2
0.1uF
+
R166 0/NC
CR2_GNDB
10K
2 2
ORO6
OGO0
OGO1
COMPONENTS SWITCH.
NEARLY YPBPR1-CON.
ORO6
DV33
OGO0
OGO1
Y1_GNDB
DV33
R169 CB1_GNDB
0 FB46
CR1_GNDB 70R
R171
10K
HP_SENSE
TP11 NEARLY YPBPR2-CON. ORO2 1

U15
16
CB1SWB S VCC GNDS
2 I0A E# 15
Y2_GNDB CB2SWB 3 14
CB I1A I0D
4 YA I1D 13
CB2_GNDB Y1SWB 5 12
Y2SWB I0B YD CR1SWB
6 I1B I0C 11
CR2_GNDB Y 7 10 CR2SWB
GNDS YB I1C CR
8 GND YC 9
IDTQS3VH257
AV_L R176 15K S1_AV1_L TSSOP16/SMD
C191
R178
AV_R R177 15K S1_AV1_R
Y SOY
R179 0 4.7nF
15K MODIFIED BY BIN_WANG.16/7/05
YPBPR1/L YPBPR1_L
YPBPR2_R
15K R180
1 YPBPR2_L 1
YPBPR1/R YPBPR1_R S1_AV1_R
S1_AV1_L CR_GND
YPBPR1_R
15K R188 YPBPR1_L
YPBPR2/L YPBPR2_L CB_GND
R187
YPBPR2/R 15K YPBPR2_R R181 R182 R183 R184 R185 R186 Y_GND
75K 75K 75K 75K 75K 75K
MODIFIED FROM 15k-->0 BY BIN_WANG 16/7/05. MiCO Confidential
Title
MiCO LCD TV - MediaTek MT8203 Solution
Size Doc Number Rev
C VIDEO IN & TUNER IO V0.1
A B C D E
ˋ
1 2 3 4 5 6
C1
2 1
22pF NPO
2 5% 1
D R1 D
82K +24V
R2
+24V
1
1 2
1
1
5%
1
R11 + 100K
5%
C10
2
R10 10K C12 R5 C5 +
10K 100NF 100UF/25V 100K 4.7uF C7 C4
5%
5%
C14 NPO X5R C6 1UF 100UF/25V
2
22UF/16V 4.7nF 100NF
2
2
X7R
U2A C8 U1 FILM
1
X7R
3 1 2 1 8 C38
+ C3 R3 PIN PGND L5 10uH
1 1 2 2 5% 1 2 7 1 2 1 2
OUT NIN SW
+
R12
AUSPL C20 2 R47 21 R66 21 R67 11 22 1UF 10K 3 6
- AGND VPP 1000UF/25V
2
1
RC4558 X5R C9
10UF 1K8 4K7 4K7 10K 5%
5% 5% 5% 4 5 1 2
C54 C55 EN BS
1
R6
1n 1n R7
1
R4 AGND 1UF 10
5% ATA-120
100K 2 1 X5R R8 R9 D1 C11
5%
MUTEC 5%
22
C24 10 10K MBRS130LTR 470NF
1
5%
5%
10K C15
21
C16
2
22pF
C 2.2UF D2 C17 C
100NF
1 R15 47K 2 6.2V 390PF
1
X7R
NPO
5%
2
C21
2 1
22pF NPO
2 5% 1
R14
82K +24V
+24V R16
1 2
1
1
5%
5%
1
R36 R17 100K
2
R37 10K 100K C27 +
10K 4.7uF C29 C25
5%
C19 NPO X5R C28 100UF/25V

5%
1UF
2
22UF/16V 4.7nF 100NF
2
2
B X7R B
U2B C30 U3
1
X7R
5 1 2 1 8 C39
+ C31 R18 PIN PGND L6 10uH
5%
7 1 22 1 2 7 1 2 1 2
OUT NIN SW
+
R39
AUSPR C40 2 R33 21 R45 21 R46 1 1 26 1UF 10K 3 6
- AGND VPP 1000UF/25V
2
1
RC4558 X5R C32
10UF 1K8 4K7 4K7 10K 5%
5% 5% 5% 4 5 1 2
EN BS
1
R19 R20
R21
C52 C53 1UF C33 10
100K
1n 1n
AGND ATA-120
2 1 X5R R22 R23 D3 470NF
5%
5% MUTEC 5%
22
C41 10 10K MBRS130LTR FILM
1
C34
5%
5%
2
10K
21
NS C35
2
22pF
D4 C36 100NF
1 47K 2 6.2V 390PF
1
X7R
R38 NPO
5%
2
A
A A
Title
Size Number Revision

B
Date: 2-Sep-2005 Sheet of
File: D:\正在进行的项目\LCD TV\LCD TV.DdbDrawn By:
1 2 3 ˋ 4 5 6
1 2 3 4 5 6
R24
2 3K 1 MUTEC
1
5%
2
R25
5%
10K C37
1UF
+24V
1
X5R
D Q1 Q3 D
D6 2N3906 R40 Q2
2 10K 1 2N3904 2 R29 1 MUTE
1
1K
1N4148 5%
+ R41
5% 2N3904
C42 5%
10K
100UF/25V
2
R42
AGND 1k
AGND AGND AGND
D10
D8 NC LOUT
1N4148 D7 Q5
4.7V 2 R34 1 2N3904
1K 5%
R43
0R
C Q4 AGND C
D5 2N3906
1
MUTEB
NC +
C18
ROUT
NC
2
R28 Q6
1k R35
AGND 1 2 2N3904
1K 5%
R30
1
22k
D9 +
C51
AGND
220UF/25V
R54 10K R55 10K 1N4148
2
1
1 2 1 2
+24V
5% 5%
AGND
C22 C2 C13 Q7
100U/35V 100N NC
U5A MUTE
2
22U/16V 3
+
B B
1 C26 2 R13 1
OUT
2
R48 1k8 R49 4K7 R50 4K7 R51 10K 5%
C60 1K
AUSPL 2 1 1 2 1 2 1 2 1 2 2 10U/16V R65
- R27
2
47K
5% 5% 5% 5% NC
5%
10UF RC4558
X5R 5%
R53 C45 C46
100K 1n 1n 1 C49 2 AGND
1
R52 22K 22P AGND

2
J10
1 2 AGND LOUT
1
5%
ROUT
1 R62 10K 2 1 R63 10K 2 rca2

+24V
5% 5%
C44
U5B
22U/16V 5
+ C43
7 2 R26 1
OUT
2
R56 1k8 R57 4K7 R58 4K7 R59 10K 5%

C59 1K
AUSPR 2 1 1 2 1 2 1 2 1 2 6 10U/16V R61
-
2
47K
5% 5% 5% 5%
5%
10UF RC4558
A X5R 5% A
R60 C47 C48
ˋ 100K 1n 1n Title

1
1 C50 2 AGND
2
R64 22K 22P AGND

1
1 2 Size Number Revision

5% B
File: D:\正在进行的项目\LCD TV\LCD TV.DdbDrawn By:
1 2 3 ２７ˋ 4 5 6
1 2 3 4 5 6
D3 CS2 U5
5VSB
+18V
DA7 EC19
+400V
CF12
1
2
3
4
VOUT
Q8
VDIS
GND
R76
VIN
VCC CA10 RA1
PQ2625B
D C15A D
T3A 12V
EC5
T3 CA8 L4
DA10 R101
R59 T3C
R52 C1
D3A
R113 EC9
Z2 EC13
R114
R55 R54 R53
QA5
L9
DA8 GND
C15 5V
D4A CA9 CF4
DA9 RF6 RF7 RF8 RF9 CF5
EC5A R58 EC13
R57 T3D RF4 RF5
R96
Z2A
R61 QA3 R97 DF1
RK11 EC11 EC12 EC14
R61 GND
U3
RK12 CF3
1 6 Q10
C R90 C
RK13 2 5
R63 R62
3 4
RK14 Q15 RA
C17
C18 RS4 C22
ZA1 R88
RK15 R64 R77 R85 R89 ON/OFF
C83 CF7
RK16 R82
PH4 UA3
RK17
R92 R91
R66 R67 R70
D4
RK18
R69 EC6 GND
C84
Q13 Z3
RK19 RF31
PH3 R86
Q11 D9
J12 Q12
R78
R68
B J13 B
R72
J14 D6 R87
R112
PH2
J15 C19 A
+18V R79
R73
Q14
J16 R99 CF6
J18
GND
A A
Title

B
File: D:\CCC\MLT186A-CCC\MLT186.DDB Drawn By:
1 2 3 4 5 6
ˋ
1 2 3 4 5 6
R230 R115
RF20 H2
CA6
H1
T3 L6
CY3 CY5 L3 24V/5A
CY2 VB
A1
A1 R116
GND DA12
L1
CY1 VIN VB EC15
L1A CX1 CF9
F2
A2
A2 DA11
RS5
D D
EC8
2
EC7
R1 14D681
+12VA
DA1 CY4 R118 CA7 RS6
DB1 DA2
AC
L2 T1
R2 4 1 RT1 R117
V- V+ GND R125
R119 R124
R3 R129
GND
380V
AC
GND +24V
+12VA
R120 R126 R122
CK1
QA1 R121
CX2 CA1A EC2
F1
CA1 +2.5V
3
EC1 C36
2 3
L N
VS RS1 R123 UA2
C34
RS2 R24
6
1
DA6 1 5
VS RK1
CON1 VIN 380V VCC 8 4
RK31 C35 U4
R4
R10 7
DA5 Q2 R40
CK2 R49
GND
VIN R5
A
C R7 C
D1 D7
VB
DA4 Q1 R50
Z D2 QA2A DS1
LT2
R8 R22 LT1
R6 R20
R35 R23 104 50V
2
U2 A1
CK3 R51 8 Q7
8
2
R9 A2
VCC
7
R32 R42 7 RF3
1 R21
VR R51A 1 Z1
C3 DS2
CA2
R33
U1 VR DT 3
3 6
6
CA4
C4 C2 QA2
R27 D1A
1 16 R12 5
J3 IEAO VEAO 5
4
2
IAC VFB
15 VR R51B R18 R39
R233 R234 R235 R236
J2 R11 C1
4
R29 3 14
J1 VS IS VR EC4 R41 RF2
Q4
R34 C5A
4 13
B RK3 VRMS VCC B
R17 RF1
C9A
5 12 R36 CF2
RK4 SS PFCOUT
VR R16 QF2
C12
R37
R30 6 11 C14
RK5 VR VDC PWOUT R43
R31 7 10 QF1
RK6 J4 RAMP1 GND DA3
C11 C10
8 9 C8 R44 RS3 CF1
RK7 J5 C9 RAMP2 LIMIT
RK8 J6
RK9 J7 C7 C6 C5 R135 +24V

DA15
RK10 J9 RT2
R134 L6 L3A
RK20 J10 R138 C33 +24V/1A
T3
RK21 J11 R130 ZA2
220/35 CF10 EC11A
RK22 PH1 UA1
R137 R136 CK19
RK23 RK25
GND
A DA14 A
RK24
Title
GND
GND
B
File: D:\CCC\MLT186A-CCC\MLT186.DDB Drawn By:
1 2 3 4 5 6
ˋ
Basic Operations & Circuit Description
Main Electric Components

(1). MODULE:
There are 1 pc. panel and 2 pcs. PCB including 1 pc. INVERTER
board(L), 1 pc. T-CONTROL board,
(2).SIGNAL PROCESS
There are 5 pcs. PCBs including
1 pc. Audio&Tuner board,

1 pc. Main digital board,
1 pc. Keypad board,
1 pc. Remote Control Receiver board,
1 pc. DVD decoder board
(3).POWER
There are 1 pc. PCB for power.
ˋ
PCB function
1. Power:
(1). Input voltage: AC 100V~240V, 47Hz~63Hz.
Input range: AC 90V(Min)~264V(Max) auto regulation.
(2). To provide power for PCBs.
a). +24V for Inverter.
b). +5Vsb for standby,
c). +5V for signal power,
d). +24V for Audio Amp power and converter to
e). +12V for Tuner power.
2. Main (Video InterFace) board:

(1).Decoder the video signal (TV,CVBS,S-VIDEO) from analog to digital
signal.
(2).Converter the Video signals( TV,CVBS,S-VIDEO ) and graphics signal
(VGA,YPbPr) from interface to progressive,
(3). Converter the Digital to fit the panel display mode and output the LVDS
signal to Panel.
3. Tuner & Audio Board:

(1)Convert TV RF signal to video and audio signal to Main board.
(2 ). Decoder the TV SIF signal to audio signal,
(3 ). Converter the audio to audio Amplifier and output to the speaker.
4. KEYBOARD
To get the main button control on LCD_TV as SOURCE,MENU,
CHANEL +,CHANEL -, VOL +,VOL-, STANDBY functions.
5. Remote control board

Receive the remote signal and active for the control.
6. T-CONTROL board
Converter the LVDS signal to the digital signal for fitting the PANEL.
7. INVERTER board
Converter the low DC voltage +24V to high AC voltage to drive the backlight.
ˋ
PCB failure analysis
1. CONTROL:
a. Abnormal noise on screen.
b. No picture.
2. MAIN (VIDEO):
a. Lacking color, Bad color scale.
b. No voice.
c. No picture but with signals output, OSD and back light.
d. Abnormal noise on screen.
3. POWER:
No picture, no power output.
Basic operation of LCD-TV

1. After turning on power switch, power board sends 5Vst-by Volt to Micro
Processor IC waiting for ON signals from Key Switch or Remote Receiver.
2. When the ON signal from Key Switch or Remote Receiver is detected, Micro
Processor will send ON Control signals to Power. Then Power sends (5Vsc,
12Vsc, 24V and RLY ON, Vs ON) to PCBs working. This time VIF will send
signals to display back light, OSD on the panel and start to search available
signal sources. If the audio signals input, them will be amplified by Audio AMP
and transmitted to Speakers.
3. If some abnormal signals are detected (for example: over volts, over current,
over temperature and under volts), the system will be shut down by Power off.
ˋ
LCD basic display theory.
When an electrical field is applied to the LC planes, the LC molecules re-align
themselves so that they are parallel to the electrical field. This electrical process
is known as twisted nematic field effect or TNFE. In this alignment, polarized
light is not twisted as it passes through the LC material (see Diagram 3A and
3B). If the front polarizer is oriented perpendicular to the rear polarizer, light will
pass through the energized display but will be blocked by the rear polarizer. An
LCD in this form is acting as a light shutter.
Displays with variable characters are created by selectively etching away the
conductive surface that was originally deposited on the glass. Etched areas
become the display’s background; unetched areas become the display’s
characters.
Diagram 3A. The “off” state of a TN LCD-the LC molecules form a twist and therefore
cause polarized light to twist as it passes through.
Diagram 3B. The “on” state-the electrical field re-aligns the LC molecules so they do
not twist the polarized light.
ˋ
Inverter TFT LCD T-COHE
Power
DVD
Loader
Key
Board
Speaker
Terminal
Connect Board Remote Receiver Main Board Tuner Board
４ˋ
IC DESCRIPTION
-MT8205G
-AT24C02
-MX29LV160BBTC
-LP2996
-AZ1117/H
-WM8776
-MX232A
-ISAV330
ˋ
AE1
AD4
AD3
AD2
AD1
R11
AC4
AC3
AC2
AC18
AC1
AB4
AB3
AB2
AB1
AA4
AA3
AA2
AA1
Y4
P11
Y3
Y2
Y1
W4
W3
AC9
W2
W1
V3
V2
V1
U2
U1
T3
V4
U3
R4
U4
P4
R3
P3
T4
N11
N4
M4
N3
N12
T1
T2
R1
R2
M3
P1
P2
N1
N2
M11
M1
M2
L1
L2
L4
K1
K2
J1
J2
M12
H1
H2
G1
G2
L3
H4
J4
K4
K3
H3
G4
J3
G3
F3
F4
F1
E4
E3
E2
E1
D4
F2
D2
D1
L11
C2
C1
D3
C3
B
R
G
AF
FS
DE
SIF
A0P
A1P
A2P
A3P
A4P
A5P
A6P
A7P
A0N
A1N
A2N
A3N
A4N
A5N
A6N
A7N
SVM
VCLK
EBO0
EBO1
EBO2
EBO3
EBO4
EBO5
EBO6
EBO7
VREF
OBO5
OBO6
OBO7
ERO0
ERO1
ERO2
ERO3
ERO4
ERO5
ERO6
ERO7
EGO0
EGO1
EGO2
EGO3
EGO4
EGO5
EGO6
EGO7
ADIN0
ADIN1
ADIN2
ADIN3
ADIN4
CLK1P
LVSSB
LVSSA
CLK2P
REXTA
LVSSC
CLK1N
CLK2N
DVSS3
U?
REFP4
REFN4
LVDDB
LVDDA
BGVSS
LVDDC
BGVDD
DVDD3I
DLLVSS
DVSS18
DLLVDD
DVDD18
ADCVSS
ADCVDD
VSY NCO
VPLLVSS
HSYNCO
VPLLVDD
AUXVTOP
ADCVSS4
VFEVDD1
DACVSSA
DACVSSB
DACVSSC
ADCVDD4
AE2 L12
DACVDDA
DACVDDB
DACVDDC
PWM2VREF
AF1 OBO4 VFEVSS1 D5
AVCM
AUXVBOTTOM
AF2 OBO3 C4
AE3 OBO2 ADCVDD0 B1
AF3 OBO1 CVBS2N A1
AE4 OBO0 CVBS2P B2
AF4 OGO7 CVBS1N A2
AC5 OGO6 CVBS1P B3
T11 OGO5 CVBS0N A3
AD5 DVSS18 CVBS0P L13
AE5 OGO4 ADCVSS0 B4
AF5 OGO3 REFP0 A4
AC6 OGO2 REFN0 C5
AD9 OGO1 ADCVDD1 B5
AD6 DVDD3 SCN A5
AE6 OGO0 SCP B6
Pinout information
AF6 ORO7 SYN A6

AC7 ORO6 SYP M13
AD7 ORO5 ADCVSS1 D6
AD18 ORO4 REFP1 C6
AE7 DVDD18 REFN1 D7
AF7 ORO3 VFEVDD0 B7
AC8 ORO2 VOCM N13
AD8 ORO1 VFEVSS0 A7
AF8 ORO0 VICM C7
P12 HIGHA7 ADCVDD2 B8
AE9 DVSS18 CRN A8
AF9 HIGHA6 CRP B9
AE10 HIGHA5 CBN A9
AF10 HIGHA4 CBP B10
AC11 HIGHA3 YN A10
AD11 HIGHA2 YP C8
AF12 HIGHA1 SOY D10
AE15 HIGHA0 ADCVSS2 D9
AD15 AD0 REFP2 C9
AC19 AD1 REFN2 D11
AC15 DVDD18 MON0 C11
AF16 AD2 MON1 D8
AE16 AD3 ADCVDD3 B11
R12 AD4 RN A11
AD16 DVSS3 RP B12
AC16 AD5 GN A12
AF17 AD6 GP D13
AD17 AD7 SOG B13
AD14 IOA0 BN A13
AE14 IOA1 BP C10
AF14 IOA2 ADCVSS3 D12
AF13 IOA3 REFP3 C12
AE13 IOA4 REFN3 C13
AD13 IOA5 VSYNC C14
AC13 IOA6 HSYNC N14
AE8 IOA7 DVSS D14
AC10 A16 DVDD L14
AC17 DVDD3I ADCPLLVSS1 D15
AE12 A17 ADCPLLVDD1 C15
AD12 IOA18 ADCPLLVDD M14
AE11 IOA19 ADCPLLVSS L15
T12 IOA20 SYSPLLVSS D16
AF11 DVSS18 SYSPLLVDD B14
AE17 IOA21 TESTP A14
AF15 IOALE TESTN C16
IOOE# XTALVDD
ˋ
AC12 B15
AC14 IOWR# XTALO A15
AF18 IOCS# XTALI M15
AE18 WR# XTALVSS A16
AD10 RD# APLL_CAP D18
DVDD3 APLLVSS
MT8205
AF19 D17
AE19 INT0# APLLVDD C17
AF20 UP12 DMPLLVDD C18
AE20 UP13 DMPLLVSS B16
AD19 UP14 VI0 A17
AD20 DVDD18 VI1 B17
AC20 UP15 VI2 A18
AF21 UP16 VI3 B18
AE21 UP17 VI4 C19
AD21 UP30 VI5 D19
P13 UP31 VI6 E23
AC21 DVSS18 DVDD18 A19
AD22 PRST# VI7 B19
AC22 UP34 VI8 C20
AF22 UP35 VI9 D20
AE22 FCICLK VI10 A20
AF23 FCICMD VI11 L16
AE23 FCIDAT DVSS3 B20
AD23 GPIO0 VI12 C21
AC23 PWM0 VI13 D21
AF24 PWM1 VI14 A21
AE24 IR VI15 M16
AD24 RXD DVSS18 B21
R13 TXD VI16 C22
AC24 DVSS3 VI17 D22
AF25 ICE VI18 A22
AE25 SCL VI19 B22
AF26 SDA VI20 C23
AE26 SCL0 VI21 D23
AB23 SDA0 VI22 A23
AB24 SCL1 VI23 B23
SDA1 VCLK_DVI
RVREF
VSYNC_DVI
DE_DVI
DQM0
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
CAS#
RAS#
RA0
RA1
RA2
RA3
RA9
RA8
RA7
RA6
RA5
RA4
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQM1
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
AOSDATA3
AOSDATA2
AOSDATA1
AOSDATA0
AOMCLK
AOLRCK
AOBCK
DVDD2
DVSS2
DVDD2
AVDD18
AVSS18
DVSS2
DVDD2
DVSS2
DVSS2
DVDD2
DVSS2
DVDD2
DVSS2
DVDD2
DVSS2
DVDD2
DVSS3
DVDD2I
DVDD3I
HSYNC_DVI
LIN
RCLKB
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS0
DVSS18
DQS1
DVSS18
DQ9
DQ8
RWE#
RCS#
BA0
DVDD18
BA1
RA10
RA11
DVSS18
DVDD18
DQS2
DVSS18
DQS3
DVDD18
RCLK
CKE
T14
T16
T26
T15
T25
T13
T23
T24
L24
L23
J24
J23
L26
L25
J26
J25
V24
V23
V26
V25
P23
P24
P15
P25
P26
K24
K23
K26
P16
K25
P14
E25
E26
F25
F24
F26
E24
B24
B25
F23
B26
A26
A25
A24
Y25
Y26
G23
Y23
R25
U26
U25
U24
R15
R23
R24
U23
R26
N24
N23
M24
H23
N26
M23
R14
R16
N25
M26
M25
H24
H26
H25
D25
D26
G24
N16
G25
G26
N15
C25
C26
Y24
D24
C24
W24
W23
W25
W26
AB25
AB26
AA25
AA26
AA23
AA24
AD25
AD26
AC25
AC26
MT8205
BGA388/SOCKET
Pin Descriptions
2.3 Pin Descriptions

Table 2-1 provides detail video/audio port pin descriptions.
Table 2-1 video/audio port pin descriptions.
Pin Symbol Type Description
E24 O Audio out master clock

AOMCLK
C25 O Audio out left-right clock

AOLRCK
C26 O Audio out bit clock

AOBCK
A25 O Audio out data line 0

AOSDATA0
A26 O Audio out data line 1

AOSDATA1
B26 O Audio out data line 2

AOSDATA2
B25 O Audio out data line 3

AOSDATA3
B24 I Audio line in

LIN
A3 I Composite Video input 0

CVBS0P

CVBS1P

CVBS2P
C1 I Tuner Sound SIF

SIF
C2 I Tuner Sound AF
AF
ˋ
AT24C01A/02/04/08/16
Features
• Low Voltage and Standard Voltage Operation
5.0 (VCC = 4.5V to 5.5V)
2.7 (VCC = 2.7V to 5.5V)
2.5 (VCC = 2.5V to 5.5V)
1.8 (VCC = 1.8V to 5.5V)
• Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),
1024 x 8 (8K) or 2048 x 8 (16K)
• 2-Wire Serial Interface
• Bidirectional Data Transfer Protocol 2-Wire
• 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility
• Write Protect Pin for Hardware Data Protection
Serial CMOS
• 8-Byte Page (1K, 2K), 16-Byte Page (4K, 8K, 16K) Write Modes
• Partial Page Writes Are Allowed
E2PROM
• Self-Timed Write Cycle (10 ms max)
• High Reliability
Endurance: 1 Million Cycles 1K (128 x 8)
Data Retention: 100 Years
• Automotive Grade and Extended Temperature Devices Available 2K (256 x 8)
• 8-Pin and 14-Pin JEDEC SOIC and 8-Pin PDIP Packages
4K (512 x 8)
Description
The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial elec- 8K (1024 x 8)
trically erasable and programmable read only memory (EEPROM) organized as
128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many 16K (2048 x 8)
industrial and commercial applications where low power and low voltage operation are
essential. The AT24C01A/02/04/08/16 is available in space saving 8-pin PDIP, 8-pin
and 14-pin SOIC packages and is accessed via a 2-wire serial interface. In addition,
the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to
5.5V) and 1.8V (1.8V to 5.5V) versions.
AT24C01A/2/4/8/16
Pin Configurations
8-Pin PDIP
Pin Name Function
A0 to A2 Address Inputs
SDA Serial Data
SCL Serial Clock Input
WP Write Protect
NC No Connect
14-Pin SOIC
8-Pin SOIC
0180C
38/106
32／75
Absolute Maximum Ratings*
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
Operating Temperature................... -55°C to +125°C mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
Storage Temperature...................... -65°C to +150°C device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
Voltage on Any Pin
implied. Exposure to absolute maximum rating conditions
with Respect to Ground ..................... -0.1V to +7.0V for extended periods may affect device reliability.
Maximum Operating Voltage ........................... 6.25V
DC Output Current ......................................... 5.0 mA
Block Diagram
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive The AT24C04 uses the A2 and A1 inputs for hard wire
edge clock data into each E2PROM device and negative addressing and a total of four 4K devices may be ad-
edge clock data out of each device. dressed on a single bus system. The A0 pin is a no con-
SERIAL DATA (SDA): The SDA pin is bidirectional for se- nect.
rial data transfer. This pin is open-drain driven and may be The AT24C08 only uses the A2 input for hardwire ad-
wire-ORed with any number of other open-drain or open dressing and a total of two 8K devices may be addressed
collector devices. on a single bus system. The A0 and A1 pins are no con-
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 nects.
and A0 pins are device address inputs that are hard wired The AT24C16 does not use the device address pins which
for the AT24C01A and the AT24C02. As many as eight limits the number of devices on a single bus to one. The
1K/2K devices may be addressed on a single bus system A0, A1 and A2 pins are no connects.
(device addressing is discussed in detail under the Device (continued)
Addressing section).
AT24C01A/02/04/08/16
33／75
39/106
R MX29LV160BT/BB
16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE
3V ONLY FLASH MEMORY
FEATURES
• Extended single - supply voltage range 2.7V to 3.6V erase operation completion.
• 2,097,152 x 8/1,048,576 x 16 switchable • Ready/Busy pin (RY/BY)
• Single power supply operation - Provides a hardware method of detecting program or
- 3.0V only operation for read, erase and program erase operation completion.
operation • Sector protection
• Fully compatible with MX29LV160A device - Hardware method to disable any combination of
• Fast access time: 70/90ns sectors from program or erase operations
• Low power consumption - Temporary sector unprotect allows code changes in
- 30mA maximum active current previously locked sectors.
- 0.2uA typical standby current • CFI (Common Flash Interface) compliant
• Command register architecture - Flash device parameters stored on the device and
- Byte/word Programming (9us/11us typical) provide the host system to access
- Sector Erase (Sector structure 16K-Bytex1, • 100,000 minimum erase/program cycles
8K-Bytex2, 32K-Bytex1, and 64K-Byte x31) • Latch-up protected to 100mA from -1V to VCC+1V
• Auto Erase (chip & sector) and Auto Program • Boot Sector Architecture
- Automatically erase any combination of sectors with - T = Top Boot Sector
Erase Suspend capability. - B = Bottom Boot Sector
- Automatically program and verify data at specified • Low VCC write inhibit is equal to or less than 1.4V
address • Package type:
• Erase Suspend/Erase Resume - 44-pin SOP
- Suspends sector erase operation to read data from, - 48-pin TSOP
or program data to, any sector that is not being erased, - 48-ball CSP
then resumes the erase. • Compatibility with JEDEC standard
• Status Reply - Pinout and software compatible with single-power
- Data polling & Toggle bit for detection of program and supply Flash
• 10 years data retention
GENERAL DESCRIPTION
The MX29LV160BT/BB is a 16-mega bit Flash memory 100% TTL level control inputs and fixed power supply
organized as 2M bytes of 8 bits or 1M words of 16 bits. levels during erase and programming, while maintaining
MXIC's Flash memories offer the most cost-effective maximum EPROM compatibility.
and reliable read/write non-volatile random access
memory. The MX29LV160BT/BB is packaged in 44-pin MXIC Flash technology reliably stores memory contents
SOP, 48-pin TSOP and 48-ball CSP. It is designed to be even after 100,000 erase and program cycles. The MXIC
reprogrammed and erased in system or in standard cell is designed to optimize the erase and programming
EPROM programmers. mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
The standard MX29LV160BT/BB offers access time as for erase and program operations produces reliable cy-
fast as 70ns, allowing operation of high-speed micropro- cling. The MX29LV160BT/BB uses a 2.7V~3.6V VCC
cessors without wait states. To eliminate bus conten- supply to perform the High Reliability Erase and auto
tion, the MX29LV160BT/BB has separate chip enable Program/Erase algorithms.
(CE) and output enable (OE) controls.
The highest degree of latch-up protection is achieved
MXIC's Flash memories augment EPROM functionality with MXIC's proprietary non-epi process. Latch-up pro-
with in-circuit electrical erasure and programming. The tection is proved for stresses up to 100 milliamps on
MX29LV160BT/BB uses a command register to man- address and data pin from -1V to VCC + 1V.
age this functionality. The command register allows for
４０／１０６
LP2996 DDR Termination Regulator
November 2003
LP2996
DDR Termination Regulator
General Description Features
The LP2996 linear regulator is designed to meet the JEDEC n Source and sink current
SSTL-2 specifications for termination of DDR-SDRAM. The n Low output voltage offset
device contains a high-speed operational amplifier to provide n No external resistors required
excellent response to load transients. The output stage pre- n Linear topology
vents shoot through while delivering 1.5A continuous current n Suspend to Ram (STR) functionality
and transient peaks up to 3A in the application as required
n Low external component count
for DDR-SDRAM termination. The LP2996 also incorporates
a VSENSE pin to provide superior load regulation and a VREF n Thermal Shutdown
output as a reference for the chipset and DIMMs. n Available in SO-8, PSOP-8 or LLP-16 packages
An additional feature found on the LP2996 is an active low
shutdown (SD) pin that provides Suspend To RAM (STR) Applications
functionality. When SD is pulled low the VTT output will n DDR-I and DDR-II Termination Voltage
tri-state providing a high impedance output, but, VREF will n SSTL-2 and SSTL-3 Termination
remain active. A power savings advantage can be obtained n HSTL Termination
in this mode through lower quiescent current.
Typical Application Circuit
20057518
４１／１０６

SCDS164A – MAY 2004 − REVISED MAY 2004
D Low Differential Gain and Phase D, DBQ, OR PW PACKAGE

(DG = 0.64%, DP = 0.1 Degrees Typ) (TOP VIEW)
D Wide Bandwidth (BW = 300 MHz Min)

IN 1 16 VCC
D Low Crosstalk (XTALK = −63 dB Typ) S1A 2 15 EN
D Low Power Consumption S2A 3 14 S1D
(ICC = 3 µA Max) DA 4 13 S2D
D Bidirectional Data Flow, With Near-Zero S1B 5 12 DD
Propagation Delay S2B 6 11 S1C
D Low ON-State Resistance (ron = 3 Ω Typ) DB 7 10 S2C
GND 8 9 DC
D VCC Operating Range From 4.5 V to 5.5 V
D Ioff Supports Partial-Power-Down Mode
Operation RGY PACKAGE
D Data and Control Inputs Provide (TOP VIEW)
VCC
Undershoot Clamp Diode
IN
D Control Inputs Can Be Driven by TTL or
1 16
5-V/3.3-V CMOS Outputs
S1A 2 15 EN
D Latch-Up Performance Exceeds 100 mA Per
S2A 3 14 S2D
JESD 78, Class II
DA 4 13 S2D
D ESD Performance Tested Per JESD 22 S1B 5 12 DD
− 2000-V Human-Body Model S2B 6 11 S1C
(A114-B, Class II) DB 7 10 S2C
− 1000-V Charged-Device Model (C101) 8 9
D
DC
Suitable for Both RGB and
GND
Composite-Video Switching
description/ordering information
The TI TS5V330 video switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (EN) input.
When EN is low, the switch is enabled and the D port is connected to the S port. When EN is high, the switch
is disabled and the high-impedance state exists between the D and S ports. The select (IN) input controls the
data path of the multiplexer/demultiplexer.
ORDERING INFORMATION
ORDERABLE TOP-SIDE
TA PACKAGE†
PART NUMBER MARKING
QFN − RGY Tape and reel TS5V330RGYR TE330
Tube TS5V330D
SOIC − D TS5V330
Tape and reel TS5V330DR
−40°C to 85°C
SSOP (QSOP) − DBQ Tape and reel TS5V330DBQR TE330
Tube TS5V330PW
TSSOP − PW TE330
Tape and reel TS5V330PWR
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

!"# $"%&! '#( Copyright  2004, Texas Instruments Incorporated
'"! ! $#!! $# )# # #* "#
'' +,( '"! $!#- '# #!#&, !&"'#
#- && $##(
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

36／75
42/106
４３／１０６
19-0175; Rev 3; 5/96
±15kV ESD-Protected, +5V RS-232 Transceivers
_______________General Description ____________________________Features
MAX202E–MAX213E, MAX232E/MAX241E
The MAX202E–MAX213E, MAX232E/MAX241E line ♦ ESD Protection for RS-232 I/O Pins:
drivers/receivers are designed for RS-232 and V.28 ±15kV—Human Body Model
communications in harsh environments. Each
transmitter output and receiver input is protected ±8kV—IEC1000-4-2, Contact Discharge
against ±15kV electrostatic discharge (ESD) shocks, ±15kV—IEC1000-4-2, Air-Gap Discharge
without latchup. The various combinations of features ♦ Latchup Free (unlike bipolar equivalents)
are outlined in the Selection Guide. The drivers and
receivers for all ten devices meet all EIA/TIA-232E and ♦ Guaranteed 120kbps Data Rate—LapLink™
CCITT V.28 specifications at data rates up to 120kbps, Compatible
when loaded in accordance with the EIA/TIA-232E ♦ Guaranteed 3V/µs Min Slew Rate
specification.
♦ Operate from a Single +5V Power Supply
The MAX211E/MAX213E/MAX241E are available in 28-
pin SO packages, as well as a 28-pin SSOP that uses
60% less board space. The MAX202E/MAX232E come
_________________Pin Configurations
in 16-pin narrow SO, wide SO, and DIP packages. The
MAX203E comes in a 20-pin DIP/SO package, and TOP VIEW
needs no external charge-pump capacitors. The
MAX205E comes in a 24-pin wide DIP package, and C1+ 1 16 VCC
also eliminates external charge-pump capacitors. The V+ 2 15 GND
MAX206E/MAX207E/MAX208E come in 24-pin SO,
C1- 3 14 T1OUT
SSOP, and narrow DIP packages. The MAX232E/
MAX241E operate with four 1µF capacitors, while the C2+ 4 MAX202E 13 R1IN
MAX202E/MAX206E/MAX207E/MAX208E/MAX211E/ MAX232E
C2- 5 12 R1OUT
MAX213E operate with four 0.1µF capacitors, further
V- 6 11 T1IN
reducing cost and board space.
T2OUT 7 10 T2IN
________________________Applications
R2IN 8 9 R2OUT
Notebook, Subnotebook, and Palmtop Computers
Battery-Powered Equipment DIP/SO
Hand-Held Equipment Pin Configurations and Typical Operating Circuits continued at
end of data sheet.
Ordering Information appears at end of data sheet.
_____________________________________________________________Selection Guide
RECEIVERS No. of
No. of RS-232 No. of RS-232 LOW-POWER TTL THREE-
PART ACTIVE IN EXTERNAL
DRIVERS RECEIVERS SHUTDOWN STATE
SHUTDOWN CAPACITORS
MAX202E 2 2 0 4 (0.1µF) No No
MAX203E 2 2 0 None No No
MAX205E 5 5 0 None Yes Yes
MAX206E 4 3 0 4 (0.1µF) Yes Yes
MAX207E 5 3 0 4 (0.1µF) No No
MAX208E 4 4 0 4 (0.1µF) No No
MAX211E 4 5 0 4 (0.1µF) Yes Yes
MAX213E 4 5 2 4 (0.1µF) Yes Yes
MAX232E 2 2 0 4 (1µF) No No
MAX241E 4 5 0 4 (1µF) Yes Yes
LapLink is a registered trademark of Traveling Software, Inc.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
４４／１０６
±15kV ESD-Protected, +5V RS-232 Transceivers
MAX202E–MAX213E, MAX232E/MAX241E
Table 3. DB9 Cable Connections

Commonly Used for EIA/TIAE-232E and
V.24 Asynchronous Interfaces
PIN CONNECTION
Received Line Signal
Detector (sometimes
1 Handshake from DCE
called Carrier Detect,
DCD)
2 Receive Data (RD) Data from DCE
3 Transmit Data (TD) Data from DTE
4 Data Terminal Ready Handshake from DTE
Reference point for

5 Signal Ground
signals
6 Data Set Ready (DSR) Handshake from DCE
7 Request to Send (RTS) Handshake from DTE
8 Clear to Send (CTS) Handshake from DCE

9 Ring Indicator Handshake from DCE
____________Pin Configurations and Typical Operating Circuits (continued)
+5V INPUT
TOP VIEW 0.1µF*
0.1µF
6.3V
16
1 VCC 2
C1+ V+ +10V
0.1µF* +5V TO +10V
6.3V 3
C1- VOLTAGE DOUBLER
4 6 -10V
C2+ V-
C1+ 1 16 VCC 0.1µF* +10V TO -10V 0.1µF*
5 C2- VOLTAGE INVERTER
16V 16V
V+ 2 15 GND
C1- 3 14 T1OUT
11 T1IN T1OUT 14
C2+ 4 MAX202E 13 R1IN T1
MAX232E TTL/CMOS RS-232
C2- 5 12 R1OUT INPUTS OUTPUTS
V- 6 11 T1IN 10 T2IN T2OUT 7
T2
T2OUT 7 10 T2IN
12 R1OUT R1IN 13
R2IN 8 9 R2OUT R1
TTL/CMOS 5k RS-232
DIP/SO OUTPUTS INPUTS
9 R2OUT R2IN 8
R2
5k
PIN NUMBERS ON TYPICAL OPERATING CIRCUIT REFER TO DIP/SO PACKAGE, NOT LCC. GND
* 1.0µF CAPACITORS, MAX232E ONLY. 15
______________________________________________________________________________________
４５／１０６　
Meet with mega satisfaction
SPECIFICATION FOR APPROVAL
Part No. MLT186A

Description: LCD Power Supply Specification
Revision: 1.0
Customer. SANSUI ELECTRIC
Customer Approval No. :
Please return to us one original of “SPECIFICATION FOR APPROVAL” with your approved signatures.
APPROVED SIGNATURES
APPROVED BY： DATE：
CHOP & SIGNATURES:
SHENZHEN MEGMEET ELECTRICAL TECHNOLOGY CO.,LTD

Add: 6F Tower 2, Zhongjian Industrial Building
18 Yanshan Road , Shekou, Shenzhen, P.R.China
ZIP CODE:518067
TEL: (0755)26693042 26693442
FAX: (0755)26693047
E-mail: [email protected]
DESCRIPTION:
MEGMEET SPECIFICATION
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD Model No.:
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION. MLT186
DATE PREPARED CHECKED APPROVED Document No.: REV:
09-12-2005 QIU ZHANGZHI TONY YANG MLT186-1.0 1.0
46/106
Spec. Sample Date Description Safety Mechanical Electrical
Rev. Rev. by by by
2005.
1.0 1.0 Zhangzhi Qiu Tony Yang
09.12
DESCRIPTION:
47/106
Section
1. Power supply overview
1.1 Input Electrical Characteristics Overview
1.2 Output Electrical Characteristics Overview
1.2.1 Output Voltage ,Current & Regulation.
1.2.2 DC Output Ripple & Noise.
1.2.3 Output Transient Response.
1.2.4 DC Output Hold-Up Time.
1.2.4 DC Output Overshoot At Turn On & Turn Off.
1.2.6 DC output voltage rise time
1.3 Remote On/Off Control：
1.4 Protection:
1.4.1 DC output Over Voltage Protection.
1.4.2 DC Output Over current Protection.
1.4.3 DC Output Short Circuit Protection.
1.4.4 Over Temperature Protection.
1.4.5 Reset After Shutdown.
2. Isolation
3. Safety
4. EMC
4.1 EMI
4.2 EMS
5. Environmental Requirement
5.1 Temperature
5.2 Humidity
5.3 Altitude
5.4 Cooling Method
5.5 Vibration
5.6 Impact
6. Dimension
7. Weight
8. Pin Connection
DESCRIPTION:
48/106
Spec. Sample Date Description Safety Mechanical Electrical
Rev. Rev. by by by
2005.
1.0 1.0 Zhangzhi Qiu Tony Yang
09.12
DESCRIPTION:
49/106
2) Outputs shall be bypassed at the connector with a 0.1uF ceramic capacitor and a
10uF electrolytic capacitor to simulate system loading.
1.2.3 Output Transient Response.

Table 4. Test condition.
Voltage Tolerance Limit Slew Rate Load Change
V1/V3±5% 0.2A/uS Min. to 50% load and 50% to Max load
+V2 ±10%
+5V±5%
+5.1VSB±5%
all outputs ±10% 0.2A/uS Min. load to Max load
Note: Transient response measurements shall be made with a load changing repetition
rate of 50Hz to 10kHz.
1.2.4 Table 5 DC Output Hold-Up Time.

Output Voltage 120Vac input 220Vac input
+V1/+V2(+24V) ≥10 mS ≥10 mS

+V3(+12V) ≥10 mS ≥10 mS
+5V/+5.1VSB ≥10 mS ≥10 mS
Note: All of dc output at full load.
1.2.5 Table 6 DC Output Overshoot At Turn On & Turn Off.

Output Channel Output(V) Over shoot voltage(V)
Turn on Turn off
+V1 +24V 2% 2%
+V2 +24V 5% 5%
+V3 + 12V 2% 2%
+5V +5V 5% 5%
+5.1VSB +5.1V 5% 5%
Note: All of dc output current from Min. to Max.
1.2.6 Table 7 DC output voltage rise time

Output Voltage 120Vac input &Full Load 220Vac input &Full Load
+V1/+V2(+24V) ≤100 mS ≤100 mS
DESCRIPTION:
50/106
+V3(+12V) ≤100 mS ≤100 mS
+5V ≤100 mS ≤100 mS
+5.1VSB ≤100 mS ≤100 mS
Note: The output voltages shall rise from10% to 90% of their output voltage.
1.3 Remote On/Off Control：

The power supply DC outputs (without +5.1Vsb) shall be enable with an active-high
TTL(≥2.0V/2.0mA)-compatible signal(Ps-on). The +5.1Vsb is on whenever the AC
power is present.
* When Ps-on is pulled to TTL high, the DC outputs are to be enabled.
* When Ps-on is pulled to TTL low or open circuit, the DC outputs are to be disabled.
Table 8.
Ps-on Signal Comments Outputs
Ps-on- high ≥2.5V&2.0mA ( source) Enable
Ps-on- low ≤1.5 V X
Ps-on-open -- X
1.4 Protection:
1.4.1 Table 9 DC output Over Voltage Protection.

Output Voltage Max. Over Voltage Comments
+V1(+24V) 28V Power supply latch into shutdown state
+5.0V 7Vtyp Hiccup

Note: The power supply shall be test at max AC voltage (270Vac) and min load or no load.
1.4.2 Table 10 DC Output Over current Protection.

Output Voltage Over Current Comments
DESCRIPTION:
51/106
+V1(+24V) ≥7Atyp Shutdown
+V2(+24V) ≥2Atyp Shutdown
+V3(+12V) ≥3A Shutdown
+5V/+5.1VSB ≥9A type Hiccup
1.4.3 Table 11 DC Output Short Circuit Protection.

Output Voltage Comments
+V1(+24V) Shutdown
+V2(+24V) Shutdown
+V3(+12V) Shutdown
+5V/5.1VSB Hiccup
1.4.4 Reset After Shutdown.

Recycle the ps-on signal, the power supply will restart after the fault removed.
2. Isolation
2.1 Table 12
Input To Output DC500V 50MΩmin (at room temperature)
Input To FG DC500V 50MΩmin (at room temperature)
Output To FG Non Isolated
2.2 Table 13
Input To Output 3000Vac 50Hz 1minute ≤10mA
Input To FG 1500Vac 50Hz 1minute ≤10mA
Output To FG Non Isolated
Note: Open FG and Output return.
3. Safety
The power supply shall compliance with the following Criterion:
1) UL60950
2) EN60950
3) GB4943-1995/GB8898-2001
DESCRIPTION:
52/106
4. EMC
4.1 EMI
1) Conduction Emission :
*EN55013, CLASS B
*GB13837-2003, CLASS B
*CISPR13:2001
2) Radiated Emission :
*EN55013, CLASS B
*GB13837-2003, CLASS B
*CISPR13:2001
4.2 EMS
1) ESD
*GB17626.2-1998/IEC61000-4-2 Lever 3
2) EFT
*GB17626.4-1998/IEC61000-4-4 Lever 3
3) SURGE
*GB17626.5-1998/IEC61000-4-5 Lever 3
4） DIP
*GB17626.11-1998/IEC61000-4-11 Class B/C
5. Environmental Requirement
5.1 Temperature
* Operating: -10℃ to +50℃.
* Store: -20℃ to +80℃.
5.2 Humidity
* Operating: From 10%to90% relative humidity (non-condensing).
* Store: From 5 to 95% relative humidity (non-condensing).
5.3 Altitude
* Operating: to10,000 ft.
* Store: to 20,000ft.
5.4 Cooling Method
* Ventilation cooling .
5.5 Vibration
* 10-55Hz, 49.0m/s²(5G), 3minutes period, 20minutes each along X, Y and Z axis.
5.6 Impact
* 196.1m/s²(20G),11ms, once each X, Y and Z axis.
DESCRIPTION:
53/106
6. Dimension
* 200mm X 130mm X 25mm (L *W * H ).
7. Weight
* 680g
8. Pin Connection
Table 15 CN3 VENTER:
NO. Pin Connection Function
1 +24VAUDIO +24VDC OUTPUT

2 +24VAUDIO +24VDC OUTPUT
3 GND +24VDC RETURN
4 GND +24VDC RETURN
Note: CN3 -- JST VA CONNEETION, TYPE : pitch:2.0mm
1 +24V +24VDC OUTPUT

5 GND +24VDC RETURN
6 GND +24VDC RETURN
7 GND +24VDC RETURN
8 GND +24VDC RETURN

1 +12V +12DC OUTPUT

2 +12V +12DC OUTPUT
3 +12V +12DC OUTPUT
4 GND +12V/+5VDC RETURN
DESCRIPTION:
54/106
7 +5V +5DC OUTPUT
8 +5V +5DC OUTPUT
9 +5V +5DC OUTPUT
10 +5V +5DC OUTPUT
11 +5V +5DC OUTPUT

1 +5VSB +5VSB OUTPUT

2 +5VSB +5VSB OUTPUT
3 GND +5VSB RETURN
4 GND +5VSB RETURN
5 PS-ON PS-ON
Table 18 CON1 VENTER:

① AC-L AC INPUT LINE

② NC NC
③ AC-N AC INPUT NUTURE
Fig.8.1 Pin Connection (Top View)
DESCRIPTION:
55/106
DESCRIPTION:
56/106
DESCRIPTION:
57/106
9. Power Supply Mounting
DESCRIPTION:
58/106
P r o d u c t S p e c i f i c a t i o n Ver05 DL-06
SPECIFICATION
CUSTOMER：
DESCRIPTION： Slot-in DVD LOADER
MODEL： DL-06 series(DL-06**)
2005.11.02
ISSUE DATE：
CUSTOMER APPROVED
Checked by Checked by
Approved Prepared
Sales Dept. Technical Dept.
59/106
　Ｐｒｏｄｕｃｔ　Ｓｐｅｃｉｆｉｃａｔｉｏｎ Ver05 DL-06
1. Scope
1.1
This specification applies to Slot-in DVD mechanism for DVD player (thereafter called DVD
mechanism ). Foryou model : DL-06**.
1.2 Any query over the specification shall be expressed by R&D dept. of Foryou Multimedia
Electronics Co.,Ltd.
1.3 For improving performance purpose, this specification is subject to change according to
pre-agreement established between us.
1.4 Hardware and software or manufacturing process may subject to change for improvements
within the rang of the specifications.
2. Dimension of shell and installation
2.1 See attachment for details of dimension of shell and installation.
3. General specification
3.1 Mechanism
3.1.1 Disc loading: Motorized loading.
3.1.2 Disc ejecting: Motorized ejection.
3.1.3 Play: Loading → auto play
3.1.4 Skew adjusting: adjust two points on the base of spindle motor.
3.1.5 Pick-up feed mode: gear and rack drive.
3.1.6 Range of pick-up movement: 22.5mm ~ 59mm, from the center of spindle motor.
60/106
3.1.7
Anti vibration: two steps of dampers to reduce the vibration.
3.2 Power supply

DC12 ±1V（600 mA）& DC5±0.2V (660 mA) .
3.3 Pick-up
3.3.1 　Ｐｉｃｋ－ｕｐ： PVR-520T、PVR-502W（MITSUMI）、HOP-1200S（W）（HITACHI）、

OPU-3153（SANKYO）、SF-HD62（SANYO）、SF-HD65（SANYO）two laser diode and
single object lens pickup.
3.4 Motor
3.4.1 Spindle motor: DC brush motor: CCM03-030R1-26O ( (Moretech).
3.4.2 Sled motor： WRF-300CA-09600.
3.4.3 Loading motor： WFF-050SB-10200.
3.5 Detect switch
3.5.1 Pick-up inner position detecting SW: （WI-A278）、（DS3-A-0001）
3.5.2 Disc chucking detecting SW: ESE22 (Type B)×1pcs
3.5.3 Disc detecting SW: ESE22 (Type B)×2pcs (Panasonic).
3.6 Weight: approximate 476 g.
4. General performance
4.1 Disc specification

Diameter of disc：Φ120±0.3，Φ80±0.3
Thickness of Disc：1.2(+0.3,-0.1)
Type of disc：
61/106
Ｐｒｏｄｕｃｔ　Ｓｐｅｃｉｆｉｃａｔｉｏｎ Ver05 DL-06
DVD Video;
CD-DA;
Video CD;
CD-R, CD-RW;
4.2
Prevention from the 2nd disc insertion: the second disc can’t be loaded when there is a disc in
mechanism.
4.3
Noise Spec. ≤65 dB（A）
Noise level tests shall be carried out in an anechoic room with background noise 20 dB（A） or
less.Noise shall be measured at a position 10cm from the front of the mechanical section.
5. Conditions of operation and storage
5.1 Operation temperature range: 0℃ ~ +45℃.
5.2 Range of storage: -20℃ ~ +60℃
5.3 Operation moisture range: 10% ~ 80% RH.
5.4 Storage moisture range: 0% ~ 90% RH.
5.5 Atmospheric pressure: 860mBar ~ 1060 mBar.
6. Condition of performance evaluation
6.1 Installation: see attachment. Tightened on work table; Installation angle:
forth and back: ±10 º, left and right: ±10 º.
6.2 Environment of evaluation

Temperature ：25±2℃
Humidity ：60±5％（RH）
Ｂｕｔ，ｉｆ　ｈａｖｅ　ｎｏ　ｄｏｕｂｔ　ｔｏ　ｔｈｅ　ｅｖａｌｕａｔｉｏｎ　ｒｅｓｕｌｔ，ｙｏｕ　ｃａｎ　ａｓｌｏ　ａｃｃｏｒｄｉｎｇ　ｔｏ　ｔｈｅ　ｆｏｌｌｏｗｉｎｇ　ｉｔｅｍｓ：
62/106
Temperature
　　　　　　　　　　　　　　　　　　　　　　　　　　　：+15 ℃ ~ +30℃
Humidity ：45% ~ 75%RH
Noise: in an anechoic room with background noise 20dB (A) or less.
6.3 Test circuit and equipment
6.3.1
Refer FORYOU’s standard circuit and equivalent.
7. Reliability test
7.1 Environment test
Item Specification
7.1.1
Test of high temperature

storage After 24hours kept at +60℃, and then 16 hours at room temperature,
the mechanism shall be able to load/eject and playback within this
process.(Test disc:TCD-792 and TDV-520A)
7.1.2
Test of low temperature

storage After 24hours kept at -20℃, and then 16 hours at room temperature,
the mechanism shall be able to load/eject and playback within this
7.1.3
Test of high temperature

and high moisture storage After 48hours kept at +40℃, 90%RH, and then 16 hours at room
temperature, the mechanism shall be able to load/eject and
playback within this process.(Test disc:TCD-792 and TDV-520A)
63/106
7.1.4
High and low temperature

cycling test Applied -20℃(1H)←→60℃(1H)(temperature slope 80℃/H)，
5cycles,then place at normal temperature for 16 hours, the mechanism
shall be able to load/eject and playback within this process.(Test
disc:TCD-792 and TDV-520A)
7.1.5
Test of high temperature DVD mechanism shall be kept in 45℃ for 4 hours, and then operate,
operation the mechanism shall be able to load/eject and playback within this
7.1.6
Test of low temperature DVD mechanism shall be kept in 0℃ for 4 hours, and then operate,
operation the mechanism shall be able to load/eject and playback within this
7.2 Life test
Item Specification
7.2.1
Continue playback ability When a mechanism is executed for continuous playing at room
temperature for 1,000H, the mechanism shall be able to playback
standard disc TDV-520A and TCD-792.
7.2.2
Feed motion
After conduct 200,000 times of pick-up feeding motion at room
temperature, mechanism shall be able to playback standard disc
TDV-520A and TCD-792. (One cycle: inner →outer→ inner).
7.2.3
Loading and ejection
At normal room temperature, after 10,000 times of disc loading and

ejection circulation, mechanism shall be able to playback standard disc
TDV-520A and TCD-792. (One cycle :Disc in →playback → disc out)
7.3 Drop and impact test:
Item Specification
64/106
7.3.1
Shock test (1 time ,6ms), 70G crash impact on each of 6 sides of mechanism. Mechanism
shall be able to playback standard disc TDV-520A and TCD-792.
7.3.2
Drop test After one time of drop test with surface, edge and corner (packing with 10sets
per carton), the mechanism shall be able to playback standard disc
TDV-520A and TCD-792.
Drop with surface: drop height 600mm, Drop sequence: bottom, front, left,
back, right. Each surface drop one time.
Drop with corner: drop height 450mm, Drop one of corners of carton bottom
one time.
Drop with edge: drop height 450mm, Each edge of drop corner (three edges)
drop one time.
7.4 Durability test of vibration
Item Specification
7.4.1
Durability test
of vibration Acceleration 2.5G, Frequency 10~50Hz, sweep time 5minutes, test time is
20minutes with each of 3 directions. After that test, mechanism shall be able
to playback standard disc TDV-520A and TCD-792.
7.5
The test environment is the same as item 6.2 except for special note.
8.
Ref appearance drawing
9. Caution:
9.1
It is not allowed to disassembly and re-tune the mechanism without special training
because the mechanism is assembled and tuned using special method.
9.2
Storage: avoid storing the mechanism in high temperature, heavy wet and dusty place.
65/106
9.3 Handling: avoid extra force to the mechanism when handling.
9.4 Static-proof action should be taken when touch the mechanism since LD and OEIC can
be easily damaged by static.
9.5
Hand touch pickup is forbidden.
9.6
Must avoid laser beam shooting at eyes directly since the laser beam can hurt eyes.
10. Attachment
10.1
《Model Description in detail》
10.2
《Appearance drawing of DL-06》
10.3
《Mechanism schematic diagram of DL-06，set in PCB of customer》
10.4
《customer Servo PCB of DL-06》
10.5
《Package specification of DL-06》
10.6
《Guide of Mechanism installation and cantions on assembly》
10.7
《installation screw》
66/106
10.1《Ｍｏｄｅｌ　ｏｆ　ｌｉｓｔ》
Series Model Pick-Up SPINDLE MOTOR Loading motor： Sled motor：

No. No.
1 DL-06L PVR-520T CCM03-030R1-26 WFF-050SB-102 WRF-300CA-09
(MITSUMI) O (Moretech) 00 600
2 DL-06LH HOP-1200 Same as above
　Ｓａｍｅ　ａｓ　ａｂｏｖｅ　　　　Ｓａｍｅ　ａｓ　ａｂｏｖｅ　
(HITACHI)
3 DL-06H HOP-1200 Ｓａｍｅ　ａｓ　ａｂｏｖｅ　
Same as above 　　　　Ｓａｍｅ　ａｓ　ａｂｏｖｅ　
(HITACHI)
4 DL-06LS SF-HD62(65) Same as above 　　　Ｓａｍｅ　ａｓ　ａｂｏｖｅ　
Ｓａｍｅ　ａｓ　ａｂｏｖｅ　
(SANYO)
5 DL-06LS- SF-HD62 (65)
Ｓａｍｅ　ａｓ　ａｂｏｖｅ　Ｓａｍｅ　ａｓ　ａｂｏｖｅ　
M (SANYO) Same as above
6 DL-06LW PVR-502W Ｓａｍｅ　ａｓ　ａｂｏｖｅ　
Ｓａｍｅ　ａｓ　ａｂｏｖｅ　Ｓａｍｅ　ａｓ　ａｂｏｖｅ　
(MITSUMI)
67/106
f
Chunghwa Picture Tubes, Ltd.
Technical Specification
To : Normal for SECC

Date : 2004.11.15
CPT TFT-LCD
CLAA320WA01
ACCEPTED BY：
TENTATIVE
APPROVED BY CHECKED BY PREPARED BY
Product Planning management General Division

CHUNGHWA PICTURE TUBES, LTD.
1127 Hopin Rd., Padeh, Taoyuan, Taiwan 334, R.O.C.
TEL: +886-3-3675151 FAX: +886-3-377-3054
Doc.No: CLAA320WA01-Ver1.2-041115 Issue Date: 2004/11/15

T- 3650002- 000- A NEW
68/106
CPT CHUNGHWA PICTURES TUBES, LTD.,
RECORD OF REVISIONS
Revision No. Date Page Description
Ver1.0 2004/10/18 all Preliminary specification was first issued .
Ver1.1 2004/10/25 -- Update
Ver1.2 2004/11/15 -- Update
CPT Confidential CLAA320WA01-TENTATIVE-ver1.1

69/106
CONTENTS
No Item Page
1 OVERVIEW 3
2 ABSOLUTE MAXIMUM RATINGS 4
3 ELECTRICAL CHARACTERISTICS 5
4 INTERFACE PIN CONNECTION 10
5 INTERFACE TIMING 13
6 BLOCK DIAGRAM 18
7 MECHANICAL SPECIFICATION 19
8 OPTICAL CHARACTERISTICS 21
9 RELIABILITY TEST CONDITIONS 26
10 PACKAGING 27
11 DEFINITION OF LABELS 29
12 HANDLING PRECAUTIONS FOR TFT-LCD MODULE 31
CPT Confidential 70/106 CLAA320WA01-TENTATIVE-ver1.1

1. OVERVIEW
CLAA320WA01 is 32” color (80.04cm) TFT-LCD (Thin Film Transistor Liquid Crystal Display)
module composed of LCD panel, LVDS driver ICs, control circuit and backlight. By applying 8 bit
digital data, 1366*768, 16.7 million-color images are displayed on the 32” diagonal screen. Interface of
data and control signals is Typ. Inverter for backlight is included in this module. General specification
are summarized in the following table:
1.1GENERAL INFORMATION
Items Specifications Unit
Display Area 697.68(H) × 392.25(V) (31.51 inch diagonal) mm
Number of Pixels 1366(H) × 768(V) 16:9
Pixel Pitch 0.51075(H) × 0.51075(V) mm
Color Pixel Arrangement RGB Vertical Strip
Display Mode Normally Black
Number of Colors 16.7M (8bits) color
Hard coating : 3H ,
Surface Treatment
Anti-reflective coating <less than 2% reflection.
Total Module Power 115 W
1.2 MECHANICAL INFORMATION

Items Min Typ. Max. Unit
Horizontal(H) 742.0 743.0 744.0 mm
Module
Vertical(V) 446.0 447.0 448.0 mm
outline
without inverter 41.0 42.0 43.0 mm
dimension Depth(D)
with inverter 43.0 44.0 45.0 mm
Module Weight 7900 8100 8300 g

2. ABSOLUTE MAXIMUM RATINGS

The following are maximun values which, if exceeded, may cause faulty operation or damage to the
Unit
ITEM SYMBOL MIN. MAX. UNIT Remark
Power Supply Voltage For LCD VCC -0.3 16.0 V
Input voltage of inverter VBL 21.6 26.4 V
Input current of inverter IIN -- 9 A
Inverter dimming VDIM 0 5 Vdc
Inverter frequency FL 43 53 kHz
Backlight striking time Ts 1 Sec.
Backlight on/off ON 2.4 5 Vdc
VBLON
control voltage OFF 0 1 Vdc
VESDt -100 100 V
ESD
VESDc -8000 8000 V
ICC Rush Current IRUSH -- 12 A
Operation Ambient Temperature Top 0 50 ℃ *1) *2) *3) *4)
Storage Temperature Tstg -20 60 ℃ *1) *2) *3) *4)
[Note]
*1) The relative temperature and humidity range are as below sketch, 90%RHMax. (Ta≦40℃)
Humidity≦85%RH without condensation.
Relative Humidity ≦90% (Ta≦ 40℃) , Wet Bulb Temperature ≦39℃(Ta≧40℃)
*2) The maximum wet bulb temperature ≦39℃(Ta＞40℃) and without dewing.
*3) If you use the product in a environment which over the definition of temperature and humidity
too long ,this will effect the result of visual inspecfion.
*4) If you operate the product in normal temperature range, the center surface of panel should be
under 60℃.
90%
60%%
Wet Bulb Storage

50
Temperature [C]
Humidity [(%)RH]
40
40%
Operation
30
20
10
10%
0
-20 0 10 20 30 40 50 60 70 80
Dry Bulb Temperature [C]

3. ELECTRICAL CHARACTERISTICS
(a). TFT-LCD Ta=25℃
ITEM SYMBOL MIN TYP MAX UNIT REMARK
LCD Power Supply Voltage VCC 11.4 12.0 12.6 V [Note 1]
Ripple Voltage Vrpd -- -- 100 mVp-p VIN=+12.0V
Rush current Irush -- -- 8 A [Note 2]
White -- 400 --
LCD Power
Black ICC -- 350 -- mA [Note 3]
Supply Current
RGB stripe -- 390 --
LCD power consumption Pc -- 6.48 9.7 W
High input voltage of LVDS VIN+ -- -- 100 mV
Low input voltage of LVDS VIN- 100 -- -- mV [Note 4]
Input common voltage of LVDS VCM -- 1.25 - V [Note 5]
Input terminal resist of LVDS RT -- 100 -- ohm
[Note 1] The module should be always operated within above ranges.

[Note 2] Measure conditions：
VCC
Q1 FUSE
DC 2SK1475 LCD Module
C3 Input
+5V 1uF
R1
47k
Q2
2SK1470
SW R2
(High to low) 1k
(control signal)
C2
VR1 0.01uF
47k
+12V
DC 0.9Vcc
C1
+15V 1uF
0.1Vcc 1ms
GND
Vcc rising time is 1 ms

[Note 3] The specified power supply current is under condition at Vcc=12V, Ta=25+/-2℃, fv=60Hz
，whereas a power dissipation check pattern below is displayed.
a. White pattern b. Black pattern c. RGB Stripe pattern
[Note 4] Power and signal sequence：

t1 ≦ 30ms
0＜ t2 ＜ 50ms
0＜ t3 ≦ 50ms
300ms ≦ t4
500ms ≦ t5
100ms ≦ t6
300＜ t7 ≦500ms
300＜ t8 ≦500ms
VCC
0.9 VCC 0.9 VCC
LCD Power Supply
data
Logic Signal
0.1 VCC 0.1 VCC
0.1 VCC
t1 t2 t3 t4
VBL
Backlight Power Supply
BLON
Backlight On/Off
t7 t6
t5 t8
Data: RGB DATA, DCLK, DENA

VCC-dip state：
1) When 9V≦VCC＜11.4 V，td≦10 ms.
2) VCC ＞ 11.4V，VCC-dip condition should also follow the VCC-turn-off condition.
9V
11.4
[Note 5] LVDS signal definition ：
RT
VID = VIN+ – VIN-，

△VCM = ｜VCM+–VCM-｜，
△VID = ｜VID+–VID-｜，
VID+ = ｜VIH+–VIH-｜，
VID- = ｜VIL+–VIL-｜，
VCM = ( VIN++VIN- ) / 2，
VCM+ = ( VIH++VIH- ) / 2,
VCM- =( VIL++VIL- ) / 2
VIN+: Positive differential DATA ＆ CLK input
VIN-: Negative differential DATA ＆ CLK input

(b). Backlight
Ta=25℃
ITEM SYMBOL MIN TYP MAX UNIT REMARK
Lamp Voltage VL -- 1150 -- Vrms IL=5.0mA
Lamp Current IL 4.7 5.0 5.3 mArms [Note 1]
Lamp life time LT 50,000 60,000 -- hr [Note 2]
Input voltage of inverter VBL 21.6 24 26.4 V
[Note 3]
Input current of inverter IIN 0 4.3 5 A
Input frequency of inverter FL 43 48 53 KHz [Note 4]
Inverter dimming VDIM 0 -- 5 Vdc [Note 5]
Inverter duty ratio -- 30 -- 100 % VDIM=5V(MAX.)
Inverter opening voltage Vopen 2300 -- 2700 Vrms
Backlight on /of ON 2.4 -- 5

VBLON V [Note 6]
control voltage OFF 0 -- 1
Power consumption
BLW -- 105 115 W After starting 30 mins
(Panel+ Backlight )
Start up Ta=0℃ Vs 2300 -- 3000 Vrms

Voltage Ta=25℃ 1960 -- 3000
[Note]
*1) Lamp Current measurement method (The current meter is connected to low voltage end)
Take the average of 16 CCFL’s lamp current as VDIM = 5V .

*2) Definition of the lamp life time：

When lamp luminance redue to 50% or lower than its initial value.
*3) Ripple voltage that occars at the instant of power-on can’t exceed 30V.
*4) Electrical and optical characterisitics color chromaticity is not included can maintain in a range
+/- 10% when the inverter operates within this frequency range.
*5) Brightness is the darkest when VDIM = 0V ; Brightness is the darkest when VDIM = 5V .
*6) Backlight turns off when VBLON = 0V ; turns on when VBLON = 5V(24V must be input in advance)

4. INTERFACE PIN CONNECTION

(a).Connector Part No.：FI-X30SSL-HF(JAE) or compatible
PIN NO SYMBOL DESCRIPTION NOTE
1 VCC Power supply: +12V
2 VCC Power supply: +12V
3 GND Ground
4 GND Ground
5 RxIN0- Data-
6 RxIN0+ Data+
7 GND Ground
8 RxIN1- Data-
9 RxIN1+ Data+
10 GND Ground
11 RxIN2- Data-
12 RxIN2+ Data+
13 GND Ground
14 RxCLKIN- Clock-
15 RxCLKIN+ Clock+
16 GND Ground
17 RxIN3- Data-
18 RxIN3+ Data+
19 GND Ground
20 NC Reserved
21 NC Reserved
22 NC Reserved [Note 1]
23 ColorMD1 Color Option (1) [Note 3]
24 ColorMD2 Color Option (2)
25 NC Reserved
26 NC Reserved
27 DMS LVDS Option [Note 2]
28 GND Ground
29 GND Ground
30 GND Ground
[Note 1] NC for internal use. Let it open.
[Note 2] High (3.3V) →JEIDA LVDS format；Low (GND) →None-JEIDA
LVDS format,It should be input High or Low logic level，it can’t be NC(Open).
[Note 3] Color matrix selection. It should be input High or Low logic level， it can’t be
NC(Open).
ColorMD2 ColorMD1 Mode
L L Color 1(Native color)
L H Color 2
H L Color 3
H H Color 4

(b) LVDS Interface：LVDS Receiver：Tcon (LVDS Rx embeded)
LVDS PIN JEIDA-DATA Normal DATA

TxIN/RxOUT0 R2 R0
TxIN/RxOUT1 R3 R1
TxIN/RxOUT2 R4 R2
TxOUT/RxIN0 TxIN/RxOUT3 R5 R3
TxIN/RxOUT4 R6 R4
TxIN/RxOUT6 R7 R5
TxIN/RxOUT7 G2 G0
TxIN/RxOUT8 G3 G1
TxIN/RxOUT9 G4 G2
TxIN/RxOUT12 G5 G3
TxOUT/RxIN1 TxIN/RxOUT13 G6 G4
TxIN/RxOUT14 G7 G5
TxIN/RxOUT15 B2 B0
TxIN/RxOUT18 B3 B1
TxIN/RxOUT19 B4 B2
TxIN/RxOUT20 B5 B3
TxIN/RxOUT21 B6 B4
TxOUT/RxIN2 TxIN/RxOUT22 B7 B5
TxIN/RxOUT24 HSYNC HSYNC
TxIN/RxOUT25 VSYNC VSYNC
TxIN/RxOUT26 DENA DENA
TxIN/RxOUT27 R0 R6
TxIN/RxOUT5 R1 R7
TxIN/RxOUT10 G0 G6
TxOUT/RxIN3 TxIN/RxOUT11 G1 G7
TxIN/RxOUT16 B0 B6
TxIN/RxOUT17 B1 B7
TxIN/RxOUT23 RESERVED RESERVED

(c) Inverter – side connector：PHR-14(JST)
PIN NO SYMBOL DESCRIPTION NOTE
1 VBL Supply Voltage 24V

6 GND Ground
7 GND Ground
8 GND Ground
9 GND Ground
10 GND Ground
11 NC NC(Test pin or else)
12 BLON ON/OFF Control [Note 1]
13 VDIM 0V~5V [Note 2]
14 GND GND
[Note 1] ON=5V , OFF=0V；When this PIN is disconnecting with power，the Inverter is in

OFF status.
[Note 2] Max Brightness =5V，Min Brightness =0V；When this PIN is disconnecting with
power，the output status of Inverter is the same as VDIM＝0V.

5. INTERFACE TIMING(DE only mode)
(1) Timing Specification

ITEM SYMBOL MIN. TYP. MAX. UNIT
Freq. fCLK 68 80 84 MHz
DCLK
Cycle tCLK 14.7 12.5 11.9 ns
Line Rate fH 43.17 48.54 53.33 kHz
Horizontal
tH 1575 1648 1936 tCLK
total time
Horizontal Horiaontal
tHA --- 1366 --- tCLK
effective time
LCD Horizontal
Timing tHB 209 282 570 tCLK
DENA blank time
Frame Rate Fr 54.65 60 67.51 Hz

Vertical
tV 790 810 888 tH
total time
Vertical Vertical
tVA 768 768 768 tH
effective time
Vertical
tVB 22 42 120 tH
blank time
[Note]
1).The best result of over-driving is in frame rate =60Hz.
2).This module is operated in DE only mode. Hsync and Vsync input signals should be set to low
logic level. Otherwise, this module would be operated abnormally.
3).DE (DATA ENABLE) is usually in positive.

(2) Timing Chart
a. Horizontal Timing
DCLK
First Data
DATA Invalid Data 1 2 3 1365 1366 Invalid Data

(R,G,B)
Last Data
t HFP t HBP t HA
DENA
t H=1/f H
b. Vertical Timing Chart
HD
LINE DATA Invalid Data 1 2 3 767 768 Invalid Data
t VFP tVBP tVA
DENA
tV=1/f V

(3) LVDS DATA MAPPING
a.None-JEIDA normal Specification
1CLK
RXCLK
RXIN0 R1 R0 G0 R5 R4 R3 R2 R1 R0
RXIN1 G2 G1 B1 B0 G5 G4 G3 G2 G1
RXIN2 B3 B2 DENA VD HD B5 B4 B3 B2
RXIN3 R7 R6 Preserve B7 B6 G7 G6 R7 R6
PREVIOUS DATA for current CLK cycle NEXT
b.JEIDA Specification
1CLK
RXCLK
RXIN0 R3 R2 G2 R7 R6 R5 R4 R3 R2
RXIN1 G4 G3 B3 B2 G7 G6 G5 G4 G3
RXIN2 B5 B4 DENA VD HD B7 B6 B5 B4
RXIN3 R1 R0 Preserve B1 B0 G1 G0 R1 R0
PREVIOUS DATA for current CLK cycle NEXT
8bit LSB:R0,G0,B0
Parallel TTL Data Inputs Mapped to LVDS outputs

(4) LVDS INTERFACE

8bit LSB：R0,G0,B0
Parallel TTL Data Inputs Mapped to LVDS outputs
TRANSMITTER(THC63LVD823) INTERFACE CONNECTOR

TIMING CONTROLLER INPUT
PIN NO INPUT DATA HOST TFT_LCD
51 TA0 R2
52 TA1 R3
54 TA2 R4
55 TA3 R5
TxOUT0+ TA+
56 TA4 TxOUT0- TA- R6
3 TA5 R7 (MSB)
4 TA6 G2
6 TB0 G3
7 TB1 G4
11 TB2 G5
12 TB3 G6
TxOUT1+ TB+
14 TB4 TxOUT1- TB- G7 (MSB)
15 TB5 B2
19 TB6 B3
20 TC0 B4
22 TC1 B5
23 TC2 B6
24 TC3 B7 (MSB)
TxOUT2+ TC+
27 TC4 TxOUT2- TC- Reserved
28 TC5 Reserved
30 TC6 DENA
50 TD0 R0 (LSB)
2 TD1 R1
8 TD2 G0 (LSB)
10 TD3 G1
TxOUT3+ TD+
16 TD4 TxOUT3- TD- B0 (LSB)
18 TD5 B1
25 TD6 Reserved

(5) Color data assignment
[Note]
(1) Definition of gray scale：
Color (n)：n indicates gray scale level，higher n means brighter level.
(2)Data：1-High，0-Low
6. BLOCK DIAGRAM
TFT-LCD Module
Timing
Controller
Source Driver
TA +/-
INPUT CONNECTOR
TB +/-
Voltage Supply
Gate Driver
TC +/- LCD Panel
for Gray Levels
TD +/-
TCLK +/- 1366 X 3 X 768
Vin=12V
DC/DC CN2
GND Backlight +
Converter Inverter CN3
BACKLIGHT UNIT
Lamp connector
HV(CN2)： BHR-02(8.0)VS-1(JST)*8 Mating connector：SM02(8.0)B-BHS-1-TA(JST)
LV1(CN3)：DF13-8P-1.25H(HRS)*2 LV2：DF13-8S-1.25H(HRS)*2
LV3：DF13-8S-1.25H(HRS)*2 Mating connector：DF13-8P-1.25H(HRS)
LV3 LV2 LV1
HV LV
HV LV
LV3 LV2 LV1

7. MECHANICAL SPECIFICATION
(1) Front side ( include Inverter, if the dimension did not to eerance, please refer to the table. )
[Unit: mm]

(2) Rear side ( include Inverter, if the dimension did not to eerance ,please refer to the table. )
[Unit: mm]

8.OPTICAL CHARACTERISTICS
Ta = 25°C, VCC=5V
ITEM SYMBOL CONDITION MIN. TYP. MAX. UNIT REMARKS
θ = ψ﹦0°
Contrast (CEN) CR 600 800 -- -- *1)*2)*3)
Point-5
Central
Lwc θ = ψ﹦0° 500 550 -- cd/m2
luminance
Luminance 9P Luminance Lw9 θ = ψ﹦0° -- 500 -- cd/m2 *2)*3)
(AVG)
Uniformity △Lw θ = ψ﹦0° -- -- 75 % *2)*3)
Contrast Uniformity △CR θ = ψ﹦0° -- -- 75 % *1)*2)*3)
Response Time tr θ = ψ﹦0° -- 7 15 ms *3)*4)

( White – Black ) tf θ = ψ﹦0° 9 15 ms *3)*4)
Response Time
trg, tfg 　 -- 10 TBD ms *5)
(Gray to gray average)
2h -- -- 5 sec *6)
Image sticking tis
24 h -- -- < 16 sec *6)
Horizontal ψ CR ≧ 10 -80~80 -85~85 -- ° *2)*3)
View angle
Vertical θ Point-5 -80~80 -85~85 -- ° *2)*3)
Crosstalk Ratio CMR θ = ψ﹦0° -- -- 1 % *3)*7)
Rx 0.610 0.640 0.670
Red
Ry 0.295 0.325 0.355
Gx 0.235 0.265 0.295
Green
Gy 0.596 0.626 0.656
Color Bx θ = ψ﹦0° 0.115 0.145 0.175
Blue -- *2)*3)
Chromaticity By Point-5 0.031 0.061 0.091
Wx 0.253 0.283 0.313

White
Wy 0.267 0.297 0.327
Color Temperature Tc -- 9300 -- K *3)

Color Gamut CG -- 72 -- % *8)
[Note]
These items are measured using：BM-5A (TOPCON) [ under the dark room condition (no ambient
light). ]
Measurement Condition：
After lighting on the panel 30 mins, you can proceed the Measurement testing.
The definiton of Typ ualue is under status of lamp current = 5 mArms.(AVG)

Definition of these measurement items is as follows：
*1) Definition of Contrast Ratio：〔 These items are measured using BM-5A (TOPCON) under the
dark room condition (no ambient light). 〕
CR=ON (White) Luminance/OFF (Black) Luminance
*2) Definition of Luminance and Luminance uniformity and Contrast and Contrast Uniformity and the
Deviation of Color Coordinate：
Luminance and Contrast：To measure at the center position “5” on the screen (NO.5)，see
Fig.8-1 below.
Luminance uniformity：Lw (MAX) and Lw(MIN) are the maximum and minimum luminance
value measure at the position “1~5” on the screen (NO.1~5)，see Fig.8-
1 and below show equation：
∆Lw＝[ (Lw(MIN)) / Lw(MAX) ] × 100%
Contrast Uniformity：CR(MAX) and CR(MIN) are the maximum and minimum contrast value
measure at the position “1~5” on the screen (NO.1~5)，see Fig.8-1 and
below show equation.：
∆CR＝[ CR(MIN)] / CR(MAX) ] × 100%
The Deviation of Color Coordinate：To measure at the position “1~9” on the screen (NO.1~9)，
see Fig.8-1 below.
228 683 1138

(1, 1) 」
1 6 2
128
7 5 8
384
3 9 4
640
(1366, 768)
Figure 8-1. Measurement positions

*3) Definition of Viewing Angle ( θ，ψ )：
Figure 8-2. Definition of Viewing Angle
*4) Definition of Response Time ( White – Black )
W h i t e (2 5 5 t h )
90% 90%
L u m i n a n ce
10% 10% B l a c k (0 )
tr tf
Figure 8-3. Definition of Response Time ( White – Black )
*5) Definition of Response Time ( Gray to Gray ,9 × 9 levels )
(0~255 th )
90% 90%
Lum inance
(G ray S cale Level)
10% 10% (0~255 th )

trg tfg
Figure 8-4. Definition of Response Time (Gray to Gray )

The driving signal time means the signal of gray level 0、31、63、95、127、159、191、223、
255.
Gray to gray average means the average switching time of gray level 0、31、63、95、127、
159、191、223、255 to each other.
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature
change during measuring. In order to stabilize the luminance，the measurement should be
executed
after lighting Backlight for 1 hour in a windless room.
*6) Image sticking test method:

Continuously display the test pattern shown in the figure below for specified time. To change the
module frame to gray pattern ( gray 127 pattern ) , and it’s displaying grade still under
specfication.
W h it e B lock B la ck B a ck g r o u n d
(2 5 6 G L ) 3 0 -P ix e l (0 G L )
3 0 × 3 0 -P ix e l
3 0 -P ix e l
・・・・・・・・
・・・・・・・・・・・・
・・・・・・・・・・・・・・
・・
・・
・・・・・・・・・・
Figure 8-4. the pattern of Image sticking test

*7) Definition of Cross talk Ratio

CMR = MAX ( ( | ( LB1-LA ) / LC | ) × 100﹪ ， ( | (LB2 – LA ) / LC | ) × 100﹪ )
LA： Pattern A(Half-Tone pattern) Measure point Luminance
LB1，LB2： Pattern B1、Pattern B2 Measure point Luminance
LC： Pattern C(white pattern) Measure point Luminance
PatternB1
Gray127 (683,96)
(341,192)
Black (1195,384)
(1024,576)
PatternA PatternC
(683,672)
Gray127 white
(0,0) PatternB2
Gray127
white measurement point
(1366,768)
Figure 8-4. Cross talk
*8) Definition of Color Gamut:

To measure RGB three sub-pixels color gamut coordinate at CIE coordinate chart from the center
of module , to form a triangle area = ARGB.
RGB three sub-pixels of NTSC at CIE coordinate chart to form a triangle area = NRGB.
ARGB
CG = × 100
N RGB
CPT Confidential 93/106 CLAA320WA01-TENT

9.RELIABILITY TEST CONDITIONS
(1) Temperature and Humidity
TEST ITEMS CONDITIONS

High Temperature Operation 50℃；240hrs
High Temperature Storage 60℃；240hrs
High Temperature 50℃；90% RH；240 hrs
High Humidity Operation (No condensation)
Low Temperature Operation 0℃；240 hrs
Low Temperature Storage -20℃；240 hrs
Between -20℃(1hr) and 60℃(1hr)；
Thermal Shock
100 Cycles
(2) Shock & Vibration
ITEMS CONDITIONS
Shock level：980m/s2(100G)
Shock Waveform：half sinusoidal wave, 2ms

(Non-Operation) Number of shocks ： one shock input in each direction of three
mutually perpendicular axes for a total of six shock inputs.
Vibration level：9.8m/s2(1.5G) zero to peak

Waveform：sinusoidal
Vibration Frequency range：10 to 300 Hz

(Non-Operation) Frequency sweep rate：0.5 octave/min
Duration：one sweep from 10 to 300Hz in each of three mutually
perpendicular axis(each x，y，z axis：10 min，total 30 mins)
(3) Judgment standard

The judgment of the above test should be made as follow:
Pass: Normal display image with no obvious non-uniformity and no line defect.
Partial transformation of the module parts shall be ignored.
Fail: No display , obvious non-uniformity, or line defects.

10.PACKAGING
10.1 PACKING SPECIFICATIONS
(1) 3 LCD TV modules/1 Box
(2) Box dimensions：975(L) x 375(W) x 562(H)
(3) Weight：approximately 31.6kg (3 modules per box)
10.2 PACKING METHOD

Fiqurs 1 and 2 are the packing method
EPE PAD BOTTOM 32〞MODULE

(3PCS)
EPE FOAM
CARTON
CARTON LABEL
Fiqure 1 packing method

(1) Corner protector： L1125 x 50mm x 50mm

(2) Pallet：L1000 x W1150 x H130mm
(3) Bottom Cap：1000 x W1150 x H130mm
(4) Pallet Stack：1000 xW1150 x H1250mm
(5) Gross：201kg
Carton label
Fiqure2 packing method
總計 :6 箱
pallet:10kg
Fiqure2 packing method

11. DEFINITION OF LABELS

11.1 CPT Module Label
The barcode nameplate is pasted on each module as illustration, and its definitions are as
following explanation.
(a) LABEL：
CHUNGHWA
CLAA320WA01
Panel ID:xxxxxxxx xxx
Product date:xxxxxxxxx xxx
Model Name Barecode
- Model Name：CLAA320WA01
- Panel ID：XXXXXXXX XXX
CPT Internal Use.
- Product date：X XX XXXX X XXX
Customer NO.
Product Line.
Serial NO.
Week.
Year.
(b) MODULE LABEL :
(c) B/L MAKER LABEL :

(d) Disposal label
11.2. Handling precaution

(1) Don’t disassemble and reassemble the module by self.
(2) Acid, alkali, alcohol or touched directly by hand will damage the display.
(3) Static electricity will damage the module. Please configure grounding device.
(4) The strong vibration, shock, twist or bend will cause material damage, even module broken.
(5) It is easy to cause image sticking while displaying the same pattern for very long time.
(6) The response time, brightness and performance will vary from different temperature.
(7) The inverter will cause high temperature and high voltage, be careful please.

12. HANDLING PRECAUTIONS FOR TFT-LCD MODULE
Please pay attention to the followings in handling- TFT-LCD products；
12.1 ASSEMBLY PRECAUTION

(1) Please use the mounting hole on the module side in installing and do not beading or wrenching
LCD in assembling. And please do not drop, bend or twist LCD module in handling.
(2) Please design display housing in accordance with the following guidelines.
• Housing case must be destined carefully so as not to put stresses on LCD all sides and not to
wrench module. The stresses may cause non-uniformity even if there is no non-uniformity
statically.
• Keep sufficient clearance between LCD module back surface and housing when the LCD
module is mounted. Approximately 1.0 mm of the clearance in the design is recommended
taking into account the tolerance of LCD module thickness and mounting structure height
on the housing.
• When some parts, such as, FPC cable and ferrite plate, are installed underneath the LCD
module, still sufficient clearance is required, such as 0.5mm. This clearance is, especially, to
be reconsidered when the additional parts are implemented for EMI countermeasure.
• Design the inverter location and connector position carefully so as not to give stress to lamp
cable, or not to interface the LCD module by the lamp cable.
• Keep sufficient clearance between LCD module and the others parts, such as inverter and
speaker so as not to interface the LCD module. Approximately 1.0mm of the clearance in
the design is recommended.
(3) Please do not push or scratch LCD panel surface with any-thing hard. And do not soil LCD
panel surface by touching with bare hands. (Polarizer film, surface of LCD panel is easy to be
flawed.)
(4) Please do not press any parts on the rear side such as source TCP, gate TCP, control circuit
board and FPCs during handling LCD module. If pressing rear part is unavoidable, handle
the LCD module with care not to damage them.
(5) Please wipe out LCD panel surface with absorbent cotton or soft clothe in case of it being soiled.
(6) Please wipe out drops of adhesives like saliva and water on LCD panel surface immediately.
They might damage to cause panel surface variation and color change.
(7) Please do not take a LCD module to pieces and reconstruct it. Resolving and reconstructing
modules may cause them not to work well.
(8) Please do not touch metal frames with bare hands and soiled gloves. A color change of the metal
CPT Confidential 99/106 CLAA320WA01-TENTATIVE-v

frames can happen during a long preservation of soiled LCD modules.
(9) Please pay attention to handling lead wire of backlight so that it is not tugged in connecting with
inverter.
12.2 OPERATING PRECAUTIONS

(1) Please be sure to turn off the power supply before connecting and disconnecting signal input
cable.
(2) Please do not change variable resistance settings in LCD module. They are adjusted to the most
suitable value. If they are changed, it might happen LCD does not satisfy the characteristics
specification.
(3) Please consider that LCD backlight takes longer time to become stable of radiation characteristics
in low temperature than in room temperature.
(4) A condensation might happen on the surface and inside of LCD module in case of sudden change
of ambient temperature.
(5) Please pay attention to displaying the same pattern for very long time. Image might stick on LCD.
If then, time going on can make LCD work well.
(6) Please obey the same caution descriptions as ones that need to pay attention to ordinary electronic
parts.
12.3 PRECAUTIONS WITH ELECTROSTATICS

(1) This LCD module use CMOS-IC on circuit board and TFT-LCD panel, and so it is easy to be
affected by electrostatics. Please be careful with electrostatics by the way of your body
connecting to the ground and so on.
(2) Please remove protection film very slowly on the surface of LCD module to prevent from
electrostatics occurrence.
12.4 STORAGE PRECAUTIONS

(1) When you store LCDs for a long time, it is recommended to keep the temperature between 0℃
~40℃ without the exposure of sunlight and to keep the humidity less than 90%RH.
(2) Please do not leave the LCDs in the environment of high humidity and high temperature such as
60℃ 90%RH.

(3) Please do not leave the LCDs in the environment of low temperature; below -20℃.
12.5 SAFETY PRECAUTIONS

(1) When you waste LCDs, it is recommended to crush damaged or unnecessary LCDs into pieces
and wash them off with solvents such as acetone and ethanol, which should later be burned.
(2) If any liquid leaks out of a damaged-glass cell and comes in contact with the hands, wash off
throughly with soap and water.
12.6 OTHERS
(1) A strong incident light into LCD panel might cause display characteristics' changing inferior
because of polarizer film, color filter, and other materials becoming inferior. Please do not
expose LCD module direct sunlight Land strong UV rays.
(2) Please pay attention to a panel side of LCD module not to contact with other materials in
preserving it alone.
(3) For the packaging box, please pay attention to the followings:
• Packaging box and inner case for LCD are designed to protect the LCDs from the damage or
scratching during transportation. Please do not open except picking LCDs up from the box.
• Please do not pile them up more than 3 boxes. (They are not designed so.) And please do not
turn over.
• Please handle packaging box with care not to give them sudden shock and vibrations. And
also please do not throw them up.
• Packing box and inner case for LCDs are made of cardboard. So please pay attention not to
get them wet. (Such like keeping them in high humidity or wet place can occur getting them
wet.)

Spare Part List for LCT3201TD
Item Part Number Part Description Usage / Unit

unit
1 E6203-32TD01 DISPLAY LCD 32" 1 piece
2 771EL32AD02-01 MAIN PCBA 1 set
3 E7802-005006-1 DVD BOARD 1 piece
4 771-L27AD02-01 TERMINAL PCBA 1 set
5 E7802-005008 POWER PCBA 1 set
6 771-L27AD01-01 KEY PCB ASSY 1 set
7 771-L32AD01-03 KEY PCB ASSY MICO DVD 1 set
8 771-L32AD01-01 REMOTE RECEIVE PCBA 1 set
9 771LL27AD02-01 TUNER & AUDIO PCBA 1 set
10 E4101-027001 POWER SWITCH 1 piece
11 E4801-124001 SPEAKER 2 piece
12 E4802-014001 TWEETER 2 piece
13 E3219-002003 POWER SOCKET 1 piece
14 E3471-000048 KEY WIRE FOR DVD 1 piece
15 E3471-000045 WIRE WS SHIELD WIRE FOR 32LCD TV+COMBO 1 piece
DVD SILGNAL WIRE-6
16 E3421-925032 WIRE ASSY PH2.0-4Y/4Y L=450MM AMP24V 1 piece
17 E3461-064022 WIRE WF FLAT WIRE P2.0 9P/11P FOR 32LCD 1 piece
TV+COMBO DVD POWER WIRE
18 E3461-064019 TV+COMBO FOR DVD POWER WIRE 1 piece
19 E3421-925038 WIRE ASSY TJC3-2Y L=850MM SPK-L 2 piece
20 E3421-925053 WIRE ASSY FOR TV&DVD AUDIO L/R/MUTE 1 piece
21 E3421-925054 WIRE ASSY FOR TV&DVD TUNER 1 piece
22 E3471-000044 WIRE FOR COMBO MICO KEY 13P/8P+5P 1 piece
23 E3421-925061 POWER SOCKET CABLE 1 piece
24 E3461-064018 WIRE WF FLAF WIRE FOR 32LCD TV+COMBO 1 piece
DVD STANDBY POWER WIRE
25 E3461-064021 WIRE FOR COMBO DVD BOARD +SV POWER 1 piece
26 E3461-064028 WIRE INVERTER 14P/2.0+8P/2.5+12P/2.0 La=780 1 piece
L6=640 CPT
27 E3421-924009 WIRE ASSY 2P L120 2 piece
28 E3471-002002 WIRE WS SHIELD WIRE FOR 32LCD 1 piece
TV+COMBO DVD SIGNAL WIRE
29 E3471-001002 WIRE WS SHIELD P1.0 0P L=220 FOR CPT 1 piece
30 E3421-229007 WIRE 3P 1 piece
31 E3404-157001 AC CORD 1 Piece
32 200-L32AD02-STD01 CABINET FRONT SIL/BLK 1 Piece
AV
33 370-42D101-01 RUBBER FOOT 6 piece
34 E7301-011002 BATTERY AA 2 Piece
103/106
Spare Part List for LCT3201TD
Item Part Number Part Description Usage / Unit

unit
35 790-R00105-01 REMOTE CONTROL 1 piece
36 202-L32AD01-01AV CABINET BACK BLACK 1 piece
37 236-L32AD01-01RV DVD COVER GREY 1 piece
38 258-L32AD01-01RV DVD KEY PANEL GREY 1 piece
39 231-L32AB21-01RV BASE COVER SILVER 1 set
40 277-L32AD11-03S FUNCTION KEY 1 piece
41 481-L32AB04-01S SHIELD BOX (VSC) 1 piece
42 481-L32AD01-01S SHIELD BOX FOR POWER 1 piece
43 483-L32AB12-01S SHIELD COVER (VSC) 1 piece
44 436-L32AB04-01S TERMINAL SHEET 1 piece
45 481-L32AD03-01S SHIELD BOX DVD FOR AUO 1 piece
46 429-L32AD01-01S POWER JACK BRACKET 1 piece
47 263-R00101-01L REMOTE LENS 1 piece
48 269-42SD01-01L REMOTE RECEIVE LENS 1 piece
49 277-L32AD02-01S DVD FUNCTION KEY 1 piece
50 206-L32AD01-01RV SPEAKER CABINET BACK GREY 1 piece
51 510-L32AD01-MTU02 GIFT BOX AKAI 1 piece
K
52 300-L32AD04-02C POLFOAM TOP 1 piece
53 300-L32AD05-02C POLFOAM BOTTOM 1 piece
54 310-111404-07V POLYBAG 11"X14"X0.04 1 piece
55 310-041204-01V POLYBAG 4"X12"X0.04 1 piece
56 310-423850-07V BAG LAMIFILM 42"X38"X0.5MM 1 piece
57 580-L32ADHS-TU02L INSTRUCTION MANUAL 1 piece
58 388-42D103-01H CAUTION LABLE 1 piece
59 388-42SB04-01H POWER PLATE 1 piece
60 387-L32AD01-MTU02 MODEL PLATE 1 piece
H
61 384-L32AD01-MTU01 SHEET FOR TERMINAL 1 piece
H
62 590-L32AD01-01 WARRANTY CARD 1 piece
63 593-L32AD01-02 INSERTION CARD 1 piece
64 579-L32AD02-01 UPC LABEL OF G/B 2 piece
65 568-P46T02-02 WARNING LABEL 1 piece
66 579-L32AD04-01 LASER WARNING LABEL 1 piece
67 579-42D103-02 ON/OFF LB ENG 1 piece
68 579-42D102-09 SERIAL NO/BAR CODE LABEL 1 piece
69 579-L32AD03-02 CLASS I LASER PRODUCT LOGO 1 piece
70 579-42D105-01 PROTECTIVE EARTH LABE 1 piece
104/106
If you forget your V-Chip Password
- Omnipotence V-Chip Password: 8205.
- Press MENU button.
- Press LEFT RIGHT buttons to highlight "MISC" Menu.
- Press Up, Down buttons to highlight "Parentald".
- Press ENTER button to pop up "Input your Password Please".
- Use the Number buttons (0~9) to enter an omnipotence Password.
- Press ENTER button to confirm and your can select "CHANGE PASSWORD".
- Suggest: Change to your familiar Password again.
Software upgrade
- Connect the RS-232C input jack to an external control device (such as a computer) and software upgrade.
Type of connector; D-Sub 9-pin male 1

No. Pin name
5
1 No connection
2 RXD (Receive data)
3 TXD (Transmit data)
4 DTR (DTE side ready)
5 GND
6 DSR (DCE side ready) 9
7 RTS (Ready to send)
8 CTS (Clear to send) 6
9 No Connection
RS-232C configurations
7-wire configuration 3-wire configuration

(Standard RS-232C cable) (Not standard)
PC PDP PC PDP
RXD 2 2 TXD RXD 2 2 TXD

TXD 3 3 RXD TXD 3 3 RXD
GND 5 5 GND GND 5 5 GND
DTR 4 6 DSR DTR 4 4 DTR
DSR 6 4 DTR DSR 6 6 DSR
RTS 7 8 CTS RTS 7 7 RTS
CTS 8 7 RTS CTS 8 8 CTS
D-Sub 9 D-Sub 9 D-Sub 9 D-Sub 9
105/106
74／75
Software upgrade Process
- Power Switch OFF.

- Connect the serial port of the control device to the RS-232 jack on the LCD-TV back panel.
RS-232C connection cables are not supplied with the LCD-TV.
- Power Switch ON. The power indicator on the front of the panel should now display red, means
that the LCD-TV is in standby mode.
- Copy the software (MTKTOOL) to the computer.
- Open the software (MTKTOOL.EXE)
- Select MTK 8205 and Point "browse" on the interface of the MTKTOOL.exe.
- Select the file which will be update.
- Point "update" on the interface of the MTKTOOL.exe.
- Waiting for the upgrader programing, when it is finished, the bar will display 100%.
- After the upgrader is finished, shut down the power switch, take out the RS-232C connection
after the power indicator is extinguished.
Note: After upgrading, the first time of power on will be some long.
１０６／１０６

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SERVICE MANUAL

The l ig h tn i ng fla sh w i th arro wh e ad symb ol ,

The excla mati on po i nt wi thi n a n e q ui l ate ra l

PRECAUTIONS DURING SERVICING WARNING:

Goo d ea rth grou nd Pl ace this pro be

1.1 VIDEO SECTION CHIMEI V320B1-L01

Display size 32”/16:9

Stereo Decode MTS with SAP

1.6 Support the Signal Mode

1024 x 768 48.40 60.00

1.7 HDTV Mode (YPbPr)

720p(1280x720) 45.00 60.00

1080i(1920x1080) 33.75 60.00

Power ( ): Press to turn on and off.

(Continued on next page)

(Continued on next page)

Note: Press Ch / on the remote

1. Power supply TV AC 100-240, 50/ 60Hz

4. Intermediate Picture 45.75MHz

Attachment 1：Electrical & Optical Specification

7 AGC static characteristic Accept. Picture/Sound repr. 90 ≥90 dBuV

15 Color White XW Full Pattern 0.295 0.295±0.02

22 Max Audio Output Power 7×2 ≥5.0×2 W

23 Audio output power 1KHz 10% THD 6×2 ≥4.0×2 W

32 Video input level 1.0 1±0.3 Vpp

FB6 8x1 W/HOUSING

120R 12x1 W/HOUSING R.A SIP6\2.54

120R 10x1 W/HOUSING R.A. 8 3

ˋ Size Document Number Rev

FB3 FB4 3 AV_L

ˋ Size Document Number Rev

Back Light circuit BL_ON/OFF

FROM Tuner C20

EEPROM 24C02 GND

Modified by MICO. R54 15K

VGASDA R59 33 VGA_SDA DIODE SMD

C85 C86 C87 C88 C89 C90 C91 C92

C98 C99 C100 C217 C218 + CE12 SOT223 220uF/16v

0.1uF 3300pF 3300pF 0.1uF 0.1uF 220uF/16v

MT8203 ANALOG&DIGITAL DECOUPLING R79

3 2 + CE17 4.7uF 0.1uF

0.1uF SOT223 0.1uF GND ANALOGVDD

GND AV33 C128 C129

0.1uF 70R C133 C134

75R C139 VPLLVDD

0603 4.7uF DV18A PWM2VREF R85

R88 R89 R90 R91 R92

HWSDA R94 R/NC SDA

Power ON alive source

MT8203E (PBGA388) LCDTV BOARD 4 LAYERS

01.INDEX & POWER CONNECTOR

03.MT8203 PBGA 388

06.VGA IN & PC AUDIO IN 1

09.LVDS/CRT/BACK LIGHT CONTROL

10.AUDIO WM8776/ KEYPAD

Modify I2C by Zheng.Guo. 16/8

0603 120R CODHPOUTR 10uF/25V R115 220uF/16v R116

KEYPAD - MAX 8-KEYS

OBO6 R124 4.7K 1 Q4 13x1 W/HOUSING

ˋ Size Document Number Rev

ˋ Size Document Number Rev

ˋ 100K 1n 1n Title

_General Description ______________Features