Irfp 460
Irfp 460
Irfp 460
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
• Dynamic dV/dt Rating
VDS (V) 500
RDS(on) (Ω) VGS = 10 V 0.27 • Repetitive Avalanche Rated Available
ORDERING INFORMATION
Package TO-247
IRFP460PbF
Lead (Pb)-free
SiHFP460-E3
IRFP460
SnPb
SiHFP460
- 5.0 -
6 mm (0.25") from
package and center of G
nH
Internal Source Inductance LS die contact - 13 -
S
VGS
Top 15 V
10 V
8.0 V
7.0 V
6.0 V
150 °C
5.5 V
5.0 V
Bottom 4.5 V
101
101
25 °C
4.5 V
91237_01 VDS, Drain-to-Source Voltage (V) 91237_03 VGS, Gate-to-Source Voltage (V)
3.5
RDS(on), Drain-to-Source On Resistance
VGS ID = 20 A
Top 15 V VGS = 10 V
10 V 3.0
8.0 V
ID, Drain Current (A)
7.0 V 2.5
6.0 V
(Normalized)
5.5 V 4.5 V
101 2.0
5.0 V
Bottom 4.5 V
1.5
1.0
0.5
20 µs Pulse Width
TC = 150 °C
100 0.0
100 101 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160
91237_02 VDS, Drain-to-Source Voltage (V) 91237_04 TJ, Junction Temperature (°C)
Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 4 - Normalized On-Resistance vs. Temperature
10 000 102
VGS = 0 V, f = 1 MHz
6000
Ciss
4000 150 °C
Coss 25 °C
2000
Crss VGS = 0 V
0 101
100 101 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
91237_05 VDS, Drain-to-Source Voltage (V) 91237_07 VSD, Source-to-Drain Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage
20 103
ID = 20 A Operation in this area limited
VGS, Gate-to-Source Voltage (V)
5
VDS = 400 V by RDS(on)
16 2
ID, Drain Current (A)
VDS = 250 V
102
12 5 10 µs
VDS = 100 V
2
8 100 µs
10
5
4 1 ms
TC = 25 °C
For test circuit 2 TJ = 150 °C
Single Pulse 10 ms
see figure 13
0 1 2 5 2 5 2 5
0 40 80 120 160 200 1 10 102 103
91237_06 QG, Total Gate Charge (nC) 91237_08 VDS, Drain-to-Source Voltage (V)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area
RD
VDS
VGS
D.U.T.
20 RG
+
- VDD
16 10 V
ID, Drain Current (A)
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
12
Fig. 10a - Switching Time Test Circuit
8
VDS
4 90 %
0
25 50 75 100 125 150
10 %
91237_09 TC, Case Temperature (°C)
VGS
td(on) tr td(off) tf
Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms
1
Thermal Response (ZthJC)
0 - 0.5
0.1 0.2
0.1
0.05 PDM
0.02 Single Pulse
0.01 (Thermal Response)
10-2 t1
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
10-3
10-5 10-4 10-3 10-2 0.1 1 10
L
VDS VDS
Vary tp to obtain
tp
required IAS
VDD
RG D.U.T +
V DD
- VDS
IAS A
10 V
tp 0.01 Ω
IAS
Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms
2400
ID
Top 8.9 A
1200
800
400
VDD = 50 V
0
25 50 75 100 125 150
QG
10 V
QGS QGD
VG
Charge
Current regulator
Same type as D.U.T.
50 kΩ
12 V 0.2 µF
0.3 µF
+
VDS
D.U.T. -
VGS
3 mA
IG ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
- +
-
RG • dV/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by duty factor "D"
• D.U.T. - device under test
VGS = 10 V*
Reverse
recovery Body diode forward
current current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
VDD
Re-applied
voltage Body diode forward drop
Inductor current
Ripple ≤ 5 % ISD
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91237.
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