LAPTOP POWER

Sequence

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 Laptop Voltage requirement

Supply requirement on motherboard

ADOPTER INPUT VOLT 18V
CPU 1V or 0.8v,1.05v(30amp)
MCH 1.05v or 1.5v,1.8v
ICH 1.05 or 1.5v,1.8,3.3v,5v
DDR 2 1.8v,3.3v,0.9v
Vin SIO(KBC) 3.3v
Clock chip 3.3v
BIOS 3.3v
Network chip 3.3v
Audio chip 3.3v
Batary Charging Voltage 10.8v Audio amp 5v
Temp. sensor 3.3v
Card reader 3.3v
LCD supply 3.3v
Hard disk 5.0v
DVD writer 5.0v
USB 5.0
 Volt In
section

18volt adopter or
battery supply
DCBAT B++

BEFORE POWER ON

LED
INVERTER STEP RUN VOLTAGE GFX CPU
STEP DOWN 2 CORE VOLT CORE VOLT
DOWN 1

3.3VSUS 5VSUS
1 TO 1.2VOLT
3.3VOLT 5VOLT 1.8V 1.5V 1.05v 1VOLT APPROX
APPROX
30AMP

Always voltage
 Laptop power sequence

Always voltage HDD

5v MOSFET

Step DVDW
Down 1
5v suspend voltage
ICH
3.3v AMP

BATT USB
SIO

BIOS MOSFET
VOLT IN

NETWORK LCD VDD AC97 AUDIOCON

Suspend volt

1.05v 3.3volt suspend voltage

230volt
input

AC
Step MCH ICH
Down 2
Adopter
1.8v
0.9v
DDR2

CPU CORE volt

(VRM)
CPU
vcccore

inverter
 CORE i3 Laptop power sequence

Always voltage HDD

5v MOSFET

Step DVDW
Down 1
5v suspend voltage

3.3v AMP

BATT USB
SIO

BIOS MOSFET
VOLT IN

NETWORK LCD VDD AC97 AUDIOCON

Suspend volt

1.8V 3.3volt suspend voltage

230volt
input 1.05v

AC
Step PCH
Down 2
Adopter
1.5v
0.75v
DDR3

CPU Core
CPU CORE volt
CPU
(VRM)
GFX Core volt
LED
BACKLIGHT
Normal resistance ON coil without CPU & RAM

Above 100 ohm

Battery Charging CPU Core
Vin voltage
supply
Above 100 ohm

GFX core
Above
100 ohm
3.3volt
1.5volt

Above
100 ohm
1.05volt

Above 15 ohm

Above
5volt 100 ohm 1.8volt

6
 LAPTOP CHIPS VOLTAGES
CPU 2.5V (VDD)
3.3V
VCORE (1V Aprox
1.25V (VTT )
DDR 1 LAN 5V HDD
30Amp current)
3.3V (SPD) 3.3V
1.05VCCP

Vtt CPU
1.8V (VDD)
BIOS FAN
DDR 2 5V
0.9V (VTT DDR) 3.3V
1.05VCCP or 1.5v 3.3V (SPD)
MCH
1.8V North
1.5V (VDD) 5V USB 5V
bridge
3.3V
0.75V (VTT ) DDR 3 AUDIO
3.3V
3.3V (SPD)

CARD
1.35V (VDD) 3.3V
READER THERMAL
RTC 0.65V (VTT ) DDR 3L 3.3V
1.05VCCP 3.3V (SPD)
ICH
3.3V
South V IN
LCD/ DVD
3.3V CLOCK 5V
5V
bridge 3.3V LED

CORE i3,i5,i7
GFXCORE1.1V 3.3V
VCORE
GPU 1.05V
1.8V GFX Core i3 PCH
3.3V SIO GFXCORE
1.8V
(KBC) CHIP CPU
1.5 V 1.05VCCP RTC

1.5V 1.5V

7
 CORE I CPU 1st Generation
CPUCORE 1.5volt

GFXCORE 1.05volt

CORE I CPU 2nd & 3rd Generation

CPUCORE 1.5volt

GFXCORE
1.05volt

CORE I CPU 4th & 5th Generation

CPUCORE 1.35volt
GFXCORE
3.3volt 1.05volt
 MOSFET

Drain

N-Channel
Gate
Source

Drain
P-Channel
Gate
Source
1,2
D1

D1
G1
8 1 G1
S1,D2
S1 S1,D2
5
D2
6 G2
G2 7
3 2 S2

S2
4
 Pulse Width Modulator
18 volt
5v DC

Switching AC voltage
Smooth DC voltage

18 volt DC
5 volt DC

A
B 18volt

PWM 5volt
Pulse-width modulation control works by
switching the power supplied on and off
very rapidly. The DC voltage is converted to a
square-wave signal.
A

B
Sample pulse width modulator

+ve

enable
Output DC

PWM
Power good

-ve

feedback
Components in power unit
capacitor

coil

Mosfet

Diode
 Adopter Input
230volt AC

Batary
Chip manufacturer
Charging v ISL
MAXIM
TI
RICHTEK
Adapter Battery

18 volt DC 10.8volt DC

Volt in output

VIN
B++
 Voltage input and battery charging section VIN(DCBATB++)
Output

CURRENT SENSE RESISTER

18V DC 1 2 5
Adopter
MOSFET MOSFET MOSFET
Dc input

Ac ok CSSP CSSN
Dc Power for chip MOSFET
3 Battery
AC in

PWM
CELLS

V in
ACPRESENT(AC OK) power MOSFET
4
CHGLED 10.8vDC

CONTROL CIRCUIT

LI-ION CELLS
SMD
SIO SM BUS Bat
drv
AC IN SMC

Batt
BATLOW
SMDATA

SMCLOCK SM BUS

TEMP

PCH

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 Voltage input and battery charging section
VIN(DCBATB++)
Output

18V DC 1 2 5
Adopter
MOSFET MOSFET MOSFET
Dc input

Ac ok CSSP CSSN
Dc Power for chip MOSFET
3 Battery
AC in
CELLS

V in
ACPRESENT(AC OK) power MOSFET
4
CHGLED 10.8vDC

CONTROL CIRCUIT

LI-ION CELLS
SMD
SIO SM BUS Bat
drv
AC IN SMC

Batt
BATLOW
SMDATA

SMCLOCK SM BUS

TEMP

PCH

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 Not powering on
VIN(DCBATB++) battery
Output
18V DC 1 2 5
Adopter
MOSFET MOSFET MOSFET
Dc input

Batt. drv
Ac ok CSSP CSSN

Not working on adopter

Dc Power for chip MOSFET
3 Battery
AC in

V in
ACPRESENT(AC OK) power MOSFET
4
CHGLED 10.8vDC

CONTROL CIRCUIT

LI-ION CELLS
SMD
SIO SMC
Bat
drv

Batt

BATLOW
SMDATA

SMCLOCK SMBUS

TEMP

Battery not detecting

ICH Communication between sio & battery Battery not charging

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adopter

battery
Some sample chip
 Up to C2D CPU
3volt VCC 1
(cpu)
32.7KHZ
BIOS VR_ON (B

PWR_ON ( main_on, Run on)

KBC_PWRBTN SIO
3
2 6 SUSp_ON

4 5

PM_PWRBTN

PM_SLP_S3

PM_SLP_S4
3 VOLT VCC
RSMRST

susb

susc
RSMRST

PWRBTN

ICH PM_PWRBTN

SLP_S3

SLP_S4

POWER ON BUTTON SEQ.

 STEP 2 TURN ON
CPU CORE ON
SLP_S4
SIO RSMRST

POWER BUTTON

ADOPTAR PRESENT

POWER BUTTON
TO PCH
SUSPEND ON
 3volt VCC
32.7KHZ
Pin No 8 1
EC BIOS

VR_ON (cpu)

7 PWR_ON (Bridge, Ram supply)

2 KBC_PWRBTN Main on(sys on)
SIO
SUSP_ON
4 3
RSMRST

PM_PWRBTN
5 6

PM_SLP_S3

PM_SLP_S4
susb

susc

PCH

POWER ON BUTTON SEQ.

Core i3 power sequence
S
W

1 S
W

R304 Y1

C345 R491
R490
R503

SIO
EC R105

ITE-8518 PCH
9
SUS_ON

RUN_ON
10 1
EC_PWROK 13
HWPG
3
VR_ON
12 11
 Step down 1 voltage(always voltage)

V+ vin
18
v
LD05
LD03(VREG3) (VREG5)
3v Linear 5v Linear
regulator regulator
18v 18v
Vcc 5V

MOSFET
UG
vcc UG
MOSFET 5VALW
3VALW
3.3v 5v
3volt Osc Osc
LG PWM PWM LG
MOSFET MOSFET
BIOS

5 on
3 On

SIO PG signal

Enable
 Step down 1 voltage(always voltage)

V+ vin
18
v
LD05
3volt LD03(VREG3) (VREG5)
3v Linear 5v Linear
regulator regulator
SIO 18v
Vcc 5V

susp
vcc
susp

MOSFET MOSFET
UG UG
3VS 3VALW 5VALW 5VS
MOSFET 3.3v 5v MOSFET
Osc Osc
LG PWM PWM LG
MOSFET MOSFET

5 on
3 On

PG signal
VIN VOLTAGE Linear output
 Step down 1 voltage(always voltage)

V+ in

3v Out 5v Out LD05

LD03

Vcc

vcc 3VALW
5VALW
5v 3v
Osc Osc
PWM PWM

5 on
3 On

Microcontroller
PG signal

Enable
 Step down 2
1.8V & 1.05v voltage
V+ in

1.8 VOLT
OR
1.5 VOLT
0R
ENABLE
1.05v 1.05V0LT
SIO
osc
Power Good
 RAM VTT Voltage
1.8V OR 1.5V 0.9V or 0.75

VTT Enable
 CPU Core voltage
5Volt

V IN
1v 30Amp

VR_ON PWM

SIO
CPU VCORE
CPU
CPU
VRM PWRGD VRM V IN
V IN

PWM

CLK ENABLE

VID signal
Core i3 VRM section 1 Vin voltage

5volt
VCC

2
3 CPU core
From SIO 1 v to 1.5v
VR_ON

6 VRM 5
Clock enable Core v
To SIO 4

VRM
6 power good Core i3
CPU
VID signal from CPU

GFX Core

GND

32
 Power Block Diagram
230v AC
CPU Core 0.8v or 1v VCORE
volt
Battery Adopter
17
18
1

Volt In 0.9v
Step down
2
1.8v 14
1.05v
SM BUS

CHG_ENABLE

2 15

MOSFET 3.3vSUS

On\off
VR_ON 16
12
switch 5vSUS
SYS_ON 13 MOSFET
Enable

8 SUSP 11

(SIO) 4 SLP_S5 Step 3.3VALWS

down 5
Enab VRMPWRGD
1 5VALWS
PG OK

sig
KBC
32.7khz crystal

ICH
6 3
3VL
3v supply
RSMRST 7
PG 9 PWRBTN
PWRBTN
signal
SLP3,SLP4,
10
3 volt
19 EC_PWRGD(PWRGD)
 SUS_PWRGD Power Block Diagram
MAIN_PWRGD 230v AC
GFX_PWRGD
CPU Core 0.8v or 1v VCORE
volt
Adopter 18
Battery

1
GFX 15
Volt In
1.8v
Step down
13
SM BUS

CHG_ENABLE

2 1.05v
0.9v
ACIN

2 15

MOSFET 3.3vSUS
VR_ON 17

GFX_ON 14 11
16 5vSUS
12
SYS_on(Runon)
MOSFET
Enable

HWPG
SUSP 10

SIO Step 3.3VALWS

19 VRMPWRGD
down
Enab 5 5VALWS
KBCsig
32.7khz crystal

1
SLP_S5 4

ICH
3
3v supply
RSMRST 6
On\off
PG 8 PM_PWRBTN
PWRBTN
switch signal
9 SLP3,SLP4,
3 volt
7
20 ECPWROK(PWR_GD)
battery

Li-ion 3.6V 4500 Times charge/discharge

3.6v 3.6v 3.6v

2Amp

2Amp
3.6v 3.6v 3.6v

10.8volt 4amp
Battery connector

1 2 3456

Pin Signal Description Type

1 GND Ground

2 Temp Temperature monitor I

3 Clock SM Bus I/O
4 Data SM Bus I/O
5 NC No Connection
6 BAT_S Positive voltage power
In side the battery
clock
SM Bus
data
Interface
Temp sense

Dis-charging

Battery +ve
Sense &
control
-ve
charging

Battery
connector

Li-ion cell
 Laptop Power
ALWAYS ON SUS_POWER POWER ON VRON

5V_AUX 5V

ICH ICH FAN

USB HDD
DVDW AUDIO
AC
ADOPTER
V IN 3.3V_AUX 3.3V

BATTARY ICH ICH BIOS CLOCK

LAN LCD
THERMAL HDD
DDR2
1.8V
3.3V_ALWS
0.9V
MICOM
DDR2 VTT
5V_ALWS

1.05V
ICH MCH

CPU CORE

S4 / S5 S3 S0
 POWER RAIL

INPUT SUPPPLY VIN

BATT 0r ADOPT B+
Linear output 3VL
pwm always voltage out 5VALW/3VALW
RSMRST from kcb to ich RSMRST

user press on button ON/OFF

pwrbtn signal to ich PWRBTN

ich to SIO SLP_S5

ich to SIO SLP_S4
SIO to power SYSON
1.8V
ich to SIO SLP_S3
kbc to power SUSP
5VS/3VS/1.05VS
kbc to power VR_ON
CPU_CORE
VRM Chip to KBC VRMPWRGD

KBC TO ICH CLPWROK) M_PWROK

Clock reset CL_RST
Clock power good CL_PWRGD
KBC TO MCH PM_PWROK
ICH TO CPU H_PWRGOOD
ich to mch PLT_RST (PCI_RST)
mch to cpu RESET
 On/off
SW
POWER ON AND RESET SEQUENCE

18v adopter 10.8 Battary

Input Input 8
ON/OFF SLP4
SW 10
SLP3
Clock start

ACIN
PM_PWRBTN Clock 20
V In 9
CPU 23
SIO RSMRST
19
CORE_V
17 CPU_PWRGD
16 7

CK_PWRGD
HWPG 15 22 M_PWRGD

CPU Reset
1 SYS_ON (MAIN ON) 13
ECPWORK 25
21

CPU_PWRGD
RST KBC_RST
CKT PLTRST
3
VRMPWRGD
MCH
KBC_3D3_ALWS

6
(VGATE)
SUSON North Bridge
BIOS
PWRGD
SLP_S5

2 11
RSTIN CL_RST

4
Step 6 24
down 12 PLTRST
3.3v_ALWS 3.3V_SUSP
1 5 CL_RST
5V_ALWS 5v_SUSP CLK_PWRGD

SLP4/ 5
1.8v SLP3
Step To DDR
Down 0.9v 14
PWROK
15
2 1.05V 7 RSMRST
PWROK
ICH 23
South Bridge
3.3V

VR_ON 1.05V
CPU 17 CPU_CORE
Core
VRMPWRGD 18
VRMPWRGD
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WIFI Card Test Point

CLJ 33MHZ
11

16
22
PLTRST
SM BUS
30,32
CPU RESET
R322

SIO CPU
R313

R605

ECPWROK PCH
ADOPTER Battery
ALWS PWRGD
CLOCK
MAIN PWRGD
SUS PWRGD HWPG

PWRBTN 18
ACIN
13

DRAM PWRGD
3

CPU PWRGD
Slp _S5

PLTRST
Step
down 3.3VAL 2 ECPWORK 19 22 21 20
1 1 EC BIOS
SUSB, SLP_S3
5V SUSC, SLP_S4 8 PCH
4 PM_PWRBTN 7
SUS ON

MOSFET
RSMRST
6
3.3V
MOSFET
5V 5
9 MAINON
Step
Down
10 1.05V(PCH, CPU)
2 1.5V(DDR3)
1.8V
14
11 GFX ON
VR_PWRGD

GFX
CORE 12 GFXCORE V BIOS
VR_ON
CS
23
CPUCORE V
CPU 15 16 CLOCK
Core 17
CK_PWRGD
CHIP
ADOPTER Battery
ALWS PWRGD
CLOCK
MAIN PWRGD
SUS PWRGD HWPG

PWRBTN
ACIN
13

DRAM PWRGD
3

CPU PWRGD
SLP _S5

PLTRST
Step
down 3.3VAL 2 ECPWORK 19
22 21 20
1 1
SUSB, SLP_S3

5V SUSC, SLP_S4 8 PCH

4 PM_PWRBTN 7
SUS ON

MOSFET
RSMRST
6
3.3V
MOSFET 5
9 MAINON
Step 1.05V(PCH, CPU)
Down
2 10 1.5V(DDR3)
GFX ON 14
11 16
VR_PWRGD

GFX GFXCORE V
CORE 12
VR_ON
CPUCORE V
CPU
15
Core
17
CK_PWRGD 47
from
COMPAL 4TH GEN. CPU POWER ON SEQ.
Adopter present
ACIN
3volt linear
+3VLP
SIO turn on
EC_ON

3VALW 3.3volt

5volt
5VALW
Always voltage power good to SIO
SPOK
1volt
1VALW
1.8volt
1.8VALW

ON\OFF BTN POWER BTN

SIO RSMRST Resume & Reset siganl

Power button out from SIO to PCH

PBTN_OUT

Power on s4 state from PCH to SIO

CPU SLP_S4

CPU SLP_S3 Power on s4 state from PCH to SIO

System on signal from SIO

SYSON
1.35V 1.35 volt
 DDR_PWROK
Core volt turn on
VR_ON

+SOC_VCC

+SOC_VNN

VGATE
Suspend voltage enable
SUSP#

+1.0VS

+1.05VS

+1.35VS

+1.5VS
+1.8VS

+3VS

+5VS

KBRST#

PMC_CORE_PWROK
DDR POWER OK
DDR_CORE_PWROK

PLTRST# Platform Reset

 14.3MHZ CRYSTAL
Volt IN
Charging Temp
sensor

CPU SENSE

230v AC CPU
Clock
1v
CPU CORE

CPU_Reset
V

5 VOLT
STEP
DOWN VOLT Analog
3.3 VOLT RGB o/p

3.3V MCH
1.05v
Step down 2
1.8v

Reset m/b 3.3v Cmos

PLT_Reset
Bat

32.7khz crystal
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Mumbai
Help Line 7666766623

reset
ICH
PG Signal

CPU
FAN

AMP

camera Network
BIOS USB