Sboa 290 CSHXGHDCXCFXDDCG
Sboa 290 CSHXGHDCXCFXDDCG
Sboa 290 CSHXGHDCXCFXDDCG
Design Goals
Input Pressure (Max) Output Voltage (Max) Supply Frequency Response Deviation
Vcc Vee @20Hz @20kHz
100dB SPL (2 Pa) 1.228Vrms
5V 0V –0.5dB –0.1dB
Design Description
This circuit uses a non–inverting amplifier circuit configuration to amplify the microphone output signal.
This circuit has very good magnitude flatness and exhibits minor frequency response deviations over the
audio frequency range. The circuit is designed to be operated from a single 5V supply.
VCC VCC
VCC
R1 5.9k
V3 5
R2 200k
VCC
C1 330n
+ + C4 3.3u Vout
R3 200k
R6 10k
U1 TLV6741
Out
Gnd R5 10k
+
Vin
Electret_Mic
C3 120p
C2 47u R4 787
Design Notes
1. Operate within the op amp linear output operating range, which is usually specified under the AOL test
conditions.
2. Use low–K capacitors (tantalum, C0G, and so forth) and thin film resistors help to decrease distortion.
3. Use a battery to power this circuit to eliminate distortion caused by switching power supplies.
4. Use low value resistors and low noise op amps for low noise designs.
5. The common mode voltage is equal to the DC bias voltage set using the resistor divider plus any
variation caused by the microphone output voltage. For op amps with a complementary pair input
stage it is recommended to keep the common mode voltage away from the cross over region to
eliminate the possibility of cross over distortion.
6. Resistor R1 is used to bias the microphone internal JFET transistor to achieve the bias current
specified by the microphone.
7. The equivalent input resistance is determined by R1, R2, R3. Use large value resistors for R2 and R3 to
increase the input resistance.
8. The voltage connected to R1 to bias the microphone does not have to be the same as the op amp
supply voltage. Using a higher voltage supply for the microphone bias allows for a lower bias resistor
value.
Design Steps
This design procedure uses the microphone specifications provided in the following table.
4. Calculate bias resistor. In the following equation, Vmic is microphone standard operating voltage.
5. Set the amplifier input common mode voltage to mid–supply voltage. The equivalent resistance of R2 in
parallel with R3 should be 10 times larger than R1 so that a majority of the microphone current flows
through R1.
8. Calculate R4 to set the gain calculated in step 7. Select feedback resistor R5 as 10kΩ.
9. Calculate the corner frequency at low frequency according to the allowed deviation at 20 Hz. In the
following equation, G_pole1 is the gain contributed by each pole at frequency “f”. Note that you divide
by three because there are three poles.
12. Calculate the high frequency pole according to the allowed deviation at 20 kHz. In the following
equation, G_pole2 is the gain contributed by each pole at frequency “f”.
13. Calculate C3 to set the cut off frequency calculated in step 12.
14. Calculate the output capacitor, C4, based on the cut off frequency calculated in step 9. Assume the
output load R6 is 10kΩ.
Design Simulations
AC Simulation Results
T -4.19
-4.32dB @ 20kHz
-0.13dB deviation
-4.85dB @ 20Hz
Gain (dB)
-0.66dB deviation
-5.42
-6.65
10 100 1k 10k 100k
Frequency (Hz)
T 2.83
Vin
-2.83
1.76
Vout
-1.73
5.00m 6.00m 7.00m 8.00m 9.00m 10.00m
Time (s)
T 43.30u
Total noise (V)
22.39uVrms @ 22kHz
21.65u
0.00
1 10 100 1k 10k 100k
Frequency (Hz)
References:
1. Analog Engineer's Circuit Cookbooks
2. SPICE Simulation File SBOC525
3. TI Precision Designs TIPD181
4. TI Precision Labs
Design Featured Op Amp
TLV6741
Vss 1.8V to 5.5V
VinCM (Vee ) to (Vcc –1.2V)
Vout Rail–to–rail
Vos 150µV
Iq 890uA/Ch
Ib 10pA
UGBW 10MHz
SR 4.75V/µs
#Channels 1
www.ti.com/product/tlv6741
OPA320
Vss 1.8V to 5.5V
VinCM Rail–to–rail
Vout Rail–to–rail
Vos 40µV
Iq 1.5mA/Ch
Ib 0.2pA
UGBW 20MHz
SR 10V/µs
#Channels 1, 2
www.ti.com/product/opa320
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