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    DLD Questions

    Uploaded by

    Usama Faisal
    This document contains questions related to digital logic design topics including: - 3 to 8 line decoder operation using logic diagram and truth table - JK flip-flop operation including characteristic equation and how it refines the RS flip-flop - 4 to 1 line multiplexer operation using logic diagram and function table - Shift register function and operation using block diagram and timing diagram - 4 bit binary to BCD code converter design - SR flip-flop conversion to JK flip-flop - Converting decimal numbers to BCD, excess-3, and gray codes - Design of combinational circuits for 2's complement and binary to square output - Design of full-adder using half-adders

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    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd

    DLD Questions

    Uploaded by

    Usama Faisal
    824 views2 pages
    This document contains questions related to digital logic design topics including: - 3 to 8 line decoder operation using logic diagram and truth table - JK flip-flop operation including characteristic equation and how it refines the RS flip-flop - 4 to 1 line multiplexer operation using logic diagram and function table - Shift register function and operation using block diagram and timing diagram - 4 bit binary to BCD code converter design - SR flip-flop conversion to JK flip-flop - Converting decimal numbers to BCD, excess-3, and gray codes - Design of combinational circuits for 2's complement and binary to square output - Design of full-adder using half-adders

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    dld questions

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    This document contains questions related to digital logic design topics including: - 3 to 8 line decoder operation using logic diagram and truth table - JK flip-flop operation including characteristic equation and how it refines the RS flip-flop - 4 to 1 line multiplexer operation using logic diagram and function table - Shift register function and operation using block diagram and timing diagram - 4 bit binary to BCD code converter design - SR flip-flop conversion to JK flip-flop - Converting decimal numbers to BCD, excess-3, and gray codes - Design of combinational circuits for 2's complement and binary to square output - Design of full-adder using half-adders

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    824 views2 pages

    DLD Questions

    Uploaded by

    Usama Faisal
    This document contains questions related to digital logic design topics including: - 3 to 8 line decoder operation using logic diagram and truth table - JK flip-flop operation including characteristic equation and how it refines the RS flip-flop - 4 to 1 line multiplexer operation using logic diagram and function table - Shift register function and operation using block diagram and timing diagram - 4 bit binary to BCD code converter design - SR flip-flop conversion to JK flip-flop - Converting decimal numbers to BCD, excess-3, and gray codes - Design of combinational circuits for 2's complement and binary to square output - Design of full-adder using half-adders

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    of 2

    DLD QUESTIONS:

    (a) With logic diagram and truth table explain the working of 3 to 8 line decoder. 07
    (b) With logic diagram and truth table explain the working JK Flipflop.Also obtain its
    characteristic equation. How JK flip-flop is the refinement of RS flip-flop?

    1. With logic diagram and function table explain the operation of 4 to 1 line
    multiplexer.
    2.What is the function of shift register? With the help of simple diagram explain its
    working. With block diagram and timing diagram explain the serial transfer of
    information from register A to register B.
    Design a 4 bit binary to BCD code converter
    Design a full adder circuit using decoder and multiplexer
    Convert SR flip-flop into JK flip-flop
    convert decimal 8620 into BCD, excess-3 code and Gray code.
    Design a combinational circuit whose input is four bit binary number and
    output is the 2’s complement of the input binary number.

    Design a full-adder with two half-adders and an OR gate


    Design a BCD to decimal decoder

    What is multiplexer? Implement the following function with a multiplexer:


    F(A,B,C,D) = Σ(0 , 1 , 3 , 4 , 8 , 9 ,15 )

    Design the Combinational Circuits for Binary to Gray Code Conversion.

    Construct 4*16 Decoder with help of 2*4 Decoder.

    Explain Master Slave Flip Flop through J.K Flip Flop

    Design Sequential Circuit with J.K. Flip Flops to satisfy the following state
    equation.
    A( t + 1 ) =A′ B′ CD + A′ B′ C + ACD +AC′ D′
    B(t+1)= A′ C + CD′ + A′ BC′
    C(t + 1) = B
    D(t +1)=D′

    Explain 4 bit Magnitude Comparator

    Explain 4bit binary ripple counter.


    Design a combinational circuit that accepts a three bit binary
    number and generates an output binary number equal to the square
    of the input number.

    Design a combinational circuit that generates the 9′ complement of a


    BCD digit,

    Represent the decimal number 8620 in BCD , Excess-3 , and Gray code

    Design BCD to Excess-3 code converter using minimum number (08)


    of NAND gates

    Construct 4x16 decoder with two 3x8 decoders.

    Design and implement BCD to excess 3 code converter.

    Design a sequential with JK flip-flops to satisfy the following state equations:


    A(t+1) =AˊBˊCD+AˊBˊC+ACD+ACˊDˊ
    B(t+1) = AˊC +CDˊ+AˊBCˊ
    C(t+1) = B
    D(t+1) = Dˊ

    Design a sequential circuit using JK Flip-Flops and two states Q0 and Q1 such
    that ,
    1. It moves to the next state for input 0. (00 to 01, 01 to 10,…, 11 to 00)
    2. It moves to the previous state for input 1. (reverse from the above mentioned
    steps)

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