Low Distortion, 1.5 W Audio Power Amplifier: Data Sheet
Low Distortion, 1.5 W Audio Power Amplifier: Data Sheet
Low Distortion, 1.5 W Audio Power Amplifier: Data Sheet
5 W Audio
Power Amplifier
Data Sheet SSM2211
FEATURES FUNCTIONAL BLOCK DIAGRAM
1.5 W output with THD + N < 1%
Differential bridge-tied load output
Single-supply operation: 2.7 V to 5.5 V IN–
VOUTA
Functions down to 1.75 V IN+
Wide bandwidth: 4 MHz
Highly stable phase margin: >80°
Low distortion: 0.2% THD + N at 1 W output
Excellent power supply rejection VOUTB
BYPASS
APPLICATIONS
SHUTDOWN BIAS
Portable computers SSM2211
00358-001
Personal wireless communicators
Hands-free telephones V– (GND)
GENERAL DESCRIPTION
The SSM22111 is a high performance audio amplifier that The low differential dc output voltage results in negligible
delivers 1 W rms of low distortion audio power into a bridge- losses in the speaker winding and makes high value dc blocking
connected 8 Ω speaker load (or 1.5 W rms into a 4 Ω load). capacitors unnecessary. The battery life is extended by using
The SSM2211 operates over a wide temperature range and is shutdown mode, which typically reduces quiescent current
specified for single-supply voltages between 2.7 V and 5.5 V. drain to 100 nA.
When operating from batteries, it continues to operate down to The SSM2211 is designed to operate over the −40°C to +85°C
1.75 V. This makes the SSM2211 the best choice for unregulated temperature range. The SSM2211 is available in 8-lead SOIC
applications, such as toys and games. (narrow body) and LFCSP (lead frame chip scale) surface-
Featuring a 4 MHz bandwidth and distortion below 0.2% THD mount packages. The advanced mechanical packaging of the
+ N at 1 W, superior performance is delivered at higher power LFCSP models ensures lower chip temperature and enhanced
or lower speaker load impedance than competitive units. performance relative to standard packaging options.
Furthermore, when the ambient temperature is at 25°C, THD + Applications include personal portable computers, hands-free
N < 1%, and VS = 5 V on a four-layer PCB, the SSM2211 telephones and transceivers, talking toys, intercom systems, and
delivers a 1.5 W output. other low voltage audio systems requiring 1 W output power.
1
Protected by U.S. Patent No. 5,519,576.
TABLE OF CONTENTS
Features .............................................................................................. 1 Bridged Output vs. Single-Ended Output Configurations ... 15
Applications ....................................................................................... 1 Speaker Efficiency and Loudness ............................................. 15
Functional Block Diagram .............................................................. 1 Power Dissipation....................................................................... 16
General Description ......................................................................... 1 Output Voltage Headroom........................................................ 17
Revision History ............................................................................... 2 Automatic Shutdown-Sensing Circuit ..................................... 17
Electrical Characteristics ................................................................. 3 Shutdown-Circuit Design Example ......................................... 18
Absolute Maximum Ratings............................................................ 5 Start-Up Popping Noise............................................................. 18
Thermal Resistance ...................................................................... 5 SSM2211 Amplifier Design Example .................................. 18
ESD Caution .................................................................................. 5 Single-Ended Applications ........................................................ 19
Pin Configurations and Function Descriptions ........................... 6 Driving Two Speakers Single Endedly..................................... 19
Typical Performance Characteristics ............................................. 7 LFCSP PCB Considerations ...................................................... 20
Product Overview........................................................................... 14 Outline Dimensions ....................................................................... 21
Thermal Performance—LFCSP ................................................ 14 Ordering Guide .......................................................................... 22
Typical Applications ....................................................................... 15
REVISION HISTORY
12/13—Rev. E to Rev. F Changes to the Output Voltage Headroom Section................... 17
Changes to Table 5 ............................................................................ 5 Changes to the Start-Up Popping Noise Section........................ 18
Added Exposed Pad Notation, Pin Configurations and Function Changes to the Evaluation Board Section ................................... 20
Descriptions Section ........................................................................ 6 Updated Outline Dimensions ....................................................... 21
Deleted Evaluation Board Section ................................................ 20 Changes to Ordering Guide .......................................................... 21
Updated Outline Dimensions ....................................................... 21 10/04—Data Sheet Changed from Rev. B to Rev. C
Changes to Ordering Guide .......................................................... 22 Updated Format .................................................................. Universal
4/08—Rev. D to Rev. E Changes to General Description .....................................................1
Changes to Features.......................................................................... 1 Changes to Table 5.............................................................................4
Changes to General Description .................................................... 1 Deleted Thermal Performance—SOIC Section ...........................8
Changes to Supply Current in Table 1 and Table 2 ...................... 3 Changes to Figure 31...................................................................... 10
Changes to Supply Current in Table 3 ........................................... 4 Changes to Figure 40...................................................................... 12
Changes to Absolute Maximum Ratings ....................................... 5 Changes to Thermal Performance—LFCSP Section ................. 13
Changes to Figure 41 ...................................................................... 14 Deleted Figure 52, Renumbered Successive Figures .................. 14
Changes to Equation 7, Equation 8, and Equation 10 ............... 16 Deleted Printed Circuit Board Layout—SOIC Section ............. 14
Changes to Figure 47 ...................................................................... 17 Changes to Output Voltage Headroom Section ......................... 16
Changes to Automatic Shutdown-Sensing Circuit Section ...... 18 Changes to Start-Up Popping Noise Section .............................. 17
Changes to SSM2211Amplifier Design Example Section ......... 19 Changes to Ordering Guide .......................................................... 20
Changes to Driving Two Speakers Single Endedly Section ...... 20 10/02—Data Sheet Changed from Rev. A to Rev. B
Changes to Figure 50 ...................................................................... 20 Deleted 8-Lead PDIP ......................................................... Universal
Changes to Evaluation Board Section .......................................... 20 Updated Outline Dimensions ....................................................... 15
Changes to Figure 51 ...................................................................... 20
Changes to Ordering Guide .......................................................... 22 5/02—Data Sheet Changed from Rev. 0 to Rev. A
Rev. F | Page 2 of 24
Data Sheet SSM2211
ELECTRICAL CHARACTERISTICS
VDD = 5.0 V, TA = 25°C, RL = 8 Ω, CB = 0.1 µF, VCM = VDD/2, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
GENERAL CHARACTERISTICS
Differential Output Offset Voltage VOOS AVD = 2, −40°C ≤ TA ≤ +85°C 4 50 mV
Output Impedance ZOUT 0.1 Ω
SHUTDOWN CONTROL
Input Voltage High VIH ISY = <100 mA 3.0 V
Input Voltage Low VIL ISY = normal 1.3 V
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = 4.75 V to 5.25 V 66 dB
Supply Current ISY VOUTA = VOUTB = 2.5 V, −40°C ≤ TA ≤ +85°C 9.5 20 mA
Supply Current, Shutdown Mode ISD Pin 1 = VDD (see Figure 32), −40°C ≤ TA ≤ +85°C 0.1 1 µA
DYNAMIC PERFORMANCE
Gain Bandwidth Product GBP 4 MHz
Phase Margin ΦM 86 Degrees
AUDIO PERFORMANCE
Total Harmonic Distortion THD + N P = 0.5 W into 8 Ω, f = 1 kHz 0.15 %
Total Harmonic Distortion THD + N P = 1.0 W into 8 Ω, f = 1 kHz 0.2 %
Voltage Noise Density en f = 1 kHz 85 nV√Hz
VDD = 3.3 V, TA = 25°C, RL = 8 Ω, CB = 0.1 µF, VCM = VDD/2, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
GENERAL CHARACTERISTICS
Differential Output Offset Voltage VOOS AVD = 2, −40°C ≤ TA ≤ +85°C 5 50 mV
Output Impedance ZOUT 0.1 Ω
SHUTDOWN CONTROL
Input Voltage High VIH ISY = <100 µA 1.7 V
Input Voltage Low VIL ISY = normal 1 V
POWER SUPPLY
Supply Current ISY VOUTA = VOUTB = 1.65 V, −40°C ≤ TA ≤ +85°C 5.2 20 mA
Supply Current, Shutdown Mode ISD Pin 1 = VDD (see Figure 32), −40°C ≤ TA ≤ +85°C 0.1 1 µA
AUDIO PERFORMANCE
Total Harmonic Distortion THD + N P = 0.35 W into 8 Ω, f = 1 kHz 0.1 %
Rev. F | Page 3 of 24
SSM2211 Data Sheet
VDD = 2.7 V, TA = 25°C, RL = 8 Ω, CB = 0.1 µF, VCM = VDD/2, unless otherwise noted.
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
GENERAL CHARACTERISTICS
Differential Output Offset Voltage VOOS AVD = 2 5 50 mV
Output Impedance ZOUT 0.1 Ω
SHUTDOWN CONTROL
Input Voltage High VIH ISY = <100 mA 1.5 V
Input Voltage Low VIL ISY = normal 0.8 V
POWER SUPPLY
Supply Current ISY VOUTA = VOUTB = 1.35 V, −40°C ≤ TA ≤ +85°C 4.2 20 mA
Supply Current, Shutdown Mode ISD Pin 1 = VDD (see Figure 32), −40°C ≤ TA ≤ +85°C 0.1 1 µA
AUDIO PERFORMANCE
Total Harmonic Distortion THD + N P = 0.25 W into 8 Ω, f = 1 kHz 0.1 %
Rev. F | Page 4 of 24
Data Sheet SSM2211
Rev. F | Page 5 of 24
SSM2211 Data Sheet
00358-002
00358-003
(Not to Scale) NOTES
IN– 4 5 VOUTA 1. EXPOSED PAD. CONNECT
THE EXPOSED PAD TO V−.
Figure 2. 8-Lead SOIC_N Pin Configuration (R-8) Figure 3. 8-Lead LFCSP_VD Pin Configuration (CP-8-2)
Rev. F | Page 6 of 24
Data Sheet SSM2211
1 CB = 0 1 CB = 0
THD + N (%)
THD + N (%)
CB = 0.1µF CB = 0.1µF
CB = 1µF
0.1 0.1 CB = 1µF
00358-007
00358-004
0.01 0.01
20 100 1k 10k 20k 20 100 1k 10k 20k
FREQUENCY (Hz) FREQUENCY (Hz)
10 10
CB = 0
CB = 0
CB = 1µF
CB = 1µF
0.1 0.1
TA = 25°C TA = 25°C
VDD = 5V VDD = 5V
AVD = 10 (BTL) AVD = 10 (BTL)
RL = 8Ω RL = 8Ω
PL = 1W
00358-008
PL = 500mW
00358-005
0.01 0.01
20 100 1k 10k 20k 20 100 1k 10k 20k
FREQUENCY (Hz) FREQUENCY (Hz)
10 10
CB = 0.1µF
CB = 0.1µF
1 1
THD + N (%)
THD + N (%)
CB = 1µF
CB = 1µF
0.1 0.1
TA = 25°C TA = 25°C
VDD = 5V VDD = 5V
AVD = 20 (BTL) AVD = 20 (BTL)
RL = 8Ω RL = 8Ω
PL = 1W
00358-009
PL = 500mW
00358-006
0.01 0.01
20 100 1k 10k 20k 20 100 1k 10k 20k
FREQUENCY (Hz) FREQUENCY (Hz)
Rev. F | Page 7 of 24
SSM2211 Data Sheet
10 10
TA = 25°C TA = 25°C
VDD = 5V VDD = 3.3V
AVD = 2 (BTL) AVD = 2 (BTL)
RL = 8Ω RL = 8Ω
FREQUENCY = 20Hz PL = 350mW
CB = 0.1µF
1 CB = 0
1
THD + N (%)
THD + N (%)
CB = 0.1µF
0.1 0.1
CB = 1µF
00358-010
00358-013
0.01 0.01
20n 0.1 1 2 20 100 1k 10k 20k
POUTPUT (W)
FREQUENCY (Hz)
Figure 10. THD + N vs. POUTPUT Figure 13. THD + N vs. Frequency
10 10
TA = 25°C
VDD = 5V CB = 0
AVD = 2 (BTL)
RL = 8Ω
FREQUENCY = 1kHz
CB = 0.1µF
1 1 CB = 0.1µF
THD + N (%)
THD + N (%)
CB = 1µF
0.1 0.1
TA = 25°C
VDD = 3.3V
AVD = 10 (BTL)
RL = 8Ω
PL = 350mW
00358-011
00358-014
0.01 0.01
20n 0.1 1 2 20 100 1k 10k 20k
POUTPUT (W) FREQUENCY (Hz)
Figure 11. THD + N vs. POUTPUT Figure 14. THD + N vs. Frequency
10 10
TA = 25°C
VDD = 5V
AVD = 2 (BTL)
RL = 8Ω
FREQUENCY = 20kHz
CB = 0.1µF CB = 0.1µF
1 1
THD + N (%)
THD + N (%)
CB = 1µF
0.1 0.1
TA = 25°C
VDD = 3.3V
AVD = 20 (BTL)
RL = 8Ω
PL = 350mW
00358-012
00358-015
0.01 0.01
20n 0.1 1 2 20 100 1k 10k 20k
POUTPUT (W) FREQUENCY (Hz)
Figure 12. THD + N vs. POUTPUT Figure 15. THD + N vs. Frequency
Rev. F | Page 8 of 24
Data Sheet SSM2211
10 10
TA = 25°C TA = 25°C
VDD = 3.3V VDD = 2.7V
AVD = 2 (BTL) AVD = 2 (BTL)
RL = 8Ω RL = 8Ω
FREQUENCY = 20Hz PL = 250mW
CB = 0.1µF
1 CB = 0
1
THD + N (%)
THD + N (%)
CB = 0.1µF
0.1 0.1
CB = 1µF
00358-016
00358-019
0.01 0.01
20n 0.1 1 2 20 100 1k 10k 20k
POUTPUT (W)
FREQUENCY (Hz)
Figure 16. THD + N vs. POUTPUT Figure 19. THD + N vs. Frequency
10 10
TA = 25°C
VDD = 3.3V
AVD = 2 (BTL) CB = 0
RL = 8Ω
FREQUENCY = 1kHz
CB = 0.1µF CB = 0.1µF
1 1
THD + N (%)
THD + N (%)
CB = 1µF
0.1 0.1
TA = 25°C
VDD = 2.7V
AVD = 10 (BTL)
RL = 8Ω
00358-017
00358-020
PL = 250mW
0.01 0.01
20n 0.1 1 2 20 100 1k 10k 20k
POUTPUT (W) FREQUENCY (Hz)
Figure 17. THD + N vs. POUTPUT Figure 20. THD + N vs. Frequency
10 10
TA = 25°C
VDD = 3.3V
AVD = 2 (BTL)
RL = 8Ω
FREQUENCY = 20kHz CB = 0.1µF
CB = 0.1µF
1 1
THD + N (%)
THD + N (%)
CB = 1µF
0.1 0.1
TA = 25°C
VDD = 2.7V
AVD = 20 (BTL)
RL = 8Ω
00358-018
PL = 250mW
00358-021
0.01 0.01
20n 0.1 1 2 20 100 1k 10k 20k
POUTPUT (W) FREQUENCY (Hz)
Figure 18. THD + N vs. POUTPUT Figure 21. THD + N vs. Frequency
Rev. F | Page 9 of 24
SSM2211 Data Sheet
10 10
TA = 25°C TA = 25°C
VDD = 2.7V VDD = 5V
AVD = 2 (BTL) AVD = 10 SINGLE ENDED
RL = 8Ω CB = 0.1µF
FREQUENCY = 20Hz CC = 1000µF
1 1
THD + N (%)
THD + N (%)
RL = 8Ω
PO = 250mW
0.1 0.1
RL = 32Ω
PO = 60mW
00358-022
00358-025
0.01 0.01
20n 0.1 1 2 20 100 1k 10k 20k
POUTPUT (W) FREQUENCY (Hz)
Figure 22. THD + N vs. POUTPUT Figure 25. THD + N vs. Frequency
10 10
TA = 25°C
TA = 25°C
VDD = 2.7V
VDD = 3.3V
AVD = 2 (BTL)
AVD = 10 SINGLE ENDED
RL = 8Ω
CB = 0.1µF
FREQUENCY = 1kHz
CC = 1000µF
1 1
THD + N (%)
THD + N (%)
RL = 8Ω
PO = 85mW
0.1 0.1
RL = 32Ω
PO = 20mW
00358-023
00358-026
0.01 0.01
20n 0.1 1 2
20 100 1k 10k 20k
POUTPUT (W)
FREQUENCY (Hz)
Figure 23. THD + N vs. POUTPUT Figure 26. THD + N vs. Frequency
10 10
TA = 25°C TA = 25°C
VDD = 2.7V VDD = 2.7V
AVD = 2 (BTL) AVD = 10 SINGLE ENDED
RL = 8Ω CB = 0.1µF
FREQUENCY = 20kHz CC = 1000µF
1 1
THD + N (%)
THD + N (%)
RL = 8Ω
PO = 65mW
0.1 0.1
RL = 32Ω
00358-024
00358-027
PO = 15mW
0.01 0.01
20n 0.1 1 2 20 100 1k 10k 20k
POUTPUT (W) FREQUENCY (Hz)
Figure 24. THD + N vs. POUTPUT Figure 27. THD + N vs. Frequency
Rev. F | Page 10 of 24
Data Sheet SSM2211
10 4.0
TA = 25°C VDD = 2.7V
AVD = 2 (BTL) TJ,MAX = 150°C
RL = 8Ω FREE AIR, NO HEAT SINK
3.5
SOIC θJA = 121°C/W
2.5
VDD = 5V 2.0
VDD = 3.3V
0.1 1.5
00358-028
0.5
00358-031
0.01
20n 0.1 1 2 0
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120
POUTPUT (W)
AMBIENT TEMPERATURE (°C)
Figure 28. THD + N vs. POUTPUT Figure 31. Maximum Power Dissipation vs. Ambient Temperature
10 10k
TA = 25°C
VDD = 2.7V TA = 25°C
AVD = 2 (BTL)
RL = 8Ω VDD = 5V
FREQUENCY = 1kHz
CB = 0.1µF 8k
6k
4k
0.1
VDD = 5V
VDD = 3.3V
2k
00358-029
00358-032
0.01
20n 0.1 1 2 0
0 1 2 3 4 5
POUTPUT (W)
SHUTDOWN VOLTAGE AT PIN 1 (V)
Figure 29. THD + N vs. POUTPUT Figure 32. Supply Current vs. Shutdown Voltage at Pin 1
10 14
TA = 25°C
AVD = 2 (BTL) VDD = 3.3V
RL = 8Ω TA = 25°C
12 RL = OPEN
FREQUENCY = 20kHz
CB = 0.1µF
SUPPLY CURRENT (mA)
10
1
THD + N (%)
VDD = 2.7V 8
0.1
4
2
00358-030
00358-033
VDD = 5V
0.01 0
20n 0.1 1 2 0 1 2 3 4 5 6
POUTPUT (W) SUPPLY VOLTAGE (V)
Figure 30. THD + N vs. POUTPUT Figure 33. Supply Current vs. Supply Voltage
Rev. F | Page 11 of 24
SSM2211 Data Sheet
1.6 25
VDD = 2.7V
1.4 SAMPLE SIZE = 300
20
1.2
NUMBER OF UNITS
OUTPUT POWER (W)
1.0 15
0.8
10
0.6
0.4
5V 5
0.2 3.3V
00358-036
00358-034
2.7V
0 0
4 8 12 16 20 24 28 32 36 40 44 48 –20 –15 –10 –5 0 5 10 15 20 25
LOAD RESISTANCE (Ω) OUTPUT OFFSET VOLTAGE (mV)
Figure 34. POUTPUT vs. Load Resistance Figure 36. Output Offset Voltage Distribution
80 180 20
VDD = 3.3V
60 135 SAMPLE SIZE = 300
16
40 90
NUMBER OF UNITS
PHASE SHIFT (Degrees)
20 45
12
GAIN (dB)
0 0
–20 –45 8
–40 –90
4
–60 –135
00358-035
00358-037
–80 –180 0
100 1k 10k 100k 1M 10M 100M –30 –20 –10 0 10 20 30
FREQUENCY (Hz) OUTPUT OFFSET VOLTAGE (mV)
Figure 35. Gain and Phase Shift vs. Frequency (Single Amplifier) Figure 37. Output Offset Voltage Distribution
Rev. F | Page 12 of 24
Data Sheet SSM2211
20
–50
VDD
DD= =5V3.3V TA = 25°C
SAMPLE SIZE
SAMPLE SIZE =
= 300
300 VDD = 5V ± 100mV
CB = 15µF
16 AVD = 2
NUMBER OF UNITS
–55
12
PSRR (dB)
–60
8
4 –65
00358-038
00358-040
0
–30 –20 –10 0 10 20 30 –70
20 100 1k 10k 30k
OUTPUT OFFSET VOLTAGE (mV)
FREQUENCY (Hz)
Figure 38. Output Offset Voltage Distribution Figure 40. PSRR vs. Frequency
600
VDD = 5V
SAMPLE SIZE = 1,700
500
NUMBER OF UNITS
400
300
200
100
00358-039
0
6 7 8 9 10 11 12 13 14 15
SUPPLY CURRENT (mA)
Rev. F | Page 13 of 24
SSM2211 Data Sheet
PRODUCT OVERVIEW
The SSM2211 is a low distortion speaker amplifier that can run Pin 4 and Pin 3 are the inverting and noninverting terminals
from a 2.7 V to 5.5 V supply. It consists of a rail-to-rail input to A1. An offset voltage is provided at Pin 2, which should be
and a differential output that can be driven within 400 mV of connected to Pin 3 for use in single-supply applications. The
either supply rail while supplying a sustained output current of output of A1 appears at Pin 5. A second operational amplifier,
350 mA. The SSM2211 is unity-gain stable, requiring no A2, is configured with a fixed gain of AV = −1 and produces an
external compensation capacitors, and can be configured for inverted replica of Pin 5 at Pin 8. The SSM2211 outputs at Pin 5
gains of up to 40 dB. Figure 41 shows the simplified schematic. and Pin 8 produce a bridged configuration output to which a
20kΩ speaker can be connected. This bridge configuration offers the
V+
advantage of a more efficient power transfer from the input to
the speaker. Because both outputs are symmetric, the dc bias at
6
Pin 5 and Pin 8 are exactly equal, resulting in zero dc differential
SSM2211 voltage across the outputs. This eliminates the need for a coupling
20kΩ 4
IN–
5 capacitor at the output.
A1 VOUTA
3
50kΩ THERMAL PERFORMANCE—LFCSP
50kΩ
50kΩ The LFCSP offers the SSM2211 user even greater choices when
considering thermal performance criteria. For the 8-lead,
A2
8
VOUTB
3 mm × 3 mm LFCSP, the θJA is 50°C/W. This is a significant
2
performance improvement over most other packaging options.
50kΩ BIAS
0.1µF CONTROL
7 1
00358-041
SHUTDOWN
Rev. F | Page 14 of 24
Data Sheet SSM2211
TYPICAL APPLICATIONS
RF
driving this speaker with a bridged output, 1 W of power can be
5V delivered. This translates to a 12 dB increase in sound pressure
level from the speaker.
CS
CC RI
6 Driving a speaker differentially from a BTL offers another
AUDIO 4
INPUT –
5
– advantage in that it eliminates the need for an output coupling
SPEAKER
SSM2211 8V capacitor to the load. In a single-supply application, the quiescent
8
3
+ 1 + voltage at the output is half of the supply voltage. If a speaker is
7 connected in a single-ended configuration, a coupling capacitor
2
is needed to prevent dc current from flowing through the speaker.
This capacitor also needs to be large enough to prevent low
00358-042
CB
Rev. F | Page 15 of 24
SSM2211 Data Sheet
POWER DISSIPATION The power dissipated internally by the amplifier is simply the
Another important advantage in using a BTL configuration is difference between Equation 6 and Equation 3. The equation
the fact that bridged-output amplifiers are more efficient than for internal power dissipated, PDISS, expressed in terms of power
single-ended amplifiers in delivering power to a load. Efficiency delivered to the load and load resistance, is
is defined as the ratio of the power from the power supply to the 2 2 V DD
power delivered to the load PDISS = × PL − PL (7)
π RL
PL
η= The graph of this equation is shown in Figure 44.
PSY
1.5
An amplifier with a higher efficiency has less internal power VDD = 5V
00358-044
measure the difference between the power delivered by the
0
supply voltage source and the power delivered into the load. 0 0.5 1.0 1.5
The waveform of the supply current for a bridged-output OUTPUT POWER (W)
amplifier is shown in Figure 43. Figure 44. Power Dissipation vs. Output Power with VDD = 5 V
VOUT Because the efficiency of a bridged-output amplifier (Equation 3
VPEAK
divided by Equation 6) increases with the square root of PL, the
power dissipated internally by the device stays relatively flat and
TIME actually decreases with higher output power. The maximum
power dissipation of the device can be found by differentiating
T
Equation 7 with respect to load power and setting the derivative
ISY equal to zero. This yields
∂PDISS 2 V DD 1
= × −1 = 0
IDD, PEAK
(8)
IDD, AVG
∂PL π RL PL
00358-043
Rev. F | Page 16 of 24
Data Sheet SSM2211
0.35 1.6
VDD = 5V
RL = 4Ω 1.4
0.30
1.2
0.25 RL = 4Ω
1.0
0.20 RL = 8Ω
0.8
0.15
RL = 8Ω 0.6
RL = 16Ω
0.10
0.4
0.05 RL = 16Ω
0.2
00358-046
00358-045
0 0
0 0.1 0.2 0.3 0.4 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT POWER (W) SUPPLY VOLTAGE (V)
Figure 45. Power Dissipation vs. Single-Ended Output Power Figure 46. Maximum Output Power vs. VSY
with VDD = 5 V Shutdown Feature
The maximum power dissipation for a single-ended output is The SSM2211 can be put into a low power consumption shut-
2 down mode by connecting Pin 1 to 5 V. In shutdown mode,
VDD
PDISS , MAX = (11) the SSM2211 has an extremely low supply current of less than
2 π 2 RL 10 nA. This makes the SSM2211 ideal for battery-powered
OUTPUT VOLTAGE HEADROOM applications.
The outputs of both amplifiers in the SSM2211 can come within Connect Pin 1 to ground for normal operation. Connecting Pin 1
400 mV of either supply rail while driving an 8 Ω load. As to VDD mutes the outputs and puts the device into shutdown
compared with equivalent competitor products, the SSM2211 mode. A pull-up or pull-down resistor is not required. Pin 1
has a higher output voltage headroom. This means that the should always be connected to a fixed potential, either VDD or
SSM2211 can deliver an equivalent maximum output power ground, and never be left floating. Leaving Pin 1 unconnected
while running from a lower supply voltage. By running at a lower can produce unpredictable results.
supply voltage, the internal power dissipation of the device is AUTOMATIC SHUTDOWN-SENSING CIRCUIT
reduced, as shown in Equation 9. This extended output headroom,
Figure 47 shows a circuit that can be used to take the SSM2211
along with the LFCSP, allows the SSM2211 to operate in higher
in and out of shutdown mode automatically. This circuit can
ambient temperatures than competitor devices.
be set to turn the SSM2211 on when an input signal of a certain
The SSM2211 is also capable of providing amplification even at amplitude is detected. The circuit also puts the device into low
supply voltages as low as 2.7 V. The maximum power available at power shutdown mode if an input signal is not sensed within
the output is a function of the supply voltage. Therefore, as the a certain amount of time. This can be useful in a variety of
supply voltage decreases, so does the maximum power output portable radio applications, where power conservation is critical.
from the device. The maximum output power vs. supply voltage R8
at various BTL resistances is shown in Figure 46. The maximum VDD
output power is defined as the point at which the output has 1%
total harmonic distortion (THD + N). R5
R7
VOUTA
C2 4 5
VDD
To find the minimum supply voltage needed to achieve a IN– SSM2211
specified maximum undistorted output power use Figure 46. 1 8
VOUTB
R6
R4
For example, an application requires only 500 mW to be output – A1
VDD
for an 8 Ω speaker. With the speaker connected in a bridged- AD8500
D1
output configuration, the minimum supply voltage required +
C1
is 3.3 V.
R1 R3
R2
00358-047
NOTES
1. ADDITIONAL PINS OMITTED FOR CLARITY.
Rev. F | Page 17 of 24
SSM2211 Data Sheet
The input signal to the SSM2211 is also connected to the non- SHUTDOWN-CIRCUIT DESIGN EXAMPLE
inverting terminal of A2. R1, R2, and R3 set the threshold In this example, a portable radio application requires the SSM2211
voltage at which the SSM2211 is to be taken out of shutdown to be turned on when an input signal greater than 50 mV is
mode. The diode, D1, half-wave rectifies the output of A2, detected. The device needs to return to shutdown mode within
discharging C1 to ground when an input signal greater than the 500 ms after the input signal is no longer detected. The lowest
set threshold voltage is detected. R4 controls the charge time of frequency of interest is 200 Hz, and a 5 V supply is used.
C1, which sets the time until the SSM2211 is put back into
shutdown mode after the input signal is no longer detected. The minimum gain of the shutdown circuit, from Equation 12, is
AV = 100. R1 is set to 100 kΩ. Using Equation 13 and Equation 14,
R5 and R6 are used to establish a voltage reference point equal R2 = 98 kΩ and R3 = 4.9 MΩ. C1 is set to 0.01 µF, and based on
to half of the supply voltage. R7 and R8 set the gain of the Equation 15, R4 is set to 10 MΩ. To minimize power supply
SSM2211. A 1N914 or equivalent diode is required for D1, and current, R5 and R6 are set to 10 MΩ. The previous procedure
A2 must be a rail-to-rail output amplifier, such as AD8500 or provides an adequate starting point for the shutdown circuit.
equivalent. This ensures that C1 discharges sufficiently to bring Some component values may need to be adjusted empirically to
the SSM2211 out of shutdown mode. optimize performance.
To find the appropriate component values, the gain of A2 must
START-UP POPPING NOISE
be determined by
During power-up or release from shutdown mode, the midrail
VSY bypass capacitor, CB, determines the rate at which the SSM2211
AV,MIN = (12)
VTHS starts up. By adjusting the charging time constant of CB, the start-
where: up pop noise can be pushed into the subaudible range, greatly
VSY is the single supply voltage. reducing start-up popping noise. On power-up, the midrail
VTHS is the threshold voltage. bypass capacitor is charged through an effective resistance of
AV must be set to a minimum of 2 for the circuit to work 25 kΩ. To minimize start-up popping, the charging time constant
properly. for CB needs to be greater than the charging time constant for
the input coupling capacitor, CC.
Next, choose R1 and set R2 to
CB × 25 kΩ > CC × R1 (16)
2
R2 = R1 1 −
(13) For an application where R1 = 10 kΩ and CC = 0.22 µF, CB must
AV be at least 0.1 µF to minimize start-up popping noise.
Find R3 as SSM2211 Amplifier Design Example
R1 × R2 Maximum output power: 1 W
R3 = ( AV − 1) (14) Input impedance: 20 kΩ
R2 + R2
Load impedance: 8 Ω
C1 can be arbitrarily set but should be small enough to prevent Input level: 1 V rms
A2 from becoming capacitively overloaded. R4 and C1 control Bandwidth: 20 Hz − 20 kHz ± 0.25 dB
the shutdown rate. To prevent intermittent shutdown with low
The configuration shown in Figure 42 is used. The first thing to
frequency input signals, the minimum time constant must be
determine is the minimum supply rail necessary to obtain the
10 specified maximum output power. From Figure 46, for 1 W of
R4 × C1 ≥ (15)
f LOW output power into an 8 Ω load, the supply voltage must be at
least 4.6 V. A supply rail of 5 V can be easily obtained from a
where fLOW is the lowest input frequency expected.
Rev. F | Page 18 of 24
Data Sheet SSM2211
voltage reference. The extra supply voltage also allows the SINGLE-ENDED APPLICATIONS
SSM2211 to reproduce peaks in excess of 1 W without clipping There are applications in which driving a speaker differentially
the signal. With VDD = 5 V and RL = 8 Ω, Equation 9 shows that is not practical, for example, a pair of stereo speakers where the
the maximum power dissipation for the SSM2211 is 633 mW. negative terminal of both speakers is connected to ground.
From the power derating curve in Figure 31, the ambient Figure 48 shows how this can be accomplished.
temperature must be less than 50°C for the SOIC and 121°C for
10kΩ
the LFCSP.
5V
The required gain of the amplifier can be determined from
Equation 17 as
6
10kΩ
PL × R L AUDIO 4
INPUT –
5
AV = = 2. 8 (17) 0.47µF
SSM2211
V IN, rms 8
3
+ 1
From Equation 1 7 470µF +
2 250mW
RF AV SPEAKER
= (8Ω)
00358-048
0.1µF –
RI 2
or RF = 1.4 × RI. Because the desired input impedance is 20 kΩ, Figure 48. Single-Ended Output Application
RI = 20 kΩ and R2 = 28 kΩ.
It is not necessary to connect a dummy load to the unused
The final design step is to select the input capacitor. When output to help stabilize the output. The 470 µF coupling capa-
adding an input capacitor, CC, to create a high-pass filter, the citor creates a high-pass frequency cutoff of 42 Hz, as given in
corner frequency needs to be far enough away for the design to Equation 4, which is acceptable for most computer speaker
meet the bandwidth criteria. For a first-order filter to achieve a applications. The overall gain for a single-ended output config-
pass-band response within 0.25 dB, the corner frequency must uration is AV = RF/R1, which for this example is equal to 1.
be at least 4.14× away from the pass-band frequency. Therefore,
(4.14 × fHP) < 20 Hz. Using Equation 2, the minimum size of an DRIVING TWO SPEAKERS SINGLE ENDEDLY
input capacitor can be found. It is possible to drive two speakers single endedly with both
1 outputs of the SSM2211.
CC > (18) 20kΩ
20 Hz
2π × 20 kΩ
4.14
5V
–
470µF
LEFT
Therefore, CC > 1.65 µF. Using a 2.2 µF is a practical choice for CC. 6
SPEAKER
+ (8Ω)
20kΩ 4
The gain bandwidth product for each internal amplifier in the AUDIO
INPUT –
5
1µF
SSM2211 is 4 MHz. Because 4 MHz is much greater than 4.14 × SSM2211
20 kHz, the design meets the upper frequency bandwidth criteria. 3
+ 1
8
00358-049
0.1µF –
noise.
(2.2 μF)(20 kΩ) Figure 49. SSM2211 Used as a Dual-Speaker Amplifier
CB > = 1.76 μF (19) Each speaker is driven by a single-ended output. The trade-off
25 kΩ
is that only 250 mW of sustained power can be put into each
Selecting CB to be 2.2 µF for a practical value of capacitor speaker. In addition, a coupling capacitor must be connected in
minimizes start-up popping noise. series with each of the speakers to prevent large dc currents
To summarize the final design from flowing through the 8 Ω speakers. These coupling
capacitors produce a high-pass filter with a corner frequency
VDD = 5 V
given by Equation 4. For a speaker load of 8 Ω and a coupling
R1 = 20 kΩ
capacitor of 470 µF, this results in a −3 dB frequency of 42 Hz.
RF = 28 kΩ
CC = 2.2 µF Because the power of a single-ended output is one-quarter that
CB = 2.2 µF of a BTL, both speakers together are still half as loud (−6 dB
TA, MAX = 85°C SPL) as a single speaker driven with a BTL.
Rev. F | Page 19 of 24
SSM2211 Data Sheet
The polarity of the speakers is important because each output is LFCSP PCB CONSIDERATIONS
180° out of phase with the other. By connecting the negative The LFCSP is a plastic encapsulated package with a copper lead
terminal of Speaker 1 to Pin 5 and the positive terminal of frame substrate. This is a leadless package with solder lands on
Speaker 2 to Pin 8, proper speaker phase can be established. the bottom surface of the package, instead of conventional
The maximum power dissipation of the device, assuming both formed perimeter leads. A key feature that allows the user to
loads are equal, can be found by doubling Equation 11. If the reach the quoted θJA performance is the exposed die attach
loads are different, use Equation 11 to find the power dissipa- paddle (DAP) on the bottom surface of the package. When
tion caused by each load, and then take the sum to find the total soldered to the PCB, the DAP can provide efficient conduction
power dissipated by the SSM2211. of heat from the die to the PCB. To achieve optimum package
performance, consideration should be given to the PCB pad
design for both the solder lands and the DAP. For further
information, the user is directed to the Amkor Technology
document, Application Notes for Surface Mount Assembly of
Amkor’s MicroLead Frame (MLF) Packages. This can be
downloaded from the Amkor Technology website.
Rev. F | Page 20 of 24
Data Sheet SSM2211
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8 5
4.00 (0.1574) 6.20 (0.2441)
3.80 (0.1497) 1 5.80 (0.2284)
4
012407-A
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
4 1
PIN 1
0.50 INDICATOR
0.40 1.89
12° MAX 0.70 MAX 0.30 1.74
0.90 MAX 0.65 TYP 1.59
0.85 NOM 0.05 MAX
FOR PROPER CONNECTION OF
0.01 NOM THE EXPOSED PAD, REFER TO
SEATING 0.30 THE PIN CONFIGURATION AND
04-04-2012-A
PLANE 0.23 FUNCTION DESCRIPTIONS
0.20 REF SECTION OF THIS DATA SHEET.
0.18
Rev. F | Page 21 of 24
SSM2211 Data Sheet
ORDERING GUIDE
Model 1 Temperature Range Package Description Package Option Branding
SSM2211CPZ-REEL –40°C to +85°C 8-Lead LFCSP_VD CP-8-2 B5A#
SSM2211CPZ-REEL7 –40°C to +85°C 8-Lead LFCSP_VD CP-8-2 B5A#
SSM2211SZ –40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
SSM2211SZ-REEL –40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
SSM2211SZ-REEL7 –40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
1
Z = RoHS Compliant Part; # denotes RoHS compliant product may be top or bottom marked.
Rev. F | Page 22 of 24
Data Sheet SSM2211
NOTES
Rev. F | Page 23 of 24
SSM2211 Data Sheet
NOTES
Rev. F | Page 24 of 24