5 4 3 2 1

IF INPUT
[4] FSK_PORT
MONITOR
+12VR W1 +5VR
C37 C57
5.6p 18p R58 R57 3P_HDR R12
U6

6
9
7
361V504ER R33 91 91 20.0
J3 66.5 C40 C12 C25 C23

G
G
G
1 5 2200p L7 L17 2200p
R25 R24

3
RF1
RFC 3
75p 75p 8 39n 22n R43 R53 C72 R21
R47 RF2 11.5 11.5 91 91 C21
R34 1008 CS 0.1u

4
3
2

A
L8 C461 C24 C46 C56 20.0 0.1u
154 90.9 SERIES
150nH R17 R16 10p 22p 8.2p R30 R15 R41
HMC284MS8G

1
2200p 432 432 432 432 499
75mA C55 1008 CS C34
C13 L6
2200p SERIES L16 2200p
1.5u
1500p U26 1.5u

6
9
7
U5
D U10 D
LOOPBACK INPUT AG603-86 C22 C36 U11 C35 C53 C52 C51

G
G
G
5 2200p 2200p AT-255 2200p 2200p 2200p 2200p
COAX-TRANS C39 RF1 R23 R40 R51
R46 RFC 3 1 3 3 RF2 RF1 1 3 IN OUT 6
8 RF2 11.5 11.5 11.5
J2 49.9 VC 5

G
G
G
G
B

A
2200p

2
4
R45 R32 R14 R42 R22 R39 R52 R56
HMC284MS8G SGA-4463

1
2
4
5
121 121 432 432 432 432 432 432

2k
0.1u C54
R7 R13
AGC CONTROL 0.1u R519
+5V 1k
VOLTAGE
14

3.32k
C363 0 - 4.7 VOLTS +5VR C4
C26 T2
R31 AGC CONTROL
5 6 2k VOLTAGE

TP

TP
[8] IF_LOOP_EN T1

2
R3 0.1u 0 TO -3.16 VOLTS
499

14
U83C 1000p 4 V+
1 R55 1210
74ACT04 U83D
R44 C38 3 20.0
V- U3 3.3u L19
9 8 +5VR 0.1u 1000p
LMC7101AIM5
+5VRE

5
74ACT04 499
1000p -5VR C63 C65
R38 C50 + 15u
R2 R4 .047u C553 0.1u
C1 0.1u 20.0 C49 10V
[8] AGC_UD
0.1u R37
1k 1k +5V
C3 10k

12
R1 R29

6
7
8
C5 1008 CS U8
U129

5
.047u 1k SERIES L5 C45

VCC1
VCC2
VCC3
VCC4
2.67k
1 1.5u 2200p

VDD
C6 [8] TS_CONV# CONV*
+5VR DI/O 6 TS_DIN_OUT [8] U9 5 EN IOUT+ 16 DEMOD_Q [3]
8 C33 C11 U4 C20 C43
[8] TS_RD/WR# RD/WR* AT-255 XFMR1
R5 2200p 2200p 2200p 2200p
R10
2
2.67k 0.1u [4,5,6,7,8,11] SER_CLK 7 SCLK 3 RF2 RF1 1 3 IN OUT 6 6 1 2 RF+

AGND
4 V+ R517 OTI* 2 11.5 IOUT- 15 DEMOD_Q# [3]
R6 1 AGC_MON 4 5 2
AIN VC

G
G
G
G
C
+3.3V 3 2200p C
V- U2 2k R520 R11 R9
AD7818 SGA-4463 4 3 3 14 DEMOD_I [3]

1
2
4
5
2k C7 C552 3.32k C32 432 432 RF- QOUT+
LMC7101AIM5 R514 C44
5

0.1u 0.1u 0.1u XF617DB-SO

2k (1009 VERSION)
C169 C64

GNDRF1
GNDRF2
QOUT- 13 DEMOD_I# [3]
C127 1 6 10

GND
GND
+3.9REF 2XLO
0.1u 2
0.1u 2200p 2200p LT5517EUF

1
4
9
11
C156
5

C143 3 4

5
0.1u
V

C170
2 R137 XF617DB-SO C131

VH

VL
B L41
O 4 +5VR 7 V+ V- 4 -5VR (1009 VERSION)
1.8u L42 CFE10.7M280KBW
[7] 10M_CRL 1 A 100 C176 2200p XFMR4
0.1u 3 R127 1.8u
IN+
G

1210 6 1 3

GND
NC7SZ08 C150 OUT I O R132 REG1117-3.3
2 R139
3

IN- 49.9 0.1u

U24 R125 C171 200 2
100p
FL1
200
3
VOUT
4 +3.3VRS
R121 +5V

2
U28 332 VIN SUB
1

100p R138
HFA1135 U20

GND
C564 301
4 R126 332 C578 + + C576
LO+

LO-

C180 1200p RF+

5 33.2 10u-CT
[9] CRL_OUT IF 1u
3 U136

1
RF- 20V
G

0.1u 3.3u
SMD-K1
2

C181 L43
1210 C178
3300p R104
3300p
49.9

L9 DT3316
+5V +5VR R133
22u C163
+ 15u + 68u 100 R119 R107
100 49.9
C77 10V 16V +5VR
C8 U14 MC10EP131FA
R134
B 0.1u R140 B
499 10 R1 Q1 19
L11 DT1608 Q2 4.99k 8 20
+5VRE D1 Q1/
+12V +12VR MMBT2222A 7 C1
33u +3.9REF C147 6
+ 10u-CT + 10u-CT + +3.3VRS C1/
C172 2200p
15u L26
C78 20V C10 20V 1000p C146
C128 10V ILBB-0603-1001-25%
0.1u C157 U25 +12VR
2200p R82 R87 1
15
+5VRS 32
R2
22
VCC2 1k 750 D2 Q2/
L10 DT1608 3 21
C155 35V C2 Q2
7 2
-5V
33u
-5VR 1000p VCC1
22u
C2/
10V 10V R128 1000p .047u
10 CE FIN# 5 C152 R96 R73
+ + 499 +
R83
C69 15u C14 15u C149 C87 C95 150 150
698 C93
6 U15 1000p 30
FIN [8] RX_2/4_SEL R3
U13 8 .047u Vtune JTOS-850VW 29 23
LT1763CS8-5 OSCIN T9 20mA, 5V R88 D3 Q3
27 C3 Q3/ 24
7
1

2
L39 U21 R97 3.32k R81 26

TP
22u LT1677IS8 4.32k C3/
2 3 150

VCC
CPO + R75
+6V 8 1 6 5 13 R94 R95
IN OUT +5VRE C140 R108 2 - C158
V-TUNE RFOUT
+ C86 + 11.5 150 150
2 698 C112

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SENSE 820p 1u
C110 10u-CT 11
4
8

1u + 25V .01u R76 R74 C0/

5 4 C92 R123 15
SHDN BYP 20V 432 432 R0
+5VRS 16 1 49.9k 14 17

1
3
4
6
7
8
9
10
11
12
14
1000p VP FLO D0 Q0
1u 12 18
GND

GND

GND

1000p C130 C0 Q0/

+ 25V
0.22u + C82
C145 35V C148 +3.3VRS
14 5 R105 R106 R101 R100
3

FO/LD CC/
1 8 4 CC 150 150 1k 1k
[4,5,6,7,8,11] SER_CLK 11 R122 1000p 16
2 7 CLK VCC
[4,5,6,7,8,11] SER_DATA 3 6 12 DATA 20.0k VCC 25
[8] RX_1ST_LO_EN 4 5 13 LE .01u R63 31 SET VCC 13
GND1
GND2
GND3

4.7k
C144 C151 C154

VEE
VEE
A 470 RP2 49.9 A
8 1 C129
100p 100p 100p 7 2 +3.9REF C94 0.1u
LMX2306 C139 C103
3
4
9

9
28
6 3 C111
5 4 C81 1000p 0.1u
1000p
RP1 2N2907 1000p R62
T10 Q1
RX 1ST 1k
LO LOCK TP RX_1ST_LO_LOCK [11]

WARNING: LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD
THIS DRAWING CONTAINS IN FORMATION
PROPRIETARY TO COMTECH COMMUNI CATIONS
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE DATE: DWG NO: SC/10901 REV C
COMTECH EF DATA
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
UNLESS OTHERWISE AUTHORIZED IN WRI TING
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 2 OF 13 SCALE: NONE CAGE CODE 1RN38
2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200 RX RF, LO SYNTH
5 4 3 2 1
 5 4 3 2 1

U22 AD8184
T8
R70
TP 1 IN0 OUT 10
1k
I_FIL 3 IN1 +5VR
C104 R69 +5VR
C121 C185
1210 33p 82p 1k 5 IN2 +V 14
C194
-5VR
Fc=1.25MHz 7 IN3 C165 1u
R77 100u 82u C193
2 0.1u 0.1u
56p 120p GND .01u

7
R49 L27 L33 U32
499 4.99k 698
C99 C114 C135 4

V+
(SH 2) DEMOD_I R114 GND R151
150 C61 C59 R54 R60 -5VR 1 IN+ OUT 8
220p 330p 180p 698 6 GND -V 8 33.2
L15 L13 2 IN- RX 6
C105 C122 0.1u
120p 330p 11 EN* -5VR
15u 15u 5 3

A0

A1
D 91p C58 U12B 1210 CLK GND D
C60 6 Fc=625kHz

V-
7 R78 100u 82u

13

12
220p L23 180p R135 C161
C62 L24 5 LTC1569-7

4
2k C182
AD8058AR 365 L28 L34
15u 15u C100 C115 C136 -5VR
R115 C202
R50 C71 C70 820p 1200p 680p 365 0.1u
499 +12VR
(SH 2) DEMOD_I#
0.1u

13
150 R59 C116 U36
56p 120p R85 390p
R61

V+
4.99k 3 2
332 L35 S1 D1
R116 1 IN1
C123 332 14 15
C106 1000u S2 D2
16 IN2
.01u .01u
11 S3 D3 10
U23 AD8184 9 IN3
4.99k R72
Fc=2.5MHz C48 1 10 6 7
R26 IN0 OUT S4 D4
56p 120p -5VR 1k 8 IN4
R28 3 +5VR +5VR
R8 IN1 +5VR
R71 C189 5 12

V-
(SH 2) DEMOD_Q C107 C124 C195 GND VL
C18 C16 0.1u 1k 5 14 -5VR
150 33p 82p IN2 +V

4
499 1210
0.1u ADG453BR

4
L4 L3 AD8058AR Fc=1.25MHz 1u 0.1u
3 7 IN3
1 R79 100u 82u 0.1u -12VR

7
15u 2 2 U33
91p 15u C15 GND
C17 U12A L29 L36 C186

V+
698 R145
C19 C101 C117 C137 4 C162 1 8
C79

8
220p L12 R117 GND IN+ OUT
L14 180p -5VR 33.2
220p 330p 180p 698 6 GND -V 8 2 IN- RX 6
15u 15u -5VR C187
0.1u C108 C125
120p 330p 11 EN* 5 CLK GND 3
R36 1210 C168 .01u

A0

A1
C31 C30 R27 R35

V-
Fc=625kHz 0.1u
(SH 2) DEMOD_Q#
C 499 R80 100u 82u R136 LTC1569-7 C

13

12

4
150 4.99k 2k C183
56p 120p L2
+6V 365 L30 L37 -5VR
33u C102 C118 C138
+ C29 R118
0.1u
DT1608 820p 1200p 680p 365
15u R152
Fc=2.5MHz 10V (SH 8) RBB_SEL5
T7 C119 499
R86 390p C201
TP
100p
332 L38 C167 C190
GND Q_FIL R103
332 T13 TP R147 +5V
C109 1000u 100p

5
TP1 27.4 0.1u
.01u C126 C166 R242

V
.01u 4 2
O I FIL_CLK_LTC (SH 8)
(SH 8) RBB_SEL1 1 8 100p

G
27.4
(SH 8) RBB_SEL2 2 7
(SH 8) RBB_SEL3 NC7ST04 U37

3
3 6
(SH 8) RBB_SEL4 4 5 TP T12
470 RP3

499 R173 L46

TP T31 +3.3V +5VR
2k 6.8u
R163 C253 + C293

23
I _A/D

2
C292 U61 15u C282
INPUT
0.1u 0.1u 10V U65 0.1u

DVCC

AVCC
HFA1135 U46

5
R162 R236 R299

V+
+3.3V U47B 2k 2 IN- CLK 14 4 OUT IN 2 ADC_CLK (SH 8)
5 R174 OUT 6 R208 SELECT 13 27.4

G
B 27.4 B
7 3 IN+ 16 I_INA
+5V 6 NC7ST04

3
2k 11.5
OPA2234 C206 7 4
V+ V- C251

VH

VL
1u 1u 330p
+5VR C258
-5VR

5
R205 R185
R193 Q_REFT 25
221k C219 +5VR 2.21k 2k C242
-5VR + C270 0.1u
C218 2k 160 C207
1u 0.1u 22 VREF 15u
0.1u R184 R192
20V 0.1u C269 GND
C224 C233 + C241 24
4.99k Q_REFB
6.8u R206 R209 15u
R215 0.1u C231 0.1u
-12V -12VR 10V TP20
L22 3.92k I_REFT 18
221k
20V C240
+ 17 I_INB 0.1u
10u-CT
C68 3.92k 221k C268 + 26 0.1u C232
Q_INB
15u 0.1u I_REFB 19
R195 R187 10V
0.1u
1u 0.1u
+12VR C220 0.1u
0.1u R175 R188
1u 4.99k D0 3 IQ_D0 (SH 8)
C211 2k C199 4
160 R224 C252 C257 D1 IQ_D1 (SH 8)
C203 2.21k 2k D2 5 IQ_D2 (SH 8)
+5VR
R186 C215 D3 6 IQ_D3 (SH 8)
221k +5VR R194 R176 R196 D4 7 IQ_D4 (SH 8)

5
-5VR 27 8
Q_INA D5 IQ_D5 (SH 8)
1u 9
VH

VL
11.5 D6 IQ_D6 (SH 8)
8

0.1u 7 4 C243 10 IQ_D7 (SH 8)

C196 V+ V- D7
2 2k 330p D8 11 IQ_D8 (SH 8)
1 3 12

REF_SEL
IN+ D9 IQ_D9 (SH 8)
3 6

SLEEP
U47A R157 OUT

DGND

AGND
2k 2

CS#
OPA2234 IN- AD9201ARS
4

R154
A HFA1135 U48 A

21

15

20

28
Q_A/D
INPUT R225
R153 R164
TP T21 4.99k
499 2k

WARNING: LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD
THIS DRAWING CONTAINS IN FORMATION
PROPRIETARY TO COMTECH COMMUNI CATIONS
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE DATE: DWG NO: SC/10901 REV C
COMTECH EF DATA RX BASEBAND
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
UNLESS OTHERWISE AUTHORIZED IN WRI TING
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 3 OF 13 SCALE: NONE CAGE CODE 1RN38
2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200
5 4 3 2 1
 5 4 3 2 1

C74
150p
C88

+3.3V C84 C85 R67

1200p 1200p 49.9 L20 L21 1812
0.1u FSK_PORT (SH 2)
2.7u 2.2u
R68
1812

5
L25 121 C73 C75
R64 R66 820p 1500p

V
C83
2 392 3.3u 121
(SH 8) FSK_OUT B
O 4 1812
1 1812 LS
A SERIES +5V
.01u C96

G
C91 TP27 L31
0.1u C90
U16

3
NC7SZ08 +5V R102
D +5V 0.1u 22u D
R65 GND 4.75K
100 0.1u
+5VT

4
U18

COMP_VCC

IF_VCC
C89
DATA 16 FSK_RXD (SH 11)
-5VT 5 LIMIT_IN
+3.3V 0.1u CARR_DET 13
R84
100 T11
+12VT +5VT -5VT
C488 C504 COMP+ 15 TP
6 BIAS_1
14 TESTP_3 DIS CR
700 kHz TX REF COMP-

SQUELCH_ADJ
C97 R111 C132
0.1u 0.1u

5
T100 1.0k

COMP_GND
QUAD_BIAS
(SH 9) C487 SMD-K1 10.7 MHz TX REF 0.1u 2200p

2
L72 1210 1210 1210 11

TP

QUAD_IN
VH

VL
TX_SYNTH_REF 1800p 1800p L87 CFE10.7M280KBW T97 DET_2

IF_GND
56u L79 3 7 4 7

G
RF- V+ V- L70 CFE10.7M280KBW BIAS_2
5 1.8u 10

TP
C434

LO+
IF DET_1

LO-
56u 4 1 3 3 R451 1.8u R109

GND
1210 RF+ I O IN+
C522 6 1 3 C98 R112 3.92k

GND
C472 C496 C503 C537 OUT I O 1.0k
C530 U124 2 0.1u MC13055D

12

9
1800p 332 IN- 49.9 C449
1500p 3300p 100p FL3

2
1200p R496 332 0.1u
R457 100p FL2

2
HFA1135 U115 R426 C134
301 1812
C460
C133 L32 22u 2200p R113
+3.9T .01u R110 3.92k

C477 R497 2.67k R98

0.1u
5

0.1u 4.75K
33.2
V

2 R450 C120
B 120p
O 4
(SH 7) 10M_TX_SYN 1 A 100
C113
G

22p
C U107 NC7SZ08 C
3

U126
LT1763CS8-5
L83
22u
+6V 8 IN OUT 1 +5VCO

SENSE 2
C545 + + C532
1u 5 4 15u
SHDN BYP
C546
10V
GND

GND

GND

1000p
3

I/ (SH 5)

U117 MC10EP131FA
REG1117-3.3
10 R1 Q1 19
2 8 20
3
VOUT
4 +3.3VTS 7
D1 Q1/ I (SH 5)
+5V VIN SUB C1
6

GND
R446 + + C579 C1/ R470 R463
C581
C463 100 150 150
1u 10u-CT
+5VT U137 Q (SH 5)

1
20V

0.1u R445 1
R444 +3.3VTS R2
499 32 D2 Q2/ 22
Q4 4.99k 3 21
B C2 Q2 Q/ (SH 5) B
MMBT2222A 2 C2/
R436 +5VCO
+3.9T + C435 R453 R462 R490 R504
15u 750
0.1u 1000p 1k 150 150
C410 10V L84
C451 U109 100 +12VT R437
30 R3
15 ILBB-0603-1001-25% 29 23 49.9
VCC2 D3 Q3
C464 R452 27 C3 Q3/ 24
7 35V 26
1000p VCC1 C465 698 C3/
22u
R468
10 CE FIN# 5 C505 R503 R498
499
+ 1000p C531 R455
C506 (SH 8) TX_2/4#_SEL 150 150
2200p 0.1u R461 C489 49.9
C452 C551
MOD_VCO_Vtune R460 4.32k 1000p 11
3.32k C0/
FIN 6 15 R0
8 .047u T101 20mA, 5V 14 17
OSCIN D0 Q0
12 18
TP

C0 Q0/
7
1

2
2200p U116 R513 U125
R487
2 3 150 C497

VCC
CPO + +3.3VTS
6 5 V-TUNE RFOUT 13 5 CC/ R454 R456 R469 R479
C481 R459 2 - C478 1000p 4
+ CC 150 150 1k 1k
698 C550 16
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
820p 1u 11.5 R478 VCC
25
4
8

LT1677IS8 25V .01u R488 R477 +3.3VTS 49.9 VCC

+5VCO R429 R458 31 SET VCC 13
16 1 C479 432 432
49.9k

VEE
VEE
1
3
4
6
7
8
9
10
11
12
14
VP FLO +
1000p 0.22u 1u C482
11.5 0.1u
35V 25V R508
+
C523 0.1u
C473 C490

9
28
C438 C437 JTOS-850VW 1k C507 C491
FO/LD 14 RP32
1000p 1000p 1000p 0.1u
1 8
(SH 2,5,6,7,8,11) SER_CLK 2 7 11 CLK 5 4 R443
(SH 2,5,6,7,8,11) SER_DATA 3 6 12 DATA 6 3 20.0k
(SH 8) MOD_LO_EN 4 5 13 LE 7 2 100p R505 R489
GND1
GND2
GND3

8 1 698 1k
470 RP31 Q3 C421
C420 C436 C419 +3.9T 2N2907
100p 100p 100p 4.7k
A (SH 8) SYN_RST A
LMX2306
3
4
9

T94 C409 R502

TP

MOD_LO_LOCK (SH 11)

.01u 3.32k
MOD LO
LOCK

WARNING: LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD
THIS DRAWING CONTAINS IN FORMATION
PROPRIETARY TO COMTECH COMMUNI CATIONS COMTECH EF DATA TX LO SYNTH
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE DATE: DWG NO: SC/10901 REV C
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
UNLESS OTHERWISE AUTHORIZED IN WRI TING 2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200 TEMP SENSOR
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 4 OF 13 SCALE: NONE CAGE CODE 1RN38

5 4 3 2
RX FSK 1
 5 4 3 2 1

1.69k R403
+1.9VREF
R405 1k
C400
+5VT
TP T90

2
U92 0.1u 1.910 VOLTS
C390 4 V+
0.1u 1
L57 REFIO 20 3
V- U97
+3.3V 14 DVDD
100u C387 LMC7101AIM5 T91

5
0.1u Fc=2.5MHz
C383 27 I_BB I_FIL

TP
D COMP1 56p 120p D
0.1u 499 R404 R408 R438
22 COMP2 C386 C422 C439
C389 R395 2k 200 162
COMP3 16 0.1u
0.1u L63 L67 75 C508
+5VT L58 +5VT 56p
0.1u R447
23 15u 15u
AVDD
100u IOUTB 25 C403 C453

8
C385 + 180p C430
C384 15u U96A C411 330p
24 ACOM 2 470p
0.1u 10V R389 1
IOUTA 26 3
AD8058AR
22p 499
(SH 8) TXFIR_D9 1 0.1u

4
DB9
(SH 8) TXFIR_D8 2 DB8
3 R401
(SH 8) TXFIR_D7 DB7 -5VT
4 C388 2k 2k
(SH 8) TXFIR_D6 DB6
(SH 8) TXFIR_D5 5 C399

R384
DB5 R383 R390
(SH 8) TXFIR_D4 6 DB4
7 49.9 49.9
(SH 8) TXFIR_D3 DB3
(SH 8) TXFIR_D2 8 DB2
(SH 8) TXFIR_D1 9 DB1
10 R388
(SH 8) TXFIR_D0 DB0
1.82k
T61 C398 Q_BB
TX_2NSYM 19 REFLO
TP

(SH 11) CIMTXCLK T92 Fc=2.5MHz

(SH 11) CIMRXCLK
11 Q_FIL

TP
CLOCK 1u 56p 120p
(SH 8) CIM_RX_CLK 1 8 R399 499 R402 R409 R439
(SH 8) CIM_TX_CLK 2 7 12 WRITE 200
(SH 8) 2NSYM_OUT 3 6 R397 2k 200 C423 C440 162
(SH 8) NSYM_OUT 4 5 13 SELECT
17 L64 L68 C484
RP23 27 QOUTA R448
15 56p
TP

DCOM U96B 75
28 6 15u 15u
RESET/SLEEP
TX_NSYM T62 R392 7 C454
21 18 5 180p C431
C
FSADJ QOUTB C412 470p 330p C
R377 22p 499 AD8058AR
4.99k R400
AD9761 R391
2k
1.82k 2k
R381 C391
C394 R385 R393 R386
49.9 49.9 2k

R387 1u
+5VT 6.65k R396
C396 U93B
+1.9VREF 10k 200
5
R380 7
0.1u 2 U94 6
OPA2234 GND
VDD
R394 TP31
+1.9VREF 4 VREFA R398
3 VREFB OUT_A 5
20.0k
4.99k
(SH 2,4,6,7,8,11) SER_DATA 9 DIN
8 4.99k 20.0k
(SH 2,4,6,7,8,11) SER_CLK SCLK
(SH 8) OFF_DAC_CS# 7 SYNC# OUT_B 6
1 LDAC# R382
R376
C395
GND
+5VT
AD5322 10
0.1u
8

U93A
2
10k 1
+1.9VREF 3
R378 OPA2234
4

B B
6.65k
R379 -5VT R499
18.2
0.1u
(SH 4) Q/ +5VP
C393
R563
(SH 4) Q
-17dBm 20.0
R507 R501
18.2 C517 R500 120
U120

6
3.3pf 10.0
+5VP
CV1 4 R564

LO+

LO-
RF+ C565
2-6pF 5 IF
3 20.0 0.1u
RF-

G
L78
R464 SMD-K1 R491
+5V +5VT

2
33u 18.2 27.4 1008 CS C566
+ 15u + 15u SERIES L95 2200p
(SH 4) I/
1.5u MODULATED
C476 10V C516 10V OUTPUT
R493 C567 U130 C568
R492 -27dBm
10.0 2200p 2200p
(SH 4) I
3 IN OUT 6 MOD (SH 6)
L86 R480
+12V 18.2 C498 C483 27.4
+12VT

G
G
G
G
33u 3.3pf 3.3pf R482
+ 10u-CT + 10u-CT 120 SGA-4463

1
2
4
5
C529 20V C558 20V R481
27.4

R471
U118

6
L77 10.0
-5VT 4

LO+

LO-
-5V RF+
10V 33u 5 IF
15u 3 -17dBm R472
RF-

G
+ +
10V 120
C475 15u C515
A SMD-K1 A

2
+3.3V

WARNING:
THIS DRAWING CONTAINS IN FORMATION
PROPRIETARY TO COMTECH COMMUNI CATIONS
LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD
COMTECH EF DATA TX BASEBAND,
DWG NO: SC/10901 REV C
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
DATE:
MODULATOR
UNLESS OTHERWISE AUTHORIZED IN WRI TING 2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 5 OF 13 SCALE: NONE CAGE CODE 1RN38
5 4 3 2 1
 5 4 3 2 1

+5VT
C466
0.1u 2k
R565

2 U110
+5VT C569
C455
0.1u VDD
2k

2
6.8u 4 R566 0.1u
VREFA
+4.6VREF 3 5 4 V+ R466
VREFB OUT_A
L69 1 +5VP +12VT
4 5 3
V- U131 1.21k R567 R476 R485
(SH 2,4,5,7,8,11) SER_DATA 3 6 9 DIN LMC7101AIM5 C509 20.0 91 91
(SH 2,4,5,7,8,11) SER_CLK 8 R467

5
D 2 7 SCLK D18 D
(SH 8) TX_PWR_CS# 1 8 7 SYNC# OUT_B 6 0.1u
4.32k
C432 C441 C442 1 LDAC# -5VT SHBAT54
RP33
470 C570 R568 R486 R495 C492
100p 100p GND 0.1u C519 91 91
100p 0.1u
20.0 0.1u
AD5322 10

1008 CS C500 75mA L85 C520

SERIES L73 2200p 1.5u 0.1u
U119 1.5u 6 dB

2
U128
-7 DBM R484 5 C524 U133 C571 R516 AG603-86 C534

G
VC C559 C547
37.4 R494 2200p 2200p 37.4 2200p
(SH 5) MOD 3 RF2 RF1 1 3 IN OUT 6 1 3
C572 37.4
AT-255
R518 100p 100p

G
G
G
G
R483 R475 2200p R569 R570 R515

2
4
SGA-4463 154 154

1
2
4
5
100 150 154 154 L91
150nH
+5VT
-36 DBM
+12VT R473
C554
COAX-TRANS 470p
+3.3V J11 LOOPBACK OUTPUT
249
R474 R465
+4.6VREF
64.9 64.9
+5VCO

+5VP

C V1 V2 SEL C

1 0 RF2

0 1 RF1
ALTERNATE PART: 18p C555 8.2p C556
M/A-COM MASWSS0006
C560 L92

L93 L94
120nH
2200p 150nH 150nH
U122

4
6

2
C561 C562 C563 8 dB @ 61.25 ohm
U127

4
6

2
C499 56p 33p C573 361V504ER
47p

G
V2
V1
2200p HMC226 2200p HMC226 J13
3

G
V2
V1
RF2
RF2 3 5 RFC RF1 1 1 RF1 RFC 5 1 RF1 RFC 5 1
5 RFC RF1 1 3 RF2 3 RF2
10p C541 C544 R511

V1
V2

V1
V2
HMC226 5.6p C542

G
HMC226 2200p 64.9

2
3
4
U132 U134

6
4

6
4
C548 L88 R512 R506
140 140
L89 L90
82nH
2200p 120nH 120nH
+3.3V C575 C540 C549 C543
100p 39p 43p 22p
U76
5

C521
V

C526 C512 C502 100p

(SH 7) EXC_OFF_15# 2 B 100p
4 6.8p 3.9p
O
(SH 8) RTS# 1 A C527
C510
G

C525 L80
TP

100p 100p
NC7SZ08
3

T63 L81 L82

U113A 56nH C536
2200p 82nH 82nH
B C535 B
2 100p U139 100p

4
6

2
3 C511 C513 C514
EXT_CARR_OFF# (SH 12) C518 C582
1 22p 27p 15p

G
V2
V1
(SH 10) EXC_OFF_25# HMC226 C574
2200p 3 2200p
RF2
74LCX08 5 RFC RF1 1 1 RF1 RFC 5 100p
C494 3
3.3p RF2

V1
V2
HMC226 5.6p C486

G
GND TP32
+5V

6
4
+5VT C501 U135
U113B L74
HIGH = ON
14

R191
5 R441 39nH L75 L76
4.99k U53A
6 L71 2200p 56nH 56nH
1 2 4 RP35
8
7
6
(SH 12) C_OFF_PROC 499 6.8u 5
470 C485 C493 C495
HIGH = OFF 74ACT04 C470 1008 15p 22p 12p RP36

8
7
6
5
74LCX08
.01u 470
C458
1
2
3
4

+5VM C471

1
2
3
4
0.1u
+5VM +5VM
14

14
0.1u 14 +5VM
74ACT08

14
R434 U121E U121C 74ACT08
(SH 8) ADDR_1 1 U114D U121A
499 3 11 10 5 6 12
2 11 1 2
C459 U114A
74ACT04 74ACT04 13
.01u 74ACT04
7
+5VM
14

74ACT08 U114B
R425 U121F
(SH 8) ADDR_0 4
499 6 13 12
5 +5VM
C433 74ACT04

14
.01u +5VM 74ACT08

14
U114C U121B
A
U121D 9 A
8 3 4
9 8 10
74ACT04
74ACT04

TX RF, LOOPBACK
WARNING:
THIS DRAWING CONTAINS IN FORMATION
PROPRIETARY TO COMTECH COMMUNI CATIONS
LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD
COMTECH EF DATA AND OUTPUT
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE DATE: DWG NO: SC/10901 REV C
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
UNLESS OTHERWISE AUTHORIZED IN WRI TING 2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 6 OF 13 SCALE: NONE CAGE CODE 1RN38
5 4 3 2 1
 5 4 3 2 1

R207 +5VCM
R420 R235
C446 11.5
L59 100
+3.3V
+5V
33u
+5VU +5VU
TP26 4.99k 0.1u
0.1u
+ 15u + 15u 0.1u
MMBT2222A R418
R433 GND TP22
R423 1k 7 OE VDD 2
C381 10V C392 10V C291

5
C444 C457 499
Q5 GND 4 S1 C250
0.1u + R432 2.67k C229 U64 R243
C415

V
15u +5VF
L96 +5VP +3.6REF 10V
2.67k +5VU 0.1u 6 S0 OUT 5 2 B
27.4
O 4

5
U123 33u 0.1u 8 3 1
X2 GND A

2
78M05 C445 (SH 8) 60M_FPGA

15

V
ADF4001BRU 0.1u

G
+12V VI VO 4 V+ U104 L65 2 4 1
VI VO +5VF 16 1 FBD02
I O CLK_IN

VDD

AVDD
+5VU +3.3V NC7SZ08

3
VP

G
D D
+ 15u 0.1u 2 3 ICS501 U60
C528 + ADJ CP V- LMC7101AIM5
10 C425 U58 NC7ST04

3
CE U103

5
C557 10V
10u-CT R414 X6

5
GND 0.1u C417 C426 1 27.4

VCC
20V R413 B1
6 FinA 1u A 4 10M_FPGA
6.65k L61 332
C456 6 S 0.1u C230 +3.3VS
R223 (SH 8,9)
22u

GND
R424 R415
5 3 DT3316
FinB B0 +VOSC 2k
1

+
C416 Rset 10k

1
0.1u NC7SBU3157

2
10u-CT
11 R419 3

V
(SH 2,4,5,6,8,11) SER_CLK CLOCK 20V T93 R+
4.99k R 5
(SH 2,4,5,6,8,11) SER_DATA 12 DATA TP 4 R-

G
200
(SH 8) REF_PLL_EN 13 + C397 10MHz REFERENCE U99 U59 FIN1002

2
/EN R214
10u-CT
RP34 4.7k C469 20V 1 2
+3.3VS INA OUTA +3.3VS
8 REFin Mout 14 8 1 7 INB OUTA 3
9 C142
7 2 0.1u INC

G
G
G
C414 15 6
6 3 +3.6REF R407 IND OUTB
U105 Vtune 0.1u C405 5 U19

9
4
3
5 4 .01u OUTB

1
Q6 VT2-008 5.6p +3.3VS 200 0.1u
T96 C402 16 10 3

V
REF PLL VCC OUTC R120 R+
1k 4 11 5

TP
EN OUTC R 10M_CRL

5
LOCK 2N2907 CR1 4
C407 C413 R-

G
L60 U98 (SH 2)
R417 14

GND
V
GND B+
T99 TP REF_PLL_LOCK (SH 11) OUTD
1 3 2 12 13 FIN1002

2
NC OUT B 0.1u EN OUTD
6.8u 1k O 4
361V504ER C427 +3.3V 10uH 1
SN75LBC179A U101 0.1u L66 0.1u

8
C429 A
4

5
J12 C424 + C404 1k 4.99k FIN1031 C448
+3.3VS

G
1 8 R412 1u 10mhZ C406 R410
GND

2
A 15p 27p R406
2 2 R411 25V NC7SZ08

3
R B +3.3VS

1
0.1u R416 7 B 27.4 O 4 EXT_REF_ACT (SH 8) 200 0.1u
5 1 3

V
3
2

64.9 Y A 27.4 R421 R+

3 5

TP
T95
VCC

D R 10M_TX_SYN

G
Z 6 4 R-

G
EXTERNAL (SH 4)
U100

3
0.1u NC7SZ08
C REFERENCE U106 FIN1002 C
1

2
0.1u
TS55 C418 +5V
18V +5VU

14
C428 C443
U83E
C141
+5VU + TP3
(SH 8) REF_TUNE_SEL 11 10 68u
2 16V 3.3 VOLTS
0.1u U17

5
74ACT04 L40
1 3

GND
VDD +5V IN OUT +3.3V
68u 68u FBD02
4 + +
+4.6VREF VREFA 16V U7
3 5 16V 2 4 C159
VREFB OUT_A ON/OFF# TRIM
C76 C80 0.1u +12V 5 2
Vin Vcc
AXH005AOX-SR R89
9 1 3
(SH 2,4,5,6,8,11) SER_DATA DIN /SHDN Vsw +6V
5
LMC7101AIM5 3.01k + C67 L18
(SH 2,4,5,6,8,11) SER_CLK 8 SCLK V-
7 6 3 U112 R440 22u 6 7 220uH
(SH 8) REF_TUNE_EN SYNC# OUT_B SYNC FB
1 1 + C47 R19
LDAC# BUF_AGC (SH 10) 100u 49.9k
4 4 8 D1
V+
243 GND Vc
C467 C468 R99 MBRS140T3
GND LT1676CS8
2

0.1u 150 C28

AD5322 10 U111
+12V C42 100p
T3 0.1u 2200p
-5 V
TP

R422 R430 R431

7905 TP T98 R48
1k 1k 150 TP11 20.0k
2 3 R18
-12V VI VO -5V BUFFERED AGC VOLTAGE
10k
0 TO 10 VOLTS DC 1.5 VOLTS
GND LT1963AEST-1.5
C9 L44
+
U1 15u TP2 +3.3V 1 3
1
10V
VI VO +1.5V
68u FBD02
+ + R20

GND

GND
GND L1 16V 68u C192 3.01k
+12V +12V_F P1 C153 16V 0.1u
1 REG1117-3.3
33u C184

4
B 2 U30 B
+5VU 2
+
20V
3
VOUT
4 +3.3VS
10u-CT VIN SUB

GND
C2 + C401
T6 T5 T4
15u
TP

TP

TP

+5 V +12 V -12 V U95

1
FAN CONNECTOR 10V
J1 +3.3V

1 +5V RP5

8
7
6
5
2 F3 FUSE_POLY_TH
R197
3 +12V 4.7k +3.3V +12V 100mA
4 4.99k
5 -12V C222

1
2
3
4
6 0.1u (SH 10) 15_PIN_C_OFF
+ C66 + C41 C27 U50 18V 18V 18V 18V 18V 18V
MURS120T3
15u 10u-CT
+
10u-CT 14 13 +3.3V RP25 TS30 TS28 TS27 TS26 TS29 TS31

8
7
6
5
CON6 +3.3V VDD OUT1 5VOLT_OK (SH 12) C346
10V 20V 20V 4.7k D12
+5V 3 +5 OUT2 12 -5VOLT_OK (SH 12)
P3A

1
2
3
4
20
-5V 4 -5 OUT3 11 12VOLT_OK (SH 12) 0.1u U77A
470 RP24 5A
5 10 18 2 9A

VCC
+12V +12 OUT4 -12VOLT_OK (SH 12) (SH 6) EXC_OFF_15# Y0 A0 8 1
(SH 8) RED_IN_2 16 Y1 A1 4 7 2 4A
R166 6 9 14 6 8A
-12V -12 DOUT 23VOLT_OK (SH 12) (SH 8) RED_IN_1 Y2 A2 6 3
20.0k 12 8 3A
(SH 12) AUX_SER_RX Y3 A3 5 4
+12V 7 DIN VREF 1 7A
OE 1 2A
8 PGND GND 2 6A
R178 74LCX2244MTC 1A
5

1.69k LMC7101AIM5
C216 MAX8215CSD V-
3 U49 DB9_DUAL_M/F
1000p 1
0.1u
4 +4.6VREF +3.3V (FEMALE -
TOP OF STACK)
V+
C209
C208

20
2

U77B 470
RP27
11 9

VCC
+12V A0 Y0 1 8
A 0.1u 13 7 A
(SH 8) RED_OUT_2 A1 Y1 2 7
R189 R177 R165 (SH 8) RED_OUT_1 15 A2 Y2 5 3 6
TP T18 (SH 12) AUX_SER_TX 17 A3 Y3 3 4 5
1k 2.67k 130
4.6 VOLT 19 OE
REFERENCE
R329 74LCX2244MTC
1:1 REDUNDANCY INTERFACE
2k

WARNING:
THIS DRAWING CONTAINS IN FORMATION
PROPRIETARY TO COMTECH COMMUNI CATIONS
LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD
COMTECH EF DATA 10 MHz REFERENCE, PSUs,
DWG NO: SC/10901
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
DATE: REV C
1:1 CONTROL
UNLESS OTHERWISE AUTHORIZED IN WRI TING 2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 7 OF 13 SCALE: NONE CAGE CODE 1RN38
5 4 3 2 1
 5 4 3 2 1

[11] RS_PRES [11,12] OE#(RD#) +3.3V R297 4.99k RX_1ST_LO_LD [11] T72 TX_2/4#_SEL [4] FSK_OUT [4] +1.5V +1.5V
+1.5V +1.5V +1.5V +1.5V [11] RS_DONE [9,11,12] BD[8:15] [9,11,12] BA[0:22] [9,11,12] RD/WR# RX_2/4_SEL [2] +3.3V T56 TM2
T102

TP
[11] RS_CDATA [12] TURBO_CS# +3.3V R294 4.99k REF_PLL_LD [11] ADDR_0 [6] OPTION_2 [9]
R343

TP
TP6 C354 C353

BD10
BD11
BD12
BD13
BD14
BD15

BA17
BA18
BA19
BA20
BA21
BA22
[11] RS_PROG# [12] FPGA_CS# MOD_LO_LD [11] TP OPTION_1 [9]

BD8
BD9

BA0
BA1
BA2
BA3
BA4
BA5
BA6
BA7
BA8
C307 C304 C305 C308 [11] RS_CCLK [11] 3GPRES ADDR_1 4.99k GEN_TP_1 [9]
+3.3V R293 .01u 0.1u
[11] RS_SYNC RTS# [6] SYN_RST TP GEN_TP_2 [9]

AA21
AB22

AB19

AB21
0.1u 0.1u .01u .01u

W13

W15
W16

W17

W18
W20

W19

W14

W12
M21

M10
M11
M12
M13
AA2
AB1
N22
N21

D19
C20

U20
U19

R20
R19

N20
N19
N18

C19

U11

D20
P22

B21
A22

Y14
Y15

Y17

Y18

Y20

K10
K11
K12

V20
V19

P20
P19

V13
Y13

Y16

B20

V15

A20

A21

Y12

V12
V17

V16

P18
P17
[6] [4]

T20
T19

F11
F10
L22

L21

L12
L13
L14

L10

L11
4.99k

J10
J11
J12
J13
J14
W4
TM1

M9
C3
D4

D3

D6

D7

D5
T52

A1
B2

Y3

K9

A3

E3

K6
F3
L9
J9

J6
U71
TP7 +1.5V
J21 E5

PWRDN_B
N_C
DXN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

DXP
TCK
TDI
BD10
BD11
BD12
BD13
BD14
BD15

TMS

VBATT
BD8
BD9

TDO
BUSY_DOUT
B2_IO
B3_VREF_IO
B3_IO
B3_IO
B3_IO
B2_IO

B5_IO
B3_IO
B3_IO
B3_IO
B3_VREF_IO
B3_IO
B3_IO
B3_IO
B3_IO
B3_IO
B3_IO
B3_IO
B3_IO
B3_IO
B3_IO

B4_IO
B4_IO
B4_IO
B4_VREF_IO

B7_VREF_IO
B0_VREF_IO
B4_IO
B5_IO

B0_IO

B4_PGCB_IO
B4_SGCB_IO
B4_IO
B5_IO
B7_IO
B4_IO

B7_VREF_IO
B7_IO
B3_IO
B3_IO
B0_IO
B0_IO
[11] RS_CODE_RATE_SEL B2_IO B7_IO
[11] RS_PROC_CLK V21 B3_IO B7_IO E6
[11] RS_CORR_DIS R21 B3_IO B0_IO C4 60M_FPGA [7] C350
[11] RS_INT_DEPTH_SEL U22 B3_IO B0_IO C5 10M_FPGA [7,9]
T21 E7 .01u
[11] RS_DESCRAM_EN B3_IO B0_IO RX_SYM_TP [9]
[11] RS_SCRAM_EN/EXP_CS# W21 B3_IO B0_IO E8 TX_SYM_TP [9]
[11] RS_TX_IN_CLK T22 B3_IO B5_IO W7 LED_STROBE [11]
[11] RS_TX_CLOCK V22 B3_IO B0_IO C6 IF_LOOP_EN [2]
D [11] RS_ENC_DATA_OUT R22 B3_IO B6_IO T2 CIM_PRES [11] D
[11] RS_ENC_DATA_IN P21 B3_IO B6_DCIN_IO Y2 CIM_ASYNC_RX [11]
[11] RS_RX_IN_CLK K22 B2_IO B6_DCIP_IO Y1 CIM_ASYNC_TX [11]
[11] RS_RX_CLOCK U21 B3_IO B6_IO R2 CIM_TX_CLK [5]
[11] RS_DEC_DATA_IN K21 B2_IO B6_VREF_IO U1 CIM_TX_DATA [11]
[11] RS_DEC_DATA_OUT J22 B2_VREF_IO B6_IO U2 CIM_RX_DATA [11]
T42 TP D11 B0_PGCB_IO B6_IO T1 CIM_RX_CLK [5]
T45 TP E11 B0_VREF_IO B6_IO V2 CIM_INT_IN [11]
T16 C11 W1 CIM_CARRIER_CONTROL [11]
TP B0_SGCB_IO B6_IO
C10 B0_IO B2_IO J19 EXPANSION_PRES [11]
T17 TP [2] AGC_UD E10 B0_VREF_IO B5_IO Y9 RX_TRAFF [11]

T48 TP
G5
F5
F9
U9
B7_IO
B7_IO
B0_VREF_IO
XILINX VIRTEX-II XC2V1000-4FG456C B5_IO
B5_IO
B5_IO
Y8
W9
Y10
W10
TX_TRAFF [11]
UNIT_FAIL [11]
RED_OUT_2 [7]
+1.5V

B5_IO B5_IO RED_OUT_1 [7]

[11] EEPROM_SER_DO N17 B3_IO B5_IO V10 RED_IN_2 [7] C351
[11] G703_SDO V5 B6_IO B5_PGCB_IO Y11 RED_IN_1 [7]
U12 W11 0.1u
[2] TS_DIN_OUT B4_VREF_IO B5_SGCB_IO TP T70
[2] TS_RD/WR# U13 B4_VREF_IO B5_PGCB_IO V11 FSK_TXD [11,12]
[2] TS_CONV# U14 B4_IO B6_IO N4 RX_232 [10,12]
[11] EEPROM_EN M17 B3_VREF_IO B5_IO W8 PRX_232 [12]
[2] RX_1ST_LO_EN E9 B0_IO B6_IO M3 TX_232 [10,12]
[11] G703_EN# V7 B5_DCIP_IO B6_IO M4 PTX_232 [12]
[6] TX_PWR_CS# V8 B5_IO RDWR_B Y4 RCVR_EN* [10]
[7] REF_PLL_EN V9 B5_VREF_IO B6_IO W5 4W_DRV_EN [10]
[7] REF_TUNE_EN U18 B3_IO B5_IO W6 485_RX_DATA [10]
T76 T18 Y6
TP B3_IO B5_IO 2W_DRV_EN [10]
[4] MOD_LO_EN V14 B4_VREF_IO B6_IO Y5 485_TX_DATA [10]
[5] OFF_DAC_CS# U10 B5_VREF_IO B7_IO G4 1:N_ON# [10]
T49 F4 G3
TP B7_IO B7_IO I/F_SEL_0 [10]
T46 E4 H4
TP B7_IO B7_IO I/F_SEL_1 [10]
[2,4,5,6,7,11] SER_DATA J20 B2_IO B7_IO H3 232_DRV_EN [10]
[2,4,5,6,7,11] SER_CLK K19 B2_IO B7_IO J4 530_BAL/UNBAL# [10]
[5] TXFIR_D9 V4 B6_IO B7_IO J3 530_HI_Z [10]
[5] TXFIR_D8 V3 B6_VREF_IO B6_IO V1 RR_OUT [10,11]
[5] TXFIR_D7 U4 B6_IO B7_IO K4 ST_CLK [9]
[5] TXFIR_D6 U3 B6_IO B7_IO K5 ST_EN [10]
[5] TXFIR_D5 T4 B6_IO B7_IO K3 RX_DATA [10]
C
[5] TXFIR_D4 T3 B6_IO B7_IO L5 RX_CLK [9] C

[5] TXFIR_D3 R4 B6_IO B7_IO L4 TX_DATA [10]

[5] TXFIR_D2 R3 B6_VREF_IO B7_IO L3 TX_CLK [10]
[5] TXFIR_D1 P4 B6_IO B6_IO N5 RTS [10]
[5] TXFIR_D0 P3 B6_IO B6_VREF_IO M5 CTS [10]
[5] 2NSYM_OUT R1 B6_IO B6_IO M6 75_110# [11]
[5] NSYM_OUT P2 B6_IO B6_IO N6 75#_110 [11]
[3] IQ_D0 G1 B7_IO B6_IO P6 G703B_UB# [11]
[3] IQ_D1 G2 B7_IO B6_IO P5 G703_HI_Z [11]
[3] IQ_D2 F1 B7_IO B6_IO R5 BPV [11]
[3] IQ_D3 F2 B7_IO B6_IO T5 RDATA [11]
[3] IQ_D4 E1 B7_IO B6_IO U5 RCLK [11]
[3] IQ_D5 E2 B7_IO B7_IO L6 MCLK [11]
[3] IQ_D6 D1 B7_VREF_IO B6_IO N3 TCLK [11]
[3] IQ_D7 D2 B7_IO B5_DCIN_IO V6 TDATA [11]
[3] IQ_D8 C1 B7_DCIN_IO B1_IO B19 INT_CLK [9]
[3] IQ_D9 C2 B7_DCIP_IO B1_IO A19 INT_CLK_D3 [9]
[3] ADC_CLK B4 B0_IO B1_DCIN_IO B18 INT_CLK_D2 [9]
[3] RBB_SEL1 D10 B0_IO B1_DCIP_IO A18 INT_CLK_D1 [9]
[3] RBB_SEL2 C9 B0_IO B1_IO B17 INT_CLK_D0 [9]
[3] RBB_SEL3 D9 B0_IO B1_IO A17 COPY_CLK_D3 [9]
[3] RBB_SEL4 C8 B0_IO B1_IO B16 COPY_CLK_D2 [9]
[3] RBB_SEL5 D8 B0_IO B1_IO A16 COPY_CLK_D1 [9]
[3] FIL_CLK_LTC C7 B0_VREF_IO B1_IO B15 COPY_CLK_D0 [9]
[11] T_ENC_IN_CLK C18 B1_IO B1_VREF_IO A15 COPY_CLK [9]
[11] T_ENC_OUT_CLK E20 B2_IO B1_IO B14 TX_2NSYM [9]
[11] T_ENC_IN_DATA D16 B1_IO B1_IO A14 TX_2NSYM_D3 [9]
[11] TURBO_TX_I L17 B2_IO B1_IO B13 TX_2NSYM_D2 [9]
[11] TURBO_TX_Q K17 B2_IO B1_IO A13 TX_2NSYM_D1 [9]
[11] DEC_I/P_CLK E19 B2_IO B1_VREF_IO B12 TX_2NSYM_D0 [9]
[11] TURBO_DEC_DATA_IN C17 B1_IO B0_SGCB_IO A11 33_554MHZ_D3 [9]
[11] TURBO_DEC_CLK_IN E16 B1_IO B0_PGCB_IO B11 33_554MHZ_D2 [9]
[11] DEC_O/P_CLK D18 B1_IO B0_IO A10 33_554MHZ_D1 [9]
[11] TURBO_I0 H20 B2_VREF_IO B0_IO B10 33_554MHZ_D0 [9]
[11] TURBO_I1 H19 B2_IO B0_IO A9 33_554MHZ [9]
[11] TURBO_I2 H18 B2_IO B0_IO B9 RX_NSYM [9]
[11] TURBO_I3 G20 B2_IO B0_IO A8 RX_NSYM_D3 [9]
B [11] TURBO_I4 G19 B2_IO B0_IO B8 RX_NSYM_D2 [9] B
[11] TURBO_I5 G18 B2_IO B0_IO A7 RX_NSYM_D1 [9]
[11] TURBO_Q0 F20 B2_IO B0_IO B7 RX_NSYM_D0 [9]
[11] TURBO_Q1 F19 B2_IO B0_IO A6 AUX_CLK_D3 [9]
[11] TURBO_Q2 F18 B2_DCIN_IO B0_IO B6 AUX_CLK_D2 [9]
[11] TURBO_Q3 E18 B2_DCIP_IO B0_DCIN_IO A5 AUX_CLK_D1 [9]
[11] TURBO_Q4 E17 B1_IO B0_DCIP_IO B5 AUX_CLK_D0 [9]
[11] TURBO_Q5 D17 B1_VREF_IO B0_IO A4 AUX_CLK [9]
[11] TURBO_2_PRES J17 B2_IO B7_IO H1 UART_CLK [9]
[11] TURBO_DATA_0 D13 B1_IO B7_IO H2 CRL/TX_REF_CLK [9]
[11] TURBO_DATA_1 C13 B1_IO B6_VREF_IO P1 CRL/TX_REF_9 [9]
[11] TURBO_DATA_2 E13 B1_IO B6_IO N2 CRL/TX_REF_8 [9]
[11] TURBO_DATA_3 F13 B1_SGCB_IO B6_IO N1 CRL/TX_REF_7 [9]
[11] TURBO_DATA_4 C12 B1_IO B6_IO M2 CRL/TX_REF_6 [9]
[11] TURBO_DATA_5 D12 B1_SGCB_IO B6_IO M1 CRL/TX_REF_5 [9]
[11] TURBO_DATA_6 E12 B1_PGCB_IO B7_IO L2 CRL/TX_REF_4 [9]
[11] TURBO_DATA_7 F12 B1_PGCB_IO B7_VREF_IO K1 CRL/TX_REF_3 [9]
[11] B_TURBO_CS# D14 B1_IO B7_IO K2 CRL/TX_REF_2 [9] +1.5V
[11] TURBO_RD# E14 B1_VREF_IO B7_VREF_IO J1 CRL/TX_REF_1 [9]
[11] TURBO_WR# C14 B1_IO B7_IO J2 CRL/TX_REF_0 [9] C188
[11] TURBO_CCLK C15 B1_IO B2_IO H22 I_MON_5 [9]
E15 H21 + 15u
[11] TURBO_DONE B1_IO B2_IO I_MON_4 [9]
[11] TURBO_INIT# C16 B1_VREF_IO B2_IO G22 I_MON_3 [9]
D15 G21 10V
[11] TURBO_PROG# B1_IO B2_IO I_MON_2 [9]
[11] TURBO_PCLK F14 B1_IO B2_VREF_IO F22 I_MON_1 [9]
[12] TX_EDMAC_INT# M20 B3_IO B2_IO F21 I_MON_0 [9]
[12] RX_EDMAC_INT# M19 B3_IO B2_IO E22 Q_MON_5 [9]
[12] KEY_INT# M18 B3_IO B2_IO E21 Q_MON_4 [9] +3.3V
[11] KEY_1 R18 B3_VREF_IO B2_VREF_IO D22 Q_MON_3 [9]
[11] KEY_2 L18 B2_VREF_IO B2_IO D21 Q_MON_2 [9] C160
[11] KEY_3 L19 B2_IO B2_IO C22 Q_MON_1 [9]
B4_PGCB_IO
B5_SGCB_IO

B4_SGCB_IO
+ 15u
B5_VREF_IO

B5_VREF_IO

B5_VREF_IO

B4_VREF_IO
B3_DCIN_IO
B3_DCIP_IO

L20 C21

HSWAP_EN
[11] KEY_4 B2_IO B2_IO Q_MON_0 [9]
[11] KEY_5 K18 A2 FPGA_PROG# [12]
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX
VCCAUX

B2_IO PROG_B 10V

VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT
VCCINT

[11] KEY_6 K20 B2_IO D0 V18 DIN [12]

DONE
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO

VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO

VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO

VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
B2_IO
B7_IO

B5_IO
B5_IO

B5_IO

B4_IO
B5_IO
B5_IO

B6_IO

B5_IO
B7_IO
B6_IO

B3_IO

B5_IO
B4_IO
B4_IO
B4_IO
B4_IO

B4_IO

B4_IO
B4_IO
B4_IO

B5_IO
B4_IO

B5_IO
B5_IO
B4_IO
CS_B

W2 Y19
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
[9,11] SPARE_2 B6_IO CCLK CCLK [12]

M1
M0
M2
[9,11] SPARE_1 W22 B3_VREF_IO INIT_B AA19 FPGA_INIT# [12]
+3.3V
V2_1000
J18

N10
N11
N12
N13
N14

AA17

H16

R16

U17

AB11
AA22

AA20

AB12
AA11

AB10
AA15
AB15
AB14
AA13
M14

P10
P11
P12
P13
P14

F6

T7
T8

A12
B22
G7

G8
F17
G15
G16

T15
T16

M22

F7
F8

Y21
Y22

H17
J16

N16

AB13
AA12
AB17
AA16
AB16

U15
U16

AA14
AA18

AA10
AB18

AB20
M7

T6

K16

P16
R17

K14
K13
L1

G9
G10
G11
G12

G13
G14
F15
F16
G6

L7

G17

M16
L16

T17
T9
T10

T11
T12
T13
T14
H5

N9

H7

U6

R7

J5

H6
J7

N7

R6

U7
U8

W3
Y7
AA3
AB6
AB7

P9

AA7
AB8

AB9
AA8

AB4
AA5
AB5

AA4

B1

AA1

K7

P7

B3

AA6

AA9

AB2
AB3
A DONE 2k +3.3V +3.3V A
+1.5V +1.5V +1.5V +1.5V
TP25 R365 C320 C321
[10,11] DEMOD_LOCK .01u .01u
C326 C337 C336 C325 [10] DECODER_SYNC [9] ENC_C2 [9] E_IN_CLK [9] SECTOR_0 [9] BM11_0 [9] BM00_1
+1.5V +3.3V +3.3V +3.3V +3.3V
0.1u 0.1u .01u .01u [7] REF_TUNE_SEL [9] C0ACTIVE [9] D_OUT_CLK [9] SECTOR_1 [9] BM10_2 [9] BM00_0 [9] E_DAT0
[7] EXT_REF_ACT [9] SYNCCHGE [9] D_IN_CLK [9] SECTOR_2 [9] BM10_1 [9] BM01_2 [9] E_DAT1 [12] FPGA_DONE 5 4
[9] ENC_C0 [9] VISYNC [12] BER_D [9] BM11_2 [9] BM10_0 [9] BM01_1 [9] E_RST 6 3 +3.3V +3.3V
[9] ENC_C1 [9] VOSYNC [9] E_OUT_CLK [9] BM11_1 [9] BM00_2 [9] BM01_0 [9] D_DAT0 7 2
[9] D_DAT1 8 1 C311
[9] D_RST SELECTS SLAVE
4.7k RP28 .01u
SERIAL MODE
WARNING: LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD
THIS DRAWING CONTAINS IN FORMATION
PROPRIETARY TO COMTECH COMMUNI CATIONS
DWG NO: SC/10901
COMTECH EF DATA +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
DATE: REV C C306 C347 C352 C348 C330 C344 C329 C314 C343

UNLESS OTHERWISE AUTHORIZED IN WRI TING 2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u .01u .01u .01u
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 8 OF 13 SCALE: NONE CAGE CODE
5 4 3 2 1
 5 4 3 2 1

CRL NCO AND TX SYNTH REF

U68
C315
Fc = 10.8 MHz Zout = 173 ohms
100u REFIO 20 4.99k 10k R262
L47 INT CLK A 14
R249 +3.3V DVDD 0.1u [8] I_MON_5 RX_I [10]
[8] INT_CLK_D3 TP L55 R339 499
C312 C332 R319 R330 49.9
R264 499 1.21k 15u
C226
C276 3.9p T34 0.1u COMP1 27 [8] I_MON_4 U70B
[8] INT_CLK_D2 R229 +3.3V R338 1k 6
0.1u
R265 1k 1.3k 22 COMP2 7 RX_I
0.1u 5
C285 C262 U55 T25 5 - 10 MHz C323 [8] I_MON_3
[8] INT_CLK_D1 COMP3 16 R332 2k AD8058AR TP18
22p 22p 8

TP
R266 2k VCC INT CLK 0.1u 0.1u
4 27.4 100u C313 C342
INB+ [8] I_MON_2 R337 549
[8] INT_CLK_D0 R217 OUTB 6 INT_CLK [8] +5V 23 AVDD R331 4.02k 0.1u TP23
R267 4.02k 3 L56 25 CRL_OUT [2] R314 2k R336
D INB- R199 C331 + IOUTB D
[8] I_MON_1 GND
4.99k C322
R248 T35 TP 1 27.4 15u 24 R327 4.02k
Zout = 173 ohms INA+ ACOM 4.02k
C244 OUTA 7 COPY_CLK [8] 0.1u 20V 64.9 +3.3V
499
0.1u COPY 2 INA- R200 IOUTA 26 [8] I_MON_0
R318
CLK A 5

TP
GND COPY CLK R326 20.0k
[8] CRL/TX_REF_9 1 33.2
5 - 10 MHz DB9
LT1720CS8 T26 [8] CRL/TX_REF_8 2 499
DB8 R317
Fc = 10.8 MHz [8] CRL/TX_REF_7 3 DB7 R320 80.6k
R250 L48 [8] CRL/TX_REF_6 4 DB6 R340
[8] COPY_CLK_D3 [8] CRL/TX_REF_5 5 DB5 100p
R268 499 1.21k 15u [8] CRL/TX_REF_4 6 DB4 C349
[8] CRL/TX_REF_3 7 DB3
C277 3.9p
[8] COPY_CLK_D2 R230 [8] CRL/TX_REF_2 8 DB2 TP24
R269 1k 1.3k [8] CRL/TX_REF_1 9 DB1 4.99k 10k R263
GND [8] CRL/TX_REF_0 10 [8] Q_MON_5 RX_Q [10]
C286 C263 DB0
[8] COPY_CLK_D1 22p R315 499 R316 R311 49.9
22p 19
R270 2k [7,8] 10M_FPGA REFLO
[12] EXT_UART_CLK [8] Q_MON_4 +3.3V C335
[8] COPY_CLK_D0 R218 R313 1k +5V
R271 4.02k [8] UART_CLK 1 8 10MHz REF 11 CLOCK 2k 0.1u
[8] CRL/TX_REF_CLK 2 7 [8] Q_MON_3

8
4.99k
R251 [8] RX_CLK 3 6 T55 TP 12 WRITE R312 2k R301
C245 2 U70A
499 [8] ST_CLK 4 5
0.1u 13 SELECT [8] Q_MON_2 1 RX_Q
RP22 27 17 3
QOUTA TX_SYNTH_REF [4] R308 4.02k
15

TP
[10] STCLK DCOM R303 AD8058AR TP19
TP5 [10] RXCLK 28 [8] Q_MON_1 549

4
RESET/SLEEP C318 C319
T54 R300 4.02k R307 4.02k
21 18 R306 0.1u
CRL/TX_REF_CLK FSADJ QOUTB 64.9 TP30
GND R322 [8] Q_MON_0
4.99k R304 0.1u GND
R302 20.0k
Fc = 10.8 MHz TX 2N 2k AD9761 33.2 -5V
SYM A 499
L49 R309
R253 R298 80.6k
[8] TX_2NSYM_D3 TP R181 R296
R272 499 1.21k 15u R180 100p
T36 C227
C278 3.9p 4.99k 11.5 +5VCM
C C303 C
[8] TX_2NSYM_D2 R231 +5VCM
R273 1k 1.3k 0.1u
U56 0.1u T19
C287 C264 7 2
[8] TX_2NSYM_D1 OE VDD
22p 8

TP
R274 2k 22p VCC 5 - 10 MHz
4 4 C212
INB+ 27.4 S1 74LCX08
[8] TX_2NSYM_D0 R219 OUTB 6
R275 4.02k 3 INB- R201 6 S0 OUT 5 12 R156
4.99k 8.388MHz 11 TX_2NSYM [8]
R252 T37 TP 1 INA+ 27.4 8 X2 GND 3 13
7 27.4 TX 2N SYM
C246

TP
499 OUTA TP
0.1u 8.388 2 1 U44D 20 - 40 MHz
INA- R202 CLK_IN +5V
MHz A GND 5 T20 T27 +5V
ICS501 X4

15
26
34
43
56
65
67
87
94
LT1720CS8 U42 U89 C358

9
C374
Fc = 10.8 MHz 0.1u
L50 0.1u

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
R254
[8] 33_554MHZ_D3 [8] E_DAT1 53 ENCDAT1 +3.3V

20
R276 499 1.21k 15u [8] E_DAT0 51 ENCDATIN/DAT0
R203 R182 52
C279 3.9p ENCDAT2 ** (GROUND FOR 8PSK)
R232 4.99k 60 2 18

VCC
[8] 33_554MHZ_D2 11.5 +5VCM C0 A0 Y0 ENC_C0 [8]
R277 1k 1.3k ENCODER SECTION C1 61 4 A1 Y1 16 ENC_C1 [8]
+3.3V 55 70 6 14
C288 C265 0.1u [8] E_RST ENCRESET C0ACTIVE(C3) A2 Y2 C0ACTIVE [8]
[8] 33_554MHZ_D1 C2 62 8 A3 Y3 12 ENC_C2 [8]
22p 22p 7 2 66
R278 2k OE VDD ENCOUTCLK R350
C198 RP29 27 54 71 1
C213 ENCINCLK ENCCLKOUT OE U82A
[8] 33_554MHZ_D0 R220 4 S1 74LCX08 0.1u [8] E_OUT_CLK 8 1 4.99k
77 74LCX2244MTC +3.3V
R279 4.02k [8] E_IN_CLK 7 2 DECCLKOUT

20
6 S0 OUT 5 9 [8] 33_554MHZ
R170 [8] D_OUT_CLK 6 3 39 DECOUTCLK
4.99k
8 [8] D_IN_CLK 5 4 25 DECINCLK ROEOUT(DAT2) 85
R255 C247 8 3 10 86 11 9

VCC
499 X2 GND 27.4 DAT1 A0 Y0 D_DAT1 [8]
0.1u 47 78 13 7

TP
[8] BM00_0 R0[0] LSB/BM00(0) DECDATOUT0 A1 Y1 D_DAT0 [8]
1 CLK_IN U44C [8] BM00_1 46 R1[0] LSB/BM00(1) INSYNC 75 15 A2 Y2 5 VISYNC [8]
T28 [8] BM00_2 45 R2[0]/BM00(2) OUTOFSYNC 74 17 A3 Y3 3 VOSYNC [8]
ICS501 X4 33.554 MHz
U43 [8] BM01_0 32 R0[2] MSB/BM01(0) R2ERR 91 19 OE U82B
[8] BM01_1 31 R1[2] -MSB/BM01(1) R1ERR 92
B [8] BM01_2 30 R2[2]/BM01(2) R0ERR 93 74LCX2244MTC B
Fc = 10.8 MHz
78M05
+12V [8] BM10_0 44 28
RX N SYM A R0[1]/BM10(0) SYNCCHNG SYNCCHGE [8]
1.21k L51 1 3 38
GND

VI VO +5VCM [8] BM10_1

33
R1[1]/BM10(1)
72
[8] RX_NSYM_D3 TP [8] BM10_2 R2[1]/BM10(2) BERDONE BER_DN [12]
R280 15u + C179
499 R257 C228
T38 U27 50 1 BD8
[8] BM11_0
2

C280 3.9p R233 15u R0ERASE/BM11(0) DATA0 BD9

[8] RX_NSYM_D2 +5VCM [8] BM11_1 49 R1ERASE/BM11(1) DATA1 2
10V BD10
R281 1k 1.3k [8] BM11_2 48 R2ERASE/BM11(2) DATA2 5
0.1u 6 BD11
C289 C266 U57 T22 DATA3 BD12 T79
[8] RX_NSYM_D1 [8] SECTOR_0 24 SECTOR0 DATA4 8
22p 22p 8 23 10 BD13
TP

R282 2k VCC 5 - 10 MHz [8] SECTOR_1 SECTOR1 DATA5 [8,11] SPARE_1 TP GENERAL TP 4
4 27.4 22 16 BD14
INB+ [8] SECTOR_2 SECTOR2 DATA6 +5V
R221 6 21 17 BD15
[8] RX_NSYM_D0 OUTB SECTOR3(GROUND FOR 8PSK) DATA7 T77
R283 4.02k 3 INB- R204
74LCX08 RD* 18 +5V [8,11] SPARE_2 TP GENERAL TP 3
4.99k C369
R256 TP 1 INA+ +5V 29 R0ACTIVE*(PULL HIGH)
C248 OUTA 7 1 27.4 WR* 3 0.1u
499 2 3 27 T15
0.1u T39 INA- AUX_CLK [8] [8] D_RST DECRESET DECODER SECTION
GND 5 2 R161 CS* 80 [8] GEN_TP_2 TP GENERAL TP 2
AUX CLK A
TP

AUX CLK
LT1720CS8 U44A BA4 88 100 PIN TQFP PACKAGE 97
T30 5 - 10 MHz BA3 ADDR4 GND16 +5V T14
Fc = 10.8 MHz 84 ADDR3 GND15 90
L52 BA2 83 79

GND10
GND11
GND12
GND13
R258 ADDR2 GND14 [8] GEN_TP_1 TP GENERAL TP 1

GND1
GND2
GND3
GND4
GND5
GND6
GND9
BA1 82 99
[8] AUX_CLK_D3 ADDR1 GND7
15u BA0 81 98 C376
R284 499 1.21k ADDR0 GND8 TP13
C281 0.1u
3.9p R183
[8] AUX_CLK_D2 R234 R172 [8] RX_SYM_TP RX SYM CLOCK

4
7
12
19
37
40
59
68
69
73
76
4.99k Q1900-TQFP
R285 1k 1.3k 11.5 +5VCM [8,11,12] BA[0:22]
C290 C267 TP12
[8] AUX_CLK_D1 22p 0.1u +5V
R286 2k 22p +5V +5V [8] TX_SYM_TP TX SYM CLOCK
Q1900 T87

14

14
7 OE VDD 2
CS3#

TP
[8] AUX_CLK_D0 R222
4 C214 C378
R287 4.02k S1 74LCX08
1 2 3 4 BUF_Q1900_CS# 0.1u TBD
4.99k [12] Q1900_CS#
R259 6 S0 OUT 5 4 R171 [8] OPTION_1
C249 ADDED TO DELAY CS# PAST WR#
6 RX_NSYM [8] U83A U83B R334
A 499 0.1u 8 3 5 A
X2 GND 27.4 74ACT04 74ACT04
TP

+3.3V T29 2k
1 CLK_IN U44B [8,11,12] RD/WR# [8] OPTION_2
+12V RX N SYM R335
ICS501 X4 20 - 40 MHz
+5V U45 [8,11,12] BD[8:15]

-5V

WARNING:
THIS DRAWING CONTAINS IN FORMATION
PROPRIETARY TO COMTECH COMMUNI CATIONS
LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD
COMTECH EF DATA CLOCK GENERATION
DWG NO: SC/10901
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
UNLESS OTHERWISE AUTHORIZED IN WRI TING
DATE: REV C
2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200
Q1900 VITERBI
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 9 OF 13 SCALE: NONE CAGE CODE 1RN38
5 4 3 2 1
 5 4 3 2 1

C191
TP10 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V 18V

+
+5V TS21 TS20 TS18 TS10 TS22 TS3 TS12 TS8 TS23 TS24 TS4 TS5 TS13 TS6 TS19 TS9 TS11 TS17 TS1 TS15 TS14 TS16 TS2
RX DATA

26
45
64
71
77
80
84
88
93
98
U31 15u 10V

1
C177 (FEMALE)
0.1u CONN DB25 (A)

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
[8] RX_DATA

+5V

14
SDA 97 3
530_HI_Z# RX DATAA (USE FOR RS232) »
28 TXD T
U53B EN
SDB 100 16 RX DATA B »
[8] 530_HI_Z 3 4 3 SD_EN
17
RX CLOCKA (USE FOR RS232) »
74ACT04 99 V35TGND
TTA 92 9 RX CLOCKB »
[9] RXCLK 29 TXCE T
D
EN
TTB 95 15 D
TP8 INT TXCLOCK A (USE FOR RS232) »
4 TT_EN
TP9 12
INT CLK INT TX CLOCK B »
RX CLK 94 V35TGND
STA 87 8 DCD A »
[9] STCLK 30 ST T
EN
STB 90 10 DCD B »
[8] ST_EN 5 ST_EN
2 « TX DATA A (USE FOR RS232)
89 V35TGND
RRCA 81 14 « TX DATA B
[8,11] RR_OUT 33 DCD_DCE
EN
RRCB 79 24 « EXT TX CLOCK A (USE FOR RS232)
8 DCDCEN
RXDA 48 11 « EXT TXCLOCK B
TX DATA C197
36 RXD T
EN STBY/DTRA
TP15 +3.3V RXDB 47 20 DTRA <
« STANDBYCONTROL
11 RXDEN# EXT_COFF/DTRB
20
0.1u U35A 23
« EXT CARRIER OFF DTRB <
46 V35RGND
18 2 R149 50 RX232/RTSA 4
VCC

[8] TX_DATA Y0 A0 RTA « RS232 RXDATA RTSA <

[8] TX_CLK 16 Y1 A1 4 37 RXC T
EN TX232/DSRB
[8] RTS 14 Y2 A2 6 27.4 RTB 49 22 <
RS232 TX DATA » DSRB
[8,12] RX_232 12 Y3 A3 8 12 RXCEN# TXD_EN/RL 21
TX DATA ENABLE» RL <
OE 1 TXCA 51 RL3
38 RFLT/CTSA 5 <
TXC EN T RX TRAFFIC FAULT RELAY CTSA
TP14 74LCX2244MTC +5V R148 TXCB 53 (ENERGISED)
13 9 TFLT/CTSB 13 <
TXCEN# NO1 TX TRAFFIC FAULT RELAY CTSB
TX CLK OE_CNTL 60 7
4.99k RRTA NC1 UFLT/DSRA
41 DCD_DTE COM1 8 6 UNITFAULT RELAY DSRA
<
EN
RRTB 59
16 2 BAL_UNBAL/RTSB 19
RR_TEN# NO2 BAL/UNBAL» RTSB <
DMA 57 NC2 4
40 DSR COM2 3 18 FUSED +12 VOLTS » LL <
EN
DMB 56 +5V 1 +
15 F2 25
DMEN# FUSED -12 VOLTS » TM >
ISOLATE#2 10 FUSE_POLY_TH
-
C
[8,12] TX_232 34 RL RLA 65 100mA 7 SIGNALGROUND C
EN AGN200A4H
9 AGN200A4H 1
+5V RLEN RL1 SHIELD
TRA 75 (ENERGISED)
+5V [8] 232_DRV_EN 32 DTR NO1 9
EN 78 7 F1 P2
1:N_ACTIVE TRB NC1
NC7SZ08 7 DTREN COM1 8 +12V
5

83 FUSE_POLY_TH
RSA 100mA
31 2
V

[8] CTS RTS NO2

530_HI_Z# 2 EN 85 4
B RSB NC2
O 4 6 RTSEN COM2 3 -12V
1:N_ACTIVE# 1 1
A +5V +
[8] 530_BAL/UNBAL# 35 LL LLA 63
G

EN ISOLATE#1 10 -
U34 10
3

LLEN#
CSA 55
39 CTS EN
+5V CSB 54
14 CTSEN#
+3.3V (ENERGISED)
[11] JEFFS_RXD 42 RI ICA 61 JEFFS_RX_232 [11] NO1 9 18V 18V 18V 18V 18V 18V 18V 18V 18V
EN
NC1 7 TS52 TS51 TS50 TS49 TS48 TS47 TS46 TS45 TS44
17 ICEN# COM1 8

43 62 2 (MALE - BOTTOM
TM TMA NO2 OF STACK)
EN
NC2 4
R144 +5V 18 TMEN COM2 3
P4B
4.99k C1+ 72 +5V 1 + (ENERGISED)
C174 NO1 9 8B RX TRAFFIC N/O
19 + ISOLATE#3 10 7 15B
[8] I/F_SEL_0 M0DE_D0 1u - RL2 NC1 RX TRAFFIC N/C
[8] I/F_SEL_1 20 M0DE_D1 NC2 24 COM1 8 7B RX TRAFFIC COM
21 25V 14B
+5V M0DE_D2 AGN200A4H TX TRAFFIC N/O
R143 C1- 69 NO2 2 6B TX TRAFFIC N/C
23 LATCH# NC2 4 13B TX TRAFFIC COM
4.99k 70 3 5B
R146 C2+ COM2 UNIT FAULT N/O
+5V 27 LOOPBACK# C164 +5V 1 + 12B UNIT FAULT N/C
76 + 4B
TP4 4.99k NC1 1u UNIT FAULT COM
530_HI_Z 22 [11] RXF_RELAY 10 11B
B TERM_OFF 25V - RL7 [9] RX_I RX I B
GND [9] RX_Q 3B RX Q
C173 67 10B
C2- AGN200A4H
+

66 VSS V10_GND 58 [7] BUF_AGC 2B BUFF AGC VOLTAGE

+3.3V
1u 25V (ENERGISED) 9B EXT CARRIER OFF
C175
9 1B
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

HSMS-2812 NO1 GROUND

+5V 73 VDD NC1 7
+

R155 +3.3V COM1 8 DB15_DUAL_M/F

RP4 4.7k 1u 25V 2
96
91
86
82
74
68
52
44
25
2

OE_CNTL SP508 10k

5 4 NO2 2
6 3 3 NC2 4
7 2 COM2 3 TS40 TS41 TS42 TS43 +5V
+3.3V 8 1 +3.3V 1 +5V 1 + +5V 18V 18V 18V 18V C362

8
D8
20

U35B [11] TXF_RELAY 10 - 0.1u

RL9
2

VCC
G
0 = ISOLATED (NORMAL) +5V RE*
9 11 R150 1
VCC

Y0 A0 AGN200A4H RO 4-WIRE-TX TS37

1 = I:N SWITCH MODE 7 13 R374
[12] STANDBY# Y1 A1
5 15 (ENERGISED)
680 7
[6] EXC_OFF_25# Y2 A2 2.21k A
SW SLIDE-SPDT [8] 1:N_ON# 3 17 9 4
Y3 A3 NO1 DI
NC1 7 [8] 4W_DRV_EN 3 DE B 6 18V
+5V HSMS-2812
+5V OE 19 COM1 8 TS36
SW1
14

74LCX08 +3.3V C359 LTC1485CS8 U85

3 74LCX2244MTC 2 NO2 2
2 530_HI_Z# 1 U53C 4
R355 NC2
R169 3 5 6 1:N_ACTIVE# +3.3V 3 3
COM2 +5V +5V 18V
1 2 10k +5V 1 + 0.1u P3B
499 74ACT04 U54 1 (ENERGISED)
U90A [11] UF_RELAY 10 - NO1 9 U84 5B

8
HSMS-2812 RL8 R342 GROUND
1 16 ISOLATE#1 D9 7 9B
D2 I1 O1 NC1 R344 TXA (RS485)
TS25 +3.3V 8 2 4.99k 4B

VCC
G
AGN200A4H COM1 [8] RCVR_EN* RE* 4.99k
18V LED_RED_SM 1:N_ACTIVE 2 15 ISOLATE#2 2 R160 1 8B
I2 O2 [8] 485_RX_DATA RO TXB (RS485)
NO2 2 3B RX (RS232)
CAUTION 3 14 ISOLATE#3 3 4 7 7B
I3 O3 2.21k NC2 A RXA (RS485)
3 4 2B
4 13 ISOLATE#4 1
R159 RELAYS SHOWN IN 1
COM2 [8] 485_TX_DATA
3
DI
6 6B
TX (RS232)
332 I4 O4 +5V + [8] 2W_DRV_EN DE B RXB (RS485)

R90 5 12 D13 10k +3.3V THE ENERGISED ISOLATE#4 10

1B GROUND
I5 O5 - 2-WIRE TRANS LTC1485CS8 TS32 TS34
RL4
A
6 11
STATE PLUS 4-WIRE RX 18V 18V
DB9_DUAL_M/F A

I6 O6 DEM_LCK_LED [11] AGN200A4H

R375 (MALE - BOTTOM
[8,11] DEMOD_LOCK OF STACK)
[8] DECODER_SYNC 7 I7 O7 10 DEC_LCK_LED [11]
2.21k
8 GND D 9 TS33
+5V 15_PIN_C_OFF [7]
ULN2003D1

TS35 18V
WARNING: LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD 18V
THIS DRAWING CONTAINS IN FORMATION
PROPRIETARY TO COMTECH COMMUNI CATIONS
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE DATE: DWG NO: SC/10901 REV C
COMTECH EF DATA SERIAL INTFC,
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
UNLESS OTHERWISE AUTHORIZED IN WRI TING
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 10 OF 13 SCALE: NONE CAGE CODE 1RN38
2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200 EIA530 INTFC, ALARMS
5 4 3 2 1
 5 4 3 2 1

J7 J4
RS/EXPANSION CONNECTOR 1
TURBO CONNECTOR 1
+3.3V 1 +3.3V 1
2 2 2 2
3 3 3 3
J8 4 4
4 4
+5V 5 5 5 5

14
1 2 +5V 6 6 6 6
U53E 3 4 68u 7 7 7 7
W2 +
R130 5 6 8 8 8 8
11 10 1 7 8 +3.3V 16V 9 9
[8,12] FSK_TXD +5V 9 +5V 9
2 9 10 C382 10 10
499 [5] CIMTXCLK 10 10
74ACT04 3 [5] CIMRXCLK 11 12 [8,9,12] BD[0:15] 11 11
TS7 11 11
[8] CIM_PRES 13 14 QSPI_CS0# [12] 12 12 12 12
SELECT DEBUG PORT 18V CON3 15 16 BD8 13 13
CLI_ACTIVE [12] [8] CIM_TX_DATA SPARE_1 [8,9] 13 13
17 18 BD9 14 14
2P_HDR [8] CIM_RX_DATA QSPI_DIN [12] 14 14
R141 19 20 BD10 15 15
D [8,10] RR_OUT QSPI_DOUT [12] 15 15 D
2 1 21 22 BD11 16 [8] TURBO_TX_I 16
+5V [8] CIM_INT_IN QSPI_SCLK [12] 16 16
23 24 BD12 17 17
W3 4.99k [8] CIM_CARRIER_CONTROL 17 [8] TURBO_TX_Q 17
25 26 BD13 18 18
+5V [8,9] SPARE_2 T84 18 [8] T_ENC_OUT_CLK 4 5 18
27 28 BD14 19 [8] TURBO_2_PRES 19
[10] JEFFS_RX_232 [8] CIM_ASYNC_TX 19 [8] DEC_I/P_CLK 3 6 19
29 30 BD15 20 20
U29 [8] CIM_ASYNC_RX TP QSPI SCLK 20 [8] DEC_O/P_CLK 2 7 20

5
BD7 21 21
21 [8] T_ENC_IN_CLK 1 8 [8,10] DEMOD_LOCK 21
1 T83 BD6 22 22

VCC
B1 JEFFS_RXD [10] HEADER 15X2 22 RP20 27 [8] TURBO_I0 22
4 BD5 23 23
[12] 2ND_SERIAL_RX A TP QSPI DOUT 23 [8] TURBO_I1 23
6 BD4 24 24
S 24 [8] TURBO_I2 24
CIM INTERFACE CONNECTOR T41 BD3 25 25

GND
25 [8] TURBO_I3 25
3 BD2 26 26
B0 FSK_RXD [4] TP QSPI DIN BD1 26 [8] TURBO_I4 26
[8,9,12] BA[0:22] 27 27 [8] TURBO_I5 27 27
T86 BD0 28 28
NC7SBU3157 JEFF'S ADDITIONAL PORT CON34

2
BA7 28 28
TP QSPI CS0# 29 29 [8] TURBO_Q0 29 29
BA6 30 30
34 30 [8] TURBO_Q1 30
L62 [12] USB- BA5 31 31
33 31 [8] TURBO_Q2 31
BA4 32 32
+5V 32 32 [8] TURBO_Q3 32
33u [12] USB+ BA3 33 [8] TURBO_Q4 33
C341 31 33 33
C408 + + C447 [8,9,12] BA[0:22] BA2 34 [8] TURBO_Q5 34
DT1608 15u 30 BA1 34 34
35 35
TP

T60 +3.3V 15u 29 35 35

SER CLK 20V 10V [8,9,12] BD[0:15] BA0 BA0 36 36
28 36 [8] TURBO_DEC_DATA_IN 36
BA1 37 37
U74 0.1u 27 [2,4,5,6,7,8] SER_CLK 37 37
8
BD8 +3.3V 38 38
26 [2,4,5,6,7,8] SER_DATA 38 [8] TURBO_DEC_CLK_IN 38
1 VCC 4 BD9 39 39
[8] EEPROM_EN CS DO EEPROM_SER_DO [8] 25 [8] EXPANSION_PRES 39 [8] T_ENC_IN_DATA 39
BD10 40 40
24 [12] QSPI_CS2# 40 40
2 6 BD11 R354 41 41
[2,4,5,6,7,8] SER_CLK SK ORG 23 [12] QSPI_DIN 41 [8] TURBO_INIT# 41
BD12 4.99k 42 42
22 [12] QSPI_DOUT 42 [8] TURBO_DONE 42
3 5 BD13 43 43
[2,4,5,6,7,8] SER_DATA DI GND 21 [12] QSPI_SCLK 43 [8] TURBO_PROG# 43
BD14 44 BA3 44
20 [8] RS_SCRAM_EN/EXP_CS# [8,9,12] RD/WR# 44 44
AT93C66A-10SI-2.7 BD15 45 BA4 45
TP

T58 19 [8,12] OE#(RD#) 45 R239 45

[8] KEY_6 RP26 27 46 [8] TURBO_CCLK 46
SER DATA 18 46 BA5 46
[8] KEY_5 17 [8,9] SPARE_1 4 5 47 47 27.4 47 47
[8] KEY_4 16 [8] RS_PROC_CLK 3 6 48 48 48 48
[8] KEY_3 15 [8] RS_TX_CLOCK 2 7 49 49 [8] B_TURBO_CS# 49 49
NC7SBU3157 [8] KEY_2 14 [8] RS_RX_CLOCK 1 8 50 50 [8] TURBO_WR# 50 50
2

[8] KEY_1 13 [8] RS_INT_DEPTH_SEL 51 51 R142 [8] TURBO_RD# 51 51

3 52 BA6 52
GND

B0 12 [8] RS_DESCRAM_EN 52 +3.3V 52

C [12] VFD_EN 11 [8] RS_TX_IN_CLK 53 53 4.99k 53 53
C
6 S ULN2003D1 10 [8] RS_CORR_DIS 54 54 R241 [8] TURBO_DATA_0 54 54
4 QSPI_DIN [12] GREEN_STATUS_LED 55 55
VCC

A 9 [8] RS_ENC_DATA_OUT 55 [8] TURBO_PCLK [8] TURBO_DATA_1 55

1 B1 8 GND D 9 +5V 8 [8] RS_ENC_DATA_IN 56 56 27.4 [8] TURBO_DATA_2 56 56
7 [8] RS_CCLK 57 57 [8] TURBO_DATA_3 57 57
U38 7 10 R345 [8] RS_DONE 58 [8] TURBO_DATA_4 58
5

C204 I7 O7 6 58 58
5 27.4 [8] RS_CDATA 59 59 [8] TURBO_DATA_5 59 59
+3.3V 6 11 RED_STATUS_LED 60 60
I6 O6 4 [8] RS_PROG# 60 [8] TURBO_DATA_6 60
3 [8] RS_SYNC 61 61 [8] TURBO_DATA_7 61 61
0.1u 5 12 TX_TRAFFIC_LED 62 BA2 62
I5 O5 2 [8] RS_PRES 62 62
63 BA1 63
1 [8] RS_RX_IN_CLK 63 63
R168 4 13 RX_TRAFFIC_LED 64 BA0 64
I4 O4 [8] RS_DEC_DATA_IN 64 64
J10 65 BA7 65
[8] RS_DEC_DATA_OUT 65 65
3 14 ONLINE_LED 66 66
100 I3 O3 [8] RS_CODE_RATE_SEL 66 66
C205 67 67
[8,10] DEMOD_LOCK 67 [8,9,12] BA[0:22] 67
120p 2 15 STORED_EVENT_LED 68 68
C200 I2 O2 [8,9] SPARE_2 68 [8] 3GPRES 68
[8,10] RR_OUT 69 69 69 69
1 16 REMOTE_LED 70 70

TP
+3.3V I1 O1 70 70
U87 71 71 71 71
U102 72 T67 72
U39 0.1u 72 72
8

1 16 EDMAC_LED
I1 O1
1 4
VCC

[12] QCS3 CS DO SIMM72 SIMM72

2 15 TEST_LED
I2 O2
[12] QSPI_SCLK 2 SK ORG 6
[8] G703B_UB# 3 14 B_UB#
I3 O3
[12] QSPI_DOUT 3 DI GND 5 XFMR3 E1
4 13 HI_Z_REL TS39
[8] G703_HI_Z I4 O4 G.703 INTERFACE PE68864 UNBAL

2A
AT93C66A-10SI-2.7 11.5 18V OUT
[8] UNIT_FAIL 5 I5 O5 12 UF_RELAY [10] 3 12
T78 1A
R364 J9A
6 11

TP
[8] TX_TRAFF I6 O6 TXF_RELAY [10] MCLK U88 LXT350 C375
R328 R363
[8,9,12] BD[0:15] [8] RX_TRAFF 7 I7 O7 10 RXF_RELAY [10] [8] MCLK 1 MCLK TRING 16 1 10
U80 P4A
27.4 49.9 1:2
BD15 47 2 8 9 8A
I0 O0 GND D +5V 27.4 220p RL6
BD14 46 3 2 C372 C373 C368 15A
I1 O1 [8] TCLK TCLK
BD13 44 5 ULN2003D1 R358 0.1u 0.1u 0.1u 7A
5
6
7
8

I2 O2 R321 (ENERGISED)
BD12 43 6 4 13 9 14A

TP
B
BD11 I3 O3 C356 TCLK TNEG/INSBPV TTIP NO1 B
41 I4 O4 8 4.7k 49.9 NC1 7 6A
BD10 40 9 T66 T75 11 8 13A
I5 O5 RP30 +3.3V JASEL COM1
4
3
2
1

BD9 38 11 5A

TP
I6 O6 RDATA R357
BD8

20
37 I7 O7 12 0.1u U81A +5V 5 MODE NO2 2 12A
BD7 36 13 4 4A
BD6 I8 O8 11.5 NC2
35 14 18 2 6 +5V 3 11A

VCC
I9 O9 [8] BPV Y0 A0 RNEG/BPV C380 COM2 OUT-
BD5 33 16 16 4 7 1 3A
I10 O10 [8] RDATA Y1 A1 RPOS/RDATA + OUT+
BD4 32 17 R362 14 6 R353 +12V 10A
I11 O11 [8] RCLK Y2 A2
BD3 30 19 12 8 8 18 HI_Z_REL 10 2A
I12 O12 182 [8] G703_SDO Y3 A3 RCLK N/C -
BD2 0.1u

13
29 I13 O13 20 R361 27.4 9A IN-
BD1 27 22 1 25 10 U91 1A
I14 O14 182 OE EC3 N/C ADG453BR AGN200A4H TS53 IN+
BD0 26 23 R360

TP

V+
I15 O15 RCLK T65
R348 R359 74LCX2244MTC R352 23 3 2 DB15_DUAL_M/F
182 D17 EC1 S1 D1
[8] LED_STROBE 48 CP1/ VCC 42 +5V 4.99k 1 IN1 AGN200A4H (FEMALE -
182
27.4 25 CP2/ VCC 31 R93 12 LOS 18V TOP OF STACK)
18 D16 +5V 14 15 B_UB# 10
TP

VCC 182 S2 D2 -
LED STROBE T69 1 OE1/ VCC 7 T1 R347 [2,4,5,6,7,8] SER_DATA 24 EC2 16 IN2
24 R91 D15 1 1B J9B
OE2/ 4.99k +
4 45 E1-UNBAL +3.3V [8] TDATA 3 11 10 3
GND GND 182 TPOS/TDATA S3 D3 +5V COM2 E1UNBAL
R351 10 39 R92 D14 [8] 75_110# 9 4

2B
GND GND LED_YELLOW_SM T74 IN3 NC2 IN
15 34 +3.3V 9 2

TP
4.99k GND GND 182 E1-BAL TDATA TRSTE NO2
21 28 D5 6 7
GND GND LED_YELLOW_SM S4 D4
ON LINE +3.3V [8] G703_EN# 26 8 8
D3 RLOOP IN4 COM1
+3.3V 74ABT16374 NC1 7
+3.3V LED_YELLOW_SM
28 R367 5 12 9

V-
+5V +5V +5V D4 V.35 TAOS GND VL NO1
+5V LED_GREEN_SM 18.2
(ENERGISED)
RS422 +3.3V [2,4,5,6,7,8] SER_CLK 27 +5V

4
LLOOP 0.1u
+12V LED_YELLOW_SM RL5 TS54 TS38
C361 C365 C364 RS232 +3.3V 21 -12V
+5V VCC
0.1u 0.1u 0.1u R370
+3.3V LED_YELLOW_SM +3.3V 15 TVCC C379
C371 24.9
20

U81B 68u 75#_110 [8] 18V 18V

LED_YELLOW_SM +
0.1u 16V
11 9 19
VCC

D7 [4] MOD_LO_LOCK A0 Y0 MOD_LO_LD [8] RTIP

R131 [2] RX_1ST_LO_LOCK 13 7 RX_1ST_LO_LD [8] C367
A1 Y1
[10] DEM_LCK_LED +5V 15 A2 Y2 5 14 TGND
499 [7] REF_PLL_LOCK 17 A3 Y3 3 REF_PLL_LD [8] R368 R366 R369 5 8
A DEMOD LOCK 17 A
LED_GREEN_SM GND 49.9 100 1k
19 OE
D6 22 GND
R124 +5V R346 74LCX2244MTC RRING 20 6 7
[10] DEC_LCK_LED 4.99k 1:1
DECODER SYNC
499
LED_GREEN_SM

G.703 INTFC, RS, TURBO

WARNING:
THIS DRAWING CONTAINS IN FORMATION
PROPRIETARY TO COMTECH COMMUNI CATIONS
LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD
COMTECH EF DATA AND EXP CONNS,
DWG NO: SC/10901 REV C
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
UNLESS OTHERWISE AUTHORIZED IN WRI TING
DATE:
2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200
CIM CONN, LEDs
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 11 OF 13 SCALE: NONE CAGE CODE 1RN38
5 4 3 2 1
 5 4 3 2 1

TP T32
RESET# +3.3V
+5V
MANUAL

14
U90B
R373 RESET
4.99k +3.3V +3.3V +3.3V +3.3V
4
RESET 12 13 6 W5
C259 C272 C298 C297 +3.3V U75
5 1 2
U53F 0.1u 0.1u 0.1u 0.1u C271 +3.3V D16 2 47 BD0

TP
RESET
74LCX08 2P_HDR SDRAM D17 3
B0 A0
46 BD1
74ACT04 B1 A1
T50 + 15u D18 5 44 BD2 +3.3V
+3.3V B2 A2
C333 D19 6 43 BD3 KICK
10V U69 D20 B3 A3 BD4

35
41
49
55
75
81
.01u 8 B4 A4 41 DOG

3
9
+3.3V +3.3V +3.3V +3.3V +3.3V +3.3V D21 BD5 C357
9 B5 A5 40
D22 11 38 BD6 0.1u T59
TIMEKEEPER

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
[8,10] RX_232 +3.3V R349 C234 B6 A6
C260 C235 C273 2 D0 D23 12 37 BD7

TP
[8,10] TX_232 +3.3V D0 B7 A7
[8] PRX_232 4.99k 0.1u 0.1u 0.1u 0.1u C310 C327 43 VDD D1 4 D1 D24 13 B8 A8 36 BD8
U78
SRAM
C210 .01u .01u 29 5 D2 D25 14 35 BD9
D [8] PTX_232 U41 VDD D2 B9 A9 D
0.1u 15 7 D3 D26 16 33 BD10 KICK_DOG 14 18 BD8
D[0:31] VDD D3 D4 D27 B10 A10 BD11 WDI D0 BD9
4 /EN 1 VDD D4 8 17 B11 A11 32 D1 19
10 D5 D28 19 30 BD12 BA0 17 20 BD10
A[0:22] A2 D5 D6 D29 B12 A12 BD13 BA1 A0 D2 BD11
1 A B 2 25 A0 D6 11 20 B13 A13 29 16 A1 D3 24
R158 A3 26 13 D7 D30 22 27 BD14 BA2 15 25 BD12
A1 D7 B14 A14 A2 D4

D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
A4 D8 D31 BD15 BA3 BD13

A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
NC7SZ384 27 74 23 26 11 26

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
4.99k

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A5 A2 D8 D9 B15 A15 BA4 A3 D5 BD14
60 A3 D9 76 +3.3V 10 A4 D6 27
U40 A6 61 77 D10 BUF_OE# 48 42 BA5 9 28 BD15
A7 A4 D10 D11 OE1# VCC BA6 A5 D7
4 62 79 25 31 8

G11

G12
G13
G14
T64 TP

H11

D11

H14
H13

D10

C12
C13
C14
D12
C11

C10
K11
K12
K13
K14

E11

E10

B12
A12
A13
A14
B13
B14

B11
A11
F11

F12
F13
F14
L12
L13
L14
/EN A5 D11 OE2# VCC A6

J11
J12
J13

C7

D9
D8
D7
C6
D6

C5
A8 D12 C355 BA7 1SEC_INT

A5
B6
A6

B7
A7
A8
B8

B5

E9
TIES RS-232 U62 63 A6 D12 80 1 T/R1# VCC 18 7 A7 IRQ*/FT 40
LINK DIRECTLY 1 2 A9 64 82 D13 24 7 .01u BA8 37
A B A10 A7 D13 D14 T/R2# VCC BA9 A8
TO uP FOR 65 83 36

D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31

A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11 A8 D14 D15 BA10 A9 POR#
FLASH UPLOADS NC7SZ384 66 85 +3.3V 4 45 +3.3V 31 2
A9 D15 D16 GND GND BA11 A10 POR*
H1 PB1/UART0_RxD RP18 D16 31 10 GND GND 39 35 A11
D17 CS5# C339 BA12
H4 PB0/UART0_TxD A10_PRECHARGE D14 1 8 24 A10(PRECHARGE) D17 33 15 GND GND 34 6 A12 +3.3V R333
FLASH_232_EN# H2 A10 19 34 D18 T57 .01u 21 28 C340 BA13 38 44
[11] QCS3 PB2/UART0_CTS RAS0# 2 7 RAS# D18 GND GND A13 VCC 1.3k
KICK_DOG F3 C9 18 36 D19 BA14 5

TP
PB5/TA CAS0# 3 6 CAS# D19 0.1u A14
P1 B9 17 37 D20 MC74LCXR162245
T33 TP PA7/QSPI_CS3/PLIC_DOUT3 SDWR_EN 4 5 WE# D20 D21
RP16 39 30
27 D21 D22 CE C360
M4 INT1#/USB_WOR BS0# A9 1 8 16 DQM0 D22 40 34 OE +3.3V
C8 71 42 D23 39 22 0.1u
RESET# M12 RESET_IN#
MOTOROLA MCF5272 COLDFIRE BS1#
BS2# E12
2
3
7
6 28
DQM1
DQM2
D23
D24 45 D24
+3.3V
WE GND
R238 E13 59 47 D25 A0 47 2 BA0
BS3# 4 5 DQM3 D25 I0 O0 M48T37V
N12 48 D26 A1 46 3 BA1
4.99k
DRESETEN# 64 MIPS @66.67 MHz SDB0 J14
RP17
1 8
27
22 BA0
D26
D27 50 D27 A2 44
I1
I2
O1
O2 5 BA2 C317
[8] KEY_INT# N3 H12 23 51 D28 A3 43 6 BA3 0.1u FLASH
INT3# SDB1 2 7 BA1 D28 I3 O3 U79
P2 E14 68 53 D29 A4 41 8 BA4
[8] TX_EDMAC_INT# INT4#/PLIC_P3_DIN SDCLK 3 6 CLK D29 I4 O4
EXT_UART_INT M3 D13 67 54 D30 A5 40 9 BA5 BA1 25 29 BD0
PA15/INT6# SDCLK_EN 4 5 CKE D30 D31 A6 I5 O5 BA6 BA2 A0 D0 BD1
27 R240 D31 56 38 I6 O6 11 24 A1 D1 31
K4 B10 20 A7 37 12 BA7 BA3 23 33 BD2
[8,11] FSK_TXD IDL/GCI_DOUT/UART1_TxD CS7/SDRAM CS# +3.3V I7 O7 A2 D2
K1 A8 36 13 BA8 BA4 22 35 BD3
[11] 2ND_SERIAL_RX IDL/GCI_DIN/UART1_Rx_D I8 O8 A3 D3

GNDQ
GNDQ
GNDQ
GNDQ
GNDQ
GNDQ
GNDQ
GNDQ
K2 E7 27.4 A9 35 14 BA9 BA5 21 38 BD4

GND
GND
GND
GND
[11] QSPI_CS2# UART1_CTS/QSPI_CS2 VSS I9 O9 A4 D4
K3 E8 R325 4.99k A10 33 16 BA10 BA6 20 40 BD5
[8] RX_EDMAC_INT# UART1_RTS/INT5# VSS I10 O10 A5 D5
J4 F7 C334 A11 32 17 BA11 BA7 19 42 BD6
P0D_CLK/UART1_BAUD_CLK VSS +3.3V T88 I11 O11 A6 D6
TO CiM MODULE F8 0.1u A12 30 19 BA12 BA8 18 44 BD7

44
58
72
86
84
78
52
46
38
32
12
6
VSS A13 I12 O12 BA13 BA9 A7 D7 BD8
G6 FPGA CS4# 29 20 8 30

TP
AND FPGA R210 VSS +3.3V I13 O13 A8 D8
L5 G7 A14 27 22 BA14 BA10 7 32 BD9
[11] QSPI_SCLK QSPI_SCLK/BUSW1 VSS I14 O14 A9 D9
C 27.4 R211 G8 +3.3V RP10 4.7k A15 26 23 BA15 BA11 6 34 BD10 C
VSS T89 MT48LC2M32B2 +3.3V C309 I15 O15 BA12 A10 D10 BD11
[11] QSPI_DOUT N4 QSPI_DOUT/WSEL VSS G9 4 5 5 A11 D11 36
H6 1 42 BA13 4 39 BD12

TP
27.4 VSS 3 6 0.1u OE1/ VCC +3.3V A12 D12
P4 H7 TURBO CS1# C328 48 31 BA14 3 41 BD13
[11] QSPI_DIN QSPI_DIN VSS 2 7 OE2/ VCC A13 D13
M5 H8 25 18 BA15 2 43 BD14
[11] QSPI_CS0# QSPI_CS0#/BUSW0 VSS 1 8 +3.3V 0.1u R324 OE3/ VCC A14 D14
H9 24 7 C345 BA16 1 45 BD15
VSS 4.99k R227 OE4/ VCC BA17 A15 D15
L4 FSC1/FSR1/DFSC1 VSS J7 27 RP13 0.1u 48 A16
RP7 4.7k VFD_EN# 4.99k BA18
+3.3V M1 DCL1/GDCL1_OUT VSS J8 8 1 4 GND GND 45 17 A17 RDY/BSY# 15
N2 G2 TIMEKEEPER_CS# 10 39 BA19 16 13
1 8 DIN1 USB_GND 7 2 +3.3V GND GND +3.3V BA20 A18 NC
2 7 N1 DOUT1 6 3 FPGA_CS# [8] 15 GND GND 34 9 A19 +3.3V
P12 Q1900_CS# [9] 21 28 BA21 10 37
3 6 CS6/ 5 4 C338 GND GND C316 A20 VCC
4 5 CS5/ L11 27.4 +3.3V
CS4/ M11 TURBO_CS# [8] 0.1u 74LCXH162244 0.1u 47 BYTE#
N11 R237 U73 C366
SELECTS 16 BIT FPGA_CCLK_EN CS3/ R D/WR#
BUS
L1 PA11/QSP1_CS1 RD/WR# P14 1 8 11 WE# .01u
WIDTH FOR CS0# [8] FPGA_INIT# J2 P13 OE#(RD#) 28 27
SELECTS 32 PA8/IDL_FSRO/FSCOPLIC_DOUT3 OE#/RD 2 7 FLASH_CS# OE# GND
[8] FPGA_DONE J3 PA9/IDL_DGNTO CS0/BOOT K9 3 6 26 CE# GND 46
B IT UART_CS# RESET#
BUS WIDTH [8] FPGA_PROG# K5 PA10/IDL_DREQ_0 CS2/ P11 4 5 12 RESET#
G4 K10 14

TP
[7] 5VOLT_OK PB6 CS1/ U66A RP19 27 UART 8 1 +3.3V FLASH WPP#/ACC
L2

TP
[7] -5VOLT_OK PA12/DFSC2 U66B T81 CS2# 7 2
[7] 12VOLT_OK L3 1 T73 CS0# AM29LV320D BOOT BLOCK
PA13/DFSC3 6 3
[7] -12VOLT_OK M2 PA14/DREQ1 BYPASS M13 2 12 3 R290 5 4 UNPROTECT
[7] 23VOLT_OK H3 PB3/UART0_RTS 13 4 6 1 2
74LCX11 5 4.7k RP21 +3.3V W4 +3.3V
27.4
G3 PB4/UART0_BAUD_CLK TEST# E6 2P_HDR
74LCX11 +3.3V

20
[11] CLI_ACTIVE M6 PB7/TIMER0_OUT_COMP +3.3V U72A
U66C
L6 TIN0 11
C299 A16 BA16 R341 TP28
P5 10 8 2 18

VCC
PWM_COMP_O1/TIMER1_OUT_COMP Z +3.3V A17 A0 Y0 BA17 4.99k
K6 9 0.1u 4 16 TP29 RD#
PWM_COMP_O2/TIMER1_IN A18 A1 Y1 BA18
N5 6 14
T24 USB_CLK
PWM_OUT_COMP0
G1 74LCX11 C296 A19 8
A2 Y2
12 BA19 WR#
J1
USB_VDD
F1 USB PORT 0.1u R295 R323
A3 Y3
TP USB_CLK USB_D+ PDIUSBP11AD OE#(RD#) [8,11]
M14 F2 RP15 27 1
EXT_CLK USB_D- 1.69k OE +3.3V
D2 12 R288 33.2
TCK/BDM_PSTCLK

PA0/USB_Tx+ 1 8 VPO 4.99k RD/WR# [8,9,11]

TRST#/BDM_CLK
TDO/BDM_DOUT

E4 13 11 74LCX2244MTC
TMS/BDM_BKPT

PA3/USB_Tx- 2 7 VMO/FSEO D+ USB+ [11]

PB14/E_RxERR

B3 D1 4 C324
PB11/E_RxD3
PB12/E_RxD2
PB13/E_RxD1
TDI/BDM_DIN

MTMOD PA1/USB_Rx+ 3 6 VP 33.2 BA[0:22] [8,9,11]

PB10/E_TxD1

PB15/E_MDC
PB8/E_TxD3
PB9/E_TxD2

E5 5 10 0.1u
DEBUG_D0
DEBUG_D1
DEBUG_D2
DEBUG_D3

USB- [11]

RST_OUT#
PA2/USB_Rx- 4 5 VM D- +3.3V
N14 E3 6

SPEED
R289
E_TxERR
E_RxCLK

E_TxCLK

HI-Z PA4/USB_SUSP SUSP [8,9,11] BD[0:15]

MODE
B +3.3V B
E_RxDV

E_MDIO
E_TxEN
E_RxD0

E_TxD0

20
E2 2
E_CRS

E_COL

U72B

VCC
PA5/USB_TX_EN OE#
INT2#

RP6 4.7k +3.3V

LED_GREEN_TH_RA
PST0
PST1
PST2
PST3
TEA#

LED_YELLOW_RA
E1 3 7
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

PA6/USB_RxD RCV GND +3.3V A20 BA20

11 9 UART

VCC
1 8 R260 27.4 A0 Y0 U86
U67 A21 13 7 BA21
D10

14
1
9
2 7 A22 A1 Y1 BA22 BD8
MFC5272 15 5 +3.3V 17 1
H10

J10

N13

N10
F5
F6
F9
F10

M9

M7

M8

P10
F4
G5
G10

M10
L10

L9

L8

L7
D5
D4
C3

C2
C1
D3
C4

H5

J5
J6
J9

N9

N7

N8

N6
A3

B4
A4

A2
B2
A1
B1

K7
K8

P9

P7

P8

P6

P3

3 6 6.8u A2 Y2 RI* D0 BD9

C300 C225 Z [9] BER_DN 17 3 2
4 5 A3 Y3 BER_D [8] D1 BD10
TP T40 27 CD* D2 3
+3.3V 6.8u 0.1u .01u +3.3VA L53 19 4 BD11
22p +3.3V D11 OE D3
RST_OUT# BA0 21 5 BD12
4.99k BA1 A0 D4 BD13
1 8 +3.3V L45 +3.3V 74LCX2244MTC 20 A1 D5 6
100 BaseTx R305 BA2 19 7 BD14
2 7 A2 D6
3 6 C221 RST_OUT# ACTIVITY R216 D7 8 BD15
27

39

33

12

22
21

40
51
182 R310 16
4
3
2
1

4 5 BACKGROUND U63 LXT972A RD#

5
6

8
10

19
18
17
16
15
14
13
12
24

182 14 WR# TX_D 10 AUX_SER_TX [7]

2
8

RP9 4.7k
DEBUG PORT 4 PWRDWN 38 11
MDDIS
PAUSE

VCCA
VCCA

VCCD
TXSLEW0
TXSLEW1
ADDR0

VCCIO
VCCIO
J5 RST# LED/CFG1 CS#
RP11

43 MDC LED/CFG2 37 R244 RTS* 22 C_OFF_PROC [6]

5
6
7
8

CON26A 42 36 TP21 [7] AUX_SER_RX 9 23

MDIO LED/CFG3 RX_D DTR*
TP17 64 4.99k [6] EXT_CARR_OFF# 25
26
23
20
11
5
3
22
21
6
1
25
9
7

MDINIT# +3.3V CTS* EXT_UART_INT

54 30 TP T43 C254 [10] STANDBY# 26 18
RESET# 62
TXER TCK
29
GND DSR* INT
COL TMS TP T47 .01u RESET
55 TXCLK TDI 27 TP T44 6.8u 24 RESET VCC 28 +3.3V
T23 +3.3V 56 28
GND TXEN TDO TP T51 +3.3VA
57 31 12
TP

PROC CLK 1 8 TXD0 TRST# TP T53 L54 [9] EXT_UART_CLK EXT_CLK

58 ETHERNET PHY C370
66.667MHZ_CPU 2 7 TXD1 2kV
59 19 1 16 13 .01u

TP
3 6 TXD2 TPOP TX+ TX_0+ J6 XTAL2
4 5 60 TXD3 TPON 20 C284 C275 GND 15
53 RXER TPIP 23 2 TX-CT TX_0_CT 15 T80
RP8 27
C223 C217 52 RXCLK TPIN 24 .01u 1000p 1 ST16C1450CJ28
1 8 49 RX_DV GND 61 3 TX- TX_0- 14 2
+3.3V R198 +3.3V 63 50 3
27.4 2 7 CRS GND
3 6 48 RXD0 GND 41 4 +5V
REFCLK

14
U52 .01u U51 .01u 4 5 47 RXD1 GND 34 8 RX- RX_I+ 11 5
4

RBIAS

46 35 6
GND
GND
GND
GND
GND
GND
GND
GND
GND

RP12 27 RXD2 GND C256 U83F

XO

45 32 C255 7 10 7
VDD

VDD

8 1 RXD3 GND RX_CT RX_I_CT R356

R179 R167 27.4 270p 8 VFD_EN# 13 12
7 2 1000p VFD_EN [11]
+3.3V 1 3 +3.3V 1 3 6 9 27.4
2

26
25
7
11
13
14
15
16
18

17

INH* OUT INH* OUT 6 3 RX+ RX_I- R246 R247 VFD 74ACT04
GND

GND

TP
5 4 Y1 2kV R261
A 2k 2k R190 C274 H1102 XFMR2 49.9 49.9 R292 RJ45 CS6# A
27 RP14 25.0 MHz +3.3VA
TP16 270p R226 R228 49.9 49.9 T71
C261
F4100-480 F4100-666 C302 49.9 49.9
2

+3.3V +3.3V +3.3V +3.3V +3.3V C237 .01u +3.3V

+5V C238 R212
CPU AND USB GND 22p + 15u R245 T82
22p 20.0k 74LCX08 FPGA CDATA

TP
R213 49.9 R291
CLOCK GENERATION C236 C295 C239 C294 C283 10V 49.9 C377 12 R371
.01u .01u 0.1u 0.1u 0.1u 2.21k 0.1u 11 DIN [8]
13 27.4
U90D
C301 2kV QSPI_DOUT T85
WARNING: LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD 1000p T68 FPGA CCLK

TP
THIS DRAWING CONTAINS IN FORMATION
COMTECH EF DATA QSPI_SCLK 9

TP
QSPICS1 R372
PROPRIETARY TO COMTECH COMMUNI CATIONS 8 CCLK [8]
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE DATE: DWG NO: SC/10901 REV C FPGA_CCLK_EN 10 U90C 27.4
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
UNLESS OTHERWISE AUTHORIZED IN WRI TING 2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200 74LCX08
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 12 OF 13 SCALE: NONE CAGE CODE 1RN38
5 4 3 2 1
 5 4 3 2 1

IMPORTANT NOTE: THIS SECTION REPRESENTS A SEPARATE PCB - PW/10082

R554
D D
R556 330 LED7
R558 330 LED_YELLOW_TH
LED6
TEST MODE
R562 330 LED_YELLOW_TH
J16 LED10
EDMAC MODE
1 R555 330 LED_YELLOW_TH
LED4 REMOTE +5VA
2
3 R557 330 LED_YELLOW_TH
LED9 +5VA
4 STORED EVENT
5 R559 330 LED_GREEN_TH
LED2 +5VA
6 ON LINE
7 330 LED_GREEN_TH
LED1 +5VA
8 RECEIVE TRAFFIC +5VA +5VA
9 LED_GREEN_TH
10 TRANSMIT TRAFFIC +5VA
11 R560
+5VA R561
12
13 330 330
14 +5VA
15
16 LED8
17
18 BI-LED
19 RED/GREEN
20 C&K PTS125SM85
21 UNIT STATUS
22 UP ARROW
23 S5
24 C&K PTS125SM85
25
26 DOWN ARROW
27 S2
28 C&K PTS125SM85
29
30 RIGHT ARROW
31 S4
C +5VA C
32 C&K PTS125SM85
33
34 LEFT ARROW
S6
CON34 C&K PTS125SM85

S3 ENTER

C&K PTS125SM85

S1 CLEAR

J15

14
13
12
11
10
9
8
7
6
5
4
3
+5VA 2
1

CON14
GND

J14
1
2
B
3 B
4
5
6
7
8 MH1 MH3 MH2 MH6 MH5 MH4
USB

HOLE HOLE HOLE HOLE HOLE HOLE

SHLD2 SHLD1 SHLD4 SHLD5 SHLD3

MS3 MS1 MS11 MS5 MS9 MS2 MS10 MS8 MS4 MS6 MS7 HW/SH2.27X1.77F1 HW/SH0.87X3.37F3 HW/SH1.27X1.02F1 HW/SH1.37X2.02F HW/SH2.27X1.77F1

SLOT SLOT SLOT SLOT SLOT SLOT SLOT SLOT SLOT SLOT SLOT

A A

WARNING: LAST MODIFIED: Monday, December 20, 2004 CDM-570 MODEM CARD
THIS DRAWING CONTAINS IN FORMATION
PROPRIETARY TO COMTECH COMMUNI CATIONS
CHECKED BY:
CORP. REPRODUCTION, DISCLOS URE, OR USE DATE: DWG NO: SC/10901 REV C
COMTECH EF DATA
OF THIS DRAWING IS EXPRESSLY PROHIBITED,
UNLESS OTHERWISE AUTHORIZED IN WRI TING 2114 WEST 7TH STREET, TEMPE AZ 85281 TEL: 480 333 2200
DRAWN BY: R MILLER DATE: 7/27/98 SIZE SHEET 13 OF 13 SCALE: NONE CAGE CODE 1RN38
5 4 3 2 1