Image Compression Using Verilog
Image Compression Using Verilog
Image Compression Using Verilog
Vol.06,Issue.10,
November-2014,
Pages:1169-1173
www.ijatir.org
Abstract: Data compression is the reduction or elimination more robust than the analog counterpart for processing,
of redundancy in data representation in order to achieve manipulation, storage, recovery, and transmission over long
savings in storage and communication costs. Data distances, even across the globe through communication
compression techniques can be broadly classified into two networks. In recent years, there have been significant
categories: Lossless, Lossy schemes. In lossless methods, advancements in processing of still image, video, graphics,
the exact original data can be recovered while in lossy speech, and audio signals through digital computers in order
schemes a close approximation of the original data can be to accomplish different application challenges. As a result,
obtained. The lossless method is also called entropy coding multimedia information comprising image, video, audio,
schemes since there is no loss of information content during speech, text, and other data types has the potential to
the process of compression. Digital images require an become just another data type. Still image and video data
enormous amount of space for storage. This work is to comprise a significant portion of the multimedia data and
design VLSI architecture for the JPEG Baseline Image they occupy the lion‟s share of the communication
Compression Standard. The architecture exploits the bandwidth for multimedia communication. As a result,
principles of pipelining and parallelism to the maximum development of efficient image compression techniques
extent in order to obtain high speed the architecture for continues to be an important challenge to us, both in
discrete cosine transforms and the entropy encoder are academia and in industry.
based on efficient algorithms designed for high speed VLSI.
For example, a color image with a resolution of 1024 x 1024 Despite the many advantages of digital representation of
picture elements (pixels) with 24 bits per pixel would signals compared to the analog counterpart, they need a very
require 3.15Mbytes in uncompressed form. Very high-speed large number of bits for storage and transmission. For
design of efficient compression techniques will significantly example, a high-quality audio signal requires approximately
help in meeting that challenge. In recent years, a working 1.5 megabits per second for digital representation and
group known as Joint Photographic Expert Group (JPEG) storage. A television-quality low-resolution color video of
has defined an international standard for coding and 30 frames per second with each frame containing 640 x 480
compression of continuous tone still images. This standard pixels (24 bits per color pixel) needs more than 210
is commonly referred to as the JPEG standard. The primary megabits per second of storage. As a result, a digitized one-
aim of the JPEG standard is to propose an image hour color movie would require approximately 95 gigabytes
compression algorithm that would be application of storage. The storage requirement for upcoming high-
independent and aid VLSI implementation of data definition television (HDTV) of resolution 1280 x 720 at 60
compression. In this project, we propose efficient single frames per second is far greater. A digitized one-hour color
chip VLSI architecture for the JPEG baseline compression movie of HDTV-quality video will require approximately
standard algorithm. The architecture fully exploits the 560 gigabytes of storage. A digitized 14 x 17 square inch
principles of pipelining and parallelism to achieve high radiograph scanned at 70 pm occupies nearly 45 megabytes
speed. The JPEG baseline algorithm consists mainly of two of storage. Transmission of these digital signals through
parts: (i) Discrete Cosine Transform (DCT) computation limited bandwidth communication channels is even a greater
and (ii) Entropy encoding. The architecture for entropy challenge and sometimes impossible in its raw form.
encoding is based on a hardware algorithm designed to yield Although the cost of storage has decreased drastically over
maximum clock speed. the past decade due to significant advancement in
microelectronics and storage technology, the requirement of
Keywords: VLSI Architecture, Discrete Cosine Transform data storage and data processing applications is growing
(DCT) Computation, Entropy Encoding, Verilog HDL. explosively to outpace this achievement.