Tps 61041
Tps 61041
Tps 61041
TPS61040, TPS61041
SLVS413I – OCTOBER 2002 – REVISED DECEMBER 2016
10 mH D1 88
VO = 18 V
VI = 5 V
VIN VOUT
86
1.8 V to 6 V VIN to 28 V
84
CFF VI = 3.6 V
Efficiency − %
5 V 1 R1 82
IN SW
CO 80
3 1 mF 78
VI = 2.4 V
FB
CIN 76
4.7 mF 4 2
EN GND R2 74
72
70
0.1 1 10 100
IO − Output Current − mA
Copyright © 2016, Texas Instruments Incorporated
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61040, TPS61041
SLVS413I – OCTOBER 2002 – REVISED DECEMBER 2016 www.ti.com
Table of Contents
1 Features .................................................................. 1 8 Application and Implementation ........................ 11
2 Applications ........................................................... 1 8.1 Application Information............................................ 11
3 Description ............................................................. 1 8.2 Typical Application .................................................. 11
4 Revision History..................................................... 2 8.3 System Examples ................................................... 16
5 Pin Configuration and Functions ......................... 3 9 Power Supply Recommendations...................... 19
6 Specifications......................................................... 4 10 Layout................................................................... 19
6.1 Absolute Maximum Ratings ...................................... 4 10.1 Layout Guidelines ................................................. 19
6.2 ESD Ratings.............................................................. 4 10.2 Layout Example .................................................... 19
6.3 Recommended Operating Conditions....................... 4 11 Device and Documentation Support ................. 20
6.4 Thermal Information .................................................. 4 11.1 Third-Party Products Disclaimer ........................... 20
6.5 Electrical Characteristics........................................... 5 11.2 Related Links ........................................................ 20
6.6 Typical Characteristics .............................................. 6 11.3 Community Resources.......................................... 20
7 Detailed Description .............................................. 9 11.4 Trademarks ........................................................... 20
7.1 Overview ................................................................... 9 11.5 Electrostatic Discharge Caution ............................ 20
7.2 Functional Block Diagram ......................................... 9 11.6 Glossary ................................................................ 20
7.3 Feature Description................................................... 9 12 Mechanical, Packaging, and Orderable
7.4 Device Functional Modes........................................ 10 Information ........................................................... 20
4 Revision History
Changes from Revision H (October 2015) to Revision I Page
• Changed CIN from: 4.7 mF To: 4.7 µF and CO From: 1 mF To: 1 µF in the Typical Application Schematic.......................... 1
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
SW 1 5 VIN
GND 2
FB 3 4 EN
DRV Package
6 Pins
Top View
GND 1 6 SW
VIN 2 5 NC
EN 3 4 FB
Pin Functions
PIN
DDC, I/O DESCRIPTION
NAME DRV NO.
DBV NO.
This is the enable pin of the device. Pulling this pin to ground forces the device into shutdown
EN 4 3 I mode reducing the supply current to less than 1 μA. This pin should not be left floating and needs
to be terminated.
This is the feedback pin of the device. Connect this pin to the external voltage divider to program
FB 3 4 I
the desired output voltage.
GND 2 1 – Ground
NC – 5 – No connection
Connect the inductor and the Schottky diode to this pin. This is the switch pin and is connected to
SW 1 6 I
the drain of the internal power MOSFET.
VIN 5 2 I Supply voltage pin
6 Specifications
6.1 Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
(2)
Supply voltages on pin VIN –0.3 7 V
(2)
Voltages on pins EN, FB –0.3 VIN + 0.3 V
(2)
Switch voltage on pin SW 30 30 V
Operating junction temperature, TJ –40 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions. Pins listed as ±XXX V may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions. Pins listed as ±YYY V may actually have higher performance.
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(1) The line and load regulation depend on the external component selection. See the application section for further information.
90 90
VO = 18 V L = 10 µH
88 VI = 5 V 88 VO = 18 V
86 86 TPS61040
84 VI = 3.6 V 84
TPS61041
Efficiency − %
Efficiency − %
82 82
80 80
VI = 2.4 V
78 78
76 76
74 74
72 72
70 70
0.1 1 10 100 0.1 1 10 100
IO − Output Current − mA IL − Load Current − mA
Efficiency − %
82 82
80 80
78 78
76 76
74 74
72 72
70 70
0.1 1 10 100 1 2 3 4 5 6
IL − Load Current − mA VI − Input Voltage − V
40 1.24
TA = 85°C
35
1.238
25
1.236
TA = −40°C
20 VCC = 2.4 V
1.234
15
10
1.232
5
0 1.23
1.8 2.4 3 3.6 4.2 4.8 5.4 6 −40 −20 0 20 40 60 80 100 120
VI − Input Voltage − V TA − Temperature − °C
Figure 5. TPS61040 Quiescent Current vs Input Voltage Figure 6. Feedback Voltage vs Free-Air Temperature
430 260
390 256
330 250
310 248
290 246
270 244
TPS61041
250 242
230 240
−40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90 1.8 2.4 3 3.6 4.2 4.8 5.4 6
TA − Temperature − °C VCC − Supply Voltage − V
Figure 7. TPS6104x Switch Current Limit vs Free-Air Figure 8. TPS61041 Current Limit vs Supply Voltage
Temperature
420 1200
rDS(on) − Static Drain-Source On-State Resistance − mΩ
415
1000
410 TPS61041
I(CL) − Current Limit − mA
800
405
TA = 27°C
400 600 TPS61040
395
400
390
200
385
380 0
1.8 2.4 3 3.6 4.2 4.8 5.4 6 −40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90
VCC − Supply Voltage − V TA − Temperature − °C
Figure 9. TPS61040 Current Limit vs Supply Voltage Figure 10. TPS6104x Static Drain-Source On-State
Resistance vs Free-Air Temperature
1000
800
TPS61041
700
600
500 TPS61040
400
300
200
100
0
1.8 2.4 3 3.6 4.2 4.8 5.4 6
VCC − Supply Voltage − V
7 Detailed Description
7.1 Overview
The TPS6104x is a high-frequency boost converter dedicated for small to medium LCD bias supply and white
LED backlight supplies. The device is ideal to generate output voltages up to 28 V from a dual-cell NiMH/NiCd or
a single cell device Li-Ion battery.
SW
Under Voltage
VIN Lockout
Bias Supply
400 ns Min
Off T ime
Error Comparator
FB - S
Power MOSFET
+
RS Latch Gate N-Channel
Logic Driver
VREF = 1.233 V
R
Current Limit
6 ms Max + RSENSE
EN On Time _
Soft
Start
GND
Copyright © 2016, Texas Instruments Incorporated
7.3.3 Enable
Pulling the enable (EN) to ground shuts down the device reducing the shutdown current to 1 μA (typical).
Because there is a conductive path from the input to the output through the inductor and Schottky diode, the
output voltage is equal to the input voltage during shutdown. The enable pin needs to be terminated and should
not be left floating. Using a small external transistor disconnects the input from the output during shutdown as
shown in Figure 17.
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
The inductor value determines the maximum switching frequency of the converter. Therefore, select the inductor
value that ensures the maximum switching frequency at the converter maximum load current is not exceeded.
The maximum switching frequency is calculated by the following formula:
VIN(min) ´ (VOUT - VIN )
fS(max) =
IP ´ L ´ VOUT
where
• IP = Peak current as described in Peak Current Control
• L = Selected inductor value
• VIN(min) = The highest switching frequency occurs at the minimum input voltage (2)
If the selected inductor value does not exceed the maximum switching frequency of the converter, the next step
is to calculate the switching frequency at the nominal load current using the following formula:
2 ´ Iload ´ (VOUT - VIN + Vd )
fS (Iload ) =
IP2 ´ L
where
• IP = Peak current as described in Peak Current Control
• L = Selected inductor value
• Iload = Nominal load current
• Vd = Rectifier diode forward voltage (typically 0.3 V) (3)
A smaller inductor value gives a higher converter switching frequency, but lowers the efficiency.
The inductor value has less effect on the maximum available load current and is only of secondary order. The
best way to calculate the maximum available load current under certain operating conditions is to estimate the
expected converter efficiency at the maximum load current. This number can be taken out of the efficiency
graphs shown in Figure 1 through Figure 4. The maximum load current can then be estimated as follows:
I P 2 ´ L ´ fS (m a x)
I lo a d(m a x) = h
2 ´ ( V O U T - VIN )
where
• IP = Peak current as described in Peak Current Control
• L = Selected inductor value
• fSmax = Maximum switching frequency as calculated previously
• η = Expected converter efficiency. Typically 70% to 85% (4)
The maximum load current of the converter is the current at the operation point where the converter starts to
enter the continuous conduction mode. Usually the converter should always operate in discontinuous conduction
mode.
Last, the selected inductor should have a saturation current that meets the maximum peak current of the
converter (as calculated in Peak Current Control). Use the maximum value for ILIM for this calculation.
Another important inductor parameter is the dc resistance. The lower the dc resistance, the higher the efficiency
of the converter. See Table 3 and the typical applications for the inductor selection.
Table 3. Recommended Inductor for Typical LCD Bias Supply (see Figure 23)
DEVICE INDUCTOR VALUE COMPONENT SUPPLIER COMMENTS
10 μH Sumida CR32-100 High efficiency
10 μH Sumida CDRH3D16-100 High efficiency
TPS61040 10 μH Murata LQH4C100K04 High efficiency
4.7 μH Sumida CDRH3D16-4R7 Small solution size
4.7 μH Murata LQH3C4R7M24 Small solution size
High efficiency
TPS61041 10 μH Murata LQH3C100K24
Small solution size
I
DV out + out
Cout
ǒ 1 –
I
P
L
fS(Iout) Vout ) Vd–Vin
Ǔ )I
P
ESR
where
• IP = Peak current as described in Peak Current Control
• L = Selected inductor value
• Iout = Nominal load current
• fS (Iout) = Switching frequency at the nominal load current as calculated previously
• Vd = Rectifier diode forward voltage (typically 0.3 V)
• Cout = Selected output capacitor
• ESR = Output capacitor ESR value (7)
See Table 4 and the Typical Application for choosing the output capacitor.
Table 5. Recommended Schottky Diode for Typical LCD Bias Supply (see Figure 23)
DEVICE REVERSE VOLTAGE COMPONENT SUPPLIER (1) COMMENTS
30 V ON Semiconductor MBR0530
20 V ON Semiconductor MBR0520
TPS6104x
20 V ON Semiconductor MBRM120L High efficiency
30 V Toshiba CRS02
spacer
VO = 18 V IO = 18 V
VI
2.4 V to 3.4 V
IO
100 mV/div
VO
IO
100 mV/div
1 mA to 10 mA
200 mS/div
200 µS/div
Figure 13. Line Transient Response Figure 14. Load Transient Response
VO = 18 V
VO
5 V/div
EN
1 V/div
II
50 mA/div
500 us/div
R3
200 k
L1 BC857C
10 μH D1
VIN VOUT
1.8 V to 6 V 18 V / 10 mA
TPS61040 R1 CFF
2.2 MΩ 22 pF
VIN SW
C2 C3
1 μF 0.1 μF
FB (Optional)
C1
4.7 μF R2
EN GND L1: Sumida CR32-100
160 kΩ
D1: Motorola MBR0530
C1: Tayo Yuden JMK212BY475MG
C2: Tayo Yuden TMK316BJ105KL
Copyright © 2016, Texas Instruments Incorporated
D3
V2 = –10 V/15 μA
D2 C4
C3 4.7 μF
1 μF
L1
6.8 μH D1
V1 = 10 V/15 mA
TPS61040
CFF
VIN R1 22 pF
VIN = 2.7 V to 5 V SW
1.5 MΩ C2
1 μF
FB
C1 L1: Murata LQH4C6R8M04
4.7 μF D1, D2, D3: Motorola MBR0530
EN GND R2
210 kΩ C1: Tayo Yuden JMK212BY475MG
C2, C3, C4: Tayo Yuden EMK316BJ105KF
L1
6.8 μH D1
VO = 12 V/35 mA
TPS61040
CFF
R1 4.7 pF
VIN 3.3 V VIN SW 1.8 MΩ C2
4.7 μF
FB
C1
10 μF EN L1: Murata LQH4C6R8M04
GND R2
205 kΩ D1: Motorola MBR0530
C1: Tayo Yuden JMK212BJ106MG
C2: Tayo Yuden EMK316BJ475ML
3.3 μH D1
5 V/45 mA
TPS61040 CFF
R1 3.3 pF
1.8 V to 4 V VIN SW
620 kΩ
C2
FB 4.7 μF
C1
4.7 μF R2
EN GND
200 kΩ L1: Murata LQH4C3R3M04
D1: Motorola MBR0530
C1, C2: Tayo Yuden JMK212BY475MG
L1
10 μH D1
VCC = 2.7 V to 6 V D2
VIN SW 24 V
(Optional)
C1
FB
4.7 μF
C2 L1: Murata LQH4C100K04
PWM EN GND 1 μF RS D1: Motorola MBR0530
100 Hz to 500 Hz 82 Ω C1: Tayo Yuden JMK212BY475MG
C2: Tayo Yuden TMK316BJ105KL
L1 D1
10 μH MBRM120L
VCC = 2.7 V to 6 V D2 C2
VIN SW 24 V 100 nF
(Optional) (See
Note A)
FB
C1
4.7 μF R1
EN GND
120 kΩ
RS
110 Ω
L1: Murata LQH4C3R3M04
D1: Motorola MBR0530
Analog Brightness Control C1: Tayo Yuden JMK212BY475MG
3.3 V @ Led Off R2 C2: Standard Ceramic Capacitor
0 V @Iled = 20 mA 160 kΩ
Copyright © 2016, Texas Instruments Incorporated
10 Layout
VOUT VIN
SW 1 5 VIN
TPS61040
GND 2
3 EN
FB 4
GND
11.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 24-Aug-2018
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
TPS61040DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 85 PHOI
& no Sb/Br)
TPS61040DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 PHOI
& no Sb/Br)
TPS61040DDCR ACTIVE SOT-23-THIN DDC 5 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 QXK
& no Sb/Br)
TPS61040DDCT ACTIVE SOT-23-THIN DDC 5 250 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 85 QXK
& no Sb/Br)
TPS61040DRVR ACTIVE WSON DRV 6 3000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 CCL
& no Sb/Br)
TPS61040DRVT ACTIVE WSON DRV 6 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 CCL
& no Sb/Br)
TPS61040DRVTG4 ACTIVE WSON DRV 6 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 CCL
& no Sb/Br)
TPS61041DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 PHPI
& no Sb/Br)
TPS61041DRVR ACTIVE WSON DRV 6 3000 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 CAW
& no Sb/Br)
TPS61041DRVT ACTIVE WSON DRV 6 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 CAW
& no Sb/Br)
TPS61041DRVTG4 ACTIVE WSON DRV 6 250 Green (RoHS CU NIPDAU Level-1-260C-UNLIM -40 to 85 CAW
& no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 24-Aug-2018
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 8-May-2018
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 8-May-2018
Pack Materials-Page 2
GENERIC PACKAGE VIEW
DRV 6 WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4206925/F
PACKAGE OUTLINE
DRV0006A SCALE 5.500
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
2.1 A
B
1.9
0.8
0.7 C
SEATING PLANE
0.08 C
(0.2) TYP
1 0.1 0.05
EXPOSED 0.00
THERMAL PAD
3
4
2X
7
1.3 1.6 0.1
6
1
4X 0.65
0.35
6X
PIN 1 ID 0.3 0.25
6X
(OPTIONAL) 0.2 0.1 C A B
0.05 C
4222173/B 04/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DRV0006A WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
6X (0.45)
(1)
1 7
6X (0.3) 6
SYMM (1.6)
(1.1)
4X (0.65)
4
3
( 0.2) VIA
TYP (1.95)
4222173/B 04/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.
www.ti.com
EXAMPLE STENCIL DESIGN
DRV0006A WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
SYMM
6X (0.45)
METAL
1 7
6X (0.3) 6
(0.45)
SYMM
4X (0.65)
(0.7)
4
3
(R0.05) TYP
(1)
(1.95)
EXPOSED PAD #7
88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:30X
4222173/B 04/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
PACKAGE OUTLINE
DBV0005A SCALE 4.000
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
C
3.0
2.6 0.1 C
1.75
B A 1.45 MAX
1.45
PIN 1
INDEX AREA
1 5
2X 0.95
3.05
2.75
1.9 1.9
2
4
3
0.5
5X
0.3
0.15
0.2 C A B (1.1) TYP
0.00
0.25
GAGE PLANE 0.22
TYP
0.08
8
TYP 0.6
0 TYP SEATING PLANE
0.3
4214839/D 11/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0005A SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3 4
SOLDER MASK
SOLDER MASK METAL METAL UNDER OPENING
OPENING SOLDER MASK
4214839/D 11/2018
NOTES: (continued)
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
2 (1.9)
2X(0.95)
3 4
(R0.05) TYP
(2.6)
4214839/D 11/2018
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
www.ti.com
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