GaAs MMIC Space Qualification PDF

GaAs MMIC Space Qualification
GaAs MMIC Testing GaAs MMIC Testing

TriQuint Semiconductor has advanced Lot Acceptance S-parameters and device currents are checked on the
Testing (LAT) for high reliability applications of GaAs MMICs. completed assemblies to screen for assembly defects. This
A flowchart depicting the entire MMIC processing flow, initial RF test serves as the performance baseline prior to the
including the Quality Conformance Inspection (QCI) / LAT burn-in step. For the burn-in and life test, ten DUTs are
process described herein and wafer-level lot acceptance randomly designated as QCI DUTs from the population that
testing is provided on page 2. The requirements for standard passes the initial RF test. Also, three additional devices are
product space qualification are summarized in table form in selected as archive / calibration devices. These devices will not
Table 1. be subjected to burn-in. These reference devices will be used
to verify the calibration and setup of each test stage. The QCI
DUTs are then subjected to a 240-hour burn-in.
Non-Recurring Engineering (NRE)
A packaged assembly will be developed and characterized to The burn-in is conducted under DC bias only, at a baseplate
verify stability of the device, as well as to ensure a high temperature that will result in a predetermined channel
assembly yield for the qualification Devices Under Test temperature for the MMIC.
(DUTs). The junction temperature will be modeled for each
device type, considering the device power dissipation and Following the first burn-in, S-parameters and device currents
the packaged assembly thermal performance. Also, are again measured. The failure criteria is:
additional test fixtures are designed and built at this time. • A +/-10% change in device operating current for
All required test procedures and associated documentation amplifiers and mixers,
will be generated. • A maximum of 100 uA of leakage current for
phase shifters and attenuators,
• And/or a +/-1 dB change in gain from the prior
QCI / LAT FLOW electrical test on any of the test devices.
The QCI uses randomly selected MMICs from the wafer-lot
to be qualified, assembled into a package. The assembly The QCI DUTs are then subjected to a 1000-hour, steady-state
processes are mature, documented, and are performed life test under the same DC bias as the first burn-in. Following
by certified operators in environmentally controlled the steady-state life test, S-parameters and currents are again
microelectronics assembly facilities. measured. The failure criteria is the same as that used for the
conditioning burn-in as described above. Note that the delta
nd
Each MMIC is attached with an eutectic AuSn preform to the parameters at the 1000 hr point are taken from the 2 electrical
package carrier plate using a vacuum reflow process. The test not the initial electrical test.
off-chip components and TFNs are attached with either
eutectic solder or conductive epoxy, depending on the test Data from the QCI process is summarized in a report for the
fixture design. High power dissipation assemblies are then customer. All S-parameter data is archived on disk at TriQuint.
inspected for voiding beneath the FET areas using X-ray. The DUTs are also archived at TriQuint.
The carrier plate assemblies are temperature cycled ten
times according to MIL-STD-883, Method 1010, Condition C. Wafer LAT data and probe data are deliverable at the time of
Each assembly is visually inspected to MIL-STD-883, Method die shipment, and QCI data is typically delivered 16 weeks after
2010, Condition B at 80X magnification. delivery of die. The customer may decide to wait for completion
of QCI test before accepting shipment of deliverable die.
TRIQUINT SEMICONDUCTOR CORPORATE HEADQUARTERS 2300 NE Brookwood Parkway, Hillsboro, OR 97124 USA
Phone: +1.503.615.9000 | Fax: +1.503.615.8900 | Email: [email protected] | Website: www.triquint.com
Connecting the Digital World to the Global Network ®
Typical Space Qualification Flowchart
Wafer Fabrication
100% DC Probe with Optional RF Probe

or Sample RF Fixture Test
100% Class S Visual

QCI Testing Inspection MIL-STD- Wafer-Level
10 Devices per Lot 883, Method 2010, LAT (WLAT)
Condition A
Fixture Samples Bond Pull Testing

Assembly Screens Backside Bond Pull Testing
DC and RF Tests Lot Process Monitor Evaluation
240-Hour Burn-In
DC and RF Tests
1000-Hr Life Test
DC and RF Tests
In an effort to support customer need for quick-turn space level devices, several standard products are available for purchase
as off-the-shelf space-qualified devices (subject to current inventory). These products are listed on our website and in all
cases the NRE required for qualification has been previously completed. In addition, any of our other standard products or
devices produced with our Foundry wafer processes can be space use qualified. For additional information on these devices,
visit the TriQuint website at www.triquint.com and review the ‘space recommended’ section.
Table 1. Standard Space Qualification Flow
TEST CONDITIONS SAMPLE
Element Visual Inspection MIL-STD-883, method 2010, condition A. 100%
FIRST METAL, GATE METAL, Lot process monitor engineering data- FIRST METAL LOT PROCESS MONITORS
GLASSIVATION, BACKSIDE thickness, GATE METAL thickness, GLASSIVATION
METALLIZATION AND WAFER thickness, BACKSIDE METAL thickness, WAFER
THICKNESS MEASUREMENTS THICKNESS.
Wire Bond Evaluation / Bond Pull MIL-STD-883, method 2011 10 (0) wires per wafer or 20
(1) wires per wafer
Backside Metallization / 1 mil gold wirebonds bonded to the backside of the die in 10 (0) or
Bond Pull two corners, no further than 5 mils from either edge. Wires 20 (1)
will be pulled to destruction, with a 3g failure strength from per wafer
MIL-STD-883, Method 2011, Condition D.
Internal Visual MIL-STD-883, method 2010, condition B at 80x 10 (0) per lot
(Fixtured QCI Samples)
Temperature Cycling 10 Cycles, -65 C TO +150 C, 15 minute minimum dwell 10 (0) per lot
Pre-Burn In Electrical 10 (0) per lot

(+25 C)
Burn In 240 hours min, Ta = +125 C min* 10 (0) per lot
Post Burn In Electrical Spec: S21 of +/- 1 dB from pre-burn in electrical 10 (0) per lot
(+25 C)
Steady State Life 1000 hours min, Ta = +125 C min* 10 (0) per lot
Post Life Electrical Spec: S21 of +/- 1 dB from post burn-in electrical 10 (0) per lot
(+25 C)
DELIVERABLE DATA:
Wafer LAT Report Process monitor data, bond pull data, backside
bond pull data.
Element Evaluation / QCI Data Traveler and test data from QCI test.
*Ta may be adjusted such that Tj does not exceed 150 C.

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GaAs MMIC Space Qualification

GaAs MMIC Testing GaAs MMIC Testing

Typical Space Qualification Flowchart

100% DC Probe with Optional RF Probe

100% Class S Visual

Fixture Samples Bond Pull Testing

Table 1. Standard Space Qualification Flow

TEST CONDITIONS SAMPLE

Element Visual Inspection MIL-STD-883, method 2010, condition A. 100%

Pre-Burn In Electrical 10 (0) per lot

Burn In 240 hours min, Ta = +125 C min* 10 (0) per lot

*Ta may be adjusted such that Tj does not exceed 150 C.

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