91

Electronic Devices

This Chapter “Electronic Devices” is taken from our:

ISBN : 9789386629005
92

2 Page – 91 - 140

ELECTRONIC DEVICES

C Ø Energy bands in silicon, intrinsic and extrinsic materials

O Ø Fermi level, Electron and Hole Concentration, conductivity and mobility,

Hall effect

N Ø Direct recombination of Electron and Holes, Diffusion and

Recombination, P-N Junction, Electron concentration, carrier injection,
junction capacitance

T Ø

Ø
Zener Diode, Tunnel Diode, BJT, FET

MOSFET, LED, PIN Diode, Avalanche photodiode

E Ø Fabrication of P-N Junction.

N
T
S
 93
SEM ICONDUCTOR M ATERIALS
Si Si Si A semiconductor is a material that has a conductivity somewhere between the extremes
of an insulator and a conductor. Important properties of semiconductor materials like Ge
and Si is that they form a very definite pattern and have single crystal structure.
Ge : 32 = 2, 8, 18, 4
Si Si Si Si : 14 = 2, 8, 4
Both Ge (32) and Si(14) are tetravalent atoms and they form co-valent bonding as shown
in Fig. 1 (a)
An increase in temperature of a semiconductor can result in a substantial increase in the
Si Si Si
number of free electrons in the material. Semiconductor material such as Ge and Si that
show a reduction in resistance with increase in temperature are said to have a negative
temperature co-efficient.
Fig. 1 (a)
Energy Band Diagram
Consider the energy band diagram of insulator semiconductor and conductor as shown
in Fig. 1 (b)

E E
Conduction
band
Conduction
Free electron
band
to conduction Band
Eg > 5 eV Eg
overlap
Valence Valence
electron band
Valence
band
(a) Insulator (b) Semiconductor (c) Conductor

Fig. 1 (b)
Note: Here Eg represents the energy band gap. It is the amount of energy that should be
imparted to the electron in valence conduction band.
Eg = 1.1 eV(Si), Eg = 0.67 eV(Ge), Eg = 1.41 eV (Ga As)
1 eV = 1.6 × 10–19 joule
Charge carriers in semiconductors: At 0 K the semiconductor has full valence band
and empty conduction band so, there is no net motion of electrons and hence the current
at 0 K is zero. If we raise the temperature, some electron will migrate from the valence
band to the conduction band and hence the conduction starts. The migration of electron
from valence band to the conduction band leaves an empty state in the valence band
which is called hole. So, there are two types of charge carrier in semi-conductors
(a) electron (b) holes.
Types of Semiconductor
Intrinsic Material : A perfect semiconductor crystal with no impurities or lattice defect
is called an intrinsic semiconductor. The electron-hole pair is the only way of charge
carrier in intrinsic materials.
Since the electrons and holes are created in pair, the conduction band electron
concentration (electron per cm3) is equal to concentration of hole in the valence band p
(hole per cm3) . Thus for intrinsic material.
n = p = ni
Where, ni = intrinsic carrier concentration.
Under steady state carrier concentration the rate of recombination (r i) of EHP (Electron-
Hole Pair) is equal to rate of generation (gi) of EHP. so,
ri = gi
94

At any temperature, ri = ar no , po = ani 2

Si Si Si
where, no and po are equilibrium concentration of electrons and holes.
Extrinsic Material: The characteristics of semiconductor materials can be altered Free
significantly by the addition of certain impurity atoms into the relatively pure electron
semiconductor material by doping process. A semiconductor material that has been Si Sb Si
subjected to the doping process is called an extrinsic material.
Pure semiconductor material without any impurity is known as an intrinsic semiconductor
material.
n-type Materials Si Si Si
The n-type is created by introducing impurity elements that are (penta valent) such as
antimony, arsenic and phosphorous. These diffused impurities are called donor atoms. Fig. 1 (c)
With doping Eg of Si becomes 0.05 eV from 1.1 eV and Eg of Ge becomes 0.01 eV from
0.67 eV
Si Si Si
p-type Materials
The p-type material is formed by doping a pure germanium or Si crystal with elements Void
that are trivalent like Boron, Gallium and Indium.
The diffused impurities are called acceptor atoms. Si B Si
If a valence electron acquires sufficient KE to break its covalent bond and fills the void
created by a hole, then a vacancy or hole will be created in the covalent bond that
released the electron.
In n-type material, the electron is called the majority carrier and the hole the minority Si Si Si
carrier.
In p-type material holes are majority carriers and electron are the minority carries.
Fig. 1 (d)
Fermi - level

+( - )
1
f(E) = E E f / kT
where, f(E) = Fermi - Dirac distribution function
1 e
Ef = Fermi level
The function f(E) gives the probability that an available energy state at E will be occupied
by an electron at absolute temperature T.
-1 1
f(Ef) = é1 + e( E f - E f ) / kT ù =
ë û 2
1
Thus fermi-level in the energy level at which it has probability of of being occupied
2
by electron.
Electron and Hole Concentration at equilibrium:
The concentration of electron in conduction band is :

n0 = N c e c f
(
- E -E ) / kT
Where, NC = Effective density of states in conduction band
æ2 pm ö3/2

çè h ÷ø
*
n kT
Nc = 2 2

Where,
mn* = effective mass
h = planck constant
k = Boltzman constant
The concentration of holes in valence band is

Po = N v e
(
- E f - Ev / kT )
 95
Nv = effective density of states in valence band.
æ2 pm ö3/ 2

N = 2ç ÷÷
*
p kT
v
èç h 2
ø
where
mp* = effective mass of hole.
Intrinsic electron and hole concentration are : —

ni = N c e ( c i ) , pi = N v e - ( Ei - Ev ) / kT
- E - E / kT

Intrinsic concentration is also given by

- E g /2 kT
ni = Nc N v e
Another convenient way of writing electron concentration and hole concentration at

( -)
equilibrium is :

no = n e E f Ei / kT

(-)
i

po = p e Ei E f / kT
i
Example 1: A Si sample is doped with 1017 As atom/cm3. What is the equilibrium hole
concentration po at 300k ? What is EF relative to Ei ?
Solution:
At any temperature
nopo = ni2
When no & po are equilibrium electron and hole concentration and ni is
intrinsic carrier concentration. Since, Arsenic is donor atom and concentration
of ni is very less as compared to donor atom Nd.
Þ Nd >> ni so, no = Nd + ni
no ; Nd = 1017

=( ´ )=
2
po
1.5 1010
´
2.25 103 cm -3
1017
Electron concentration at equilibrium is given by
n o =ni e(Ef –E i )/kT
no 1017
EF – Ei = kT ln n = 0.025 × ln
i 1.5 1010
= 0.407eV
´
So, EF is 0.407eV above Ei

( )
Temperature Dependence of Carrier Concentration

æç2pkT ö÷ 3/2 3/4 -Eg /2kT

ni (T) = 2
èh ø 2
m*n m*p e

From above equation it is clear that the intrinsic concentration depends on temperature.
As temperature increases the intrinsic concentration increases as T 3/2 .
Compensation and space charge neutrality
If the material is to remain electrostatically neutral, the sum of the positive charges
must balance the sum of negative charges.
po + N d+ = no + N a-
Where, po = concentration of holes
no = concentration of electron
N a- = concentration of acceptor atoms
N d+ = concentration of donor atoms.
96
Conductivity and Mobility
Average velocity of an electron (<Vx>) :-

<Vx> =
<p >= – qt E
x
x
m
n*
m*n
Where, <p >= average momentum in x-direction
x

mn* = effective mass of electron

t = mean free time (mean time between scattering event)
Ex = electric field in x - direction.
Now, Jx =-qn <V > x

=hq E
2
t
Jx x
m n*
Mobility of charge carrier is drift velocity per unit electric field. It defines how fast the
charge travel from one place to another and is given by.
Vd
m=
E
where, Vd = drift velocity
E = Electric field
The electron and hole mobility for Ge and Si is given as under :
Electron Mobility Hole Mobility
Ge 3800 cm 2 / V sec 1800 cm 2 / V sec
Si 1300 cm 2 / V sec 500 cm 2 / V sec

Effect of Temperature and Doping on Mobility

There are two basic type of scattering mechanism that influence electron and hole
mobility i.e. lattice scattering and impurity scattering. The lattice scattering is dominant
at high temperature and impurity scattering is dominant at low temperature. -3
T 2
Approximate temperature dependencies are T-3/2 for lattice scattering and T3/2 for impurity
og scale)

scattering. As the concentration of impurities increases, the effect of impurity scattering

tice g
atte ity
g

are felt at high temperature overall mobility is given by. Lat tterin
rin

Sa
c

m=m +m +m +....
1 1 1 1
Sc

1 2 3
Where m ® Overall mobility m1, m2, m3 ® mobility corresponding to different scattering T(k)
mechanism. Fig. 2 (a) : Scattering Mechanism

Hall Effect
Hall effect states that if a specimen (metal or semiconductor) carrying current I each
placed in a transverse magnetic field B, an electric field intensity E is induced in a
direction perpendicular to both I and B.
• By using the hall experiment we can find, whether the given specimen is a metal or
semiconductor.
• The concentration of charge carrier.
• We can calculate mobility of the charge carrier.
• In designing of Hall effect transducers.
• To measure the signal power in the EM wave.
• To measure flux density.
VH
E= volts/m
d
 97
(Upper surface) Hall voltage VH = Ed volts

BI
VH =
rW volts
r ® charge density

1
r= R H = Hall co-efficient

x BIRH
VH = volts
W
(Bottom surface)
VH µ RH
Hall Effect • By Hall experiment
Fig. 2 (b) : w ® width of given specimen

psR
8
d ® height or thickness of given m= H
specimen 3
or m = s RH
r = he
s = conductivity of given specimen.

Example 2: Find the magnetic field in a rectangular semiconductor specimen having

4 mm wide and 2 mm thick with RH 10–3m3/C. When a current of 1 mA is passed
through the sample a Hall voltage of 2mV is obtained.

BIRH
Sol: VH =
W

VH . W ´ -´ ´ -
2 10 3 4 10 3
B=
RH . I
= - ´´ -
10 3 1 10 3

B = 8 wb/m2

EXCES S CARR IE RS IN SE MI-CONDU CTORS

Optical Absorption: The photon with energy hn > Eg is absorbed in the semi- conductor.
A photon with energy less than Eg is unable to excite an electron from the valence band
to the conduction band. If a beam hn > Eg fall on a semiconductor, there will be some
predictable amount of absorption. The ratio of transmitted to incident light intensity
depend on photon wavelength and thickness of sample.
- dI ( x )
= a I(x)
dx
Þ I(x) = I0 e– a x
Where, I(x) = intensity of photon remaining
I0 = Intensity of photon beam at x = 0
a = absorption coefficient (cm–1)
Luminescene: The property of light emission is called luminescence. The overall category
can be subdivided according to the excitation mechanism. If carrier are excited by photon
absorption, the radiation resulting from recombination of the excited carrier is called
photo luminescence. If the excited carrier are created by high energy electron bombardment
of material. The mechanism is called cathodoluminiscence. If the excitation occur by
introduction of current in sample the resulting luminescence is called electroluminescence.
98
Example 3 : A 0.46 µm thick sample of GaAs is illuminated with monochromatic light of
hn = 2eV. The absorption coefficient. a is 5 × 104 cm–1. The power incident on the
sample is 10 mw.
(a) Find total energy absorbed by sample per sec (J/S)
(b) Find the rate of excess thermal energy given up by the electrons to the lattice
before recombination.
Solution:
(a) It = I0 e– a l
l = 0.46 mm , a = 5 × 104 cm –1, I0 = 10 mw = 10 –2w
It = 10 –2 exp (–5 × 104 × 0.46 × 10–4)
It = 10–2 e –2.3 = 10 –3 w
Thus absorbed power is = (10 – 1) mw = 9 mw
(b) Band gap of Ga As = 1.43eV
2 - 1.43
The fraction of each photon converted to heat = 0.285
2
So, the amount of energy converted into heat
0.285 × 9 × 10 –3 = 2.57 × 10 –3 J/S
Direct Recombination of Electrons and Holes
Let the initial excess electron and hole concentration Dn and Dp are equal. Then as the
electrons hole recombine in pairs, the instantaneous concentration of excess carrier
dn(+) and dp(+) are also equal the net rate of change of the excess carrier concentration
dn(+) is :–
d (+=D
n ) ne -a =D ne - t
rp 0 t t/ n

where t = ( a rp ) = recombination life time

n o
–1

Dn = excess concentration at t = 0
ar = constant of proportionality for recombination
A more general expression for carrier lifetime is given by

t a +
n = r( p
1
o no )
This expression is valid for n or p- type material if the injection level is low.
Steady state carrier generation : Quasi - Fermi levels
If a steady light is shone on the sample, an optical generation rate gop will be added to
thermal generation, and the carrier concentration n and p will increase to new steady
state values.
+ =a =a +d +d
g(T) g op r np r (n 0 n)(p0 p)
g(T) = Thermal generation at temperature T
gop = optical generation.
dn, dp = excess carrier generated due to light.

g op =dt n
n
The fermi- level EF is meaningful only when no excess electrons are present. So, for
writing steady state concentration in the case when excess carrier are present we introduce
quasi - Fermi level Fn & Fp
n = ni e(Fn – Fi) / kT
p = pi e (Fi – Fp) / kT
Diffusion of Carriers:
When excess carriers are created non- uniformly in semi-conductor, the electron and
hole concentration vary with position in the sample. Any such spacial variation in n and
p calls for a net motion of carriers from a region of high carrier concentration to region of
low carrier concentration. This type of motion is called diffusion.
The diffusion current crossing a unit area (the current density) is the particle flux density
multiplied by charge of carrier.
 99
dn ( x)
Jn (deff) = q Dn
dx
dn ( x)
Jp (deff) = –qDp
dx
Jn, Jp = electron and hole current density respectively.
Dn, Dp = electron and hole diffusion coefficient.
Diffusion and Drift of Carrier
When an electric field is present in addition to the carrier gradient the diffusion and drift
both current densities are present. i.e.

J n ( x) =qn ( x) m E(x) +qD dndx( x)

n n

( x ) =qp ( x ) m E ( x ) -qD
dp( x)
Jp p p
dx
and J(x) = Jn(x) + Jp(x)
Einstein Relation

m= q
D kT

Where,
D = Diffusion coefficient
m = Mobility
k = Boltzman constant
Diffusion and Recombination
During diffusion of carriers recombination also takes place. Taking account of
recombination the diffusion equation for electrons.
¶dn =Dn ¶dn -dn 2

¶t ¶x t 2
n
¶dp =Dp ¶dp -dp 2

¶t ¶x tp 2

¶dn , ¶dp = Rate of electron and hole build up.

¶t ¶t
t , t = Carrier lifetime for electron and hole respectively.
n p

Steady State Carrier Injection : Diffusion Length

Under steady state carrier injection, such that time derivative are zero. Then
¶d = d º d
2
n n n
¶ x 2 D t
n n Ln2
¶dp = dp º dp
2

¶x D t Lp 2 2

¶dn =0 & ¶dp =0

n p

Under steady state

¶t ¶t
L & L are electron and hole diffusion length respectively.
L = D t &L = D t
n p

n n n p P p
Let us assume that the steady state hole injection maintains a constant excess hole
concentration at the injection point dp(x = 0) = Dp. It is expected that the excess carriers
dies out as the value of x becomes large.
The excess hole at any position x is given as p(x) pe d =D -
px/L

Where Lp = hole diffusion length

The diffusion length Lp represents the distance at which the excess hole distribution is
reduced to 1/e of its value at the point of injection.
100
J U N CT I O N S
When p and n type semi-conductors are brought together to form a junction the
n-material have large concentration of electrons and few holes where p-material have
large concentration of holes and few electron. When they are joined diffusion is expected
to take place, hole diffuses from p to n and electron diffuses from n to p. If we consider
electrons diffusing from n to p leave behind uncompensated donor ion (Nd+) in the n
material, and hole leaving p region leave behind uncompensated acceptor ion Na–, an
electric field is developed. This electric field created a drift component of current from
n to p, opposing diffusion current. Let us assume that electric field is zero in neutral
regions. Thus there are constant potential Vn and Vp in neutral n and p regions respectively
and a potential difference V0 = Vn – Vp between two. The region in which electric field
appear is called transition region (w) and V0 is called contact potential. The contact
potential is given as

V0 =kTq ln Nn N
a
2
d

i
Where, V0 = contact potential
k = Boltzman constant
T = Temperature
Na = Concentration of acceptors
Nd = Concentration of donors
ni = Intrinsic carrier.
Electron concentration on either side of junction is given by
Pp hn
= qV /kT
Pn h p = e 0
Pp = Concentration of hole on p -side
Pn = Concentration of hole on n-side
nn = Concentration of electron on n-side
np = Concentration of electron on p-side
Space Charge at Junction
It is assumed that carrier is depleted within w and neutral outside w. This assumption is
known as depletion approximation. If there had been any carrier within w the electric
field serves to sweep out carrier which have wandered into w.
Since the dipole about the junction may have an equal number of charge on either sides, p w n
(Q+ = |Q – |), the transition region may extend into p and n region unequally, depending
on relative doping on two side.
For a section of cross-sectional area A, the total uncompensated charge on either side of
junction is
=
qAx po Na qAx no Nd –x p
o
0 –x n
o x
x po = penetration of space charge region in p- material.
P-N Junction
x n o = penetration of space charge region in n- material. Fig. 3 (a)
By using Possion’s equation, the electric field distribution within transition region is.

dx
=Î
dE ( x) q
(p – n + Nd+ – Na–)
Neglecting (p – n)
dE q
dx
=Î Nd 0 < x < xno
dE
dx
=-Îq
Na – x po < x < 0
From the above two equation we can sketch the electric field distribution, within depletion
region.
The maximum value of electric field is at x = 0 (i.e at junction)
-
q q
-Î
E0 =
Î N d x po = N a xno
 101
E(x) Where, E0 = maximum electric field.
The contact potential is related to width of depletion region as:
–xpo
w
x =0 xno
V0 =
1-E0 w =
1q
N d x po w
x 2 2Î
Where,

=-Î
w = width of depletion region
dE q
N a EO
dE
=Î
q
N d V0 = contact potential
+x
dx dx
x no po = width of depletion region.
Fig. 3 (b) : Electric field distribution The width of depletion region can be given as:
é2 ÎV æ 1 + 1 öùú 1/2

w= ê
êë q çèN N ÷øúû
o
a d
Where,
Na and Nd = concentration of acceptor and donor (in/cm 3)
Î = permitivity of material used for formation p – n junction diode.
q = electronic charge (1.6 × 10–19 c)
We can also calculate the penetration of transition region into the n and p material
ìï2 ÎV é N ùüï 1/2

+ íîï q êëN ( N +N ) úûýþï

wNd 0 a
xpo = =
N a Nd d a d

ìï2 ÎV é N ùüï 1/2

=í
îï q êëN (N +N ) úûýþï
wN 0 a
N +N
a
xno =
a d a a d
We can see from the above equations that the depletion region is inversely proportional
to the square root of concentration. i.e.
w µ 1
concentration
Example 4 : Boron is implanted into an n- type sample (Nd = 1016 cm–3), forming an
abrupt junction of square cross section, with area = 2 × 10 –3 cm2. Assume that the
acceptor concentration in the p-type region is Na = 4 × 1018 cm –3. Calculate Vo, X no ,
X po , Q+, and Eo for this junction at equilibrium.
Solution :
Here,
Na= 4 × 1018 cm –3
Nd = 1016 cm –3
Area = 2 × 10–3cm–2
ni = 1.5 × 1010 cm–3
Now,
kT Na Nd
= 4 1018 1016 ´ ´
(a) V0 =
q
ln
ni 2
0.025ln
(1.5 1010 )2 ´
V0 = 0.85V

êêé Î æçè + ö÷øúí

2 V0 1 1 ùïì ïüý
Since for calculating
(b) W =
ë ûúîï þï
( )
q Na Nd X no & X po we need w

éêæ2 ´(11.8 ´8.85 ´10- )(0.85) ö 0.25 ´10- +10- ùú 1/2

êëçè ÷ø
14
18 16
1.6 ´10- úû
19 = 0.334µm.

WN d .334 ´ 10 -6 ´ 1016 o
X po = = = 8.3 A
Na + Nd 16
(1 + 400) ´10
WN a .334 ´ 10-6 ´ 4 ´ 1018
Xn o = = = 0.33µm.
Na + Nd (1 + 400) ´ 1016
102

(c) | Q+ | = | Q- | = qAxno Nd
= (1.6 × 10 –19) (2 × 10–3) (3.33 × 10 –5) (1016) = 1.07 × 10 –10 C
-q - (1.6 ´ 10 -19 ) (1016 ) (3.3 ´ 10-5 )
(d) E0 = N x =
Î d no (11.8) (8.85 ´ 10-14 )
E0 = – 5.1 × 104 V/cm
Forward and Reverse-biased Junction
The electrostatic potential barrier at the junction is lowered by a forward bias Vf from the
equilibrium constant potential Vo to the smaller value Vo – Vf . The reason behind this is
that because of forward bias there is a rise in the electrostatic potential on the p - side n - side
p-side relative to n-side for a reverse bias (V = – Vr) the opposite occurs. – +
–
The total current crossing the junction is composed of the sum of diffusion and drift –
+
+
component. Diffusion current occurs when electrons or holes diffuse from one side to – +
– +
other. Under forward bias condition since the potential barrier is low there is more diffusion – +
of electrons and holes and hence the diffusion current is more. But in reverse bias
E
condition since the potential barrier is high there is less diffusion current. The diffusion
currents are directed from p to n and drift current is directed from n to p. The drift current
V= O
is relatively insensitive to the height of potential barrier. The reason for this is the fact Fig. 3 (c) : P-N junction under
that the drift current is limited not by how fast carrier are swept down barrier, but rather equilibrium condition
how often. The typical I – V plot for a p - n junction is shown as under.
The total current I is less then the diffusion current minus the absolute value of the drift
current (generation current), which is referred to as Io. p-side n-side
– +
I = Io (eqv/kT – l) – +
Io = generation current – +
– +
V = potential across barrier – +
– +
kT
= (0.0025 V at room temperature) E
q
Carrier Injection
Vf
The minority carrier concentration on each side of p-n junction vary with applied bias
Fig. 3 (d) : P-N juction under forward
because of variation in the diffusion of carriers across the junction. For example in
bias V = Vf
p-side of pn diode there is change in minority carrier (i.e. electrons) when electrons
diffuses from n - side. Although there is also change in majority carrier but the relative
change in majority carrier concentration can be assumed to vary only slightly with bias p-side n-side
compared with equilibrium values. – +
– +
Excess holes on the n - side (i.e. Dpn) is obtained by subtracting the equilibrium hole – +
concentration from the hole concentration after diffusion when forward bias or reverse – +
– +
bias voltage is applied and it is given as, – +
Dpn = pn (eqv/kT – l)
Similarly for excess electron on p - side E
Dnp = np (eqv/kT – 1)
Vr
Where,
Dpn = excess hole concentration on n side Fig. 3 (e) : P-N junction under reverse
bias V = –Vr
Dnp = excess electron concentration on p side
pn = equilibrium hole concentration on n side
np = equilibrium electron concentration on p side I
And we know that as these excess carrier diffuses deeper into the region they recombine Idrift
with the opposite carrier.
So, the resulting excess electron distribution is obtained using following formula
dn (xp) = np (eqv/kT – 1) e
-x p / Lp
Idrift
Similarly excess hole distribution is
dp (xn) = pn (eqv/kT – 1) e -x n /Ln V
Where, xp = Distance in the p-material measured in the –x direction with xpo as origin.
xn = Distance in the n-material measured in the + x direction with xno as origin.
Fig. 3 (f) : I-V characteristic
dn (xp), dp (xn) = Excess carrier at xn and xp
 103
pn = equilibrium hole concentration on n - side
np = equilibrium electron concentration on p - side
Ln, Lp = electron and hole diffusion length.

( -)
The total current across the diode is given by,
æ + ö
çè ÷ø
Dp Dn
I = qA pn n p e qv / kT 1
Lp Ln
This equation is also called diode equation where,
Dp, Dn = hole and electron diffusion coefficient respectively.
Capacitance of p - n Junction
Basically two types of capacitances are associated with a junction
(i) Junction capacitance
(ii) Charge storage capacitance (Diffusion capacitance)
The Junction capacitance is dominant under reverse-bias conditions and the charge
storage capacitance is dominant under forward-biased condition.
1. Junction capacitance :
The junction capacitance of a diode is easy to visualise from the charge distribution
in the transition region. The uncompensated acceptor ion on the p - side provide a
negative charge and equal positive charge result from ionized donor on the n side
of transition region.
dQ
C=
dV
Where C is capacitance
The junction capacitance is given by the formula.
éê e é ùúùú 1/2
dQ
-
A 2q
ê Na : Nd
ëê - êë + ûúû
CJ = = .
d (V0 V ) 2 (V0 V ) N a N d
Where, Cj = Voltage variable capacitance
V0 = built - in potential (contact potential)
V = bias voltage.
2. Diffusion Capacitance :
Diffusion capacitance is the capacitance due to transport of charge carriers between
two terminal of a device. The adjective “diffusion” is used because the original
use of this term was for Junction diodes, where the charge transport was via with
diffusion mechanism.
Let at particular moment in time the voltage across diode is V and let us suppose
that voltage changes with time slowly enough that at each moment the current is
same as the DC current that would flow at that voltage, say
I = I(V) (the quasistatic approximation)
Let the time to cross the device is the forward transit time tf. So, the amount of
charge in transit through device at this particular moment, Q, is given by
Q = I (V) tf
The corresponding diffusion capacitance C diff. is
Cdiff= =¶ t
dQ
dV
I (V )
dV f

Z EN ER D I OD E
Zener Diode is a special purpose silicon PN junction diode which differs from other
diodes in the sense that it operates in the reverse biased mode.
Zener diode is also known as a voltage regulator or voltage reference or breakdown
diode. The fig. 4 (a) shows the symbol for a zener diode:
A K
The breakdown voltage of a Zener diode is carefully controlled by maintaining the
Anode Cathode doping level during manufacturing. So, if the doping level is high, then depletion layer
(a) is thin and breakdown occurs at a low reverse voltage. When reverse voltage is increased,
Symbol
a critical voltage called breakdown voltage is reached at which reverse current will
Fig. 4 (a) : Symbol of Zener Diode sharply increase.
104
Reverse Characteristic of Zener Diode
Zener diode operates in the reverse biased mode, so we need to observe its characteristics Forward Bias
Breakdown IF Region
only in this region. The fig. 4 (b) shows the characteristic curve of Zener diode in the
VZ VR 0
breakdown region. When the value of applied reverse voltage is less than the knee VF
voltage, the increase in reverse current is also small. After this point, the breakdown K
process begins. The two modes of breakdown are described here as- Reverse Bias IR
(i) Zener Breakdown: When reverse voltage is applied in the junction, an electric Region
field is generated which exerts a force on the electrons in the outer most shell. Due M
to this high force, the electrons are pulled away from their parent nuclei and Fig. 4 (b) : V.I. characteristic of
become free carriers. This effect is called Zener Effect and due to this effect, there Zener Diode
is an increase in the reverse current which causes a breakdown, called the Zener
Breakdown.
(ii) Avalanche Breakdown: When accelerated electrons acquire sufficient energy to
ionize a lattice atom by bombardment, the additional free electrons are created in
much the same way by means of ionization due to the reverse field. This process rZ
causes a rapid increase in reverse current and the effect is called Avalanche Effect V`Z
or Breakdown. If the voltage is greater than 6 V, it comes under Avalanche Effect. +
– V
Actually, we can call this type of diode as the Avalanche diode. Z

Equivalent Circuit of Zener Diode

Fig. 4 (c) : Practical zener
The Equivalent circuit of Zener diode helps us to understand its behavior while using diode equivalent circuit
it in any circuit.
When reverse voltage, equal to the breakdown voltage (Vz), is applied to the Zener
diode, the current increases sharply and it’s representation on the graph is almost a
vertical line. It means that the zener diode is behaving like a battery of voltage, Vz as
shown in the fig. 4 (c). While if the applied reverse voltage across the Zener diode is
less than the breakdown voltage (Vz) then Zener diode is represented as an open circuit
and remains OFF.
Zener Diode Applications
(i) As a voltage regulator Ec
(ii) As a fixed reference voltage in biasing circuits
(iii) In clipper circuits.
EV EFn
T UN NE L DI OD E
Ec
The tunnel diode is a p-n Junction device that operates in certain region of I - V EFp
characteristic by the tunneling of electrons through potential barrier of the junction. The
tunnel diode consist of two degenerate semi-conductors. The degenerate semi- Ev
conductors are so heavily doped that the fermi-level no longer lies within the band gap
but lies within conduction band or valence band. A p-n junction between two degenerate n
semiconductors is illustrated in terms of energy band. Fig. 4 (e) : equilibrium (zero bias)
When the diode is forward biased, EFn moves up in energy with respect to EFp by the
amount qV. Thus electron below EFn on the n-side are placed opposite empty state above e–
EFp on p - side. Electron tunneling occur from n to p. However, as E F continue to moves
up with respect to EFp, a point is reached at which the band begins to pass by each other.
This result in decrease of tunnel current and the device shows negative resistance. If the
forward bias is increased beyond the negative resistance region, the current begin to
increase again as the characteristics of conventional diode.
I Fig. 4 (f) : small reverse bias
P
Ip

–
e

Iv

Vp Vf V

Fig. 4 (d) Fig. 4 (g) : small forward bias

 105

p p Where,
E n C
Ip = peak current
B IV = valley current
Fig. 4 (h) : PNP transistor Vp = peak voltage
Ip/IV = figure of merit for tunnel diode
E Vp/Vf = measure of voltage spread between two positive resistance region.
BIPOLAR JUNCTION TR ANS ISTORS (BJT)
B pnp transistor
Transistors are basic building blocks of electronics used for amplifiers and switching
C signals.
C The basic definition of BJT is "It is a three terminal device whose output voltage/
npn transistor current or power is controlled by its input current."
B
It is a current-controlled current source device.
E There are two types of transistors namely-
Fig. : 4 (i) Schematic symbol of transistor (i) n-p-n transistor
(ii) p-n-p transistor
Symbols of both the transistors are shown in fig. 4 (i).
In an n-p-n transistor , two n-type semiconductors are separated by a thin layer of a p-
type semiconductor, while in a p-n-p transistor, two p-type semiconductors are separated
by a thin layer of n-type semiconductor.
E CE C Amplifications and Switching signals are the two main applications of transistors.
There are three regions in BJT as follows-
(i) Base - It is the middle part of the transistor. The base of the transistor is thin as
B B compared to others as it's lightly doped.
Fig. 4 (j) (ii) Emitter - This region is situated to one side of the transistor. The main function of
the emitter region is to supply charge carriers (holes and electrons) to the other
regions. The emitter is heavily doped.
(iii) Collector - It is the region situated on opposite sides of the emitter region and
mainly collects the charge carriers. The doping level of collector region is in
Base between the emitter and the base.
Emitter Collector Modes of Operation
p p When the transistor is connected to the external voltage source, it is called biasing.
n
There are two types of biasing: forward and reverse, but in the case of the transistor,
where there are two junctions which translate into three regions, biasing is possible in
Forward Reverse
Bias Bias three modes, as follows-
Active Mode: In this mode, suppose we are using an NPN transistor, As shown in
fig. 4 (k), the base-emitter junction is forward biased and base-collector junction is
Fig. 4 (k) reverse biased.
Saturation Mode: In this mode, both the junctions (base-emitter and base -collector)
are forward biased, due to which a large value of current is obtained. This mode is
mainly used when the transistor is used in switching.
Cut-off Mode: In the cut-off mode, both the emitter -base junction as well as the collector-
n p n base junction are reverse biased and have zero current. For example, if the transistor is
to be operated as an open switch, this mode can be used.
IC
Working of an NPN Transistor
The fig. 4 (l) shows the schematic diagram for the working of an NPN transistor.
IB According to the figure, emitter -base junction is forward biased whereas collector-
base junction is reverse biased.
Along with that it is clearly mentioned that a series resistance is connected to the
VEB VCB emitter side as well as the collector side. Due to forward biasing, electrons from the
Fig. 4 (l) : Basic connection of emitter junction of the n-type semiconductor are moving towards the base region where
npn transistor they combine with holes of the p-type semiconductor. This constitutes the emitter
106
current (IE). As we know that the base is very thin, so only few of the electron -hole p n p
recombinations take place. Through this, the base current (IB) flows and the rest of the
IE IC
electrons move towards the collector region to constitute the collector current (IC).
Working of a PNP Transistor
The fig. 4 (m) shows the connections for a PNP transistor. IB
Base-emitter junction is forward biased and collector-base junction is reverse biased.
Now, as shown in the figure, the holes from p-type semiconductor tend to move towards VEB VCB
the base region, where they combine with electrons of the n-type semiconductor. This
constitutes the emitter current (IE). Fig. 4 (m) : Basic connection of
As we know, the base is a very thin layer due to the lower doping level, hence after a few pnp transistor
electron-hole recombinations (approx. 5%), the rest of the electrons (remaining 95%)
are moving towards the collector region. This constitutes the flow of base current (IB).
These electron-hole pairs pass through the collector region causing collector current
(IC). In this way, both the transistors operate.
BJ T CIR CUI T C ONF IGU RATIONS
In BJT, there are three terminals, namely emitter, base and collector .When we synthesize
a practical circuit, we need four terminals, i.e. two input terminals and two output
terminals. Here, we only have three terminals, so we have to make one common for
operation. On that basis, three different combinations of circuit configuration come
into existence as shown below:-
1. Common-base (CB) configuration
2. Common-Emitter (CE) configuration
3. Common-collector (CC) configuration
1. Common-Base (CB) Configuration: In this configuration, the base terminal is RE E C RC
made common to the two other terminals. The fig. 4 (n) and fig. 4 (o) shows the
circuit arrangement of common base configuration in both cases i.e. NPN and +
PNP transistor. In this case, input is applied to the base-emitter junction and –
VEE VCC –
output is taken from base-collector junction. In common base configuration, the + IB
ratio of output current to the input current is called Current Gain (a) or Current B
Amplification Factor of a transistor.
Current Gain is defined as "The ratio of change in collector current to the change
(i) Common-base NPN transistor circuit
in emitter current at constant collector - base voltage." Fig. 4(n)
a = DIC at VCB constant RE
DI E E C RC

Collector current IC = a I B + CBO

I
1-a 1- a –
+
V VCC +
– EE IB
Input Characteristic : Output Charactristic : B
IE(mA)
IC (mA)
3.0 IE = 6mA
Emitter Current

(ii) Common-base PNP transistor Circuit

Collector current

2.5 IE = 5mA
= 1 0V

5
2.0 IE = 4mA Fig. 4 (o)
0V
=

1.5 4
IE = 3mA
CB
V
CB

3
V

1.0 IE = 2mA
2
0.5 IE = 1mA
1
VEB(mV) IE = 0mA
0 10 20 30 40 50 60 70 80 0
Emitter-base voltage Collector base voltage VCB(V)
Fig. 4 (p) : Input resistance Fig. 4 (q) : Output resistance
DVBE DVCB
ri = ro =
DI E at VCB Constant DI C at I E constant
 107
2. Common-Emitter Configuration: In this mode, input is applied in between emitter-
base junction, while output is taken out from emitter-collector junction as shown
in the fig. 4 (r)
IC IC
C RC C RC
RB B RB B
IB + IB –
+ VCC – VCC
VBB E – VBB E
– IE IE +
+
(i) Common-emitter (ii) Common-emitter
NPN transistor circuit PNP transistor circuit
Fig. 4 (r)
Base amplification factor (b):-"It is defined as the ratio of change in collector
current to the change in base current."
b = DI C
DI B

Collector Current IC = a I B + a I C + ICBO

Relation between a and b
b= a
1-a
Input characteristic : Output Characteristic :
IB ( A) IC(mA)

5 Knee voltage
5 4 IB=20( A)
4
3 IB=15( A)
V

0V

3
=1

2 IB=10( A)
=1
CE

2
V

IB=5( A)
BE

1
V

1
0 0.7 1.4 VBE(V) VCE
0
Input Resistance: Output resistance:
DVBE DV
ri = ro = CE at I B constant
DI C at VCE constant DI C
Fig. 4 (s)
3. Common-Collector Configuration : In ths mode, input is applied to the
base terminal and the output is taken from the emitter terminal leaving the
collector common to base and emitter as shown in fig.

IC IC
+ –
C VCC C V CC
– +
RB RB
B B

IB IB
+ E – E
VBB IE VBB
– RE Vout + RE IE Vout

RC RC
(i) Common-collector (ii) Common-collector
NPN transistor circuit PNP transistor circuit
Fig. 4 (t)
108
FET
DI E
Current Amplification Factor: g = DI
B JFET MOSFET MESFET
1 (Junction (Metal - oxide (Metal
Relation Between g and a : g = field effect semiconductor semiconductor
1- a
=b+ +b+
Collector current: IC ( 1) I B ( 1) ICBO
transistor) field effect
transistor)
field effect

Comparison of Transistor Connections Depletion Type Enhancement Type

Characteristics Common Base Common Emitter Common Collector Types of FET

Input resistance Low Low Very High
ohmic
Output resistance Very High High Low contact n - channel
Voltage Gain 150 500 <1
p
Application High Frequency Audio frequency Impedance Matching
n
Source (S) Drain (D)
FIELD EFF ECT TRANSIS TORS p
The FET is a three terminal device used for variety of application that match, to a large
extent, those of BJT transistors. Depletion
Region
The primary difference between BJT and FET are as under. Gate (G)
n-channel JFET
BJT FET
Fig. 4 (u)
(i) BJT is a current controlled device. (i) JFET is a voltage controlled device.
(ii) BJT has low input impedance. (ii) JFET has very high input impedance. G
+ n - channel
(iii) BJT is bipolar device. (iii) FET is a unipolar device. VGS = 0v
p
(iv) BJT is more noisy. (iv) FET has less noise.
–s n D
(v) BJT are less temperature stable. (v) FET are more temperature stable. e– e– e–
Is ID
(vi) BJT are usually larger in size. (vi) FET are usually smaller in size. p +
VDS
(i) Junction Field Effect Transistor (JFET)
VOD Depletion region
JFET is a three terminal device with one terminal capable of controlling the current
between other two. The major part of the n- channel JFET is n- type material which forms JFET at VGS = OV and VDS > 0V
the channel between the embedded layers of p- type material. Fig. 4 (v)
Junction Field Effect Transistor at VDS = 0V and VGS = 0V Saturation level
ID
Consider VGS = 0V and a positive voltage VDS is applied across the channel. The result VGS = 0V
is that p-n junction is reverse – biased and as we move from drain to source the width of IDSS
the depletion region decreases because the potential from drain to source decreases. Increasing resistance due
And the voltage VDS establishes a current I0 through the channel. As VDS is increased to n channel
more the current will increase as determined by ohm’s law. Since as VDS increases the
depletion width near the drain also increases. So, if VDS is increased to a level where it
appears that the two depletion region would touch a condition referred to as pinch-off n - channel resistance
will result and is denoted by Vp IDSS is the maximun drain current for a JFET and is O Vp VDS
defined by the condition
ID versus VDS for VGS = 0V
VGS = 0V and VDS > |Vp|
Now VGS< 0 which is controlling voltage of JFET. The effect of the applied negative bias Fig. 4 (w)
is to establish depletion regions similar to those obtained with VGS = 0V, but at Locus of pinch-off values
lower level of VDS. The level of VGS that result in ID = 0mA is defined by VGS = Vp, with IP Sturation region VGS = 0V
being a negative voltage for n - channel devices and a positive value for p-channel Ohmic
region VGS = 1V
devices.
In saturation region current through JFET is given by, VGS = – 2V

=I æçèI -VV ö÷ø

2 VGS = –3V
GS IV
I DS DSS
p VGS = – 4V = VP
Fig. 4 (x)
 109
Where, IDSS = Saturation current at VGS = 0V
Vp = pinch off voltage
IDS = Saturation current at given VGS.
The drain resistance r d, is given by

ro
rd =
2
æ VGS ö
ç1- ÷
ç Vp ÷
è ø
Where, ro = resistance with VGS = 0V
rd = drain resistance at particular level of VGS.
Amplification factor m is given by
m = rd .g m
Where, rd = drain resistance
gm = transconductance
Transconductance is given by
2
gm = . I DS I DSS
| Vp |
General equation for VGS is
æ- I ö
VGS = Vp 1 çè I ÷ø DS
DSS
Source (S) Gate (G) Drain (D)

SiO2 (ii) MOSFET

There are two types of MOSFET (a) depletion type (b) enhancement type.
n channel
n n
Depletion Type MOSFET :
p
depletion
p-substrate
The basic construction of n- channel depletion type MOSFET consists of a p-substrate
n doped layer
region in which there is n-doped region. The source and drain terminal are connected through
metallic contact whereas the gate is insulated from n-channel by a thin layer of silicon
Fig. : 5 (a) : n-channel depletion type dioxide (SiO2)
MOSFET It is the insulating layer of SiO2 which accounts for very high input impedance of device.
ID
When VGS = 0V and VDS is applied across drain to source terminal. The result is an
IDSS attraction of e– toward the drain terminal and a current ID is established in the device.
When VGS has some negative value and the negative potential at the gate will tend to
pressure electron toward p-type substrate and attract hole from p-type substrate resulting
into recombination between electron and hole that will reduce the number of free electron
in the n-channel available for conduction. The more negative the bias the higher is
recombination rate. The resulting level of drain current is therefore reduced with increasing
VGS negative bias for VGS.
Vp = 6V When VGS has some positive value the positive potential at the gate will tend to draw the
Fig. 5 (b) : Drain characteristics electron (minority carrier) from p-type substrate hence the number of electron in
n-channel increases and hence the drain current increases with increasing positive bias
VG = +1V for VGS.
ID
VG = 0V Enhancement Type MOSFET :
VG = –1V The construction of n-channel enhancement type MOSFET is similar to n-channel
VG = –2V depletion type MOSFET except there is no channel at VGS = 0. The channel is enhanced
VG = –3V when we apply some positive voltage above threshold.
VG = – 4V At VGS = 0V there is no channel so, there is no drain current ID for any value of VDS.
VG = – 5V When VDS and VGS have been set at some positive value greater than 0V. The positive
VDS potential at gate will pressure hole to move deeper in p-substrate where as the electron
VG = Vp from p-substrate are drawn to the positive gate near the surface of SiO2 layer. As VGS is
increased in magnitude the concentration of e– near the SiO2 layer increases until
Fig. Fig:-
5 (c) :Transfer
Transfercharacteristic
characteristics
110
eventually the induced n-type region can support a measurable flow between drain and Source Gate Drain
source. This level of VGS is called threshold voltage VT. (S) (G) (D)
In case of N-channel MOSFET sio2
if VGS > VT then transistor is on
n n
if VGS < VT then transistor is off n-doped
p-type region
However if we hold VGS constant and increase the level of VDS, the drain current will
n-doped substrate
eventually reach a saturation level due to pinching off process depicted by the narrower
region no-channel
channel.
If transistor is ON then it is either in saturation or in triode region.
If VDS ³ (VGS – VT) then it is in saturation region and if VDS £ (VGS – VT) then it is in Fig. 5 (d) : n-channel enhancement type
triode (linear) region. MOSFET
In saturation region the current is given by,

IDS =
mC
ox W
(VGS -V )
T
2 ID VGS = 9V
2 L VGS = 8V
Where, m = charge-carrier effective mobility
Cox = gate oxide capacitance VGS = 7V
W = gate width VGS = 6V
L = Gate Length VGS = 5V
In triode (linear) region the current is given by, VGS = 4V
VGS = 3V
W é VDS 2 ù
m
I DS = Cox L ê (VGS - VT )V DS - ú VGS
êë 2 úû VGS = VT = 2V
Where, VDS = Drain to source voltage.
In p- channel MOSFET Fig. 5 (e) : Drain characteristics of n-
if VSG > |VTP| then the transistor is on channel enhancement type MOSFET
and if VSG < |VTP| then the transistor is off
If transistor is on then it can be in linear mode or saturation mode
if VSD ³ (VSG + VTP) the transistor is in saturation region
if VSD < (VSG + VTP) the transistor is in linear region.
In saturation region the current ID through transistor is given by ;

m ´2WL (V +V
IDS = Cox SG TP )
2

Where, VTP = threshold voltage for p-type transistor

In linear (triode) region, the current is given by

m ´WL æçç(V +V ) ö
-V2 ö÷÷÷
2
SD
ID = Cox
è SG TP VSD
øø
LIGHT EMITTING DIODE (LED)
A LED is a semi-conductor light source. When LED is switched on there is a recombination
between electrons and holes, releasing energy in the form of photons. This process is
called electroluminescence and the colour of light is determined by energy band gap of
semi-conductor. The material used for the LED have direct band gap with energies
corresponding to near infrared, visible or near ultra violet region because indirect band
gap material on recombination produces non-radiative transition.
The LED consists of a p-n junction diode. It operates in the forward bias condition.
When a positive voltage is applied across p-n junction the holes on p-side diffuses to n-
side and the electron on n-side diffused to p-side. So, there is a recombination between
electron and hole and energy is released in form of photon.
In reverse bias condition it acts like a normal diode. The power dissipation in LED is very
low i.e. in mw.
 111
PIN DIODE
+ +
p ii n A PIN diode is a diode that consists of intrinsic semi-conductor between p- type and
n-type semiconductor. The p and n regions are heavily doped because they are used for
ohmic contact.
PIN Diode A PIN diode operates under what is known as high level injection. The intrinsic layer is
Fig. 5 (f) : flooded with a large number of electrons and holes from n and p-side and when the diode
is forward biased the injected carrier concentration is typically several order magnitude
higher than intrinsic carrier. Due to this the electric field extends deeply into the intrinsic
region which help in speeding up of transport of charge carrier from p to n-region which
result in faster operation of diode, making it suitable device for high frequency operation.
Application of PIN diode:
(i) High Voltage Rectifier: The PIN diode is used as high voltage rectifier. The intrinsic
layer of PIN diode provide a greater separation between p and n region, which
allows higher reverse voltage to be tolerated.
(ii) Photodetector: In photodetector the conversion of light into current takes place
in depletion region and as the depletion region of PIN diode is increased if improves
the performance by increasing the volume in which light conversion occur.
AV AL AN CH E P HO TO DI OD E:
An avalanche photo diode is highly sensitive semiconductor electronic device that
exploit the photoelectric effect. In avalanche photodiode the gain is obtained by avalanche
multiplication. In general higher the reverse bias higher will be the gain. Avalanche
photodiode can handle large amount of power compared to photo diode. Its response
time is also smaller than photodiode. The Avalanche photodiode is widely used in fibre
optics communication.
FABRICATION OF P-N JUNCTION:
1. Thermal Oxidation: An important example of thermal oxidation of si to form
SiO2. This involves placing a batch of wafers in a clean silica tube which can be
heated to a very high temperature (~ 800 – 1000°C) using heating coils in a furnace
with ceramic brick insulating liner. An oxygen containing gas such as dry O2 or
H2O is flowed into the tube at atmospheric pressure, and flowed out at other end.
The overall reaction that occur during oxidation are
Si + O2 ® SiO2 (dry oxidation)
Si + 2H2O ® SiO2 + 2H2 (wet oxidation)
In either case, Si is consumed from the surface of the substrate. For every micron
of SiO2 grown, 0.44µm of Si is consumed, leading to a 2.2× volume expansion of
consumed layer upon oxidation.
2. Diffusion: Another thermal process used in IC fabrication is thermal in-diffusion of
dopants in furnace. The wafer are oxidised and windows are opened in the oxide.
Dopant such as B, P, or As are introduced into these pattern wafer in a high
temperature (~ 800°C – 1100°C) diffusion furnace, generally using gas or vapour
source. The dopant are then diffused from high concentration region near the
surface into the substrate. The diffusivity of dopants, in solid has a strong Arrhenius
dependence on temperature T
D = Do e- (E A / kT)
Do = constant depending on material and dopant
EA = activation energy
D = Diffusivity of dopant in solid.
112
3. Ion Implantation: The alternate option for high temperature diffusion is the direct
implantation of energetic ions into the semi-conductor. In this process the ions are
accelerated to kinetic energies ranging from several KeV to several MeV and is
directed onto the surface of conductor. Due to high kinetic energy the atoms enter
into the crystal and comes to rest at some average penetration depth by giving up
their energy to the lattice in collision. This penetration depth is called projected
range. The advantage of ion implantation is that it can be done at relatively low
temperature. Which means doping layers can be implanted without disturbing
previously diffused region. The other advantage is that it is possible to implant
impurities which do not diffuse conveniently into semi-conductor and in ion
implantation we can precisely control doping concentration. One problem with ion
implantation is that the crystal lattice are damaged due to collision between ion
and lattice atom.
4. Photolithography: Patterns that have complex circuitary are formed on a wafer
using photolithography. It is also termed as optical-lithography or UV lithography.
It is a process used in microfabrication to pattern part of thin film or substrate. This
involve first generating a reticle which is a transparent silica plate containing the
pattern. Opaque regions on the reticle are made up of ultraviolet light absorbing
layer, such as iron oxide.
A thin layer of electron beam sensitive material called resist is placed on iron-oxide
and the resist is exposed by electron beam. After exposure the resist is developed
in chemical solution. The iron-oxide layer is then selectively etched off in a plasma
to generate the appropriate patterns.
BASIC OF LASERS
Laser is an acronym for Light Amplification by Stimulated Emission of Radiation. It is
essentially a coherent, convergent, and monochromatic beam of electromagnetic radiation
with wavelength ranging from ultraviolet to infrared.