A Brain Computer Interface
A Brain Computer Interface
A Brain Computer Interface
By
August 2009
Certified that the contents and form of project report entitled “Think. Done! A Brain
Haque, 3) Sarmad Munir and 4) Farhan Tahir have been found satisfactory for the
Supervisor: ____________________
NUST, Rawalpindi.
way to control his surroundings by working on the activity signals collected from his
We have developed a complete a BCI system from signal acquisition to control interface.
The system we have designed lets a user control a cursor on computer screen and play a
video game (car game developed in Java) without any physical movement. Another and
For signal acquisition a complete five channel (including one for reference) EEG machine
has been designed. This machine is light weight, low cost and ultra portable.
Windowing and time domain normalization have been used for preprocessing. Wavelet
Transform (WT) and Fractional Fourier Transform (FRFT) have been used to extract
feature vectors. Neural networks are used as classifiers. Finally heuristic weight
All the algorithms used have been published in form of two research papers in
To
&
We would like to take this opportunity to pay our humble gratitude to Almighty Allah
We are extremely thankful to our Project Supervisor Dr. Naveed Iqbal Rao who
supervised the project in a very encouraging and helpful manner. This project has been
completed with funding from Higher Education Commission (HEC) Pakistan at Image
Following people have been very helpful at different stages of this project;
Mr. Kashif Siraj Research Associate at Image Processing Center MCS, Dr Abdul Ghafoor EE
Dept. MCS, Mr. Athar Mohsin Zaidi of CS Dept.MCS, Brig. Mowaddat Rana of MH
DEDICATION ..................................................................................................................... 3
In the name of Allah, the Most Gracious, the Most Merciful ........................................... 3
Our Respectful Teachers..................................................................................................... 3
1. INTRODUCTION ........................................................................................................ 10
1.1 Motivation for this project ..................................................................................... 10
2. Introduction to Brain Computer Interface (BCI) ................................................... 14
2.1 History ......................................................................................................................15
2.2 Classifications ..........................................................................................................15
2.2.1 Synchronous Vs. Asynchronous 15
2.2.2 Online Vs. Offline 16
2.2.3 Invasive Vs. Non-invasive 16
2.3 Structure of Brain ................................................................................................... 16
2.3.1 Cerebrum 17
2.3.2 Cerebellum 17
2.3.3 Brain Stem ........................................................................................................... 18
2.4 Motor Cortex .......................................................................................................... 18
2.5 Electroencephalogram (EEG) .................................................................................... 20
2.6 Modules/Blocks of BCI system .................................................................................. 20
3. Literature Review .................................................................................................... 22
3.1 Algorithms for preprocessing ................................................................................ 22
3.2 Algorithms for feature extraction ......................................................................... 22
3.2.1 Wavelet transform ............................................................................................... 22
3.2.2 Fractional Fourier transform .............................................................................. 23
3.3 Classification ........................................................................................................... 23
4. What we have done in each module ...................................................................... 24
4.1 Signal Acquisition ....................................................................................................... 24
4.1.1 Online 24
EEG MACHINE HARDWARE DESIGN ........................................................................... 25
Basic elements ............................................................................................................. 25
INPUT PROTECTION RESISTANCE 25
Defining the Ideal Operational Amplifier 27
A Summing Point Restraint 28
The Desirability of Feedback 29
Two Important Feedback Circuits 30
Interaction with any machine requires a very smooth and efficient interface between the
machine and its users. Humans using computers are familiar with a number of interfaces
such as keyboard, mouse, touch screens etc. All these interfaces have one thing in
movement may not be possible in some situations such as Virtual Reality environment,
daily routine works for physically disabled people etc. A Brain Computer Interface (BCI) is
such an interface in which a person uses his/her brain to control the machine to be used,
muscular way to control his surroundings. It enables the individual using it to relay
command signals directly to the machine instead of first relaying it to a body part such as
hands or feet. Its applications range from empowering physically paralyzed people (and
normal people too) to use computers without moving a single muscle, to applications in
Virtual Reality. Due to its tremendous potential it is attracting huge investments and
research activities from around the world. World leading universities are establishing
technology of future. Imagine being able to navigate through your mobile phone using
your mind... Imagine driving your car by just thinking about it!! Yes Brain Computer
This document describes the work done by this group in this field. We have developed an
asynchronous real time complete BCI system that enables a user to control a cursor on
screen, move a toy car and play a video game, all in real time with a reasonable accuracy.
Since this is a project report, it does not serve the purpose of defining BCI terms.
However some terms are explained as required by the context. Definitions flow with the
work we have done, i.e. the context remains the work we have done in this field.
This task, as the reader might have anticipated, is not a trivial one. Like the activity
signals generated by our heart, which are called ECG signals, similarly our brain also
generates a lot many other signals too but we are interested in EEG only), each time it
processes something. These activity signals are captured in the form of micro-volt level
reading these signals one can guess what the person is thinking at the moment!!
Though these signals are highly random, but still one can find some pattern in them, i.e.
the pattern corresponding to the activity the user is doing or just ‘thinking about doing’,
like moving his arm or leg. Finding this pattern is the main task of any BCI. This requires
some very smart classification algorithm which once trained can work for a particular
A BCI picks these signals from the brain of user in the form of EEG. Then after classifying
what the user is thinking, it translates these signals into meaningful commands, e.g. it
Signal acquisition module is a light weight, low cost and ultra portable EEG machine
All the algorithms we have implemented are novel and more efficient than previous
We have interfaced our system to three applications. First one is a cursor control system
which enables an individual to control a cursor in four directions in real time. Second
interface is a video game which is a car game in Java. And third and the most interesting
This project has won numerous national level competitions including NESCON 09 at FAST
One of our publications also won second best paper award in category at IC-4 conference
at Karachi.
A Brain Computer Interface (BCI) is a system that enables an individual to control his /her
signals acquired directly from the brain in the form of Electroencephalogram (EEG)
signals.
system, and a device control system. Nowadays, these systems can simply be four
The signal capture system includes the electrodes themselves, the isolated electronic
amplifiers (they're isolated from the mains so that the only electricity that flows is from
the subjects head to the computer and NOT vice versa !) and possibly a Digital Signal
Processing (DSP) board. The signal processing system often used to be on a dedicated
DSP board but now PCs are fast enough to do everything on the main processor. The
classifier or linear vector quantiser (LVQ). Nowadays, neural networks are most
commonly used. Again, although specialist neural net chips are available, most PCs have
under a grant from the National Science Foundation followed by a contract from DARPA.
These papers also mark the first appearance of the expression brain–computer interface
The field has since blossomed spectacularly, mostly toward neuroprosthetics applications
that aim at restoring damaged hearing, sight and movement. Thanks to the remarkable
cortical plasticity of the brain, signals from implanted prostheses can, after adaptation,
be handled by the brain like natural sensor or effecter channels. Following years of
2.2 Classifications
There are many classifications of BCI systems. These classifications can be based on signal
acquisition, sensor placement and timing etc. Some classifications are listed here;
is not required to follow cues by system. These systems are more user friendly but are
much more difficult to build. Main issues fuelling this difficulty are sensitivity of the
sensors and efficiency of algorithm to detect between meaningful activity and gibberish.
Asynchronous BCIs on the other hand require system cues to function. In this
arrangement system provides the user regular cues to perform activity. System only
a synchronous BCI.
acquisition machine all the time. We have developed our own EEG machine for this
When placed on the skin surface, with the help of a conducting gel, the signals picked are
relatively weak. When implanted with in the skin, they provide better signals and more
With improvements in technology non-invasive techniques are becoming more and more
makes this whole thing possible. Our brain is perhaps the most complex machine in this
world, and to describe it in a few pages is not possible. Here I will only provide
information necessary to understanding to BCI systems. Also covered is the topic of EEG.
2.3.1 Cerebrum
The cerebrum or cortex is the largest part of the human brain, associated with higher
brain function such as thought and action. The cerebral cortex is divided into four
sections, called "lobes": the frontal lobe, parietal lobe, occipital lobe, and temporal lobe
stimuli
A deep furrow divides the cerebrum into two halves, known as the left and right
hemispheres. The two hemispheres look mostly symmetrical yet it has been shown that
each side functions slightly different than the other. Sometimes the right hemisphere is
associated with creativity and the left hemispheres is associated with logic abilities.
The corpus callosum is a bundle of axons which connects these two hemispheres.
2.3.2 Cerebellum
The cerebellum, or "little brain", is similar to the cerebrum in that it has two hemispheres
and has a highly folded surface or cortex. This structure is associated with regulation and
blood pressure. Scientists say that this is the "simplest" part of human brains because
animals' entire brains, such as reptiles (who appear early on the evolutionary scale)
All of the body's voluntary movements are controlled by the brain. One of the brain areas
most involved in controlling these voluntary movements is the motor cortex. The motor
cortex is located in the rear portion of the frontal lobe, just before the central sulcus
(furrow) that separates the frontal lobe from the parietal lobe. The motor cortex is
divided into two main areas, Area 4 and Area 6. Area 4, also known as the primary
motor cortex, forms a thin band along the central sulcus. Area 6 lies immediately forward
of Area 4. Area 6 is wider and is further subdivided into two distinct sub-areas.
They observed that depending on what part of the cortex they stimulated, a different
part of the body contracted. Then they found that if they destroyed this same small area
of the cortex, the corresponding part of the body became paralyzed. This is how it was
discovered that every part of the body has a particular region of the primary motor
But what is remarkable about this motor map is that certain parts of the body—those
that can make the finest movements—take up much more space than others. These
parts of the body are shown larger than the others in the illustration here.
has a typical amplitude of 2-100 microvolts and a frequency spectrum from 0.1 to 60 Hz.
Most activity occurs within the following frequency bands; delta (0.5 - 4 Hz), theta (4-8
Hz), alpha (8-13 Hz), beta (13-22 Hz) and gamma (30-40 Hz).
The potential at the scalp derives from electrical activity of large synchronised groups of
neurons inside the brain. The activity of single neurons or small groups is attenuated too
EEG activity in particular frequency bands is often correlated with particular cognitive
states. Signals in the alpha band, for example, are associated with relaxation. Thus, an
electrode placed over the visual cortex that detects alpha band signals is detecting visual
relaxation. An electrode over the motor cortex picking up alpha band signals is detecting
captures EEG or any other signals from the brain. It also performs noise elimination,
artifact processing etc. Secondly there is a pre-processing block. The aim of this block is
to bring the signals into a suitable form for further processing. Third is the feature
extractor, which extracts features from the signals, forming feature vectors, upon which
classification can be done. Then comes the classification block, which classifies the
signals using their feature vectors. Finally comes the control interface which translates
the classification of the previous block into meaningful commands for any device
Signal Acquisition
Preprocessing
Feature Extraction
Classification
Control Interface
Figure4: Modules
This work proposes a novel approach for the second, third and fourth blocks of a BCI
system.
Other techniques commonly used are Common Average Referencing (CAR), Surface
(CSP), and Principal Component Analysis (PCA) [19]. Neural networks perform
well when their input signal range is limited. We do this by using non-linear
normalization used by [1], but in time domain. Time domain normalization requires
much less computing power and provides for faster processing which is a critical
[1], [3], Parametric modeling and spectral parameters [2], Signal envelope cross
correlation [4].
This adapted wavelet depicts EEG signal characteristics, such as drift, trends, abrupt
changes, and beginnings and ends of events, much better and hence improve feature
extraction. Wavelet transform has also been used by [5] and others [19], but this and
other techniques that use wavelet transform, use a predefined wavelet from some
adapted wavelets have been used [20], [21], [22] and others [19], but the difference
between this method and previous ones is that this wavelet is adapted not only to the
individual tasks under consideration but also their specific time segments, thus
Interface (BCI) using the Fractional Fourier Transform (FRFT) arises as the
Transform (FT) [1], [2], given that the FT is a particular case of the FRFT, thus adding
new dimensions that increase the accuracy of the correct thought classification.
Conventional Fourier analysis treats frequency and time as orthogonal variables and
3.3 Classification
Heuristic weight adjustment of the Neural network classifiers has also been
used non-linear normalization in the time domain. Secondly wavelet transform with
of a cap and electrodes placed on user’s head. After EEG signals are picked up by the
sensors they are passed through amplification and common noise rejections units.
4.1.1 Online
For online real time analysis we have designed a light weight, low cost and ultra portable
EEG machine. The EEG machine we have designed is described below. It is a five channel
machine, including one for reference. Cost of this prototype is less than PKR 300000.
Basic elements
INPUT PROTECTION RESISTANCE
Interface amplifiers are often subjected to input overloads, i.e., voltage levels in excess of
their maximum for the selected gain range or even in excess of the supply voltage. These
overloads usually occur for only a fraction of a second and fall into two general classes:
Standard practice is to place current-limiting resistors in each input, but adding this
protection also increases the circuit’s noise level. A reasonable balance needs to be
found between the protection provided and the increased resistor (Johnson) noise
Of course, the less added noise the better, but a good guideline is that circuits needing
this extra protection can easily tolerate resistor values that generate 30% of the total
circuit noise. For example, a circuit using an in-amp with a rated noise level of 20nV/√Hz
Use the following cookbook method to translate this number into a practical resistance
value. A single 1kΩ would raise the maximum dc level to approximately 22.5V above each
supply or ±37.5V with ±15V supplies. The Johnson noise of a 1kΩ resistor is
approximately 4nV/√Hz. This value varies as the square root of the resistance. So, a
100kΩ resistor would have √100 times as much noise as the 1kΩ resistor, which is
40nV/√Hz (10 × 4nV/√Hz). Because both inputs need to be protected, two resistors are
needed, and their combined noise will add as the square root of the number of resistors
(the root sum of squares value). In this case, the total added noise from the two 100kΩ
With 3-op amp in-amp designs, when operating at low gains (10 or less), the gain resistor
acts as a current-limiting element in series with their resistor inputs. At high gains, the
lower value of RG may not adequately protect the inputs from excessive currents. The
AD620 uses its 400Ω internal resistor and a single set of diodes to protect against
negative input voltages. For positive voltage overloads, it relies on its own base-emitter
input junction to act as the clamping diode, and will safely withstand input overloads of
which is particularly important since the signal source and amplifier may be powered
separately. For longer time periods, the current should not exceed 6mA (IIN ≤ VIN/400Ω).
REFERENCE:
Low Cost, Low Power Instrumentation Amplifier AD620 DATASHEET
A Designer’s Guide to Instrumentation Amplifiers, 3RD EDITION ANALOG DEVICES
OPERATIONAL AMPLIFIER
Figure6: OPAMP
infinite.
driving source won’t be affected by power being drawn by the ideal operational
amplifier.
assumed to be zero. It then can supply as much current as necessary to the load
being driven.
• Response Time: The output must occur at the same time as the inverting input so
the response time is assumed to be zero. Phase shift will be 180. Frequency
response will be flat and bandwidth infinite because AC will be simply a rapidly
• Offset: The amplifier output will be zero when a zero signal appears between the
summing point, the inverting input, will conduct no current to the amplifier. This
property is to become an important tool for circuit analysis and design, for it gives us an
inherent restraint on our circuit – a place to begin analysis. Both the inverting and non-
inverting inputs must remain at the same voltage, giving us a second powerful tool for
analysis.
Consider the open loop amplifier used in the circuit shown in figure above. Note that no
current flows from the source into the inverting input - the summing point restraint-
hence, there is no voltage drop across RS and ES appears across the amplifier input.
When ES is zero, the output is zero. If ES takes on any non-zero value, the output voltage
The open loop amplifier is not practical - once an op amp is pushed to saturation, its
behavior is unpredictable. Recovery time from saturation is not specified for op amps
(except voltage limiting types). It may not recover at all; the output may latch up. The
output structure of some op-amps, particularly rail-to-rail models, may draw a lot of
current as the output stage attempts to drive to one or the other rail.
Figure shows the connections and the gain equations for two basic feedback circuits. The
application of negative feedback around the ideal operational amplifier results in another
important summing point restraint: The voltage appearing between the inverting and
non-inverting inputs approaches zero when the feedback loop is closed. Consider either
of the two circuits shown in figure. If a small voltage, measured at the inverting input
with respect to the non-inverting input, is assumed to exist, the amplifier output voltage
will be of opposite polarity and can always increase in value (with infinite output
available) until the voltage between the inputs becomes infinitesimally small. When the
amplifier output is fed back to the inverting input, the output voltage will always take on
the value required to drive the signal between the inputs toward zero.
The two summing point restraints are so important that they are repeated:
1. No current flows into either input terminal of the ideal operational amplifier.
Voltage Follower
The circuit in figure above demonstrates how the addition of a simple feedback loop to
the open loop amplifier converts it from a device of no usefulness to one with many
practical applications.
Analyzing this circuit, we see that the voltage at the non-inverting input is EI, the voltage
at the inverting input approaches the voltage at the non-inverting input, and the output
is at the same voltage as the inverting input. Hence, EO = EI, and our analysis is complete.
Our result also may be verified by mathematical analysis very simply. Since no current
flows at the non-inverting input, the input impedance of the voltage follower is infinite.
The output impedance is just that of the ideal operational amplifier itself, i.e. zero. Note
also that no current flows through the feedback loop, so any arbitrary (but finite)
resistance may be placed in the feedback loop without changing the properties of the
value of feedback resistor selected, and the designer should use the value recommended
Unity gain circuits are used as electrical buffers to isolate circuits or devices from one
another and prevent undesired interaction. As a voltage following power amplifier, this
circuit will allow a source with low current capabilities to drive a heavy load.
The gain of the voltage follower with the feedback loop closed (closed loop gain) is unity.
The gain of the ideal operational amplifier without a feedback loop (open loop gain) is
infinity. Thus, we have traded gain for control by adding feedback. Such a severe sacrifice
ICL8038CCPD used for carrier generation. The purpose of using buffer after electrodes
Amplifier immediately after it has sufficient input impedance. Also if this buffer is not
used then protection resistances at the start can also be removed resulting in significant
reduction in noise.
OP177GP IC was used as voltage follower with no feedback resistance right after
electrodes and TL061 was used after ICL8038CCPD. TL061 can be replaced by TL062
which has two op-amps within single package reducing design size and space. A voltage
Non-Inverting Amplifier
into the inverting input, RO and RI form a simple voltage divider. The same voltage must
The input impedance of the non-inverting amplifier circuit is infinite since no current
flows into the inverting input. Output impedance is zero since output voltage is ideally
Inverting Amplifier
the bulk of commonly used operational amplifier circuitry. Single ended input and output
versions were first used, and they became the basis of analog computation. Today’s
non-inverting input and applying the input signal to the inverting input terminal. Since
the amplifier draws no input current and the input voltage approaches zero when the
feedback loop is closed (the two summing point restraints), we may write:
Hence:
Input impedance to this circuit is not infinite as in the two previous circuits, the inverting
input is at ground potential so the driving source effectively “sees” RI as the input
Figure13: Integrator
If a capacitor is used as the feedback element in the inverting amplifier, shown in figure
above, the result is an integrator. Current through the feedback loop charges the
capacitor and is stored there as a voltage from the output to ground. This is a voltage
Voltage Adder
In a great many practical applications the input to the inverting amplifier is more than
one voltage. The simplest form of multiple inputs is shown in figure below.
Current in the feedback loop is the algebraic sum of the current due to each input. Each
source, E1, E2, etc., contributes to the total current, and no interaction occurs between
ିோ
them. All inputs “see” RI as the input impedance, while gain is ோ
. Direct voltage
In case of our EEG Signal Acquisition Device Design, we have four channels of EEG data
modulated at different frequencies are added at the end with R1=R2=R3=R4=100kΩ and
Ro= 1kΩ. Operational Amplifier used was OP177GP with ±15V dual supply. The purpose
of attenuating the input signal is sound card. Input signal to sound card must not exceed
OP177GP IC can be replaced with OP277 as they offer improved noise, wider output
voltage swing, and are twice as fast with half the quiescent current compared to OP177.
Circuit Diagram:
output with ground and allows all frequencies to pass but if output is passed through a
low pass filter and output is returned to Ref pin it acts as a High Pass Filter as well. In our
design we designed a Low Pass Filter with R=330kΩ and C=1µF, which provides a cutoff
frequency of 0.48Hz approximately. When the output is fed to Ref pin of AD620, it cuts
REFERENCE:
INSTRUMENTATION AMPLIFIER
An instrumentation amplifier is a closed-loop gain block that has a differential input and
an output that is single-ended with respect to a reference terminal. Most commonly, the
or greater. The input bias currents should also be low, typically 1nA to 50nA. As with op
amps, output impedance is very low, nominally only a few milliohms, at low frequencies.
connected between its inverting input and its output, an in-amp employs an internal
feedback resistor network that is isolated from its signal input terminals. With the input
signal applied across the two differential inputs, gain is either preset internally or is user
set (via pins) by an internal or external gain resistor, which is also isolated from the signal
inputs.
In its primary function, the in-amp will normally reject the common-mode dc voltage, or
any other voltage common to both lines, while amplifying the differential signal voltage,
the difference in voltage between the two lines. In contrast, if a standard op amp
amplifier circuit were used in this application, it would simply amplify both the signal
voltage and any dc, noise, or other common-mode voltages. As a result, the signal would
remain buried under the dc offset and noise. Because of this, even the best op-amps are
signal voltages while rejecting any signals that are common to both inputs. The in-amp,
therefore, provides the very important function of extracting small signals from
common (the same potential on both inputs), while amplifying any signals that are
differential (a potential difference between the inputs), is the most important function
voltage present at both inputs) will be reduced 80 dB to 120 dB by any modern in-amp of
decent quality.
However, inadequate ac CMR causes a large, time-varying error that often changes
greatly with frequency and, therefore, is difficult to remove at the IA’s output.
mode rejection.
Common-mode gain (ACM), the ratio of change in output voltage to change in common-
mode input voltage, is related to common-mode rejection. It is the net gain (or
attenuation) from input to output for voltages common to both inputs. For example, an
in-amp with a common-mode gain of 1/1000 and a 10V common mode voltage at its
inputs will exhibit a 10 mV output change. The differential or normal mode gain (AD) is
the gain between input and output for voltages applied differentially (or across) the two
inputs. The common-mode rejection ratio (CMRR) is simply the ratio of the differential
change at a given frequency and a specified imbalance of source impedance (e.g., 1kΩ
where:
AD is the differential gain of the amplifier; VCM is the common-mode voltage present at
the amplifier inputs; VOUT is the output voltage present when a common-mode input
signal is applied to the amplifier. The term CMR is a logarithmic expression of the
rejecting common-mode voltage at its inputs. It is particularly important for the in-amp
to be able to reject common-mode signals over the bandwidth of interest. This requires
that instrumentation amplifiers have very high common-mode rejection over the main
At unity gain, typical dc values of CMR are 70 dB to more than 100 dB, with CMR usually
subtractors also provide common-mode rejection, the user must provide closely matched
in-amps and diff amps are designed to reject common-mode signals so that they do not
appear at the amplifier’s output. In contrast, an op amp operated in the typical inverting
them through to the output, but will not normally reject them.
output and the summing junction, the voltage on the “–” input is forced to be the same
as that on the “+” input voltage. Therefore, the op amp ideally will have zero volts across
its input terminals. As a result, the voltage at the op amp output must equal VCM, for zero
volts differential input. Even though the op amp has common-mode rejection, the
common-mode voltage is transferred to the output along with the signal. In practice, the
signal is amplified by the op-amp’s closed-loop gain, while the common-mode voltage
receives only unity gain. This difference in gain does provide some reduction in common-
mode voltage as a percentage of signal voltage. However, the common-mode voltage still
appears at the output, and its presence reduces the amplifier’s available output swing.
For many reasons, any common-mode signals (dc or ac) appearing at the op amp’s
Now consider a 3-op amp in-amp operating under the same conditions. Note that, just
like the op amp circuit, the input buffer amplifiers of the in-amp pass the common-mode
signal through at unity gain. In contrast, the signal is amplified by both buffers. The
output signals from the two buffers connect to the subtractor section of the IA. Here the
differential signal is amplified (typically at low gain or unity) while the common-mode
voltage is attenuated (typically by 10,000:1 or more). Contrasting the two circuits, both
provide signal amplification (and buffering), but because of its subtractor section, the in-
amp rejects the common-mode voltage. In-amps find their primary use amplifying
Since an ideal instrumentation amplifier detects only the difference in voltage between
its inputs, any common-mode signals (equal potentials for both inputs), such as noise or
voltage drops in ground lines, are rejected at the input stage without being amplified.
most accurate and provide the lowest gain drift over temperature.
One common approach is to use a single external resistor, working with two internal
resistors, to set the gain. The user can calculate the required value of resistance for a
given gain, using the gain equation listed in the in-amp’s spec sheet. This permits gain to
be set anywhere within a very large range. However, the external resistor can seldom be
exactly the correct value for the desired gain, and it will always be at a slightly different
temperature than the IC’s internal resistors. These practical limitations always contribute
Sometimes two external resistors are employed. In general, a 2-resistor solution will have
lower drift than a single resistor as the ratio of the two resistors sets the gain, and these
resistors can be within a single IC array for close matching and very similar temperature
coefficients (TC).
Conversely, a single external resistor will always be a TC mismatch for an on-chip resistor.
The output of an instrumentation amplifier often has its own reference terminal, which,
among other uses, allows the in-amp to drive a load that may be at a distant location.
Of course, power must be supplied to the in-amp. As with op amps, the power would
normally be provided by a dual-supply voltage that operates the in-amp over a specified
used.
In general, discrete (op amp) in-amps offer design flexibility at low cost and can
sometimes provide performance unattainable with monolithic designs, such as very high
are fully specified and usually factory trimmed, often to higher dc precision than discrete
designs. Monolithic in-amps are also much smaller, lower in cost, and easier to apply.
need to be rejected. This includes high CMR at power line frequencies and at the second
output amplifier, total output offset will equal the sum of the gain times the input offset
plus the offset of the output amplifier (within the in-amp). Typical values for input and
output offset drift are 1µV/oC and 10µV/oC, respectively. Although the initial offset
voltage may be nulled with external trimming, offset voltage drift cannot be adjusted
out. As with initial offset, offset drift has two components, with the input and output
section of the in-amp each contributing its portion of error to the total.
offset error.
high and closely matched to one another. High input impedance is necessary to avoid
loading down the input signal source, which could also lower the input signal voltage.
Values of input impedance from 109Ω to 1012Ω are typical. Difference amplifiers, such as
the AD629, have lower input impedances, but can be very effective in high common-
or out of, its input terminals; bipolar in-amps have base currents and FET amplifiers have
gate leakage currents. This bias current flowing through an imbalance in the signal source
resistance will create an offset error. Note that if the input source resistance becomes
infinite, as with ac (capacitive) input coupling, without a resistive return to power supply
ground, the input common-mode voltage will climb until the amplifier saturates. A high
value resistor connected between each input and ground is normally used to prevent this
problem. Typically, the input bias current multiplied by the resistor’s value in ohms
should be less than 10mV. Input offset current errors are defined as the mismatch
between the bias currents flowing into the two inputs. Typical values of input bias
current for a bipolar in-amp range from 1nA to 50nA; for a FET input device, values of
its own noise to that of the signal. A minimum input noise level of 10nV/√Hz @ 1 kHz
(gain > 100) referred to input (RTI) is desirable. Micro-power in-amps are optimized for
the lowest possible input stage current and, therefore, typically have higher noise levels
Low Nonlinearity
Input offset and scale factor errors can be corrected by external trimming, but
measures the in-amp’s error at the plus and minus full-scale voltage and at zero. A
nonlinearity error of 0.01% is typical for a high quality in-amp; some devices have levels
as low as 0.0001%.
an external resistor will affect the circuit’s accuracy and gain drift with temperature. In-
amps, such as the AD621, provide a choice of internally preset gains that are pin-
Adequate Bandwidth
An instrumentation amplifier must provide bandwidth sufficient for the particular
application. Since typical unity gain, small-signal bandwidths fall between 500 kHz and 4
MHz, performance at low gains is easily achieved, but at higher gains bandwidth
than comparable standard in-amps, as micro-power input stages are operated at much
voltage is provided. There are many in-amp applications that require amplifying a
differential voltage that is riding on top of a much larger common-mode voltage. This
common-mode voltage may be noise, or ADC offset, or both. The use of an op amp
rather than an in-amp would simply amplify both the common mode and the signal by
equal amounts. The great benefit provided by an in-amp is that it selectively amplifies
of these applications, a rail-to-rail input ADC is often used. So-called rail-to-rail operation
means that an amplifier’s maximum input or output swing is essentially equal to the
power supply voltage. In fact, the input swing can sometimes exceed the supply voltage
slightly, while the output swing is often within 100mV of the supply voltage or ground.
greater the bandwidth and slew rate and the lower the noise. But higher operating
current means higher power dissipation and heat. Battery operated equipment needs to
dissipate the collective heat of all their active components. Device heating also increases
offset drift and other temperature-related errors. IC designers often must trade off some
For many years, the AD620 has been the industry standard, high performance, low cost
lead DIP and SOIC packages. The user can program any desired gain from 1 to 1000 using
a single external resistor. By design, the required resistor values for gains of 10 and 100
The AD620 is a second-generation version of the classic AD524 in-amp and embodies a
modification of its 3-op amp circuit. Laser trimming of on-chip thin film resistors, R1 and
R2, allows the user to accurately set the gain to 100 within ±0.3% max error, using only
one external resistor. Monolithic construction and laser wafer trimming allow the tight
allowing the gain to be programmed accurately with a single external resistor. The gain
equation is then
So that
Instrumentation Amplifier used in our design was AD620. We experimented with INA114,
REFERENCE:
A Designer’s Guide to Instrumentation Amplifiers, 3RD EDITION ANALOG DEVICES
Modulation
The generation of AM signals consists simply of the addition of the carrier waveform to
the DSB signal, for this reason AM modulation is referred to as DSB-LC (DSB with large
carrier). The message signal x(t) is modulated by a carrier waveform Ac cos(2πfct). The
= A(t) cos(2πfct)
typically at ±15V. The AD633 is a functionally complete analog multiplier. It includes high
impedance, differential X and Y inputs and a high impedance summing input (Z).
Pin 2 and Pin 4 were grounded. Pin 3 was connected with Pin 6 to implement amplitude
modulation.
Circuit Diagram:
Carrier Generation
The ICL8038 waveform generator is a monolithic integrated circuit capable of producing
high accuracy sine, square, triangular, sawtooth and pulse waveforms with a minimum of
external components. The frequency (or repetition rate) can be selected externally from
0.001Hz to more than 300kHz using either resistors or capacitors, and frequency
which was actually obtained by [8]. This dataset has also been used by [1], [3], [9] and
many others. Seven Non-Invasive active electrodes C3, C4, P3, P4, O1, O2 and EOG
were used to record EEG signals at a sampling frequency of 250Hz from seven
individuals, six males and one female. EOG which does not appear in this figure is
used for measuring movement of eyeballs. Therefore for a 10sec recording 250×10 =
Figure 2 by [1]. EOG which was used to record the movement of Eye ball is not shown.
The Dataset comprised of 5 Mental Tasks and each task was repeated five times on
• Baseline Task
• Multiplication Task
• Letter Composing Task
• 3-D Rotation Task
• Counting Task
dataset was recorded from a normal subject (female, 25y) during a feedback session.
The subject sat in a relaxing hair with armrests. The task was to control a feedback
bar by means of imagery left or right hand movements. The order of left and right
the same day with several minutes break in between. Given are 280 trials of 9s length.
The first 2s was quite, at t=2s an acoustic stimulus indicates the beginning of the trial, the
trigger channel (#4) went from low to high, and a cross “+” was displayed for 1s;
then at t=3s, an arrow (left or right) was displayed as cue. At the same time the
subject was asked to move a bar into the direction of a the cue. The feedback was based
on AAR parameters of channel #1 (C3) and #3 (C4), the AAR parameters were
combined with a discriminant analysis into one output parameter. The recording was
made using a G.tec amplifier and Ag/AgCl electrodes. Three bipolar EEG channels
(anterior „+‟, posterior „-„) were measured over C3, Cz and C4. The EEG was sampled
4.2 Preprocessing
Preprocessing is required to bring the signals into a suitable ‘shape’ before feeding them
to subsequent blocks.
4.2.1 Windowing
To reduce the execution time and memory utilization in processing 10secs EEG
signal, each signal of dataset1 was segmented into windows of 1sec with an overlap of
0.5sec. Overlap was introduced so as to cater for the loss at the edges of the window and
to make BCI response fast as each new window was available after 0.5sec.. This
segmentation does not effect any cross validation effort, because this much overlap
does not make signals identical to each other or dependent on each other over
times greater than the apodization time. Thus cross validation can be effectively
and testing can be done on separate halves of the signal as done by [1].
small range of values. Often important information is present in small samples which
For that purpose the data was non- linearly normalized using a normalization technique
log( x − x min )
y= (1)
log( x max − x max )
Where in (1) y is the normalized sample, x is the current sample, and xmax and xmin are
maximum and minimum values in the 1 sec window under consideration. It must be
remembered that this normalization was done in time domain, prior to feature
frequency domain.
have introduced two techniques for feature extraction, Wavelet transform (WT) and
extraction tool. In transforming to the frequency domain using Fourier transform, time
when a particular event took place. If the signal is a stationary signal, this drawback isn't
very important. However the EEG signals contain numerous non stationary or transitory
characteristics: drift, trends, abrupt changes, and beginnings and ends of events. Wavelet
analysis provides a much better resolution, that is, it allows the use of long time intervals
where we want more precise low-frequency information, and shorter regions where we
want high frequency information. The major advantage afforded by wavelets is the
ability to perform local analysis, that is, to analyze a localized area of a larger signal.
∞
X (a, b) = ∫ x(t )ψ (a, b, t )dt (2)
−∞
where α and β are real numbers representing scale and position of the wavelet
it should approximate a given pattern in the signal. By merely looking at the brain signals
one might erroneously consider them to be highly random in nature, which in fact they
are not. There is a pattern associated with every task that human eye cannot decipher.
The fundamental assumption in pattern detection is that data is not random and that the
pattern repeats itself with a slight variation where pre-processing is required to remove
this variation to the extent possible and to make the pattern detectable. For that very
reason use of wavelet transform was made. The basic idea behind using an adapted
Pattern adapted wavelet using least Square Optimization was selected for pattern
detection of these signals. A wavelet was adapted for each window segment of data
using polynomial method and degree of polynomial was set to be five. Wavelet for each
task in both datasets was obtained for one second window using Matlab® Wavelet
computes an admissible wavelet for CWT adapted to the given pattern. The principle for
designing a new wavelet for CWT is to approximate a given pattern using least squares
optimization under constraints leading to an admissible wavelet well suited for the
pattern detection using the continuous wavelet transform [16]. An average wavelet filter
was obtained using simple averaging of the adapted wavelets over all the tasks for both
datasets. Wavelets for each window segment, i.e., for each one second window was used
in the averaging processes to yield a filter for each of the window segments in the signal,
to be used for CWT of that window segment of the training and test data. Thus the CWT
coefficients were obtained using adapted wavelet filter for each time segmented window
of data. Entire process of synthesizing the filter was carried out with Matlab® wavelet
toolbox [18]. Another work, [17], also describes a similar filter for performing wavelet
transformation. However the filter described in [17] is adapted to a single neural activity.
The filter proposed in this paper takes it one step ahead by providing and testing a
wavelet filter prepared by averaging the adapted wavelets of all the tasks under
consideration for wavelet analysis. This filter is thus optimized for the tasks under
normalization yields excellent feature vectors for classification, the reason for it can be
explained as; when we make overlapping segments of the given signal, we get a
Even though signal is time segmented, yet due to their overlapping nature each segment
picks up the pattern where the previous one dropped it, thus when we extract wavelets
from this pattern, we get extremely useful pattern information in these wavelets.
arises as the generalization of works done on thought classification through the Fourier
Transform (FT) [1], [2], given that the FT is a particular case of the FRFT, thus adding
new dimensions that increase the accuracy of the correct thought classification.
Conventional Fourier analysis treats frequency and time as orthogonal variables and
consequently is only suitable for the analysis of signals with stationary frequency
content [10]. Exactly as the Fourier harmonic analysis employs sinusoidal function to
decompose periodic signals, Fractional Fourier techniques employ chirp harmonics for
In mathematics, in the area of harmonic analysis, the fractional Fourier transform (FRFT)
applications range from filter design and signal analysis to phase retrieval and pattern
recognition.
signal into a frequency domain signal. On the other hand, the interpretation of the
domain signal. Apparently, fractional Fourier transforms can transform a signal (either in
the time domain or frequency domain) into the domain between time and frequency: it
canonical transformation, which generalizes the fractional Fourier transform and allows
distribution. From the definition above, for α=0, there will be no change after applying
fractional Fourier transform, and for α=π/2, fractional Fourier transform becomes a
Fourier transform, which rotates the time frequency distribution with π/2. For other
value of α, fractional Fourier transform rotates the time frequency distribution according
to α.
If the signal in the time domain is rectangular, it will become a sinc function in the
frequency domain. But if we apply the fractional Fourier transform to the rectangular
signal, the transformation output will be in the domain between time and frequency.
ஶ
ܨ [ݏሺݔଵ ሻ = ܵሺݔሻ = න ܭ ሺݔ, ݔଵ ሻݏሺݔଵ ሻ݀ሺݔଵ ሻ
ିஶ
௫ ௫
ିగ൬ଶ భ ି൫௫ మ ା௫భ మ ൯ୡ୭୲ ሺሻ൰
ܭ ሺݔ, ݔଵ ሻ = ܥ ݁ ୱ୧୬ ሺሻ
With ,ܥ = ඥ1 − ݅ܿݐሺܽሻ , ܽ = ܽߨ/2 and “a” is order of the FRFT. Also observe
that, F0=I; F1=F; F2=P; F3=FP=PF; and F4=F0= I, where I is an identity operator and
function is the same as the function itself s(x1), the first order transform is the
Fourier transform of s(x1), and the ±2nd order transform equals s(-x1).
Periodic nature of FRFT operator implies that the range of α and the order of the
transform can be restricted to α∈[0, 2π) and [0, 4) respectively. Value of α was
mental task classification. An RBE network contains one hidden radial basis layer of
as many neurons as input vectors and an output linear layer and has a property of
returning the exact target vectors if training and testing data is same. It has an added
advantage that its training time is noticeably less compared to other neural networks
electrode, giving us a total of six (one for each of C3, C4, P3, P4, O1, O2 electrodes)
networks for dataset1 and two networks for dataset2 corresponding to electrodes C3
and C4. We have used a parallel structure of networks for classification. This
parallel structure provides for a much better classification because each network
individual electrodes.
RBE Neural Networks were trained with first five alternate segments of the
dataset1 of first day trials only (i.e. first five trials only), thus giving 5Tasks ×
was chosen to be (1, 0, 0, 0, 0) where the task under consideration was assigned a
high value and remaining all were assigned low values. Similar actions were taken for
while deciding. Since the different networks correspond to different electrodes which
are feeding them and for which they are trained. Electrodes were found to exhibit
different fidelities
ies in representing the different tasks, and based on these differences
weight adjustment was made, so as to provide the network (or the electrode) with
better accuracy, a greater share in classification. Accuracy without this step was found
to
o be 62.63% for dataset1 and 71% for dataset2. This technique improved the
correct classification accuracy of the system to 84% and 87% for datasets 1 and 2
respectively.
i. Cursor control
ii. Video game (car game in Java)
iii. Toy car game (parallel port interface)
disabled people. Since this system works in real time, the user can get used to it easily
Screen is divided into icon size square blocks so that any one movement by the user of
cursor doesn’t overshoot an icon. Depending upon the screen resolution the step size of
cursor movement changes. A java platform (robot) was used for this purpose. It was
loading directly in matlab, and then cursor control was performed by it. Java platform
was preferred on Matlab inbuilt control due to two reasons. One Java gives a virtually
moving affect, two it also has wider options available, which also include right and left
click control. Which can be used for further enhancement in the project.
moving the car left or right through his mind. Game runs on a separate PC form the main
BCI engine (i.e. the PC on which the classification and other processes are run) to avoid
sluggish responses.
The two PCs are connected through peer to peer connection. Now it seems simple to
connect two PCs and run Matlab on one (with BCI engine) which sends classification
results to the other PC (with Java game) and Java receives these values and moves the
car in the desired direction. Communication is done through UDP (User datagram
protocol; if you don’t know). A very intriguing problem arises here..that the two PCs
wont communicate simply with UDP. Problem is with UDP communications. Following
of a toy car to a parallel port of PC. User can move car in any direction (through
combination of two basic moves). Parallel Port Pin 6 Bottom Layer is Reference Pin.
When 15 or 16 is sent either pin 3 or 6 (top layer from left side) gets high (3.26V). This
signal is first amplified to 9V and then it controls the 4066 CMOS Analog Switch. When 9V
is applied at pin 13 control pin of 4066, voltage at pin 1 is transferred to pin 2 of 4066
which in turn turns on the relay. Relay closes the switch of remote control which enables
the car to move in one direction or another. To turn off relay a zero is sent.
Toy car is controlled through parallel port. Our first attempt was at serial port.
Military Commercial
• Screening & evaluating pilots, operators
• EEG-based Cockpit controls, pilot monitoring
• Assessing consumer reactions
cost
beginning in the 1960's. Initial work led to a generalized relaxation model, based
primarily on the alpha rhythm. Training was often done solely for the strengthening of
the alpha rhythm, without regard for other variables, or other brain rhythms. It was
found that developing the alpha rhythm, in and of itself, had limited value. Continued
work has developed methods that use other rhythms, or combinations of rhythms, in
relative amounts of rhythms, providing much more precise control of the brain.
undergone slow but steady development since the 1960's. Early work by Pinneo and
work, such as "up" or "down." More recently, investigators have been looking for signals
that appear controllable, and adapting the system to them. One of these is the
"sensorimotor rhythm" (SMR), that has been found to be under a certain amount of
conscious control. Generally, the user uses "affective" thoughts, such as "feeling light" or
modulate, alter, or otherwise control any aspect of the virtual world. For example, a
system could be made sensitive to the individual's overall cognitive and emotional state,
to produce an appropriate world. This could include changing the colors or sizes of
known high schools, offer any opportunity for students to record, study, and understand
the EEG. This is unfortunate, because it is becoming increasingly clear that a basic
understanding of the EEG and its properties, especially with personal experience of
recording (ideally one's own) EEG, can provide valuable insight into the brain, as well as
the mind. For example, individual differences can be seen in EEG patterns between
people, and EEG changes in various tasks or circumstances can also be revealing. It
would be desirable for a greater number of students, at and below the undergraduate
level, to have direct experience with, and understanding of, the EEG. There is a certain
amount of popular use of phrases like "left brain," "right brain," "being in synch," "alpha
waves," and other related concepts. We like to understand how the brain operates, but
often use concepts that we must for the most part, take for granted, because there is no
practical way to check any of these ideas out. With the availability of low-cost,
see anyone's brain rhythms, their left and right-brain activity, balance, synchrony, and
other variables.
monitoring and analysis was developed by NASA during the 1960's, in connection with
the space program. This was designed primarily to monitor the pilots' state of health and
consciousness. In addition, the Air Force has had a long-standing program to develop
EEG-based pilot controls for the cockpit. These include evoked-potential based system,
which attempt to rapidly detect and act upon changes in the pilot's gaze, or level of
Another ongoing area is alertness monitoring for commercial and military transportation
systems. Initial work used the ongoing EEG, and more recent work uses event-related
Purely commercial applications include studying subjects who are viewing advertising
material or evaluating products, primarily to assess their level of interest and/or arousal.
[1] Kenji Nakayama, Yasuaki Kaneda, Akihiro Hirano, “A Brain Computer Interface based
[2] Kenji Nakayama Kiyoto Inagaki, “A Brain Computer Interface Based on Neural
[4] Wang Y, Zhang Z, Gao X and Gao S 2004c “Lead selection for SSVEP-based
[5] Sam Darvishi and Ahmed Al-Ani , “Brain-Computer Interface Analysis using
29th Annual International Conference of the IEEE EMBS Cité Internationale, Lyon,
[8] “EEG Signal Classification for Brain Computer Interface Applications “ Ecole
http/bci.epfl.ch/publications/baztarricadiplomaproject.pdf
[10] Balu Santhanam,” On Discrete Gauss Hermite Functions and Eigenvectors of the
[12] Huadong Sun, Fulin Su, Weiyi Wang and Shouhe Tang,”Parameter Estimation of
[13] Boqiang Liu, Junbo Gao, Zhongguo Liu, Zhenwang Zhang, Cong Yin,Cuiping
Peng and Jason Gu, ““Brainwave Classification based on Wavelet Entropy and Event-
[14] Clemens Brunner, Reinhold Scherer, Bernhard Graimann, Gernot Supp, and Gert
frequency analysis for the classification motor imagery EEG recordings in a Brain
Computer Interface task”, 28th IEEE EMBS Annual International Conference New York
[16] M. Misiti, Y. Misiti, G. Oppenheim, J.M. Poggi, "Les ondelettes et leurs applications”,
Hermes, 2003.
related potentials by wavelet decomposition”, Brain and Cognition, Academic Press, vol.
[23] Khalid, M.B.; Rao, N.I.; Rizwan-i-Haque, I.; Munir, S.; Tahir, F., “A Brain Computer
Interface (BCI) using Fractional Fourier Transform with Time Domain normalization and
heuristic weight adjustment”, Signal Processing, 2008. ICSP 2008. 9th International
[24] Khalid, M.B.; Rao, N.I.; Rizwan-i-Haque, I.; Munir, S.; Tahir, F., “Towards a Brain
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