M02B-1

A HIGH GAIN, LOW VOLTAGE FOLDED-SWITCHING MIXER

WITH CURRENT-REUSE IN 0.18 ,UM.CMOS

Vojkan Vidojkovic, Johan van der Tang, Arjan &euwenburght and Arthur van Roermund

Eindhoven University of Technology, Mixed-signal Microelectronics (MsM) group

Den Dolech 2, P.O.Box 5 13,5600 MB Eindhoven, The Netherlands
National Semiconductor, Het Zuiderkmis 53,5215 MV, 's-Hertogenbosch, The Netherlands
[email protected] .

Absrracr The scaling of the CMOS technologies has a a MOS transistor in the linear region. In this way, a passive linear
great impact on analog design. T h e most severe consequence is mixer is obtained [I]. This mixer has a very high linearity (llp3
a reduction ofthe voltagesupply. In thisarticle,a new low volt- around 40 dBm) hut its NF is very high (around 30 dB). Such
age'folded-switching mixer with current reuse, which operates a NF will lower the sensitivity of a receiver front-end too much.
a t 1 V supply voltage, is discussed. The main advantages of the The second possibility is to exploit the square law characteristic
introduced mixer topology are: a high voltage gain, a moder- of a MOS transistor (21. 7he disadvantage of this mixer is a low
ate noise figure and a n operation at low supply voltages. Full gain (around 2 dB). The third possibility is to realize a switching
insight into mixer operation is given by analyzing voltage gain, mixer. A well known example is the Gilbert-cell mixer. The over-
noise figure, linearity (11P3) and DC stability. The mixer is all performance of the Gilhen cell mixer is normally sufficient for
designed and implemented in 0.18 pm CMOS technology with a majority of applications (NF around 10 dB, gain anund 10 dB
MIM capacitors a s a n option. The active chip area is 160 pm and l l P 3 around 1 dBm at power dissipation levels around 6 mW)
x 200 pm. At 2.4 GHz a single side band (SSB)noise figure of [71, but it can not stand very well low supply voltages. The re-
13,9dB,avoItagegainof 11.9dBandIIP30f-3dBmaremea- duction of the supply voltage will cause severe limitations in the
sured a t a supply voltage of 1 V and w i t h a power consumption mixer performance because, three transiston are stacked. The prc-
of3.2mW. posed folded-switching mixer with current-reuse can be regarded
as a modification of the Gilben-cell mixer, that can allow a low
1. INTRODUCTION voltage operation.

CMOS technology scaling, migrating towards deep submicron II. BASIC OPERATION
processes, yields a constant improvement in power consumption,
speed and number of transistors per unit area. The idea to avoid the
need for an analog front-end by connecting analog to digital con-
vener (ADC) immediately to the antenna is not yet feasible. The
performance of todays analog to digital converters are the bottle-
neck. They are still far away from the required ones for such a
purpose. Taking into account that fact and driven by the require-
ments to reduce the cost by implementing the analog and digital
part of RF transceivers in the same technology and on the same
chip, RF analog designers have to find solutions for RF analog cir-
cuits in new submicron CMOS technologies. While CMOS tech-
nology scaling is quite beneficial for digital circuits, it is not the
case for RF analog circuits and the redesign of RF analog circuits
in a new CMOS technology is rather difficult. The most severe
consequence of the technology scaling, that affects RF analog de-
signers, is a reduction of the voltage supply. Insufficient voltage
room can cause that some circuit topologies can not satisfy the re-
quired specificationsor even they can not operate. Hence, research
into low-voltage circuit topologies is important.
This paper, discusses a low voltage mixer that can have a 1 V sup-
ply voltage and still offers good performance. The first stepto ar-
rive at a suitable mixer topology, is to select an appropriate way to
Figure 1. Folded-switching mixer with current-reuse
realize the mixing operation in CMOS technology. This selection
has been done between three possibilities. The first one is to use The folded-switching mixer with current-reuse is depicted in Fig.
I. In the presented mixer topology the stage that represents the

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0-7803-8333-8/04/$20.00 D 2004 IEEE 2004 IEEE Radio Frequency Integrated Circuits Symposium
voltage to current (V-I) converter and the switching stage are con-
nected in a way such :hat the switching transistors are folded with
respect to the :rmsisIors in thc V-l convener. This novel connec-
tion method yields low-voltage operation. The major pan of the
DC current in the mixer flows through the transistors in the V-I
convener and only a small amount of the DC current flows through
the switching transistors, yielding low voltagedrop across the load
resistors. In this way the problems that appear in the case of th'e
Gilben cell mixer are avoided and the folded-switching mixer can
be designed to operate at low supply voltages (down to 1 V). The
current reuse principle is for the first time introduced in [6].This is Figure 2. Transfer function of t h e folded-switching mixer with
an efficient way to have a high voltage gain and a low noise figure current-reuse
with a low power dissipation.
voltage V I and the bumps can be reduced by keeping the switch-
111. GAIN. NOISE FIGURE AND LINEARITY ing transistors far from :he linear region.

The voltage gain of the mixer can be approximated by: IV. DC STABILITY

In order to design a robust folded-switching mixer with current-

reuse. that can stand the voltage supply variations of 10 %, it is
where,g is the transconductance of MI and M 2 and gmP is the
necessary to calculate the varialions of voltage V I or V,' as a func-
transconductance of M3 and M4. From (I ), it can be seen that tion of the supply voltage variations (AVrfdcn and AV,fdcp). 'Ihis
transistors M3 and M 4 both contribute to the voltage gain, which can be done applying the large signal analysis and the Kirchoffs
is the result of the applied current reuse principle. Since, the major
law on the node A (see Fig. I):
pan of the DC current in the mixer flows through the transistors in
the V-I convener and only a small amount of the DC current flows In= I, +2IA (3)
through the switching transistors, i t is possible to use large load
resistors and to ob:ain a high voltage gain because the voltage drop where In is the current through the transistor MI,1, through M3
on the load resistors is low. The DC current through switching and I, through M6 and M7. Current Incan be expressed as:
transistors can be controlled by b o d , voltage. In this way, voltage 1 W
V2 can be kept high allowing a high output voltage swing, that 2
1" = -&&I y ( V g s - V,)*(1 + Ah) (4)
will not corrupt the operation of switching transistors (they should
stay in saturation when they conduct). By adjusting the W I L ratio where nl.! is the electron mobility, C,, is the gate oxide capacitance
of the transistors M I . M2, M3, M 4 and choosing a proper V,fdC per unit area, W is the channel width and L is the channel length,
voltage, the required transconductance of the V-1 convener can be V, is the threshold voltage, V,, is the gate-source voltage and h is
obtained. Voltage V I should be sufficiently low in order to provide channel-length modulation coefficient. Similar equations can he
enough voltage room for the switching transistors to withstand a written for currents lpand Is.Substituting the expressions for I,,,
high output voltage swing that results from a high gain. On the I, and 1, in (3). an equation that contains VI to the third power is
other hand, voltage V I should be sufficiently high in order to keep obtained and it is very difficult to solve it in the c l o d form.
MI and M2 in saturation when an input voltage is applied. In order to overcome this difficulty, a small signal analysis will
The N F of the folded switching mixer with current reuse can be be applied assuming that the variations of voltages V,f,, and
approximated by: v,fdCp are small. This analysis will still give good estimation
about the variations of voltage V : . Substituting the small signal
model for each transistor (parallel connection of transistor output
impedance and ideal current source with value g,V;,, where g , is
the transconductance and Via small signal voltage at the gate) and
where Q is the source resistance. Choosing the right biasing volt- applying the Kirchoffs law for nodes A and B the variations of
ages v,fd<.. Vrfdc, and WIL ratio of the transistors M I , M2, M 3 voltage V I or VI' can be calculated
and M 4 , sufficiently high transconductance g, and, ,g can he
obtained resulting in a low N F .
The transfer function ofthe mixer (VoLjiflVinji,) is represented in
Fig. 2. At the points A and B the switching transistors are Nmed where ROp and Ron are output impedances of transistors MI and
off by the high voltage on the node VI or node V I ' . This can hap- M 3 . g, is the transconductance of the switching transistors. In
pen when voltage V,f or 6 is low. In that case the highcurrent the denominatorg, (in the design g, = 2.5 mS) dominates and
pushed by the transistors M3 or M 4 will make a high voltage on reduces the variations of the voltage V I . Taking into account pro-
the output impedance of the transistors M I or M2 that will turn off cess spread, supply voltage variations of 10 % and temperature
the switching transistors M7 and M 6 or M5 and M8. The bumps on variations (-25°C to 70°C) the worst variations of V I are: from
the transfer function are caused by the operation of switching tran- 232 mV to 450 mV and nominally V I = 310 mV. These varia-
sistors in linear region. Linearity depends on L. It can be improved tions do not deteriorate the circuit operation and there is no need
by increasing L and reducing the bumps. In the folded-switching for common mode feedback, which is another advantage of the
mixer with current-reuse, L can be increased by decreasing the proposed mixer.

32
 V. EXPERIMENTAL RESULTS -measured a t V d d 4 . 6 V -simulated at
-measured a t Vdd=l V -simulated mt Vdd=l V

.- ,
1.a 2 2.2 2.4 2.6

f (ah)
Figure 3. Die micrograph of the folded-switching mixer with
current-reuse
Figure 5. Measured and simulated voltage gain versus fre-
quency
Fig.3 shows the micrograph of the realized folded-switching mixer
with current-reuse. The active chip area is 160 pm x 200 pm.
Total dissipation of the IC is 8.1 mW at a supply voltage (Vdd) of The noise figure ( N F ) is measured and simulated at IF of I M H r .
1.8 V and 3.2 mW at a supply voltage of 1 V. with a 50 Q source resistance and I kR load resistance, and with
Fig. 4 shows a measured mixer voltage gain (G)as a function a differential LO voltage swing of 500 mVp. For LO frequency of
ofthe differential local oscillator (LO) voltage swing (&o,d;f). In 2.4 GHr. a SSB N F of I2p dB is measured at a supply voltage of
Fig. 4 the numbers on the x-axis denote the peak values ofthe ap- 1.8 V and a SSB N F of 13.9 dB at a supply voltage of I V. The
plied differential LO voltage swing. The LO frequency is set to 2.4 measured values for the N F corresponds very well to the simulated
GHz, while the output signal is measured at an intermediate fre- results, which are: SSB NF = 12 dB at Vdd s 1.8 V and SSB
quency ( I F ) of 1 MHz. As it can be seen, the voltage gain reaches N F = 13.4 dB at Vdd = 1 V.
the highest value for &,,dif = 500 mV. For V,,,,, lower than Fig. 6 shows a measured l l P 3 at a supply voltage of 1 V. The
500 mVp, the voltage gain is reduced because such a L O voltage simulated IIP3 for the same supply voltage is -2.7 dBm. At
swing is not enough high for the switching transistors in the mixer Vdd = 1.8 V. a measured and simulated IIP3 are I dBm and 0
to perform complete switching. For & o , d j ~ higher than 500 mVp dBm, respectively.

;::rFq
the switching transistors partly operate in the linear region when
they conduct. This also causes a gain reduction. Poul (dBrn)

*messured~tVdd=l.8 V+rnsasvndatVdd=l V

-10
;13 -20

-30

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s -40
$ 7 -50
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200 SO0 400 500 600 700
-701 ~ ~ ~ ! ~ ~ ~ : ~ :!: >
VisdrlmVp) -34 -28 -22 -16 -10 4 -1Pin(dBm)

Figure 6. Measured l l P 3 at a supply voltage of 1 V

Figure 4. Measured voltage gain versus LO voltage swing
In order to evaluate the performance of the folded-switching mixer
with current-reuse, the performance of some interesting CMOS
Measured and simulated voltage gain at supply voltages of 1 V mixers are given in Table I . When comparing the measured perfor-
and 1.8 V versus frequency are shown in Fig. 5. The difference mance of the folded-switching mixer with current-reuse with the
between the measured and simulated results is mainly due to the performance of some CMOS mixers, given in Table 1, the follow-
parasitic capacitances. 7heir influence on voltage gain reduction ing advantages of the folded-switching mixer with current-reuse
become stronger on the higher frequencies. can be listed:

33
 Fom
- 29
t - Folded-switching mixer
with current-reuse

- 27
- 25
- 23
- 21
- 19
- 17
- 15
0 1 2
High voltage gain
Figure 7 . Mixer benchmarking
High mixer voltage gain is important. In a front-end it helps
to reduce the noise contribution from building blocks after
the mixer. All the mixer implementations presented in Ta- VI. CONCLUSIONS
ble l have significantly lower gain than the folded-switching
mixer with current-reuse. A novel, high gain, low voltage, low power folded-switching mixer
with current-reuse is designed and implemented. Full insight into
Moderate noise figure the circuit operation is given. This insight is important because it
Comparing the measured value for the noise figure of the helps a designer to design the folded-switching mixer with current-
folded-switching mixer with current-reuse with the values reuse for different set of specifications. Using the presented mea-
for the noise figure of the CMOS mixers given in Table I , surement results it was shown that the main advantages of the pro-
and taking into account power cohsumption, it is clear that posed new mixer topology are: high voltage gain, moderate noise
a relatively moderate noise figure is obtained. It is impor- figure, operation at low supply voltage and simplicity since the
tant to take into account for some mixer implementations common mode feedback is not necessary. Normalizing mixer per-
the fact that they are implemented in older CMOS technolo- formance with a figure of merit shows that the folded-switching
gies where the level of thermal and flicker noise was lower. mixer with current-reuse has excellent perfomance in comparison
Also some of them use very high intermediate frequency (IF) with other CMOS mixers.
avoiding the contribution of the flicker noise.

Operation a t low supply voltage ACKNOWLEDGMENT

The presented folded switching mixer with current reuse is The authors would like to thank A. Mulders, 3. ter Laak, A.
performing very well with low supply voltages. Even at the Hoogstraate, 3. Prummel, 3. Otten, E van Duijvenvoorde from Na-
supply voltage of 1 V, a voltage gain of 11.9 dB is measured. tional Semiconductor and Otto Stoelenga from Eindhoven Univer-
Comparing this result with the low voltage mixer presented sity of Technology for participating in many fNilfU1 discussions,
in 121, it can be seen that the implemented folded-switching and Technology Foundation STW for the financial support.
mixer with current-reuse has approximately the same noise
figure, lower power consumption and much better voltage
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7i,p,poiogy (I 1.8-2.5 GHz
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