Physics Investigatory Project: Abhinav Kumar Singh Xii-A Roll No.: Kendriya Vidyalaya New Cantt. Allahabad
Physics Investigatory Project: Abhinav Kumar Singh Xii-A Roll No.: Kendriya Vidyalaya New Cantt. Allahabad
Physics Investigatory Project: Abhinav Kumar Singh Xii-A Roll No.: Kendriya Vidyalaya New Cantt. Allahabad
PHYSICS
INVESTIGATORY
PROJECT
ABHINAV KUMAR SINGH
XII-A
ROLL NO.:
KENDRIYA VIDYALAYA NEW
CANTT. ALLAHABAD
KENDRIYA VIDYALAYA NEW CANTT.
ALLAHABAD
DEPARTMENT OF PHYSICS
CERTIFICATE
This is to be certify that ABHINAV KUMAR SINGH , a
student of class XII-A has successfully completed the
research on the below mentioned project under the
guidance of Mrs. MANJU TIWARI , physics teacher
during the year 2016-17 in fulfilment of physics
practical examination.
Signature
ACKNOWLEDGEMENT
2. introduction
3. theory
4. principle
5. basic gates
6. applications of gates
7. construction
8. Bibliography
Aim
To design an appropriate logic gate
combination for given truth table
Introduction
A gate is defined as a digital circuit which
follows some logical relationship between the
input and output voltages. It is a digital
circuit which either allows a signal to pass
through as stop, it is called a gate.
The logic gates are building blocks at digital
electronics. They are used in digital
electronics to change on voltage level (input
voltage) into another (output voltage)
according to some logical statement relating
them.
A logic gate may have one or more inputs, but
it has only one output. The relationship
between the possible values of input and
output voltage is expressed in the form of a
table called truth table or table of
combination.
Theory
Truth table of a Logic Gates is a table that
shows all the input and output possibilities
for the logic gate.
LOGIC STATES
1 0
HIGH LOW
+ve -ve
ON OFF
CLOSE OPEN
RIGHT WRONG
TRUE FALSE
YES NO
Basic gates
(c) The NOT GATE is a device that inverts the inputs. The
NOT is a one input and one output. The logic gate of
NOT gate with A and Y output is shown below:
In Boolean algebra, bar symbol (_) is referred as the
NOT. The Boolean expression:
X =Y, indicates Y equals NOT A
The or gate
Aim:
TO DESIGN AND SIMULATE THE OR GATE CIRCUIT.
Components:
Two ideal p-n junction diode (D 1 and D2).
If switch A & B are open lamp do not glow (A=0, B=0), hence Y=0.
If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.
If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.
If switch A & B are closed then (A=1, B=1) Lamp glow, hence Y=1.
Truth Table:
0 0 0
1 0 1
0 1 1
1 1 1
The and gate
Aim:
TO DESIGN AND SIMULATE THE AND GATE CIRCUIT.
Components:
Two ideal p-n junction diode (D 1 and D2), a resistance R.
If both switches A&B are open (A=0, B=0) then lamp will not glow, hence
Y=0.
If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence
Y=0.
If switch A open & B closed (A=0, B=1) then Lamp will not glow, hence
Y=0.
If switch A & B both closed (A=1, B=1) then Lamp will glow, hence Y=1.
Truth Table:
0 0 0
1 0 0
0 1 0
1 1 1
The not gate
Aim:
TO DESIGN AND SIMULATE THE NOT GATE CIRCUIT.
Components:
An ideal n-p-n transistor.
If switch A is open (i.e. A=0), the lump will glow, hence Y=1.
If Switch A is closed (i.e. A=1), the lump will not glow, hence Y=0.
Truth Table:
Input A Output Y
0 1
1 0
The nor gate
Aim:
TO DESIGN AND SIMULATE THE NOR GATE CIRCUIT.
Components:
Two ideal p-n junction diode (D 1 and D2), an ideal n-p-n transistor.
If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1.
If Switch A closed & B open (A=1, B=0) then Lamp will not glow, hence
Y=0.
If Switch A open & B close (A=0, B=1) then Lamp will not glow, hence
Y=0.
If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0.
Truth Table:
Input Input Output
A B Y
0 0 1
1 0 0
0 1 0
1 1 0
The nand gate
Aim:
TO DESIGN AND SIMULATE THE NAND GATE CIRCUIT.
Components:
Two ideal p-n junction diode (D 1 and D2), a resistance R, an ideal n-p-n
transistor.
If Switch A & B open (A=0, B=0) then Lamp will glow, hence Y=1.
If Switch A open B closed then (A=0, B=1) Lamp glow, hence Y=1.
If switch A closed B open then (A=1, B=0) Lamp glow, hence Y=1.
If switch A & B are closed then (A=1, B=1) Lamp will not glow, hence Y=0.
Truth Table:
Wherever the occurrence of any one or more than one event is needed
to be detected or some actions are to be taken after their occurrence,
in all those cases OR gates can be used. It can be explained with an
example. Suppose in an industrial plant if one or more than one
parameter exceeds the safe value, some protective measure is needed
to be done. In that case OR gate is used. We are going to show this
with the help of a diagram. The above figure is a typical schematic
diagram where an OR gate is used to detect exceed of temperature or
pressure and produce command signal for the system to take required
actions.
Application of and gate
There are mainly two applications of AND gate as Enable gate and
Inhibit gate. Enable gate means allowance of data through a channel
and Inhibit gate is just the reverse of that process i.e. disallowance of
data through a channel. We are going to show an enabling operation to
understand it in an easier way. Suppose in the measurement of
frequency of a pulsed waveform. For measurement of frequency a
gating pulse of known frequency is sent to enable the passage of the
waveform whose frequency is to be measured. The diagram below
shows the arrangement of the above explained operation.
NOT gates are also known as inverter because they invert the
output given to them and show the reverse result. Now the CMOS
inverters are commonly used to build square wave oscillators
which are used for generating clock signals. The advantage of
using these is they consume low power and their interfacing is
very easy compared to other logic gates.
The above figure shows the most fundamental circuit made of ring
configuration to generate square wave oscillator. The frequency of this
type generator is given by
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