Edge Detection On Fpga
Edge Detection On Fpga
Edge Detection On Fpga
A
MAJOR PROJECT REPORT
OF
BACHELOR OF TECHNOLGY
IN
ELCTRONICS AND COMMUNICATION ENGINEERING
SUBMITTED
BY
Supervisor
Dr. Ashish Raman
Assistant Professor
CERTIFICATE
We hereby certify that the work which is being presented in this report
entitled, EDGE DETECTION ON FPGA in partial fulfillment of the
requirement for the award of Degree of Bachelor of Technology
(Electronics and Communication Engineering) submitted in the
Department of Electronics and Communication Engineering of Dr B R
Ambedkar National Institute of Technology, Jalandhar is a record of our
work carried out during 2016-17 under the supervision of Dr. Ashish
Raman. The matter presented in this report has not been submitted in part
or full to any other University or Institute for the award of any Degree.
Signature of Candidates:
Signature of Supervisor(s):
Name of Supervisor: Dr. Ashish Raman
Designation: Assistant Professor
ACKNOWLEDGEMENT
Also I would like to thank faculty from NIT Jalandhar for providing me the opportunity
for working on this project.
Finally, I am thankful to all those who directly or indirectly helped me during this
training.
The image processing algorithms has been limited to software implementation which is
slower due to the limited processor speed. The implementation of image edge detection
on hardware is important for increasing processing speed of image processing systems.
So a dedicated processor for edge detection is required which was not possible until
advancements in VLSI technology.
The proposed work presents FPGA based architecture for Edge Detection using Sobel
operator. Sobel operator is chosen due to its property of less deterioration in high levels
of noise.Edge information for a particular pixel is obtained by exploring the brightness
of pixels in the neighborhood of that pixel. Measuring the relative brightness of pixels
in a neighborhood is mathematically analogous to calculating the derivative of
brightness. The pixel information extracted is transferred from the computer to the field
programmable gate array device. Sobel edge detection operations are performed on the
data and the processed data is sent back to the computer. The transfer of data is done
using parallel port interface operating in bidirectional mode. All the digital logic
implemented and verified on the field programmable gate array kit is described using
the Very High Speed Integrated Circuit Hardware Description Language (VHDL) and
the target ISs Xilinx Spartan 3 Family device XC3S400.
1. Introduction
1.1Aim
The aim of this project is to implement the Sobel Edge detection Operator on Hardware
(Field Programmable Gate Array).
Edge information for a particular pixel is obtained by exploring the brightness of pixels
in the neighbourhood of that pixel. If all of the pixels in the neighbourhood have almost
the same brightness, then there is probably no edge at that point. However, if some of
the neighbours are much brighter than the others, then there is a probably an edge at
that point.
Various physical actions like discontinuity in object boundary, surface direction and in
geometry cause changes in intensity. Edges can be shaped according to their amplitude
changes as follows:
Step Edge: The intensity of the image suddenly varies from one value to one side of
the breakage to a different value on the other side.
Ramp Edge: When the intensity change is not spontaneous and appears over a limited
distance then step edges become ramp edges
Ridge/Line Edge: The intensity of an image suddenly changes values and then returns
to the initial point within short distance.
Roof Edge: When the intensity change is not spontaneous and appears over a finite
distance usually generated by connectivity of surfaces then line edges become roof
edges.
Gradient Edge Detection: Gradient is the first order derivative used in digital image
processing. Edges are detected by looking for the maximum and minimum value in the
first derivative of the image. eg. Sobel, Robert.
Laplacian Edge Detection: The second order derivatives in image processing are
generally computed using Laplacian. To find the edges in an image, the laplacian
method looks for zero crossings (i.e. places where the sign of Laplacian changes) in the
second order derivative. An edge is the one-dimensional ramp shaped and the position
of edge can be identified by computing the second order derivative of the image.
Steps in Edge Detection
Edge detection contains mainly four steps which are depicted in following fig
Detection: It detects the edges by using the thresholding criteria that which edge
pixels should be discarded as noise and which should be retained.
The Sobel Edge Detection Operator is a 3x3 Spatial mask. It is based on the differential
operation [1 0 -1] and an averaging operator [1 2 1], Convolving these operators we get
the 3x3 spatial mask for sobel:
The Spatial mask is convolved over the image to obtain the edge or high passed image.
The figure 2 shows the convolution mask working over an image. The mask is
convolved and the center element is replaced as the mask operates on the image. The
borders of the images are usually blacked out, since they cannot be computed with a
3x3 mask, or partially computed.
The Spartan-3E FPGA Starter Kit board includes a VGA display port via a
DB15 connector. Connect this port directly to most PC monitors or flat-panel
LCDs using a standard monitor cable. As shown in Figure the VGA connector is
the left-most connector along the top of the board. The Spartan-3E FPGA
directly drives the five VGA signals via resistors. Each colour line has a series
resistor, with one bit each for VGA_RED, VGA_GREEN, and VGA_BLUE.
The series resistor, in combination with the 75 termination built into the VGA
cable, ensures that the colour signals remain in the VGA-specified 0V to 0.7V
range. The VGA_HSYNC and VGA_VSYNC signals using LVTTL or
LVCMOS33 I/O standard drive levels. Drive the VGA_RED, VGA_GREEN,
and VGA_BLUE signals High or Low to generate the eight colours.
Figure 4 DB 15 Connector
Red(R) R12
Green(G) T12
Blue(B) R11
Horizontal Sync R9
(HS)
Vertical Sync T10
(VS)
Edge detection is a very complex process affected by deterioration due to different level
of noise. A number of operators are defined to solve the problem of edge detection.
They are effective for certain classes of images, but not suitable for others. Edge
detection is a crucial step in digital image processing. It has found application in
artificial intelligence systems, forensic science and also in digital multimedia for
creating image dazzling effect. Currently the image processing algorithms has been
limited to software implementation which is slower due to the limited processor speed.
So a dedicated hardware for edge detection has been required which was not possible
until the advancements in VLSI technology.
Edge detection becomes a more complicated task when using much improved edge
detection masks. Moreover the process becomes lengthier when it operates on an image
of very high resolution. Most hardware implementations are faster than its
corresponding software implementations. So implementing edge detection in hardware
will be more efficient. Since FPGA have got the added feature of parallelism, the edge
detection can be effectively implemented.
During the recent years, field programmable gate arrays (FPGA) have become the
dominant form of programmable logic. In comparison to previous programmable
devices like programmable array logic (PAL) and complex programmable logic devices
(CPLD), FPGA can implement far larger logic functions. FPGA supports sufficient
logic to implement complete systems and sub-systems. FPGA provides designers with
reconfigurable logic that can be reprogrammed on application-specific basis. This
drastically increases flexibility in the design process.
Any edge detection masks when operated on a group on 9 pixels, there will be 12
multiplications. So while processing an image of size n x n, there will be a total of 12 x
(n-2)2 multiplications. The total number of multiplications can be reduced to 2 x (n-2)2
(i.e. reduced about 6 times) by using Sobel edge detection operator because it has got
mask values which does not require any multiplication at all. Moreover the
multiplication by 2 can be implemented easily using a shift operation instead of
implementing a multiplier.
The choice of Sobel edge detection operator is also motivated by the fact that they
incorporate both the edge detection as well as smoothing operator so that they have
good edge detection capability in noisy conditions. Sobel operator is less deteriorated in
high levels of noise.
The proposed work presents FPGA based architecture for Edge Detection using Sobel
operator. Sobel operator is chosen due to its property of less deterioration in high levels
of noise. Edge information for a particular pixel is obtained by exploring the brightness
of pixels in the neighbourhood of that pixel. Measuring the relative brightness of pixels
in a neighbourhood is mathematically analogous to calculating the derivative of
brightness. The pixel information extracted is transferred from the computer to the field
programmable gate array device. Sobel edge detection operations are performed on the
data and the processed data is sent back to the computer. The transfer of data is done
using parallel port interface operating in bidirectional mode. All the digital logic
implemented and verified on the field programmable gate array kit is described using
the Very High Speed Integrated Circuit Hardware Description Language (VHDL) and
the target ISs Xilinx Spartan 3 Family device XC3S400.
3. Methodology
2. The greyscale image is converted into raw data (in pixel form) using MATLAB.
The file is a plain text file (not binary, for readability) format used for our raw
image format is as follows:
Width Height Number of Colours (1 or 3)
Pixel Data Pixel Data Pixel Data Pixel Data Pixel Data
Pixel Data Pixel Data Pixel Data Pixel Data Pixel Data
Pixel Data Pixel Data Pixel Data Pixel Data Pixel Data
....
....
Pixel Data Pixel Data Pixel Data Pixel Data Pixel Data
6. http://pnrsolution.org/Datacenter/Vol3/Issue1/161.pdf
7. http://www.ugcfrp.ac.in/images/userfiles/59187-837.pdf
8. https://www.xilinx.com/support/documentation/data_sheets/ds312.pdf
9. https://www.academia.edu/5380026/PERFORMANCES_ANALYSIS_OF_DIF
FERENT_EDGE_DETECTION_METHODS_ON_ROAD_IMAGES