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    Embedded Internal 1 - 2 - Sets IV ECE C

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    jubair
    1) This document appears to be an exam for a course on embedded and real-time systems. It contains exam instructions, part A questions, and part B questions. 2) Part A contains 5 short answer questions worth 2 marks each, covering topics like UML, endian modes, CPU accelerators, supervisor mode, and processor architectures. 3) Part B contains 4 longer answer questions worth 8 or 16 marks each, asking students to write about embedded system design processes, ARM processors, CPU performance, and a model train controller design.

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    © All Rights Reserved
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    Embedded Internal 1 - 2 - Sets IV ECE C

    Uploaded by

    jubair
    8 views2 pages
    1) This document appears to be an exam for a course on embedded and real-time systems. It contains exam instructions, part A questions, and part B questions. 2) Part A contains 5 short answer questions worth 2 marks each, covering topics like UML, endian modes, CPU accelerators, supervisor mode, and processor architectures. 3) Part B contains 4 longer answer questions worth 8 or 16 marks each, asking students to write about embedded system design processes, ARM processors, CPU performance, and a model train controller design.

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    embedded

    Original Title

    Embedded Internal 1_2_Sets IV ECE C

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    1) This document appears to be an exam for a course on embedded and real-time systems. It contains exam instructions, part A questions, and part B questions. 2) Part A contains 5 short answer questions worth 2 marks each, covering topics like UML, endian modes, CPU accelerators, supervisor mode, and processor architectures. 3) Part B contains 4 longer answer questions worth 8 or 16 marks each, asking students to write about embedded system design processes, ARM processors, CPU performance, and a model train controller design.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    8 views2 pages

    Embedded Internal 1 - 2 - Sets IV ECE C

    Uploaded by

    jubair
    1) This document appears to be an exam for a course on embedded and real-time systems. It contains exam instructions, part A questions, and part B questions. 2) Part A contains 5 short answer questions worth 2 marks each, covering topics like UML, endian modes, CPU accelerators, supervisor mode, and processor architectures. 3) Part B contains 4 longer answer questions worth 8 or 16 marks each, asking students to write about embedded system design processes, ARM processors, CPU performance, and a model train controller design.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    of 2

    SET A Date of Exam:

    Reg. Number

    13.08.2016

    *** All the Best ****


    Prepared by:M. Mohankumar, AP/ECE

    SRI ESHWAR COLLEGE OF ENGINEERING


    Internal Test - I August 2016
    VII Semester IV ECE C
    ELECTRONICS & COMMUNICATION ENGINEERING
    EC6703 EMBEDDED & REAL TIME SYSTEMS
    Regulations: R 2013
    Time: 1 Hours
    Answer ALL Questions

    SET B

    Max marks: 50

    2.
    3.

    Define CPSR.

    4.

    Define cache bit and cache miss.

    5.

    What is meant by baseline packet?

    M
    2

    Co#
    1

    BT
    R

    Time: 1 Hours
    Answer ALL Questions
    Q. No
    1.

    M
    8

    Co
    #
    1

    B
    T
    R

    Write short notes on Embedded system design process.


    Explain in detail the design steps of modern train controller with
    suitable diagrams

    16

    (OR)
    7
    (B)
    8
    (A)

    What are instructions set preliminaries? Explain in detail


    about various instruction sets in ARM with suitable example.

    16

    Describe the structural and behavioral description of methods used


    16
    1
    for designing an embedded system.
    (OR)
    8
    Explain about CPU performance and Power consumption of ARM
    16
    1
    (B) processor.
    Note: M Marks CO# - Course Outcome
    BT- Blooms Taxonomy R Remember U
    Understanding AP - Apply AN Analyze E Evaluate C - Create

    U
    AP
    R

    Max marks: 50

    PART A - (5 x 2 = 10 Marks)
    Question
    What is UML and how is categorized for embedded
    system design?
    What is little Endian and big Endian mode?

    Co#
    1

    BT
    R

    4.

    Draw the block diagram of CPU accelerator in an embedded 2


    system?
    What is SPSS how it is used in supervisor mode?
    2

    5.

    Distinguish Von-Neumann and Harvard architecture.

    3.

    (Q6 Compulsory)
    Question

    Reg. Number

    M
    2

    2.

    PART B ([1 x 8] + [2 x 16] = 40 Marks)


    Q.
    No
    6
    7
    (A)

    13.08.2016

    SRI ESHWAR COLLEGE OF ENGINEERING


    Internal Test - I August 2016
    VII Semester IV ECE C
    ELECTRONICS & COMMUNICATION ENGINEERING
    EC6703 EMBEDDED & REAL TIME SYSTEMS
    Regulations: R 2013

    PART A - (5 x 2 = 10 Marks)
    Question
    What are the parameters used to evaluate the CPU
    performance?
    State the features of ARM processors.

    Q. No
    1.

    Date of Exam:

    PART B ([1 x 8] + [2 x 16] = 40 Marks)


    (Q6 Compulsory)
    Q.
    No
    6
    7
    (A)

    Question
    Write in detail about consumer electronics architecture
    Describe embedded system design process in detail

    M
    8

    Co
    #
    1

    B
    T
    R

    16

    16

    16

    16

    (OR)
    7
    (B)
    8
    (A)
    8
    (B)

    Describe ARM processor


    Explain about CPU performance and power consumption
    (OR)
    Explain in detail about model train controller

    Note: M Marks CO# - Course Outcome


    BT- Blooms Taxonomy R Remember U
    Understanding AP - Apply AN Analyze E Evaluate C - Create

    *** All the Best ****


    Prepared by:M. Mohankumar, AP/ECE

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