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    Nama: Valentinho Mau Siga Kelas: B Semester: VI (Enam) No. Regis: 231 13 002

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    ardian alfa
    This document contains the student's name and class information, followed by two problems involving Boolean logic. The first problem asks the student to create a truth table and circuit diagram for the Boolean expression (A.B.C) + (A'.B'.C'). The second problem asks the student to create a truth table, Karnaugh map, and circuit diagram based on the year of their class and the last two digits of their student ID number. The student provides detailed responses to both problems, including a truth table with 8 variables, a completed Karnaugh map, and indicates that the resulting circuit will be an OR gate of all the variables.

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    Nama: Valentinho Mau Siga Kelas: B Semester: VI (Enam) No. Regis: 231 13 002

    Uploaded by

    ardian alfa
    9 views8 pages
    This document contains the student's name and class information, followed by two problems involving Boolean logic. The first problem asks the student to create a truth table and circuit diagram for the Boolean expression (A.B.C) + (A'.B'.C'). The second problem asks the student to create a truth table, Karnaugh map, and circuit diagram based on the year of their class and the last two digits of their student ID number. The student provides detailed responses to both problems, including a truth table with 8 variables, a completed Karnaugh map, and indicates that the resulting circuit will be an OR gate of all the variables.

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    This document contains the student's name and class information, followed by two problems involving Boolean logic. The first problem asks the student to create a truth table and circuit diagram for the Boolean expression (A.B.C) + (A'.B'.C'). The second problem asks the student to create a truth table, Karnaugh map, and circuit diagram based on the year of their class and the last two digits of their student ID number. The student provides detailed responses to both problems, including a truth table with 8 variables, a completed Karnaugh map, and indicates that the resulting circuit will be an OR gate of all the variables.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    9 views8 pages

    Nama: Valentinho Mau Siga Kelas: B Semester: VI (Enam) No. Regis: 231 13 002

    Uploaded by

    ardian alfa
    This document contains the student's name and class information, followed by two problems involving Boolean logic. The first problem asks the student to create a truth table and circuit diagram for the Boolean expression (A.B.C) + (A'.B'.C'). The second problem asks the student to create a truth table, Karnaugh map, and circuit diagram based on the year of their class and the last two digits of their student ID number. The student provides detailed responses to both problems, including a truth table with 8 variables, a completed Karnaugh map, and indicates that the resulting circuit will be an OR gate of all the variables.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    of 8

    Nama

    VALENTINHO MAU SIGA

    Kelas

    Semester

    VI (enam)

    No. Regis

    231 13 002

    Soal:
    1. NIM (Genap):
    Buatlah Tabel Kebenaran & Rangkaian untuk persamaan:

    ( A .B.C

    ) + (A . B . C ) = Y

    Kemudian buatlah kesimpulan dari rangkaian tersebut!


    2. Buatlah tabel kebenaran, peta karnaugh dan gambarkan rangkaian berdasarkan tahun
    angkatan dan dua digit terakhir dari nomor regis.


    1. ( A . B . C

    ) + (A . B . C ) = y

    Tabel Kebenaran:
    A

    A.B.C

    A.B.C

    X1 + X2

    0
    0
    0
    0
    1
    1
    1
    1

    0
    0
    1
    1
    0
    0
    1
    1

    0
    1
    0
    1
    0
    1
    0
    1

    1
    1
    1
    1
    0
    0
    0
    0

    1
    1
    0
    0
    1
    1
    0
    0

    1
    0
    1
    0
    1
    0
    1
    0

    0
    0
    0
    0
    0
    0
    0
    1

    1
    1
    1
    1
    1
    1
    1
    0

    1
    0
    0
    0
    0
    0
    0
    1

    Gambar rangkaian

    Analisis:

    Kesimpulan:

    2. Nomor Registrasi = 231 13 002

    A = 13 (Tahun Angkatan)
    B = 02 (Dua digit terakhir nomor regis)

    (1+3)+(0+2)
    =4+2
    =6

    a. Tabel Kebenaran

    Hasil

    A + B+C+ D+ E+ F

    A + B+C+ D+ E + F

    A + B+C+ D+ E +F

    A + B+C+ D + E+ F

    A + B+C+ D + E+ F

    A + B+C+ D +E + F

    A +B+C+ D +E +F

    A + B+ C + D+ E+ F

    A + B+ C + D+ E+ F

    A + B+ C + D+ E + F

    A + B+ C + D+ E +F

    A + B+ C +D + E+ F

    A + B+ C +D + E+ F

    A + B+C+ D+ E+

    A + B+ C +D +E + F

    A + B+ C +D +E +F

    A + B + C+ D+ E + F

    A + B+ C+ D+ E + F

    A + B+ C+ D+ E + F

    A + B+ C+ D+ E +F

    A + B+ C+ D + E+ F

    A + B+ C+ D + E+ F

    A + B+ C+ D +E + F

    A + B+ C+ D +E +F

    A + B+C + D+ E+ F

    A + B+C + D+ E+ F

    A + B+C + D+ E + F

    A + B+C + D+ E +F

    A + B+C +D + E+ F

    A + B+C +D + E+ F

    A + B+C +D +E + F

    A + B+C +D +E +F

    A + B+ C+ D+ E+ F

    A + B+ C+ D+ E+ F

    A + B+ C+ D+ E + F

    A + B+ C+ D+ E +F

    A + B+ C+ D + E+ F

    A + B+ C+ D + E+ F

    A + B+ C+ D +E + F

    A + B+ C+ D +E +F

    A + B+ C + D+ E+ F

    A + B+ C + D+ E+ F

    A + B+ C + D+ E + F

    A + B+ C + D+ E +F

    A + B+ C +D + E+ F

    A + B+ C +D + E+ F

    A + B+ C +D +E + F

    A + B+ C +D +E +F

    A +B+ C+ D+ E + F

    A +B+ C+ D+ E + F

    A +B+ C+ D+ E + F

    A +B+ C+ D+ E +F

    A +B+ C+ D + E+ F

    A +B+ C+ D + E+ F

    A +B+ C+ D +E + F

    A +B+ C+ D +E +F

    A +B+ C+ D+ E + F

    A +B+ C+ D+ E + F

    A +B+ C+ D+ E + F

    A +B+ C+ D+ E +F

    A +B+ C+ D + E+ F

    A +B+ C+ D + E+ F

    A +B+ C+ D +E + F

    A +B + C+ D +E +F

    b. Peta Karnaugh
    A
    BC
    DEF
    000
    001
    010
    110
    111
    101
    100

    A
    BC
    DEF
    000
    001
    010
    110
    111
    101
    100

    000

    001

    011

    010

    110

    111

    101

    100

    0
    1
    1
    1
    1
    1
    1

    1
    1
    1
    1
    1
    1
    1

    1
    1
    1
    1
    1
    1
    1

    1
    1
    1
    1
    1
    1
    1

    1
    1
    1
    1
    1
    1
    1

    1
    1
    1
    1
    1
    1
    1

    1
    1
    1
    1
    1
    1
    1

    1
    1
    1
    1
    1
    1
    1

    000

    001

    011

    010

    110

    111

    101

    100

    A B C D
    E F
    A B C D
    E F
    A B C D E
    F
    A BC D E
    F
    A B C D E
    F
    A B C D E
    F
    A B C D E
    F

    A B C D
    E F
    A B C D
    E F
    A B C D E
    F
    A B C D E
    F
    A B C D E
    F
    A B C D E
    F
    A B C D E
    F

    A B C D
    E F
    A B C D
    E F
    A B C D
    E F
    A B C D E
    F
    A B C D E
    F
    A B C D
    E F
    A B C D
    E F

    A B C D
    E F
    A B C D
    E F
    A B C D E
    F
    A B C D E
    F
    A B C D E
    F
    A B C D E
    F
    A B C D E
    F

    A B C D
    E F
    A B C D
    E F
    A B C D
    E F
    A B C D E
    F
    A B C D E
    F
    A B C D
    E F
    A B C D
    E F

    A B C D
    E F
    A B C D
    E F
    A B C D E
    F
    ABCDE
    F
    ABCDE
    F
    A B C D E
    F
    A B C D E
    F

    A B C D
    E F
    A B C D
    E F
    A B C D
    E F
    A B C D E
    F
    A B C D E
    F
    A B C D
    E F
    A B C D
    E F

    A B C D
    E F
    A B C D
    E F
    A B C D E
    F
    A B C D E
    F
    A B C D E
    F
    A B C D E
    F
    A B C D E
    F

    Gambar rangkaian

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