Ece586 Lec5 1
Ece586 Lec5 1
Ece586 Lec5 1
ECE 486/586
Computer Architecture
Lecture # 5
Spring 2015
Portland State University
Reference:
Chapter 1: Sections 1.9, 1.11
Appendix A: Sections A.1, A.2
System Level
Multiple processors
Multiple disks
Multiple memory channels
Pipelined buses
Processor Level
Pipelined instruction execution
Multiple functional units
Logic level
Carry lookahead adders
Multi-banked caches
Multi-ported register files
Data
Repeated access to the same variable, e.g., loop counter
Examples:
The number of add/subtract instructions in a typical program is
substantially higher than divide instructions
Focus more on building fast adders as compared to fast dividers
Spatial
Items whose addresses are near one another tend to be
referenced close together in time
Code
Data
Array elements, fields in a data structure
Fallacy
The relative performance of two processors with the same
ISA can be judged by clock rate or by the performance of a
single benchmark suite
Pitfall
Easily made mistake
Generalizations of principles that are true in a limited
context
Fallacy
Fallacy
Why not?
Fallacy
Fallacy
Why not?
Why not?
Fallacy
MIPS (Millions of Instructions per Second) is an accurate
measure for comparing performance among computers
=
=
106
106
Problems:
Whats an instruction? Depends upon ISA
One instruction on an ISA may do as much work as ten
instructions on another ISA
Pitfall
Comparing hand-coded assembly and compiler-generated,
high-level language performance
Potential issues:
Hand-coded assembly requires specialized programmers; less
likely to be used except in embedded systems
Unless the compiler can perform the same optimizations that
can be done by assembly language programmer, performance
of the compiler-generated code will not match the hand-coded
program
Pitfall
Falling prey to Amdahls Law
Dont forget to assess the potential usage/impact of a feature before
embarking on the long journey to implement it
Pitfall
A single point of failure
Dependability is no stronger than the weakest link in the chain
Make every component redundant so that no single component
failure could bring down the whole system
Assembler
Input: Assembly language
Output: Machine code (object file)
Linker
Inputs: Object files, library files
Outputs: Executable program
Loader
Reads executable from disk
Passes command line arguments
Optionally fixes absolute addresses
ISA Classification
ISA Classification
ISA Examples
Stack
HP calculator
Pentium FP (x87 co-processor)
8 registers organized as stack
Accumulator
PDP-8
8051 microcontroller
Load/Store (Register/Register)
RISC: MIPS, Alpha, ARM, PowerPC, SPARC
Itanium
C=A+B
A, B and C are
memory locations.
R1, R2 and R3 are
registers
Register/Memory
IA-32 (Intel x86), Motorola 68000, IBM 360
PDP-11
VAX (really Memory/Memory)