Se 95
Se 95
Se 95
1. General description
The SE95 is a temperature-to-digital converter using an on-chip band gap temperature
sensor and Sigma Delta analog-to-digital conversion technique. The device is also a
thermal detector providing an overtemperature detection output.
The SE95 contains a number of data registers accessed by a controller via the 2-wire
serial I2C-bus interface:
Configuration register (Conf) to store the device settings such as sampling rate,
device operation mode, OS operation mode, OS polarity, and OS fault queue
SE95
NXP Semiconductors
2. Features
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3. Applications
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4. Ordering information
Table 1.
Ordering information
Type
number
Package
Temperature range
Name
Description
SE95D
55 C to +125 C
SO8
SOT96-1
SE95DP
55 C to +125 C
TSSOP8
SOT505-1
SE95U
55 C to +125 C
wafer
SE95_7
Version
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NXP Semiconductors
5. Block diagram
SE95
OTP
8
VCC
Conf
BIAS
Temp
bit
stream
BAND GAP
SIGMA DELTA
MODULATOR
Tos
DECIMATION
FILTER
INTERRUPTION
LOGIC
Thyst
OSCILLATOR
REGISTER
BANK
POR
OS
Fig 1.
6
A1
7
A0
SCL
SDA
GND
002aae892
6. Pinning information
6.1 Pinning
SDA
VCC
SCL
A0
OS
GND
SDA
VCC
SCL
A0
A1
OS
A2
GND
SE95D
SE95DP
A1
A2
002aac536
002aac537
Fig 2.
Fig 3.
Pin description
Symbol
Pin
Description
SDA
SCL
OS
GND
A2
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Table 2.
Symbol
Pin
Description
A1
A0
VCC
supply voltage
7. Functional description
7.1 General operation
The SE95 uses the on-chip band gap sensor to measure the device temperature with a
resolution of 0.03125 C and stores the 13-bit twos complement digital data, resulting
from 13-bit analog to digital conversion, into register Temp. Register Temp can be read at
any time by a controller on the I2C-bus. Reading temperature data does not affect the
conversion in progress during the read operation.
The device can be set to operate in either mode: normal or shutdown mode. In normal
operation mode, by default, the temperature-to-digital conversion is executed every
100 ms and register Temp is updated at the end of each conversion. In shutdown mode,
the device becomes idle, data conversion is disabled and register Temp holds the latest
result; however, the device I2C-bus interface is still active and register write/read operation
can be performed. The device operation mode is controlled by programming bit
SHUTDOWN of register Conf. The temperature conversion is initiated when the device is
powered up or returned to normal mode from shutdown mode.
In addition, at the end of each conversion in normal mode, the temperature data (or Temp)
in register Temp is automatically compared with the overtemperature shutdown threshold
data (or Tos) stored in register Tos, and the hysteresis data (or Thyst) stored in register
Thyst, in order to set the state of the device OS output accordingly. The registers Tos and
Thyst are write/read capable, and both operate with 9-bit twos complement digital data.
To match with this 9-bit operation, register Temp uses only the 9 MSB bits of its 13-bit data
for the comparison.
The device temperature conversion rate is programmable and can be chosen to be one of
the four values: 0.125, 1.0, 10, and 30 conversions/s. The default conversion rate is
10 conversions/s. Furthermore, the conversion rate is selected by programming bits
RATEVAL[1:0] of register Conf as shown in Table 6. Note that the average supply current
as well as the device power consumption increase with the conversion rate.
The way that the OS output responds to the comparison operation depends upon the OS
operation mode selected by configuration bit OS_COMP_INT, and the user-defined fault
queue defined by configuration bits OS_F_QUE[1:0].
In OS comparator mode, the OS output behaves like a thermostat. It becomes active
when the temperature exceeds Tos, and is reset when the temperature drops below Thyst.
Reading the device registers or putting the device into shutdown mode does not change
the state of the OS output. The OS output in this case can be used to control cooling fans
or thermal switches.
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NXP Semiconductors
In OS interrupt mode, the OS output is used for thermal interruption. When the device is
powered-up, the OS output is first activated only when Temp exceeds Tos; then it remains
active indefinitely until being reset by a read of any register. Once the OS output has been
activated by crossing Tos and then reset, it can be activated again only when Temp drops
below Thyst; then again, it remains active indefinitely until being reset by a read of any
register. The OS interrupt operation would be continued in this sequence: Tos trip, reset,
Thyst trip, reset, Tos trip, reset, Thyst trip, reset, and etc. Putting the device into shutdown
mode also resets the OS output.
In both cases, comparator mode and interrupt mode, the OS output is activated only if a
number of consecutive faults, defined by the device fault queue, has been met. The fault
queue is programmable and stored in bits OS_F_QUE[1:0], of register Conf. Also, the OS
output active state is selectable as HIGH or LOW by setting accordingly the bit OS_POL
of register Conf.
At power-up, the device is put into normal operation mode, register Tos is set to 80 C,
register Thyst is set to 75 C, OS active state is selected LOW and the fault queue is equal
to 1. The data reading of register Temp is not available until the first conversion is
completed in about 33 ms.
The OS response to the temperature is illustrated in Figure 4.
Tos
Thyst
OS RESET
(1)
(1)
(1)
OS ACTIVE
OS output in interrupt mode
001aad623
(1) OS is reset by either reading register or putting the device in shutdown mode. Assumed that the
fault queue is met at each Tos and Thyst crossing point.
Fig 4.
OS response to temperature
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OS_F_QUE[1]
OS_F_QUE[0]
Decimal
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NXP Semiconductors
When the power supply voltage is dropped below the device power-on reset level of
approximately 1.9 V (POR) and then rises up again, the device will be reset to its default
condition as listed above.
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NXP Semiconductors
false alert if the address 0Ch is sent and cannot be active on the I2C-bus if this address is
used. Consider using the SE98 since it supports SMBus ARA as well as time-out features
and provides 1 C accuracy.
Table 4.
Address table
MSB
LSB
A2
A1
A0
Register table
Register
name
Pointer
value
R/W
POR
state
Description
Conf
01h
R/W
00h
Temp
00h
read
only
N/A
Tos
03h
R/W
5000h
Thyst
02h
R/W
4B00h
ID
05h
read
only
A1h
Reserved
04h
N/A
N/A
reserved
Reserved
06h
N/A
N/A
reserved
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NXP Semiconductors
At power-up, the pointer value is preset to logic 0 for register Temp; users can then read
the temperature without specifying the pointer byte.
Symbol
Access
Value
Description
0*
reserved
R/W
6 and 5
RATEVAL[1:0]
R/W
4 and 3
OS_F_QUE[1:0]
OS_POL
10 conversion/s
01
0.125 conversion/s
10
1 conversion/s
11
30 conversion/s
R/W
queue value = 1
01
queue value = 2
10
queue value = 4
11
queue value = 6
R/W
OS_COMP_INT
OS polarity selection
0*
OS active LOW
OS active HIGH
R/W
SHUTDOWN
R/W
OS comparator
OS interrupt
operation mode
0*
normal
shutdown
Temp register
MSByte
7
LSByte
5
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
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When reading register Temp, all 16 bits of the two data bytes (MSByte and LSByte) must
be collected and then the twos complement data value according to the desired resolution
must be selected for the temperature calculation. Table 8 shows the example for 11-bit
twos complement data value, Table 9 shows the example for 13-bit twos complement
data value.
Table 8.
MSByte
LSByte
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Table 9.
MSByte
7
LSByte
5
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
When converting into the temperature the proper resolution must be used as listed in
Table 10 using either one of these two formulae:
1. If the Temp data MSB = 0, then: Temp (C) = +(Temp data) value resolution
2. If the Temp data MSB = 1, then: Temp (C) = (twos complement Temp data) value
resolution
Table 10.
Data resolution
Value resolution
8 bit
1.0 C
9 bit
0.5 C
10 bit
0.25 C
11 bit
0.125 C
12 bit
0.0625 C
13 bit
0.03125 C
Table 11 shows some examples of the results for the 11-bit calculations.
Table 11.
11-bit binary
(twos complement)
Hexadecimal value
Decimal value
3F8
1016
+127.000 C
3F7
1015
+126.875 C
3F1
1009
+126.125 C
3E8
1000
+125.000 C
0C8
200
+25.000 C
001
+0.125 C
000
0.000 C
7FF
0.125 C
738
200
25.000 C
649
439
54.875 C
648
440
55.000 C
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Value
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NXP Semiconductors
Obviously, for 9-bit Temp data application in replacing the industry standard LM75, just
use only 9 MSB bits of the two bytes and disregard 7 LSB of the LSByte. The 9-bit Temp
data with 0.5 C resolution of the SE95 is defined exactly in the same way as for the
standard LM75 and it is here similar to the Tos and Thyst registers.
Tos register
MSByte
LSByte
D8
D7
D6
D5
D4
D3
D2
D1
D0
Table 13.
Thyst register
MSByte
LSByte
D8
D7
D6
D5
D4
D3
D2
D1
D0
When a set-point register is read, all 16 bits are provided to the bus and must be collected
by the controller to complete the bus operation. However, only the 9 most significant bits
should be used and the 7 LSB of the LSByte are equal to zero and should be ignored.
Table 14 shows examples of the limit data and value.
Table 14.
11-bit binary
(twos complement)
Hexadecimal value
Decimal value
Value
0 1111 1010
0FA
250
125.0 C
0 0011 0010
032
50
25.0 C
0 0000 0001
001
0.5 C
0 0000 0000
000
0.0 C
1 1111 1111
1FF
0.5 C
1 1100 1110
1CE
50
25.0 C
1 1001 0010
192
110
55.0 C
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NXP Semiconductors
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SCL
SDA
A2 A1 A0 W
device address
START
pointer byte
write
device
acknowledge
device
acknowledge
Fig 5.
D4 D3 D2 D1 D0 A
device
acknowledge
STOP
001aad624
9
(next)
SCL
SDA
A2
A1
A0 W
device address
RS (next)
pointer byte
START
device
acknowledge
1
A2
A1
RE-START
device
acknowledge
write
A0 R
SCL (cont.)
SDA (cont.)
D7 D6 D5 D4 D3 D2 D1 D0 NA
device address
master not
acknowledged
read
device
acknowledge
Fig 6.
001aad625
A2
A1
A0 R
SCL
SDA
device address
START
D7 D6 D5 D4 D3 D2 D1 D0 NA
data byte from device
read
device
acknowledge
Fig 7.
master not
acknowledged
STOP
001aad626
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NXP Semiconductors
SCL
(next)
SDA
A2
A1
A0
device address
device
acknowledge
3
(next)
device
acknowledge
write
P0
pointer byte
START
P1
SCL (cont.)
SDA (cont.)
D7 D6 D5 D4 D3 D2 D1 D0 A
D7 D6 D5 D4 D3 D2 D1 D0
ms byte data
ls byte data
STOP
device
acknowledge
device
acknowledge
Fig 8.
001aad627
SCL
SDA
(next)
S
A2 A1 A0 W A
device address
START
P1 P0 A RS (next)
pointer byte
device
acknowledge
5 6 7 8
A2 A1 A0 R
RE-START
device
acknowledge
write
SCL (cont)
SDA (cont)
D7 D6 D5 D4 D3 D2 D1 D0 A4 D7 D6 D5 D4 D3 D2 D1 D0 NA
device address
device
acknowledge
Fig 9.
master
acknowledge
read
STOP
master not
acknowledged
001aad628
Read Temp, Tos or Thyst register including pointer byte (2-byte data)
A2 A1 A0 R
SCL
SDA
device address
START
D7 D6 D5 D4 D3 D2 D1 D0 A4 D7 D6 D5 D4 D3 D2 D1 D0 NA
ms byte from device
read
device
acknowledge
master
acknowledge
STOP
001aad629
Fig 10. Read Temp, Tos or Thyst register with preset pointer (2-byte data)
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NXP Semiconductors
9. Limiting values
Table 15. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
VCC
Conditions
Min
Max
Unit
supply voltage
0.3
+6.0
VI(SCL)
0.3
+6.0
VI(SDA)
0.3
+6.0
VI(A0)
3.0
VCC + 0.3
VI(A1)
3.0
VCC + 0.3
VI(A2)
3.0
VCC + 0.3
II(PIN)
5.0
+5.0
mA
IO(OS)
10.0
mA
VO(OS)
0.3
+6.0
VESD
electrostatic discharge
voltage
1000
machine model
150
Tstg
storage temperature
65
+150
Tj
junction temperature
150
Symbol
Parameter
Min
Typ
Max
Unit
VCC
supply voltage
Conditions
2.8
5.5
Tamb
ambient temperature
55
+125
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NXP Semiconductors
temperature accuracy
Min
Typ[1]
Max
Unit
Tamb = 25 C to +100 C
1.0
+1.0
Tamb = 55 C to +125 C
2.0
+2.0
Tamb = 25 C to +100 C
+2
Tamb = 55 C to +125 C
Conditions
[2]
[2]
+3
Tres
temperature resolution
0.125
tconv(T)
normal mode
33
ms
150
supply current
ICC
normal mode:
I2C-bus
inactive
normal mode:
I2C-bus
active
shutdown mode
HIGH-level input voltage
VIH
VIL
VI(hys)
IIH
1.0
mA
7.5
digital pins
[3]
0.7VCC
VCC + 0.3
digital pins
[3]
0.3
+0.3VCC
300
mV
pins A2 to A0
300
mV
[3]
1.0
+1.0
[3]
1.0
+1.0
IIL
VOL
0.4
IOL = 4 mA
0.8
ILO
10
VPOR
1.0
2.5
OSQ
OS fault queue
programmable
Tos
overtemperature shutdown
threshold
default value
80
fsam
sampling rate
programmable
0.125
10
30
sample/s
Thyst
hysteresis temperature
default value
75
Ci
input capacitance
digital pins
20
pF
[1]
[2]
[3]
[4]
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[4]
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NXP Semiconductors
Conditions
Min
Typ
Max
Unit
see Figure 11
2.5
t(SCL)H
0.6
t(SCL)L
1.3
tHD;STA
100
ns
tSU;DAT
100
ns
tHD;DAT
ns
tSU;STO
100
ns
tf
fall time
250
ns
[1]
SDA
tLOW
tf
tSU;DAT
tf
tHD;STA
SCL
tHD;STA
tHD;DAT
tHIGH
sr
tSU;STO
s
001aad616
Fig 11.
Timing diagram
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NXP Semiconductors
25
ICC(SD)
(A)
20
001aad617
001aad618
300
VCC = 5.5 V
ICC
(A)
VCC = 5.5 V
3.9 V
3.3 V
2.8 V
200
15
3.9 V
10
3.3 V
2.8 V
100
0
50
25
25
50
75
300
30 conversions/s
ICC
(A)
200
0
50
100
125
T (C)
10 conversions/s
25
25
50
75
100
125
T (C)
0.25
VOL(SDA)
(V)
VCC = 2.8 V
0.20
3.3 V
3.9 V
5.5 V
0.15
1 conversions/s
0.125 conversions/s
0.10
100
0.05
0
50
25
25
50
75
25
tconv(T)
(ms)
20
0
50
100
125
T (C)
Fig 15.
25
VOL(OS)
(V)
20
15
10
10
25
25
50
75
100
125
T (C)
25
50
75
100
125
T (C)
001aad622
VCC = 2.8 V
3.3 V
3.9 V
5.5 V
0
50
25
25
50
75
100
125
T (C)
SE95_7
15
0
50
25
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power supply
300
power supply
10 k
10 F
VCC
SCL
I2C-bus
SDA
SE95
OS
A2
A1
GND
A0
detector or
interrupt line
digital logic
or tie to
VCC or GND
002aae891
Fig 18.
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NXP Semiconductors
SOT96-1
A
X
c
y
HE
v M A
Z
5
Q
A2
(A 3)
A1
pin 1 index
Lp
1
4
e
detail X
w M
bp
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
D (1)
E (2)
HE
Lp
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
inches
0.069
0.010 0.057
0.004 0.049
0.01
0.019 0.0100
0.014 0.0075
0.20
0.19
0.16
0.15
0.05
0.01
0.01
0.004
0.028
0.012
0.244
0.039 0.028
0.041
0.228
0.016 0.024
8o
o
0
Notes
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT96-1
076E03
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
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NXP Semiconductors
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm
SOT505-1
c
y
HE
v M A
A2
pin 1 index
(A3)
A1
Lp
L
4
detail X
e
w M
bp
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
D(1)
E(2)
HE
Lp
Z(1)
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.45
0.25
0.28
0.15
3.1
2.9
3.1
2.9
0.65
5.1
4.7
0.94
0.7
0.4
0.1
0.1
0.1
0.70
0.35
6
0
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-04-09
03-02-18
SOT505-1
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Through-hole components
Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
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Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 21) than a SnPb process, thus
reducing the process window
Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 19 and 20
Table 19.
350
< 2.5
235
220
2.5
220
220
Table 20.
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
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temperature
peak
temperature
time
001aac844
17. Abbreviations
Table 21.
Abbreviations
Acronym
Description
ADC
Analog-to-Digital Converter
ESD
ElectroStatic Discharge
HBM
I2C-bus
I/O
Input/Output
LSB
LSByte
MM
Machine Model
MSB
MSByte
OTP
One-Time Programmable
POR
Power-On Reset
SMBus
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Revision history
Document ID
Release date
Change notice
Supersedes
SE95_7
20090902
SE95_6
Modifications:
Figure 1 Block diagram of SE95: changed from AVD CONTOL to ADC CONTROL
Section 14 Application information:
Added first paragraph
Figure 18 Typical application circuit modified
SE95_6
20090604
SE95_5
SE95_5
20071213
SE95_4
SE95_4
20070212
SE95_3
SE95_3
(9397 750 14388)
20051212
SE95_2
SE95_2
(9397 750 14163)
20041005
Objective specification
SE95_1
SE95_1
(9397 750 10265)
20031003
Objective specification
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NXP Semiconductors
Product status[3]
Definition
Development
This document contains data from the objective specification for product development.
Qualification
Production
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
19.2 Definitions
Draft The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
19.3 Disclaimers
General Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I2C-bus logo is a trademark of NXP B.V.
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21. Contents
1
2
3
4
5
6
6.1
6.2
7
7.1
7.2
7.3
7.4
7.5
7.6
8
8.1
8.2
8.3
8.4
8.5
8.6
8.7
9
10
11
12
13
14
15
16
16.1
16.2
16.3
16.4
17
18
19
19.1
19.2
19.3
19.4
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
General operation . . . . . . . . . . . . . . . . . . . . . . . 4
OS output and polarity . . . . . . . . . . . . . . . . . . . 6
OS comparator and interrupt modes . . . . . . . . 6
OS fault queue . . . . . . . . . . . . . . . . . . . . . . . . . 6
Shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . 7
Power-up default and power-on reset . . . . . . . . 7
I2C-bus serial interface . . . . . . . . . . . . . . . . . . . 7
Slave address . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Register list . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Register pointer . . . . . . . . . . . . . . . . . . . . . . . . 8
Configuration register . . . . . . . . . . . . . . . . . . . . 9
Temperature register. . . . . . . . . . . . . . . . . . . . . 9
Overtemperature shutdown threshold
and hysteresis registers . . . . . . . . . . . . . . . . . 11
Protocols for writing and reading
the registers . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 15
Recommended operating conditions. . . . . . . 15
Static characteristics. . . . . . . . . . . . . . . . . . . . 16
Dynamic characteristics . . . . . . . . . . . . . . . . . 17
Performance curves . . . . . . . . . . . . . . . . . . . . 18
Application information. . . . . . . . . . . . . . . . . . 19
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 20
Soldering of SMD packages . . . . . . . . . . . . . . 22
Introduction to soldering . . . . . . . . . . . . . . . . . 22
Wave and reflow soldering . . . . . . . . . . . . . . . 22
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 22
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 23
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 25
Legal information. . . . . . . . . . . . . . . . . . . . . . . 26
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 26
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
20
21
Contact information . . . . . . . . . . . . . . . . . . . . 26
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section Legal information.