DAC8234 DAC8234

Power-Down
Control Logic
CS
SCLK
SDI
SDO
IOVDD
RST
UNI/BIP-A
UNI/BIP-B
LDAC
GPIO-0
GPIO-1
AIN
DAC8234
Reference Buffer A
VMON
R -0 FB1
R -0 FB2
V -0 OUT
SGND-0
14-Bit DAC
SPI
Shift
Register
Input
Control
Logic
Control
Logic
DGND DVDD
DAC Register 0
Zero Register 0
Gain Register 0
AGND AVDD AVSS REF-A REFGND-A
Analog
Monitor
Reference Buffer B
REF-B REFGND-B
R -1 FB1
R -1 FB2
V -1 OUT
SGND-1
14-Bit DAC DAC Register 1
Zero Register 1
Gain Register 1
R -2 FB1
R -2 FB2
V -2 OUT
SGND-2
14-Bit DAC DAC Register 2
Zero Register 2
Gain Register 2
R -3 FB1
R -3 FB2
V -3 OUT
SGND-3
14-Bit DAC DAC Register 3
Zero Register 3
Gain Register 3
Command Register

R
FB1
R
FB2
C
o
n
t
r
o
l

L
o
g
i
c
Analog Monitor
To DAC-0,
DAC-1
To DAC-2, DAC-3
AIN
DAC8234
R -1
FB1
R -1
FB2
V -1
OUT
SGND-1
V
MON
R -0
FB1
R -0
FB2
V -0
OUT
SGND-0
GPIO-1
GPIO-0
REF-B
Reference
Buffer B
Reference
Buffer A
DAC-0
Latch-0
Power-On/
Power-Down
Control
(Same Function Blocks for All Channels)
REFGND-B
REF-A REFGND-A
LDAC
LDAC
Power-On/
Power-Down Control
UNI/BIP-B
UNI/BIP-A
RST
S
P
I

S
h
i
f
t

R
e
g
i
s
t
e
r
SDO
SDI
SCLK
CS
IOV
DD
DGND AGND DV
DD
AV
DD
AV
SS
AIN
R -0
FB1
R -1
FB1
R -2
FB1
R -3
FB1
M
u
x
Command
Register
Input Data
Register 0
User Calibration:
Zero Register 0
Gain Register 0
Internal Trimming
Zero, Gain, INL
DAC-1
R -2
FB1
R -2
FB2
V -2
OUT
SGND-2
DAC-2
R -3
FB1
R -3
FB2
V -3
OUT
SGND-3
DAC-3

CS
SCLK
SDI
SDO
LDAC
RST
GPIO-0
GPIO-1
UNI/BIP-A
DGND
AV
DD
V
MON
AV
SS
REFGND-B
REF-B
REF-A
REFGND-A
AV
SS
AGND
AV
DD
1
2
3
4
5
6
7
8
9
10
30
29
28
27
26
25
24
23
22
21
DAC8234
U
N
I
/
B
I
P
-
B
A
I
N
V
-
2
O
U
T
R
-
2
F
B
2
R
-
2
F
B
1
S
G
N
D
-
2
S
G
N
D
-
3
R
-
3
F
B
1
R
-
3
F
B
2
V
-
3
O
U
T
4
0
3
9
3
8
3
7
3
6
3
5
3
4
3
3
3
2
3
1
I
O
V
D
D
D
V
D
D
V
-
0
O
U
T
R
-
0
F
B
2
R
-
0
F
B
1
S
G
N
D
-
0
S
G
N
D
-
1
R
-
1
F
B
1
R
-
1
F
B
2
V
-
1
O
U
T
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
N
C
V
-
1
O
U
T
R
-
1
F
B
2
R
-
1
F
B
1
S
G
N
D
-
1
N
C
S
G
N
D
-
0
R
-
0
F
B
1
R
-
0
F
B
2
V
-
0
O
U
T
D
V
D
D
I
O
V
D
D
NC
AV
DD
V
MON
AV
SS
REFGND-B
REF-B
REF-A
REFGND-A
AV
SS
AGND
AV
DD
NC
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
NC
CS
SCLK
SDI
SDO
LDAC
RST
GPIO-0
GPIO-1
UNI/BIP-A
DGND
NC
3
7
3
8
3
9
4
0
4
1
4
2
4
3
4
4
4
5
4
6
4
7
4
8
N
C
V
-
3
O
U
T
R
-
3
F
B
2
R
-
3
F
B
1
S
G
N
D
-
3
N
C
S
G
N
D
-
2
R
-
2
F
B
1
R
-
2
F
B
2
V
-
2
O
U
T
A
I
N
U
N
I
/
B
I
P
-
B
DAC8234

t
8
CS
SCLK
Input Data Register and
DAC Latch Updated
(1)
DAC Latch Updated
SDI
BIT 23 (MSB)
BIT 23 (MSB) BIT 22 BIT 1
Low
BIT 0
LDAC
t
4
t
1
t
2
t
3
t
F
t
R
t
5
t
6
t
7
Case 1: Stand-alone mode, tied low LDAC .
CS
SCLK
Input Data Register Updated
but DAC Latch is Not Updated
SDI BIT 22 BIT 1
High
BIT 0
LDAC
t
1
t
2
t
3
t
F
t
R
t
7
t
9
Case 2: Stand-alone mode, active high. LDAC
t
10
Input Word To Write the Data to the Selected DAC
= Dont Care
Bit 23 = MSB
Bit 0 = LSB
t
5
t
6
t
8
t
4

t
8
CS
SCLK
SDI
BIT 23 (N) BIT 22 (N) BIT 0 (N) BIT 23 (N+1)
BIT 23 (N) BIT 0 (N)
Low
BIT 0 (N+1)
SDO
LDAC
t
4
t
1
t
2
t
3
t
F
t
R
t
5
t
6
t
7
Case 3: Daisy-Chain mode, tied low LDAC .
High
LDAC
= Dont Care
Bit 23 = MSB
Bit 0 = LSB
t
11
t
12
CS
SCLK
SDI
BIT 23 (N) BIT 22 (N) BIT 0 (N) BIT 23 (N+1)
BIT 23 (N) BIT 0 (N)
BIT 0 (N+1)
SDO
t
1
t
2
t
3
t
F
t
R
t
7
Case 4: Daisy-Chain mode, active. LDAC
t
11
t
12
Input Data Register and
DAC Latch Updated
(1)
Input Data Register Updated
but DAC Latch is Not Updated
t
5
t
6
t
5
t
6
t
8
t
4
DAC Latch Updated
t
9
t
10

Case 5: Readback for Stand-alone mode.

t
8
t
4
t
1
t
2
t
7
t
3
t
6
t
5
BIT 23 BIT 22
Input Word Specifies Register to be Read Write NOP Command
Data from the Selected Register
BIT 0
BIT 23
BIT 23
BIT 22
BIT 22
BIT 1
BIT 1
BIT 0
BIT 0
Input Data Register Updated
CS
SCLK
SDI
SDO
LDAC
t
F
t
R
Low
= Dont Care
Bit 23 = MSB
Bit 0 = LSB
t
11
t
12
t
13

0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
I
N
L

E
r
r
o
r

(
L
S
B
)
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +15V
DD
A - V =
SS
15V
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
D
N
L

E
r
r
o
r

(
L
S
B
)
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +15V
DD
AV = -
SS
15V
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
I
N
L

E
r
r
o
r

(
L
S
B
)
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
T
A
= +105C
Gain = 4
V = 5V
REF
AV = +15V
DD
A - V =
SS
15V
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
D
N
L

E
r
r
o
r

(
L
S
B
)
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
T = +105 C
A
Gain = 4
V = 5V
REF
AV = +15V
DD
AV = -
SS
15V
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
I
N
L

E
r
r
o
r

(
L
S
B
)
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
T = -
A
40 C
Gain = 4
V = 5V
REF
AV = +15V
DD
AV = -
SS
15V
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
D
N
L

E
r
r
o
r

(
L
S
B
)
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
T = 40 -
A
C
Gain = 4
V = 5V
REF
AV = +15V
DD
AV = -
SS
15V

0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
I
N
L

E
r
r
o
r

(
L
S
B
)
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +15V
DD
A = - V 15V
SS
Channel 0
Channel 1
Channel 2
Channel 3
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
I
N
L

E
r
r
o
r

(
L
S
B
)
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +12V
DD
AV = -
SS
12V
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
D
N
L

E
r
r
o
r

(
L
S
B
)
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +12V
DD
AV = -
SS
12V
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
I
N
L

E
r
r
o
r

(
L
S
B
)
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
T = +25 C
A
Gain = 4
V = 5V
REF
AV = +24V
DD
A - V
SS
= 12V
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
D
N
L

E
r
r
o
r

(
L
S
B
)
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +24V
DD
AV = -12V
SS

-40 -25 -10 5 20 35 50 65 80 95 110 125

Temperature ( C)
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
I
N
L

E
r
r
o
r

(
L
S
B
)
Gain = 4
V = 5V
REF
AV = +15V
DD
AV = -
SS
15V
INL Max
INL Min
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature ( C)
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
D
N
L

E
r
r
o
r

(
)
L
S
B
Gain = 4
V = 5V
REF
AV = +15V
DD
AV = -
SS
15V
DNL Max
DNL Min
1 2 3 4 5 6 7 8
Reference Voltage (V)
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
I
N
L

E
r
r
o
r
(
L
S
B
)
T
A
= +25C
Gain = 4
AV = +18V
DD
AV = -
SS
18V
INL Max
INL Min
1 2 3 4 5 6 7 8
Reference Voltage (V)
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
D
N
L

E
r
r
o
r
(
L
S
B
)
T
A
= +25C
Gain = 4
AV = +18V
DD
AV = -
SS
18V
DNL Max
DNL Min
4.5 6.0 7.5 9.0 10.5 12.0 13.5 15.0 16.5 18.0
+A - V , A DD V (V) SS
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
I
N
L

E
r
r
o
r
(
L
S
B
)
T
A
= +25C
Gain = 4
V = 2V
REF
INL Max
INL Min
4.5 6.0 7.5 9.0 10.5 12.0 13.5 15.0 16.5 18.0
+AV , A -
DD SS
V (V)
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
D
N
L

E
r
r
o
r
(
L
S
B
)
T
A
= +25C
Gain = 4
V = 2V
REF
DNL Max
DNL Min

1 8 5 6 7 4 3 2
Reference Voltage (V)
2.0
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
B
i
p
o
l
a
r

G
a
i
n

E
r
r
o
r

(
m
V
)
T
A
= +25C
Gain = 4
AV = +18V
DD
AV = -
SS
18V
1 8 5 6 7 4 3 2
Reference Voltage (V)
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
B
i
p
o
l
a
r

Z
e
r
o

E
r
r
o
r

(
m
V
)
T = +25 C
A
Gain = 4
AV = +18V
DD
AV = -
SS
18V
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature ( C)
2.0
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
B
i
p
o
l
a
r

G
a
i
n

E
r
r
o
r

(
m
V
)
Gain = 4
V = 5V
REF
AV = +15V
DD
AV = -
SS
15V
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (C)
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
B
i
p
o
l
a
r

Z
e
r
o

E
r
r
o
r

(
m
V
)
Gain = 4
V = 5V
REF
AV = +15V
DD
AV = -
SS
15V
1.0 5.0 3.0 3.5 4.0 4.5 2.5 2.0 1.5
Reference Voltage (V)
0.10
0.05
0
-0.05
-0.10
-0.15
-0.20
U
n
i
p
o
l
a
r

Z
e
r
o

E
r
r
o
r

(
m
V
)
T
A
= +25C
Gain = 4
AV
DD
= +24V
AV = -
SS
12V
-40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature ( C)
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
U
n
i
p
o
l
a
r

Z
e
r
o

E
r
r
o
r

(
m
V
)
Gain = 4
V = 5V
REF
AV = +15V
DD
AV
SS
= -15V

14
13
12
11
10
9
8
A
I
D
D
S
S
,

A
I
(
m
A
)
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +15V
DD
A - V
SS
= 15V
Code Change for One Channel
All Other Channel Outputs = 0V
|AI |
SS
|AI |
DD
2048 0 16383 14336 12288 10240 8192 6144 4096
Digital Input Code
6
4
2
0
-2
-4
-6
D
V
(
m
V
)
O
U
T
-12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12
I (mA)
LOAD
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +12V
DD
AV = -
SS
12V
BTC 8000h
BTC
7FFCh
+1 LSB
-1 LSB
BTC C000h
BTC 4000h
Time (0.5 s/div) m
5V/div
2mV/div
T
A
REF
DD
DD
SS
= +25C
Gain = 4
V = 5V
DV = 5V
AV = +15V
AV = 15V -
V
OUT
LDAC
BTC Code Change: 0000h to FFFCh
Time (0.5 s/div) m
5V/div
2mV/div
LDAC
BTC Code Change: FFFCh to 0000h
V
OUT
T
A
REF
DD
DD
SS
= +25C
Gain = 4
V = 5V
DV = 5V
AV = +15V
AV = 15V -
Time (5 s/div) m
1.2mV/div
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +15V
DD
5V/div
5V/div
Small-Signal Error
LDAC
Large-Signal Output
AV = -
SS
15V
10k || 200pF W
Time (5 s/div) m
1.2mV/div
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +15V
DD
5V/div
5V/div
Small-Signal Error
LDAC
Large-Signal Output
AV = -
SS
15V
10k || 200pF W

Time (1s/div)
N
o
i
s
e

(
2
V
/
d
i
v
)
m
T = +25 C
Gain = 4
V = 0V
AV = +15V
AV = 15V
Midscale Code

-
A
REF
DD
SS
1.0 1.5 0.5 0 2.0 2.5 3.0 3.5 4.0 5.0 4.5
Logic Input Voltage (V)
1.2
1.0
0.8
0.6
0.4
0.2
0
I
O
V
S
u
p
p
l
y

C
u
r
r
e
n
t

(
m
A
)
D
D
T
A
= +25C
AV
DD
= +15V
AV = -
SS
15V
IOV = 5V
DD
IOV = 2.7V
DD
2
.
1
0
2
.
2
0
2
.
3
0
2
.
4
0
2
.
5
0
2
.
6
0
2
.
7
0
2
.
8
0
2
.
9
0
3
.
0
0
3
.
1
0
3
.
2
0
3
.
3
0
3
.
4
0
AI (mA/Channel)
DD
30
25
20
15
10
5
0
P
o
p
u
l
a
t
i
o
n

(
%
)
T
A
= +25C
Gain = 4
V = 5V
REF
A = +15V V
DD
AV = -
SS
15V
V = 0V
OUT
2
.
6
0
2
.
7
0
2
.
8
0
2
.
9
0
3
.
0
0
3
.
1
0
3
.
2
0
3
.
3
0
3
.
4
0
3
.
5
0
3
.
6
0
3
.
7
0
3
.
8
0
3
.
9
0
4
.
0
0
AI (mA/Channel)
SS
30
25
20
15
10
5
0
P
o
p
u
l
a
t
i
o
n

(
%
)
T
A
= +25C
Gain = 4
V = 5V
REF
AV
DD
= +15V
AV -
SS
= 15V
V = 0V
OUT
-
1
.
0
0
-
0
.
2
5
-
0
.
2
0
-
0
.
1
5
-
0
.
1
0
-
0
.
0
5 0
0
.
0
5
0
.
1
0
0
.
1
5
0
.
2
0
0
.
2
5
1
.
0
0
Bipolar Gain Error (LSB)
25
20
15
10
5
0
P
o
p
u
l
a
t
i
o
n

(
%
)
T = +25 C
A
Gain = 4
V = 5V
REF
AV
DD
= +15V
AV = -
SS
15V
Bipolar Zero Error (LSB)
70
60
50
40
30
20
10
0
P
o
p
u
l
a
t
i
o
n

(
%
)
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +15V
DD
AV = -
SS
15V
-
1
.
0
0
-
0
.
2
5
-
0
.
2
0
-
0
.
1
5
-
0
.
1
0
-
0
.
0
5 0
0
.
0
5
0
.
1
0
0
.
1
5
0
.
2
0
0
.
2
5
1
.
0
0

Unipolar Gain Error (LSB)

25
20
15
10
5
0
P
o
p
u
l
a
t
i
o
n

(
%
)
T
A
= +25C
Gain = 4
V = 5V
REF
AV
DD
= +24V
AV = -
SS
12V
-
1
.
0
0
-
0
.
2
5
-
0
.
2
0
-
0
.
1
5
-
0
.
1
0
-
0
.
0
5 0
0
.
0
5
0
.
1
0
0
.
1
5
0
.
2
0
0
.
2
5
1
.
0
0
Unipolar Zero Error (LSB)
90
80
70
60
50
40
30
20
10
0
P
o
p
u
l
a
t
i
o
n

(
%
)
T
A
= +25C
Gain = 4
V = 5V
REF
AV = +24V
DD
AV = -
SS
12V
-
1
.
0
0
-
0
.
2
5
-
0
.
2
0
-
0
.
1
5
-
0
.
1
0
-
0
.
0
5 0
0
.
0
5
0
.
1
0
0
.
1
5
0
.
2
0
0
.
2
5
1
.
0
0

V
OUT
SGND
2R 2R
S17 S16 S12
2R 2R
S11
Three MSBs Decoded Into
Seven Equal Segments
2R
S10 S9
2R
R R R R
S8
2R
S0
2R 2R
R
FB
11-Bit R-2R Ladder
From Reference
Buffer Output

V =
OUT
Gain V
REF
INPUT_CODE
16384
+
ZERO_CODE
32 16384
1 +
GAIN_CODE
8 16384

V =
OUT
Gain V
REF
INPUT_CODE
16384
+
ZERO_CODE
32 16384
1 +
GAIN_CODE
4 16384

Bit GPIO-x (when writing)

Bit GPIO-x (when reading)
Enable
GPIO-x
+V

DB23 DB0
= Dont Care
DB23 = MSB
DB0 = LSB
Multiple Readings
CS
SCLK
SDI
Command to Read
Register A
Command to Read
Register B
DB23 DB0 DB23 DB0 DB23 DB0
Command to Read
Register C
NOP Command
or Write Command
DB23 DB0
SDO
Undefined Data from
Register A
DB23 DB0 DB23 DB0 DB23 DB0
Data from
Register B
Data from
Register C
DB23 DB0
Single Reading
CS
SCLK
SDI
READ Command Specifies
Register to be Read
DB23 DB0
DB23 DB0
SDO
Undefined
DB23 DB0
NOP Command
or Write Command
Data from
Selected Register

1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
2
2
2
3
2
4
I
O
V
D
D
D
V
D
D
V
-
0
O
U
T
R
-
0
F
B
2
R
-
0
F
B
1
S
G
N
D
-
0
N
C
S
G
N
D
-
1
R
-
1
F
B
1
R
-
1
F
B
2
V
-
1
O
U
T
N
C
NC
AV
DD
V
MON
AV
SS
REFGND-B
REF-B
REF-A
REFGND-A
AV
SS
AGND
AV
DD
NC
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
NC
CS
SCLK
SDI
SDO
LDAC
RST
GPIO-0
GPIO-1
UNI/BIP-A
DGND
NC
CS
SCLK
SDI
SDO
LDAC
RST
I
O
V
D
D
D
V
D
D
V
-
0
O
U
T
V
-
2
O
U
T
A
I
N
10kW
10kW
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
U
N
I
/
B
I
P
-
B
A
I
N
V
-
2
O
U
T
R
-
2
F
B
2
R
-
2
F
B
1
S
G
N
D
-
2
N
C
S
G
N
D
-
3
R
-
3
F
B
1
R
-
3
F
B
2
V
-
3
O
U
T N
C
DAC8234
+
+
0.1 F m
10 F m
+
0.1 F m
10 F m
V
-
3
O
U
T
V
MON
REF-B
REF-A
AV
SS
AV
DD
+
0.1 F m 10 F m
0.1 F m 10 F m
0.1 F m 10 F m
0.1 F m 10 F m
+
+
V
-
1
O
U
T
AV = +15V, AV = 15V, DV = +5V, IOV = +1.8 to +5V, REF-A = +5V, and REF-B = +2.5V.
The gain bits in the Command Register are: GAIN-0 = 0, GAIN-1 = 1, GAIN-2 = 0, and GAIN-3 = 1.
The DACs are set to the following gains: DAC-0 = x2, DAC-1 = x4, DAC-2 = x2, and DAC-3 = x4.
The output ranges are: V -0 = 5V to +5V
-
-
DD SS DD DD
OUT
NOTES:
V -1 = 10V to +10V,
V -2 = 0V to +5V,
V -3 = 0V to +10V.
-
OUT
OUT
OUT

Digital Input
Input =
FFFCh
Input =
0000h
Gain Adjust
Rotates the
Transfer
Function
1LSB
+ Full Scale
F
u
l
l
-
S
c
a
l
e

R
a
n
g
e
A
n
a
l
o
g

O
u
t
p
u
t
Gain V
REF
Zero Scale
Zero Adjust Translates the Transfer Function
Digital Input
Input = 8000h
1LSB
F
u
l
l
-
S
c
a
l
e
R
a
n
g
e
+ Full-
Scale
- Full-Scale
-0.5 Gain V
REF
Zero Adjust
Translates the
Transfer Function
Input = 7FFCh
Input = 0000h
A
n
a
l
o
g

O
u
t
p
u
t
0.5 Gain V
REF
Gain Adjust
Rotates the
Transfer
Function

- 1 Offset_Error
Step Size
Number of Steps of Zero Calibration =

- 1 Gain_Error
Step Size
Number of Steps of Gain Calibration =

PACKAGE OPTION ADDENDUM

www.ti.com 11-Apr-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (C) Top-Side Markings
(4)
Samples
DAC8234SPFB ACTIVE TQFP PFB 48 250 Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 105 DAC8234
DAC8234SPFBR ACTIVE TQFP PFB 48 1000 Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 105 DAC8234
DAC8234SRHAR ACTIVE VQFN RHA 40 2500 Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 105 DAC8234
DAC8234SRHAT ACTIVE VQFN RHA 40 250 Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR -40 to 105 DAC8234

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 11-Apr-2013
Addendum-Page 2

TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type
Package
Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
(mm)
Pin1
Quadrant
DAC8234SPFBR TQFP PFB 48 1000 330.0 16.4 9.6 9.6 1.5 12.0 16.0 Q2
DAC8234SRHAR VQFN RHA 40 2500 330.0 16.4 6.3 6.3 1.5 12.0 16.0 Q2
DAC8234SRHAT VQFN RHA 40 250 180.0 16.4 6.3 6.3 1.5 12.0 16.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Mar-2014
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
DAC8234SPFBR TQFP PFB 48 1000 367.0 367.0 38.0
DAC8234SRHAR VQFN RHA 40 2500 336.6 336.6 28.6
DAC8234SRHAT VQFN RHA 40 250 213.0 191.0 55.0
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Mar-2014
Pack Materials-Page 2
MECHANICAL DATA


MTQF019A JANUARY 1995 REVISED JANUARY 1998
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PFB (S-PQFP-G48) PLASTIC QUAD FLATPACK
4073176/ B 10/96
Gage Plane
0,13 NOM
0,25
0,45
0,75
Seating Plane
0,05 MIN
0,17
0,27
24
25
13
12
SQ
36
37
7,20
6,80
48
1
5,50 TYP
SQ
8,80
9,20
1,05
0,95
1,20 MAX
0,08
0,50 M 0,08
07
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-026
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