896

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 37, NO. 3, MAY/JUNE 2001

A New Current-Source Converter Using a Symmetric

Gate-Commutated Thyristor (SGCT)
Navid R. Zargari, Member, IEEE, Steven C. Rizzo, Member, IEEE, Yuan Xiao, Associate Member, IEEE,
Hideo Iwamoto, Katsumi Satoh, and John F. Donlon, Senior Member, IEEE

AbstractIn recent years, extensive semiconductor development has gone into both bipolar and MOS structures for
medium-voltage (MV) applications. However, the progression of
MOS structures in MV applications has been difficult and the isand motor/bearing
sues of module isolation, reliability, and
life continue to limit its acceptance in these applications. A
more suitable device structure and the natural choice for MV
applications is the bipolar thyristor structure. The device that
has been in use for many years, the gate-turn-off thyristor, is
being replaced by the gate-commutated thyristor (GCT). So far,
the GCT has been only thought of as fulfilling the needs for the
voltage-source topology. However, the symmetric GCT (SGCT)
is viable and has significant advantages when implemented in a
pulsewidth-modulated current-source inverter (PWM-CSI). This
paper will describe the design and characteristics of an 800-A
6.5-kV SGCT and the effect of its implementation in a PWM-CSI.
These effects include operation at a higher switching frequency,
elimination/reduction and modification of the snubber circuitry,
reduction in size of the passive components, and a major impact
on the cost of the converter. The paper includes experimental
results on a 4160-V 1250-hp PWM-CSI ac drive.
Index
TermsCurrent-source
converter,
hard-driven
gate-turn-off thyristor, medium-voltage applications, power
semiconductor devices, symmetric gate-commuted thyristor,
variable-speed drives.

I. INTRODUCTION

HE semiconductor switch that has been dominant for

medium-voltage (MV) applications, the gate-turn-off
thyristor (GTO), is being replaced by other alternatives [1], [2].
Extensive research has resulted in a push for high-voltage MOS
structure devices, mainly high-voltage insulated gate bipolar
transistors (HV-IGBTs). However, the module isolation issue
still limits the voltage of these structures. Also, there are design
(resulting in motor insulation and bearing
issues such as
problems) and reliability concerns associated with the IGBT
that have raised concerns when used in lowvoltage and MV
applications [3][5]. Over the past few years, a new device has
emerged, the gate-commutated thyristor (GCT). A GCT is a
Paper IPCSD 01002, presented at the 2000 Industry Applications Society
Annual Meeting, Rome, Italy, October 812, and approved for publication in
the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS by the Industrial Power
Converter Committee of the IEEE Industry Applications Society. Manuscript
submitted for review April 1, 2000 and released for publication March 14, 2001.
N. Zargari, S. Rizzo, and Y. Xiao are with Rockwell Automation Canada,
Inc., Cambridge, ON N1R 5X1 Canada (e-mail: [email protected];
[email protected]; [email protected]).
H. Iwamoto and K. Satoh are with Mitsubishi Electric Corporation, Fukuoka 819-01, Japan (e-mail: [email protected];
[email protected]).
J. Donlon is with Powerex, Inc., Youngwood, PA 15697-1800 USA (e-mail:
[email protected]).
Publisher Item Identifier S 0093-9994(01)04367-5.

Fig. 1. A PWM-CSI-based ac drive.

GTO integrated with its gate driver through a low-inductance

path. This arrangement results in an improvement of the
, and turn-off capability over the conventional
GTO. The nonuniformity of the current redistribution during
turn-off that has been the major disadvantage of the GTO
has been resolved by ensuring a uniform turn-off process and
uniform storage time. The GCT can also operate at a higher
switching frequency with no or minimum snubber capacitance.
The GCT that has been in use so far, however, is an asymmetric
type GCT that fulfills the requirements for a voltage-source
converter, i.e., one that does not block reverse voltage.
This paper presents a symmetric GCT (SGCT) that can
block the voltage both in forward and reverse directions up to
6500 V. This device is most useful in current-source converters
where the current is unidirectional but the voltage can assume
both polarities. The proposed SGCT includes all the features of
GCTs plus a new ring gate arrangement that further enhances
the uniformity of the storage time and increases the current
turn-off capability. Implementing the proposed 6.5-kV SGCT
in an MV current-source-inverter (CSI)-based ac drive results
in significant advantages over conventional pulsewidth modulation (PWM) CSI drives [6]. These advantages include the
following:
1) simplification of the snubber design and a reduction in the
size of the snubber capacitor by a factor of 20;
2) operation at a higher switching frequency, hence reducing
the size of passive components (by 50%) and improving
performance of the drive;
3) reduction of component count, hence improving reliability, cost, and size of the drive.
This paper includes the design criteria and characteristics of
a 6.5-kV 800-A SGCT and design principles and experimental
results on a 4160-V 1250-hp PWM-CSI ac drive.
II. BRIEF REVIEW OF PWM-CSI AC DRIVE
A CSI-based ac drive is shown in Fig. 1. The inverter has current-source characteristics at the dc terminal (dc-side reactor)

00939994/01$10.00 2001 IEEE

ZARGARI et al.: A NEW CURRENT-SOURCE CONVERTER USING SGCT

Fig. 2.

897

Typical waveforms for a CSI. (a) Device current. (b) Device voltage. (c) Inverter output current. (d) Motor current and voltage.

and voltage-source characteristics at the ac terminal (ac-side

capacitor). Operating the six switches interfaces the ac and dc
sides. These switches must be operated so as to avoid an open
circuit on the dc link or a short circuit on the ac side. This means
that at any given time there are only two switches conducting,
one in the top half of the bridge and one in the bottom half.
Fig. 2(a) depicts the current waveform for the semiconductor
switch for a typical seven-pulse switching pattern. The switch
voltage waveform is shown in Fig. 2(b). From these figures, one
can see that the switches must carry unidirectional current while
blocking bidirectional voltage. The inverter output current and
the line-to-line motor voltage/current are also shown in Fig. 2(c)
and (d), respectively.

Fig. 3. The 6.5-kV/800-A SGCT and its wafer.

III. SGCT DESIGN AND CHARACTERISTICS

A. SGCT and Gate Drive Circuit
The new 6.5-kV/800-A SGCT and its silicon element are
shown in Fig. 3. Its package is 26 mm in thickness with 47-mmdiameter pole electrodes. Fig. 4 shows the cross-sectional structure of the SGCT. There is a ring gate terminal on the inner side
of the SGCT and the whole peripheral gate electrode area on
the chip is connected to this terminal inside the package. Contact between the terminal and the electrode via a gate ring is
secured by pressure from a scroll spring inside the package.
In order to establish the desired commutation operation (unity
turn-off gain), low inductance and low resistance are required
for the SGCTs package and its gate drive circuit. There are six
gate terminals on the side of the SGCT that are connected to the
cathode cap through six terminals and to the gate drive circuit by
a multiple laminated substrate. The gate drive circuit consists of
the substrate, MOSFETs in parallel, and capacitors in parallel.
These parts are connected in series to form the gate driver circuit. The arrangement, as shown in Fig. 5, results in a total inductance (Lin) of the gate drive circuit including the SGCT that

Fig. 4.

Cross-sectional structure of SGCT.

is about 7 nH (one-hundredth of that of a conventional GTO).

The rate of rise of the gate current is calculated as

Lin

V
nH

A/ s

is the gate voltage. This high

gives supewhere
rior turn-off capability without requiring a snubber, as with a
conventional GTO.

898

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 37, NO. 3, MAY/JUNE 2001

lifetime near
is reduced,
becomes smaller. It is mainly
and with little influence from
influenced by the turn-off
. Fig. 7(b) shows the dependence of recovery characteristics
, maximum recovery
such as maximum recovery current
, recovery tail current
, and
on that
voltage
is reduced,
becomes
position. When the lifetime near
with little influence from
smaller. It is mainly influenced by
. It is seen by Fig. 7(b) that decreasing
is effective for
.
decreasing
Using these features as a basis, the MEPLT process is optimized for the 6.5-kV/800-A SGCT chip and results in dra, and
as compared with
matic improvement in
the conventional symmetrical GTO. The MEPLT technique is
quite suitable to the production of SGCTs with high turn-off
than can be achieved by
capability over a wider range of
conventional NPT structure and GCT technology.
Fig. 5.

The 800-A 6500-V SGCT with the integrated gate drive.

C. Edge Termination

Fig. 6. (a) Unit cell structure. (b) Lifetime distribution by MEPLT.

B. Wafer Design
The SGCT achieves voltage-blocking capability in both forward and reverse directions by nonpunchthrough (NPT) structure and nearly symmetrical p-n-p ( - - ) transistor in the
wafer (no anode shorts). Fig. 6 shows a unit cell structure in
the SGCT wafer. The NPT structure provides high turn-off and
capability, but its thick n base layer
increases
high
, the turn-off energy
, and the
the on-state voltage
. Increasing these values has a major inrecovery energy
fluence on system losses. In order to improve these parameters, multi energy proton lifetime control technology (MEPLT)
is adopted and the lifetime-controlling condition is optimized.
Using MEPLT, the chip is irradiated several times by various
accelerating energies. Proton irradiation makes it possible to locally reduce the life time at a fixed depth from the chip surface.
The depth of the reduced lifetime region is fixed by the accelerating energy value as shown in Fig. 6(b). That depth influences
both turn-off and recovery characteristics. Fig. 7(a) shows the
,
dependence of turn-off characteristics such as turn-off
, and
on that position. When the
turn-off tail current

The symmetrical device with high-voltage-blocking capabilities has a p-n-p transistor and double-positive bevel structure
at the edge termination. The double-positive bevel structure results in a higher local electric field at a given blocking voltage
than other edge termination structures such as positive bevel
structure. The p-n-p transistor structure has an amplification
function that makes the symmetrical device sensitive to edge
contamination. Therefore, it is important to reduce the electric
field at the edge termination in order to get high blocking stability. The surface electric field of the new double-positive bevel
structure is about 80% of that of the conventional double-positive bevel structure and is similar to that of the single-positive bevel structure adopted in high-voltage diodes. By this,
the new bevel structure achieves high-voltage-blocking stability.
The surface electric fields at 4800 V for this SGCT with the
new double-positive bevel structure, for this SGCT with the conventional double-positive bevel structure and for a conventional
diode with single-positive bevel structure are shown in Fig. 8.
The new double-positive bevel structure results in lower electric
field and nearly equal forward and reverse blocking capability.
Fig. 9 shows the actual symmetric blocking voltage characteristics of the new SGCT.
D. Device Characteristics
Fig. 10 shows the typical turn-off waveform at
kA on a 3000-V bus at
C. Storage time (defined
as from the input of the gate signal to the start of the fall of
the anode current) is about 2 s. It should be noted that the
turn-off current is well above the 800-A rating of the device.
Fig. 11 shows the typical reverse-recovery waveform at
(on-state current)
A,
kA/ s.
V and
C. Fig. 11 compares the reverse-recovery
waveforms of the new SGCT (with lifetime optimized by
MEPLT) to the conventional SGCT (without lifetime opti(on-state current)
A,
mization) at
kA/ s.
V and
C. It is seen that
the MELPT process reduces the peak recovery current
by about 33%. Moreover, the peak recovery voltage
is
is reduced along
decreased by about 1000 V as the
. By optimizing lifetime distribution using MEPLT,
with

ZARGARI et al.: A NEW CURRENT-SOURCE CONVERTER USING SGCT

Fig. 7. (a) Dependence of turn-off dv=dt, turn-off tail current (I

), maximum recovery voltage (V
), recovery tail current (I
(I

Fig. 8.
V).

899

), and E
), and E

on lifetime reduced position. (b) Dependence of maximum recovery current

on lifetime reduced position.

Surface electric field simulation for various bevel structures (at 4800
Fig. 10.

Typical turn-off waveform.

IV. IMPLEMENTATION OF SGCT IN A PWM-CSI

Implementing an SGCT in a current-source converter can result in significant system improvements. These are discussed
below.
A. Snubber Circuitry

Fig. 9. Voltage blocking capability of the SGCT (symmetric forward and

reverse blocking is achieved).

capability of the
The turn-on and reverse-recovery
SGCT are increased to 1000 A/ s. This allows for a significant
limiting reactor. In MV
reduction of the size of the
applications, often a series connection of two or more devices
are used. The series connection requires a resistor for static
voltage sharing which is calculated from
(1)

as
decreases with decreasing
and
, recovery
capability is enhanced. Therefore, the new SGCT achieves both
high turn-off and high recovery capability while maintaining
low losses. Some of the more important characteristics of the
6.5-kV/800-A SGCT are given in Table I.

is the sharing resistor,

is the maximum voltage
where
is the allowable tolerance for
unbalance desired, and
is usually between
the reverse leakage current. The value of
20100 k . The dynamic voltage sharing of devices is achieved

900

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 37, NO. 3, MAY/JUNE 2001

Fig. 11. Reverse-recovery waveform of the new SGCT (with lifetime

optimized by MEPLT) and that of the conventional SGCT.

(a)
Fig. 12.

(b)

(a) An inverter leg using GTO. (b) An inverter leg using SGCT.
TABLE II
DESIGN TABLE BASED ON PER-UNIT VALUES

TABLE I
MAJOR CHARACTERISTICS OF 6.5-kV/800-A SGCT

TABLE III
LOSS COMPARISON TABLE

by implementing a small
circuit. The values of and
are chosen by limiting several transient voltages to acceptable
levels. First is the effect of the turn-on and turn-off delay times
which is given by the following:
(2)
is the tolerance in the overall turn off delay time,
where
is the commutable current, and is the capacitor in the
circuit.
The recovery voltage unbalance has to be limited as well. This
adds another criterion for choosing the capacitance value, given
by
(3)

where
is the reverse-recovery charge. Since the switching
times of the SGCT have been much improved, only a small capacitor is required to meet the criteria given by (1)(3). The
same capacitor can also act as the snubber for the SGCT if the
following criteria are met.
time constant must be small enough to allow fast
The
charge and discharge for the capacitor and allow for high
switching frequency operation with short pulsewidths.
The voltage overshoot during turn-off and reverse recovery must be limited to acceptable values.
Proper damping in the snubber circuitry must be obtained.

ZARGARI et al.: A NEW CURRENT-SOURCE CONVERTER USING SGCT

Fig. 13.

901

Harmonic spectra of inverter output current for three different switching frequencies. (a) 300 Hz. (b) 420 Hz. (c) 540 Hz.

The resistor should be large enough to limit the charge/discharge current.

, and the
snubber components are
The sharing resistor
designed based on the above criteria. Fig. 12 depicts the typical
inverter leg using a GTO and that of using a SGCT design. It
can be seen that the conventional RCD snubber is eliminated.
snubber that is used for the SGCT inverter employs
The
capacitors that are 20 smaller than the GTO snubber capacitor. The small snubber circuit arrangement has much lower loss
and allows simpler packaging. Table II lists the components in
the inverter leg for both designs. Other practical aspects of the
snubber design that must be considered are the power dissipation of the snubber resistors and the rms current and voltage
rating of the capacitor.
B. Loss Calculation
Due to the improvement of the switching speed of the SGCT
and because of the small snubber used, the switching frequency
of the SGCT can be increased. This will result in higher
switching losses. However, reduction of the snubber circuitry
limiting reactor result in lower snubber losses
and the
and the total loss of the inverter can be significantly reduced.
Losses for the GTO and SGCT inverters are compared and
results are shown in Table III. These results are for a 1250-hp
4160-V drive and are based on the design given in Table II. The
losses are obtained by first measuring the device voltage and
current at the time of switching from simulation (e.g., Fig. 2)
and then calculating the switching losses based on the device
data sheet (e.g., Table I).
C. Passive Filter Components
1) Design of the Output Capacitor: As previously mentioned, the switching frequency of the converter can be
increased. Increasing the switching frequency inherently

improves the harmonic spectrum and requires a smaller filter

to achieve the same quality [same total harmonic distortion
(THD)] waveforms. This is because higher switching frequency
moves the harmonics to a higher order which are easier to
mitigate by small low-pass filters. The harmonic spectra for the
inverter output current with three different switching frequencies are depicted in Fig. 13. It can be noted that filtering the
harmonics in the bottom figure (
Hz) is easier than
). The output filter capacitor is
the other two cases (lower
designed considering the following issues.
By properly positioning the filter break point, the harmonic resonances between the capacitor and the motor
reactances are moved to a safe region where no residual
harmonics exist.
The capacitor is sized in such a way to meet specific THD
requirements for both motor voltage and current waveforms.
Design of the capacitor itself requires special attention to the
current and voltage rating of the capacitor. These are calculated
allowing for the maximum harmonic currents injected from the
inverter side and the fact that the motor is allowed to operate
continuously at speeds above 60 Hz.
2) Design of the DC-Link Reactor: The main criterion for
the design of the dc-link reactor is to keep the current ripple
within an acceptable level (e.g., 20%). The size of the dc
link will depend on the front-end topology used, as different
topologies result in different harmonic spectra and require
different size of inductors to satisfy the design criterion. There
are three different possibilities for the front-end rectifier: a
six-pulse thyristor rectifier, an 18-pulse thyristor rectifier, or
a PWM rectifier. The 18pulse SCR rectifier meets IEEE-519
by employing a multiwinding isolation transformer. The PWM
rectifier which is a replica of the inverter also meets IEEE-519
and uses the same SGCT devices. The PWM rectifier offers a
better power factor [6], an overall size reduction, and improved
efficiency since it does not require an isolation transformer for

902

Fig. 14.

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 37, NO. 3, MAY/JUNE 2001

Turn-on waveform (200 A/div, 1000 V/div, 2 s/div).

harmonic cancellation. The harmonic mitigation is achieved by

switching at only 420 Hz (Fig. 13).

Fig. 15. Voltage and current waveform of SGCT with 420-Hz switching
frequency, full load, full speed, 1250 hp, 4160 V ac drive (200 A/div, 1000
V/div, 2 ms/div).

V. EXPERIMENTAL RESULTS ON A 4160-V

PWM-CSI AC DRIVE
A 6.5-kV 800-A SGCT is tested in a 4160-V PWM-CSI
ac drive. This configuration uses two devices in series with
the design being similar to that given in Table II. The turn-on
waveforms are shown in Fig. 14. The turn-on time is reduced
to 23 s and the tail time is significantly reduced (compared
to GTOs). The turn-off and recovery waveforms are already
discussed in Figs. 10 and 11 and, therefore, are not shown. The
device current and voltage waveforms are depicted in Fig. 15.
A selective harmonic elimination pattern with seven switchings
per half-cycle is used to operate the inverter. The angles are
calculated to eliminate the 5th, 7th, and 11th harmonics. The
switching waveforms confirm proper operation of the SGCT
, high
, and a small
snubber. The
with high
motor voltage and current waveforms are shown in Fig. 16.
The THD of the current waveform is less than 2.5%. The motor
line-to-line voltage is sinusoidal and does not contain any
waveform. This is one of the main
voltage steps or high
advantages of the CSI drive where the motor insulation is not
and chopped voltage waveforms, as is
subjected to high
the case for any type of voltage-source-inverter (VSI)-based ac
drives.
VI. CONCLUSION
An SGCT with full reverse voltage-blocking capability has
been proposed in this paper. A ring gate arrangement ensures
uniformity of the storage time and improves the current commutation capability as compared to conventional GTOs. The
developed SGCT is a 6500-V 800-A device and is most suitable for CSI-based MV ac drives. The implementation of the
SGCT in PWM-CSI ac drives was discussed and design issues
were investigated. The results show that the PWM-CSI with
SGCT can operate at a higher switching frequency and requires

Fig. 16. Motor current and voltage waveforms, 4000 V, 1250-hp induction
motor (300 A/div, 5000 V/div, 5 ms/div).

smaller passive filter components, improving the performance

of the drive. Moreover, the conventional RCD snubber can be
snubber, resulting in a reduction of
replaced with a small
size and component count and enhancing the reliability of the
system.
REFERENCES
[1] K. Satoh, M. Yamamoto, T. Nakagawa, and K. Kawakami, A new high
power device GCT (gate commutated turn-off) thyristors, in Conf. Rec.
EPE97, 1997, pp. 7075.
[2] H. Gruening, B. Odegard, A. Weber, E. Carroll, and S. Elcher, High
power hard-driven GTO module for 4.5 kV/3 kA snubberless operation,
in Conf. Rec. PCIM96, 1996.
[3] S. Bernet, R. Teichmann, A. Zuckerburger, and P. Steimer, Comparison
of high power IGBTs and hard-driven GTOs for high power inverters,
IEEE Trans. Ind. Applicat., vol. 35, pp. 487493, Mar./Apr. 1999.
[4] D. Rendusora and P. Enjeti, An improved inverter output filter configuration reduces common mode and differential modes dv=dt at motor
terminals in PWM drive systems, IEEE Trans. Power Electron., vol. 13,
pp. 487493, Nov. 1998.

ZARGARI et al.: A NEW CURRENT-SOURCE CONVERTER USING SGCT

[5] S. Bhattacharya, L. Resta, D. Divan, and D. Novotny, Experimental

comparison of motoring currents with PWM hard and soft swicthed
voltage source inverters, IEEE Trans. Power Electron., vol. 14, pp.
552562, May 1999.
[6] N. Zargari, Y. Xiao, and B. Wu, A PWM CSI-based vector controlled
medium voltage AC drive with sinusoidal input and output waveforms,
in Conf. Rec. IEEE-IAS Annu. Meeting, 1997, pp. 768774.
[7] S. Rizzo, B. Wu, and R. Sotudeh, Symmetric GTO and snubber component characterization in PWM current source inverters, IEEE Trans.
Power Electron., vol. 13, pp. 617625, July 1998.

903

Hideo Iwamoto was born in Japan in 1943. He received the B.E. degree in electrical engineering from
Osaka University, Osaka, Japan, and the Doctor of
Engineering degree from Yamaguchi University, Yamaguchi, Japan, in 1967 and 2001, respectively.
He was with Mitsubishi Electric Corporation from
1967 to 1991. He was with Powerex, Inc., Youngwood, PA, from 1992 to 1998 and then returned to
Mitsubishi Electric Corporation, Fukuoka, Japan, in
1999. He has been engaged in the design and development of power semiconductor devices.
Mr. Iwamoto is a member of the Institute of Electrical Engineers of Japan.

Navid R. Zargari (S90M90) received the B.Eng.

degree from Tehran University, Tehran, Iran, and the
M.A.Sc. and Ph.D. degrees from Concordia University, Montreal, PQ, Canada, in 1987, 1991, and 1995,
respectively.
Since November 1994, he has been with the
Medium Voltage R&D Department, Rockwell
Automation Canada, Inc., Cambridge, ON, Canada,
where he is involved with simulation and design of
rectifiers/inverters for medium-voltage ac drives. His
research interests include power converter topologies
and their control aspects, and electrical ac drives.

Steven C. Rizzo (S85M93) received the B.Eng.

degree from McMaster University, Hamilton, ON,
Canada, and the Masters degree from the University
of Teesside, Middlesbrough, U.K., in 1986 and
1998, respectively.
From 1986 to 1992, he was with Inverpower
Power Controls, where he worked in the development of low- and medium-voltage power converters.
Since 1992, he has been with Rockwell Automation
Canada, Inc., Cambridge, ON, Canada, where he
is presently the Manager of the Medium Voltage
Development Group. His research interests are in the application of high-power
semiconductor devices in medium-voltage applications and simulation on
power converters.
Mr. Rizzo is a Registered Professional Engineer in the Province of Ontario,
Canada.

Yuan Xiao (S96A98) received the B.Sc. and

M.Eng. degrees in electrical engineering from Xian
Jiaotong University, Xian, China, the M.A.Sc.
degree from the University of Toronto, Toronto, ON,
Canada, and the Ph.D. degree from the University
of Teesside, Middlesbrough, U.K., in 1982, 1985,
1993, and 1998, respectively.
Since December 1996, he has been with the
Medium Voltage R&D Department, Rockwell
Automation Canada, Inc., Cambridge, ON, Canada,
where he is working on high-power converters for
ac drives. His areas of interest include high-power converter design, modeling,
and analysis.

Katsumi Satoh received the Master of Engineering

degree in electronic engineering from Yamagata
University, Yamagata, Japan, and the Doctor of Engineering degree from Kyushu University, Fukuoka,
Japan, in 1984 and 2000, respectively.
In 1984, he joined Mitsubishi Electric Corporation, Fukuoka, Japan, where he previously worked
on the development of high-voltage thyristors,
light-triggered thyristors, and GTO and GCT thyristors in the Power Device Division. He is currently
working on the design of IGBT and diode chips for
power modules.

John F. Donlon (S64M66SM93) received the

B.S. degree with high honors from the University
of Lowell, Lowell, MA, and the M.S. degree from
Syracuse University, Syracuse, NY, in 1966 and
1970, respectively, both in electrical engineering.
While at Syracuse University, he studied under a
National Aeronautics and Space Administration
Traineeship.
He is Senior Application Engineer at Powerex,
Inc., Youngwood, PA, and has been involved in
the rating, evaluation, and application of power
semiconductors for the past 30 years, having worked for General Electric
and Westinghouse Electric before the formation of Powerex. He represents
Powerex on the Electronic Industries Alliance JEDEC Standards Committee
for Rectifiers and Thyristors and chairs the Committee on Transistors. He
has been active in the publication of application notes and technical papers
describing the characteristics and proper application of power semiconductors
and has served on technical panels at the Electric Power Research Institute and
International Symposium on Power Semiconductor Devices conferences.
Mr. Donlon is a Senior Member of the IEEE Industry Applications Society
and a member of the IEEE Power Electronics Society, Tau Epsilon Sigma, and
Eta Kappa Nu. He has served on technical panels at IEEE PESC and IEEE
IECON conferences.