Exam 1 Study Questions: Chapters 1-7, 9 of Nelson's Text
Exam 1 Study Questions: Chapters 1-7, 9 of Nelson's Text
Exam 1 Study Questions: Chapters 1-7, 9 of Nelson's Text
8. What is the gate described by each of the following truth tables A through J? A I0 0 1 0 1 B I0 0 1 0 1 C I0 0 1 0 1 D I0 0 1 0 1
I1 0 0 1 1
F 0 0 0 1
I1 0 0 1 1
F 0 1 1 0
I1 0 0 1 1
F 1 1 1 0
I1 0 0 1 1
F 0 1 1 1
I1 0 0 1 1
E I0 0 1 0 1
F 1 0 0 1
I1 0 0 1 1
F I0 0 1 0 1
G F 1 0 0 0 I 0 1 F 1 0 I 0 1
H F 0 1
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I I2 0 0 0 0 1 1 1 1 I1 0 0 1 1 0 0 1 1 I0 0 1 0 1 0 1 0 1 F 0 1 1 0 1 0 0 1 I2 0 0 0 0 1 1 1 1 I1 0 0 1 1 0 0 1 1
J I0 0 1 0 1 0 1 0 1 F 0 0 0 0 0 0 0 1
9. Draw the gate symbols for the following operators: + 10. Give the (unminimized) Boolean equation represented by the following truth table: I2 0 0 0 0 1 1 1 1 I1 0 0 1 1 0 0 1 1 I0 0 1 0 1 0 1 0 1 F 1 0 1 1 1 0 0 1
11. Assuming there are three variables (A, B, C), identify each of the following as a minterm expansion, maxterm expansion, or neither: a.) AB + BC b.) A + B + C c.) ABC + ABC + ABC 12. Simplify the following expressions: a.) xy + xyz + yz b.) (xy + z)(x + y)z c.) xy + z + (x + y)z d.) ad(b + c) + ad(b+c) + (b + c)(b + c) e.) wx + xy + yz + wz f.) ABCD + ABCD + BEF + CDEG + ADEF + ABEF (reduce to a sum of three terms) g.) [(a + d + bc)(b + d + ac)] + bcd + acd (reduce to three terms) 13. Convert (A + B + C)(A + B + C) to an SOP representation. 14. Convert ABC + ABC to a POS representation. d.) (A + B + C)(A + B + C) e.) (A + B)(B + C)(A + C) f.) ABC
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15. Whats the truth table for the following transistor-level schematic, assuming positive logic? What is the name for this gate? VCC VCC
GND 16. What is the truth table for the circuit of the previous problem, assuming negative logic? What is the name for this gate? 17. Write the Boolean logic equation for Figure 6.12(b) in the text. 18. The logic equation F = A + B is equivalent to which standard gate? (Hint: Use DeMorgans Law) 19. Convert the following expression to two-level AND-OR logic: A[AB + C(D + A)+ B]. Simplify your answer. 20. Convert the following expression to a three-level circuit: BA + D + AC 21. How many transistors are needed to build the CMOS circuit represented by the following equation? Assume all non-inverted and inverted inputs are available. (Do not perform any minimization or gate transformations. Dont forget to count inverters). ABC + BC + AB 22. In CMOS, and assuming uniform transistor size, which gate is faster: AND or NAND? 23. Complement the following function by applying DeMorgans law (Do not simplify): F = A(BC + D) + B[AD + B(C+D)]
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24. Convert the following expression of 4 variables to a minterm expansion: AB + BC + ABCD 25. Convert the following expression to a maxterm expansion: (A + B)(B + C)(A + B + C + D) 26. Convert the following maxterm expansion to a minimum sum of products expression: F(A,B,C,D) = M(0,2,3,4,8,9,10,15) 27. Given that F = AB + CD and W = ABC + BD + CD', what is the minimum expression for F + W? 28. Show algebraically that the following to expressions are equal (i.e., prove the consensus theorem using Boolean algebra and other theorems): AC + AB + BC = AC + AB 29. Convert the following to a sum of products expression: (AB) C 30. Convert the following to a sum of products expression: A (B C) 31. Suppose you have a system with three buttons. Each button sends a logic 1 when the button is being pressed and a zero once it is released. The system should light an LED (by sending it a logic 1) whenever only one is button pressed at a time, and should turn off the LED (by sending it a logic 0) when more than one button is pressed. At least one button will always be pressed so we do not care what the circuit does when no buttons are pressed. Design a minimized circuit to control the LED. 32. Convert the following expression to NAND-NAND logic: AB + AB 33. Is a 4:1 mux functionally complete? How would you prove this? 34. For the following K-map: a.) Identify all the prime implicants b.) Identify all the essential prime implicants c.) Derive all the minimized SOP expressions for this logic AB CD 00 01 11 10 00 1 1 01 1 11 1 1 1 1 1 10
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35. Carefully inspect the following K-map. a.) b.) c.) d.) e.) f.) Why is AB not essential? Is AD essential? Why? Is BC essential? Why? Is BCD essential? Why? Why is BD essential? What is the minimum SOP for the K-map? AB CD 00 01 11 10 00 1 1 1 1 1 1 01 1 1 11 1 1 1 10
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A=0 38. For the following truth table, solve the following problems:
A=1
a.) By inspection of the truth table, use a 2:1 mux, with A as the select signal, to implement the logic function. b.) Derive an algebraic equation for F then use a 2:1 mux, with B as the select signal, to implement the function. That is, use the algebraic method to derive the needed input logic. A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 F 1 0 1 1 0 1 1 0
39. Using a 3:8 decoder, implement the following logic function: F(A,B,C) = A + BC + AB 40. What size ROM would you need to implement the logic function: F(A,B,C,D,E,F) = A + DE + EF 41. What is the size of a ROM with 6 inputs and 3 outputs?
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