Introduction of Cadence Tools
Introduction of Cadence Tools
Introduction of Cadence Tools
These tools are a very powerful set of tools. They are very popular in industry and can do everything from schematic entry, circuit simulation and layout all the way to design a complete microprocessor. This is a simple tutorial on using the Cadence version 6 for creating an inverter. This tutorial covers setting up the environment, and designing a simple inverter from beginning. First, log into a computer in the lab, choose Ubuntu OS (NOT recovery mode) in the boot list, with the account as below: Account: EE476 Password: 123456 You have to store all of your labs work in the directory Student on the Desktop from now. Starting Cadence Now you should be able to run the Cadence tools. Note: Never run Cadence from your root directory, it creates many extra files that will clutter your root. Double click on Student directorys icon on the Desktop. Start Cadence with the following command in the terminal. virtuoso &
The command virtuoso & starts Cadence in the background, this will set up an environment and start the Cadence system. It may take a while, but you should eventually see:
You should now have the basic virtuoso window; Command Interpreter Window (CIW) appears.
The title of the window will be Virtuoso 6.1.4 Log: /home/ee476/CDS.log. This CDS.log file will store all the Cadence commands you use during this session. It is also very useful to help you figure out why some problems occur. You should always watch the messages in the CIW window very carefully during the lab session and report any errors or warnings to the lab instructor. You can quit Cadence by clicking the left mouse button on the menu File -> Exit of the CIW. Click on Yes to answer the confirmation box to finally exit Cadence. IMPORTANCE: Never attempt to quit Cadence by other means. It will leave the Cadence program running even you logout. Creating Cadence Library Click on <Tools> on the CIW and then <Library Manager> to start the library manager.
You will now create your own design library. You can think of libraries as being analogous to directories in a file system. Like grouping related files in a directory, we will group all our related design data in a Cadence library. For example, you may want to create a new library for your project to put all related designs in it. Click on <File> on the Library Manager window then cursor over to <New> then to <Library> and click <Library>
In the Name field, type the name of the library you want to create (Lab1 in this tutorial). The library name cannot duplicate the name of another library. In the Directory list box, select a directory in which you want to create the new library. You can also type the directory name and path in the field below the Directory list box. You must have write permission to a directory to create a library in it. By default, the software creates the library in your working directory. In this tutorial, the Directory must be /home/ee476/Desktop/Student/. Click on OK at the bottom. You will get a small screen. It is very important that you click on Attach to an existing technology library. Select the gpdk090 option by clicking in the list.
Click on OK. The library manager will now show the new library. Note: If you do not plan to design layouts, you do not need a technology file. To create a new library without specifying a technology file, do the following: In the Technology File for New Library form, choose Do not need process information and click OK. Library Manager creates the specified new library. (Although you will not use a technology file, the system automatically attaches the default technology file default.tf )
Select the new library by clicking on the name. You may not get the little pink box. It appears when you leave the cursor there for a period of time.
For practice, the tutorial will now create an inverter, and walk through the steps of simulating it. First, create the schematic. Click on <File> then cursor over to <New> then to <Cell View>. A small menu should pop up.
In the field for Cell, enter the name of the cell. Inverter is used in this tutorial. In the Application box that says Open with click on the red pull down arrow. Then select Schematics L. Click on the box that says, Always use this application for this type of file. Click OK. You should now get the schematic editing screen. Now, start the steps of making an inverter. First, add an N transistor. Select a component by clicking on the transistor symbol or use shortcut key i.
Now select gpdk090, then the transistor for this inverter N transistor. In this case, a nmos 1Volt terminal transistor (nmos1v). Then select the symbol for inclusion in the schematic.
You can click Close, or leave this window open. The Add Instance window will now appear with all the device characteristics as below. If the View doesn't say symbol, type that in. You can change the device sizes now, or later. For this example, the width will be 1um.
Select Hide to minimize this screen, or select the schematic page to place a transistor on the schematic. Place the transistor by clicking on the schematic screen.
The device properties can be changed in the property editor by choosing the device, clicking on the Properties symbol or using shortcut key Q. (Device sizes, names, etc.).
Now, add a pmos transistor. The click-by-click steps are the same as for the N transistor, except select pmos1v with the width is 3um.
Now time to add some wire to the schematic. The single width wire is just to the right of the transistor symbol. Click on it (or using hotkey w), and then move the cursor to the first point to be wired. It should highlight with a yellow diamond. Click, and then move the pointer to the second point and click to draw the wire. Repeat this process to wire the schematic as shown below. You not need to click on the thin wire symbol each time as long as it is wiring mode. Some notes, Cadence doesn't allow 4 connections at a point. If you make a mistake, then press the escape key. Click on the wire in error if any is left, and then click on edit then delete.
Now time to add input/output Pins as long as Label to make all wires in the schematic have defined voltage. Clicking on the Pin symbol or hotkey p to add pin to the schematic. Add Pin window will appear, type In in the field Pin Names, choose Direction as input.
Repeat the same steps to add Out pin (output), VDD pin (inputOutput), VSS pin (inputOutput) and place on the schematic. Using hotkey r to rotate the direction of the pin.
Now, its time to define voltage of the bulk pin of the two transistors by adding label to the wires connected to these pins. Clicking on Create Wire Name icon or using hotkey l, then in Add Wire Name window, type VDD on Names field.
Place this label on the wire connected to the bulk pin of the pmos
Now, click on the floppy disk with the green arrow. This will check the design and save it. If all goes well, it should work. Create a symbol For simulation in later, a symbol will be created of the inverter. Click on <Create> then cursor over to <Cellview> then click on <From Cellview>. This should give
Make sure the to View Name is symbol (It normally is), and the type is schematic Symbol. Click on OK. This brings up a screen with the pins on the top, bottom, left and right. You can move them where you like. In this case, move them like this figure below, and then click OK.
This opens the symbol editor. If you like the symbol, just press the Check and Save floppy disk symbol with the green check mark.
At this point, the symbol is created, so just click on <File> and then click on <Close>. The schematics for the inverter are completed, so close that file by switching to the schematics, and clicking on <File> and then <Close>. Test bench Now, create a test bench for the inverter. Choose the same library, click on <File> then <New> then <Cellview>, name this schematic sheet, in this case Inverter_tb (for test bench). Use tool schematic L. Click on <OK>. You should be back in the schematic editor. Using what you learned from creating the inverter, place the symbol of the created Inverter from the library (it will be in the Lab1 library), and power, ground, vdc, vpulse (in the analogLib library) on the schematic as illustrated below. Add the created inverter to the test bench schematic.
Add a pulse source to create input pulses for the Inverter into the test bench schematic.
Now add a 20f capacitor from analogLib library for load on the inverter. Connect the added instances by wires, label them to make easy-to-understand, then your schematic should look something like:
Set up the vpulse for a 1us pulse width. You may have to scroll up and down to get to all the DC parameters. The first set of thing is for AC analysis.
When you have it connected properly, press the check and save floppy disk. If all goes well, it should be OK. If not, correct any errors.
The schematic has been created and things have names. It is now time to try some simulation. Simulation Click on <Launch> then <ADE L>
This screen is used to set up the simulation. Click on Analyses then Choose. This pops up a window with the simulation options.
Make sure the transient analysis is selected, and set it up for 2u of simulation time. Note: All simulation in this course should be performed in conservative mode.
Click OK. The result is listed. Note that the simulations can be enabled and disabled. This is a nice feature.
Now, select the outputs. Use <Outputs> then <To Be Plotted> then <Select On Schematic>. This will select the schematic editor. There, you can click on the wires for the signals desired. If you want currents, click on the terminals, and a circle is drawn on the schematic indicating what has been selected. When you go back to the simulation setup screen, you should see:
Click <Session> and Save State. In the State Save Directory field, it should be /home/ee476/Desktop/Student/Lab1 and in the Save As field, Inverter_trans.
Off the right of the upper region of the screen is a green circle with a play type button (triangle shape). Click on this to run the simulation. It may take a while, but eventually the simulation will finish and a display screen will appear.
Assignment Design, simulate a NOR gate with the same process as above Inverter example (make symbol, testbench) and below parameters: + Vdc = 1V; + NMOS width = 1u m, PMOS width = 3u m, length of both NMOS and PMOS = 100n; + Input 1(pulse): rise time = 10n s, fall time = 10n s, pulse width = 490n s, period = 1u s; + Input 2(pulse): rise time = 10n s, fall time = 10n s, pulse width = 990n s, period = 2u s; References
1. 2. 3. Cadence Library Manager User Guide http://www.ee.virginia.edu/~mrs8n/cadence/tutorial1.html www.engr.sjsu.edu/mjones/cadence6.pdf