IMPLEMENTATION OF AN ADAPTIVE DATA WINDOW TECHNIQUE IN A DISTANCE RELAY M.S. Sachdev T.S. Sidhu D.S.

Ghotra

University of Saskatchewan, Canada

Protective relays perform a vital role in operating power system with minimal disturbing influences and in minimizing equipment damage. They detect faults and issue trip commands to appropriate circuit breakers for disconnecting the faulted zone from the rest of the system. Some forms of distance relays, in addition" to other relays, are generally used to protect transmission lines. Most distance protection relays marketed at this time are microprocessor-based systems. The trip times of these relays are practically similar to those of their electromechanical and solid-state counterparts. Most distance relays estimate the fundamental frequency phasors from the quantized values of voltage and current samples. These relays use algorithms that convert data in a one-cycle window to a phasor [1,2]. When a new set of data is received and the oldest set of data is discarded. This procedure advances the datawindow by one sample at every sampling instant and keeps the length of the data window constant. The transient response of the techniques that use this approach is about one period of the fundamental frequency. The estimates of the impedance, therefore, converge to the final solution in about one period. This paper describes the design, implementation and testing of a distance relay that uses an adaptive data window approach for calculating phasors and impedances from those phasors. The relay uses a detector to determine the inception of a fault. On the inception of a fault, a ten-sample window is used. The window size is progressively increased as new samples of voltages and currents become available until the window size becomes one period of the fundamental frequency. At each sampling instant, an appropriate technique is used for estimating the voltage and current phasors. This procedure reduces the transient response time of the relay and reiults in providing converged estimates of the impedance, and consequently trip decisions, in shorter times in most cases. The proposed technique was implemented in a generalpurpose relay hardware that uses a TMS320C31-based digital signal processing board. The implemented relay was tested by using a real-time playback simulator and data obtained from computer simulations of fault on a model of the 138kV/230kV SaskPower system. The test results indicate that the proposed technique reduces the trip times significantly. Some results demonstrating the performance of the technique are included in the paper.

ADAPTIVE DATA WINDOW TECHNIQUE

The power system voltage and current signals are filtered through a low pass anti-aliasing filter. The filtered signals are used for fault detection, computations of voltage and current phasors, and apparent impedance calculations. Once a fault detector indicates a fault, the digital filters are initiated for phasor computations. The filtering is started with a data window size of ten samples, therefore, the coefficients of the loth order orthogonal filters are used to compute the fundamental frequency phasors. Starting from the instant of fault detection, the immediately preceding ten samples of the input signal form the first data window as shown in Figure 1. This ten-sample window may include pre- and post-fault samples. The data window is advanced by one sample as a new sample becomes available. This means that the most recent sample is included in the data window and the oldest sample is discarded, which keeps the length of the data window to ten samples. The advancement of ten-sample window is continued until four sampling instants after the fault detection as shown in Figure 1. After this, the data window size is increased progressively by one sample, as the new sample becomes available. The increase in data window size is continued till its length becomes equal to one cycle of the nominal frequency, and it remains fixed thereafter. As the data window size is increased, the filters of appropriate length are used for estimating fundamental frequency phasors. The computed phasors are then used to estimate the impedances seen by the various relay elements.

Figure 1: Adaptive data windows 161

Developments in Power System Protection, Conference Publication No.479 0 IEE 2001.

FAULT DETECTOR

The fault detector to be used in the proposed relay must have a fast transient response. This can be achieved by using a short data window algorithm such as the ones described in [3] and [4]. For the work presented in this paper, the algorithm of [3] was selected for the fault detection. This algorithm eliminates most of the effects of dc offset but amplifies the effects of harmonics. However, the presence of harmonics does not significantly affect the fault detection. The algorithm uses first and second derivatives of the input signal to compute the phasors from the sampled values. To detect the presence of a fault, the estimated peak values of the current phasors from the nth (where n data window is the present data window) and (r1-3)~ data windows are compared. If the difference between them is more than a specified threshold value, a fault is assumed to have occurred. However, for security reasons, the final indication of the fault is only given if three successive comparisons show that the difference is more than the specified threshold. For the studies reported in this paper, the threshold is set at two times the peak calculated using the (t1-3)~data window.

and is used to identify the location of the fault. If the seen impedance estimated by any relay element lies inside the characteristics, a trip command is issued by the relay dement. However, for security reasons, a trip command is issued only if four successive seen impedance values lie inside the operating characteristics of the relay element. Table 1. 13ienal comDositions assumed for filter desien
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X denotes that the component is assumed in the signal

DIGITAL FILTERS

The proposed relay requires orthogonal filters of different lengths to be designed for extracting the fundamental frequency phasors of voltage and current. For protective relaying, a variety of filter design methods have been proposed. However, the Least Error Square (LES) method [SI is selected for the filter design. Design process allows to specify the signal composition, the sampling rate, and the data window length. The data window length limits the number of components that can be assumed in the signal composition. Twelve LES filters of different data window lengths are designed and their coefficients are stored for estimating the fundamental frequency phasors. In the proposed relay, a fundamental frequency of 60 Hz is assumed and a sampling frequency of 1200 Hz is used. Table 1 shows the signal composition that was assumed for designing LES filters. The dc-decay component was included for the second 20th order LES filter design. This filter replaces the first 20th order LES filter two sampling instants after the data window size becomes twenty samples.
IMPEDANCE ESTIMATION

RELAY bl:PLEMENTATION

Adaptive data window-based distance relay was implemented in the Power Systems Laboratory at the University of Saskatchewan by using a general-purpose relay hardware [6]. This section describes the hardware and software of the adaptive data window-based distance relay.

Hardware
The relay hardware has four major components; lowpass filter boards, data-acquisition system (DAS) cards, a digital signal processing (DSP) card, and a host personal computer. Figure 2 shows the organization of these components. Low-pass filters are are implemented using switched capacitor filters, designed using MF6CN- 100 chips. Their cut-off frequency can be set by an external clock. A cut-off frequency of 200 Hz has been used for the proposed idistance relay. Two boards each having four channels a.re used. The data acquisition system consists of hardware that samples and quantizes signals at a pre-specified sampling interval. It has two 4-Channel Analog Interface c:ards to collect data from the eight channels. Each card supports four analog input channels and two analog output channels. These cards consist of analog signal conditioning unit, quad sample and hold amplifier, analog-to-digital converter (ADC), the sample rate timer, and the control and status registers with the associated interrupt control. The A to D conversion of a channel and transfer of digital data to

The computed voltage and current phasors are used to estimate the impedance seen by the relay. The impedance estimation is performed by six relay elements - three being used for phase faults and another three for earth faults. The six elements are presented with appropriate voltage and current signals. These signals are formed using the fundamental frequency voltage and current phasors. Mho-type operating characteristics are used for all relay elements. The seen impedance is estimated by each relay element separately

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Voltage and Current Inputs from Playback Simulator

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upload the results from the memory of digital signal processor (DSP) and store them into a pre-specified file name and location. The results to be uploaded include values of the voltages and currents, and the impedance estimates, computed by the relaying software.
RELAY TESTING

Testing procedure includes generation of data using simulations, playback of simulated data, and testing of the relay. The performance of the relay was verified using the configuration and data of the power system shown in Figure 3. The power system has five different circuits, operating at 230 kV and 138 kV levels. Relay R, as shown in Figure 3, is used for providing protection to the transmission line CCK. The protection zone of the relay, R, is set to 80 YOof the line, CCK, i.e., the length of 153.328 kms from the relay location. This forms the first zone of protection of the relay. Various types of faults and their locations were considered in the test studies. A recorder component, used in the simulations, was used to store the voltage and current samples, and the logic signal as playback files. These playback files were used by Real-Time Playback Simulator to generate analog signals which were presented to the relay. The relay s response was monitored and recorded. Results showing the performance of the proposed relay for two different types of faults occurring at various locations in the selected power system are presented. A comparison of the results obtained from a fixed data window-based relay is done. Figure 4 demonstrates the performance of the relay for a phase a to ground fault having a fault resistance of 20 ohms. This fault was simulated on the line, CCK, at a distance of 20 kms from the relay location as shown in Figure 3. All generators were at their maximum generation level at the time of fault. Figure 4 shows a comparison of the fault impedance trajectories as seen by the adaptive and fixed data window-based relays. It is observed that when the adaptive data window-based relay is used, the seen impedance enters the operating zone of the relay eight samples after the occurrence of the fault. Whereas, when the fixed window-based relay is used, the seen impedance enters the operating zone sixteen samples after the occurrence of the fault. Therefore, the transient response of the adaptive data window-based relay is faster. This is demonstrated further by comparing the trip times of the relays. The adaptive data window-based relay detected the fault at 20.83 ms, and a trip command is issued at 25 ms. As the fault occurred at 15 ms, the time taken to issue a trip command is I O ms (25 ms - 15 ms). On the other hand, the fixed data window-based relay issued a tripcommand at 3 1.67 ms and, therefore, the time to issue a trip command is 16.67 ms. However, it must be noted that the impedance seen by both relays converge to the same value while the tripping speed of the adaptive data window-based relay is higher.

USER

Personal Computer

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Figure 2: Block diagram showing relay hardware the digital signal processing (DSP) card memory is accomplished by control and data signals via a 50-pin DSPLINK2 connector from the digital signal processing card. The sample rate timer is a 16-bit up counter running at 8 MHz and is set at 1200 Hz for the proposed relay. The PC/C3 1 card, based on the 33.3 MHz TMS320C3 1 Digital Signal Processor from Texas Instruments, is used as a digital signal processor card. The adaptive data window technique is implemented in the DSP card. The PC/C31 DSP card and data acquisition system cards are placed into the expansion ports of an IBM PC AT compatible personal computer. This host PC provides facilities for controlling the operation of the DSP and DAS cards, debugging the software, and accessing various memory locations and registers of the DSP. Software Three software modules are required for implementing the proposed distance relay, i.e., data acquisition, relaying and user interface modules. The data acquisition software is used to initialize the data acquisition system cards, control the sample-rate timer, and acquire samples at successive sampling instants. A sampling frequency of 1200 Hz is selected. Relaying software was written using the ANSI C programming language and implements the adaptive data window-based technique. The software includes fault detection, phasor estimation and impedance estimation routines. The user-interface software was developed using the Microsoft Visual Basic version 3.0. PC/C31 IIL (Intelligent Interface Library) functions are used in the development of this software. The software is used to

163

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The proposed relay is extensively-tested for a variety of faults by varying fault distance, generation level, and fault resistance. It is shown that the proposed relay is able to converge the seen impedance much faster as compared to the relay using the fixed data window approach. The relay operates correctly for all faults simulated within the protection zone of the relay and does not issue a trip command for the faults outside the protection zone. The proposed relay is able to issue the trip commands in lesser time in comparison to a relay using fixed-window approach.

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Figure 3: Power system model used for generating fault data

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Figure 5 shows the performance of the developed relay for a single-phase to ground fault, involving phase 'c , outside the protection zone. This fault was simulated on the line, CCK, at a distance of 180 kms from the relay location as shown in Figure 3. All generators in the power system were at their minimum generation level when this fault was experienced. Figure 5 shows the fault impedance trajectories as seen by the relays. It is observed that the seen impedances converged outside the operating region of the relay characteristics. Therefore, this led to the decision that fault is outside the protection zone of the relay, and thus, no trip command'was issued. However, it must be noted that the impedance seen by both relays converge to the same value.

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REFERENCES

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Figure 4: Trajectories of the seen impedance for a phase 'a to ground fault on line CCK at 20 kms from the relay location
CONCLUSIONS

The paper describes the design and implementation of a distance relay using the adaptive data windows for transmission line protection. The relay determines the instant of fault inception by using fault detector whose

[l] Sachdev, M.S. (Coordinator), 1997, Advancement in Microprocessor-based Protection and Communication, IEEE Tutorial Course Text, 97TP120-0. [2] Phadke, A.G. and Thorp, J.S., 1988, Computer Relaying for Power Systems, John Wiley and Sons, New York. [3] Gilcrest, G. B., Rockefeller, G. D. and Udren E. A., 1972, "High Speed Distance Relaying Using a Digital Computer, Part I - System Description", IEEE Trans. Power Apparatus and Svstems, 1972, 1235-1243. [4] Mann, B. J. and Morrison, J. F., 1971, "Digital Calculation of Impedance for Transmission Line Protection", IEEE Trans. Power Avvaratus and Svstems ,90, 270-279. [5] Sachdev M.S. and Baribeau, M.A., 1979, "A N e w Algorithm for Digital Impedance Relays", E = Trans. Power Avvaratus and Svstems, 98, 22322240. [6] Sidhu, T.S., Sachdev, M.S. and Das R. 1997, "Modern Relays: Research and Teaching Using PCs" IEEE ComDuter ADDlications in Power, U, V0.2, 50-55.

a,

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