Grid Compaction Algorithms
Grid Compaction Algorithms
Grid Compaction Algorithms
Compaction
~
10.1
c Sherwani 92
Compaction
Given:
i
Problem Formulation
n
M = fM1 M2 : : : M g, a set of geometric features s(M ), the minimum feature size. d(M M ), the minimum separation between features M & M
i j i
Objective:
Minimize the layout such that size(M ) s(M ) dist(M M ) d(M M ) where size(M ) and dist(M M ) are size of M and distance between M and M after the compaction, where 1 i j n.
i i i j i j i i j i i j
10.2
c Sherwani 92
Compaction
Hierarchical Compaction
1-D Compaction
2-D Compaction
1 1 -D 2 Compaction
10.3
c Sherwani 92
Compaction
1-Dimensional Compaction
(Constraint Graph Based Compaction) Constraint Graph Generation
The constraint graph G = (V E ), is a weighted graph. Each vertex v 2 V represents a component. The set of edges, E , represents constraints.
Constraints in graph
Connectivity constraints
Separation constraints
10.4
c Sherwani 92
Compaction
Connectivity Constraints
~
If the two features C and W are required to be within a distance s of each other, this connectivity constraint is represented in the graph as a pair of constraints between C and W , each with weight ;s.
x x
W s (a) -s C W
-s (b)
10.5
c Sherwani 92
Compaction
Separation Constraints
Two features, A and B , are required to be at least d units d units apart from each other. The separation constraint is represented as an edge from A to B of weight d.
A B
~
d (a) d A (b) B
10.6
c Sherwani 92
Compaction
10.7
c Sherwani 92
Compaction
Shadow-Propagation Algorithm
Algorithm SHADOW-PROPAGATION(Comp list component) begin
INITIALIZE-SCANLINE( component ) I= while( (LENGTH-SCANLINE( I ) < (top ; bottom)) and ( Comp list 6= ) ) curr comp = GET-NXT-COMP( Comp list ) I = LEFT-EDGE( curr comp ) if( IN-RANGE( I top bottom ) ) I = UNION( I I ) if( I 6= I ) ADD-CONSTRAINT( component curr comp ) I = UNION( I I )
i i
0
end.
10.8
c Sherwani 92
Compaction
10.9
c Sherwani 92
Compaction
B B
D,E
C 1 2 Bottom 3
C 4
(b)
10.10
c Sherwani 92
Compaction
4. When the scanline passes over the left edge of a rectangle, the rectangle is added to the scanline. 5. When the scanline passes over the right edge of a rectangle, the rectangle is deleted from the scanline.
~ A.A. Malik, ICCAD'87
10.11
c Sherwani 92
Compaction
Scanline Algorithm
Algorithm SCANLINE (G) begin while topsorted = 6 do
let R1 be the rst rectangle in topsorted and R2 be the rst rectangle in bottomsorted if YTOP(R1) YBOTTOM(R2) then INSERT(R1 scanline) topsorted = topsorted ; fR1g for each rectangle R 2 scanline that is at the left of R1 do ADD-CONSTRAINT(R R1 G) for each rectangle R 2 scanline that is at the right of R1 do ADD-CONSTRAINT(R1 R G)
i i j j
end.
10.12
c Sherwani 92
Compaction
~
E F
scanline
10.13
c Sherwani 92
Compaction
10.14
c Sherwani 92
Compaction
C 5 6 3
F 3 3 1
16
12
(a)
D A
14
11
(b)
10.15
c Sherwani 92
Compaction
10.16
c Sherwani 92
Compaction
C 5 6 3
F 3 3 1
16
12
(a)
10 D A 11 G
E B H
14
(b)
10.17
c Sherwani 92
Compaction
Compression-Ridge Method
1. Compression ridge is a constant width band of empty space stretching from one side of the layout to the other side. 2. Compression ridge can intersect wires that are perpendicular to it. However, it cannot intersect those wires that are parallel to it.
~
3. The width of a compression ridge is such that when the space is removed, no design rules should be violated in the resulting layout.
10.18
c Sherwani 92
Compaction
(a)
(b)
10.19
c Sherwani 92
Compaction
1 -Dimensional Compaction 12
~
3. During movement in the free zone, the blocks travel through the entire width of the layout.
10.20
c Sherwani 92
Compaction
ZONE
~
Heater re-crystallization zone
Ceiling Floor
Bottom
(a)
(b)
10.21
c Sherwani 92
Compaction
The Algorithm
Begin Algorithm Input: Partially compacted layout obtained by two two applications of 1-D compactor. oor:= List of all the blocks which are visible the top ceiling:= List of all the blocks which are visible from the bottom While all the blocks are moved from ceiling to floor
g end
Select the lowest block from ceiling such that the gap between floor and ceiling is maximize Move the block to floor
10.22
c Sherwani 92
Compaction
Floor
A nil B y1
(a)
G D E F
(b)
gap 1
gap 2
C A C B
Ceiling
G D C E F
(c)
y2
F G
E F
x2 x1 C A C B y1 C B A B
Floor
A
(d)
(e)
10.23
c Sherwani 92
Compaction
(x j , y j )
Bi Wj
(x j , y j )
Wi
Wj
(x i , y i )
(x j , y j ) (x i , y i )
(a)
(x i , y i ) (x j , y j )
(b)
x +w x y +h y x ;w x y ;h y x +w x y y x +w x x x x x x x y + r1 y y + r2 y x x x x y y y y c1 : x + d1 x c2 : x + d2 x c3 : y + d3 y c4 : y + d4 Where w and h are the width and height of the block B r1 r2 ] is the range between B and the wire W d is the distance between B and B .
i i
0
j j i
ij
ij
ij
ij
ij
ij
ij
ij
ij
ij
ij
ij
k ij
10.24
c Sherwani 92
Compaction
Hierarchical Compaction
1. Given a hierarchical symbolic layout, hierarchical constraint graph is generated at each level of the hierarchy of the design from bottom up. 2. Initially, constraints are generated for all the leaf cells consisting of basic features. 3. Each leaf cell is compacted using the corresponding constraint graph and ~ the boundary of the compacted leaf cell is xed. 4. Once the leaf cell is compacted and the boundary is xed, the cell can be treated as a single cell in the next level in the hierarchy and constraints can be generated for the cells in that level. 5. The compaction is carried out by generating constraints at each level.
10.25
c Sherwani 92
Compaction
E A D F B
C2 C G H I J
Hierarchical layout
Algorithms for VLSI Physical Design Automation
10.26
c Sherwani 92
Compaction
C1
R
D
C1
G1
C2
C2
G2
A L
G
B C
G3
10.27
c Sherwani 92
Compaction
Summary
1. The objective of a compaction algorithm is to reduce the layout area. 2. There are two major compaction strategies: the constraint-graph based compaction and the virtual grid based compaction. 3. Constraint-graph based compactors usually produce smaller area layouts ~ as compared to the virtual grid compactors. 4. Virtual grid compactors typically run faster as compared to the virtual grid compactors. 5. The speed of both type of algorithms can be improved by using hierarchy of the layout.
10.28
c Sherwani 92