Akai Lct3201td SM

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Model:

LCT3201TD

Safety Instructions.......................................................................1~2
Production specification...........................................................3~11
DVD Player's Spec. for LCD Comb..............................................12
LCD COMBO Connection............................................................13
Panel Inverter Power..............................................................14~29
Basic Operations & Circuit Description..................................... ..30
PCB Function........................................................................... .. 31
PCB Failure Analysis................................................................. 32
Basic Operation of LCD-TV...................................................33~34
IC Descriptions..................................................................... .35~45
LCD Panel specification........................................................ 46~101
Exploded View Diagram.............................................................. 102
Spare parts list.....................................................................103~104
V-Chip Password....................................................................... 105
Software Upgrade................................................................105~106
SERVICE MANUAL
This manual is the latest at the time of printing, and does not
include the modification which may be made after the printing,
by the constant improvement of product.
www.dtforum.net
- 2 -
I. Safety Instructions
PRECAUTIONS DURING SERVICING
1. In addition to safety, other parts and assemblies are
speci fied for conformance with such regulations as
those applyi ng to spurious radiation. These must
also be replaced only with specified replacements.
Exampl es: RF converters, tuner units, antenna
selection switches, RF cables, noise-blocking
capacitors, noise-bl ocking filters, etc.
2. Use specified internal Wiring. Note especially:
1) Wires covered with PVC tubing
2) Double insulated wires
3) High voltage leads
3. Use specified i nsulating material s for hazardous
live parts. Note especially:
1) Insulating Tape
2) PVC tubing
3) Spacers (insulating barriers)
4) Insulating sheets for transistors
5) Plastic screws for fixing micro switches
4. When replacing AC primary side components
(transformers, power cords, noise blocking
capacitors, etc.), wrap ends of wires securely about
the terminals before soldering.
5. Make sure that wires do not contact heat generating
parts (heat sinks, oxide metal fi lm resistors, fusi ble
resistors, etc.)
6. Check if replaced wires do not contact sharply edged
or pointed parts.
7. Make sure that foreign objects (screws, solder
droplets, etc.) do not remain insi de the set.
MAKE YOUR CONTRIBUTION TO PROTECT THE
ENVIRONMENT
Used batteries wi th the ISO symbol
for recycling as well as small
accumulators (rechargeable batteries), mini-batteries
(cell s) and starter batteries should not be thrown
into the garbage can.
Please leave them at an appropriate depot.
WARNING:
Before servicing this TV receiver, read the X-RAY
RADIATION PRECAUTION, SAFETY INSTRUCTION
and PRODUCT SAFETY NOTICE.
X-RAY RADIATION PRECAUTION
1. Excessively high can produce potentially hazardous
X-RAY RADIATION. To avoid such hazards, the high
voltage must not exceed the speci fied limit. The
normal value of the high voltage of this TV receiver
is 27 KV at zero bean current (mi nimum brightness).
The high voltage must not exceed 30 KV under any
circumstances. Each time when a receiver requires
servici ng, the high voltage should be checked. The
readi ng of the high voltage is recommended to be
recorded as a part of the service record, It is
important to use an accurate and reliable high
voltage meter.
2. The only source of X-RAY RADIATION in this TV
receiver is the picture tube. For continued X-RAY
RADIATION protection, the replacement tube must be
exactly the same type as specified in the parts list.
3. Some parts in this TV receiver have special safety
related characteristics for X-RADIATION protection.
For continued safety, the parts replacement should
be under taken only after referring the PRODUCT
SAFETY NOTICE.
SAFETY INSTRUCTION
The service shoul d not be attempted by anyone
unfamiliar with the necessary i nstructions on this TV
receiver. The following are the necessary instructions
to be observed before servicing.
1. An isolation transformer shoul d be connected i n the
power li ne between the receiver and the AC line
when a service is performed on the primary of the
converter transformer of the set.
2. Comply wi th all caution and safety related provided
on the back of the cabi net, inside the cabinet, on the
chassis or picture tube.
3. To avoid a shock hazard, always discharge the
picture tube' s anode to the chassis ground before
removi ng the anode cap.
The l ightni ng flash wi th arrowhead symbol ,
within an equilateral triangle, is intended to alert
the user to the presence of uninsulated dangerous
voltage within the product s enclosure that may
be of sufficient magnitude to consti tute a risk of
electric shock to persons.
The exclamati on poi nt wi thi n an equi l ateral
tri angl e is i ntended to alert the user to the
presence of important operating and maintenance
(s erv i ci ng) i n str uct i o ns i n the l i ter atu re
accompanying the appliance.
CAUTION: TO REDUCE THE RISK OF ELECTRIC
SHOCK, DO NOT REMOVE COVER (OR BACK). NO
USER-SERVICEABLE PARTS INSIDE. REFER
SERVICING TO QUALIFIED SERVICE PERSONNEL
ONLY.
CAUTION
RI SK OF ELECTRIC SHOCK
DO NOT OPEN
1 1 0 6
- 3 -
PRODUCT SAFETY NOTICE
Many electrical and mechanical parts in this TV
receiver have special safety-related characteristics.
These characteri stics are offer passed unnoticed by
visual spection and the protecti on afforded by them
cannot necessari ly be obtained by using replacement
components rates for a higher voltage, wattage, etc.
The replacement parts which have these special
safety characteristics are identified by marks on
the schematic diagram and on the parts l ist.
Before replacing any of these components, read the
parts list in thi s manual carefully. The use of
substitute replacement parts which do not have the
same safety characteristics as speci fied in the parts
list may create shock, fire, X-RAY RADIATION or
other hazards.
Good earth ground
such as the wat er
pipe, c onduc t or ,
etc.
Pl ace this probe
on eac h e x -
pos ed met al li c
part
AC VOLTMETER
AC Leakage Curr ent Check
4. Completely discharge the high potential voltage of the
picture tube before handli ng. The pi cture tube is a
vacuum and if broken, the gl ass will explode.
5. When replacing a MAIN PCB in the cabinet, always
be certai n that all protective are installed properly
such as control knobs, adjustment covers or shields,
barri ers, isolation resistor networks etc.
6. When servicing is required, observe the original lead
dressing. Extra precaution should be gi ven to assure
correct lead dressing in the high voltage area.
7. Keep wires away from high voltage or high tempera
ture components.
8. Before returning the set to the customer, al ways
perform an AC leakage current check on the exposed
metallic parts of the cabinet, such as antennas,
terminals, screwheads, metal overlay, control shafts,
etc., to be sure the set i s safe to operate without
danger of electrical shock. Plug the AC line cord
directly to the AC outlet (do not use a line isolation
transformer during this check). Use an AC voltmeter
having 5K ohms volt sensitivity or more i n the
following manner.
Connect a 1.5K ohm 10 watt resistor paralleled by a
0.15F AC type capacitor, between a good earth
ground (water pipe, conductor etc.,) and the exposed
metallic parts, one at a ti me.
Measure the AC vol tage across the combination of
the 1.5K ohm resistor and 0.15 uF capacitor. Reverse
the AC plug at the AC outlet and repeat the AC
voltage measurements for each exposed metallic
part.
The measured voltage must not exceed 0.3V RMS.
This corresponds to 0.5mA AC. Any val ue exceeding
this limit constitutes a potential shock hazard and
must be corrected immediately.
The resistance measurement should be done
between accessi ble exposed metal parts and power
cord plug prongs with the power switch "ON". The
resi stance should be more than 6M ohms.
2 1 0 6
KAWA ELECTRONI C RESEARCH & DEVELOPMENT CENTRE
Reference No : LCT3201TD

Product Specification
CHIMEI V320B1-L01
MK8205
USA

1.1 VIDEO SECTION
Display size 32/16:9
Display Resolution 1366 X 768
Pixel Pitch 0.17025mm0.51075mm
Peak Brightness 550(nits)
Contract Ratio 1000:1, Typical (1/100 White Window, Dark Room)
View Angle Hor. And Vert. 170 degree
Color Deeps 16.7M Color (R / G/ B each 256 Scales)
PC Resolution Supporting VGA, SVGA, XGA,WXGA
HDTV Compatible 480p / 720p / 1080i
Progressive Scanning Yes
Film Mode Pull Down Yes
GAMMA Correction Yes
Color Temperature Control Yes
Comb Filter Yes
Second De-interlace for Sub picture No
Wide Mode

Normal, Full, Wide 1, Wide 2, Wide 3, 4:3, No scale and
Panoramic.
TV System NTSC M
Dual Tuner System No
AV Input Color System PAL /NTSC
PIP Basic mode (video on graphic mode,resolution1024768)
1.2 AUDIO SECTION
Audio Output Power 6W2 Max.(8 ohm)
Sound Effect Spatial Effect and Surround
Tone Control Yes
1.3 Input Terminals







D-Sub 15 Pin Type(Analog-RGB Input ) 1
D-Sub 9 Pin (RS-232)
RF (F-type Input) 1
Component Video-YPbPr 1 RCA Terminals
S-Video Input (Mini Din 4Pin) 1
Video Input RCA Terminals
Stereo Audio Input for YPbPr x 1
(3.5mm Phone Type) x 1
1.4 Output Terminals Audio Output (RCA ; L&R Type) 1

1.5 Others

Closed Caption / V-Chip Yes
Teletext No
OSD Language English, Franais, Espaol
3 1 0 6
KAWA ELECTRONI C RESEARCH & DEVELOPMENT CENTRE

Reference No : LCT3201TD





Stereo Decode MTS with SAP
Power Rating AC 100-240V, 50/60Hz
Power Consumption 220W

1.6 Support the Signal Mode
This machine can support the different from VGA signal mode in 7 kinds
























1.7 HDTV Mode (YPbPr)
Resolution
Horizontal
Frequency
(kHz)
Vertical
Frequency
(Hz)
640 x 480
31.50 60.00
37.86 72.81
800 x 600
35.16 56.25
37.90 60.32
46.90 75.00
48.08 72.19
1024 x 768 48.40 60.00
Resolution
Horizontal
Frequency
(KHz)
Vertical
Frequency
(Hz)
480i 15.734 59.94
480p(720x480) 31.468 59.94
720p(1280x720) 45.00 60.00
1080i(1920x1080) 33.75 60.00
4 1 0 6
1.8 Remote Control
Power ( ): Press to turn on and off.
Mute ( ): Press to mute the sound.
Press again or press , to restore
the sound.
CCD: Press to select the Closed
Caption mode.
V-CHIP: Press to select the child
protect mode.
MTS: Press repeatedly to cycle through
the Multi-channel TV sound (MTS)
options: Mono, Stereo and SAP
(Second Audio Program).
Favorite: Press repeatedly to cycle
through the favorite channel list.
PIP. Pos: Press to change the PIP
window position under PIP mode.
[ PIP. Size: Press to cycle through the
PIP size, such as Large, Medium,
Small.
Add/Erase: Press to add or delete
favorite channel.
PIP: Press to cycles through the
different POP or PIP modes, such as
Basic PIP, LR POP, and exit.
0~9 Number Buttons: In TV mode,
press 0~9 to select a channel; the
channel changes after 2 seconds.
In DVD mode, press 0~9 to input the
items.
Zoom: Press to zoom the image max
from 8 times to minimally 1/8 times.
Recall: Press to return to previous
channel.
P.Mode: Press repeatedly to cycle
(Continued on next page)
through the picture mode: Hi-Bright, User, Dark, Normal and Vivid.
P.Size: Press repeatedly to cycle through the picture size that best corresponds your
viewing requirements: Normal, Full, Wide1, Wide2, Wide3, 4:3, No scale, Panoramic
and Normal.
When in POP mode, it can select picture size is: Full, 4:3 and Normal.
Vol / : Press to adjust the volume.
Ch / : Press to scan through channels. To scan quickly through channels, press
and hold down either channels.
Freeze: Press to freeze the picture, press again to restore the picture.

5 1 0 6
Menu: Press to enter into the on-screen
setup menu, press again to exit.
S.Mode: Press repeatedly to cycle
through the sound mode: Normal,
News, Cinema, Flat and User.
, , , , Enter: Press , , ,
to move the on-screen cursor. To
select an item, press ENTER to
conrm. And it can also press or
to scan through channels, press
or to adjust the volume excepting
DVD mode.
System: Press repeatedly to cycle
through the system options: AUTO
and NTSC3.58.
(This button is inactive for TV, VGA,
COMPONENT input source.)
Source: Press to select the signal
source, such as TV, AV, S-Video,
Component, DVD or VGA.
Sleep: Press repeatedly until it
displays the time in minutes (5 Min,
10 Min, 15 Min, 30 Min, 60 Min, 90
Min, 120 Min and, OFF) that you
want the TV to remain on before
shutting off. To cancel sleep time,
press Sleep button repeatedly
until sleep OFF appears.
Display: Press to display the channel
information and it disappear after 3
seconds.
Play/Pause: Press to play or pause
the DVD disc.
Stop: Press to stop playing the disc.
Angle: Press to select desired viewing
angle of the Video (disc feature).
Open/Close: Press to open or close
the disc tray.
(Continued on next page)
Skip+/-: Press to skip the forward or backward.
Search+/- : Press to search the forward or backward.
DVD Menu: Press to return DVD disc menu.

6 1 0 6
DVD Info: Press to display DVD
information.
Setup: Press to display a menu.
Press it again to exit menu.
Repeat: Press repeatedly to cycle
through the options: CHAPTER,
TITLE, ALL and nothing.
Audio: Press to select desired audio
track.
Prog: Press to display the program
menu. Press it again to exit.
Sub. title: Press to select desired
DVD subtitle.
Title: Press to display to DVD disc
title.
Note: Press Ch / on the remote
control can turn on TV set from
last preview mode.
l
.

7 1 0 6
KAWA ELECTRONI C RESEARCH & DEVELOPMENT CENTRE
Reference No : LCT32ADTD




Technical Data

TV AC 100-240, 50/ 60Hz 1. Power supply
Remote control Battery 3V (UM-3/R6P/AA2)
RF input NTSC M 2. TV system
Video input PAL/NTSC 3.58
TV


VHF-L : 2~6CH
VHF-H : 7~13CH
UHF : 14~69CH
3. Receiving channels
CATV 1~125CH
4. Intermediate
frequencies
Picture 45.75MHz
5. Scanni ng Hori zontal (Hz) 15625/15750
Verti cal (Hz) 50/60
6. AC pl ug UL Pl ug
7. Panel V320B1-L01
8. Speaker Internal 8 ohm 10W (max) 2
9. Operating
temperature
Fulfill all specifications 15C ~ 30C
Accept picture/sound
reproduction
5C ~ 33C
10. Operating relative
humidity
Fulfill all specifications 45% ~ 75%
Accept picture/sound
reproduction
20% ~ 80%
11. Electrical &
optical
specification
See the attachment 1.
12. Circuit diagram
drawing No.
LCT32HAB

13. Cabinet
14. Cabinet color
15. Packing 1 set per
16. Container stuffing
method
RD/05/P/LC26HAB/CSI/02 REV: 01
17. Dimension (mm) LCD-TV 799(W) 569.7(H) 107(D)mm (w/o Stand)
(No packing) 799(W) 635.8(H) 267.5(D)mm (with Stand)
Remote control unit 183(L) 53(W) 28(T)mm
18. Net weight LCD-TV 18.8Kg (with Stand) approx.
Remote control 70g (approx.)
19. Cell Defect Subject to Panel supplier specification






8 1 0 6
KAWA ELECTRONI C RESEARCH & DEVELOPMENT CENTRE
Reference No : LCT3201TD



Attachment 1Electrical & Optical Specification
No. I tems I nstruction Typical Limit Unit
1 Video sensitivity For 30dB S/N 44 51 dBuV
2 FM sound sensitivity For 30dB S/N 21 35 dBuV
3 Color sensitivity For RF transmission 37 40 dBuV
4 CCD sensitivity

TV screen refreshes 40 times
number of mistakes8
43 50 dBuV
5 Minimum NICAM threshold Without crackline noise N/A N/A dBuV
6 Stereo Channel Separation BTSC. 18 15 dB
7
AGC static characteristic Accept. Picture/Sound repr. 90 90 dBuV
8 Selectivity Adjacent sound carrier 30 28
Below adjacent sound carrier 30 30 dB
Adjacent picture carrier 45 40
Up adjacent picture carrier 40 30
9 IF rejection 55 45 dB
10 Image rejection VHF 57 45 dB
UHF 55 40
11 AFT pull-in range 1.0 1.0 MHz
12 Chroma sync pull-in range 500 200 Hz
13 Color killer function -11 -10 dB
PAL 300 300 Lines Horizontal
NTSC 260 240 Lines
PAL 410 400 Lines
RF




Vertical

NTSC 320 300 Lines
Horizontal
450 450 Lines
14 Resolution






Video

Vertical 400 400 Lines

XW 0.295 0.2950.02 15 Color
Coordination
White

YW
Full Pattern
0.300 0.3000.02
Horizontal
16 View
Angle(Lo/3)
Vertical


170

170
Degree

17 Overscan Cross hatch signal 96 94~98 %
18 Picture position In all direction 2 3 mm
19 H sync pull-in range 400 200 Hz
20 V sync pull-in range 6 6 Hz
21 Audio frequency response 3dB ref. to 1KHz 0.15~12 0.2~12 KHz





9 1 0 6
KAWA ELECTRONI C RESEARCH & DEVELOPMENT CENTRE
Reference No : LCT3201TD




22

Max Audio Output Power 72 5.02 W
23 Audio output power
10% THD
1KHz 10% THD 62

4.02 W
24 THD Po=0.5W 0.5 3 %
25 Signal to buzz ratio coeighting 50 30 dB
26 Minimum volume hum coeighting 6 10 mVrms
27 Maximum woofer output power N/A N/A W
28 Woofer audio frequency
response
3dB ref. to 15Hz AV
mode
N/A N/A Hz
29 Tone low frequency 100Hz ref. to 1KHz
AV mode
8 3 dB
30 Tone high frequency 10KHz ref. to 1KHz
AV mode
8 3 dB
31 Balance Center 0 2
Max. 3 >2 dB
Min. -35 -30

32 Video input level 1.0 10.3 Vpp
33 Audio input level*1 1.0 * 0.50.3 Vrms
34 Video output level N/A N/A Vrms
35 Audio output level*2 0.3 * 0.50.3 Vrms
36 AV Audio input max. level 2 2 Vrms
37 AV Audio output L/R
Separation
35 30 dB
Operating 200 200 W 38 Power consumpution
Stand by 3 5 W
39 IR receiving distance 0 Degree 7 6 m
left/right 60 45 Degree 40

IR receiving
angle
Up/down
5m

20 15 Degree
41 Dielectric strength DC 3KV 1min. 5 10 mArms
42 The vibration noise from
electromagnetic devices in LCD-
TV set
The distance between
the tester and the
LCD-TV set is four
times as many as the
screen height
No obvious vibration noise can be
heard





1 0 1 0 6
KAWA ELECTRONI C RESEARCH & DEVELOPMENT CENTRE

Reference No : LCT3201TD



Test Condition
All tests shall be performed under the following conditions unless otherwise specified
1 Picture Modulation 87.5%
2 Sound Modulation

27KHz Dev. For DK/I/BG
15KHz Dev. For M/N
3 Picture to Sound Ratio 10dB
4 Sound Artificial Load
Resistor
8 ohm

5
Video signal
Stair and Special
6 Audio signal 1KHz sine wave 0.5Vrms
7 Other conditions:
A. Switch LCD-TV on and let it warm up for more than 30 minutes.
Viewing distance: 3H (H: Panel High) in front of LCD, about 2M.
Ambient light: 0.1 cd/ m
2

B. Brightness, Contrast, Saturation, Tint, sharpness set at normal.
C. Connect RMS volt meter to speaker terminals and adjust the LCD volume to get 500mW RMS
power at each terminals.
D. With image sticking protection of LCD module. The luminance will descend by time on a same
still screen and rapidly go down in 5 minutes, when measuring the color tracking and luminance
of a same still screen, be sure to accomplish the measurement in one minute to ensure its
accuracy.
E. Due to the structure of LCD module. The extra-high-bright same screen should not hold over 5
minutes for fear of branding on the panel.
F. RF test point: Video output.
8 Note:
*(1) Now this project cannot fit the limited spec. the typical audio input level is 1.0 Vrms,
*(2) The audio out level is controlled by the volume level, the range is from 0 to 0.5Vrms.


1 1 1 0 6
DVD player's spec. For LCD-TV Combo
Division Section Remarks
name AKAI
Marketing Area( setup default language) USA
Power supply +5v,+3.3v
Power Consumption 15W
Manufactruer of Loader mechanism Foryou DL06-LS
Opitical Pick UP Sanyo HD-62/65
Chipset used MTK 1389FE
Playback Playable Media Type Playable Disc Type: DVD, CD,
Disc Type Playable Disc Type DVD(Single/ Dual layer, Double sided), CD
Disc Size 8cm/12cm
Regional code Regional 1
NTSC/ PAL Disc playback O/O
Video Video output signal NTSC
Video DAC 27MHz/ 10bit
Audio Audio DAC 48Khz/ 96KHz/24-bit:selectable
Dynamic range Present
Dolby digital decoder Present
DTS decoder optional
SRS +TruSurround for 2 channel Not present
3D Virtual surround for 2 channel Not present
Playback Fast forward/backward x2,x4,x8,x16,x32
Features Slow motion forward x1/2,x1/4,x1/8,x1/16
Slow motion backward optional
Still picture Present
Frame by frame forward/reverse Forward only (Step function)
Skip forward/reverse Present
Repeat function Present
DVD closed caption Present
Transition Effect for picture CD Not present
Rotation of picture for picture CDs Present
Last Memory Present
Display Graphical user interface Not present
user OSD Language 3 (ENG is base ,SPA and French)
operation Subtitle Present
Screen saver Present
Resume play Present
Program function Present
PBC ON/OFF Default on PCB
Parental lock Passward : 0000
Picture mode selector 16:9, 4:3 LB, 4:3 PS(4:3 PS as default)
Intro scan Not present
Digest in VCD Present, only for PIC CD
Time search Present
Multi angle Present
Selectable audio language streams Present
kalaoke function x
Front Panel VFD/ LED x
No. of keys 3(Open/Close, Play, Stop)
Rear Panel Composite Video output x
Component Video output x
Progressive scan output (480P) Present
2 channel audio output Present
Coaxial audio output Present
General
DVD Module
1 2 1 0 6
LCD COMBO Connection
L



R

PWM
On/Off

PWM

+24V
+24V
+5V +5V STB
+5V IR2 +12V

Y/Pb/Pr (480p)
L/R



Turner+Amp



Main board

Panel

Backlight

Power board
DVD
Key Board
IR1
Key Board
LVDS1
1 1 0 6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Inverter_PWR
PWR_GND
Inverter_PWR
Inverter_PWR
BL_ON/OFF
Dimming
BL_ON/OFF
Dimming
INVERTER_PWR
PWR_GND
PWR_GND
Dimming
BL_ON/OFF
Title
Size Document Number Rev
Date: Sheet o f
<Doc> <RevCode>
<Title>
A
1 2 Wednesday, August 24, 2005
PANEL INVERTER POWER
H1
HOLE/GND
2
2
3
3
4
4
5
5
9
9
8
8
7
7
6
6
1
1
FB9
120R
J2
8x1 W/HOUSING
SIP6\2.54
1
2
3
4
5
6
+ CE1
470uF/50v
FB6
120R
FB1
120R
1206
C1
0.1uF
FB5
120R
FB7
120R
C2
0.1uF
H5
HOLE/GND
2
2
3
3
4
4
5
5
9
9
8
8
7
7
6
6
1
1
C3
0.1uF
H2
HOLE/GND
2
2
3
3
4
4
5
5
9
9
8
8
7
7
6
6
1
1
FB8
120R
H3
HOLE/GND
2
2
3
3
4
4
5
5
9
9
8
8
7
7
6
6
1
1
FB2
120R
1206
R
.

A
N
G
L
E
J3
10x1 W/HOUSING R.A.
SIP10\2
1
2
3
4
5
6
7
8
9
10
H4
HOLE/GND
2
2
3
3
4
4
5
5
9
9
8
8
7
7
6
6
1
1
+ CE2
470uF/50v
R
.

A
N
G
L
E
J1
12x1 W/HOUSING R.A
SIP12\2
1
2
3
4
5
6
7
8
9
10
11
12
1 4 1 0 6
1 1 0 6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RED_GND
BLU_GND
GRN_GND
VGA_SDA
VGA_PWR
VGA_SCL
RED
GREEN
BLUE HSYNC#
VSYNC#
RSRXD
RSTXD
VGA_R
VGA_L
SY_GND1
SC_IN
SC_GND1
SY_IN
YPBPR1/R
YPBPR1/L
AV1_IN
AV_L
AV_R
Y1_INB
Y1_GNDB
CB1_INB
CB1_GNDB
CR1_INB
CR1_GNDB
BL_ON/OFF
Dimming
RSTXD
RED
RED_GND
VGA_L
RSRXD
BLU_GND
VGA_PWR
BLUE
GREEN
GRN_GND
VGA_SDA
HSYNC# VSYNC#
VGA_SCL
VGA_R
Dimming BL_ON/OFF
AV_L
YPBPR1/L
CR1_INB
CB1_GNDB Y1_GNDB
SC_GND1
SY_GND1
SC_IN
AV1_IN
CR1_GNDB
Y1_INB
YPBPR1/R
CB1_INB
SY_IN
AV_R
Dimming
BL_ON/OFF
Title
Size Document Number Rev
Date: Sheet o f
<Doc> <RevCode>
<Title>
A
2 2 Wednesday, August 24, 2005
DIGITAL GND AUIO IN/OUT GND ANALOG INPUT GND
J8
RCA1X3
RCA3/6P/DIP
1
2
3
4
5
6
J5
PC CONNECTOR
DIP14X2/P2.54/R2
2
4
6
8
10
12
14
16
18
20
22
24
1
3
5
7
9
11
13
15
17
19
21
23
25 26
27 28
FB3
120R
J7
DSUB15/DIP/F
DB15
1
6
1
7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
J11
RCA1X3
RCA3/6P/DIP
1
2
3
4
5
6
FB4
120R
J6
CON\SVHS
2
1
3
4
5
6
7
R
L J4
VGA AUDIO
PHONEJACK/DIP
1
2
3
4
G
K
1
K
2
K
3
K
4
K
5
J10
RCA1X2
RCA2/4P/DIP
1
2
3
4
J9
VIDEO CONNECTOR
DIP10X2/P2.54/R2
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
1 5 1 0 6
1 1 0 6
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
RGB OUTPUT FOR DEBUGGI NG
CRT OUT
Opt i nal f or 12V pannel . Added by bi n_wang 16/ 7/ 05
Back Light circuit
FOR CHI-MEI INVERTER
CONNECTOR
Add LVDS VCC cont r ol by Zheng_guo 15/ 9/ 05.
ORO1 High :LVDSVDD POWER OFF
ORO1 LOW :LVDSVDD POWER ON
ORO3 High :PANEL BACKLIGHT POWER OFF
ORO3 LOW :PANEL BACKLIGHT POWER ON
LVDS/CRT/BACKLIGHT CONTROL V0.1
MiCO LCD TV - MediaTek MT8203 Solution
C
1 10 Wednesday, September 28, 2005
Title
Size Doc Number Rev
Date: Sheet of
MiCO Confidential
GND
GND
GND
R
B
G
AP[0..7]
AN[0..7]
R
G
B
VSYNC
HSYNC
CLK1+
CLK1-
CLK2-
CLK2+
AN0
AP0
AN1
AP1
CLK1-
AN2
AP2
AN4
CLK1+
AP4
AN3
AN5
AP5
AP3
CLK2-
CLK2+
AN6
AN7
AP7
AP6
+12V
BL_ON/OFF
PWM0
BL_ON/OFF
ORO3
Dimming
ORO3
PWM0
Dimming
VSYNC
HSYNC
ORO1
ORO1
LVDSVDD
AP[0..7] 3
AN[0..7] 3
+12V 1
CLK1+ 3
CLK1- 3
CLK2+ 3
CLK2- 3
G 3
R 3
B 3
VSYNC 3
HSYNC 3
Dimming 6
BL_ON/OFF 6
ORO3 3
PWM0 3
ORO1 3
VCC +12V
VCC
VCC
+12V
R3
75 1%
R211
2k
R4 0
R
+ CE1
330uF/25v
C330UF25V/D8H14
C3
0.1uF
VS
C1
0.1uF
Q9
IR7314
SOP8
1
2
3
4 5
6
7
8
S1
G1
S2
G2 D2
D2
D1
D1
G
Q2
2N3904
SOT23
1
2
3
+CE3
220uF/16v
HS
B
R9
4.7k
R7
4.7k
F1
4A/32v
1206
R210
22k
R209
22k
R2
75 1%
R6
100k
+ CE2
220uF/16v
J1
FI-SE30P-HF
LVDS/30P/P1.25/S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
C2
0.1uF
R1
75 1%
R8
10k
FB2
75R/NC
0805
FB1
75R
0805
R5
10k
Q10
2N3904
1
2
3
Q1
2N3904
SOT23
1
2
3
1 6 1 0 6
1 1 0 6
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
FROM Tuner
OUTPUT
I NPUT
AF Path
MODI FI ED BY BI N_WANG 16/ 7/ 05.
ATTENTI ON: WHEN PCB LAYOUT, MUST NEAR VGA I NPUT PORT! BI N_WANG. 16/ 7/ 05
Change.
Change.
AV IN V0.1
MiCO LCD TV - MediaTek MT8203 Solution
C
2 10 Thursday, September 15, 2005
Title
Size Doc Number Rev
Date: Sheet of
MiCO Confidential
CVBS1+
CVBS1-
BLUE
RED
GREEN
CB-
CB+
CR+
Y-
Y+
CR-
RED+
BLUE+
GREEN-
RED-
GREEN+
BLUE-
SY-
SY+
SC-
SC+
CVBS0+
CVBS0-
CVBS1+
CVBS1-
CVBS0
AF1_OUT
SIF1_OUT
MPX1
MPX2
VGASOG
GRN_GND
BLU_GND
RED_GND
Y
CR
CB
SOY
SC+
SC-
SY-
SC
SY
Y
SY+
BLUE+
GREEN-
BLUE-
RED+
RED-
CB_GND
CVBS0_GND
CVBS1
CVBS1_GND
Y_GND
Y_GND
CB_GND
CR_GND
SY
SY_GND
SC
SC_GND
AF1_OUT
CB+
CB-
CR+
Y+
CR-
Y-
MPX2
MPX1
VGASOG
CVBS1
SY_GND
CVBS0_GND
CVBS0+ CVBS0
CVBS0-
RED_GND
BLUE
GREEN
CR_GND
SC_GND
GREEN+
RED
CVBS1_GND
CB
CR
SIF1_OUT
GRN_GND
BLU_GND
RED 6
GREEN 6
BLUE 6
CB+ 3
CB- 3
CR+ 3
CR- 3
Y- 3
Y+ 3
BLUE+ 3
GREEN- 3
RED+ 3
RED- 3
GREEN+ 3
BLUE- 3
SY- 3
SY+ 3
SC- 3
SC+ 3
CVBS0+ 3
CVBS0- 3
CVBS1+ 3
CVBS1- 3
CVBS0 7
AF1_OUT 7
SIF1_OUT 7
MPX2 3
MPX1 3
VGASOG 3
BLU_GND 6
GRN_GND 6
RED_GND 6
CR 7
CB 7
Y 7
SOY 3,7
CVBS0_GND 7
CVBS1 7
CVBS1_GND 7
Y_GND 7
CB_GND 7
CR_GND 7
SY 7
SY_GND 7
SC_GND 7
SC 7
R16
100
C18
47nF
FB4
70R
C6
15pF
C17
15pF
R11
100
R49 68
C32
5pF
R35 8.2K
C30
15pF
C16
47nF
C12
15pF
R31
22
C36
5pF
C9
47nF
C29
15pF
C23
15pF/NC
R42 68
R46 68
R15
56
C39
5pF
C4
47nF
R17
0
C24
15pF/NC
C34
4.7nF
+
CE5
47uF/16v
C5
47nF
C14
47nF
R24
100
C37
47nF
C26
47nF/NC
FB8
70R
C10
47nF
R29
100
C35
47nF
C33
47nF
C21
47nF
C31
47nF
C11
47nF
C13
330pF
R40 39k
C38
47nF
R12 18
R44 100
C28
47nF
R48 100
+
CE4
47uF/16v /NC
C15
47nF
FB6
70R
C7
330pF
C25
47nF
C8
47nF
C20
330pF
C19
47nF
R21
22
C27
330pF
C40
47nF
C22
47nF
R19
100
R37
22
R51 100
R41 39k
R13
22
R27
100
1 7 1 0 6
1 1 0 6
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Modi f i ed by MI CO.
VGA IN & PC AUDIO IN V0.1
MiCO LCD TV - MediaTek MT8203 Solution
B
3 10 Thursday, September 15, 2005
Title
Size Doc Number Rev
Date: Sheet of
MiCO Confidential
VGASDA
BLU_GND
HSYNC_VGA
GRN_GND
VGAVSYNC#
RED_GND
VGASDA
VGA_PLUGPWR
VGA_PLUGPWR VGA_PWR
VGA_IN_L
VGA_IN_R
VGASDA
VGASCL
VGA_SDA
VGA_SCL
VGA_R
BLUE
RED
GREEN
VGA_L VGA_IN_L
VGA_IN_R
VGASCL
VGASCL
VGAVSYNC# VSYNC#
HSYNC# HSYNC_VGA
GND
RED
BLU_GND
VGA_PWR
VGA_SDA
HSYNC# VSYNC#
VGA_SCL
VGA_R
RSTXD
RSRXD
TXD
RXD
TXD
RXD
Dimming BL_ON/OFF
RED_GND
BLUE
RSTXD
GREEN
GRN_GND
VGA_L
RSRXD
BL_ON/OFF
Dimming
BLU_GND 8
RED_GND 8
VGAVSYNC# 3
HSYNC_VGA 3
GRN_GND 8
VGASDA 3
VGA_IN_R 10
VGA_IN_L 10
RED 8
GREEN 8
BLUE 8
VGASCL 3
TXD 3
RXD 3
Dimming 9
BL_ON/OFF 9
VCC
VGA_PLUGPWR
VGA_PLUGPWR
+5V
+5V
C47
100pF
R54 15K
R55 15K
D1
DIODE SMD
1N4148/SMD
R56
75K
C48
5pF
R57
75K
FB9
70R
0603
U1
MAX232A
13
8
11
10
1
3
4
5
2
6
12
9
14
7
16
15
R1IN
R2IN
T1IN
T2IN
C+
C1-
C2+
C2-
V+
V-
R1OUT
R2OUT
T1OUT
T2OUT
VCC
GND
R53
4.7k
D2
DIODE SMD
1N4148/SMD
J2
PC CONNECTOR
DIP14X2/P2.54/R1
2
4
6
8
10
12
14
16
18
20
22
24
1
3
5
7
9
11
13
15
17
19
21
23
25 26
27 28
FB10
70R
0603
C41 0.1uF
C45
0.1uF
C43
0.1uF
R58
2.2k
C44 0.1uF
C42 0.1uF
R60 33
R52
4.7k
C46 0.1uF
R61
2.2k
R59 33
U2
EEPROM 24C02
1
2
3
4 5
6
7
8
NC
NC
NC
GND SDA
SCL
WP
VCC
1 8 1 0 6
1 1 0 6
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
TSOP 48 pi n
VREF DECOUPLING
Modi f i ed by BI N_WANG.
DDR MEMORY & FLASH V0.1
MiCO LCD TV - MediaTek MT8203 Solution
C
4 10 Thursday, September 15, 2005
Title
Size Doc Number Rev
Date: Sheet of
MiCO Confidential
F_D[0..7]
VREF
F_D3
F_A14
F_A20
F_A17
F_A2
F_A3
F_A9
F_A11
F_A7
F_A12
F_A21
IOWR#
F_D4
F_A8
F_A0
F_A5
F_D6
F_D1
F_A13
F_A10
F_A6
F_A18
F_A1
F_D2
F_D5
F_A16
F_A15
F_A19
IOCE#
F_OE#
F_D0
F_D7
F_A[0..21]
FLASHVCC
SDV25
SDV25
SDV25
D_DQ14
D_RA6
A_DQ8
D_RA4
D_DQS1
A_RA5
D_RA8
D_RA3
D_DQ3
D_DQ8
D_DQ13
D_DQ1
A_RA2
D_RA9
A_DQ4
D_DQ8
D_DQM0
D_DQ6
D_RA5
D_DQ15
A_RA4
D_CKE
A_DQ13
A_DQ3
D_DQ6
D_RA2
D_RA3
D_DQ15
D_DQ4
D_RA7
D_DQ5
D_DQ14
D_DQ0
A_RA8
A_RA6
A_DQ0
D_DQ5
A_DQ15
D_DQ11
A_DQ10
D_CS#
D_DQ7
D_DQ13
D_RA1
A_RA9
D_DQ4
D_CAS#
D_RAS#
A_DQ6
D_RA11
D_RA2
D_RA8
A_DQ12
A_DQ9
D_DQ12
D_RA0
A_RA11
D_RA4
D_WE#
D_DQ12
D_CLK
D_DQ11
D_DQ2
D_RA10
A_DQ5
D_RA1
D_BA0
D_RA7
D_BA1
D_DQ2
A_DQ11
D_DQ10
D_RA6
A_RA7
D_RA9
D_CLK#
D_DQ10
D_DQM0
D_DQS0
D_DQ1
D_DQ9
D_RA5
D_DQ0
A_DQ7
D_DQ9
D_DQ3
D_RA11
D_RA0
D_DQ7
D_RA2
D_DQ6
D_DQ12
D_DQ11
D_BA1
D_CAS#
D_RA1
D_DQ3
D_DQM0
D_RA7
D_DQ5
D_RA0
D_RA5
D_RA4
D_WE#
D_RAS#
D_RA6
D_RA11
D_DQ1
D_DQ13
D_DQS0
D_DQ14
D_RA8
D_DQ15
D_RA3
D_CS#
D_DQ7
D_DQ4
D_RA10
D_DQ2
D_DQ8
D_DQ10
D_BA0
D_DQ9
D_DQ0
D_RA9
IOCE#
IOWR#
D_DQS1
A_DQ1
A_DQ2
F_A4
A_DQ14
F_OE#
SDV25
VREF
VREF
VREF
VREF
D_RA10
A_RA1
A_RA10
A_RA0
A_RA3
D1V25
D1V25
D1V25
VREF
D_DQ17
D_DQ20
D_DQ24
D_DQ22
D_DQ23
D_DQ25
D_DQ26
D_DQ31
D_DQ18
D_DQ27
D_DQ28
D_DQ29
D_DQ19
D_DQ16
D_DQ30
D_DQ21
D_DQM1
D_DQS3
D_DQM1
D_DQS2
D_CS#
D_BA1
D_CAS#
D_WE#
D_RAS#
D_CLK
D_BA0
D_CKE
D_RA7
D_CLK#
D_RA3
D_RA2
D_RA1
D_RA0
D_RA6
D_RA5
D_RA4
D_RA9
D_RA8
D_RA11
D_RA10
D_DQ18
D_DQ17
D_DQ16
D_DQ19
D_DQ23
D_DQ20
D_DQ22
D_DQ21
D_DQ26
D_DQ27
D_DQ25
D_DQ24
D_DQ28
D_DQ30
D_DQ31
D_DQ29
D_DQS2
D_DQS3
D_DQM1
A_RAS#
A_WE#
A_CAS#
A_CS# D_CS#
D_RAS#
D_CAS#
D_WE#
D_DQS2
A_DQS0
D_DQS3
D_DQM0
D_DQS0
A_DQS2
A_DQS3
D_BA1
D_BA0
A_CLK
D_DQM1
D_CKE
A_DQS1
D_CLK
D_DQS1
D_CLK# A_CLK#
A_DQM0
A_CKE
A_DQM1
A_BA1
A_BA0
D_DQ17
D_DQ18
D_DQ19
D_DQ16
A_DQ19
A_DQ17
A_DQ16
A_DQ18
D_DQ22
D_DQ21
D_DQ23
D_DQ20
A_DQ21
A_DQ22
A_DQ20
A_DQ23
D_DQ25
D_DQ26
D_DQ27
D_DQ24
A_DQ25
A_DQ26
A_DQ24
A_DQ27
D_DQ29
D_DQ30
D_DQ31
D_DQ28
A_DQ29
A_DQ30
A_DQ31
A_DQ28
SDV25
F_OE#
A_DQS[0..3]
A_RA[0..11]
A_BA[0..1]
A_CLK
A_CLK#
A_CKE
A_RAS#
A_CS#
A_WE#
A_CAS#
A_DQM[0..1]
A_DQ[0..31]
F_A[0..21]
F_D[0..7]
SDV25
F_D[0..7] 3
VREF 3
F_A[0..21] 3
IOCE# 3
IOWR# 3
F_OE# 3
A_RA[0..11] 3
A_BA[0..1] 3
A_CLK 3
A_CKE 3
A_RAS# 3
A_CS# 3
A_WE# 3
A_CAS# 3
A_DQM[0..1] 3
A_DQ[0..31] 3
F_D[0..7] 3
F_OE# 3
A_DQS[0..3] 3
A_CLK# 3
SDV25 3
F_A[0..21] 3
DV33A
DV33A
DV33A
SDV25
DV33A
D1V25
SDV25
VREF
SDV25
VREF
SDV25
SDV25 SDV25
D1V25
D1V25
VCC
SDV25 SDV25
R65 47
R64 75
R204 75
C89
3300pF
C54
0.1uF
RN16
22x4
1 2
3 4
5 6
7 8
C76
0.1uF
C91
3300pF
RN30
75x4
1 2
3 4
5 6
7 8
C82
0.1uF
RN11
47x4
1 2
3 4
5 6
7 8
C63
3300pF
C195
0.1uF
C212
0.1uF
C205
3300pF
C72
0.1uF
C59
3300pF
R74 75
C56
0.1uF
RN26
47x4
1 2
3 4
5 6
7 8
R78 75
C201
3300pF
R201 47
C71
0.1uF
R69 4.7k
+ CE10
220uF/16v
R206 22
8M x 16
DDR
U16
M13S128168 8Mx16-6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
NC
VDDQ
LDQS
NC
VDD
DNU
LDM
WE
CAS
RAS
CS
NC
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD
VSS
DQ15
VSSQ
DQ14
DQ13
VDDQ
DQ12
DQ11
VSSQ
DQ10
DQ9
VDDQ
DQ8
NC
VSSQ
UDQS
NC
VREF
VSS
UDM
CK
CK
CKE
NC
A12
A11
A9
A8
A7
A6
A5
A4
VSS
C66
0.1uF
VREF
U3
MX29LV800BT
25
24
23
22
21
20
19
18
8
9
28
47
16
29
31
33
35
7
26
38
40
42
44
30
32
10
36
39
41
43
45
37
27 11
15
34
46
6
4
5
3
2
1
48
17 13
12
14
A0
A1
A2
A3
A4
A5
A6
A7
A8
A19
OE
BYTE
A18
D0
D1
D2
D3
A9
CE
D4
D5
D6
D7
D8
D9
A20
D11
D12
D13
D14
D15
VCC
GND1 WE
RY/BY
D10
GND2
A10
A12
A11
A13
A14
A15
A16
A17 NC
RESET
WP/ACC
C81
0.1uF
RN24
47x4
1 2
3 4
5 6
7 8
+ CE6
220uF/16v
C197
0.1uF
RN27
47x4
1 2
3 4
5 6
7 8
C99
3300pF
C211
0.1uF
C80
0.1uF
RN9
47x4
1 2
3 4
5 6
7 8
C200
3300pF
RN29
47x4
1 2
3 4
5 6
7 8
C51
0.1uF
R77 22
C98
0.1uF
RN14
47x4
1 2
3 4
5 6
7 8
C58
3300pF
R71 22
RN12
75x4
1 2
3 4
5 6
7 8
C50
0.1uF
C199
0.1uF
C202
3300pF
RN25
75x4
1 2
3 4
5 6
7 8
C70
0.1uF
+ CE12
220uF/16v
C90
3300pF
RN10
75x4
1 2
3 4
5 6
7 8
C84
0.1uF
RN7
22x4
1 2
3 4
5 6
7 8
C86
3300pF
R63
10k
C209
0.1uF
R70 75
C60
3300pF
RN31
75x4
1 2
3 4
5 6
7 8
C79
0.1uF
+ CE11
220uF/16v
C203
3300pF
C55
0.1uF
R76 75
C61
3300pF
C93
0.1uF
C192
0.1uF
C69
0.1uF
R202 47
C95
0.1uF
C49
0.1uF
C198
0.1uF
C210
0.1uF
C216
0.1uF
C68
0.1uF
R62
10k
C204
3300pF
RN13
47x4
1 2
3 4
5 6
7 8
C207
3300pF
C78
0.1uF
C65
3300pF
C85
3300pF
C94
0.1uF
R68 22
C52
0.1uF
C53
0.1uF
C67
0.1uF
R75 22
U5
IC LP2996 DDR Termination SOP8
2
1
3
4 5
6
7
8
SD
GND
VSENSE
VREF VDDQ
AVIN
PVIN
VTT
C193
0.1uF
C100
3300pF
C217
0.1uF
C215
0.1uF
C62
3300pF
C208
0.1uF
RN1
75x4
1 2
3 4
5 6
7 8
C214
0.1uF
R73 22 C77
0.1uF
RN4
22x4
1 2
3 4
5 6
7 8
C87
3300pF
RN2
75x4
1 2
3 4
5 6
7 8
+ CE8
47uF/16v
RN15
75x4
1 2
3 4
5 6
7 8
C96
0.1uF
RN6
75x4
1 2
3 4
5 6
7 8
C64
3300pF
C206
3300pF
R67 22
R205 75
C88
3300pF
R66 47
C73
0.1uF
C194
0.1uF
RN5
22x4
1 2
3 4
5 6
7 8
C97
0.1uF
R72 75
C74
0.1uF
C218
0.1uF
R203 75
+ CE7
C270UF16V/D10H12
C57
0.1uF
C75
0.1uF
U6 CM1117-2.5V
SOT223
3
1
2
4
IN
A
D
J
/G
N
D
OUT
OUT
RN8
75x4
1 2
3 4
5 6
7 8 8M x 16
DDR
U4
M13S128168 8Mx16-6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
NC
VDDQ
LDQS
NC
VDD
DNU
LDM
WE
CAS
RAS
CS
NC
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD
VSS
DQ15
VSSQ
DQ14
DQ13
VDDQ
DQ12
DQ11
VSSQ
DQ10
DQ9
VDDQ
DQ8
NC
VSSQ
UDQS
NC
VREF
VSS
UDM
CK
CK
CKE
NC
A12
A11
A9
A8
A7
A6
A5
A4
VSS
C92
3300pF
C83
0.1uF
C196
0.1uF
C213
0.1uF
+ CE9
220uF/16v
RN28
75x4
1 2
3 4
5 6
7 8
RN3
75x4
1 2
3 4
5 6
7 8
1 9 1 0 6
1 1 0 6
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Rdown
110 1%
Note for Fix or Adj Regulator
180 1%
0 ohm
AZ1117
Rup
FOR DACVDD
Fix regulator
Adj regulator
OFF
Vout
1. 25x( 1+180/ 110) =3. 3V
FOR ADCVDD
MT8203 ANALOG&DIGITAL DECOUPLING
1.25x(1+Rdown/Rup)
0603 PUT ON NEARLY BGA
0603 PUT ON NEARLY BGA
0603 PUT ON NEARLY BGA
ADCVDD4
VFEVDD1
P1- V5
ADDED BASE ON P1V5 COMMON BOARD BY BI N_WANG 16/ 7/ 05.
MT8203 ANALOG&DIGIT DECOUPLE V0.1
MiCO LCD TV - MediaTek MT8203 Solution
C
5 10 Thursday, September 15, 2005
Title
Size Doc Number Rev
Date: Sheet of
MiCO Confidential
AV33 DACVDD
DACVDD
DACVDD
GND
VICM
VOCM
GND
ADCVDD
PWM2VREF
DACFS
GND
DACVREF
VPLLVDD
VPLLVDD
GND REXTA
AUXTOP
AUXBOTTOM
ADCPLLVDD
ANALOGVDD
XTALO XTALI
ADCPLLVDD1 DV18A
ADCPLLVDD1
ADCPLLVDD
APLLVDD
APLL_CAP
XTALI
XTALO
APLLVDD
VPLLVDD
REXTA
AUXTOP
AUXBOTTOM
LVDDA
PWM2VREF
ADCVDD
ADCVDD0
DACVDD
AVCM
VOCM
VICM
VREFN4
VREFP4
DACVREF
DACFS
VPLLVDD
ANALOGVDD
GND
GND
AVCM
AV33
GND
GND
GND
VREFN4
GND
VREFP4
LVDDA
ADCVDD0
LVDDA
AV33 LVDDA
LVDDA
APLL_CAP
ANALOGVDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DV18A
ADCVDD0
ADC_VDD ADCVDD0
ADCVDD0
ADCVDD0
GND
GND
GND
GND
GND
GND
GND
ADCVDD4
ADCVDD0
ADCVDD4
ADCVDD4
ANALOGVDD
ADCPLLVDD1 3
ADCPLLVDD 3
APLLVDD 3
APLL_CAP 3
XTALI 3
XTALO 3
VPLLVDD 3
REXTA 3
AUXTOP 3
AUXBOTTOM 3
LVDDA 3
PWM2VREF 3
ADCVDD 3
ADCVDD0 3
DACVDD 3
AVCM 3
VOCM 3
VICM 3
VREFN4 3
VREFP4 3
DACVREF 3
DACFS 3
ANALOGVDD 3
ADCVDD4 3
AV33
VCC ADC_VDD
AV33
DV33A
DV18A
AV33
DV33A
DV18A
ADC_VDD
C159
0.1uF
C0603
FB19 70R
R80
560
C132
0.1uF
C0603
C148
0.1uF
C0603
FB18
70R
R85
50
C152
0.1uF
C0603
FB14
75R
0805
FB11
70R
0603
+ CE23
47uF/16v
+
CE18
10uF/25v
R79
100k
C138
0.1uF
C0603
C120
1500pF
C0603
C160
0.1uF
C0603
FB13
70R
0603
C128
4.7uF
C0603
FB15
70R
0603
C142
4.7uF
C0603
+ CE16
47uF/16v
C162
0.1uF
C0603
C105
33pF
C103
0.1uF/NC
C0603
Y1
27MHz
C110
0.1uF
C140
0.1uF
C136
0.1uF
C0603
C161
0.1uF
C0603
U7 CM1117-3.3V
SOT223
1
2 3
4
A
D
J
/G
N
D
OUT IN
OUT
C125
0.1uF
+ CE21
10uF/50v
C121
0.1uF
C0603
TP2
C163
0.1uF
C0603
C123
0.1uF
C0603
+ CE15
22uF/25v
C141
0.1uF
C122
4.7uF
C0603
C113
4.7uF
C0603
+
CE22
47uF/16v
FB16
70R
0603
C124
0.1uF
C0603
C134
0.1uF
C0603
C164
3300pF
C0603
+ CE24
47uF/16v
C146
4.7uF
C0603
C127
0.1uF
C112
0.1uF
C0603
C117
0.1uF
C0603
C107
0.1uF
C0603
+ CE19
100uF/16v
+
CE13
10uF/50v
C131
0.1uF
FB17
75R
0805
C154
4.7uF
C0603
C119
0.1uF
C0603
C155
0.1uF
C0603
C115
0.1uF
C0603
C118
4.7uF
C0603
C149
0.01uF
C0603
C114
4.7uF
C0603
C102
0.1uF
C0603
C108
4.7uF
C0603
TP1
R83
3.3k
C106
4.7uF
C0603
C101
4.7uF
C0603
C111
4.7uF
C0603
C165
3300pF
C0603
C137
4.7uF
C0603
C144
4.7uF
C0603
C116
4.7uF
C0603
C157
0.1uF
C0603
C129
0.1uF
C0603
C109
0.1uF
C139
0.1uF
C0603
C104
33pF
R84
50
C143
0.1uF
C0603
FB20
70R
0603
C166
3300pF
C0603
FB12
70R
0603
C147
4.7uF
C0603
C145
0.1uF
C0603
C150
3300pF
C0603
C130
0.1uF
C0603
+ CE20
220uF/16v
+ CE17
22uF/25v
C158
0.1uF
C0603
R81
0
C153
0.1uF
R82
0
C135
0.1uF
C156
4.7uF
C0603
C167
3300pF
C0603
C126
0.1uF
C151
0.1uF
C0603
C133
4.7uF
C0603
+
CE14
10uF/50v
2 0 1 0 6
1 0 6
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
UP3_4 FOR S/W SCL
UP3_5 FOR S/W SDA
MT8205 PBGA 388 V0.1
MiCO LCD TV - MediaTek MT8203 Solution
C
6 10 Thursday, September 15, 2005
Title
Size Doc Number Rev
Date: Sheet of
MiCO Confidential
A_CLK
A_WE#
VREF
A_CKE
A_CLK#
A_CAS#
SDV25
A_CS#
A_RAS#
F_A[0..21]
F_D[0..7]
VSYNC
HSYNC
VGASDA
GREEN-
BLUE+
BLUE-
RED+
VGASOG
RED-
VGASCL
VGAVSYNC#
Y-
SY+
CB-
SC-
CVBS0-
Y+
CB+
SC+
CR-
SY-
CR+
CVBS0+
AP[0..7]
AN[0..7]
CLK2-
CLK1-
CLK2+
CLK1+
DACLRC
SCL
DACMCLK
SDA
DOUT
DACBCLK
SOY
CVBS1-
CVBS1+
MPX1
MPX2
URST#
DACVREF
DACFS
LVDDA
DACVDD
VREFN4
VREFP4
AVCM
VOCM
VICM
ADCVDD0
REXTA
APLL_CAP
XTALO
ADCPLLVDD1
ADCPLLVDD
VPLLVDD
APLLVDD
PWM2VREF
AUXTOP
AUXBOTTOM
ADCVDD
GND
OBO7
GND
O
B
O
4
OBO5
OBO6
MPX2
ADCVDD4
DACVREF
VREFN4
GND
VREFP4
GND
AUXTOP
GND
ADCVDD
VPLLVDD
AUXBOTTOM
VPLLVDD
GND
REXTA
LVDDA
VPLLVDD
GND
CLK2+
AP7
AN7
AP6
GND
CLK2-
AN6
AP5
AP4
AN4
AN5
LVDDA
AP2
GND
CLK1+
AN3
AP3
CLK1-
HSYNC
LVDDA
AN2
DACVDD
AP0
AN0
DV33A
AP1
VSYNC
DACVDD
GND
GND
DACVDD
AN1
GND
DACFS
D
V
3
3
A
F
_
A
1
6
F
_
A
1
7
F
_
A
7
F
_
A
6
G
N
D
F
_
A
1
9
F
_
A
2
0
F
_
A
1
8
G
N
D
D
V
1
8
A
F
_
A
1
5
F
_
A
1
4
G
N
D
O
B
O
2
F
_
D
5
O
B
O
0
F
_
A
8
D
V
1
8
A
F
_
A
1
0
F
_
D
3
O
B
O
3
O
B
O
1
F
_
D
1
F
_
A
1
2
F
_
D
6
F
_
A
1
3
G
N
D F
_
A
9
F
_
D
7
F
_
D
4
F
_
A
3
F
_
A
5
F
_
D
0
F
_
D
2
D
V
3
3
A
F
_
A
4
F
_
A
1
F
_
A
2
F
_
A
0
F
_
A
1
1
D
V
1
8
A
IO
C
E
#
F
_
O
E
#
IO
W
R
#
F
_
A
2
1
R
x
D
IR P
W
M
0
G
N
D V
G
A
S
D
A
T
x
D
V
G
A
S
C
L
A_DQ0
U
R
S
T
#
G
N
D
D
V
3
3
A
A_CS#
A_DQ8
A_RA0
A_CKE
A_BA0
A_DQ11
SDV25
GND
A_DQ10
A_RA10
A_RA3
A_RA5
A_DQ13
A_DQ5
GND
A_RA6
GND
SDV25
A_DQ12
A_RA2
A_DQ15
A_DQ9
GND
DV18A
A_RA1
GND
A_DQ7
A_RAS#
A_RA7
A_DQS1
GND
A_DQ1
SDV25
GND
A_CLK
GND
A_DQ3
A_DQ2
SDV25
A_RA8
A_DQM0
A_DQ6
GND
A_WE#
A_BA1
A_DQS0
VREF
A_DQ4
A_DQ14
A_RA11
A_CLK#
DV18A
A_RA9
SDV25
GND
A_CAS#
A_RA4
DACMCLK
DACLRC
DACBCLK
DOUT
DV18A
AOSDATA1
DV33A
D
V
IO
D
C
K
G
N
D
G
N
D
H
S
Y
N
C
_
V
G
A
B
L
U
E
+
G
N
D
B
L
U
E
-
D
V
1
8
A
A
D
C
P
L
L
V
D
D
G
N
D
V
G
A
V
S
Y
N
C
#
D
V
1
8
A
G
N
D
V
G
A
S
O
G
A
D
C
V
D
D
0
G
R
E
E
N
-
R
E
D
+
G
R
E
E
N
+
R
E
D
-
X
T
A
L
I
A
P
L
L
_
C
A
P
G
N
D X
T
A
L
O
A
N
A
L
O
G
V
D
D
A
P
L
L
V
D
D
A
N
A
L
O
G
V
D
D
A
N
A
L
O
G
V
D
D
G
N
D
G
N
D
A
D
C
P
L
L
V
D
D
1
G
N
D
G
N
D
G
N
D
A
D
C
V
D
D
0
A
V
C
M
C
V
B
S
2
+
C
V
B
S
1
+
C
V
B
S
1
-
C
V
B
S
2
-
C
V
B
S
0
+
G
N
D
C
V
B
S
0
-
A
D
C
V
D
D
0
S
C
-
S
C
+
S
Y
-
G
N
D
S
Y
+
V
O
C
M
C
B
+
G
N
D
C
B
-
Y
+
V
IC
M
Y
-
A
D
C
V
D
D
0
S
O
Y
C
R
-
C
R
+
DV33A
ANALOGVDD
G
N
D
IR
A
D
C
V
D
D
0
IOCE#
IOWR#
DV18A
DV18A
OBO[0..7]
GREEN+
ORO7
ORO6
GND
U
P
3
_
4
U
P
3
_
5
ADIN4
ADIN3
ADIN2
ADIN1
ADIN0
A
D
IN
0
A
D
IN
1
A
D
IN
2
A
D
IN
3
A
D
IN
4
C
V
B
S
2
-
C
V
B
S
2
+
V
I0
V
I1
V
I2
V
I3
V
I4
V
I5
V
I6
V
I7
V
I8
V
I9
V
I1
0
V
I1
1
V
I1
2
V
I1
3
V
I1
4
V
I1
5
V
I1
6
V
I1
7
V
I1
8
V
I1
9
V
I2
0
V
I2
1
V
I2
2
V
I2
3
VI12
VI7
VI15
VI2
VI20
VI10
VI5
VI8
VI22
VI6
VI19
VI21
VI18
VI11
VI23
VI16
VI17
VI3
VI0
VI9
VI14
VI1
VI13
VI4
DE_DVI
VSYNC_DVI
HSYNC_DVI
VSYNC_DVI
DE_DVI
HSYNC_DVI
DVIODCK
P
W
M
1
H
W
S
D
A
H
W
S
C
L
O
G
O
1
O
G
O
0
OGO[0..1]
O
R
O
6
M
U
T
E
O
R
O
4
PWM2VREF
MPX1
HSYNC_VGA
O
R
O
3
O
R
O
2
ORO2
ORO3
XTALI
ORO4
O
R
O
0
F_OE#
ORO0
O
R
O
7
HWSDA
HWSCL
UP3_5
UP3_4
SDA
SCL
URST#
DACBCLK
ADCVDD4
ADCVDD4
R
G
B
GND
PWM0
PWM1
R
G
B
MUTE
AOSDATA1
TXD
RXD
O
R
O
5
ORO5
DV18A
GND
GND
A_DQ16
A_DQ17
A_DQM1
SDV25
A_DQ25
SDV25
A_DQ29
A_DQ18
A_DQS3
GND
A_DQ19
A_DQ28
A_DQ22
A_DQ24
A_DQ21
A_DQ20
A_DQ23
A_DQ27
A_DQ30
A_DQ26
SDV25
A_DQ31
A_DQS2
A_DQM[0..1]
A_BA[0..1]
A_DQ[0..31]
A_RA[0..11]
A_DQS[0..3]
O
R
O
1
ORO1
A_CKE 5
A_CAS# 5
A_CLK 5
A_WE# 5
VREF 5
A_CS# 5
SDV25 5
A_RAS# 5
A_CLK# 5
F_D[0..7] 5
F_A[0..21] 5
OBO[0..7] 10
VSYNC 9
HSYNC 9
RED- 8
BLUE+ 8
VGASCL 6
VGASDA 6
BLUE- 8
RED+ 8
VGASOG 8
GREEN- 8
VGAVSYNC# 6
SC+ 8
CR+ 8
SC- 8
SY+ 8
CR- 8
Y- 8
SY- 8
CVBS0+ 8
CB+ 8
CVBS0- 8
CB- 8
Y+ 8
AP[0..7] 9
AN[0..7] 9
CLK1+ 9
CLK2+ 9
CLK2- 9
CLK1- 9
SDA 10
SCL 10
DACBCLK 10
DACMCLK 10
DOUT 10
DACLRC 10
SOY 7
CVBS1+ 8
CVBS1- 8
URST#
DACVREF 4
DACFS 4
LVDDA 4
DACVDD 4
VREFP4 4
VREFN4 4
VOCM 4
AVCM 4
VICM 4
ADCVDD0 4
REXTA 4
APLL_CAP 4
XTALO 4
ADCPLLVDD 4
ADCPLLVDD1 4
APLLVDD 4
VPLLVDD 4
PWM2VREF 4
AUXTOP 4
AUXBOTTOM 4
ADCVDD 4
MPX2 8
MPX1 8
ANALOGVDD 4
IR 7,10
IOCE# 5
IOWR# 5
GREEN+ 8
ORO7 1
ORO6 7
HSYNC_VGA 6
OGO[0..1] 7
ORO2 7
ORO3 9
XTALI 4
ORO4 7
F_OE# 5
ORO0 10
ADCVDD4 4
PWM1 10
MUTE 10
AOSDATA1 10
RXD 6
PWM0 9
TXD 6
R 9
G 9
B 9
ORO5 7
A_DQS[0..3] 5
A_BA[0..1] 5
A_RA[0..11] 5
A_DQ[0..31] 5
A_DQM[0..1] 5
ORO1 9
DV33A
DV33A DV18A
DV33A
C168
0.1uF
TP3
R96 0
RN18 10Kx4
1 2
3 4
5 6
7 8
R90
10k
RN17 10Kx4
1 2
3 4
5 6
7 8
C169
0.1uF
R97 0
RN23 10Kx4
1 2
3 4
5 6
7 8
R91
10k
R86
10k
RN21 10Kx4
1 2
3 4
5 6
7 8
TP4
R88
10k
D3
1N4148/SMD
R93
1k
1=3
2=4
SW1
SW4P/DIP/FLAT
1
2
3
4
RN20 10Kx4
1 2
3 4
5 6
7 8
RN22 10Kx4
1 2
3 4
5 6
7 8
TP5
R92
10k
RN19 10Kx4
1 2
3 4
5 6
7 8
R87
47k
MT8205
U8
MT8203
BGA388/
P2
R11
AD1
A
E
9
A
F
9
A
E
1
0
A
F
1
0
A
F
2
6
A
D
1
8
V2
V3
W1
W2
AC9
W3
W4
N2
L1
H2
M4
M3
V4
U2
U4
U24
V26
V25
W26
T24
T23
R15
U23
U25
T25
A
E
7
A
E
2
6
A
F
6
A
F
7
A
C
8
A
D
8
A
F
8
A
D
1
1
A
F
1
2
A
E
1
5
A
D
1
5
A
C
1
9
A
C
1
5
A
F
1
6
A
E
1
6
R
1
2
A
F
1
7
A
D
1
6
A
D
1
7
A
F
1
4
A
F
1
3
A
E
1
3
A
D
1
3
A
C
1
3
A
C
1
0
A
E
8
A
C
1
7
A
E
1
1
T
1
2
A
F
1
1
A
E
1
7
Y1
A
E
3
T
1
1
A
F
3
AC1
A
C
6
A
D
9
A
E
6
A
D
6
AD4
AB4
AE1
A
D
5
AB3
AB1
AA1
AC2
A
E
2
A
E
5
A
F
5
AB2
AA4
AC18
AA2
P11
Y3
V1
A
C
5
AA3
A
C
1
4
F3
G4
E2
F2
N23
G3
B
1
4
E3
E4
C2
M2
R16
J24
K23
AA23
H23
R14
L23
L24
M23
P26
A
D
7
R3
T4
N11
H4
K4
K3
J4
L2
K1
M12
P1
P3
L4
D1
D2
F1
H3
P25
P15
M24
R26
N24
U3
R4
P4
D3
M25
M26
J23
P24
N25
R24
A
D
1
9
A
E
2
1
A
C
2
1
A
D
2
2
A
C
2
2
A
F
1
8
AC26
W24
AC25
A
E
2
4
A
F
2
4
A
C
2
3
A
D
2
3
A
1
4
A
E
2
2
A
F
2
2
AA26
T16
AA25
T14
AB25
A
B
2
4
A
B
2
3
A
F
2
5
A
E
1
9
A
F
1
9
A
D
1
0
Y23
G23
A
E
1
8
T26
W23
W25
R25
A
F
2
1
V24
H24
C1
L11
D4
E1
F4
J3
T1
T2
L3
R1
N1
M1
R2
K2
J1
J2
A
D
2
0
A
E
4
Y4
M11
N4
N3
G2
H1
AD2
A
F
2
Y2
A
F
4
R23
P23
K24
N26
T13
T15
U26
A
E
2
5
A
F
2
3
A
D
2
1
A
F
2
0
A
E
1
2
A
F
1
5
A
C
1
6
A
D
1
4
A
C
7
T3
AC3
V23
A
E
2
0
G1
N12
A
D
2
4
A
C
2
4
AD25
Y25
AB26
P
1
2
U1
AC4
AD3
A
F
1
A
C
1
1
P
1
3
A
C
2
0
A
E
2
3
A
C
1
2
A
E
1
4
R
1
3
Y26
A
D
1
2
AD26
L26
AA24
L25
K26
P16
K25
J26
J25
H26
G24
H25
D25
D26
N16
E25
P14
E26
F25
F24
F26
G25
G26
N15
E24
C25
C26
B24
B25
F23
B26
A26
A25
Y24
A24
D24
C24
B
2
3
A
2
3
D
2
3
C
2
3
B
2
2
A
2
2
D
2
2
C
2
2
B
2
1
M
1
6
A
2
1
D
2
1
C
2
1
B
2
0
L
1
6
A
2
0
D
2
0
C
2
0
B
1
9
A
1
9
E
2
3
D
1
9
C
1
9
B
1
8
A
1
8
B
1
7
A
1
7
B
1
6
C
1
8
C
1
7
D
1
7
D
1
8
A
1
6
M
1
5
A
1
5
B
1
5
C
1
6
D
1
6
L
1
5
M
1
4
C
1
5
D
1
5
L
1
4
D
1
4
N
1
4
C
1
4
C
1
3
C
1
2
D
1
2
C
1
0
A
1
3
B
1
3
D
1
3
A
1
2
B
1
2
A
1
1
B
1
1
D
8
C
1
1
D
1
1
C
9
D
9
D
1
0
A
8
B
8
A
9
B
9
C
8
A
1
0
B
1
0
C
7
A
7
N
1
3
B
7
D
7
C
6
D
6
M
1
3
A
6
B
6
A
5
B
5
C
5
A
4
B
4
L
1
3
A
3
B
3
A
2
B
2
A
1
B
1
C
4
D
5
L
1
2
C3
A2P
DVSS3
ERO1
H
IG
H
A
6
H
IG
H
A
5
H
IG
H
A
4
H
IG
H
A
3
S
C
L
0
D
V
D
D
1
8
EBO7
EBO6
EBO5
EBO4
DVDD3I
EBO3
EBO2
CLK1P
A4N
CLK2P
VREF
LVDDC
R
HSYNCO
G
RWE#
DQ10
DQ9
DQ8
RAS#
CAS#
DVSS2
DVDD2I
DQ11
DQ13
O
R
O
3
S
D
A
0
O
R
O
6
O
R
O
2
O
R
O
1
O
R
O
0
H
IG
H
A
7
H
IG
H
A
1
H
IG
H
A
0
A
D
0
A
D
1
D
V
D
D
1
8
A
D
2
A
D
3
A
D
4
D
V
S
S
3
A
D
7
A
D
5
IO
A
0
IO
A
3
IO
A
4
IO
A
5
IO
A
6
IO
A
7
D
V
D
D
3
I
A
1
6
A
1
7
IO
A
2
0
D
V
S
S
1
8
IO
A
2
1
IO
A
L
E
EBO1
O
B
O
1
D
V
S
S
1
8
O
B
O
0
ERO5
O
G
O
1
D
V
D
D
3
O
R
O
7
O
G
O
0
OBO6
ERO6
OBO5
O
G
O
4
ERO7
EGO1
EGO5
ERO4
O
B
O
4
O
G
O
3
O
G
O
2
EGO0
EGO2
DVDD18
EGO4
DVSS18
EGO7
VCLK
O
G
O
5
EGO3
IO
C
S
#
AUXVTOP
VPLLVDD
ADIN2
ADCVSS
RA2
AUXVBOTTOM
T
E
S
T
P
ADIN1
ADIN0
AF
A3P
DVSS2
RA5
RA6
DVDD18
DVDD2
DVSS18
RA8
RA9
RA11
RCLK
O
R
O
4
DACVSSB
SVM
DACVSSC
BGVDD
BGVSS
DLLVSS
REXTA
A4P
A5N
LVSSA
A2N
DACVDDB
LVDDB
REFP4
REFN4
ADCVDD
DLLVDD
RCLKB
DVSS2
RA3
RA0
RA1
B
DACVSSA
DACVDDA
ADCVDD4
DQ18
DQ17
RA4
RA10
DQ16
BA0
D
V
D
D
1
8
U
P
3
0
P
R
S
T
#
U
P
3
4
U
P
3
5
W
R
#
DQ3
DVDD2
DQ2
R
X
D
IR P
W
M
1
P
W
M
0
T
E
S
T
N
F
C
IC
M
D
F
C
IC
L
K
DQ7
DVSS18
DQ6
DVSS2
DQ4
S
D
A
1
S
C
L
1
S
C
L
U
P
1
2
IN
T
0
#
D
V
D
D
3
AVDD18
RVREF
R
D
#
DQ14
AVSS18
DQS1
DQ15
U
P
1
7
DVDD2
DVDD2
SIF
ADCVSS4
ADIN4
ADIN3
PWM2VREF
VPLLVSS
A0N
A0P
LVDDA
A1N
CLK1N
A3N
A1P
A5P
A6N
A6P
U
P
1
5
O
G
O
7
EGO6
LVSSB
FS
DACVDDC
A7P
CLK2N
ERO0
O
B
O
2
EBO0
O
G
O
6
RCS#
BA1
RA7
CKE
DVSS18
DVSS2
DQ12
S
D
A
F
C
ID
A
T
U
P
3
1
U
P
1
3
IO
A
1
8
IO
O
E
#
A
D
6
IO
A
1
O
R
O
5
DE
ERO3
DVDD2
U
P
1
4
A7N
LVSSC
T
X
D
IC
E
DQ0
DQS0
DQ5
D
V
S
S
1
8
VSYNCO
ERO2
OBO7
O
B
O
3
H
IG
H
A
2
D
V
S
S
1
8
U
P
1
6
G
P
IO
0
IO
W
R
#
IO
A
2
D
V
S
S
3
DQM0
IO
A
1
9
DQ1
DQ19
DVDD18
DQ20
DQ21
DVSS2
DQ22
DQ23
DQS2
DQM1
DVDD2
DQS3
DQ31
DQ30
DVSS2
DQ29
DVSS18
DQ28
DQ27
DVDD2
DQ26
DQ25
DQ24
DVSS3
AOMCLK
AOLRCK
AOBCK
LIN
AOSDATA3
DVDD3I
AOSDATA2
AOSDATA1
AOSDATA0
DVDD18
HSYNC_DVI
VSYNC_DVI
DE_DVI
V
C
L
K
_
D
V
I
V
I2
3
V
I2
2
V
I2
1
V
I2
0
V
I1
9
V
I1
8
V
I1
7
V
I1
6
D
V
S
S
1
8
V
I1
5
V
I1
4
V
I1
3
V
I1
2
D
V
S
S
3
V
I1
1
V
I1
0
V
I9
V
I8
V
I7
D
V
D
D
1
8
V
I6
V
I5
V
I4
V
I3
V
I2
V
I1
V
I0
D
M
P
L
L
V
S
S
D
M
P
L
L
V
D
D
A
P
L
L
V
D
D
A
P
L
L
V
S
S
A
P
L
L
_
C
A
P
X
T
A
L
V
S
S
X
T
A
L
I
X
T
A
L
O
X
T
A
L
V
D
D
S
Y
S
P
L
L
V
D
D
S
Y
S
P
L
L
V
S
S
A
D
C
P
L
L
V
S
S
A
D
C
P
L
L
V
D
D
A
D
C
P
L
L
V
D
D
1
A
D
C
P
L
L
V
S
S
1
D
V
D
D
D
V
S
S
H
S
Y
N
C
V
S
Y
N
C
R
E
F
N
3
R
E
F
P
3
A
D
C
V
S
S
3
B
P
B
N
S
O
G
G
P
G
N
R
P
R
N
A
D
C
V
D
D
3
M
O
N
1
M
O
N
0
R
E
F
N
2
R
E
F
P
2
A
D
C
V
S
S
2
C
R
P
C
R
N
C
B
P
C
B
N
S
O
Y
Y
P
Y
N
A
D
C
V
D
D
2
V
IC
M
V
F
E
V
S
S
0
V
O
C
M
V
F
E
V
D
D
0
R
E
F
N
1
R
E
F
P
1
A
D
C
V
S
S
1
S
Y
P
S
Y
N
S
C
P
S
C
N
A
D
C
V
D
D
1
R
E
F
N
0
R
E
F
P
0
A
D
C
V
S
S
0
C
V
B
S
0
P
C
V
B
S
0
N
C
V
B
S
1
P
C
V
B
S
1
N
C
V
B
S
2
P
C
V
B
S
2
N
A
D
C
V
D
D
0
A
V
C
M
V
F
E
V
S
S
1
VFEVDD1
+ CE25
10uF/50v
R94 R/NC
R95 R/NC
R89
10k
2 1 1 0 6
1 0 6
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Vout
1. 25x( 1+180/ 110) =3. 3V
Power ON alive source
1. 25x( 1+300/ 680) =1. 8V
Vout
LDO V0.1
MiCO LCD TV - MediaTek MT8203 Solution
C
7 10 Thursday, September 15, 2005
Title
Size Doc Number Rev
Date: Sheet of
MiCO Confidential
AV33
DV33
DV33A
AV33
DV33
DV18A
DV33A
VCC
+5V
C172
0.1uF
+ CE32
220uF/16v
U9 CM1117-3.3V
SOT223
1
2 3
4
A
D
J
/G
N
D
OUT IN
OUT
U12 CM1117-3.3V
SOT223
1
2 3
4
A
D
J
/G
N
D
OUT IN
OUT
+ CE31
220uF/16v
C177
0.1uF
C175
0.1uF
+
CE26
220uF/16v
C170
0.1uF
C176
10uF/10v
+ CE28
220uF/16v
+ CE29
220uF/16v
+ CE27
220uF/16v
U11 CM1117-1.8V
SOT223
1
2 3
4
A
D
J
/G
N
D
OUT IN
OUT
FB23
75R
0805
C174
0.1uF
C171
0.1uF
FB24
75R
0805
+ CE30
100uF/16v
FB21
75R
0805
FB22
75R
0805
C173
0.1uF
U10 M1117-3.3V
SOT223
1
2 3
4
A
D
J
/G
N
D
OUT IN
OUT
2 2 1 0 6
1 0 6
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
03.MT8203 PBGA 388
01.INDEX & POWER CONNECTOR
04.MT8203 ANALOG&DIGIT DECOUPLE
MT8203E ( PBGA388) LCDTV BOARD 4 LAYERS
05.DDR MEMORY & FLASH
06.VGA IN & PC AUDIO IN
09.LVDS/CRT/BACK LIGHT CONTROL
10.AUDIO WM8776/ KEYPAD
02. LDO
07.VIDEO IN & TUNER IO
08. AV IN
For Tuner
FOR Tuner
SYSTEM EEPROM
ORO7 High :POWER OFF
ORO7 LOW :POWER ON
TO Power BD
DIGITAL GND AUIO IN/OUT GND ANALOG INPUT GND
INDEX & POWER CONNECTOR V0.1
MiCO LCD TV - MediaTek MT8203 Solution
C
8 10 Thursday, September 15, 2005
Title
Size Doc Number Rev
Date: Sheet of
MiCO Confidential
SCL_5V
SDA_5V
TUNER_12V
SYS_PWR
ORO7
SCL_5V
SDA_5V
+12V
TUNER_12V
TXD
RXD
ORO7
SDA_5V 7,10
SCL_5V 7,10
ORO7 3
+12V 9
TUNER_12V 7
TXD 3,6
RXD 3,6
+5V
+5V
+12V
+5V
+5V
VCC
+12V
+5V
H2
HOLE/GND
2
3
4
5
9
8
7
6
1
2
3
4
5
9
8
7
6
1
H1
HOLE/GND
2
3
4
5
9
8
7
6
1
2
3
4
5
9
8
7
6
1
FB26
75R
0805
+ CE33
220uF/16v
C220UF16V/D6H11
FB30
120R
R101
4.7k
C178
0.1uF
H3
HOLE/GND
2
3
4
5
9
8
7
6
1
2
3
4
5
9
8
7
6
1
J4
5x1 W/HOUSING
SIP5\2
1
2
3
4
5
Q3
2N3904
SOT23
1
2
3
FB31
120R
+ CE35
47uF/16v
R98
10k
C179
0.1uF
R99
4.7k
+ CE34
220uF/16v
C220UF16V/D6H11
J3
DIP8/P2.0
1
2
3
4
5
6
7
8
H4
HOLE/GND
2
3
4
5
9
8
7
6
1
2
3
4
5
9
8
7
6
1
R100
4.7k
U13
EEPROM 24C16
SOP8
1
2
3
4 5
6
7
8
NC
NC
NC
GND SDA
SCL
WP
VCC
FB27
120R
FB25
120R
2 3 1 0 6
1 0 6
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
TWO WI RE SERI AL CONTROL DEVI CE ADDRESS 0x34h
Del Par t s
MODI FI ED FROM 10K- - >100K BY BI N_WANG . 16/ 7/ 05. AVOI D AUDI O BOMB WHEN OPEN THE POWER
MODI FI ED FROM 10K- - >100K BY BI N_WANG . 16/ 7/ 05. AVOI D AUDI O BOMB WHEN OPEN THE POWER
MUST USE SHI ELD CABLE
TO AUDI O BD
POWER ON/ OFF
KEYPAD - MAX 8-KEYS
IR & POWER ON LED
Modi f y I 2C by Zheng. Guo. 16/ 8
ORO0 High :SYSTEM POWER OFF
ORO0 LOW :SYSTEM POWER ON
AUDIO WM8776/ KEYPAD V0.1
MiCO LCD TV - MediaTek MT8203 Solution
C
9 10 Wednesday, September 28, 2005
Title
Size Doc Number Rev
Date: Sheet of
MiCO Confidential
VGA_IN_L
VGA_IN_R
MUTE
YPBPR1_L
YPBPR1_R
PWM1
S1_AV1_R
AOSDATA1
DOUT
PWM1
DACLRC
DACMCLK
S1_AV1_L
DACBCLK
SDA
SCL
YPBPR2_L
YPBPR2_R
DOUT
CODHPOUTL
AUXL
COD_VOUTL
H
P
V
D
D
VMIDDAC
DACBCLK
S
C
L
1
4
CODHPOUTR
COD_VOUTR
S1_AV1_L
VGA_IN_L
HPVDD
ADCREFP
YPBPR2_L
DACMCLK
VMIDADC
AUSPL
AUXR
DACLRC
HPVDD
DACMCLK
YPBPR1_L
VMIDADC DACBCLK
DVDD
S1_AV1_R
D
A
C
L
R
C
AOSDATA1
YPBPR2_R
YPBPR1_R
AUSPR
D
V
D
D
VGA_IN_R
HPVDD_A
S
D
A
1
4
DACLRC
DV33
COD_VOUTR
GND
COD_VOUTL
ADCREFP
CODHPOUTL HPOUTL
HPOUTR CODHPOUTR
AUSPR
AUSPL
MUTE
OBO7
CH-
VOL+
VOL-
MENU
TV/AV
OBO6
LED_RED
LED_GRN
DV33A
URST#
ORO0
IR
OBO[0..7]
SCL_5V
SDA_5V
SCL
SDA
OBO1
ORO0
OBO5
OBO4
OBO3
OBO2
OBO0
CH+
IR
SCL
SDA
SCL14
SDA14
SCL_5V
SDA_5V
VGA_IN_L 6
VGA_IN_R 6
MUTE 3
YPBPR1_L 7
YPBPR1_R 7
S1_AV1_R 7
AOSDATA1 3
PWM1 3
DOUT 3
S1_AV1_L 7
DACMCLK 3
DACLRC 3
DACBCLK 3
SCL 3
SDA 3
YPBPR2_R 7
YPBPR2_L 7
URST# 3
ORO0 3
IR 3,7
OBO[0..7] 3
SCL_5V 1,7
SDA_5V 1,7
VCC
DVDD
HPVDD
DV33
DV33A
+5V
DV33A
DV33A
DV33A
DV33A
+5V
C181
10pF
R
1
9
7
10k
TP10
R114
1k
R124 4.7K
+
CE39 10uF/25v
+
CE36 10uF/25v
R108 100k
R193
33R
R208 33
R/SMD/0603
FB35 FB
C186
0.1uF
R120
10K
R0603
R117
10k
R192
4.7k
+
CE55
220uF/16v
Q4
2N3906
1
2
3
R
1
9
6
10k
R113 100k
+
CE48 10uF/25v
+
CE40 10uF/25v
+ CE49
10uF/25v
R102 100k
C180
0.1uF
+ CE47
10uF/25v
R118
47k
C182
10pF
FB39 FB
R
1
9
5
10k
R111 100k
FB34 FB
Q5
2N3906
1
2
3
R104 100k
R106 100k
TP8
J6
13x1 W/HOUSING
SIP13\2
1
2
3
4
5
6
7
8
9
10
11
12
13
+
CE37 10uF/25v
R
1
9
4
10k
R
2
0
0
10k
R
1
1
0
5
0
k
C184
0.1uF
FB33
0603 120R
+
CE43 10uF/25v
+ CE53
47uF/16v
+
CE51
10uF/25V
+ CE45
10uF/25v
TP6
FB32
0603 120R
FB38 FB
R126 0
TP9
QF1
2N7002
3
1
2
C185
0.1uF
+
CE41 10uF/25v
FB28
0603 120R
U14
WM8776
1
2
3
4
5
6
7
8
9
10
11
12
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
2
2
2
3
2
4
25
26
27
28
29
30
31
32
33
34
35
36
3
7
3
8
3
9
4
0
4
1
4
2
4
3
4
4
4
5
4
6
4
7
4
8
AIN2L
AIN1R
AIN1L
DACBCLK
DACMCLK
DIN
DACLRC
ZFLAGR
ZFLAGL
ADCBCLK
ADCMCLK
DOUT
A
D
C
L
R
C
D
G
N
D
D
V
D
D
M
O
D
E
C
E
D
I
C
L
H
P
O
U
T
L
H
P
G
N
D
H
P
V
D
D
H
P
O
U
T
R
N
C
NC
VOUTL
VOUTR
VMIDDAC
DACREFN
DACREFP
AUXR
AUXL
VMIDADC
ADCREFGND
ADCREFP
AVDD
A
G
N
D
A
IN
V
G
R
A
IN
O
P
R
A
IN
V
G
L
A
IN
O
P
L
A
IN
5
R
A
IN
5
L
A
IN
4
R
A
IN
4
L
A
IN
3
R
A
IN
3
L
A
IN
2
R
+
CE44 10uF/25v
R
1
0
9
5
0
k
R107 100k
C183
0.1uF
+
CE54
10uF/25v
R112 100k
R123 NC/0
QF2
2N7002
3
1
2
FB37 FB
R125 4.7K
R119 510
C187
0.1uF
R116
47k
R
1
9
9
10k
R121
10K
R0603
+
CE42 10uF/25v
FB36 FB
R122 510
J5
4x1 W/HOUSING
SIP4\2
1
2
3
4
R
1
9
8
10k
R190
4.7k
R207 33
R/SMD/0603
+
CE38
10uF/25v
+ CE50
10uF/25v
+
CE52
220uF/16v R115
10k
+
CE46 10uF/25v
TP7
2 4 1 0 6
1 0 6
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
NEARLY YPBPR2-CON.
CVBS0- - - TUNER1
CVBS1- - - FRONT BD AV_I N
AV , TUNER I/O
NEARLY YPBPR1-CON.
Opt i onal f or one component . Added by Bi n_wang 14/ 7/ 05
MODI FI ED BY BI N_WANG. 16/ 7/ 05
COMPONENTS SWI TCH.
MODI FI ED FROM 15k- - >0 BY BI N_WANG 16/ 7/ 05.
Added by Zheng_guo 21/ 7/ 05
DVD Connect or
8/ 18 modi f y by st even
VIDEO IN & TUNER IO V0.1
MiCO LCD TV - MediaTek MT8203 Solution
C
10 10 Thursday, September 15, 2005
Title
Size Doc Number Rev
Date: Sheet of
MiCO Confidential
YPBPR1_L
YPBPR1_R
Y2_GNDB
CB2_GNDB
CR2_GNDB
TU_VCC
CB1SWB
CB
GNDS
Y
Y2SWB
Y1SWB
CB2SWB
GNDS
CR1SWB
YPBPR2_L
YPBPR2_R
YPBPR1_L
TU_12V
H
P
_
S
E
N
S
E
O
G
O
0
O
G
O
1
SC_GND
TV_GND
CB_GND
SC
CVBS0
Y_GND
CVBS1
SOY
Y
CR_GND
SY
CR
CVBS1_GND
CB
SDA_5V
SCL_5V
Y_GND
YPBPR1_L
YPBPR1_R
YPBPR2_L
YPBPR2_R
YPBPR1/L
YPBPR1/R
YPBPR2/L
YPBPR2/R
YPBPR2_L
YPBPR2_R
SDA_5V
SCL_5V
Y
AF1_OUT
SIF1_OUT
TV_GND
TUNER_12V
SOY
Y1_GNDB
S1_AV1_L
S1_AV1_R
O
R
O
6
OGO[0..1]
ORO6
ORO4
CVBS0
ORO2
ORO2
Y1_INB
CB1SWB CB1_INB
CR1_INB
CR
CR2SWB
CR2B
Y2B
CB2B
CR1SWB
Y
CB
CR
Y1SWB
AV_L S1_AV1_L
S1_AV1_L
S1_AV1_R
AF1_OUT
SIF1_OUT
SY_GND
CR1_GNDB
AV_R S1_AV1_R
Y Y2B
CB
CR
CB2B
CR2B CR2SWB
IR_DVD
CR2_INDVD
CR2_GNDB
CB2_INDVD
Y2_INDVD
Y2_GNDB
CR2_INDVD
CB2_INDVD
Y2_GNDB
Y2_INDVD
Y2_GNDB
YPBPR2/L
YPBPR2/R
YPBPR1_R
CB_GND
CB1_GNDB
Y1_INB
Y1_GNDB CB1_GNDB
CVBS1
SC_GND
Y1_GNDB
CB1_GNDB
CR1_GNDB
Y2_GNDB
Y2SWB
CB2_GNDB
CR2_GNDB
CB2_GNDB CB2_GNDB
CB2_GNDB
CR2_GNDB CR2_GNDB
ORO5
VDVD
CB1_INB
CR1_INB
CR1_GNDB
SC
SY SY_GND
AV_R
AV_L
YPBPR1/R
YPBPR1/L
ORO5
+12V
CB2SWB
IR_DVD
IR
ORO4 IR
CVBS1_GND
CR_GND
YPBPR1_L 10
YPBPR1_R 10
CB 8
SC 8
CVBS0_GND 8
CVBS0 8
SOY 3
SC_GND 8
CR_GND 8
SY 8
CVBS1_GND 8
Y 8
CVBS1 8
CR 8
CB_GND 8
Y_GND 8
SDA_5V 1,10
SCL_5V 1,10
TUNER_12V 1
YPBPR2_R 10
YPBPR2_L 10
S1_AV1_L 10
S1_AV1_R 10
OGO[0..1] 3
ORO6 3
ORO4 3
ORO2 3
SIF1_OUT 8
AF1_OUT 8
SY_GND 8
ORO5 3
+12V 1,9
IR 3,10
TUNER_12V
VCC
DV33
DV33
VCC
VCC
VCC
TU_VCC
TU_12V
VCC
VCC
VCC
VCC
VCC VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
R148
10K
FB46
70R
R167
75
R181
75K
R185
75K
R162
4.7k
+
CE62 22uF/10V
FB41
70R
J7
CON12
SIP12\2
1
2
3
4
5
6
7
8
9
10
11
12
Q7
IR7314
SOP8
1
2
3
4 5
6
7
8
S1
G1
S2
G2 D2
D2
D1
D1
J9
CON10
1
2
3
4
5
6
7
8
9
10
R146
10k
R170
75
U15
IDTQS3VH257
TSSOP16/SMD
6
2
3
1
4
5
7
8
14
15
13
11
12
16
10
9
I1B
I0A
I1A
S
YA
I0B
YB
GND
I0D
E#
I1D
I0C
YD
VCC
I1C
YC
R159
0/NC
R139
10K
R184
75K
R187
15K
R137
10K
R182
75K
R156
10k
+
CE64 22uF/10V
R177 15K
C190
0.1uF
R153
0/NC
C189
0.1uF
R166
10K
R158 0
O
G
O
0
R164
0/NC
D9
BAV99
1 2
3
R161
10K
R183
75K
Q6
2N3904
SOT23
1
2
3
R178
0
R144
10K
R140
10K
O
G
O
1
R138
0/NC
R165 0
D7
BAV99
1 2
3
C188
0.1uF
+
CE58 22uF/10V
C191
4.7nF
+
CE63
470uF/16v
C470UF16V/D8H14
R171
10K
R179
15K
TP11
R176 15K
R141
0/NC
D8
BAV99
1 2
3
J9
VIDEO CONNECTOR
DIP11X2/P2.54/R2
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
21 22
R151
10K
FB43
70R
R154
10K
+
CE59 22uF/10V
R163
10K
R155
10K
R180
15K
R169
0
R149
10k
R168 0
+
CE56
1000uF/16v
R147
0/NC
+
CE60 22uF/10V
J10
CON5
1
2
3
4
5
Q8
2N3904
SOT23
1
2
3
R157
4.7k
R188
15K
R160
75
+
CE61 22uF/10V
R186
75K
R143
10K
+CE57
1000uF/16v
O
R
O
6
2 5 1 0 6
1 2 3 4 5 6
A
B
C
D
6 5 4 3 2 1
D
C
B
A
Title
Number Revision Size
B
Date: 2-Sep-2005 Sheet of
File: D:\\LCD TV\LCD TV.DdbDrawn By:
MUTEC
MUTEC
AUSPL
+24V
AUSPR
1
2
C11
470NF
FILM
1
2
C17
390PF
NPO
PIN
1
NIN
2
AGND
3
EN
4
BS
5
VPP
6
SW
7
PGND
8
U3
ATA-120
D1
MBRS130LTR
1 2
R15 47K
5%
PIN
1
NIN
2
AGND
3
EN
4
BS
5
VPP
6
SW
7
PGND
8
U1
ATA-120
1 2
C32
1UF
X5R
C20
10UF
1 2
C30
4.7nF
NPO
1
2
R36
10K
5
%
1
2
R23
10K
5
%
+
1 2
C38
1000UF/25V
1 2
R16
100K
5%
+
1
2
C25
100UF/25V
1 2
R18
10K
5 %
1 2
R1
82K
5%
1 2
C1
22pF NPO
1 2
C9
1UF
X5R
C34
NS
1 2
R2
100K
5%
1
2
C5
4.7uF
X5R
C24
22pF
C12
100NF
1 2
C31
1UF
X5R
1
2
C27
4.7uF
X5R
1 2
C3
1UF
X5R
1
2
C7
1UF
X7R
1 2
R7
10K
5%
1 2
L5 10uH
1
2
R37
10K
5
%
1 2
R12
10K 5%
+
1
2
C10
100UF/25V
1
2
R17
100K
5
%
C41
22pF
1
2
C35
100NF
X7R
1
2
R4
100K
5%
1 2
C21
22pF NPO
+
1
2
C4
100UF/25V
1
2
R8
10
5
%
1
2
C16
100NF
X7R
+
5
-
6
OUT
7
U2B
RC4558
1
2
R22
10
5
%
1 2
R3
10K
5%
1 2
C8
4.7nF
NPO
1
2
R11
10K
5
%
C14
22UF/16V
1
2
C28
100NF
X7R
C19
22UF/16V
D3
MBRS130LTR
1
2
C6
100NF
X7R
D2
6.2V
1 2
L6 10uH
1
2
R9
10K
5
%
1
2
R6
10
5
%
+
3
-
2
OUT
1
U2A
RC4558
C40
10UF
1
2
R10
10K
5
%
1 2
R14
82K
5%
1
2
R5
100K
5
%
1 2
R39
10K 5%
C15
2.2UF
1
2
R19
100K
5%
1 2
R21
10K
5%
1
2
C36
390PF
NPO
1
2
R20
10
5
%
1
2
C29
1UF
X7R
+
1 2
C39
1000UF/25V
1
2
C33
470NF
FILM
1 2
R38
47K
5%
D4
6.2V
AGND
AGND
+24V
+24V
+24V
A
1 2
R66
4K7
5%
1 2
R67
4K7
5%
C54
1n
C55
1n
C52
1n
C53
1n
1 2
R46
4K7
5%
1 2
R45
4K7
5%
1 2
R47
1K8
5%
1 2
R33
1K8
5%
2 6 1 0 6
1 2 3 4 5 6
A
B
C
D
6 5 4 3 2 1
D
C
B
A
Title
Number Revision Size
B
Date: 2-Sep-2005 Sheet of
File: D:\\LCD TV\LCD TV.DdbDrawn By:
MUTEC
R42
1k
D7
4.7V
+
1
2
C42
100UF/25V
1 2
R40
10K
5%
1
2
R25
10K
5%
1 2
R24
3K
5%
1
2
C37
1UF
X5R
1
2
R41
10K
5%
+24V
AGND
AGND AGND
Q5
2N3904
Q6
2N3904
Q2
2N3904
1 2
R34
1K
5%
1 2
R35
1K
5%
1 2
R29
1K
5%
MUTE
Q3
2N3904
AGND
Q7
NC
Q4
2N3906
Q1
2N3906
R27
NC
MUTE
AGND
R28
1k
R30
22k
+
1
2
C18
NC
+
1
2
C51
220UF/25V
D5
NC
D6
1N4148
D8
1N4148
D9
1N4148
MUTEB
AGND
AGND
D10
NC
R43
0R
AGND
AGND
LOUT
ROUT
AUSPL
AUSPR 1 2
R57 4K7
5%
1 2
R63 10K
5%
1 2
R48 1k8
5%
C2
100U/35V
1 2
R58 4K7
5%
+
5
-
6
OUT
7
U5B
RC4558
1 2
R52 22K
5%
1 2
R64 22K
5%
1 2
R49 4K7
5%
1 2
R59 10K
5%
1
2
C45
1n
1
2
R65
47K
5%
1 2
R50 4K7
5%
1 2
R54 10K
5%
1
2
C46
1n
1
2
R60
100K
5
%
+
3
-
2
OUT
1
U5A
RC4558
1
2
C47
1n
C43
10U/16V
1 2
R51 10K
5%
1 2
R55 10K
5%
1
2
R61
47K
5%
1
2
C48
1n
C44
22U/16V
1 2
C49
22P
C22
22U/16V
1 2
R56 1k8
5%
1
2
R53
100K
5
%
1
2
C13
100N
1 2
C50
22P
1 2
R62 10K
5%
C26
10U/16V
+24V
+24V
AGND
AGND
AGND
AGND
J 10
rca2
1 2
C60
10UF
X5R
1 2
C59
10UF
X5R
1 2
R13
1K
5%
1 2
R26
1K
5%
LOUT
ROUT
2 7 1 0 6
1 0 6
1 2 3 4 5 6
A
B
C
D
6 5 4 3 2 1
D
C
B
A
Title
Number Revision Size
B
Date: 20-Sep-2005 Sheet of
File: D:\CCC\MLT186A-CCC\MLT186.DDB Drawn By:
DA10
DA9
CA10
EC11
EC12
CA8
C22
EC9
CA9
EC14
DA7
EC5
Z2
DA8
ZA1
QA3
EC5A
Q10
UA3
5VSB
12V
5V
1
2
3 4
5
6
U3
T3A
PQ2625B
T3C
T3D
T3 L4
L9
D3
R99
Z3
D9
PH3
R73
D6
RS4
PH4
R72
R70
EC6 R69
C19
Q13
Q12
Q11
R66 R67 D4
R85
R90
R92 R91
R88
CF7
R82
Q15
PH2
R87
R79
ON/OFF
+18V
R64
Q8
R59
R76
R53 R54 R55
RA1
R61
R63
R61
R62
R113
R96
RF6
EC13
VCC
+
1
8
V
+
4
0
0
V
R112
A
R68
GND
GND
GND
D3A
R86
R78
Q14
R77
RF31
C15
C18
R52
R114
R97
RF7 RF8 RF9
C17
GND
C83
C84
R58
C15A
R89
QA5
CF4
RF5
DF1
RF4
EC19
R101
1 2 3 4
V
I
N
V
O
U
T
G
N
D
V
D
I
S
U5
RA
C1
CF12
CF3
D4A
R57
Z2A
EC13
CF5
CS2
CF6
RK11
RK12
RK13
RK14
RK15
RK16
RK17
RK18
RK19
J12
J13
J14
J15
J16
J18
2 8 1 0 6
1 2 3 4 5 6
A
B
C
D
6 5 4 3 2 1
D
C
B
A
Title
Number Revision Size
B
Date: 20-Sep-2005 Sheet of
File: D:\CCC\MLT186A-CCC\MLT186.DDB Drawn By:
CA1
R29
QA1
R24
RS1
C5A
EC1
R32
R49
R50
R51
R43
C14
R7
R4
R8
R5
R9
R6
CA2
C9A
R33
R27
C4
C3
R31
R30
C6
R23
C5
R41
R36
C11 C10
F2
EC4
F
1
L2
CX1
CY2
CY1
CY3
L1
R10
RS2
R35
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
U2
R42
C1
QA2A
RS3
C2
CA4
R20
R21
R11
R44
DT
R18
QA2
R39
R17
Q4
R16
D1A
Z1
DA3
DA1
DA2
D1
VR
C
1
2
C7
VR
C9
DA6
DA5
DA4
VS
VIN
380V
Q2
Q1
C8
R
3
7
VB
DA12
DA11
R116
CA6
CA7 R118
E
C
8
EC15
24V/5A
E
C
7
CY4
A1
A2
A
C
2
V+
1
A
C
3
V-
4
DB1
T1
VCC
IEAO
IAC
IS
VRMS
SS
VDC
RAMP1
RAMP2 LIMIT
GND
PWOUT
PFCOUT
VCC
VR
VFB
VEAO
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
U1
380V VCC
A1
A2
A1
A2
VS
VR
VIN
VB
VB
VIN
L6
L3
VS
VR
1 2 3
CON1
L N
T3
R1
R2
R3
R34
VR
R115
PH1
RS5
RS6
U4
R119
UA2
R129
R125
R122
R123
GND
+
1
2
V
A
C35
GND
C36
D7
+2.5V
R134
R137 R136
R135
R138
GND
R130
C33
+24V
R124
R12
14D681
R22
D2
UA1
RT1
C34
R120
GND
R126
+24V
A
H1
R117
3 2
1
R121
5 6
7
8 4
104 50V
+
1
2
V
A
RF20 H2
T3
DA15
DA14
L6
220/35
L3A
EC11A
+24V/1A
GND
RT2
GND
RF1
CF1
QF1
QF2
Q7
RF2
CF2
CK1 CA1A
CK2
CF9
RF3
LT1
LT2 DS1
R234 R236
R233
R235
RK25
CK19
GND
RK1
RK31
R230
CY5
GND
EC2
R51A
R51B
CF10
ZA2
DS2
RK6
RK7
RK8
RK9
RK10
RK20
RK21
RK22
RK23
RK24
RK3
RK4
RK5
J1
J2
J3
J4
J5
J6
J7
J9
J10
J11
L1A
CX2
CK3
R40
Z
2 9 1 0 6
Basic Operations & Circuit Description

Main Electric Components
(1). MODULE:
There are 1 pc. panel and 2 pcs. PCB including 1 pc. INVERTER
board(L), 1 pc. T-CONTROL board,

(2).SIGNAL PROCESS
There are 5 pcs. PCBs including

1 pc. Audio&Tuner board,
1 pc. Main digital board,
1 pc. Keypad board,
1 pc. Remote Control Receiver board,
1 pc. DVD decoder board

(3).POWER
There are 1 pc. PCB for power.


















3 0 1 0 6
PCB function
1. Power:
(1). Input voltage: AC 100V~240V, 47Hz~63Hz.
Input range: AC 90V(Min)~264V(Max) auto regulation.
(2). To provide power for PCBs.
a). +24V for Inverter.
b). +5Vsb for standby,
c). +5V for signal power,
d). +24V for Audio Amp power and converter to
e). +12V for Tuner power.

2. Main (Video InterFace) board:
(1).Decoder the video signal (TV,CVBS,S-VIDEO) from analog to digital
signal.
(2).Converter the Video signals( TV,CVBS,S-VIDEO ) and graphics signal
(VGA,YPbPr) from interface to progressive,
(3). Converter the Digital to fit the panel display mode and output the LVDS
signal to Panel.

3. Tuner & Audio Board:
(1)Convert TV RF signal to video and audio signal to Main board.
(2 ). Decoder the TV SIF signal to audio signal,
(3 ). Converter the audio to audio Amplifier and output to the speaker.


4. KEYBOARD
To get the main button control on LCD_TV as SOURCE,MENU,
CHANEL +,CHANEL -, VOL +,VOL-, STANDBY functions.

5. Remote control board
Receive the remote signal and active for the control.

6. T-CONTROL board

Converter the LVDS signal to the digital signal for fitting the PANEL.
7. INVERTER board

Converter the low DC voltage +24V to high AC voltage to drive the backlight.

3 1 1 0 6
PCB failure analysis
1. CONTROL:
a. Abnormal noise on screen.
b. No picture.
2. MAIN (VIDEO):
a. Lacking color, Bad color scale.
b. No voice.
c. No picture but with signals output, OSD and back light.
d. Abnormal noise on screen.
3. POWER:
No picture, no power output.




Basic operation of LCD-TV
1. After turning on power switch, power board sends 5Vst-by Volt to Micro
Processor IC waiting for ON signals from Key Switch or Remote Receiver.

2. When the ON signal from Key Switch or Remote Receiver is detected, Micro
Processor will send ON Control signals to Power. Then Power sends (5Vsc,
12Vsc, 24V and RLY ON, Vs ON) to PCBs working. This time VIF will send
signals to display back light, OSD on the panel and start to search available
signal sources. If the audio signals input, them will be amplified by Audio AMP
and transmitted to Speakers.

3. If some abnormal signals are detected (for example: over volts, over current,
over temperature and under volts), the system will be shut down by Power off.













3 2 1 0 6
LCD basic display theory.
When an electrical field is applied to the LC planes, the LC molecules re-align
themselves so that they are parallel to the electrical field. This electrical process
is known as twisted nematic field effect or TNFE. In this alignment, polarized
light is not twisted as it passes through the LC material (see Diagram 3A and
3B). If the front polarizer is oriented perpendicular to the rear polarizer, light will
pass through the energized display but will be blocked by the rear polarizer. An
LCD in this form is acting as a light shutter.
Displays with variable characters are created by selectively etching away the
conductive surface that was originally deposited on the glass. Etched areas
become the displays background; unetched areas become the displays
characters.


Diagram 3A. The off state of a TN LCD-the LC molecules form a twist and therefore
cause polarized light to twist as it passes through.




Diagram 3B. The on state-the electrical field re-aligns the LC molecules so they do
not twist the polarized light.

3 3 1 0 6
3 1 0 6
TFT LCD
T-COHE
Power
Speaker
Tuner Board Main Board
Terminal
Connect Board
DVD
Loader
Key
Board
Remote Receiver
Inverter

IC DESCRIPTION


-MT8205G
-AT24C02
-MX29LV160BBTC
-LP2996
-AZ1117/H
-WM8776
-MX232A
-ISAV330
3 5 1 0 6

Pinout information


H
IG
H
A
2
A
C
1
1
DVSS18
T16
D
V
D
D
1
8
A
D
1
9
A3P
M2
H
IG
H
A
6
A
E
9
V
I
9
C
2
0
V
C
L
K
_
D
V
I
B
2
3
DVSS3
N15
DLLVSS
K3
B
P
A
1
3
CKE
N26
F
C
I
C
L
K
A
F
2
2
A
D
5
A
D
1
6
DQ30
D26
EBO4
W2
A
P
L
L
V
S
S
D
1
8
A1N
R1
DVDD2
H24
S
C
N
B
5
V
IC
M
A
7
ADCVSS
F2
ERO4
AC2
DQ9
V25
V
I
1
7
C
2
2
LVDDB
L4
BGA388/SOCKET
A
D
C
V
D
D
3
D
8
A7N
G1
DQ16
N25
R
V4
AOSDATA2
B26
ADIN0
E4
H
IG
H
A
0
A
F
1
2
VREF
M4
S
Y
S
P
L
L
V
S
S
L
1
5
BA1
P23
U
P
1
5
A
D
2
0
DVSS2
R15
DVSS3
R11
C
V
B
S
1
P
A
2
DQS3
H25
V
I
3
A
1
8
U
P
1
7
A
F
2
1
D
V
D
D
1
8
A
D
1
8
Y
N
B
1
0
S
C
L
1
A
B
2
3
W
R
#
A
F
1
8
DVDD2
H23
VPLLVDD
G4
EGO1
AB1
V
I
1
9
A
2
2
DVDD2
V23
A2N
P1
R
P
A
1
1
F
C
I
D
A
T
A
F
2
3
EGO2
AA4
AOSDATA3
B25
DACVDDC
N3
A
1
7
A
C
1
7
D
V
D
D
3
I
A
C
1
0
G
P
A
1
2
X
T
A
L
V
D
D
C
1
6
V
I
5
C
1
9
A6N
J1
PWM2VREF
F4
H
IG
H
A
3
A
F
1
0
C
V
B
S
0
P
A
3
I
O
A
1
9
A
D
1
2
V
I
1
3
C
2
1
S
O
Y
C
8
DQS0
Y25
O
G
O
6
A
F
4
DQ4
AB25
U
P
3
4
A
D
2
2
RA6
K23
IO
A
3
A
F
1
4
A5N
K1
D
V
D
D
D
1
4
DQ12
U26
ADCVDD
F1
O
G
O
2
A
F
5
D
V
S
S
1
8
T
1
1
A
V
C
M
D
5
DVSS18
P14
U
P
3
0
A
E
2
1
D
M
P
L
L
V
D
D
C
1
7
ADIN4
D4
HSYNCO
U2
V
F
E
V
D
D
0
D
7
D
V
S
S
3
R
1
3
AVDD18
Y23
V
I
1
5
A
2
1
R
E
F
N
2
C
9
I
C
E
A
C
2
4
A
D
6
A
C
1
6
VCLK
V1
CAS#
T23
EBO0
Y2
I
O
A
2
1
A
F
1
1
A
D
C
P
L
L
V
D
D
1
D
1
5
DVSS2
N16
REFP4
D1
C
V
B
S
2
N
B
1
DQ21
K26
SIF
C1
DQ17
M26
EBO1
Y1
MT8205
V
I
0
B
1
6
C
V
B
S
1
N
B
2
V
F
E
V
S
S
0
N
1
3
M
O
N
1
C
1
1
OBO7
AD3
IN
T
0
#
A
F
1
9
DQ2
AC25
RA9
L24
A
D
7
A
F
1
7
EBO6
V3
VSYNC_DVI
D24
BGVDD
H4
R
E
F
P
3
D
1
2
I
O
A
1
8
A
E
1
2
RA0
R26
DVSS18
P11
O
R
O
7
A
E
6
DQ25
G25
ERO0
AD2
A
1
6
A
E
8
IO
A
7
A
C
1
3
A0P
T2
S
Y
N
B
6
DVDD18
AA24
ADCVDD4
D3
V
I
1
1
A
2
0
DQ15
R25
DQ3
AC26
DVDD18
AC18
C
B
P
A
9
VSYNCO
U1
U
P
3
1
A
D
2
1
RA4
J23
DVDD18
Y24
SVM
T4
EBO2
W4
V
S
Y
N
C
C
1
3
A7P
G2
DVSS2
P15
O
G
O
1
A
C
6
LVDDC
M3
DVDD2
F24
DQM1
H26
VPLLVSS
J3
H
IG
H
A
1
A
D
1
1
A
D
C
V
S
S
1
M
1
3
V
I
1
2
B
2
0
G
P
I
O
0
A
E
2
3
T
E
S
T
N
A
1
4
O
R
O
4
A
D
7
I
O
C
S
#
A
C
1
4
O
G
O
4
A
D
5
U?
V
I
2
1
C
2
3
AVSS18
W23
I
O
A
2
0
A
E
1
1
G
U4
C
R
P
A
8
DE
T3
V
F
E
V
S
S
1
L
1
2
AOBCK
C26
S
D
A
0
A
E
2
6
X
T
A
L
I
A
1
5
A1P
R2
R
E
F
P
0
B
4
DQ23
J26
D
V
D
D
1
8
E
2
3
O
R
O
0
A
D
8
DQ13
T25
D
V
S
S
1
8
P
1
3
DQ6
AA25
P
W
M
1
A
C
2
3
DVSS2
R16
ERO6
AB4
H
IG
H
A
5
A
F
9
V
I
2
3
A
2
3
R
D
#
A
E
1
8
REXTA
J4
B
N
B
1
3
IO
A
1
A
D
1
4
DVSS18
T13
DACVDDA
P4
AOMCLK
E24
DVSS2
P16
A
P
L
L
_
C
A
P
A
1
6
CLK1N
N1
RVREF
G23
A
D
1
A
D
1
5
A
D
C
V
D
D
1
C
5
O
B
O
3
A
F
1
RA2
N23
O
G
O
5
A
C
5
EBO3
W3
V
I
8
B
1
9
V
I
1
6
B
2
1
ERO1
AD1
LVSSC
N12
DQ7
AA26
BA0
R24
AF
C2
A
D
C
V
S
S
3
C
1
0
AOSDATA1
A26
BGVSS
K4
A
D
0
A
E
1
5
A
D
C
P
L
L
V
S
S
M
1
4
RA7
K24
O
G
O
7
A
E
4
CLK1P
N2
DQ31
D25
EBO5
W1
V
I
2
B
1
7
DVDD2
V24
A
D
C
V
D
D
2
C
7
S
C
L
A
F
2
5
DVSS18
R14
ADIN2
E2
EGO5
AA1
O
G
O
0
A
D
6
IO
A
4
A
F
1
3
V
I
1
8
D
2
2
LVSSB
M11
DACVDDB
P3
DVDD3I
AC9
R
N
B
1
1
U
P
1
4
A
E
2
0
RA10
P24
A
D
4
A
E
1
6
DVDD3I
F23
S
Y
S
P
L
L
V
D
D
D
1
6
RCS#
R23
A6P
J2
A2P
P2
C
V
B
S
0
N
B
3
DVDD2
G24
DQ1
AD26
ERO7
AB3
V
I
4
B
1
8
V
I
2
0
B
2
2
O
R
O
6
A
F
6
EBO7
V2
S
C
L
0
A
F
2
6
Y
P
A
1
0
DQ5
AB26
S
D
A
1
A
B
2
4
U
P
3
5
A
C
2
2
DVDD18
AA23
IO
A
0
A
D
1
7
LIN
B24
FS
N4
LVSSA
M12
G
N
B
1
2
D
V
S
S
N
1
4
S
D
A
A
E
2
5
DLLVDD
H3
EGO0
AB2
O
B
O
0
A
F
3
DQ10
V26
DQ28
E26
RA5
J24
A4N
L1
A
D
C
V
S
S
0
L
1
3
A
P
L
L
V
D
D
D
1
7
ADIN3
E1
O
R
O
1
A
C
8
O
R
O
3
A
E
7
R
E
F
N
1
C
6
DQM0
Y26
IO
A
6
A
D
1
3
V
I
1
4
D
2
1
DVSS2
T14
IO
A
L
E
A
E
1
7
D
V
S
S
3
R
1
2
R
E
F
P
2
D
9
DQ0
AD25
P
R
S
T
#
A
C
2
1
H
IG
H
A
4
A
E
1
0
O
R
O
2
A
F
7
A
D
C
P
L
L
V
S
S
1
L
1
4
T
X
D
A
D
2
4
DVSS2
T15
REFN4
D2
O
G
O
3
A
E
5
O
B
O
1
A
E
3
A
D
C
V
D
D
0
C
4
DQ29
E25
DACVSSA
R4
DQ11
U25
D
M
P
L
L
V
S
S
C
1
8
ADCVSS4
L11
V
O
C
M
B
7
IO
A
2
A
E
1
4
D
V
D
D
3
A
D
1
0
R
X
D
A
E
2
4
RA11
M23
D
V
S
S
1
8
M
1
6
DE_DVI
C24
M
O
N
0
D
1
1
A
D
C
P
L
L
V
D
D
C
1
5
I
O
O
E
#
A
F
1
5
T
E
S
T
P
B
1
4
EGO7
Y3
O
B
O
4
A
E
2
DQ24
G26
O
B
O
2
A
F
2
EGO6
Y4
B
U3
A
D
2
A
C
1
5
DVDD2I
U23
DQ8
W26
V
I
1
A
1
7
LVDDA
L3
C
V
B
S
2
P
A
1
S
C
P
A
5
DQ20
L25
DQ18
M25
V
I
1
0
D
2
0
RA8
L23
ADIN1
E3
C
B
N
B
9
ERO2
AC4
U
P
1
2
A
E
1
9
DVDD2
W24
HSYNC_DVI
A24
RA1
N24
DACVSSC
N11
H
IG
H
A
7
A
F
8
RWE#
U24
CLK2P
H2
R
E
F
N
3
C
1
2
U
P
1
3
A
F
2
0
RA3
M24
EGO4
AA2
D
V
D
D
3
A
D
9
ERO5
AC1
DQ26
F26
CLK2N
H1
A0N
T1
IO
A
5
A
E
1
3
S
Y
P
A
6
DQ27
F25
DQ19
L26
D
V
S
S
1
8
P
1
2
F
C
IC
M
D
A
E
2
2
AUXVTOP
F3
D
V
S
S
3
L
1
6
DQS1
W25
C
R
N
B
8
ERO3
AC3
D
V
S
S
1
8
T
1
2
AOSDATA0
A25
RCLKB
P25
DACVSSB
R3
H
S
Y
N
C
C
1
4
X
T
A
L
O
B
1
5
A5P
K2
MT8205
VFEVDD1
C3
R
E
F
P
1
D
6
DQS2
J25
RCLK
P26
A
D
3
A
F
1
6
V
I
6
D
1
9
EGO3
AA3
RAS#
T24
A
D
C
V
S
S
2
D
1
0
U
P
1
6
A
C
2
0
P
W
M
0
A
D
2
3
OBO5
AE1
V
I
2
2
D
2
3
DQ14
T26
A4P
L2
S
O
G
D
1
3
O
R
O
5
A
C
7
AOLRCK
C25
D
V
D
D
1
8
A
C
1
9
X
T
A
L
V
S
S
M
1
5
A3N
M1
R
E
F
N
0
A
4
DQ22
K25
AUXVBOTTOM
G3
OBO6
AD4
V
I
7
A
1
9
IO
W
R
#
A
C
1
2
I
R
A
F
2
4

















3 6 1 0 6

Pin Descriptions

2.3 Pin Descriptions
Table 2-1 provides detail video/audio port pin descriptions.
Table 2-1 video/audio port pin descriptions.
Pin Symbol Type Description
E24
AOMCLK
O Audio out master clock
C25
AOLRCK
O Audio out left-right clock
C26
AOBCK
O Audio out bit clock
A25
AOSDATA0
O Audio out data line 0
A26
AOSDATA1
O Audio out data line 1
B26
AOSDATA2
O Audio out data line 2
B25
AOSDATA3
O Audio out data line 3
B24
LIN
I Audio line in
A3
CVBS0P
I Composite Video input 0
A2
CVBS1P
I Composite Video input 1
A1
CVBS2P
I Composite Video input 2
C1
SIF
I Tuner Sound SIF
C2
AF
I Tuner Sound AF

3 7 1 0 6
AT24C01A/2/4/8/16
2-Wire
Serial CMOS
E
2
PROM
1K (128 x 8)
2K (256 x 8)
4K (512 x 8)
8K (1024 x 8)
16K (2048 x 8)
Features

Low Voltage and Standard Voltage Operation


5.0 (VCC = 4.5V to 5.5V)
2.7 (VCC = 2.7V to 5.5V)
2.5 (VCC = 2.5V to 5.5V)
1.8 (VCC = 1.8V to 5.5V)

Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),


1024 x 8 (8K) or 2048 x 8 (16K)

2-Wire Serial Interface

Bidirectional Data Transfer Protocol

100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility

Write Protect Pin for Hardware Data Protection

8-Byte Page (1K, 2K), 16-Byte Page (4K, 8K, 16K) Write Modes

Partial Page Writes Are Allowed

Self-Timed Write Cycle (10 ms max)

High Reliability
Endurance: 1 Million Cycles
Data Retention: 100 Years

Automotive Grade and Extended Temperature Devices Available

8-Pin and 14-Pin JEDEC SOIC and 8-Pin PDIP Packages


Description
The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial elec-
trically erasable and programmable read only memory (EEPROM) organized as
128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low power and low voltage operation are
essential. The AT24C01A/02/04/08/16 is available in space saving 8-pin PDIP, 8-pin
and 14-pin SOIC packages and is accessed via a 2-wire serial interface. In addition,
the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to
5.5V) and 1.8V (1.8V to 5.5V) versions.
Pin Name Function
A0 to A2 Address Inputs
SDA Serial Data
SCL Serial Clock Input
WP Write Protect
NC No Connect
Pin Configurations
8-Pin PDIP
8-Pin SOIC
14-Pin SOIC
0180C
AT24C01A/02/04/08/16

3275
38/106
Block Diagram
Operating Temperature................... -55C to +125C
Storage Temperature...................... -65C to +150C
Voltage on Any Pin
with Respect to Ground ..................... -0.1V to +7.0V
Maximum Operating Voltage ........................... 6.25V
DC Output Current ......................................... 5.0 mA
*NOTICE: Stresses beyond those listed under Absolute Maxi-
mum Ratings may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Absolute Maximum Ratings*
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive
edge clock data into each E
2
PROM device and negative
edge clock data out of each device.
SERIAL DATA (SDA): The SDA pin is bidirectional for se-
rial data transfer. This pin is open-drain driven and may be
wire-ORed with any number of other open-drain or open
collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1
and A0 pins are device address inputs that are hard wired
for the AT24C01A and the AT24C02. As many as eight
1K/2K devices may be addressed on a single bus system
(device addressing is discussed in detail under the Device
Addressing section).
The AT24C04 uses the A2 and A1 inputs for hard wire
addressing and a total of four 4K devices may be ad-
dressed on a single bus system. The A0 pin is a no con-
nect.
The AT24C08 only uses the A2 input for hardwire ad-
dressing and a total of two 8K devices may be addressed
on a single bus system. The A0 and A1 pins are no con-
nects.
The AT24C16 does not use the device address pins which
limits the number of devices on a single bus to one. The
A0, A1 and A2 pins are no connects.
(continued)
AT24C01A/02/04/08/16
3375 39/106
MX29LV160BT/BB
16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE
3V ONLY FLASH MEMORY
erase operation completion.
Ready/Busy pin (RY/BY)
- Provides a hardware method of detecting program or
erase operation completion.
Sector protection
- Hardware method to disable any combination of
sectors from program or erase operations
- Temporary sector unprotect allows code changes in
previously locked sectors.
CFI (Common Flash Interface) compliant
- Flash device parameters stored on the device and
provide the host system to access
100,000 minimum erase/program cycles
Latch-up protected to 100mA from -1V to VCC+1V
Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
Low VCC write inhibit is equal to or less than 1.4V
Package type:
- 44-pin SOP
- 48-pin TSOP
- 48-ball CSP
Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
10 years data retention
FEATURES
Extended single - supply voltage range 2.7V to 3.6V
2,097,152 x 8/1,048,576 x 16 switchable
Single power supply operation
- 3.0V only operation for read, erase and program
operation
Fully compatible with MX29LV160A device
Fast access time: 70/90ns
Low power consumption
- 30mA maximum active current
- 0.2uA typical standby current
Command register architecture
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x31)
Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
Erase Suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, any sector that is not being erased,
then resumes the erase.
Status Reply
- Data polling & Toggle bit for detection of program and
GENERAL DESCRIPTION
The MX29LV160BT/BB is a 16-mega bit Flash memory
organized as 2M bytes of 8 bits or 1M words of 16 bits.
MXIC's Flash memories offer the most cost-effective
and reliable read/write non-volatile random access
memory. The MX29LV160BT/BB is packaged in 44-pin
SOP, 48-pin TSOP and 48-ball CSP. It is designed to be
reprogrammed and erased in system or in standard
EPROM programmers.
The standard MX29LV160BT/BB offers access time as
fast as 70ns, allowing operation of high-speed micropro-
cessors without wait states. To eliminate bus conten-
tion, the MX29LV160BT/BB has separate chip enable
(CE) and output enable (OE) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29LV160BT/BB uses a command register to man-
age this functionality. The command register allows for
100% TTL level control inputs and fixed power supply
levels during erase and programming, while maintaining
maximum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The MX29LV160BT/BB uses a 2.7V~3.6V VCC
supply to perform the High Reliability Erase and auto
Program/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
R

LP2996
DDR Termination Regulator
General Description
The LP2996 linear regulator is designed to meet the JEDEC
SSTL-2 specifications for termination of DDR-SDRAM. The
device contains a high-speed operational amplifier to provide
excellent response to load transients. The output stage pre-
vents shoot through while delivering 1.5A continuous current
and transient peaks up to 3A in the application as required
for DDR-SDRAM termination. The LP2996 also incorporates
a V
SENSE
pin to provide superior load regulation and a V
REF
output as a reference for the chipset and DIMMs.
An additional feature found on the LP2996 is an active low
shutdown (SD) pin that provides Suspend To RAM (STR)
functionality. When SD is pulled low the V
TT
output will
tri-state providing a high impedance output, but, V
REF
will
remain active. A power savings advantage can be obtained
in this mode through lower quiescent current.
Features
n Source and sink current
n Low output voltage offset
n No external resistors required
n Linear topology
n Suspend to Ram (STR) functionality
n Low external component count
n Thermal Shutdown
n Available in SO-8, PSOP-8 or LLP-16 packages
Applications
n DDR-I and DDR-II Termination Voltage
n SSTL-2 and SSTL-3 Termination
n HSTL Termination
Typical Application Circuit
20057518
November 2003
L
P
2
9
9
6
D
D
R
T
e
r
m
i
n
a
t
i
o
n
R
e
g
u
l
a
t
o
r

TS5V330
QUAD SPDT WIDEBANDWIDTH VIDEO SWITCH
WITH LOW ONSTATE RESISTANCE

SCDS164A MAY 2004 REVISED MAY 2004
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Low Differential Gain and Phase
(D
G
= 0.64%, D
P
= 0.1 Degrees Typ)
D Wide Bandwidth (BW = 300 MHz Min)
D Low Crosstalk (X
TALK
= 63 dB Typ)
D Low Power Consumption
(I
CC
= 3 A Max)
D Bidirectional Data Flow, With Near-Zero
Propagation Delay
D Low ON-State Resistance (r
on
= 3 Typ)
D V
CC
Operating Range From 4.5 V to 5.5 V
D I
off
Supports Partial-Power-Down Mode
Operation
D Data and Control Inputs Provide
Undershoot Clamp Diode
D Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Performance Tested Per JESD 22
2000-V Human-Body Model
(A114-B, Class II)
1000-V Charged-Device Model (C101)
D Suitable for Both RGB and
Composite-Video Switching
description/ordering information
The TI TS5V330 video switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (EN) input.
When EN is low, the switch is enabled and the D port is connected to the S port. When EN is high, the switch
is disabled and the high-impedance state exists between the D and S ports. The select (IN) input controls the
data path of the multiplexer/demultiplexer.
ORDERING INFORMATION
T
A
PACKAGE

ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN RGY Tape and reel TS5V330RGYR TE330
SOIC D
Tube TS5V330D
TS5V330
40C to 85C
SOIC D
Tape and reel TS5V330DR
TS5V330
40C to 85C
SSOP (QSOP) DBQ Tape and reel TS5V330DBQR TE330
TSSOP PW
Tube TS5V330PW
TE330 TSSOP PW
Tape and reel TS5V330PWR
TE330

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright 2004, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
D
D, DBQ, OR PW PACKAGE
(TOP VIEW)
RGY PACKAGE
(TOP VIEW)
1 16
8 9
2
3
4
5
6
7
15
14
13
12
11
10
EN
S2
D
S2
D
D
D
S1
C
S2
C
S1
A
S2
A
D
A
S1
B
S2
B
D
B
I
N V
G
N
D
C
C
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN
S1
A
S2
A
D
A
S1
B
S2
B
D
B
GND
V
CC
EN
S1
D
S2
D
D
D
S1
C
S2
C
D
C
C
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
3675
42/106

_______________Gener al Desc r i pt i on
The MAX202EMAX213E, MAX232E/MAX241E line
drivers/receivers are designed for RS-232 and V.28
communi cat i ons i n harsh envi ronment s. Each
transmitter output and receiver input is protected
against 15kV electrostatic discharge (ESD) shocks,
without latchup. The various combinations of features
are outlined in the Selection Guide. The drivers and
receivers for all ten devices meet all EIA/TIA-232E and
CCITT V.28 specifications at data rates up to 120kbps,
when loaded in accordance with the EIA/TIA-232E
specification.
The MAX211E/MAX213E/MAX241E are available in 28-
pin SO packages, as well as a 28-pin SSOP that uses
60% less board space. The MAX202E/MAX232E come
in 16-pin narrow SO, wide SO, and DIP packages. The
MAX203E comes in a 20-pin DIP/SO package, and
needs no external charge-pump capaci tors. The
MAX205E comes in a 24-pin wide DIP package, and
also eliminates external charge-pump capacitors. The
MAX206E/MAX207E/MAX208E come in 24-pin SO,
SSOP, and narrow DIP packages. The MAX232E/
MAX241E operate with four 1F capacitors, while the
MAX202E/MAX206E/MAX207E/MAX208E/MAX211E/
MAX213E operate with four 0.1F capacitors, further
reducing cost and board space.
________________________Appl i c at i ons
Notebook, Subnotebook, and Palmtop Computers
Battery-Powered Equipment
Hand-Held Equipment
____________________________Feat ures
o ESD Protection for RS-232 I/O Pins:
15kVHuman Body Model
8kVIEC1000-4-2, Contact Discharge
15kVIEC1000-4-2, Air-Gap Discharge
o Latchup Free (unlike bipolar equivalents)
o Guaranteed 120kbps Data RateLapLink
Compatible
o Guaranteed 3V/s Min Slew Rate
o Operate from a Single +5V Power Supply
M
A
X
2
0
2
E

M
A
X
2
1
3
E
,

M
A
X
2
3
2
E
/
M
A
X
2
4
1
E
15k V ESD-Prot ec t ed, +5V RS-232 Tr ansc ei ver s
________________________________________________________________ Maxim Integrated Products 1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V
CC
GND
T1OUT
R1IN C2+
C1-
V+
C1+
TOPVIEW
MAX202E
MAX232E
R1OUT
T1IN
T2IN
R2OUT R2IN
T2OUT
V-
C2-
DIP/SO
_________________Pi n Conf i gur at i ons
_____________________________________________________________Sel ec t i on Gui de
19-0175; Rev 3; 5/96
LapLink is a registered trademark of Traveling Software, Inc.
Pin Configurations and Typical Operating Circuits continued at
end of data sheet.
Ordering Information appears at end of data sheet.
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
Yes
PART
No. of RS-232
DRIVERS
No. of RS-232
RECEIVERS
RECEIVERS
ACTIVE IN
SHUTDOWN
No. of
EXTERNAL
CAPACITORS
LOW-POWER
SHUTDOWN
TTL THREE-
STATE
MAX202E 2 2 0 4 (0.1F) No No
MAX203E 2 2 0 None No No
MAX205E 5 5 0 None Yes Yes
MAX206E 4 3 0 4 (0.1F) Yes Yes
MAX207E 5 3 0 4 (0.1F) No No
MAX208E 4 4 0 4 (0.1F) No No
MAX211E 4 5 0 4 (0.1F) Yes Yes
MAX213E 4 5 2 4 (0.1F) Yes Yes
MAX232E 2 2 0 4 (1F) No No
MAX241E 4 5 0 4 (1F) Yes

M
A
X
2
0
2
E

M
A
X
2
1
3
E
,

M
A
X
2
3
2
E
/
M
A
X
2
4
1
E
15k V ESD-Prot ec t ed, +5V RS-232 Tr ansc ei ver s
______________________________________________________________________________________
____________Pi n Conf i gur at i ons and Typi c al Oper at i ng Ci rc ui t s (c ont i nued)
TOPVIEW
1
4
5
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
11
10
12
9
3
GND
C1-
C2+
5k
5k
C2-
T1IN
T2IN
R2OUT
R1OUT
VCC
+5VTO+10V
VOLTAGEDOUBLER
+10VTO-10V
VOLTAGEINVERTER
16
2
6
14
7
13
8
0.1F
0.1F*
16V
0.1F*
6.3V
0.1F*
16V
0.1F*
6.3V
C1+
RS-232
OUTPUTS
RS-232
INPUTS
-10V
+10V
V+
+5VINPUT
V-
T1OUT
R1IN
R2IN
T2OUT
T1
15
T2
R1
R2
PINNUMBERSONTYPICALOPERATINGCIRCUITREFERTO DIP/SOPACKAGE, NOTLCC.
* 1.0FCAPACITORS, MAX232EONLY.

16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V
CC
GND
T1OUT
R1IN C2+
C1-
V+
C1+
MAX202E
MAX232E
R1OUT
T1IN
T2IN
R2OUT R2IN
T2OUT
V-
C2-
DIP/SO
Table 3. DB9 Cable Connections
Commonly Used for EIA/TIAE-232E and
V.24 Asynchronous Interfaces
PIN CONNECTION
2 Receive Data (RD) Data from DCE
3 Transmit Data (TD) Data from DTE
4 Data Terminal Ready Handshake from DTE
5 Signal Ground
Reference point for
signals
6 Data Set Ready (DSR) Handshake from DCE
7 Request to Send (RTS) Handshake from DTE
8 Clear to Send (CTS) Handshake from DCE
9 Ring Indicator Handshake from DCE
1
Received Line Signal
Detector (sometimes
called Carrier Detect,
DCD)
Handshake from DCE



MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0
46/106
Meet with mega satisfaction



SPECIFICATION FOR APPROVAL


Part No. MLT186A
Description: LCD Power Supply Specification
Revision: 1.0
Customer. SANSUI ELECTRIC
Customer Approval No. :


Please return to us one original of SPECIFICATION FOR APPROVAL with your approved signatures.


APPROVED SIGNATURES

APPROVED BY DATE

CHOP & SIGNATURES:

SHENZHEN MEGMEET ELECTRICAL TECHNOLOGY CO.,LTD
Add: 6F Tower 2, Zhongjian Industrial Building
18 Yanshan Road , Shekou, Shenzhen, P.R.China
ZIP CODE:518067
TEL: (0755)26693042 26693442
FAX: (0755)26693047
E-mail: [email protected]




MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0
47/106
Spec.
Rev.
Sample
Rev.
Date Description Safety
by
Mechanical
by
Electrical
by
1.0 1.0
2005.
09.12
Zhangzhi Qiu Tony Yang





















MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0

Section
1. Power supply overview
1.1 Input Electrical Characteristics Overview
1.2 Output Electrical Characteristics Overview
1.2.1 Output Voltage ,Current & Regulation.
1.2.2 DC Output Ripple & Noise.
1.2.3 Output Transient Response.
1.2.4 DC Output Hold-Up Time.
1.2.4 DC Output Overshoot At Turn On & Turn Off.
1.2.6 DC output voltage rise time
1.3 Remote On/Off Control
1.4 Protection:
1.4.1 DC output Over Voltage Protection.
1.4.2 DC Output Over current Protection.
1.4.3 DC Output Short Circuit Protection.
1.4.4 Over Temperature Protection.
1.4.5 Reset After Shutdown.
2. Isolation
3. Safety
4. EMC
4.1 EMI
4.2 EMS
5. Environmental Requirement
5.1 Temperature
5.2 Humidity
5.3 Altitude
5.4 Cooling Method
5.5 Vibration
5.6 Impact
6. Dimension
7. Weight
8. Pin Connection
48/106


MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0
49/106
Spec.
Rev.
Sample
Rev.
Date Description Safety
by
Mechanical
by
Electrical
by
1.0 1.0
2005.
09.12
Zhangzhi Qiu Tony Yang





















MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0

2) Outputs shall be bypassed at the connector with a 0.1uF ceramic capacitor and a
10uF electrolytic capacitor to simulate system loading.


1.2.3 Output Transient Response.
Table 4. Test condition.
Voltage Tolerance Limit Slew Rate Load Change
V1/V35%
+V2 10%
+5V5%
+5.1VSB5%
0.2A/uS Min. to 50% load and 50% to Max load
all outputs 10% 0.2A/uS Min. load to Max load
Note: Transient response measurements shall be made with a load changing repetition
rate of 50Hz to 10kHz.

1.2.4 Table 5 DC Output Hold-Up Time.
Output Voltage 120Vac input 220Vac input
+V1/+V2(+24V) 10 mS 10 mS
+V3(+12V) 10 mS 10 mS
+5V/+5.1VSB 10 mS 10 mS
Note: All of dc output at full load.

1.2.5 Table 6 DC Output Overshoot At Turn On & Turn Off.
Over shoot voltage(V) Output Channel Output(V)
Turn on Turn off
+V1 +24V 2% 2%
+V2 +24V 5% 5%
+V3 +12V 2% 2%
+5V +5V 5% 5%
+5.1VSB +5.1V 5% 5%
Note: All of dc output current from Min. to Max.

1.2.6 Table 7 DC output voltage rise time
Output Voltage 120Vac input &Full Load 220Vac input &Full Load
+V1/+V2(+24V) 100 mS 100 mS
50/106


MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0
+V3(+12V) 100 mS 100 mS
+5V 100 mS 100 mS
+5.1VSB 100 mS 100 mS
Note: The output voltages shall rise from10% to 90% of their output voltage.


1.3 Remote On/Off Control
The power supply DC outputs (without +5.1Vsb) shall be enable with an active-high
TTL(2.0V/2.0mA)-compatible signal(Ps-on). The +5.1Vsb is on whenever the AC
power is present.

* When Ps-on is pulled to TTL high, the DC outputs are to be enabled.

* When Ps-on is pulled to TTL low or open circuit, the DC outputs are to be disabled.

Table 8.
Ps-on Signal Comments Outputs
Ps-on- high 2.5V&2.0mA ( source) Enable
Ps-on- low 1.5 V X
Ps-on-open -- X

1.4 Protection:
1.4.1 Table 9 DC output Over Voltage Protection.
Output Voltage Max. Over Voltage Comments
+V1(+24V) 28V Power supply latch into shutdown state

+5.0V 7Vtyp Hiccup
Note: The power supply shall be test at max AC voltage (270Vac) and min load or no load.



1.4.2 Table 10 DC Output Over current Protection.
Output Voltage Over Current Comments
51/106


MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0

+V1(+24V) 7Atyp Shutdown
+V2(+24V) 2Atyp Shutdown
+V3(+12V) 3A Shutdown
+5V/+5.1VSB 9A type Hiccup

1.4.3 Table 11 DC Output Short Circuit Protection.
Output Voltage Comments
+V1(+24V) Shutdown
+V2(+24V) Shutdown
+V3(+12V) Shutdown
+5V/5.1VSB Hiccup
1.4.4 Reset After Shutdown.
Recycle the ps-on signal, the power supply will restart after the fault removed.

2. Isolation
2.1 Table 12
Input To Output DC500V 50Mmin (at room temperature)
Input To FG DC500V 50Mmin (at room temperature)
Output To FG Non Isolated

2.2 Table 13
Input To Output 3000Vac 50Hz 1minute 10mA
Input To FG 1500Vac 50Hz 1minute 10mA
Output To FG Non Isolated
Note: Open FG and Output return.
3. Safety
The power supply shall compliance with the following Criterion:
1) UL60950
2) EN60950
3) GB4943-1995/GB8898-2001
52/106


MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0

4. EMC
4.1 EMI
The power supply shall compliance with the following Criterion:
1) Conduction Emission :
*EN55013, CLASS B
*GB13837-2003, CLASS B
*CISPR13:2001
2) Radiated Emission :
*EN55013, CLASS B
*GB13837-2003, CLASS B
*CISPR13:2001

4.2 EMS
The power supply shall compliance with the following Criterion:
1) ESD
*GB17626.2-1998/IEC61000-4-2 Lever 3
2) EFT
*GB17626.4-1998/IEC61000-4-4 Lever 3
3) SURGE
*GB17626.5-1998/IEC61000-4-5 Lever 3
4 DIP
*GB17626.11-1998/IEC61000-4-11 Class B/C
5. Environmental Requirement
5.1 Temperature
* Operating: -10 to +50.
* Store: -20 to +80.
5.2 Humidity
* Operating: From 10%to90% relative humidity (non-condensing).
* Store: From 5 to 95% relative humidity (non-condensing).
5.3 Altitude
* Operating: to10,000 ft.
* Store: to 20,000ft.
5.4 Cooling Method
* Ventilation cooling .
5.5 Vibration
* 10-55Hz, 49.0m/s(5G), 3minutes period, 20minutes each along X, Y and Z axis.
5.6 Impact
* 196.1m/s(20G),11ms, once each X, Y and Z axis.
53/106


MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0

6. Dimension
* 200mm X 130mm X 25mm (L *W * H ).
7. Weight
* 680g
8. Pin Connection
Table 15 CN3 VENTER:
NO. Pin Connection Function
1 +24VAUDIO +24VDC OUTPUT
2 +24VAUDIO +24VDC OUTPUT
3 GND +24VDC RETURN
4 GND +24VDC RETURN
Note: CN3 -- J ST VA CONNEETION, TYPE : pitch:2.0mm
Table 16 CN2 VENTER:
NO. Pin Connection Function
1 +24V +24VDC OUTPUT
2 +24V +24VDC OUTPUT
3 +24V +24VDC OUTPUT
4 +24V +24VDC OUTPUT
5 GND +24VDC RETURN
6 GND +24VDC RETURN
7 GND +24VDC RETURN
8 GND +24VDC RETURN
Note: CN2 -- J ST VA CONNEETION, TYPE : pitch:2.54mm

Table 17 CN1 VENTER:
NO. Pin Connection Function
1 +12V +12DC OUTPUT
2 +12V +12DC OUTPUT
3 +12V +12DC OUTPUT
4 GND +12V/+5VDC RETURN
5 GND +12V/+5VDC RETURN
54/106


MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0

6 GND +12V/+5VDC RETURN
7 +5V +5DC OUTPUT
8 +5V +5DC OUTPUT
9 +5V +5DC OUTPUT
10 +5V +5DC OUTPUT
11 +5V +5DC OUTPUT
Note: CN2 -- J ST VA CONNEETION, TYPE : pitch:2.0mm

Table 15 CN4 VENTER:
NO. Pin Connection Function
1 +5VSB +5VSB OUTPUT
2 +5VSB +5VSB OUTPUT
3 GND +5VSB RETURN
4 GND +5VSB RETURN
5 PS-ON PS-ON
Note: CN3 -- J ST VA CONNEETION, TYPE : pitch:2.0mm

Table 18 CON1 VENTER:
NO. Pin Connection Function
AC-L AC INPUT LINE
NC NC
AC-N AC INPUT NUTURE
Note: CN3 -- J ST VA CONNEETION, TYPE : pitch:3.96mm
Fig.8.1 Pin Connection (Top View)
55/106


MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0



56/106


MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0






57/106


MEGMEET
MEGMEET ELECTRICAL TECHNOLOGY CO., LTD.
DESCRIPTION:
SPECIFICATION
THESE SPECIFICATION ARE THE PROPERTY OF MEGMEET ELECTRICAL TECHNOLOGY CO., LTD
AND SHALL NOT BE REPRODUCED OR USED AS THE BASIS FOR THE MANUFACTURE OR SELL
OF APPARATUSES OR DEVICES WITHOUT PERMISSION.
Model No.:
MLT186
DATE PREPARED CHECKED APPROVED
REV:
09-12-2005 QIU ZHANGZHI TONY YANG
Document No.:
MLT186-1.0
1.0

9. Power Supply Mounting


58/106
P r o d u c t S p e c i f i c a t i o n Ver05 DL-06

SPECIFICATION








CUSTOMER

DESCRIPTION Slot-in DVD LOADER

MODEL DL-06 series(DL-06**)


CUSTOMER APPROVED









ISSUE DATE
2005.11.02
Approved
Checked by
Sales Dept.
Checked by
Technical Dept.
Prepared

59/106
Ver05 DL-06
1. Scope

1.1
This specification applies to Slot-in DVD mechanism for DVD player (thereafter called DVD
mechanism ). Foryou model : DL-06**.

1.2
Any query over the specification shall be expressed by R&D dept. of Foryou Multimedia
Electronics Co.,Ltd.
1.3
For improving performance purpose, this specification is subject to change according to
pre-agreement established between us.
1.4
Hardware and software or manufacturing process may subject to change for improvements
within the rang of the specifications.


2.
Dimension of shell and installation

2.1
See attachment for details of dimension of shell and installation.

3. General specification

3.1 Mechanism

3.1.1
Disc loading: Motorized loading.

3.1.2 Disc ejecting: Motorized ejection.

3.1.3 Play: Loading auto play

3.1.4 Skew adjusting: adjust two points on the base of spindle motor.

3.1.5 Pick-up feed mode: gear and rack drive.

3.1.6
Range of pick-up movement: 22.5mm ~ 59mm, from the center of spindle motor.

60/106
P r o d u c t S p e c i f i c a t i o n Ver05 DL-06
3.1.7
Anti vibration: two steps of dampers to reduce the vibration.

3.2 Power supply
DC12 1V600 mA& DC50.2V (660 mA) .

3.3 Pick-up

3.3.1
PVR-520TPVR-502WMITSUMIHOP-1200SWHITACHI
OPU-3153SANKYOSF-HD62SANYOSF-HD65SANYOtwo laser diode and
single object lens pickup.

3.4 Motor

Spindle motor: DC brush motor: CCM03-030R1-26O ( (Moretech).

3.4.1
3.4.2 Sled motor WRF-300CA-09600.

3.4.3 Loading motor WFF-050SB-10200.

3.5 Detect switch

3.5.1
Pick-up inner position detecting SW: WI-A278DS3-A-0001

3.5.2 Disc chucking detecting SW: ESE22 (Type B)1pcs

3.5.3 Disc detecting SW: ESE22 (Type B)2pcs (Panasonic).

3.6
Weight: approximate 476 g.

4. General performance

4.1 Disc specification
Diameter of disc1200.3800.3
Thickness of Disc1.2(+0.3,-0.1)
Type of disc
61/106
Ver05 DL-06
DVD Video;
CD-DA;
Video CD;
CD-R, CD-RW;

4.2
Prevention from the 2
nd
disc insertion: the second disc cant be loaded when there is a disc in
mechanism.

4.3
Noise Spec. 65 dBA
Noise level tests shall be carried out in an anechoic room with background noise 20 dBA or
less.Noise shall be measured at a position 10cm from the front of the mechanical section.


5.
Conditions of operation and storage

5.1 Operation temperature range: 0 ~ + 45 .

5.2 Range of storage: -20 ~ + 60

5.3
Operation moisture range: 10% ~ 80% RH.

5.4 Storage moisture range: 0% ~ 90% RH.

5.5
Atmospheric pressure: 860mBar ~ 1060 mBar.

6. Condition of performance evaluation

6.1
Installation: see attachment. Tightened on work table; Installation angle:
forth and back: 10 , left and right: 10 .

6.2 Environment of evaluation
252
Temperature
605RH Humidity

62/106
P r o d u c t S p e c i f i c a t i o n Ver05 DL-06
+15 ~ +30
Temperature
45% ~ 75%RH Humidity
Noise: in an anechoic room with background noise 20dB (A) or less.

6.3 Test circuit and equipment

6.3.1
Refer FORYOUs standard circuit and equivalent.



7. Reliability test

7.1 Environment test


Item
Specification
7.1.1
Test of high temperature
storage After 24hours kept at +60 , and then 16 hours at room temperature,
the mechanism shall be able to load/eject and playback within this
process.(Test disc:TCD-792 and TDV-520A)
7.1.2
Test of low temperature
storage After 24hours kept at -20 , and then 16 hours at room temperature,
the mechanism shall be able to load/eject and playback within this
process.(Test disc:TCD-792 and TDV-520A)
7.1.3
Test of high temperature
and high moisture storage After 48hours kept at +40 , 90%RH, and then 16 hours at ro om
temperature, the mechanism shall be able to load/eject and
playback within this process.(Test disc:TCD-792 and TDV-520A)
63/106
P r o d u c t S p e c i f i c a t i o n Ver05 DL-06
7.1.4
High and low temperature
cycling test Applied -20(1H)60(1H)(temperature slope 80/H)
5cycles,then place at normal temperature for 16 hours, the mechanism
shall be able to load/eject and playback within this process.(Test
disc:TCD-792 and TDV-520A)
7.1.5
Test of high temperature
operation
DVD mechanism shall be kept in 45 for 4 hours, and then operate,
the mechanism shall be able to load/eject and playback within this
process.(Test disc:TCD-792 and TDV-520A)
7.1.6
DVD mechanism shall be kept in 0 for 4 hours, and then operate,
the mechanism shall be able to load/eject and playback within this
process.(Test disc:TCD-792 and TDV-520A)
Test of low temperature
operation

7.2 Life test

Item Specification
7.2.1
Continue playback ability When a mechanism is executed for continuous playing at room
temperature for 1,000H, the mechanism shall be able to playback
standard disc TDV-520A and TCD-792.
7.2.2
Feed motion
After conduct 200,000 times of pick-up feeding motion at room
temperature, mechanism shall be able to playback standard disc
TDV-520A and TCD-792. (One cycle: inner outer inner).
7.2.3
Loading and ejection

At normal room temperature, after 10,000 times of disc loading and
ejection circulation, mechanism shall be able to playback standard disc
TDV-520A and TCD-792. (One cycle :Disc in playback disc out)


7.3

Drop and impact test:

Item Specification
64/106
P r o d u c t S p e c i f i c a t i o n Ver05 DL-06
7.3.1
Shock test (1 time ,6ms), 70G crash impact on each of 6 sides of mechanism. Mechanism
shall be able to playback standard disc TDV-520A and TCD-792.
7.3.2
Drop test After one time of drop test with surface, edge and corner (packing with 10sets
per carton), the mechanism shall be able to playback standard disc
TDV-520A and TCD-792.
Drop with surface: drop height 600mm, Drop sequence: bottom, front, left,
back, right. Each surface drop one time.
Drop with corner: drop height 450mm, Drop one of corners of carton bottom
one time.
Drop with edge: drop height 450mm, Each edge of drop corner (three edges)
drop one time.

7.4
Durability test of vibration

Item Specification
7.4.1
Acceleration 2.5G, Frequency 10~50Hz, sweep time 5minutes, test time is
20minutes with each of 3 directions. After that test, mechanism shall be able
to playback standard disc TDV-520A and TCD-792.
Durability test
of vibration

7.5
The test environment is the same as item 6.2 except for special note.

8.
Ref appearance drawing


9. Caution:

9.1
It is not allowed to disassembly and re-tune the mechanism without special training
because the mechanism is assembled and tuned using special method.

9.2
Storage: avoid storing the mechanism in high temperature, heavy wet and dusty place.

65/106
P r o d u c t S p e c i f i c a t i o n Ver05 DL-06
Handling: avoid extra force to the mechanism when handling.
9.4
Static-proof action should be taken when touch the mechanism since LD and OEIC can
be easily damaged by static.

9.5
Hand touch pickup is forbidden.

9.6
Must avoid laser beam shooting at eyes directly since the laser beam can hurt eyes.

10. Attachment

10.1
Model Description in detail


10.2
Appearance drawing of DL-06

10.3
Mechanism schematic diagram of DL-06set in PCB of customer

10.4
customer Servo PCB of DL-06

10.5
Package specification of DL-06

10.6
Guide of Mechanism installation and cantions on assembly
10.7
installation screw








Handling: avoid extra force to the mechanism when handling.
Handling: avoid extra force to the mechanism when handling.
9.3
66/106
P r o d u c t S p e c i f i c a t i o n Ver05 DL-06








10.1

Series
No.
Model
No.
Pick-Up SPINDLE MOTOR Loading motor Sled motor
1 DL-06L PVR-520T
(MITSUMI)
CCM03-030R1-26
O (Moretech)
WFF-050SB-102
00
WRF-300CA-09
600
2 DL-06LH HOP-1200
(HITACHI)
Same as above

3 DL-06H HOP-1200
(HITACHI)
Same as above

4 DL-06LS SF-HD62(65) Same as above
(SANYO)

5 DL-06LS-
M
SF-HD62 (65)
(SANYO) Same as above

6 DL-06LW PVR-502W

(MITSUMI)


67/106
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To : Normal for SECC
Date : 2004.11.15



ACCEPTED BY

TENTATIVE




APPROVED BY CHECKED BY PREPARED BY



Product Planning management General Division
CHUNGHWA PICTURE TUBES, LTD.
1127 Hopin Rd., Padeh, Taoyuan, Taiwan 334, R.O.C.
TEL: +886-3-3675151 FAX: +886-3-377-3054

Doc.No: CLAA320WA01-Ver1.2-041115 Issue Date: 2004/11/15
T- 3650002- 000- A NEW
CPT TFT-LCD

CLAA320WA01

68/106
CPT CHUNGHWA PICTURES TUBES, LTD.,

CPT Confidential CLAA320WA01-TENTATIVE-ver1.1

RECORD OF REVISIONS

Revision No. Date Page Description
Ver1.0 2004/10/18 all Preliminary specification was first issued .
Ver1.1 2004/10/25 -- Update
Ver1.2 2004/11/15 -- Update





















69/106
CPT CHUNGHWA PICTURES TUBES, LTD.,

CPT Confidential 70/106 CLAA320WA01-TENTATIVE-ver1.1

CONTENTS

No Item Page
1 OVERVIEW 3
2 ABSOLUTE MAXIMUM RATINGS 4
3 ELECTRICAL CHARACTERISTICS 5
4 INTERFACE PIN CONNECTION 10
5 INTERFACE TIMING 13
6 BLOCK DIAGRAM 18
7 MECHANICAL SPECIFICATION 19
8 OPTICAL CHARACTERISTICS 21
9 RELIABILITY TEST CONDITIONS 26
10 PACKAGING 27
11 DEFINITION OF LABELS 29
12 HANDLING PRECAUTIONS FOR TFT-LCD MODULE 31












CPT CHUNGHWA PICTURES TUBES, LTD.,

CPT Confidential 71/106 CLAA320WA01-TENTATIVE-ver1.1

1. OVERVIEW

CLAA320WA01 is 32 color (80.04cm) TFT-LCD (Thin Film Transistor Liquid Crystal Display)
module composed of LCD panel, LVDS driver ICs, control circuit and backlight. By applying 8 bit
digital data, 1366*768, 16.7 million-color images are displayed on the 32 diagonal screen. Interface of
data and control signals is Typ. Inverter for backlight is included in this module. General specification
are summarized in the following table:


1.1GENERAL INFORMATION
Items Specifications Unit
Display Area 697.68(H) 392.25(V) (31.51 inch diagonal) mm
Number of Pixels 1366(H) 768(V) 16:9
Pixel Pitch 0.51075(H) 0.51075(V) mm
Color Pixel Arrangement RGB Vertical Strip
Display Mode Normally Black
Number of Colors 16.7M (8bits) color
Surface Treatment
Hard coating : 3H ,
Anti-reflective coating <less than 2% reflection.

Total Module Power 115 W


1.2 MECHANICAL INFORMATION
Items Min Typ. Max. Unit
Horizontal(H) 742.0 743.0 744.0 mm
Vertical(V) 446.0 447.0 448.0 mm
without inverter 41.0 42.0 43.0 mm
Module
outline
dimension
Depth(D)
with inverter 43.0 44.0 45.0 mm
Module Weight 7900 8100 8300 g














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CPT Confidential 72/106 CLAA320WA01-TENTATIVE-ver1.1

2. ABSOLUTE MAXIMUM RATINGS
The following are maximun values which, if exceeded, may cause faulty operation or damage to the
Unit
ITEM SYMBOL MIN. MAX. UNIT Remark
Power Supply Voltage For LCD VCC -0.3 16.0 V
Input voltage of inverter VBL 21.6 26.4 V
Input current of inverter IIN -- 9 A
Inverter dimming VDIM 0 5 Vdc
Inverter frequency FL 43 53 kHz
Backlight striking time Ts 1 Sec.
ON 2.4 5 Vdc
Backlight on/off
control voltage
OFF
VBLON
0 1 Vdc
VESDt -100 100 V
ESD
VESDc -8000 8000 V
ICC Rush Current IRUSH -- 12 A
Operation Ambient Temperature Top

0 50 *1) *2) *3) *4)
Storage Temperature Tstg -20 60 *1) *2) *3) *4)
[Note]
*1) The relative temperature and humidity range are as below sketch, 90%RHMax. (Ta 40 )
Humidity 85%RH without condensation.
Relative Humidity 90% (Ta 40 ) , Wet Bulb Temperature 39 (Ta 40 )
*2) The maximum wet bulb temperature 39 (Ta 40 ) and without dewing.
*3) If you use the product in a environment which over the definition of temperature and humidity
too long ,this will effect the result of visual inspecfion.
*4) If you operate the product in normal temperature range, the center surface of panel should be
under 60 .


90%
10 20 30 40 50 60 70 80 0 - 20
0
10
20
30
40
50

Dry Bulb Temperature[C]


Wet Bulb
Temperature[C]
Storage
Operation
H
u
m
i
d
i
t
y

[
(
%
)
R
H
]

10%
40%
60%%
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CPT Confidential 73/106 CLAA320WA01-TENTATIVE-ver1.1

3. ELECTRICAL CHARACTERISTICS
(a). TFT-LCD Ta=25
ITEM SYMBOL MIN TYP MAX UNIT REMARK
LCD Power Supply Voltage VCC 11.4 12.0 12.6 V [Note 1]
Ripple Voltage Vrpd -- -- 100 mVp-p VIN=+12.0V
Rush current Irush -- -- 8 A [Note 2]
White -- 400 --
Black -- 350 --
LCD Power
Supply Current
RGB stripe
ICC
-- 390 --
mA [Note 3]
LCD power consumption Pc -- 6.48 9.7 W
High input voltage of LVDS V
IN+
-- -- 100 mV
Low input voltage of LVDS V
IN-
100 -- -- mV
Input common voltage of LVDS VCM -- 1.25 - V
Input terminal resist of LVDS R
T
-- 100 -- ohm
[Note 4]
[Note 5]

[Note 1] The module should be always operated within above ranges.
[Note 2] Measure conditions

DC
DC
+5V
R1
47k
R2
1k
VR1
47k
C1
1uF
C2
0.01uF
Q1
2SK1475
C3
1uF
FUSE
+15V
SW
(High to low)
(control signal)
Q2
2SK1470
VCC
LCD Module
Input


Vcc rising time is 1 ms



1ms
GND
+12V
0.1Vcc
0.9Vcc
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CPT Confidential 74/106 CLAA320WA01-TENTATIVE-ver1.1

[Note 3] The specified power supply current is under condition at Vcc=12V, Ta=25+/-2, f
v
=60Hz
whereas a power dissipation check pattern below is displayed.


a. White pattern b. Black pattern c. RGB Stripe pattern









[Note 4] Power and signal sequence
t1 30ms
0 t2 50ms
0 t3 50ms
300ms t4
500ms t5
100ms t6
300 t7 500ms
300 t8 500ms


















t1 t2 t3
data
0.9 VCC
0.9 VCC
0.1 VCC
VCC
0.1 VCC 0.1 VCC
t4
LCD Power Supply
Logic Signal
t5
t6
Backlight On/Off
BLON
Data: RGB DATA, DCLK, DENA
Backlight Power Supply
VBL
t7
t8



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VCC-dip state
1) When 9V VCC 11.4 V td 10 ms.
2) VCC 11.4V VCC-dip condition should also follow the VCC-turn-off condition.















[Note 5] LVDS signal definition

VID = VIN
+
VIN-
VCM = VCM
+
VCM-
VID = VID
+
VID-
VID+ = VIH
+
VIH-
VID- = VIL
+
VIL-
VCM = ( VIN
+
+VIN- ) / 2
VCM+ = ( VIH
+
+VIH- ) / 2,
VCM- =( VIL
+
+VIL- ) / 2
VIN+: Positive differential DATA CLK input
VIN-: Negative differential DATA CLK input




9V
11.4
RT
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CPT Confidential 76/106 CLAA320WA01-TENTATIVE-ver1.1

(b). Backlight
Ta=25
ITEM SYMBOL MIN TYP MAX UNIT REMARK
Lamp Voltage VL -- 1150 -- Vrms IL=5.0mA
Lamp Current IL 4.7 5.0 5.3 mArms [Note 1]
Lamp life time LT 50,000 60,000 -- hr [Note 2]
Input voltage of inverter VBL 21.6 24 26.4 V
Input current of inverter IIN 0 4.3 5 A
[Note 3]
Input frequency of inverter FL 43 48 53 KHz [Note 4]
Inverter dimming VDIM 0 -- 5 Vdc [Note 5]
Inverter duty ratio -- 30 -- 100 % VDIM=5V(MAX.)
Inverter opening voltage Vopen 2300 -- 2700 Vrms
ON 2.4 -- 5
Backlight on /of
control voltage
OFF
VBLON
0 -- 1
V [Note 6]
Power consumption
(Panel+ Backlight )
BLW -- 105 115 W After starting 30 mins
Ta=0 2300 -- 3000
Start up
Voltage
Ta=25
Vs
1960 -- 3000
Vrms

[Note]
*1) Lamp Current measurement method (The current meter is connected to low voltage end)
Take the average of 16 CCFLs lamp current as V
DIM
= 5V .

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*2) Definition of the lamp life time
When lamp luminance redue to 50% or lower than its initial value.

*3) Ripple voltage that occars at the instant of power-on cant exceed 30V.

*4) Electrical and optical characterisitics color chromaticity is not included can maintain in a range
+/- 10% when the inverter operates within this frequency range.

*5) Brightness is the darkest when V
DIM
= 0V ; Brightness is the darkest when V
DIM
= 5V .

*6) Backlight turns off when VBLON = 0V ; turns on when VBLON = 5V(24V must be input in advance)










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CPT Confidential 78/106 CLAA320WA01-TENTATIVE-ver1.1

4. INTERFACE PIN CONNECTION
(a).Connector Part No. FI-X30SSL-HF(JAE) or compatible
PIN NO SYMBOL DESCRIPTION NOTE
1 VCC Power supply: +12V
2 VCC Power supply: +12V
3 GND Ground
4 GND Ground
5 RxIN0- Data-
6 RxIN0+ Data+
7 GND Ground
8 RxIN1- Data-
9 RxIN1+ Data+
10 GND Ground
11 RxIN2- Data-
12 RxIN2+ Data+
13 GND Ground
14 RxCLKIN- Clock-
15 RxCLKIN+ Clock+
16 GND Ground
17 RxIN3- Data-
18 RxIN3+ Data+
19 GND Ground
20 NC Reserved
21 NC Reserved
22 NC Reserved [Note 1]
23 ColorMD1 Color Option (1) [Note 3]
24 ColorMD2 Color Option (2)
25 NC Reserved
26 NC Reserved
27 DMS LVDS Option [Note 2]
28 GND Ground
29 GND Ground
30 GND Ground
[Note 1] NC for internal use. Let it open.
[Note 2] High (3.3V) JEIDA LVDS format Low (GND) None-JEIDA
LVDS format,It should be input High or Low logic level it cant be NC(Open).
[Note 3] Color matrix selection. It should be input High or Low logic level it cant be
NC(Open).
ColorMD2 ColorMD1 Mode
L L Color 1(Native color)
L H Color 2
H L Color 3
H H Color 4
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CPT Confidential 79/106 CLAA320WA01-TENTATIVE-ver1.1

(b) LVDS Interface LVDS Receiver Tcon (LVDS Rx embeded)

LVDS PIN JEIDA-DATA Normal DATA
TxIN/RxOUT0 R2 R0
TxIN/RxOUT1 R3 R1
TxIN/RxOUT2 R4 R2
TxIN/RxOUT3 R5 R3
TxIN/RxOUT4 R6 R4
TxIN/RxOUT6 R7 R5
TxOUT/RxIN0
TxIN/RxOUT7 G2 G0
TxIN/RxOUT8 G3 G1
TxIN/RxOUT9 G4 G2
TxIN/RxOUT12 G5 G3
TxIN/RxOUT13 G6 G4
TxIN/RxOUT14 G7 G5
TxIN/RxOUT15 B2 B0
TxOUT/RxIN1
TxIN/RxOUT18 B3 B1
TxIN/RxOUT19 B4 B2
TxIN/RxOUT20 B5 B3
TxIN/RxOUT21 B6 B4
TxIN/RxOUT22 B7 B5
TxIN/RxOUT24 HSYNC HSYNC
TxIN/RxOUT25 VSYNC VSYNC
TxOUT/RxIN2
TxIN/RxOUT26 DENA DENA
TxIN/RxOUT27 R0 R6
TxIN/RxOUT5 R1 R7
TxIN/RxOUT10 G0 G6
TxIN/RxOUT11 G1 G7
TxIN/RxOUT16 B0 B6
TxIN/RxOUT17 B1 B7
TxOUT/RxIN3
TxIN/RxOUT23 RESERVED RESERVED




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(c) Inverter side connector PHR-14(JST)

PIN NO SYMBOL DESCRIPTION NOTE
1 VBL Supply Voltage 24V
2 VBL Supply Voltage 24V
3 VBL Supply Voltage 24V
4 VBL Supply Voltage 24V
5 VBL Supply Voltage 24V
6 GND Ground
7 GND Ground
8 GND Ground
9 GND Ground
10 GND Ground
11 NC NC(Test pin or else)
12 BLON ON/OFF Control [Note 1]
13 VDIM 0V~5V [Note 2]
14 GND GND

[Note 1] ON=5V , OFF=0V When this PIN is disconnecting with power the Inverter is in
OFF status.
[Note 2] Max Brightness =5V Min Brightness =0V When this PIN is disconnecting with
power the output status of Inverter is the same as VDIM 0V.




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5. INTERFACE TIMING(DE only mode)

(1) Timing Specification
ITEM SYMBOL MIN. TYP. MAX. UNIT
Freq. f
CLK
68 80 84 MHz
DCLK
Cycle t
CLK
14.7 12.5 11.9 ns
Line Rate f
H
43.17 48.54 53.33 kHz
Horizontal
total time
t
H
1575 1648 1936 t
CLK

Horiaontal
effective time
t
HA
--- 1366 --- t
CLK

Horizontal
Horizontal
blank time
t
HB
209 282 570 t
CLK

Frame Rate Fr 54.65 60 67.51 Hz
Vertical
total time
t
V
790 810 888 t
H

Vertical
effective time
t
VA
768 768 768 t
H

LCD
Timing
DENA
Vertical
Vertical
blank time
t
VB
22 42 120 t
H


[Note]
1).The best result of over-driving is in frame rate =60Hz.
2).This module is operated in DE only mode. Hsync and Vsync input signals should be set to low
logic level. Otherwise, this module would be operated abnormally.
3).DE (DATA ENABLE) is usually in positive.

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CPT Confidential 82/106 CLAA320WA01-TENTATIVE-ver1.1


(2) Timing Chart

a. Horizontal Timing





























DCLK
DATA
(R,G,B)
1

2

1365

1366

3

Invalid Data

Invalid Data

t
HA

t
HFP

t
HBP

t
H
=1/f
H

First Data

Last Data

DENA


1 2 767

768

3 Invalid Data

Invalid Data
t VFP

t VBP

tV=1/fV
LINE DATA
DENA
HD
tVA
b. Vertical Timing Chart
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(3) LVDS DATA MAPPING

a.None-JEIDA normal Specification





















b.JEIDA Specification





8bit LSB:R0,G0,B0

Parallel TTL Data Inputs Mapped to LVDS outputs


B2 DENA VD HD
B3 B3 B4 B5 B2
R1 R0 R4 R5 G0 R2 R3 R1 R0
G2 G1 B1 B0 G4 G5 G3 G2 G1
RXCLK
RXIN0
RXIN1
RXIN2
1CLK
DATA for current CLK cycle
NEXT
RXIN3 R6 Preserve B7 B6
R7
R7 G6 G7 R6
PREVIOUS
B4 DENA B5 B5 B6 B7 B4
R3 R2 R6 R7 G2 R4 R5 R3 R2
G4 G3 B3 B2 G6 G7 G5 G4
RXCLK
RXIN1
RXIN2
1CLK
DATA for current CLK cycle NEXT
RXIN3 R0 Preserve B1 B0 R1 R1 G0 G1 R0
PREVIOUS
VD HD
RXIN0
G3
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(4) LVDS INTERFACE
8bit LSB R0,G0,B0
Parallel TTL Data Inputs Mapped to LVDS outputs

TRANSMITTER(THC63LVD823) INTERFACE CONNECTOR
PIN NO INPUT DATA HOST TFT_LCD
TIMING CONTROLLER INPUT
51 TA0 R2
52 TA1 R3
54 TA2 R4
55 TA3 R5
56 TA4 R6
3 TA5 R7 (MSB)
4 TA6


TxOUT0+
TxOUT0-


TA+
TA-
G2
6 TB0 G3
7 TB1 G4
11 TB2 G5
12 TB3 G6
14 TB4 G7 (MSB)
15 TB5 B2
19 TB6


TxOUT1+
TxOUT1-


TB+
TB-
B3
20 TC0 B4
22 TC1 B5
23 TC2 B6
24 TC3 B7 (MSB)
27 TC4 Reserved
28 TC5 Reserved
30 TC6


TxOUT2+
TxOUT2-


TC+
TC-
DENA
50 TD0 R0 (LSB)
2 TD1 R1
8 TD2 G0 (LSB)
10 TD3 G1
16 TD4 B0 (LSB)
18 TD5 B1
25 TD6


TxOUT3+
TxOUT3-


TD+
TD-
Reserved

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(5) Color data assignment

[Note]
(1) Definition of gray scale
Color (n) n indicates gray scale level higher n means brighter level.
(2)Data 1-High 0-Low
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6. BLOCK DIAGRAM


CN2

CN3
Backlight +
Inverter

I
N
P
U
T

C
O
N
N
E
C
T
O
R


Timing
Controller
G
a
t
e

D
r
i
v
e
r


Voltage Supply
for Gray Levels


DC/DC
Converter
TFT-LCD Module
Source Driver

LCD Panel

1366 X 3 X 768
TA +/-
TB +/-
TC +/-
TD +/-
TCLK +/-
Vin=12V
GND


BACKLIGHT UNIT
Lamp connector
HV(CN2) BHR-02(8.0)VS-1(JST)*8 Mating connector SM02(8.0)B-BHS-1-TA(JST)
LV1(CN3) DF13-8P-1.25H(HRS)*2 LV2 DF13-8S-1.25H(HRS)*2
LV3 DF13-8S-1.25H(HRS)*2 Mating connector DF13-8P-1.25H(HRS)


















LV2
LV3
LV1
HV
LV3
LV1
LV2
HV
LV
LV
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7. MECHANICAL SPECIFICATION

(1) Front side ( include Inverter, if the dimension did not to eerance, please refer to the table. )
[Unit: mm]



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(2) Rear side ( include Inverter, if the dimension did not to eerance ,please refer to the table. )

[Unit: mm]



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8.OPTICAL CHARACTERISTICS
Ta = 25C, VCC=5V
ITEM SYMBOL CONDITION
MIN. TYP. MAX. UNIT REMARKS
Contrast (CEN) CR
= 0
Point-5
600 800 -- -- *1)*2)*3)
Central
luminance
Lwc = 0 500 550 -- cd/m
2

9P Luminance
(AVG)
Lw9 = 0 -- 500 -- cd/m
2
*2)*3)
Luminance
Uniformity Lw = 0 -- -- 75 % *2)*3)
Contrast Uniformity CR = 0 -- -- 75 % *1)*2)*3)
tr = 0 -- 7 15 ms *3)*4)
Response Time
( White Black )
tf = 0 9 15 ms *3)*4)
Response Time
(Gray to gray average)
trg, tfg -- 10 TBD ms *5)
2 h -- -- 5 sec *6)
Image sticking tis
24 h -- -- < 16 sec *6)
Horizontal -80~80 -85~85 -- *2)*3)
View angle
Vertical
CR 10
Point-5
-80~80 -85~85 -- *2)*3)
Crosstalk Ratio CMR = 0 -- -- 1 % *3)*7)
Red
Rx
Ry
0.610
0.295
0.640
0.325
0.670
0.355
Green
Gx
Gy
0.235
0.596
0.265
0.626
0.295
0.656
Blue
Bx
By
0.115
0.031
0.145
0.061
0.175
0.091
Color
Chromaticity
White
Wx
Wy
= 0
Point-5
0.253
0.267
0.283
0.297
0.313
0.327
-- *2)*3)
Color Temperature Tc -- 9300 -- K *3)
Color Gamut CG -- 72 -- % *8)

[Note]
These items are measured using BM-5A (TOPCON) [ under the dark room condition (no ambient
light). ]
Measurement Condition
After lighting on the panel 30 mins, you can proceed the Measurement testing.
The definiton of Typ ualue is under status of lamp current = 5 mArms.(AVG)

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Definition of these measurement items is as follows

*1) Definition of Contrast Ratio These items are measured using BM-5A (TOPCON) under the
dark room condition (no ambient light).

CR=ON (White) Luminance/OFF (Black) Luminance

*2) Definition of Luminance and Luminance uniformity and Contrast and Contrast Uniformity and the
Deviation of Color Coordinate

Luminance and Contrast To measure at the center position 5 on the screen (NO.5) see
Fig.8-1 below.
Luminance uniformity Lw (MAX) and Lw(MIN) are the maximum and minimum luminance
value measure at the position 1~5 on the screen (NO.1~5) see Fig.8-
1 and below show equation
Lw [ (Lw(MIN)) / Lw(MAX) ] 100%
Contrast Uniformity CR(MAX) and CR(MIN) are the maximum and minimum contrast value
measure at the position 1~5 on the screen (NO.1~5) see Fig.8-1 and
below show equation.
CR [ CR(MIN)] / CR(MAX) ] 100%
The Deviation of Color Coordinate To measure at the position 1~9 on the screen (NO.1~9)
see Fig.8-1 below.



1
6 2
7 5 8
3 9 4
(1, 1)
128
384
640
228 683

1138
(1366, 768)


Figure 8-1. Measurement positions






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*3) Definition of Viewing Angle ( )



Figure 8-2. Definition of Viewing Angle



*4) Definition of Response Time ( White Black )

L u m i n a n ce
9 0 % 9 0 %
1 0 %
t f t r
Wh i t e (2 5 5
t h
)
B l a ck (0) 1 0 %


Figure 8-3. Definition of Response Time ( White Black )


*5) Definition of Response Time ( Gray to Gray ,9 9 levels )


Luminance
90% 90%
10%
tfg
trg
(Gray Scale Level)
(0~255
th
)
(0~255
th
)
10%


Figure 8-4. Definition of Response Time (Gray to Gray )

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CPT Confidential 92/106 CLAA320WA01-TENTATIVE-ver1.1

The driving signal time means the signal of gray level 0 31 63 95 127 159 191 223
255.
Gray to gray average means the average switching time of gray level 0 31 63 95 127
159 191 223 255 to each other.
The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature
change during measuring. In order to stabilize the luminance the measurement should be
executed
after lighting Backlight for 1 hour in a windless room.

*6) Image sticking test method:
Continuously display the test pattern shown in the figure below for specified time. To change the
module frame to gray pattern ( gray 127 pattern ) , and its displaying grade still under
specfication.














Figure 8-4. the pattern of Image sticking test
3 0 - P i x e l






W h i t e B l o c k
( 2 5 6 G L )
3 0 3 0 - P i x e l
3 0 - P i x e l
B l a c k B a c k g r o u n d
( 0 G L )
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*7) Definition of Cross talk Ratio
CMR = MAX ( ( | ( LB1-LA ) / LC | ) 100 ( | (LB2 LA ) / LC | ) 100 )
LA Pattern A(Half-Tone pattern) Measure point Luminance
LB1 LB2 Pattern B1 Pattern B2 Measure point Luminance
LC Pattern C(white pattern) Measure point Luminance



























Figure 8-4. Cross talk


*8) Definition of Color Gamut:
To measure RGB three sub-pixels color gamut coordinate at CIE coordinate chart from the center
of module , to form a triangle area = A
RGB
.

RGB three sub-pixels of NTSC at CIE coordinate chart to form a triangle area = N
RGB
.



A
RGB
N
RGB
CG =

100
Pattern B1
Gray 127
Black
Pattern A Pattern C
Gray 127 white
Pattern B2
Gray 127
white
(1366,768)
(0,0)
(1024,576)
(341,192)
(1195,384)
(683,96)
(683,672)
measurement point
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9.RELIABILITY TEST CONDITIONS

(1) Temperature and Humidity

TEST ITEMS CONDITIONS
High Temperature Operation 50 240hrs
High Temperature Storage 60 240hrs
High Temperature
High Humidity Operation
50 90% RH 240 hrs
(No condensation)
Low Temperature Operation 0 240 hrs
Low Temperature Storage -20 240 hrs
Thermal Shock
Between -20 (1hr) and 60 (1hr)
100 Cycles

(2) Shock & Vibration

ITEMS CONDITIONS
Shock
(Non-Operation)
Shock level 980m/s
2
(100G)
Waveform half sinusoidal wave, 2ms
Number of shocks one shock input in each direction of three
mutually perpendicular axes for a total of six shock inputs.

Vibration
(Non-Operation)
Vibration level 9.8m/s
2
(1.5G) zero to peak
Waveform sinusoidal
Frequency range 10 to 300 Hz
Frequency sweep rate 0.5 octave/min
Duration one sweep from 10 to 300Hz in each of three mutually
perpendicular axis(each x y z axis 10 min total 30 mins)


(3) Judgment standard
The judgment of the above test should be made as follow:
Pass: Normal display image with no obvious non-uniformity and no line defect.
Partial transformation of the module parts shall be ignored.
Fail: No display , obvious non-uniformity, or line defects.






CPT CHUNGHWA PICTURES TUBES, LTD.,

CPT Confidential 95/106 CLAA320WA01-TENTATIVE-ver1.1

10.PACKAGING
10.1 PACKING SPECIFICATIONS
(1) 3 LCD TV modules/1 Box
(2) Box dimensions 975(L) x 375(W) x 562(H)
(3) Weight approximately 31.6kg (3 modules per box)

10.2 PACKING METHOD
Fiqurs 1 and 2 are the packing method




























Fiqure 1 packing method





EPE FOAM
32 MODULE
(3PCS)
EPE PAD BOTTOM
CARTON
CARTON
LABEL
CPT CHUNGHWA PICTURES TUBES, LTD.,

CPT Confidential 96/106 CLAA320WA01-TENTATIVE-ver1.1



(1) Corner protector L1125 x 50mm x 50mm
(2) Pallet L1000 x W1150 x H130mm
(3) Bottom Cap 1000 x W1150 x H130mm
(4) Pallet Stack 1000 xW1150 x H1250mm
(5) Gross 201kg















Fiqure2 packing method




:6
pallet:10kg









Fiqure2 packing method














Carton label
CPT CHUNGHWA PICTURES TUBES, LTD.,

CPT Confidential 97/106 CLAA320WA01-TENTATIVE-ver1.1



11. DEFINITION OF LABELS
11.1 CPT Module Label
The barcode nameplate is pasted on each module as illustration, and its definitions are as
following explanation.

(a) LABEL









- Model Name CLAA320WA01
- Panel ID XXXXXXXX XXX

CPT Internal Use.

- Product date X XX XXXX X XXX

Customer NO.

Product Line.

Serial NO.

Week.

Year.



(b) MODULE LABEL :




(c) B/L MAKER LABEL :





CHUNGHWA
CLAA320WA01
Panel ID:xxxxxxxx xxx
Product date:xxxxxxxxx xxx
Model Name Barecode

CPT CHUNGHWA PICTURES TUBES, LTD.,

CPT Confidential 98/106 CLAA320WA01-TENTATIVE-ver1.1



(d) Disposal label



11.2. Handling precaution
(1) Dont disassemble and reassemble the module by self.

(2) Acid, alkali, alcohol or touched directly by hand will damage the display.

(3) Static electricity will damage the module. Please configure grounding device.

(4) The strong vibration, shock, twist or bend will cause material damage, even module broken.

(5) It is easy to cause image sticking while displaying the same pattern for very long time.

(6) The response time, brightness and performance will vary from different temperature.

(7) The inverter will cause high temperature and high voltage, be careful please.






















CPT CHUNGHWA PICTURES TUBES, LTD.,

CPT Confidential 99/106 CLAA320WA01-TENTATIVE-ver1.1


12. HANDLING PRECAUTIONS FOR TFT-LCD MODULE

Please pay attention to the followings in handling- TFT-LCD products

12.1 ASSEMBLY PRECAUTION
(1) Please use the mounting hole on the module side in installing and do not beading or wrenching
LCD in assembling. And please do not drop, bend or twist LCD module in handling.

(2) Please design display housing in accordance with the following guidelines.
Housing case must be destined carefully so as not to put stresses on LCD all sides and not to
wrench module. The stresses may cause non-uniformity even if there is no non-uniformity
statically.
Keep sufficient clearance between LCD module back surface and housing when the LCD
module is mounted. Approximately 1.0 mm of the clearance in the design is recommended
taking into account the tolerance of LCD module thickness and mounting structure height
on the housing.
When some parts, such as, FPC cable and ferrite plate, are installed underneath the LCD
module, still sufficient clearance is required, such as 0.5mm. This clearance is, especially, to
be reconsidered when the additional parts are implemented for EMI countermeasure.
Design the inverter location and connector position carefully so as not to give stress to lamp
cable, or not to interface the LCD module by the lamp cable.
Keep sufficient clearance between LCD module and the others parts, such as inverter and
speaker so as not to interface the LCD module. Approximately 1.0mm of the clearance in
the design is recommended.

(3) Please do not push or scratch LCD panel surface with any-thing hard. And do not soil LCD
panel surface by touching with bare hands. (Polarizer film, surface of LCD panel is easy to be
flawed.)

(4) Please do not press any parts on the rear side such as source TCP, gate TCP, control circuit
board and FPCs during handling LCD module. If pressing rear part is unavoidable, handle
the LCD module with care not to damage them.

(5) Please wipe out LCD panel surface with absorbent cotton or soft clothe in case of it being soiled.


(6) Please wipe out drops of adhesives like saliva and water on LCD panel surface immediately.
They might damage to cause panel surface variation and color change.

(7) Please do not take a LCD module to pieces and reconstruct it. Resolving and reconstructing
modules may cause them not to work well.

(8) Please do not touch metal frames with bare hands and soiled gloves. A color change of the metal
CPT CHUNGHWA PICTURES TUBES, LTD.,

CPT Confidential 100/106 CLAA320WA01-TENTATIVE-ver1.1

frames can happen during a long preservation of soiled LCD modules.

(9) Please pay attention to handling lead wire of backlight so that it is not tugged in connecting with
inverter.


12.2 OPERATING PRECAUTIONS
(1) Please be sure to turn off the power supply before connecting and disconnecting signal input
cable.

(2) Please do not change variable resistance settings in LCD module. They are adjusted to the most
suitable value. If they are changed, it might happen LCD does not satisfy the characteristics
specification.

(3) Please consider that LCD backlight takes longer time to become stable of radiation characteristics
in low temperature than in room temperature.

(4) A condensation might happen on the surface and inside of LCD module in case of sudden change
of ambient temperature.

(5) Please pay attention to displaying the same pattern for very long time. Image might stick on LCD.
If then, time going on can make LCD work well.

(6) Please obey the same caution descriptions as ones that need to pay attention to ordinary electronic
parts.


12.3 PRECAUTIONS WITH ELECTROSTATICS
(1) This LCD module use CMOS-IC on circuit board and TFT-LCD panel, and so it is easy to be
affected by electrostatics. Please be careful with electrostatics by the way of your body
connecting to the ground and so on.

(2) Please remove protection film very slowly on the surface of LCD module to prevent from
electrostatics occurrence.


12.4 STORAGE PRECAUTIONS
(1) When you store LCDs for a long time, it is recommended to keep the temperature between 0
~40 without the exposure of sunlight and to keep the humidity less than 90%RH.

(2) Please do not leave the LCDs in the environment of high humidity and high temperature such as
60 90%RH.

CPT CHUNGHWA PICTURES TUBES, LTD.,

CPT Confidential 101/106 CLAA320WA01-TENTATIVE-ver1.1


(3) Please do not leave the LCDs in the environment of low temperature; below -20.


12.5 SAFETY PRECAUTIONS
(1) When you waste LCDs, it is recommended to crush damaged or unnecessary LCDs into pieces
and wash them off with solvents such as acetone and ethanol, which should later be burned.

(2) If any liquid leaks out of a damaged-glass cell and comes in contact with the hands, wash off
throughly with soap and water.


12.6 OTHERS
(1) A strong incident light into LCD panel might cause display characteristics' changing inferior
because of polarizer film, color filter, and other materials becoming inferior. Please do not
expose LCD module direct sunlight Land strong UV rays.

(2) Please pay attention to a panel side of LCD module not to contact with other materials in
preserving it alone.

(3) For the packaging box, please pay attention to the followings:
Packaging box and inner case for LCD are designed to protect the LCDs from the damage or
scratching during transportation. Please do not open except picking LCDs up from the box.
Please do not pile them up more than 3 boxes. (They are not designed so.) And please do not
turn over.
Please handle packaging box with care not to give them sudden shock and vibrations. And
also please do not throw them up.
Packing box and inner case for LCDs are made of cardboard. So please pay attention not to
get them wet. (Such like keeping them in high humidity or wet place can occur getting them
wet.)












Spare Part List for LCT3201TD

Item Part Number Part Description Usage /
unit
Unit
1 E6203-32TD01 DISPLAY LCD 32" 1 piece
2 771EL32AD02-01 MAIN PCBA 1 set
3 E7802-005006-1 DVD BOARD 1 piece
4 771-L27AD02-01 TERMINAL PCBA 1 set
5 E7802-005008 POWER PCBA 1 set
6 771-L27AD01-01 KEY PCB ASSY 1 set
7 771-L32AD01-03 KEY PCB ASSY MICO DVD 1 set
8 771-L32AD01-01 REMOTE RECEIVE PCBA 1 set
9 771LL27AD02-01 TUNER & AUDIO PCBA 1 set
10 E4101-027001 POWER SWITCH 1 piece
11 E4801-124001 SPEAKER 2 piece
12 E4802-014001 TWEETER 2 piece
13 E3219-002003 POWER SOCKET 1 piece
14 E3471-000048 KEY WIRE FOR DVD 1 piece
15 E3471-000045 WIRE WS SHIELD WIRE FOR 32LCD TV+COMBO
DVD SILGNAL WIRE-6
1 piece
16 E3421-925032 WIRE ASSY PH2.0-4Y/4Y L=450MM AMP24V 1 piece
17 E3461-064022 WIRE WF FLAT WIRE P2.0 9P/11P FOR 32LCD
TV+COMBO DVD POWER WIRE
1 piece
18 E3461-064019 TV+COMBO FOR DVD POWER WIRE 1 piece
19 E3421-925038 WIRE ASSY TJC3-2Y L=850MM SPK-L 2 piece
20 E3421-925053 WIRE ASSY FOR TV&DVD AUDIO L/R/MUTE 1 piece
21 E3421-925054 WIRE ASSY FOR TV&DVD TUNER 1 piece
22 E3471-000044 WIRE FOR COMBO MICO KEY 13P/8P+5P 1 piece
23 E3421-925061 POWER SOCKET CABLE 1 piece
24 E3461-064018 WIRE WF FLAF WIRE FOR 32LCD TV+COMBO
DVD STANDBY POWER WIRE
1 piece
25 E3461-064021 WIRE FOR COMBO DVD BOARD +SV POWER 1 piece
26 E3461-064028 WIRE INVERTER 14P/2.0+8P/2.5+12P/2.0 La=780
L6=640 CPT
1 piece
27 E3421-924009 WIRE ASSY 2P L120 2 piece
28 E3471-002002 WIRE WS SHIELD WIRE FOR 32LCD
TV+COMBO DVD SIGNAL WIRE
1 piece
29 E3471-001002 WIRE WS SHIELD P1.0 0P L=220 FOR CPT 1 piece
30 E3421-229007 WIRE 3P 1 piece
31 E3404-157001 AC CORD 1 Piece
32 200-L32AD02-STD01
AV
CABINET FRONT SIL/BLK 1 Piece
33 370-42D101-01 RUBBER FOOT 6 piece
34 E7301-011002 BATTERY AA 2 Piece
103/106
Spare Part List for LCT3201TD

Item Part Number Part Description Usage /
unit
Unit
35 790-R00105-01 REMOTE CONTROL 1 piece
36 202-L32AD01-01AV CABINET BACK BLACK 1 piece
37 236-L32AD01-01RV DVD COVER GREY 1 piece
38 258-L32AD01-01RV DVD KEY PANEL GREY 1 piece
39 231-L32AB21-01RV BASE COVER SILVER 1 set
40 277-L32AD11-03S FUNCTION KEY 1 piece
41 481-L32AB04-01S SHIELD BOX (VSC) 1 piece
42 481-L32AD01-01S SHIELD BOX FOR POWER 1 piece
43 483-L32AB12-01S SHIELD COVER (VSC) 1 piece
44 436-L32AB04-01S TERMINAL SHEET 1 piece
45 481-L32AD03-01S SHIELD BOX DVD FOR AUO 1 piece
46 429-L32AD01-01S POWER JACK BRACKET 1 piece
47 263-R00101-01L REMOTE LENS 1 piece
48 269-42SD01-01L REMOTE RECEIVE LENS 1 piece
49 277-L32AD02-01S DVD FUNCTION KEY 1 piece
50 206-L32AD01-01RV SPEAKER CABINET BACK GREY 1 piece
51 510-L32AD01-MTU02
K
GIFT BOX AKAI 1 piece
52 300-L32AD04-02C POLFOAM TOP 1 piece
53 300-L32AD05-02C POLFOAM BOTTOM 1 piece
54 310-111404-07V POLYBAG 11"X14"X0.04 1 piece
55 310-041204-01V POLYBAG 4"X12"X0.04 1 piece
56 310-423850-07V BAG LAMIFILM 42"X38"X0.5MM 1 piece
57 580-L32ADHS-TU02L INSTRUCTION MANUAL 1 piece
58 388-42D103-01H CAUTION LABLE 1 piece
59 388-42SB04-01H POWER PLATE 1 piece
60 387-L32AD01-MTU02
H
MODEL PLATE 1 piece
61 384-L32AD01-MTU01
H
SHEET FOR TERMINAL 1 piece
62 590-L32AD01-01 WARRANTY CARD 1 piece
63 593-L32AD01-02 INSERTION CARD 1 piece
64 579-L32AD02-01 UPC LABEL OF G/B 2 piece
65 568-P46T02-02 WARNING LABEL 1 piece
66 579-L32AD04-01 LASER WARNING LABEL 1 piece
67 579-42D103-02 ON/OFF LB ENG 1 piece
68 579-42D102-09 SERIAL NO/BAR CODE LABEL 1 piece
69 579-L32AD03-02 CLASS I LASER PRODUCT LOGO 1 piece
70 579-42D105-01 PROTECTIVE EARTH LABE 1 piece
104/106
If you forget your V-Chip Password
- Omnipotence V-Chip Password: 8205.
- Press MENU button.
- Press LEFT RIGHT buttons to highlight "MISC" Menu.
- Press Up, Down buttons to highlight "Parentald".
- Press ENTER button to pop up "Input your Password Please".
- Use the Number buttons (0~9) to enter an omnipotence Password.
- Press ENTER button to confirm and your can select "CHANGE PASSWORD".
- Suggest: Change to your familiar Password again.
Software upgrade
- Connect the RS-232C input jack to an external control device (such as a computer) and software upgrade.
Type of connector; D-Sub 9-pin male
1
No. Pin name
5
1 No connection
2 RXD (Receive data)
3 TXD (Transmit data)
4 DTR (DTE side ready)
5 GND
9
6 DSR (DCE side ready)
7 RTS (Ready to send)
6
8 CTS (Clear to send)
9 No Connection
RS-232C configurations
7-wire configuration 3-wire configuration
(Standard RS-232C cable) (Not standard)
PC PDP PC PDP
2
3
5
4
6
7
8
2
3
5
6
4
8
7
TXD
TXD
RXD TXD RXD 2
3
5
4
6
7
8
2
3
5
4
6
7
8
RXD
GND
RXD TXD
GND
DTR
GND GND
DTR
DSR
DSR DTR
DSR
RTS
DTR DSR
RTS
CTS
CTS RTS
CTS
RTS CTS
D-Sub 9 D-Sub 9 D-Sub 9 D-Sub 9
7475
105/106
Software upgrade Process

- Power Switch OFF.
- Connect the serial port of the control device to the RS-232 jack on the LCD-TV back panel.
RS-232C connection cables are not supplied with the LCD-TV.
- Power Switch ON. The power indicator on the front of the panel should now display red, means
that the LCD-TV is in standby mode.
- Copy the software (MTKTOOL) to the computer.
- Open the software (MTKTOOL.EXE)
- Select MTK 8205 and Point "browse" on the interface of the MTKTOOL.exe.
- Select the file which will be update.
- Point "update" on the interface of the MTKTOOL.exe.
- Waiting for the upgrader programing, when it is finished, the bar will display 100%.
- After the upgrader is finished, shut down the power switch, take out the RS-232C connection
after the power indicator is extinguished.

Note: After upgrading, the first time of power on will be some long.

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