CHAPTER 1 INTRODUCTION OF SPINTRONICS

1.1 INTRODUCTION
Spintronics is a rapidly emerging field of science and technology that will most likely have a significant impact on the future of all aspects of electronics as we continue to move into the 21st century. Conventional electronics are based on the charge of the electron. Attempts to use the other fundamental property of an electron, its spin, have given rise to a new, rapidly evolving field, known as spintronics, an acronym for spin transport electronics that was first introduced in 1996 to designate a program of the U.S. Defense Advanced Research Projects Agency (DARPA). Initially, the spintronics program involved overseeing the development of advanced magnetic memory and sensors based on spin transport electronics Studies of spinpolarized transport in bulk and low-dimensional semiconductor structures show promise for the creation of a hybrid device that would combine magnetic storage with gain in effect, a spin memory transistor. Magnetic materials and magnetic devices have occupied a major place in science and technology for most of the twentieth century and played a very important role in the emergence of the digital computer by providing both ferrite core and plated wire memories. It was not until the early 1980s that thin-film magnetism was applied to higher-density nonvolatile random access memory .A new path leading to the integration of magnetic devices into computer technology began to emerge with the discovery of giant magneto resistance (GMR at low temperatures and high magnetic fields. Although it was known for quite some time that the current from a magnetic metal is spin-polarized and that current transport through adjacent magnetic layers depends on the spin-polarization of those layers, neither the magnitude of the current nor the temperature at which it was observed were of technological significance. Discoveries in this new field were quite rapid, and the path toward a new technology started to appear quite early. The first significant GMR device was the spin valve. Two experiment in 1920 is suggested spin as an additional property of the electron. One was the closely spaced splitting of Hydrogen spectra lines, called fine structure. The other was stern Gerlach experiment, which in 1922 that a beam of silver atoms directed through an inhomogeneous magnetic field would be forced to two beams. These pointed towards magnetism associated with the electrons tiny magnet. Magnetism is already been exploited in recording devices. Where data is recorded and stored as tiny areas of magnetized iron or chromium oxide.

1.2 EVALUTION OF SPINTRONICS

Spintronics came into light by the advent of Giant Magneto Resistance (GMR) in 1988. GMR is 200 times stronger than ordinary Magneto Resistance. It results from subtle electron spin effects in ultra multilayer of magnetic materials that cause a huge change in electrical resistance. The discovery of Spin Valve Transistor (GMR in magnetic multilayer) has let to a large number of studies on GMR systems. Usually resistance of multilayer is measured with the Current in Plane (CIP). For instance, Read back magnetic heads uses this property. But this suffers from several drawbacks such as; shunting and channeling, particularly for uncoupled multilayer and for thick spaced layers diminish the CIP magneto resistance. Diffusive surface scattering reduces the magneto resistance for sandwiches and thin multilayer. To erase these problems we measure with Current Perpendicular to the Plane (CPP), mainly because electrons cross all magnetic layers, but a practical difficulty is encountered; the perpendicular resistance of ultra thin multilayer is too small to be measured by ordinary techniques. The use of Micro fabrication techniques for CPP measurements, from 4.2 to 300k was first shown for Fe/Cr multilayer, where the multilayer were etched into micro pillars to obtain a relatively large resistance (a few milli ohms). These types of measurements have confirmed the larger MR for the CPP configuration, but they suffer from general complexity of realization and measurement techniques. Experiments using electro deposited nano wires showed CPP MR up to 15% at room temperature, such multilayer find an application in Spin Valve Transistors. A spin valve multilayer serves as a base region of an n silicon metal base transistor structure. Metal base transistors have been proposed for ultrahigh frequency operations because of 1. Negligible base transport time. 2. Low base resistance, but low gain prospects have limited their emergence. The first evidence of a spin valve effect for hot electrons in Co/Cu multilayer is the spin valve transistor. In this we see a very large change in collector current (215% at 77K) under application of magnetic field of 500 Oe. In spin valve transistor (SVT) electrons are injected in to metallic base across a Schottky barrier (Emitter side) pass through the spin valve and reach the opposite side (Collector side) of transistor. When these injected electrons traverse the metallic base electrons are above Fermi level, hence hot electron magneto transport should be considered in Spin Valve Transistor (SVT). The transport properties of hot electrons are different from Fermi electrons .For example spin polarization of Fermi electrons mainly depends on Density Of States (DOS) at Fermi level, while the spin polarization of hot electron is related to the density of unoccupied states above the fermi level. For the preparations of transistor we apply direct bonding, both to obtain device quality semiconductor material for the emitter and to allow room temperature process. The starting material for both emitter and collector is a 380um, 5-10Ocm,n-si (100) wafer. After back side n++ implantation ,wafer is dry oxidized to anneal the implant and to form a SIO2 layer .After depositing a Pt ohmic contact on to the back side, wafer is sawn in to 10X10mm collector and 1.6X1.6mm emitters. Collector is subsequently dipped in HNO3, 2% HF to remove the native oxide on silicon fragments,5% Tetra methyl Ammonium Hydroxide at 90, and buffered HF to remove thermal oxide .following each step the collector is rinsed in demineralised water. After this procedure base multilayer (Cu 2nm/Co 1.5nm), is rf sputtered through a laser cut metal shadow mask on to the collector substrate defining square base regions slightly larger than the emitter surface. Directly after cleaning the emitter in a similar manner its hydrophobic surface is contacted to the multilayer surface, forming a bond through
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spontaneous adhesion. Here metal parts were laid down directly on to the doped Silicon base layer, which resulted in the information of metal filicides at the interface. These degrade device performance due to the large depolarizing effect they have on the flow of spin polarized charge carriers through the interface which severely reduces the magnetic sensitivity of devices.

1.3 THE SPIN VALVE EFFECT

GMR effect can be observed in the conduction process in magnetic materials, particularly the transition metals Fe, Co and Ni. Conduction electrons are divided in to two classes , those whose spin is parallel to the local magnetization and those whose spin is anti parallel .The resistance to the flow of an electronic current in a metal is determined by the scattering processes to which the electrons are subject. If the scattering processes are strong and effective, the mean free path (mfp) of an electron between scattering processes is small and the resistance is large. Conversely, weak scattering processes lead to a long mfp and a low resistance.

Fig 1.1 Graph of conduction in multilayer magnetic film array, showing how different spin scattering produces a different resistance for antiparallel (a) and parallel (b) film magnetizations.
Consider now electronic conduction in a multilayer array such as shown in Fig. 3.1 In Fig. 3.1a the magnetic moments of successive ferromagnetic layers (Co) are ant parallel due to antiferromagnetic coupling across the spacer layer (Cu). In (b) they are parallel due to an external magnetic field which is strong enough to overcome the antiferromagnetic coupling. In case of Fig.3.1a , antiparallel moments, no electron can traverse two magnetic layers without becoming unfavored , highly scattered species. An electron conserves its spin orientation as it traverses a solid .Therefore if it was the favored 'up' electron in an 'up' magnetization layer it becomes the unfavored 'down' electron in an 'up' magnetization layer as soon as it traverses the few ngstroms of the spacer layer. In the case depicted in Fig.3.1a , by contrast, an electron having the favored 'up' spin orientation in one magnetic layer has the same favored orientation in all layers, and can traverse the array relatively freely. For configuration (a) no electron traverses the array freely; for (b) half of the electron species can traverse the array relatively freely, and a significant difference in resistance is measured between the parallel and anti-parallel arrays.

1.4 GIANT MAGNETORESISTANCE

Magnetic field sensors have found many applications: read heads in audio/video/computer systems, magnetic random access memories (MRAMs), position/ rotation/ velocity sensors in cars/ aircrafts/satellites, electronic compass applications, measurement of currents and scientific measurement instruments. Other applications for magnetoresistive sensors include coin evaluation, non-contact switching, and measurement of currents. An important issue in digital magnetic recording is the bit density and several new technologies have pushed this density forward. Future high density recording systems will depend increasingly on more sensitive field sensors, because of the shrinking bit sizes and magnetic fluxes. The thin film head, the thin film media and subsequently the introduction of magnetoresistance heads enhanced the annual bit density increase drastically. Due to tailoring of the magnetic materials in the base, the spin valve transistor shows a broad measurable field range and may further enhance bit densities. A major advantage of using magnetoresistive sensing of magnetic fields as compared to inductive sensing is the static measurement mode of the MR sensor: a static magnetic field can be detected in contrast to inductive pick-up coils for which a voltage is only generated by a temporal flux change. For magnetic recording, the increase of density leads to a corresponding reduction in magnetic signal. Inductive head designs have compensated for the weakening signal by increasing the number of turns in the coil, but each turn adds approximately 0.5 ohm of resistance to the circuit, with a corresponding increase in thermal noise. Beyond 1 Gbit/in2, this thermal noise of the coil becomes the main limitation preventing signal detection. This new magnetoresistance called "Giant Magnetoresistance", was discovered in 1988 in magnetic multilayers. It was soon called the spin valve effect because the magnetic layers act as valves for electrons with different spin moments (spin up and spin down). The spinvalve transistor consists of three regions: a spin-valve base, a hot electron injector such as a Schottky barrier or a tunneling barrier and a collector barrier which discriminates between scattered and ballistic (not scattered) electrons. The base can be made of any magnetoresistive metal system.

CHAPTER 2 BASIC PRINCIPLES OF SINGLE ELECTRON SPIN VALVE TRANSISTOR

In this work we investigate the electronic transport properties of a single-electron spin- valve transistor, i.e. a single-electron transistor (SET) composed of two ferromagnetic leads which are tunnel coupled to a metallic island. This system contains three main ingredients. At rst it represents a transistor, which is one of the most important electronic devices invented in the 20th century. Secondly, the magnetized components brake the spin symmetry and therefore spintronics play an important role. And at last, due to the small size of the island also Coulomb-interaction eects have to be taken into account. Hence in this chapter we will start by giving a brief introduction to every three parts, transistors in general, single-charge tunneling, and spintronics. The central electrode of the considered single-electron spin-valve transistor exhibits a continuous electron density of states. By using quantum dots (discrete energy spec- trum) instead of metallic islands SETs with similar transport characteristics can be realized. However, there are dierences between discrete and continuous spectra which are explained in a separated section of the present chapter. Furthermore, in the clos- ing paragraph, we will briey review some fundamental theoretical and experimental works concerning SETs, to give an overview of the transport characteristics and the dierent realization techniques of such devices.

2.1 TRANSISTOR
A transistor is an electronic device that can switch and amplify an electronic signal. It is used as a fundamental building block of products of the modern electronic industry and hence it is omnipresent in todays society. The general idea is to control the cur- rent in an output circuit by tuning a small input current or voltage. There are a lot of di erent kinds of transistors, and all of them contain at least three electrodes including input and output terminals. The majority of transistor types are based on semicon- ducting materials, but by exploiting single-charging eects, as our work proposes, it is also possible to create transistors out of normal metals or even ferromagnets. The rst working transistor was a point-contact transistor constructed in the Bell Labora- tories. After years of underlying work J. Bardeen and W. H. Bratain nally build it in 1947.2 They were working together with W. B. Shockley and every three of them were awarded the Nobel Prize in Physics in 1956 for their joint researches concerning transistors and semiconductors. Since nowadays the eld-eect transistor (FET) is the most common transistor, we want to discuss the functionality of this device in detail. More precisely we consider an

Fig 2.1: Cross section of n-channel metal- oxide semiconductor eld-eect transistor. n-channel metal-oxide semiconductor eld-eect transistor (nMOSFET), but the basic concept stays the same for all FETs. A scheme of the nMOSFET is shown in Fig.2.1. The source and drain electrodes are connected to highly doped n-type semiconductor regions embedded in a weakly p-doped Si crystal. Isolated from the semiconductor by an oxide layer, the gate electrode enables to control the current between source and drain. In combination with the base electrode a capacitor is realized that can modulate the charge concentration between the nregions by tuning the potential dierence of gate and base. For gate voltages larger than a given threshold (Vgate > Vth) n-channels open in the p-n transition area of the p-substrate. By applying a voltage between source and drain one can then drive a current from the left to the right n-doped region. By a further increase of the gate voltage also the current from source to drain increases due to a higher electron density in the transition region. But there is also a saturation gate voltage Vsat due to the fact that for Vgate > Vsat all the lead electrons in the transport relevant energy window dened by source-drain voltage nd an open n-channel to pass the device. Hence in this limit the current no longer depends on Vgate. In conclusion, it is possible to switch the transistor from the o-state into the conducting state by applying a gate voltage that exceeds Vth. Following the trend of miniaturization in electronics also transistors have continu- ously reduced in size since their rst realization in 1947. Nowadays, by using pho - tolithography it is possible to build computer chips with a transistor density larger than 106 transistors per mm2 in mass production. This enables that transistors, as a basic component of integrated electronic circuits, are present in nearly all modern electronic devices. As the device dimensions approach the nanometer scale quantum mechanics and Coulomb-interaction eects become important. Hence conceptually new kinds of a transistor are demanded. An exemplary transistor structure that relies on quantum mechanics and Coulomb-interaction eects is the so called single-electron transistor (SET). In this system the continuous movement of electrons like in common transistors is replaced by a discrete charging and discharging of a central electrode with single electrons. In the following paragraphs, we will introduce in detail to the eld of SETs due to the fact that the structure considered in this thesis (single-electron spinvalve transistor) is a particular realization of a SET.

2.2 SINGLE CHARGE TUNNELING

As mentioned in the previous paragraph, the proceeding reduction of the size of electronic devices using transistors evokes that quantum mechanics and Coulomb- interaction eects will be crucial for the understanding of the future transistor struc- tures like SETs. The behavior of these devices is governed by the electrostatic energy and their functionality is based on transport of single charges.3 We exemplarily con- sider charge transport through a small metallic island that is tunnel coupled to metallic source and drain leads, see Fig.2.2. With an additional gate capacitively coupled to

Fig 2.2: SET as model system of single- charge tunneling. Source and drain leads are connected to a small cen- tral electrode (island) via tunnel junctions. A gate is capacitively coupled to the island.

the island, the system represents a SET. A net current through the system can be generated by applying a nite bias voltage. Transport takes place by subsequent tun- neling of electrons from the source through the island into the drain. To observe single-charging eects, quantum uctuations of the number of electrons occupying the island must be negligible. The wave functions of island electrons have to be localized. Therefore, the resistances of the tunnel barriers must be large in comparison to the inverse conductance quantum 2e2/h. Naturally, the most important energy scale in the context of single-charge phenomena is the Coulombrepulsion energy of electrons. Excess electrons tunneling onto the island have to overcome the energy dierence be- tween the charging states before and after the tunneling event. If the island is occupied by N electrons, the charging energy is given by Ech =e2 2C(N Next)2, (2.1) with C = Csource + Cdrain + Cgate being the sum of the junction capacitances and the capacitance of an eventually applied gate voltage. Typical values of C in realized systems are about fF down to aF. The applied voltages induce an external charge Qext = eNext = CsourceVsource+CdrainVdrain+CgateVgate. In Fig.2.3 the charging energy is plotted against the external charge. We see, that the energy which is necessary to change the charging state of the island is maximal for Qext being equal to multiples of the elementary charge and even vanishes for half-integer values of e. In the latter case, electron transport is possible independent of temperature or bias voltage. In conclusion, the bias voltage, that has to be applied to change the island charging state, strongly depends on the applied gate voltage, see also Fig.2.4 (a). The diamonds, which are called Coulomb diamonds, mark the regimes where the number of island electrons N is xed. In their parameter range the current is blocked and the system is in the Coulomb blockade regime. Due to asymmetric capacitances Csource 6= Cdrain the upper and lower corner of the diamonds are slightly shifted. As discussed above
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Fig 2.3: Coulomb energy of the island for dierent charging states N over external charge Qext. Red circles mark the degeneracy points between two adjacent charging states.

a variation of Qext by tuning the gate voltage can switch the transistor from the blocking into the conducting state. In the limit Vbias,kBT e2/(2C) this results in conductance peaks as illustrated in Fig.2.4 (b). The peaks of these Coulomb oscillations appear periodically at the degeneracy points of Ech between two adjacent charging states. The width of the peaks is governed by temperature. This fact is related to a general requirement to observe single charging phenomena. To ensure that thermal uctuations do not smear out charging eects it is necessary that the condition Ech kBT is fullled.

Fig 2.4: SET transport properties. (a) Coulomb diamonds mark the regime of Coulomb blockade. (b) Coulomb oscillations are periodic peaks in the conductance (Vbias = 0). For both plots the parameters Vsource/drain = Vbias/2 and 2Csource = Cdrain = 4Cgate were chosen.

2.3 METALLIC ISLAND AND QUANTUM DOT SINGLE ELECTRON TRANSISTOR

As mentioned before, in this thesis the electronic transport through a single-electron spin-valve transistor is studied. This system is a particular realization of a SET with a metallic island (hosting a continuum of single-particle energy levels) being the meso- scopic central part of the device. It is also possible to realize SETs by replacing the island by a quantum dot with a discrete excitation spectrum. Both kinds of SETs exhibit the same basic transport properties as presented in section 2.2. However, there are detailed features in the transport characteristics that depend on the present energy-level spectrum. Hence in this paragraph we will consider both metallic island and quantum dot coupled via tunnel junctions to two normal metallic leads in order to indicate their dierences in transport. A SET composed of a metallic island / quantum dot tunnel coupled to normal source and drain leads is modeled by the total Hamiltonian

describes the metallic island / quantum dot whose energy spectrum l,island/dot is con- tinuous or discrete, respectively. A continuous spectrum is existent if the level spacing is small compared to the other relevant energy scales like temperature or bias voltage ( kBT,eVbias). The annihilation and creation operators of island/dot electrons in the state l() are denoted by cl() and c l(), respectively. The index l labels the energy levels of the central region, {,} the spin, and = 1,...,Nc is the transverse channel index. In the case of a quantum dot, due to the geometry of the system, multiple transverse channels do not exist. The Coulomb interaction of the electrons occupying the central region is accounted for by the charging-energy term

where N is the number of electrons on the island/dot and C = Csource + Cdrain + Cgate the total capacitance. For equal capacitances of the two tunnel junctions and a symmetrically applied transport voltage, the external charge eNext = CGVG depends on the gate voltage VG only. Each of the normal leads is described as a reservoir of noninteracting fermions

with indices for momentum k and asource/drain () k being the annihilation (creation) operator of the respective lead. The leads are macroscopic objects, hence their energy spectrum source/drain k is continuous. We emphasize that the transverse channel index only appears for SETs containing a metallic island. The tunneling Hamiltonian Htunnel = Htunnel, source + Htunnel, drain describes tunneling of electrons between the central part of the SET and the leads, and the two contributions are dened as:

Both the spin and for the island system also the transverse channel index are con- served during tunneling. This is obvious from the fact that the tunneling Hamil- tonian is diagonal in and . The tunneling-matrix elements Tsource/drain are as- sumed to be independent of momentum k, spin , and transverse channel index . The tunneling rate for electrons from source/drain into the central part is quantied by source/drain/~ = 2source/drain Tsource/drain 2 /~, with the lead densities of states source/drain. In addition, we dene = source + drain. After the presentation of the model, we now want to examine the transport pro- cesses through metallic-island and quantum-dot SETs. First, the system containing a quantum dot is considered. In the limit of zero temperature, two possible trans- port situations are illustrated in Fig.2.5 (a)-(b) by means of energy diagrams. The

Fig 2.5: Energy scheme of tunneling through SETs. (a) Sequential tunneling through dis- crete level structure of a quantum dot, (b) QD cotunneling, (c) sequential tunneling through continuous spectrum of a metallic island, and (d) island cotunneling. lled rectangles on the left and right-hand side of the scheme illustrate the levels of the continuous density of states of the leads that are lled up to the Fermi level. A temperature unequal to zero evokes a nite probability for occupation of higher levels. In the central part the discrete energy spectrum of the dot is represented by horizontal lines, the black disks mark electrons occupying the states, and the white ones repre- sent holes excited in the leads due to tunneling. The positions of the lines include both the dot level spacing and the charging energy that is necessary to occupy the respective charging state of the dot. A variation of the gate voltage evokes a change of the external charge eNext and results in a shift (up or downwards) of the whole central level structure. By applying a bias voltage Vbias the Fermi levels of
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source and drain are adjusted and the resulting transport window determines the relevant transport processes. Sequential-tunneling processes are dominant if the dot level lies within the transport window. These processes, which are of rst order in tunnel-coupling strength , are illustrated in Fig.2.5 (a). The electrons with the respective energy can tunnel into the dot and out of the dot one at a time, i.e., electrons tunnel through the dot in two uncorrelated processes. In Fig.2.5 (b) the transport window does not enclose any quantum dot level. The system is in the Coulomb-blockade regime. Sequential tun- neling through the system is impossible (T = 0) and, therefore, cotunneling processes are dominant. Due to the fact that Heisenbergs uncertainty principle allows a short violation of energy conservation electrons can coherently tunnel through the dot in the depicted mode. The additional energy to occupy the dot level with a source electron for a short time is regained by subsequent tunneling into the drain. The dot state is virtually occupied (dashed circle). For the whole process, which is of second order in the tunnel-coupling strength , energy is conserved. Sequential tunneling and cotunneling processes through a metallic island enclosed by two normal leads can be visualized by energy schemes in an analog way, see Fig.2.5 (c)- (d). The discrete levels (black lines) in the central part of the quantum dot diagram are replaced by a continuum of states (blue rectangles). In contrast to the macroscopic leads, the charging energy is the dominant energy scale. Hence for dierent island occupation numbers N the whole spectrum is energetically shifted. This behavior is visualized by dierent rectangles each representing the density of states in a given charge state. Although the rectangles are conned at the bottom all the levels below the Fermi energy are occupied. We choose this kind of illustration due to the fact that dierent charge states have to be shown in a single scheme. To ll the island with an additional electron a level above the Fermi energy has to be occupied. In both diagrams, describing sequential tunneling (Fig.2.5 (c)) and cotunneling (Fig.2.5 (d)), after the transport process the island is occupied by N electrons. Concerning the latter, during the process the central electrode is virtually occupied by N + 1 electrons. In this work, we consider a metallic island that is weakly tunnel coupled to the leads, hence sequential tunneling is dominant. Higher order processes like cotunneling are suppressed and not included in the used formalism. But already in the sequential- tunneling limit quantum-dot and metallic-island SETs exhibit dierent current-voltage characteristics. Again, we start with the consideration of the quantum-dot SET. The transport voltage Vbias is symmetrically applied to both leads and the discrete energy spectrum of the dot is chosen in such a way that only one level, that can be occupied by a single electron or doubly occupied by two electrons with dierent spins, contributes to transport. The respective current-voltage characteristics is shown in Fig.2.6 (a) for dierent ratios of the leads tunnel-coupling strengths. At low positive and negative Vbias the quantum-dot level lies outside the transport window and the initial dot charge state, dened as N0, does not change, i. e., the system is in the Coulomb blockade regime. The current increases stepwise whenever an energy level enters the transport window while the sign of Vbias determines the transport direction. This variation of current in a steplike manner results in peaks in the conductance (G = dI/dV ) of the quantum-dot SET, see Fig.2.6 (b). There are two steps / peaks for positive

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Fig 2.6: Transport character- istics of quantum-dot tunnel coupled to two normal leads in sequential tunneling limit. (a) Current (over applied bias voltage Vbias) increases stepwise due to the discrete dot energy spectrum. (b) The peaks in the conduc- tance represent the excitation energies of higher dot charge states. (c)-(d) Corre- sponding occupation probabilities of the relevant charge states for symmetric and asymmetric tunnel couplings, respectively. The bias voltage sym- metry of the system is broken by asymmetric couplings. and negative bias due to the two dierent charging states (N0 + 1 and N0 + 2), that can additionally be occupied. In Fig.2.6 (c)-(d) the occupation probabilities of the relevant charge states are plotted over transport voltage for symmetric and asymmetric couplings to the leads, respectively. It is obvious that an asymmetric coupling to source and drain breaks the bias voltage symmetry of the system. In this case, the direction of transport is important since depletion and lling probabilities of the dot depend on the involved tunnel junction. This can be seen in Fig.2.6 (d), for positive bias voltage electrons tunnel from source into the dot with a relatively high probability dened by source, but depletion of the dot via tunneling to drain is suppressed due to the small coupling drain. As a result, if the transport voltage is large enough the system tends to occupy the higher charge states. This behavior changes for negative Vbias as lling (drain) is suppressed and depletion (source) is enhanced. In this situation, the probability to nd the quantum dot in the lowest possible charge state N0 is
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dominant. A SET composed of a metallic island tunnel coupled to two normal leads exhibits transport characteristics similar to those of a quantum-dot SET, see Fig.2.7. The current through the island SET as a function of bias voltage is plotted in Fig.2.7 (a).

Fig 2.7: Transport characteris- tics of metallic-island tunnel coupled to two normal leads in sequential tunneling limit. (a) Current (over applied bias voltage Vbias) increases continuously. Coulomb steps are strongly sup- pressed for symmetric coupling to leads. The island density of states is denoted by I. (b) The peaks in the conductance represent the excita- tion energies of island charge states. (c)-(d) Corresponding occu- pation probabilities of the relevant charge states for symmetric and asymmetric tunnel couplings, respectively. The bias voltage sym- metry of the system is broken by asymmetric couplings. As in the quantum-dot case, the asymmetric lead coupling leads to a reduction of the current and an asymmetric bias dependance. The latter can better be seen in the conductance (Fig.2.7 (b)) and in the respective plot of the occupation probabilities (Fig.2.7 (d)). Analog to the quantum-dot SET, the bias asymmetry is caused by the dierent depletion and lling probabilities dened by the couplings source and drain. For negative transport voltage depletion of the island is favored and for positive Vbias the island is primarily lled up with additional electrons. Now, we want to discuss the dierences in transport characteristics
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compared to the dot system. At low bias voltages, the transport through both systems is blocked until eVbias exceeds the Coulomb blockade threshold and the next charging state N0 + 1 enters the transport window. By further increasing of the bias applied to the island SET, more and more levels of the continuous spectrum contribute to transport, and after each charging step the current increases continuously in contrast to the discrete dot spectrum. An asymmetric choice of tunnel couplings pronounces the Coulomb steps of the charge states entering the transport window which are strongly suppressed in the symmetric island case, see Fig.2.7 (a).4,5 The discussed replacement of the constant plateaus between the Coulomb steps in the quantum-dot SET by the continuous increase of the island system, naturally leads to a non-vanishing conductance between the peaks marking the charge-state excitation energies, see Fig.2.7 (b). To conclude, in this paragraph we considered a quantum dot and a metallic island tunnel coupled to two normal leads. Both systems are basic representations of SETs. We discussed their transport properties and illustrated sequential tunneling and co- tunneling processes. The current-voltage characteristics of the systems are similar but exhibiting a few di erences that are addressed to the dierent energy spectra of the central parts of the SETs.

2.4 SPINTRONICS
It is obvious that the replacement of the central region (metallic island or quantum dot) is not the only possibility to change transport properties of SETs. To control not just the charge but also the spin degrees of freedom of transport electrons ferromagnetic components can be integrated into the device, e. g., by using ferromagnetic leads. Due to the magnetism spintronic eects will appear in such structures. In the past decades, the eld of spintronics was intensively investigated and corresponding devices already play an important role in todays information technologies.69 The discoverers of the giant-magnetoresistance eect (GMR eect), which is one of the major advancements concerning spintronics, received the Nobel Prize in Physics in 2007. At the same time, but independently P. Grunberg and A. Fert investigated Fe/Cr multilayer structures and discovered the GMR.10,11 In this paragraph we will introduce the reader to the eld of spintronics. To this end, we will discuss the spin valve, the GMR, and the related tunnel-magnetoresistance eect (TMR eect). For SETs containing ferromagnetic and nonmagnetic materials spin accumulation in normal metals and, depending on the explicit setup, an interaction induced exchange eld are of great importance. Hence we will also present the fundamentals concerning these spintronic eects.

2.4.1 SPIN VALVE

Typical examples of spintronic devices are spin valves, see Fig.2.8. The polarization directions of at least two ferromagnetic layers enclose an arbitrary angle . The coercive elds of the ferromagnets dier, hence the angle is tunable by an outer magnetic eld. By applying a nite bias voltage a charge current I can be driven through the system. There are two dierent typical choices of sample geometry. On the one hand the current ows parallel to the multilayer planes and on the other hand normal to the interfaces. In both cases, due to the nite polarization of the layers the magnitude of I strongly depends on . The underlying phenomenas causing this behavior (GMR and TMR) are explained in detail in the following two paragraphs 2.4.2 and 2.4.3, respectively. Since the polarization angle and hence the current is very sensitive to an outer magnetic eld, spin valves are of great technological interest. In

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industry spin valves used as magnetic-eld sensors are suitable especially in the context of modern storage devices, e. g. as read heads in hard-disc drives.

Fig 2.8: Scheme of a spin valve. The polar- ization directions of two ferromag- nets enclose an angle . A bias voltage V can be applied to drive a current I (perpendicular to the lay- ers) through the system. The mag- nitude of I strongly depends on and the angle is tunable by an outer magnetic eld.

2.4.2 SPIN ACCUMULATION

A fundamental spintronic eect, that is crucial in the context of ferromagnetic SETs, is the so called spin accumulation. It arrises in ferromagnetic/normal metal heterostruc- tures. During transport of electrons from a ferromagnet into a normal metal one spin type is dominant. Hence spin angular momentum is transferred to the normal con- ductor and a nite magnetization builds up. First experimental observations of spin accumulation at ferromagnetic/paramagnetic interfaces were performed by M. Johnson and R. H. Silsbee in the 1980s.18,19 There are a lot of subsequent works observing spin accumulation in dierent systems containing mesoscopic islands,20,21 spin valves,2225 and even graphene.2630 To introduce spin accumulation in more detail we consider a simple model system, see Fig.2.11, that consists of a large metallic region enclosed by antiparallel aligned ferromagnetic source and drain leads.31 The related densities of states (Stoner model)

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Fig 2.9: Spin-accumulation model system.31 Two antiparallel polarized ferromagnets enclose a normal metal. The spin dependent interface resistances lead to a splitting of the Fermi energies on the central electrode. are shown below the three regions. A non-equilibrium situation is created by applying a bias voltage Vsource Vdrain that drives a current from source to drain through the system. We choose the spin quantization axis to point in the magnetization direction of the left ferromagnet and treat the two spin sorts as independent electron channels. Caused by the nite spin polarization of the source lead at the Fermi surface mainly up electrons enter the central region. But for these electrons transmission from the normal metal into the drain is suppressed because there are just a few spin-up states available. The chemical potential of the central region adjusts in such a way that a constant current ow through the system is guaranteed and spin accumulation is de- scribed by the resulting spin splitting of the chemical potential of the normal conductor. In the considerations above we assumed that the ratio between chargevariation and spin-relaxation time is small. Otherwise the spin imbalance will decay between two tunneling events, and no spin will accumulate.

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CHAPTER 3 SPIN VALVE TRANSISTOR EFFECTS

3.1 CONCEPT AND PRINCIPLE
The spin-valve transistor is a three-terminal device analogous to a metal base transistor. Here, a metal base that contains a spin valve is sandwiched between two n-type Si wafers, as shown in figure 2. It employs hot electron transport across the spin valve. In order to achieve injection of hot electrons into the spin valve a metalsemiconductor interface with a high Schottky barrier is created at the emitter of the spinvalve transistor. Since SiPt gives a high Schottky barrier, the SiPt interface is used as the emitter diode. The injected hot electrons traverse through the spin valve and reach the collector side of the spin-valve transistor. The collector Schottky diode is defined in such a way that it has a lower barrier height compared to the emitter diode. Here a SiAu Schottky diode is used as the collector diode. It has nearly 0.1 eV less barrier height compared to the SiPt Schottky diode. In figure 3, the schematic energy level diagram of a representative spin-valve transistor with a SiPt emitter diode, SiAu collector diode and a NiFe/Au/Co spin valve is given (NiFe = Ni0.81Fe0.19). A forward bias of the emitter injects hot electrons into the spin valve (emitter current IE). The collector Schottky diode is either reverse biased or zero biased. While the hot electrons traverse the spin valve they undergo elastic as well as inelastic scattering. Those electrons which approach the collector barrier with sufficient energy and suitable momentum surmount the collector barrier and constitute the collector current (IC). The inelastic scattering of hot electrons results in the loss of energy for these electrons and most of these electrons are not collected, as they have insufficient energy to overcome the collector barrier. Even the electrons which are elastically scattered are sometimes not collected because their momentum is changed. The electrons which are incident on the collector at an angle normal to the surface or very close to the normal are only collected due to the need for momentum conservation .An additional scattering mechanism which is governed by the spins of the electrons plays a dominant role is the spin dependent scattering when two magnetic layers are present in the spin valve. The spin-dependent scattering of hot electrons is determined by the magnetic state of the spin valve. As the perm alloy (NiFe) and cobalt magnetic layers have two different coercivities and are separated by a non-magnetic gold spacer layer, they can be aligned, either with their magnetizations parallel to each other or antiparallel to each other by applying suitable magnetic fields. The hot electrons after passing to the perm alloy layer are spin polarized as most of the minority spin carriers have extremely low mean free paths. These spin-polarized electrons traverse through the Au layer and reach the Co layer. Now, depending upon the direction in which the Co layer is magnetized, they either pass through or are scattered. When the magnetizations of the perm alloy and the Co are parallel to each other the spin-dependant scattering is less and most of these electrons are expected to pass through the Co layer, and we obtain a maximum collector current. When the magnetizations are aligned opposite to each other, due to high spin-dependent scattering we obtain a lower collector current. So the collector current is expected to be extremely sensitive to the magnetic state of the spin valve. As the magnetic state of the spin valve can be intelligently controlled by suitable magnetic fields we get a magnetic field dependence for the Collector current. As the electrons traverse across both the magnetic layers this configuration resembles the current perpendicular to the plane geometry of conventional giant
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magnetoresistive multilayer; this is expected to increase the sensitivity of the device. Additionally here the electrons have an energy that is nearly 0.9 eV above the Fermi level and the spin-dependent scattering asymmetry is expected to be higher than that observed for the Fermi electrons.

Fig 3.1 Ballistic And Scattered Electron Transport

Fig 3.2 Schematic diagram of the cross-section of a spin-valve transistor showing the emitter, base and collector. The emitter is forward biased and the collector is reverse biased. IE is the emitter current and IC is the collector current. The base layer contains a spin valve (NiFe/Au/Co) in addition to a SiPt emitter diode and a SiAu collector diode.

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Fig 3.3 The schematic energy diagram of the spin-valve transistor showing the SiPt emitter and SiAu collector Schottky barriers and the spin-valve base. EF is the Fermi level, VBE is the base-emitter bias, VBC is the base-collector bias. The Schottky barrier heights are also given

3.2 CURRENT TRANSFER

The emitter bias accelerates the electrons over the emitter barrier, after which they constitute the hot, quasi-ballistic electrons in the base. The probability of passing the collector barrier is limited by collisions in the base, which affect their energy and trajectory (momentum), by optical phonon scattering in the semiconductors and by quantum mechanical reflections at the base-collector interface. For a metal base transistor with a single metal base film the relationship between the collector current density Jc and the injected emitter current density Jinj is (4.1)

ncy. Jleakage is the collector leakage current, determined by the reverse biased collector Schottky barrier and Je is the injected emitter current. The avalanche multiplication factor M depends on device design but if impact ionization is absent, equals one. The leakage current of the collector may also contribute to the total collector current. The emitter to collector current transfer ratio, or current gain is defined as:

.(4.2)

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where the collector leakage current has been neglected. He represents the probability of transmission of the hot electrons through the base. Jc is the total collector current. In the spin-valve transistor under consideration, the collector current of the Co/Cu spinvalve transistor depends exponentially on the spin dependent hot electron mean free paths in the base. Neglecting spin-flip scattering, we may consider the spin up and spin down electrons to carry the current in parallel (two current model). Following this idea, the collector current of the Co/Cu spin-valve transistor is expressed as:

(4.3) nd down (-)electrons the two species of electrons since these quantities reflect the properties of the semiconductors and Schottky barriers. At saturation, all Co layers have their magnetization parallel. The sum of the transmission probability factors for the two spin channels can then be written as:

(4.4) At the coercive field, this quantity becomes:

(4.5) where WCo expresses the sum of all Co layer widths (total Co thickness) which is valid for equally thick layers, W is half of the total Co thickness, WCu is the total Cu thickness , factor 2 in eqn appears because the two parallel channels are equal for antiparallel magnetizations. The values of the collector current in the parallel (P) and antiparallel (AP) magnetic configurations are then obtained . The typical properties in the spin valve transistor are thus: 1. Perpendicular GMR can be measured down to tri-layers 2. Exponential amplification of the magnetoresistance occurs because the transfer is exponentially dependent on the electron mean free path in the base 3. Electron energy can be varied so electron spectroscopy can be performed by changing emitter Schottky barrier height (or tunnel bias) 4. Measurements can be done at cryogenic and room temperature 5. Since the scattering processes appear as products in the transfer equation., the spin dependent scattering centers can be located accurately and, in contrast to common 20

CPP MR, the relative change in collector current CC(%) is not decreased by spin independent scattering processes such as in the Cu layers or in the semiconductors 6. As a consequence of the direct MFP dependence of the transmission across the base, the spinvalve transistor allows quantification 7. The output is a high impedance current source. 3.3 RESISTANCE MEASEURMENT Resistance of the multilayer can be measured with Current In Plane (CIP) or Current Perpendicular to the Plane (CPP) configurations. CIP is the easiest experimental approach of electrical transport in magnetic multilayer. But the drawback of CIP configuration is that the spin valve effect is diminished by shunting because many electron travel within one layer because of channeling. Uncoupled multilayer or sandwiches with thick spacer layer suffer from this problem .Spin independent boundary scattering reduces the CIP magnetoresistance largely in thin sandwiches. Also, fundamental parameters of the effect, such as the relative contributions of interface and bulk spin dependent scatterings are difficult to obtain using the CIP geometry. Measuring with the Current Perpendicular to the Planes (CPP) solve most of these problems, mainly because the electrons cross all magnetic layers, but a practical difficulty is encountered: the perpendicular resistance of the ultra thin multilayer is too small to be measured by ordinary techniques .

. Fig 3.4 a. CIP-GMR: shunting and channeling of electrons in the magnetic and nonmagnetic layers versus b. CPP-GMR: perpendicular electrons cross all magnetic layers, no shunting at antiparallel alignment. As shown in Fig. 4.3, a high resistant state (in zero field) can only be obtained if electrons cross at least two magnetic layers with antiparallel orientation. Because many electrons travel almost parallel to the layers in the CIP-GMR, and do not cross many layers, the adjacent layers must have the antiparallel orientation, i.e. they need an antiferromagnetic coupling. In the case of CPP-GMR the electrons cross all layers, and a random orientation of the layers produces the same high resistant state as the AF-coupled state (self averaging). In CIP-GMR the electric field is independent of position in the film, but the current density depends on the perpendicular direction to the film. The characteristic length scale is the longest mean free path. For CPP transport, the electric field depends on the perpendicular position in the film, but the current density is independent of position in the film. The spin diffusion length is the new length scale.

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3.4 SCATTERING MECHANISH

To stress the difference with Fermi transport, we demonstrate the electron energy dependence of the scattering mechanisms in it.Three important transport processes affect GMR: 1. spin dependent bulk scattering in the magnetic layers 2. spin dependent scattering at the interfaces 3. reflection at the interfaces due to band mismatch between the layers. The scattering processes leading to bulk scattering have quasi elastic phonon, magnon and elastic defect scattering. The scattering processes leading to diffusive interface scattering are mainly temperature independent elastic defect and impurity scattering. Inelastic electronelectron interactions are neglected both for Fermi transport and hot electrons .Also, phonon and magnon scattering are neglected (low temperature restriction), but may be included when finite temperatures are considered. Since defect and impurity scattering are of the same nature, both interface and bulk scattering may be included in one picture, taking different relaxation times only. The third process, quantum mechanical reflection at the layer interfaces, is entirely different. CPP transport incorporating the interface and bulk diffusive scattering has been modeled by the series resistor model which was used very effectively to describe the resistance in CPP experiments The total resistance is

Here rP and rAP are the CPP resistances per unit area and per superlattice period in the parallel (P) and antiparallel (AP) magnetic configurations respectively. . and . are used for the -magnetic bulk resistivity and r* b is the spin averaged interface resistance.

3.5 SCHOTTKY BARRIER

The IV characteristics of the SiPt emitter and SiAu collector diode are given. From the figure it is seen that the SiPt emitter diode has an extremely low leakage current (0.1 nA at 1 V reverse bias). The Schottky barrier height estimated from the above figure is nearly 0.85 eV. Whereas, the SiAu collector diode has a higher leakage current (1 Na at 1 V reverse bias) and the Schottky barrier height estimated is nearly 0.76 eV. The emitter diode is defined by chemical etching of the Si wafer whereas the collector diode is definedby the ion beam etching of the base layer. It was observed that a low leakage current for the collector diode is observed
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when the process step in figure 6(h) is performed. This step is extremely important as it controls the leakage current. The implication of this leakage current on the magnetotransport properties will be discussed later. In figure 8, the temperature dependence of the ideality factors of the emitter and collector diodes are given in the form of nkT /q against kT /q plots from 90 to 300 K. The full line gives the plot of n = 1.02. It is seen from the figure that the emitter diode has an ideality factor of a perfect Schottky diode, because at all temperatures the curve is close to the line defining n = 1.02. This shows an ideal thermionic emission at all temperatures [31]. Whereas the collector diode has an ideality factor close to 1.02 at room temperature, the ideality factor increases drastically as the diode is cooled. These phenomena show that the ideal thermionic emission is not present in the collector diode and it appears that thermionic field emission may also be dominant in the collector [31]. This behaviour may arise due to the damage created by the ion beam etching.

Fig 3.5 Si-Au-Ge Metal-Base Transistor: Schottky Barrier

Figure 3.6 The IV characteristics of the SiPt emitter and SiAu collector diodes.

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3.6 TRANSFER RATIO

While the MC value remains constant, the transfer ratio shows some size dependence, albeit weak. The transfer ratio is defined as the ratio of parallel collector current to emitter current (=Ic/Ie ). For the SVT used here, it has a value around 10 above 25 m. It starts to decrease below 25 m and is 6 10 for the 10 m SVT. This can be attributed to the deterioration of the emitter efficiency, which is the ratio between the current that is actually injected as hot electrons and the total emitter current. Process-induced defects along the emitter edge can be responsible for this deterioration. Electrons passing through the edge defects enter the base layer with a lower energy and can thus not contribute to the collector current. This reduces the absolute collector current value but does not affect the relative collector current change, MC. This phenomenon is not an intrinsic property of the device, but related to the fabrication process.

Fig. 3.7 Transfer ratio as function of transistor size.

3.7 LEAKAGE CURRENT

The collector current consists of two parts the current caused by the hot electron transfer across the base and an additional leakage current. Part of the leakage current is inherent to a reverse biased Schottky barrier. This is proportional to its area and another part is caused by process damage, mainly around its edges. As described before, we use a repair etch to minimize process-induced leakage current. The repaired collector diode usually shows a leakage current below 10 A. In Fig. 6, the leakage current of the reverse-biased collector diode (1 V) with zero emitter current at room temperature is plotted against collector area on a loglog scale. In addition to the measured data, two lines are drawn, with proportional to area (solid) and edge (dotted), respectively. The leakage current can be fitted well with the line proportional to area, implying that area leakage current dominates the leakage current and the repair process is effective in suppressing the processinduced parasitic edge leakage current. The deviation of the smallest diode from the fit with the area leakage is either due to the increasing importance of edge with decreasing size or to the limit of the current measurement setup, which is in the 10 A range. The latter also makes it difficult to interpret the leakage current characteristics of emitter diode, which is an order of magnitude lower than that of collector diode due to the higher Pt/Si Schottky barrier .

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Fig 3.8 Dependence of collector leakage current on collector area. The circles are the leakage currents of the reversed biased collector diode (1 V). Two lines that represent leakage current proportional to area (solid) and edge length (dotted) have also been included.

3.8 COLLECTOR CURRENT

The main drawback of the spin-valve transistor at present is the low collector current. Although we inject 2 mA of current into the structure we only obtain a collector current of around 10 nA. This gives an extremely low transfer ratio (of the order of 10 6). So the main effort at this stage is the improvement of the collector current. Additionally, the collector leakage has to be further improved so that this device can be operated above room temperature. Therefore, the leakage characteristics above room temperature have to be evaluated and, if necessary, different types of Schottky diodes (different metalsemiconductor combinations) have to be fabricated and tested. In this respect spin-valve transistors with two other collector Schottky diodes are fabricated and studied: Si/Pt/NiFe/Au/Co/PtPt/Si and Si/Pt/NiFe/Au/CoCo/Si. In the case of the spin-valve transistor with CoSi as the collector diode the leakage effect at room temperature dominates so the magnetocurrent at room temperature is negligible. However, at low temperature the magnetocurrent was comparable to that of the sample with the AuSi collector diode. Also, in the sample with the CoSi collector, the collector current did not increase appreciably although the barrier height difference is high and there are fewer interfaces. This is believed to be due to the poor quality of the CoCo bond. In the case of the spin-valve transistor with PtSi as the collector diode the magneto current at room temperature was same as that of the spin-valve transistor with AuSi as the collector. However, the collector current was lower than that of the spin-valve transistor with the AuSi collector. This is believed to be due to smaller differences in the Schottky barrier heights between the emitter and collector and the poor quality of the PtPt bond compared to the AuAu bond. Therefore, in order to improve the collector current, the bonding has to be perfected. In addition, the scattering centres for the electrons have to be reduced. This can be achieved by a more controlled growth of the metal layer, to give very few defects, low diffusion, etc.

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3.9 MEGNATIC SENSITIVITY

The barrier height of collector and emitter as determined at room temperature by the current voltage method are 0.7 and 0.6 eV. Because of the low barrier heights and large area of the collector the leakage current is quiet large (30A) and exceeds the magneto current for an injection current of 100mA. Magneto current measurements have been performed at 77 K reducing the leakage current to acceptable values, magneto current measurements have been performed with the CB setup of fig.1, Ie = 100 mA and VBC = 0V. the collector current Vs the applied magnetic field is plotted in fig. 3 as large current change with field is observed, with typical GMR characteristics of a second peak Co/Cu multilayer, such as saturation field and hysteresis. The corresponding CIP-MR value of implemented multilayer was only 3% in 10K Oe. The large values of MC (%) and Je/Jc indicate a short () (of order Of 0.5 to 1 nm): however bulk MFP will require further measurements

3.10 TEMPRATURE EFFECT

Transport property of hot electron is not fully understood at very low energy regime at finite temperatures. So, It is necessary to probe the temperature dependence of the hot electron transport property in relation to the SVT. The collector current across the spin valve changes its relative orientation of magnetic movements at finite temperature. Surprisingly the collector current showed different behaviors depending on the relative spin orientation in Ferro Magnetic layers. The parallel collector current is increasing up to 200 K and decreasing after that, while anti-parallel collector current is increasing up to room temperature. Actually in ordinary metals, the scattering strength increases with temperature T. This implies that any thermally induced scattering process enhances the total scattering. As a result measured current should be decreased, but it is happening so, increasing of collector current with temperature T may not be related to the ordinary scattering events in the metallic base. Two different mechanisms are suggested. One of them is spatial distribution of Schottky barrier diode. This may explain the behaviors of both parallel and antiparallel collector current upto 200K because thermal energy contributes to over come the Schottky barrier height at Collector side with the increasing temperature T. This mechanism not related to any dependent property but only for the absolute magnitude of both parallel and antiparallel collector current. Therefore, physicist attributes the
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measured temperature dependence of magneto current to this spin mixing effect. Basically spin mixing is spin flip process by thermal spin wave emission or absorption at finite temperatures. For example majority (minority) electrons can flip its spin by absorbing (emitting) thermal spin wave and then goes into spin down (up) channel.

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CHAPTER 4 FABRICATION
4.1 SI WAFER PREPARATION
For the fabrication of the spin-valve transistor it is essential to grow the metal layers directly on Si. The presence of native oxide on the surface of a semiconductor suppresses the tunnelling of metal electrons into the forbidden gap of the semiconductor and, also, it reduces interdiffusion. However, it is not desirable as it produces interface states and it alters the Schottky barrier height, resulting in uncontrollable Schottky barrier heights .For well defined Schottky barriers it is desirable to have an oxide-free Si substrate. Also, smooth growth of the metal layers is important for the vacuum metal bonding (discussed in the next section). So the processing of Si wafer is first optimized to obtain oxide-free substrate with very low surface roughness. At first, the n-type Si wafer is oxidized thermally to obtain 30 nm of silicon oxide on top of it. This wafer is annealed at 1100 C to obtain a well defined Sisilicon oxide interface .Now, a thick photo resist layer is spun on top of it and sawn into the required sizes. These small pieces were further processed to remove the oxide layer and the sawdust just before loading into the system. The photo resist layer is stripped off using concentrated HNO3. Then it was subjected to a 1% HF treatment to remove the oxide covering the sawdust. Then 5% tetra methyl ammonium hydroxide at 80 C is used to remove the Si sawdust. Finally, 50% HF is used to remove the thermally grown silicon oxide and is expected to leave the surface with hydrogen termination .These pieces were used for the deposition of the metal layers.

4.2 OPTIMIZATION OF SPIN VALVE

The current in-plane magnetoresistance of the spin valve has to be optimized to incorporate it into the spin-valve transistor. Here the metal layer has to be directly grown on Si without any underlying layers, as is usually done to realize good magnetoresistive properties. Also, the optimization should be based on the minimum thickness possible for the individual metal layers, otherwise in the spin-valve transistor configuration the hot electrons will lose energybefore reaching the collector as the collector current has an exponential dependence on the thickness .The spinvalve layer has to be grown on either the AuSi or PtSi surface for the Schottky barrier requirements. It is found that the metal layers grown on SiPt have better properties compared to those grown on SiAu. So the spin valve (NiFe/Au/Co) is deposited on SiPt. The thickness and the growth of each of these layers is optimized to obtain well defined switching of the individual magnetic layers and a in-plane magnetoresistance of about 1% with a few oersted of applied magnetic field. The magnetic field dependence of the magnetization of an optimized spin valve is given. It is seen that we achieved well defined switching of the Co and NiFe layers. When a high magnetic field is applied both the permalloy and Co align in the same direction and we obtain a high net magnetic moment. Now, when the applied field is decreased to zero both permalloy and Co are still magnetized in one direction. When the field is reversed and increased above the coercive field of the permalloy layer, the permalloy layer switches to the opposite direction and we obtain a lownet magnetization. In this state the magnetization of the Co and permalloy layers are aligned opposite to each other. When we again increase the applied field in the negative direction and when the applied field is greater

28

than the coercive field of the Co layer, the Co magnetization also switches in the applied field direction. Again both the permalloy and Co magnetizations are aligned parallel to each other and we obtain a higher net magnetization. The magnetoresistance of this spin valve with a Au cap layer is given; we observe a magnetoresistance of 1%. The Co layer has a lower coactivity compared to the previous magnetization measurement. This is believed to be due to the surface oxidation of the Co in the previous case, as there is no Au caping layer. The optimized thicknesses (for the minimum thickness of the metal layer) are Si/Pt (2 nm)/NiFe (3 nm)/Au (3.5 nm)/Co (3 nm).

4.3 SCHEMATIC PROCESS FLOW

In vaccum bonding initially cleaning process is done.For this 1 micron tetra ethyl ortho silicate (TEOS) SiO2 is used as protecting layer and the Si fragments are etched away using HF/HNO3 at room temperature isotropic etch.Preparation scheme is shown in figure 5.1.

Fig. 4.1 Schematic process flow for the preparation of vacuum bonded spin valve transistors

4.4 DEPOSITION OF BASIC LAYER

For deposition of the base layers a DC-RF magnetron sputtering machine is used. The robot is inserted into load lock F and transported using beam G to the main chamber A after approximately 1 hour pumping. Multilayer can be deposited using a computer controlled rotating table and deposition shutters.

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Fig 4.2 High vacuum DC/RF magnetron sputter system. The properties of the system are: background pressure typically 10-9 mbar, three magnetron sputter guns, variable substrate-target distance, heated substrate table, RF and DC power supplies. Twelve different samples can be sputtered in one run using the specially designed substrate rotator, of which a schematic picture is shown in Fig. 5.2.

Fig 4.3 Substrate rotator for multiple in-situ sample preparation. Spring 1 is wound up using manipulator 2. Samples 6 are mounted on rotating table 4. Deposition occurs via 5. Substrate selection is via magnetically coupled beam 3. In this way optimized GMR multilayer and sandwiches can be found quickly.

4.5 EMITTER WAFER THINNING

After bonding, the emitter substrate has to be thinned down to dimensions which allow definition of transistors to micron dimensions. For this reason, the emitter has to be thinned down to about 1 to 5 micron. A major requirement is that the emitter substrate needs a highly doped region for ohmic contact formation (the emitter barrier contact is reverse biased, in contrast to the collector contact). In so called BESOI (Bond and Etch back Silicon On Insulator) several techniques are known to come to a small device layer: 1. Grinding and polishing 2. Etch stop layers Grinding and polishing is a possibility for the required device layer thickness, and would be the most obvious way for standard wafer size. Thickness variations of about 0.5 microns are achievable. In grinding one has to be careful with subsurface damage

30

and the final etching has to be performed chemo-mechanically. However for small samples chemo mechanical polishing is not used. Using etch stop layers thickness variation of about 5 microns is obtained Etch stops using HF anodic etching usually provide fast etching of p type and n++ type, so in this case an etch stop on n++ is not possible. Moreover, it is difficult to grow defect free device n-layers wafers on a buried n++ layer, sufficiently high doped for ohmic contact formation. This problem also plays a role in etch stops using highly B doped p++ Si and KOH, TMAH or EPW. Another disadvantage of this technique is that it is difficult to grow defect free layers on top of this layer .Addition of larger Ge to the B atoms provides stress free etch stop layers without misfit dislocations. Electrochemical etch stops using P/N junctions require KOH etching at elevated temperatures with the additional buried n++ layer problem.

4.6 COMPLETE SPIN VALVE TRANSISTOR STRUCTURE

Following emitter thinning, the base region is defined using photolithography: photoresist prebaked at 900C was used to protect the base either during wet etching (10:HO/1:HF) during 20 seconds (for Co/Cu) or using ion beam etching during 30 minutes. To reduce the large sputter induced leakage currents after ion beam etching, a short TMAH silicon etch is necessary to remove the damaged silicon surface next to the base. For the HO/HF base etch this is not required since it does not introduce defects and grows a surface passivating SiO automatically. Since the HO/HF tends to attack the photoresist, care has to be taken not to etch longer than 1 minute. After the base etching procedure, the substrate is glued using conducting room temperature curing epoxy with its backside ohmic contact to a printed circuit board, aluminum wires are ultrasonically bonded to the base and emitters and is ready for electrical characterization .

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CHAPTER 5 ELECTRON TRANSFER IN SPIN VALVE TRANSISTOR

5.1 SCHOTTKY (THERMIONIC: EMITTER EFFICIENCY)
The various ways in which electrons can be transported across a metal-semiconductor junction under forward bias are shown schematically for an n-type semiconductor . The mechanisms are: (a) emission of electrons from the semiconductor over the top of the barrier into the metal (b) temperature assisted tunneling through the barrier: thermionic field emission (c) direct tunneling through the barrier: field emission (d) recombination in the space charge region (e) recombination in the neutral region (hole injection) It is possible to make Schottky barrier diodes in which (a) is the most important transport mechanism and such diodes are generally referred to as nearly ideal. Processes (b) and (c) may contribute under high doping and low temperature conditions. Under normal conditions, (c) and (e) hardly contribute. The relative contributions of the other transport processes depend mainly upon temperature, doping and applied bias To analyze the injection of electrons into the base, the electron potential energy as a function of distance from the metal is schematically drawn in Fig. 4.4. In Fig. 4.4 the electric field and the image force. xl is the point where an electron at rest in the emitter has gy difference between the emitter and collector barriers of the full metal base transistor structure.

Fig 5.1 Electron potential energy q as a function of distance in a metal semiconductor Schottky barrier and electron transport processes under forward bias condition.

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As shown in Fig. 4.4 the barrier maximum is not at x=0 but at xm. This deviation is due to the image force correction . According to the thermionic emission-diffusion theory the forward transport of electrons according to process (a) can be described as:

..(4.9) where J is the forward current density, IRs is the voltage drop due to series resistance and (4.10) is the saturation current density and A** is the effective Richardson constant

The ideality factor n is defined as

.(4.11) which is reflected by the slope of the forward current response. The contribution of transport processes (b), (c), (d) and (e) to the total injection current causes the n-factor to become larger than 1.

5.2 QUANTUM MECHANICAL TRANSMISSION FACTOR AT THE COLLECTOR BARRIER

Quantum mechanics allows particles to penetrate an energy barrier larger than its own energy. Also , a particle with energy larger than a potential barrier, may be partly reflected. Because the average electron kinetic energy in the metal is much larger than in the semiconductor due to the addition of the Fermi energy of the metal. This energy is lost in when the electron enters the conduction band of the collector semiconductor. A simple step potential model of the collector Schottky barrier gives some insight in the relative importance of parameters. The relatively large electron energy loss justifies the use of a step potential to model the Schottky barrier. For smaller energy losses when using metals with small Fermi energies such as Cs (1.5eV) would require more correct potential shapes, as presented in Fig. 4.5.

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Fig 5.2 Metal semiconductor barrier models

5.3 SEMICONDIRTOR TRANSPORT: COLLECTOR EFFICIENCY

The angle of acceptance in the collector is quite small When electrons are transmitted into the collector within the angle of acceptance, there is a further limitation to collection: electron-phonon scatterings before the collector barrier maximum may throw back the electron into the metal. As in the emitter, within the collector, electrons can scatter by emission of optical phonons. As shown in Fig. 4.6 the position of the Schottky barrier maximum is not at the metallurgical M-S interface but is shifted by a few nm into the semiconductor due to the image potential Electrons with energies just over the threshold for transmission that excite phonons in the region before the Schottky barrier maximum are expected to have a high probability of reentering the metal. Beyond the Schottky barrier maximum, the internal electric field in the depletion region accelerates the electrons toward the interior of n-type semiconductors. Therefore the effect of phonon scattering on the magnitude of Ib in the region beyond the Schottky barrier maximum depends on the doping density of the semiconductor, since this defines the length of the depletion region and thus the acceleration rate.

5.4 IMPACT IONIZATION: AVALANCHE MULTIPLICATION

Once the kinetic energy of the electrons in the collector semiconductor exceeds Eg, electronhole pair generation, or impact ionization, becomes possible, see Fig. 4.7. This process is usually employed in Avalanche Photodiodes (APDs) to increase the detector current. This process can also take place in metal base transistor structures, and has recently been observed as a parasitic process in BEEM experiments In reverse biased Schottky diodes ,breakdown may occur due to tunneling or avalanche breakdown. When the electric field in a semiconductor is increased above a certain value, the carriers gain enough energy so that they can excite electron-hole pairs by impact ionization.

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Fig. 5.3 Electron-hole pair generation in the reverse biased collector barrier. The electron-hole pair generation rate G for impact ionization is given by ..(4.12) -hole pairs generated by an electro expression for the ionization rate

(4.13) where Ei is the high field, effective ionization threshold energy, F the electric field, and FkT, Fp and Fi are the threshold fields for carriers to overcome the decelerating effects of thermal (phonon), optical phonon and ionization scattering, respectively. For Si, the value Ei is found to be 3.6 eV for electrons and 5eV for holes.

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Fig. 5.4 Collector Schottky barrier under reverse bias showing the maximum of the barrier at xm resulting from image force lowering and reverse transport mechanisms (a) thermionic emission (b) thermionic field emission and (c) field emission.

5.5 SCHOTTKY REVERSE SATURATION CURRENT: COLLECTOR LEAKAGE CURRENT JBC

The reverse current of the collector barrier can be considered to be a parasitic current which limits detection of the hot electron current in the collector under certain conditions. The principal leakage current is determined by electrons which have a thermal energy larger than the barrier height. Obviously this current is very sensitive to temperature and was deduced from the thermionic emission theory as

.(4.14) where A** is the effective Richardson constant A plot of the calculated saturation current versus barrier height for Si is shown in Fig 4.8

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Fig 5.5 saturation current density Js versus barrier height, at T=77, 200 and 295K. A** has been taken 112 (A cmK) for Si.

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CHAPTER 6 ADVANTAGES AND APPLICATIONS

6.1 ADVANTAGES
1. Traditional transistors use on and off currents to create bits the binary zero and one of computer information, quantum spin valve transistor will use up and down spin states to generate the same binary data. 2. Currently logic is usually carried out using conventional electrons, while spin is used for memory. Spintronics will combine both. 3. In most semi conducting transistors the relative proportion of up and down carrier types are equal. If ferromagnetic material is used as the carrier source then the ratio can be deliberately skewed in one direction. 4. Amplification and/or switching properties of the device can be controlled by the external magnetic field applied to the device. 5. One of the problems of charge current electrons is that we pack more devices together, chip heats up. Spin current releases heat but it is rather less

6.2 APPLICATIONS
1. Spin valve transistors have huge potential for incoporatio in stable, high sensitivity magnetic field sensors for automotive , robotic , mechanical engineering and data storage applications. 2. It finds its application towards quantum computer, a new trend in computing here we use qubits instead of bits.Qubit exploit spin up and spin down states as super positions of zero and one. 3. They have the advantage over conventional semi conductor chips that do not require power to maintain their memory state. 4. This may also be used as Magnetically controlled parametric amplifiers and mixers, as magnetic signal processors for control of brush less dc motors as magnetic logic elements.

6.3 RELATED WORK

Scientists have recently proposed new class of spin transistors, referred to as spin-filter transistor (SFT) and spin metal-oxide-semiconductor field-effect transistor (spin MOSFET), and their integrated circuit applications. The fundamental device structures and theoretically predicted device performance are theoretically calculated predicted. The spin MOSFETs potentially exhibit significant magnetotransport effect such as large magneto-current and also satisfy important requirements for integrated circuit applications such as high transconductance, low power-delay product, and low off-current. Since the spin MOSFETs can perform signal processing and logic operations and can store digital data using both of the charge transport and the spin degree of freedom, they are expected to be building blocks for a memory cell and logic gates on spin-electronic integrated circuits. Novel spin-electronic integrated circuit architectures for nonvolatile memory and reconfigurable logic employing spin MOSFETs are also proposed. Now researcher Christian Schoenenberger and colleagues at the University of Basel, Switzerland, describe a carbon nanotube transistor operating on a same principle, opening a promising avenue toward the introduction of spin-based devices into computer chips.

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A device consisting of a single carbon nanotube connected to two magnetic electrodes that control the orientation of the electrons spins have been developed.

6.4 FUTURE SCOPE

There are major efforts on going at ibm, Motorola in developing RAM based on spin valves, such devices called MRAMs have demonstrated faster speeds, high density ,low power consumptions and non volatility. They are promising replacement for semi conducting rams currently used Also reserches are going on to replace Pt with suitable combinations of metal (low cost alloys ) in order to make it affordable at minimum cost.

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