Colour Coded Resistors
Colour Coded Resistors
Colour Coded Resistors
EE277
Red = 102
Red = 2%
Orange = 103
Gold = 5%
Silver = 10%
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Diode characteristics
Ordinary Diode: A diode is a p-n junction, that conducts current much more readily in one direction than in the other, depending on the voltage across the diode terminals. (see Figure 1-1).
Figure 1-1 If the anode is more positive than the cathode, the diode is forward biased (see Figure 1-2 a). In this case the current will pass through the diode.
Figure 1-2 If the cathode is more positive than the anode, the diode is reverse biased (see Figure 1-2 b). In this case the diode behaves as open circuit and no current passes through it. The current passes through a diode in forward biased region ( I D ) when a voltage (V D ) is applied across its terminals can be given by the following equation:
I D = I o eV D / VT 1
Where: ID: the current passes through the diode. Io: the reverse saturation current. VD: the voltage drop across the diode.
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: an empirical constant ( 1 or 2). VT: The thermal voltage (VT = 26 mV at 25C). Figure (1-3) shows the characteristics curve which shows the relation between VD & ID.
Figure 1-3 There are two types of resistance of the diode: 1. Dynamic resistance (rD): appears when the operating point moves along the curve.
rD =
2. Static resistance (RD): The resistance of the diode at any certain point.
V I
RD =
VD ID
In the reverse, as we increase the voltage applied across the diode terminals (VD), the current will stay at constant very small value (in A) until (VD) reaches some value called breakdown-voltage, then the current increase heavily. If the power is larger than the power rating of the diode, then the diode will be damaged. Zener Diode: Zener diode is a special type of diodes that operates in the reverse region (in break-down region) where the voltage across the diode remains essentially constant as the reverse current is changed. The characteristics curve of zener diode is the same as that of ordinary diode except that the break-down voltage is lower. To keep VZ constant, two conditions muse be satisfied: 1. I Z (min) I Z I Z (max) . 2. VS VZ . The maximum current through the diode must be limited by the power rating of the zener diode, where:
PZ = I Z maxVZ
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How to connect the diodes with the other components of the circuit? - For ordinary diode: There is a silver (coloured) line on the diode chip which indicates to the cathode (nterminal) and the other side is the anode (see Figure 1-4).
Figure 1-4 For zener diode: We use the similar indication, where the line points to the cathode of zener diode (see Figure 1-5).
Figure 1-5
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Figure 2-1 So we connect a dc-source in series with the ac-source as in the circuit of Figure 2-2.
Figure 2-2 The dc load line of the diode can be found by shorting the ac-source and then applying KVL.(See Figure 2-3).
Vdc
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Figure 2-4 But the voltage across the diode has two components: 1. DC- component. 2. AC-component. So the total diode voltage is given by:
Vd ( t ) = dc component + ac component
Vd ( t ) = 0.7 + A
rd sin( t ) rd + R
Where: A: The peak-value of the ac-source. rd: the ac resistance of the diode. Then: i d ( t ) = dc component + ac component
Vdc 0.7 A + sin( t ) R rd + R So the ac load line swing between two value as in Figure 2-5. id ( t ) =
Figure 2-5
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(2) Large Signal Diode Circuit: Large signal is that signal which has a peak value greater than threshold voltage of the diode, in other words its peak value can operate the diode in the forward biased region (See Figure 2-6) where A 0.7V .
Figure 2-6 This circuit is called half wave rectifier because only one half of the ac signal can pass through the diode (positive half wave) while the other half (negative half wave) is ejected. Drawing the relation between input and output signal, see Figure 2-7.
Figure 2-7
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Figure 3-1 In this circuit assuming Vdc = 0 we note that: B When Vi is positive (Vi > 0.7) the diode is ON, so the output is VD = 0.7V. B When Vi is negative or (Vi < 0.7) the diode is OFF, so the output is Vi. So the output signal will be as shown in Figure (3-2). We can change the Vdc value, so the output voltage will be shifted, and the maximum allowable dc-voltage is:
Figure 3-2
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(2) Clampers: Clampers are networks that clamp the input signal to a different dc level, but the peakto-peak swing of the applied signal will remain the same. Clamper circuit consists of clipper components plus capacitor, and the circuit shown in Figure 3-3 is an example of clamper circuit.
Figure 3-3 How does clamper operates? - When the input voltage is positive (Vi > 0) the diode is ON, so applying KVL around the circuit we have: Since the diode is ON the output voltage will be: Vo = V D = 0.7V . When the input voltage is zer (Vi = 0) the diode is OFF. Applying KVL we have:
Vi + VC + 0.7 = 0 VC = Vi 0.7
0 + VC + Vo = 0 Vo = VC
And when the input voltage is negative (Vi < 0) the diode is OFF, so applying KVL we get:
Vi + VC + Vo = 0 Vo = Vi VC For example, let Vin = 5 sin( t ) Volts and silicon diode is used VD = 0.7V , When Vi > 0 VC = 5 0.7 = 4.3V Vo = 0.7V When Vi = 0 Vo = VC = 4.3V When Vi < 0 Vo = Vi VC = 5 4.3 = 9.3V
then:
Figure 3-4
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How to determine the output of clamper circuit? 1. Determine the polarity of the ac source at which the diode is ON, and then apply KVL to find the capacitor voltage, and be careful to the polarity of the voltage across the capacitor. See Figure 3-5. Since the diode is ON, then the output voltage is VD.
Figure 3-5 2. Make the ac source short circuit and apply KVL to determine the dc-level of the output voltage where: Vo( dc ) = VC . 3. Now, invert the ac-source terminals and find the output voltage. Since the diode is OFF so; applying KVL, the peak output voltage is: Vo = Vi VC .
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Figure 4-1 So, the input and output waveforms will be as in Figure 4-2.
Figure 4-2 For high frequencies, the output voltage approaches zero, so to get a dc value, we need to eliminate the high frequencies components using a low pass filter as in Figure 4-3.
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Figure 4-4 And the dc-component of the output is like in Figure 4-5.
Figure 4-5 The percentage ripple can be calculated using the following equation:
%ripple =
Vrms Vdc
where
Vrms =
1 2 3R L fo
Vpp 2 3
Theoretically;
%ripple =
Also, we can rectify a full wave using full wave rectifier as the circuit shown in Figure 4-6.
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Figure 4-6 In this circuit, the input and output waveforms are as in Figure 4-7.
Figure 4-7
2 following equation:
%ripple =
1 1 = 2 3R L Cf out 4 3R L Cf in
In this circuit (Full Wave Rectifier) we will connect a transformer between the network and the ac-source, to: 1. Step the voltage up. 2. insulate input ground from output ground. The circuit will be as in Figure 4-8.
Figure 4-8
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Figure 5-1 From Figure 5-1 we can see that the arrow is going out of the transistor in NPN transistor, while it is entering the transistor in PNP transistor. (2) How to determine the transistor terminals practically? There are some shapes of transistor, and each shape has special criteria. We will consider two types; 2N222, and 2N3904 transistors. To determine the transistor terminals, see Figure 5-2.
Figure 5-2 (3) How to test the transistor? The transistor can be represented as two diodes have a common terminal, so to test the transistor, we need to do the following: ) on the DMM. - Press the two buttons labeled by the diode symbol ( - Connect any two terminals of the transistor, and read the DMM reading, and then change the terminals. It should read specific value in one direction while the other direction, it should read infinity. - The readings will be as in Table 5-1. The two terminals Reading E-B Diode C-B Diode C-E OFF Table 5-1 (4) Transistor Voltage Divider Biasing: The transistor voltage-divider bias circuit is shown in Figure 5-3(a).
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Figure 5-3 This circuit can be redrawn as in Figure 5-3(b) where: R1 R 2 R2 VTh = VCC and RTh = R1 // R2 = R1 + R 2 R1 + R 2 Then; applying KVL we have:
V Th + I B R Th + V BE + I E R E = 0 but I E = ( + 1 )I B , so:
VTh V BE RTh + ( 1 + ) R E
VTh + I B RTh + V BE + ( 1 + )I B R E = 0
IB =
And : VCC + I C RC + VCE + I E R E = 0
VCE = VCC I C ( RC + RE )
VCC + VCE + I C RC + I E R E = 0 V CE = V CC I C ( RC + R E ) (5) Characteristics of transistor: The output characteristics curve of the transistor is shown in Figure 5-4.
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Figure 5-4 How to draw the dc-load line? VCE = VCC I C ( RC + RE ) When VCE = 0V, then:
IC =
When IC = 0; then:
VCC RC + RE
VCE = VCC
Then we connect between the two calculated points. (6) How to find Q-point practical? We connect the circuit shown in Figure 5-5.
Figure 5-5 To find ICsat we connect the DMM terminals across the transistors terminals (C & E) and start to change R until the measured value be: VCE 0.2V , then we measure the voltage across RE, then: V I Csat = E RE
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Figure 6-1
-
0.026 IE AC-analysis: The AC equivalent model for the common base configuration shown in Figure 6-1 is as shown in Figure 6-2.
Figure 6-2 The AC-parameters ( Z i , Z o , Av , Ai ) can be calculated as follows: To find Z i make the input voltage open circuit, then ib is zero, so the circuit will be as in Figure 6-3.
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So the input resistance (resistance seen at the input terminals) is: Z i = R E // re , since re << RE B Z i re To find Z o (the resistance seen at the output terminals), from Figure 6-3, we see that: Z o = rc // RC , since ( rc ) >> RC , so: Z o RC . The voltage gain ( Av ): V Av = o Vi
Ai 1
How to find the AC-parameters of a common base amplifier practically? How to find input resistance? We connect a potentiometer between the emitter and the input capacitance (Ci) as shown in Figure 6-4.
Figure 6-4
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Then we start to change the resistance of the potentiometer box until the emitter voltage (VE) reduced to half of the first value (when Rpotentiometer = 0). We should change the resistance from 0 up to the value which obtains the last condition, then; these resistance indicates the input resistance. How to find the output resistance? We connect the potentiometer box between the output capacitor (Co) and ground as in Figure 6-5.
Figure 6-5 The we start to change the potentiometer box resistance from high value down to some value at which the output voltage equal to half of that value before connecting the potentiometer. At this point; the resistance of the potentiometer box is equal to the output resistance. How to find voltage gain? We measure the input voltage and the output voltage, then the voltage gain is the ration between the output voltage to the input voltage.
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Figure 7-1 In Figure 7-1(a), the circuit is called unbypassed, because at AC the emitter is not shorted, but the circuit in Figure 7-1(b) is called bypassed, because at AC the capacitor is shorted. B For unbypassed amplifier: The ac equivalent circuit is as shown in Figure 7-2. So the ac-parameters are as follows: Z i = R1 // R2 // [ re + ( + 1)RE ] Z o = RC // rc but rc >> RC Z o RC
Av = Vo ib RC = Vi ib re + ( + 1)ib RE
Figure 7-2 If >> 1 then ( + 1) and: V i b RC RC Av = o = = V i i b (re + R E ) re + R E Z RC R1 // R2 // [ re + ( + 1)R E ] I V Z V Z Ai = o = o o = o . i = Av i = I i Vi Z i Vi Z o Zo re + R E RC And if load resistance is connected, the voltage gain will be:
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Av =
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Vo R // R L = C Vi re + R E B For bypassed amplifier: The ac equivalent circuit is as shown in Figure 7-3, the only different is that the capacitor connected across R E terminals will be short circuit, so R E will be shorted.
RE = 0 Z i = R1 // R 2 // re
Figure 7-3
Z o = RC // rc but rc >> RC Z o RC i b RC V R Av = o = = C Vi i b re re I V Z V Z Z R R // R 2 // re R1 // R 2 // re Ai = o = o o = o . i = Av i = C 1 = I i Vi Z i Vi Z o Zo re RC re And if load resistance is connected, the voltage gain will be: V R // R L Av = o = C Vi re (2) Common Collector Amplifier: In this amplifier, the input voltage applied on the base while the output voltage is read at the emitter as shown in Figure 7-4.
Figure 7-4 Then the ac equivalent circuit will be as shown in Figure 7-5.
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Figure 7-5
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Figure 8-1 2. How does FET work? When the applied voltage between Gate and Source is zero (VGS = 0V), the FET is closed, so the current passes through it -between Source and Drain- (ID) will be at maximum value ( IDSS ), and as VGS increases, the n-channel will narrow as in Figure 8-2.
Figure 8-2 So the current passes through D & S will decrease until it reaches zero when the n-channel be closed, then the value of VGS at which current ID equal to zero, is called pinch-off voltage (VP), see Figure 8-3.
Figure 8-3
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So, we can define IDSS & VP as follows: - IDSS: it is the maximum drain current for a JFET, and can be defined by the conditions VGS = 0V, and VDS > V P . - VP: it is the minimum value of the voltage applied between Gate and Source that blocks drain current from passing through the JFET. 3. The characteristic curve of ID and VGS: As VGS becomes less negative than VP, the drain current increases until the current reaches maximum value IDSS as in the curve shown in Figure 8-4.
Figure 8-4 4. How to test the FET? We use the DMM to test the FET. When we connect the DMM as follows and read the DMM: Terminal connected Reading GS Diode GD Diode DS Semiconductor Resistance Table 8-1 If the readings of DMM were as in the Table 8-1, the FET is valid, else; it is invalid. 5. How to find the FET parameters (VP & IDSS)? Connect the circuit shown in Figure 8-5.
Figure 8-5 Then make VGS = 0V, and read the voltage drop across Ro to find the current passing through it (IDSS). Then, start to change VGS to get zero voltage drop across Ro, then the value of VGS is VP. 6. What are the relations between dc-values of JFET?
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V DS = V D V S
ID
VGS I D = I DSS 1 V P 7. How to determine the JFET terminals? The JFET and its terminal are shown in Figure 8-6.
Figure 8-6
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Figure 9-1 This circuit is called voltage divider bypassed self-bias circuit. The ac equivalent circuit is shown in Figure 9-2. B AC-parameters: 1. Input resistance: Z i = R1 // R2 2. Output resistance: Z o = R D // rd , but rd >> RD, so:
Z o RD
Av = g m RD
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Figure 9-4
B AC parameters: 1. Input resistance:
Z i = R1 // R2
2. Output resistance: Z o = R D // rd , but rd >> RD, so: 3. Voltage gain: g mV gs R D V Av = o = V i V gs + g mV gs R s
Z o RD
g m RD 1 + g m RS
Av =
Figure 9-5
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Figure 9-6
B AC parameters: 1. Input resistance:
Z i = R1 // R2
2. Output resistance:
Z o = R S // 1 gm
3. Voltage gain: g mV gs R S V gs ( g m R S ) V Av = o = = V i V gs + g mV gs R S V gs (1 + g m R S )
Av = gm RS 1 + g m RS
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