TELKOMNIKA: Indonesian Journal of Electrical Engineering ISSN: 1693-6930, e-ISSN: 2087-278X accredited by Directorate General of Higher Education of Indonesia,

SK No: 51/Dikti/Kep/2010 http://telkomnika.ee.uad.ac.id

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IMPROVED VOLTAGE OF CASCADED INVERTERS USING SINE QUANTIZATION PROGRESSION

Bambang Sujanarko , Mochamad Ashari , Mauridhi Hery Purnomo 1 Dep. of Elect. Eng., Universitas Jember, Jember, Indonesia 2 Dep.of Elect. Eng., Institut Teknologi Sepuluh Nopember (ITS) Surabaya, Indonesia e-mail: [email protected]
1 2 2

Abstract The previous methods of cascaded multilevel inverter (CMLI) can improve power quality but the methods have low voltage output if the DC voltages limited by the voltage rating of power semiconductor. To improve the amplitude of CMLI output voltage, this paper proposes a new DC voltage progression. The progression based on sine quantization method (SQM), which determines a sequence of DC voltages from discrete amplitudes of sine wave function. The method also collaborates with step equal residual area method (SERAM) to minimized total harmonics distortions (THD). A single-phase CMLI that consist four H-Bridges simulated and implemented to verify the methods. Amplitude output voltage and THD results of simulations and experiments indicate that the sine quantization progression produce the highest output voltage than other DC voltage progressions, with power quality or THD in the accepted region. The amplitude of output voltage have linier function with amplitude equal 0.6665 times of HBridges numbers and have exponential function of THD with value below 5%. Keywords: CMLI, multilevel inverter, SERAM, THD

1. INTRODUCTION Recently the multilevel inverter (MLI) is the most popular dc to ac converters for high voltage and high power in the power industry. The general structure of this MLI is to synthesize a sinusoidal voltage from several levels of voltages [1]-[4]. There are three well-known topologies; diode-clamps, flying capacitor, and cascaded multilevel inverter (CMLI) [4]-[8]. Diode clamp and flying capacitor are MLI with common dc sources. These inverters use capacitors in series to divide the dc bus voltage in to a set of voltage levels. While, the CMLI consists several H-bridge inverter units, and separated DC sources. The CMLI topology eliminates the excessively large number of bulky transformers required by conventional multi pulse inverters, clamping diodes required by multilevel diode clamped inverters, and flying capacitors required by multilevel flying capacitor inverters [5]. A CMLI is simply consists a series connection of multiple H-bridge inverters [5]-[9]. Each H-bridge inverter has the same configuration as a typical single-phase full-bridge inverter. The CMLI introduces the idea of using separate DC sources to produce a stepped voltage (similar to sine AC voltage waveform) by cascading the output voltage of H-bridges. In the first developmeent, this inverter use equal DC voltage, but in order to improve power quality the unequal DC voltages also used [5], [9]. In the equal DC voltages, all of HBridge inverters have same voltage amplitude, but in unequal DC voltages each H-Bridge inverters have different voltages. The voltages depend on its function progression [9]. The popular unequal DC voltages CMLI are binary and trinary progressions of DC voltages. In the N binary progression the amplitude of DC voltage have ratio 1: 2: 4: 8 . . : 2 , while in the trinary N progression the amplitude of DC voltage have ratio 1: 3: 9: 27. . : 3 . The binary and trinary voltage progression can improve power quality but the methods have low voltage output if the DC voltages limited by the voltage rating of power semiconductor. To improve the CMLI within high amplitude output voltage this paper proposes a new DC voltage progression. The progression based on sine wave quantization. To improve the power quality usually this inverter collaborate within eliminate or minimize the THD [3-4],[9]. In this

Improved Voltage of Cascaded Inverters Using Sine Quantization . (Bambang Sujanarko)

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paper we use a new THD minimized based on area was called Step Equal Residual Area Method (SERAM). The computer-aided simulation using Matlab Simulink and experiments using a single phase CMLI prototype within computer controller based and PCI interfacing will be implement to verify the proposed scheme.

Vdc,N
+

- V dc,1 S31 S12

- V dc,2 S32

S11

H-Bridge S1N Cells S3N

S2N S4N

S21

S41

S22

S42

Vo,1 -

Vo,2 Vo

Vo,N -

Figure 1. Single-phase cascaded multilevel inverter Table 1. Switches combination and output voltage of each H-Bridge
Switches condition S1j OFF ON ON OFF S2j OFF ON OFF ON S3j ON OFF OFF ON S4j ON OFF ON OFF Output 0 Vdcj -Vdcj

Figure 1 shows a single-phase CMLI schematic that consist of several H-Bridges. If in each H-Bridge the switches are S1j, S2j, S3j, S4j, where j is sequence of H-Bridges, so there are four switching combinations in each H-Bridge, but only three possibilities of output voltage that occurred that is 0, Vdcj and Vdcj as shown in Table 1. The switching condition for 0 must be choice from two conditions occurred. So, Only three output voltages and three switches in each H-Bridges. Figure1 also shows that if sequence of H-Bridges (j) until N, the voltage output of CMLI is obtained by summing of the output voltages of H-bridge as equation (1).

Vo (t ) = Vo,1 (t ) + Vo , 2 (t ) + ..... + Vo , N (t )

(1)

Based on equation (1) and three output voltages, the maximum number of switches of CMLI (s) is shown as equation (2). But not all of switches are the effective switching. The effective switches only produced if the output voltages have different amplitudes. These effective of output voltages usually called voltage levels (n).

s = 3N

(2)

2. RESEARCH METHOD Quantization is conversion of a continuous range of values into a number of discrete levels [10]. So, in the CMLI context, sine quantization progression is a sequence of DC voltages that amplitudes follow sine wave function value on discrete times. Figure2 shows sine quantization process. If the voltage of sine wave reference is V, the frequency is f and the

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number of H-Bridge is N, so each DC voltage can determine by equation (3). While, the output maximum voltage can be calculated by using equation (4).

Vdc , j = Vm sin( t j ) (1/ f ) j) 4N 1 = 2 V sin( j ) j = 1,2,3..., N 2N = 2 V sin(2f

(3)

Vmax =
1

2 V sin( j

1 ) 2N

j = 1,2,3..., N

(4)

s in e re fe re n c e s in e q u a tiza tio n

V o lta g e (V ) t T im e (u s )
Figure2. Sine quantization process

Table 2 shows DC voltages of CMLI using sine quantization in the number of H-Bridges 2 to 5. The using of these voltages in to circuit of CMLI is shown in Figure1, the CMLI using sine quantization find. To improve the power quality, usually the CMLI collaborate with eliminate or minimize the THD [3-4], [9]. One of these methods is area base method. In this paper we use Step Equal Residual Area Method (SERAM). The basic of the method within 7 levels output voltage of CMLI shown in Figure 3. Obviously, area in the upper and lower of sine reference is composed of harmonic components. Ideally, this area should be zero, i.e. the stepping wave and the sine wave overlap each other. In other words, the stepping wave has no harmonics but the fundamental. Assume Vj and Vk are voltage amplitudes adjacent and the area between the sine wave and the stepping wave are equal, so the difference is zero. In the condition, the firing angle of power electronic devices can calculate using equation (5), while the other angles using equation (6).

Vj + Vk d i = sin 1 2

(5)

Improved Voltage of Cascaded Inverters Using Sine Quantization . (Bambang Sujanarko)

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d j = sin 1 (Vj ) and

d k = sin 1 (Vk )

(6)

A single-phase CMLI as describe above then simulated and implement to find amplitude, waveform and THD of output voltage. The simulation circuits using Matlab Simulink show at Figure 4, while photograph of experiment using a single-phase CMLI within four HBridges and variable DC is shown at Figure5. This CMLI using IGBT, optocoupler gate driver, PCI 1710 HG interfacing and computer controller based on Matlab Simulink.

Table 2. DC voltages of CMLI using sine quantization

H-Bridge Number 2 3 4 5 DC Voltage (pu) 0.71; 1 0.5; 0.87; 1 0.38; 0.71; 0.92; 1 0.31; 0.59; 0.81; 0.95; 1

Figure 3. Total harmonic distortions minimization

Figure4. Simulation circuit

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Figure5 Experiment set up.

3. RESULTS AND ANALYSIS In the simulations and experiments, binary, trinary and sine quantization DC voltage progressions will be simulate and test. Figure 6 shows comparison of maximum output voltage of DC voltage used in CMLI. It shows that the propose DC voltage progression have the highest maximum output voltage than others. The amplitudes have linier function with slope 0.6665. This function appropriates equation (4). While binary and trinary progressions have non-linier function and limited on twice and 1.5 times of highest DC voltage.

Figure 6 Output voltage of DC voltage.

Improved Voltage of Cascaded Inverters Using Sine Quantization . (Bambang Sujanarko)

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3 VDC max

Sine quantisazion Binary

2 VDC max

Trinary Output voltage (V) VDC max sine reference for DC Voltage determination 0

-VDC max

-2 VDC max

-3 VDC max 0

time (s) Figure 7 Output voltage waveform

The maximum output voltage and THD of simulations and experiments of some DC voltage progression are shown in Table 3. Similar to simulation result, experiment result also indicate that sine quantization progression of DC voltages have high output voltage and in the acceptance quality. Figure 8 shows a photograph of output voltage result by experiment of CMLI using sine quantization.

Table 3. Results of simulations and experiments

DC Voltage H-Bridge Levels progression Number number 2 Binary 3 4 5 2 Trinary 3 4 5 2 Sinusoidal 3 4 5 8 15 31 63 9 27 81 243 9 21 81 225 DC Voltage (pu) 0.5; 1 0.25; 0.5; 1 0.125; 0.25; 0.5; 1 0.06; 0.125; 0.25; 0.5; 1 0.33; 1 0.11; 0.33; 1 0.03; 0.11; 0.33; 1 0.01; 0.03; 0.11; 0.33; 1 0.71; 1 0.5; 0.87; 1 0.38; 0.71; 0.92; 1 0.31; 0.59; 0.81; 0.95; 1 Max. output Max. output %THD %THD voltage voltage (simulation) (experiment) (simulation) (experiment) 1.5 1.42 12.22 18 1.75 1.88 1.94 1.33 1.44 1.48 1.49 1.71 2.37 3.01 3.66 1.71 1.83 1.89 1.31 1.41 1.45 1.46 1.68 2.35 2.97 3.62 5.5 2.62 1.29 9.37 3.02 1 0.35 12.03 5.93 3.13 1.9 8 5 3 12 5.03 2.5 1..4 14 9.2 4.7 3.2

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Figure 8 Photograph of output experiment

4. CONCLUSION Sine quantization progression of DC voltages for CMLI has been proposed. Theory, simulation and experiment result show that the progression has higher output voltage than conventional progressions and has acceptance power quality. The invention can use to improve output voltage of CMLI in the amplitude and power quality using low voltage rating of power electronics, because this inverter have maximum output voltage in linier function of number of H-Bridges and have more decrease THD if number of H-Bridges increase.

REFERENCES [1]. Babaei E, Hosseini SH, Gharehpetian GB, Haquea MT, Sabahi M. Reduction of dc voltage sources and switches in asymmetrical multilevel converters using a novel topology. Electric Power Systems Research. 2007; 77(8): 10731085 [2]. Cheng B, Huang F. Multilevel Inverter Control Scheme. US Patent 6867987. March, 2005. [3]. Aghdam MGH, Fathi SH, Gharehpetian GB. A Complete Solution of Harmonics Elimination Problem in a Multi-Level Inverter with Unequal DC Sources. Journal of Electrical Systems. 2007; 3(4): 259-271. [4]. Krishna S. Harmonic Elimination by Selection of Switching Angles and DC Voltages in Cascaded Multilevel Inverters. Fifteenth National Power Systems Conference (NPSC). IIT Bombay. 2008: 119-124. [5]. Lai JS, Peng FZ. Multilevel converters A new breed of power converters. IEEE Transactions on Industry Applications. 1996; 32(3): 509517. [6]. Park SJ, Kang FS, Cho SE, Moond CJ, Nam HK. A novel switching strategy for improving modularity and manufacturability of cascaded-transformer-based multilevel inverters. Electric Power Systems Research. 2005; 74: 409416 [7]. Rashid MH. Power Electronics Handbook. Canada: Academic Press. 2001. [8]. Suh BS, Sinha G, Manjrekar MD, Lipo TA. Multilevel Power Conversion-An Overview of Topologies and Modulation Strategies. IEEE-OPTIM Conference Record. Madison. 1998; 2: AD11-AD24.

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Tolbert LM, Chiasson JN, Du Z, McKenzie KJ. Elimination of Harmonics in a Multilevel Converter with Nonequal DC Sources. IEEE Transactions on Industry Applications. 2005; 41(1): 75-82. [10]. Laplante PA. Electrical Engineering Dictionary. Boca Raton. CRC Press. 2000.

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