I 8-BIT MICROPROCESSOR

STUDY OF 8-BIT MICROPROCESSOR KIT AND INTERFACING FACILITY DESCRIPTION: The 8085 is an eight bit general purpose microprocessor capable of addressing 64K of memory locations. The device has 40 pins, require +5 V single power supply and can operate with a 3MHZ single phase clock. The 8085 is an enhanced version of its predecessor 8080A. Instruction set of 8085 is upward compatible with that 0f 8080A, meaning that the 8085 instruction set includes all the instructions of 8080A along with some additional ones. Programs written for the 8080A will be executed by 8085A,but both of them are not pin compatible. All the signals can be classified into 6 groups. 1. Address bus 2. Data bus 3. Control and status signals 4. Power supply and frequency signals 5. Externally initiated signals 6. Serial I/O ports. ADDRESS BUS: The 8085 has eight signal lines A15-A8 which are unidirectional and used as the higher order address bus. MULTIPLEXED ADDRESS/DATA BUS: The signal lines AD7-AD0 are bidirectional. They serve a dual purpose. They are used as the lower order address bus as well as data bus. In executing an instruction, during the earlier part of the cycle,these lines are used as lower order address bus and during the later part of the cycle used as data bus. However, the lower order address bus can be separated from these signals by using a latch. However, the lower order address bus can be separated from these signals by using a latch. CONTROL AND STATUS SIGNALS: This group of signal include two control signals (RD and WR), three status signals(IO/M,S1 and S0) to identify the nature of the operation, and specific signal (ALF) to indicate the beginning of the operation. These signals are as follows. ALE:Address Latch Enable: This is a positive pulse generated every time the 8085 begins an operation. This signal is primarily used to latch the lower order address from the multiplexed bus and generates a separate set of eight address lines A7-A0. RD(Read): This is a read control signal (active low). This signal indicates that the selected I/O or memory device is to be read and data are available on the data bus.

WR(Write): This is a write control signal(active low). This signal indicates that the data on the data bus are to be written into a selected memory or I/O location. IO/M: This is a status signal used to differentiate between I/O and memory operation. When it is high, it indicates an I/O operation. When it is low,it indicates a memory location. This signal is combined with RD and WR to generate IOR and IOW. S1 & S0: These status signals similar to IO/M can identify various operations but they are rarely used in small operations. Power supply and check frequency: The power supply and frequency signals are as follows. Vcc =+5V Vss =+GND X1,X2: A crystal is connected at these two points, the frequency is internally divided by two to operate a system at 3 MHZ. The crystal should have a frequency of 6MHZ. CLK (out)-Clock output: This signal can be used as system clock for other devices. Externally initiated signal including interrupts: It has five interrupt signals that can be used to intiated a program execution. One of the signals, INTR (interrupt Request) identical to the 8085A interrupt signal INT. others are enhancements to the 8088A. Microprocessor acknowledges an interrupt request signals by INTA signal. In addition to the interrupt three pins RESET, HOLD and READY Accept the externally indicated signals as inputs. To respond to the HOLD request it has one signal called HLDA. RESET IN: When the signal on this pin goes low, the program counter is set to zero. Buses are tristated and the microprocessor is set. RESET OUT: This signal indicates that the microprocessor is being reset. The signal can be used to reset the other device. SERIAL I/O PORTS: It has two signals to implement the serial transmission SID(Serial Input Data) and SOD(Serial Output Data). HARWARE SPECIFICATIONS: 1.PROCESSOR: Intel 8085 A Clock frequency:6.144 MHZ clock.

2.MEMORY: Monitor EPROM : 0000-1FFF EPROM expansion : 2000-3FFF & C000-FFFF System RAM : 4000-5FFF Monitor Data Area : 4000-40FF User RAM area : 4100-5FFF RAM Expansion : 6000-BFFF Note : The Ram area from 4000-40FF should not be accessed by the user since it is used as scratch pad by monitor program. 3. INPUT/OUTPUT: Parallel: 48 TTL I/O lines using two numbers of 8255(only 24 I/O lines available in Micro-85 EBI) Serial: One member of RS232C compatible serial Interface using 8251A USART. Timer: Three channel 16 bit programmable Timer Using 8253. Channel 0 is used as baud rate clock generator for 8251 USART. Channel 1 is used for in single stepping user program Channel 2 is used for hardware single stepping user program 4. DISPLAY: 6 digit,0.3 7 segment RED LED display with first four digits for address display and two digits for data display. 5. KEYBOARD: 24 Keys soft keyboard includeing command keys and hexdecimal keys. 6. Audio Cassette Interface with file management: 7. Battery Backup: Onboard battery backup facility is provided for the available RAM. 8. Hardware Single Step: This facility allows the user to execute programs at machine cycle using a separate switch. 9. System Power Consumption: Micro -85 EB2 Micro -85 EB1 +5V @1 Amp +5V @500mA +12 @200mA -12V @100mA 10. Power Supply Specifications: Micro -85 Input: Output: EB2 Micro -85 EB1 230 V AC @50Hz 230V AC @ 50Hz +5V @1.5A +12V @150mA -12V @250mA(Unregulated) SOFTWARE SPACIFICATIONS: Micro -85 EB contains a high performance 8K bytes monitor program. It is designed to respond to user input, Rs232C serial communications,tape interface etc. The following interfacings of key functions. Out of the 21 key in the keyboard 16 are hexadecimals and the remaining are stand alone keys.

FLOW CHART:
START

[C]

00H

[HL]

4500H

[A]

[M]

[HL][HL]+1

[A][A]+[M]

NO
Is there a Carry ?YES

[C][C]+1

[HL][HL]+1

[M]

[A]

[HL][HL]+1

[M]

[C]

STOP

Ex.No: 1
AIM:

1(a). 8 BIT DATA ADDITION

To add two 8 bit numbers stored at consecutive memory locations. ALGORITHM: 1. 2. 3. 4. Initialize memory pointer to data location. Get the first number from memory in accumulator. Get the second number and add it to the accumulator. Store the answer at another memory location.

PROGRAM: ADDRESS OPCODE LABEL 4100 START 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 L1 MNEMONICS OPERAND MVI C, 00 LXI MOV INX ADD JNC H, 4500 A, M H M L1 COMMENT Clear C reg. Initialize HL reg. to 4500 Transfer first data to accumulator Increment HL reg. to point next memory Location. Add first number to acc. Content. Jump to location if result does not yield carry. Increment C reg. Increment HL reg. to point next memory Location. Transfer the result from acc. to memory. Increment HL reg. to point next memory Location. Move carry to memory Stop the program

INR INX MOV INX MOV HLT

C H M, A H M, C

OBSERVATION: INPUT 4500 4501 4502 4503 OUTPUT

RESULT: Thus the 8 bit numbers stored at 4500 &4501 are added and the result stored at 4502 & 4503.

FLOW CHART:
START

[C]

00H

[HL] 4500H

[A]

[M]

[HL][HL]+1

[A][A]-[M]

Is there a Borrow ?

NO

YES
Complement [A] Add 01H to [A]

[C][C]+1

[HL][HL]+1

[M]

[A]

[HL][HL]+1

[M]

[C]

STOP

1(b). 8 BIT DATA SUBTRACTION

AIM: To Subtract two 8 bit numbers stored at consecutive memory locations. ALGORITHM: 1. 2. 3. 4. Initialize memory pointer to data location. Get the first number from memory in accumulator. Get the second number and subtract from the accumulator. If the result yields a borrow, the content of the acc. is complemented and 01H is added to it (2s complement). A register is cleared and the content of that reg. is incremented in case there is a borrow. If there is no borrow the content of the acc. is directly taken as the result. 5. Store the answer at next memory location.

OBSERVATION: INPUT 4500 4501 4502 4503 OUTPUT

10

PROGRAM: ADDRESS OPCODE LABEL 4100 START 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 MNEMONICS OPERAND MVI C, 00 LXI MOV INX SUB JNC H, 4500 A, M H M L1 COMMENT Clear C reg. Initialize HL reg. to 4500 Transfer first data to accumulator Increment HL reg. to point next mem. Location. Subtract first number from acc. Content. Jump to location if result does not yield borrow. Increment C reg. Complement the Acc. content Add 01H to content of acc. Increment HL reg. to point next mem. Location. Transfer the result from acc. to memory. Increment HL reg. to point next mem. Location. Move carry to mem. Stop the program

INR CMA ADI L1 INX MOV INX MOV HLT

C 01H H M, A H M, C

RESULT: Thus the 8 bit numbers stored at 4500 &4501 are subtracted and the result stored at 4502 & 4503.

11

FLOW CHART:
START

[HL] 4500 B M

[HL] [HL]+1

A 00

C 00 [A] [A] +[M]

Is there any carry YES C C+1 B B-1

NO

NO

IS B=0 YES A

12

1(C). 8 BIT DATA MULTIPLICATION

AIM: To multiply two 8 bit numbers stored at consecutive memory locations and store the result in memory. ALGORITHM: LOGIC: Multiplication can be done by repeated addition. 1. 2. 3. 4. 5. 6. 7. 8. Initialize memory pointer to data location. Move multiplicand to a register. Move the multiplier to another register. Clear the accumulator. Add multiplicand to accumulator Decrement multiplier Repeat step 5 till multiplier comes to zero. The result, which is in the accumulator, is stored in a memory location.

13

[HL][HL]+1

[M]

[A]

[HL][HL]+1

[M]

[C]

STOP

OBSERVATION: INPUT 4500 4501 4502 4503 OUTPUT

14

PROGRAM: ADDRESS OPCODE LABEL 4100 START 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 RESULT: Thus the 8-bit multiplication was done in 8085 p using repeated addition method. L1 MNEMONICS LXI MOV INX MVI MVI ADD JNC OPERAND H, 4500 B, M H A, 00H C, 00H M NEXT COMMENT Initialize HL reg. to 4500 Transfer first data to reg. B Increment HL reg. to point next mem. Location. Clear the acc. Clear C reg for carry Add multiplicand multiplier times. Jump to NEXT if there is no carry Increment C reg Decrement B reg Jump to L1 if B is not zero. Increment HL reg. to point next mem. Location. Transfer the result from acc. to memory. Increment HL reg. to point next mem. Location. Transfer the result from C reg. to memory. Stop the program

NEXT

INR DCR JNZ INX MOV INX MOV HLT

C B L1 H M, A H M, C

15

FLOWCHART:
START

B 00 [HL] 4500 A M

[HL] [HL]+1 M A-M

[B] [B] +1 IS A<0 YES A A+ M NO

B B-1

[HL][HL]+1

[M]

[A]

[HL][HL]+1

[M]

[B]

STOP

16

1(d). 8 BIT DIVISION

AIM: To divide two 8-bit numbers and store the result in memory. ALGORITHM: LOGIC: Division is done using the method Repeated subtraction. 1. Load Divisor and Dividend 2. Subtract divisor from dividend 3. Count the number of times of subtraction which equals the quotient 4. Stop subtraction when the dividend is less than the divisor .The dividend now becomes the remainder. Otherwise go to step 2. 5. stop the program execution. PROGRAM: ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 LOOP OPCODE LABEL MNEMO NICS MVI LXI MOV INX SUB INR JNC ADD DCR INX MOV INX MOV HLT OPERA ND B,00 H,4500 A,M H M B LOOP M B H M,A H M,B COMMENTS Clear B reg for quotient Initialize HL reg. to 4500H Transfer dividend to acc. Increment HL reg. to point next mem. Location. Subtract divisor from dividend Increment B reg Jump to LOOP if result does not yield borrow Add divisor to acc. Decrement B reg Increment HL reg. to point next mem. Location. Transfer the remainder from acc. to memory. Increment HL reg. to point next mem. Location. Transfer the quotient from B reg. to memory. Stop the program 17

OBSERVATION: S.NO 1 2 ADDRESS 4500 4501 4500 4501 INPUT DATA OUTPUT DATA

ADDRESS 4502 4503 4502 4503

18

RESULT: Thus an ALP was written for 8-bit division using repeated subtraction method and executed using 8085 p kits

19

FLOWCHART:

START [B] 04H [HL] [8100H] [C] 04H [A] [HL] [HL [HL] + 1

YES

IS [A] < [HL]? NO [D] [HL]

[HL] [A]

[HL] [HL] - 1 [HL] [D] [HL] [HL] + 1 [C] [C] 01 H A

20

2(a).ASCENDING ORDER
AIM: To sort the given number in the ascending order using 8085 microprocessor. ALGORITHM: 1. Get the numbers to be sorted from the memory locations. 2. Compare the first two numbers and if the first number is larger than second then I interchange the number. 3. If the first number is smaller, go to step 4 4. Repeat steps 2 and 3 until the numbers are in required order

21

IS [C] = 0? YES [B] [B]-1

NO

IS [B] = 0? YES STOP

NO

OBSERVATION: INPUT MEMORY LOCATION 8100 8101 8102 8103 8104 DATA MEMORY LOCATION 8100 8101 8102 8103 8104 OUTPUT DATA

22

PROGRAM: ADDR E SS 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A RESULT: Thus the ascending order program is executed and thus the numbers are arranged in ascending order. OPCO DE LABEL MNEM ONICS MVI LOOP 3 LXI MVI LOOP2 MOV INX CMP JC MOV MOV DCX MOV INX DCR JNZ DCR JNZ HLT OPER AND B,04 H,8100 C,04 A,M H M LOOP1 D,M M,A H M,D H C LOOP2 B LOOP3 COMMENTS Initialize B reg with number of comparisons (n-1) Initialize HL reg. to 8100H Initialize C reg with no. of comparisons(n-1) Transfer first data to acc. Increment HL reg. to point next memory location Compare M & A If A is less than M then go to loop1 Transfer data from M to D reg Transfer data from acc to M Decrement HL pair Transfer data from D to M Increment HL pair Decrement C reg If C is not zero go to loop2 Decrement B reg If B is not Zero go to loop3 Stop the program

LOOP1

23

FLOWCHART:

START [B] 04H [HL] [8100H] [C] 04H [A] [HL] [HL [HL] + 1

NO

IS [A] < [HL]? YES [D] [HL]

[HL] [A]

[HL] [HL] - 1 [HL] [D] [HL] [HL] + 1 [C] [C] 01 H A

24

2(b). DESCENDING ORDER

AIM: To sort the given number in the descending order using 8085 microprocessor. ALGORITHM: 1. Get the numbers to be sorted from the memory locations. 2. Compare the first two numbers and if the first number is smaller than second then I interchange the number. 3. If the first number is larger, go to step 4 4. Repeat steps 2 and 3 until the numbers are in required order

25

IS [C] = 0? YES [B] [B]-1

NO

IS [B] = 0? YES STOP

NO

OBSERVATION: INPUT MEMORY LOCATION 8100 8101 8102 8103 8104 DATA MEMORY LOCATION 8100 8101 8102 8103 8104 OUTPUT DATA

26

PROGRAM: ADDRE SS 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A RESULT: Thus the descending order program is executed and thus the numbers are arranged in descending order. OPCO DE LABEL MNEM ONICS MVI LXI MVI LOOP2 MOV INX CMP JNC MOV MOV DCX MOV INX DCR JNZ DCR JNZ HLT OPER AND B,04 H,8100 C,04 A,M H M LOOP1 D,M M,A H M,D H C LOOP2 B LOOP3 COMMENTS Initialize B reg with number of comparisons (n-1) Initialize HL reg. to 8100H Initialize C reg with no. of comparisons(n-1) Transfer first data to acc. Increment HL reg. to point next memory location Compare M & A If A is greater than M then go to loop1 Transfer data from M to D reg Transfer data from acc to M Decrement HL pair Transfer data from D to M Increment HL pair Decrement C reg If C is not zero go to loop2 Decrement B reg If B is not Zero go to loop3 Stop the program

LOOP 3

LOOP1

27

FLOW CHART: START

[HL] [8100H] [B] 04H [A] [HL] [HL [HL] + 1

NO

IS [A] < [HL]? YES [A] [HL] [B] [B]-1

IS [B] = 0? YES [8105] [A] STOP

NO

28

Ex.No:2
AIM:

2(c ). LARGEST ELEMENT IN AN ARRAY

To find the largest element in an array.

ALGORITHM: 1. Place all the elements of an array in the consecutive memory locations. 2. Fetch the first element from the memory location and load it in the accumulator. 3. Initialize a counter (register) with the total number of elements in an array. 4. Decrement the counter by 1. 5. Increment the memory pointer to point to the next element. 6. Compare the accumulator content with the memory content (next element). 7. If the accumulator content is smaller, then move the memory content (largest element) to the accumulator. Else continue. 8. Decrement the counter by 1. 9. Repeat steps 5 to 8 until the counter reaches zero 10. Store the result (accumulator content) in the specified memory location.

29

PROGRAM: ADDRE SS 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 OBSERVATION: INPUT ADDRESS DATA 8100 8101 8102 8103 8104 OUTPUT ADDRESS DATA 8105 OPCO DE LABEL MNEM ONICS LXI MVI LOOP1 MOV INX CMP JNC MOV DCR JNZ STA HLT OPER AND H,8100 B,04 A,M H M LOOP A,M B LOOP1 8105 COMMENTS Initialize HL reg. to 8100H Initialize B reg with no. of comparisons(n-1) Transfer first data to acc. Increment HL reg. to point next memory location Compare M & A If A is greater than M then go to loop Transfer data from M to A reg Decrement B reg If B is not Zero go to loop1 Store the result in a memory location. Stop the program

LOOP

RESULT: Thus the largest number in the given array is found out.

30

2(d). SMALLEST ELEMENT IN AN ARRAY

AIM: To find the smallest element in an array. ALGORITHM: 1. Place all the elements of an array in the consecutive memory locations. 2. Fetch the first element from the memory location and load it in the accumulator. 3. Initialize a counter (register) with the total number of elements in an array. 4. Decrement the counter by 1. 5. Increment the memory pointer to point to the next element. 6. Compare the accumulator content with the memory content (next element). 7. If the accumulator content is smaller, then move the memory content (largest element) to the accumulator. Else continue. 8. Decrement the counter by 1. 9. Repeat steps 5 to 8 until the counter reaches zero 10. Store the result (accumulator content) in the specified memory location.

31

FLOW CHART: START

[HL] [8100H] [B] 04H [A] [HL] [HL [HL] + 1

YES

IS [A] < [HL]? NO [A] [HL] [B] [B]-1

IS [B] = 0? YES [8105] [A] STOP

NO

32

PROGRAM: ADDRE SS 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 OBSERVATION: INPUT ADDRESS DATA 8100 8101 8102 8103 8104 RESULT: Thus the smallest number in the given array is found out. OUTPUT ADDRESS DATA 8105 OPCO DE LABEL MNEM ONICS LXI MVI LOOP1 MOV INX CMP JC MOV DCR JNZ STA HLT OPER AND H,8100 B,04 A,M H M LOOP A,M B LOOP1 8105 COMMENTS Initialize HL reg. to 8100H Initialize B reg with no. of comparisons(n-1) Transfer first data to acc. Increment HL reg. to point next memory location Compare M & A If A is lesser than M then go to loop Transfer data from M to A reg Decrement B reg If B is not Zero go to loop1 Store the result in a memory location. Stop the program

LOOP

33

34

2(e). CODE CONVERSION ASCII TO HEXADECIMAL

AIM: To convert a given ASCII number to hexadecimal. ALGORITHM: 1. Load the given data in A register. 2. Subtract 30H from A register. 3. Compare the content of A register with 0AH. 4. If A<0AH, jump to step6. Else proceed to next step. 5. Subtract 07H from A register. 6. Store the result. 7. Terminate the program PROGRAM: ADDRE SS 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 OPCO DE LABEL MNEM ONICS LDA MOV LXI LXI back MOV SUI STAX DCR JZ INX INX JMP HLT A,M 30 D C L1 A D L2 OPER AND 4200 C,A H,4201 D,4301 COMMENTS

35

OBSERVATION: INPUT ADDRESS DATA OUTPUT ADDRESS DATA

36

RESULT: Thus an ALP program for conversion of ASCII to hexadecimal was written and executed.

37

38

2(f). CODE CONVERSION HEXADECIMAL TO ASCII

AIM: To convert a given decimal number to hexadecimal. ALGORITHM: 1. 2. 3. 4. 5. 6. 7. 8. 9. Load the given data in A-register and move to B- register. Mask the upper nibble of the Hex decimal number in A register. Call subroutine to bet ASCII of the lower nibble. Store it in memory. Move B register to A register and mask the lower nibble position. Rotate the upper nibble to lower nibble position. Call subroutine to get ASCII of upper nibble. Store it in memory. Terminate the program.

39

OBSERVATION: INPUT ADDRESS DATA OUTPUT ADDRESS DATA

40

PROGRAM: ADDRESS LABEL MNEMON ICS LDA 4200H MOV B,A ANI 0F CALL SUB1 STA 4201 MOV A,B ANI F0 RLC RLC RLC RLC CALL SUB1 STA 4202 HLT CPI 0A JC SKIP ADI 07 ADI 30 RET OPCODE OPERAND COMMENT Get Hexa Data The content of A reg moved to B reg Mask Upper Nibble Get ASCII code for upper nibble Mask lower nibble

Get ASCII code for lower nibble

SUB1 SKIP

RESULT: Thus an ALP program for conversion of hexadecimal to ASCII was written and executed.

41

FLOWCHART:

START HL 4501H

B 08H

INPUT RRC

A1

Decimal adjust accumulator

NO

Is CARR Y? YES A B

8101

Stop

42

2(g). CODE CONVERSION HEXADECIMAL TO BINARY

AIM: To convert a given decimal number to hexadecimal. ALGORITHM: 1. 2. 3. 4. 5. 6. Initialize the memory location to the data pointer. Increment B register. Increment accumulator by 1 and adjust it to decimal every time. Compare the given decimal number with accumulator value. When both matches, the equivalent hexadecimal value is in B register. Store the resultant in memory location.

PROGRAM: ADDRE SS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 4117 4118 OPCO DE LABEL MNEM ONICS LXI MVI LDA LOOP RRC JC MVI JMP LOOP1 MVI INX DCR JNZ HLT LOOP1 M,00 LOOP1 M,01 H B LOOP Stop the program Transfer B reg to acc. Store the result in a memory location. If acc and given number are not equal, then go to LOOP OPER AND H,4150 B,08 4000 COMMENTS Initialize HL reg. to 4150H Initialize B register with 08H. Load the input data in the address 4000 Rotate the content of acc. Right without carry

43

OBSERVATION: INPUT ADDRESS DATA OUTPUT ADDRESS DATA 4150 4151 4152 4153 4154 4155 4156 4157

4000

44

RESULT: Thus an ALP program for conversion of hexadecimal to binary was written and executed.

45

FLOWCHART:
HL

START 8100H

A 00

B C B

00H 00H B+1

A +1

Decimal adjust accumulator

Is there carry?

C C+1 D A, A B,

Is A=M?

NO 8101 8102 A, A C YES A

Stop

46

2(h). CODE CONVERSION HEXADECIMAL TO DECIMAL (BCD)

AIM: To convert a given hexadecimal number to decimal. ALGORITHM: 1. 2. 3. 4. 5. 6. Initialize the memory location to the data pointer. Increment B register. Increment accumulator by 1 and adjust it to decimal every time. Compare the given hexadecimal number with B register value. When both match, the equivalent decimal value is in A register. Store the resultant in memory location.

47

OBSERVATION: INPUT ADDRESS 8100

DATA

OUTPUT ADDRESS 8101 8102

DATA

48

PROGRAM: ADDRE SS 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A 801B 801C 801D 801E 801F OPCO DE LABEL MNEM ONICS LXI MVI MVI MVI LOOP INR ADI DAA JNC INR MOV MOV CMP MOV JNZ STA MOV STA HLT OPER AND H,8100 A,00 B,00 C,00 B 01 NEXT C D,A A,B M A,D LOOP 8101 A,C 8102 COMMENTS Initialize HL reg. to 8100H Initialize A register. Initialize B register. Initialize C register for carry. Increment B reg. Increment A reg Decimal Adjust Accumulator If there is no carry go to NEXT. Increment c register. Transfer A to D Transfer B to A Compare M & A Transfer D to A If acc and given number are not equal, then go to LOOP Store the result in a memory location. Transfer C to A Store the carry in another memory location. Stop the program

NEXT

RESULT: Thus an ALP program for conversion of hexadecimal to decimal was written and executed.

49

INTERFACING

50

EX.No:3
AIM:

INTERFACING A/D CONVERTER WITH 8085

To write an assembly language program to convert an analog signal into a digital signal using an ADC interfacing. APPARATUS REQUIRED: SL.NO 1 2 3 ITEM Microprocessor kit Power supply ADC Interface board SPECIFICATION 8085,Vi Microsystems +5 V dc Vi Microsystems QUANTITY 1 1 1

PROBLEM STATEMENT: To program starts from memory location 4100H. The program is executed for various values of analog voltage which are set with the help of a potentiometer. The LED display is verified with the digital value that is stored in the memory location 4150H. THEORY: An ADC usually has two additional control lines: the SOC input to tell the ADC when to start the conversion and the EOC output to announce when the conversion is complete. The following program initiates the conversion process, checks the EOC pin of ADC 0809 as to whether the conversion is over and then inputs the data to the processor. It also instructs the processor to store the converted digital data at RAM 4200H. ALGORITHM: 1. 2. 3. 4. 5. 6. Select the channel and latch the address. Send the start conversion pulse. Read EOC signal. If EOC =1 continue else go to step (3) Read the digital output. Store it in a memory location.

51

OBSERVATION ANALOG VOLTAGE DIGITAL DATA LED DISPLAY ON HEX CODE LOCATION 4150 IN

52

PROGRAM: ADDRESS LABEL MNEMON ICS MVI A, 10 OUT 0C8H MVI A, 18 OUT 0C8H MVI A, 01 OUT 0D0H XRA A XRA A XRA A MVI A, 00 OUT D0 LOOP IN D8 ANI 01 CPI 01 53 01 01 CHECK FOR EOC A A A SOC SIGNAL HIGH DELAY D0 SOC SIGNAL HIGH C8 A, 18 MAKE ALE HIGH C8 OPCODE OPERAND COMMENT
SELECT CHANNEL 0 AND MAKE ALE LOW

JNZ LOOP IN C0 STA 4150 HLT READ DATA FROM ADC

RESULT: Thus the ADC was interfaced with 8085 and the given Analog inputs were converted into its digital equivalent.

EX.No:4
AIM:

INTERFACING D/A CONVERTER WITH 8085

To interface DAC with 8085 to demonstrate the generation of square, saw tooth and triangular wave. APPARATUS REQUIRED: SL.NO 1 2 3 THEORY: SOFTWARE EXAMPLES After going through the software examples you can learn how to control the DAC using 8085 and generate sine wave, saw tooth wave etc by means of software. EXAMPLE 1: MEASUREMENT OF ANALOG VOLTAGE AIM : To obtain an output of 0 Volts at DAC1. Since DAC 0800 is an 8-bit DAC and the output voltage variation is between -5V and +5V. The output voltage VARIES IN STEPS OF 10/256 = 0.04(APPROX). The digital data input and the corresponding output voltages are presented in the following able. ITEM Microprocessor kit Power supply DAC Interface board SPECIFICATION 8085,Vi Microsystems +5 V dc Vi Microsystems QUANTITY 1 1 1

54

Input Data in Hex 00 01 02 . . . 7F . . . FD FE FF

Output Voltage -5.00 -4.96 -4092

0.00

4.92 4.96 5.00 Execute the following program and observe that the output voltage at DAC1 is 0 Volts.

PROGRAM: ADDRESS LABEL MNEMON ICS MVI A,7F A, 7F OUT C0 HLT OBSERVATION: DIGITAL DATA 00 7F FE FF ANALOG VOLTAGE OPCODE OPERAND COMMENT

ALGORITHM: (a) SQUARE WAVE GENERATION: 1. Load the initial value (00) to Accumulator and move it to DAC. 2. Call the delay program 3. Load the final value (FF) to accumulator and move it to DAC. 4. Call the delay program. 5. Repeat steps 2 to 5. PROGRAM: The basic idea behind the generation of waveforms is the continuous generation of Analog output of DAC.

55

With 00(HEX) as input to DAC2, the analog output is -5V. Similarly, with FF (Hex) as input, the output is +5V. Outputting digital data 00 and FF at regular intervals, to DAC2, results in a square wave of amplitude I5 Volts. ADDRESS LABEL START MNEMON ICS MVI A,00 OUT C8 CALL DELAY MVI A,FF OUT C8 CALL DELAY JMP START MVI B, 05 MVI C, FF DCR C JNZ L2 DCR B JNZ L1 RET OPCODE OPERAND COMMENT

DELAY L1 L2

Execute the program and using a CRO, verify that the waveform at the DAC2 output is a square-wave. Modify the frequency of the square-wave, by varying the time delay. (b) SAW TOOTH GENERATION 1. Load the initial value (00) to Accumulator 2. Move the accumulator content to DAC. 3. Increment the accumulator content by 1. 4. Repeat steps 3 and 4. Output digital data from 00 to FF constant steps of 01 to DAC1 repeat this sequence again and again. As a result a saw tooth wave will be generated at DAC1 output. PROGRAM: ADDRESS LABEL START L1 MNEMON ICS MVI A,00 OUT C0 INR A JNZ L1 JMP START OPCODE OPERAND COMMENT

(c) TRIANGULAR WAVE GENERATION 1. Load the initial value (00) to Accumulator. 2. Move the accumulator content to DAC 3. Increment the accumulator content by 1. 4. If accumulator content is zero proceed to next step. Else go to step 3.

56

5. Load value (FF) to accumulator. 6. Move the accumulator content to DAC. 7. Decrement the accumulator content by 1. 8. If accumulator content is zero go to step 2. Else go to step 2. The following program will generate a triangular wave at DAC2 output. The program is self explanatory. ADDRESS LABEL START L1 MNEMON ICS MVI L,00 MOV A,L OUT C8 INR L JNZ L1 MVI L,FF MOV A,L OUT C8 DCR L JNZ L2 JMP START OPCODE OPERAND COMMENT

L2

OBSERVATION: WAVE FORMS Square waveform Saw tooth waveform Triangular waveform AMPLITUDE TIME PERIOD

57

Result: Thus the square, triangular and saw tooth wave form were generated by interfacing DAC with 8085 trainer kit.

EX.No:5
AIM

INTERFACING: TRAFFIC LIGHT CONTROLLER WITH 8085

To write an assembly language program to simulate the traffic light at an intersection using a traffic light interface. APPARATUS REQUIRED: SL.NO 1 2 3 ITEM Microprocessor kit Power supply Traffic light interface kit SPECIFICATION 8085,Vi Microsystems +5 V dc Vi Microsystems QUANTITY 1 1 1

PROBLEM STATEMENT: The program stats from memory location 4100. The input data should be available from 5000 to 501A. The output is displayed in traffic interface kit. ALGORITHM: 1. Initialize the ports. 2. Initialize the memory content, with some address to the data. 3. Read data for each sequence from the memory and display it through the ports. 4. After completing all the sequences, repeat from step2. A SAMPLE SEQUENCE: 1. (a) Vehicles from south can go to straight or left. (b) Vehicles from west can cross the road. 58

(c) Each pedestrian can cross the road. (d) Vehicles from east no movement. (e) Vehicles from north, can go only straight. 2. All ambers are ON, indicating the change of sequence. 3. (a) Vehicles from east can go straight and left. (b) Vehicles from south, can go only left. (c) North pedestrian can cross the road. (d) Vehicles from north, no movement. (e) Vehicles from west, can go only straight. 4. All ambers are ON, indicating the change of sequence. 5. (a) Vehicles from north can go straight and left. (b) Vehicles from east, can go only left. (c) West pedestrian can cross the road. (d) Vehicles from west, no movement. (e) Vehicles from south, can go only straight. 6. All ambers are ON, indicating the change of sequence. 7. (a) Vehicles from west can go straight and left. (b) Vehicles from north, can go only left. (c) South pedestrian can cross the road. (d) Vehicles from south, no movement. (e) Vehicles from east, can go only straight. 8. All ambers are ON, indicating the change of sequence. 9. (a) All vehicles from all directions no movement. (b) All pedestrian can cross the road. BIT ALLOCATION: BIT PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 LED SOUTH LEFT SOUTH RIGHT SOUTH AMBER SOUTH RED EAST LEFT EAST RIGHT EAST AMBER EAST RED BIT PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 LED NORTH LEFT NORTH RIGHT NORTH AMBER NORTH RED WEST LEFT WEST RIGHT WEST AMBER WEST RED BIT PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 LED WEST STRAIGHT NORTH STRAIGHT EAST STRAIGHT SOUTH STRAIGHT NORTH PD WEST PD SOUTH PD EAST PD

59

CONTROL ----- 0F ( FOR 8255 PPI ) PORT A ----- 0C PORT B ----- 0D PORT C ----- 0E

PROGRAM : ADDRESS 4100 LABEL MNEMON ICS MVI A, 80 A,80 4102 4104 A,80 OUT CONTRL LXI H,DATA_SQ D3 0F To store the sequence of the TLC 11 CD EB 7E D3 CD EB 13 23 CD EB 41,87 42,41 0C 66,41 OPCODE 3E OPERAND 80 COMMENT To control PORT A & PORT B & PORT C

4107 410A 410D 410E 410F 4111 4114 4115 4116 4117 411A

LXI D,DATA_E CALL OUT XCHG MOV A,M OUT PORT A CALL DELAY1 XCHG INX D INX H CALL OUT XCHG

42,41

60

411B 411C 411E 4121 4122 4123 4124 4127 4128 4129 412B 412E 412F 4130 4131 4134 4135 4136 4138 4139 413A 413C 413F 4142 4143 4145 4146 4147 4149 414A 414B 414D 4150 4151 4152 4155 4158 4159 415A 415B 415E 415F 4160 4161

MOV A,M OUT PORT B CALL DELAY1 XCHG INX D INX H CALL OUT XCHG MOV A,M OUT PORT C CALL DELAY1 XCHG INX D INX H CALL OUT XCHG MOV A,M OUT PORT C INX H MOV A,M OUT PORT A CALL DELAY1 JMP REPEAT MOV A,M OUT PORT C INX H MOV A,M OUT PORT B INX H MOV A,M OUT PORT A CALL DELAY RET PUSH H LXI H,001F LXI B,FFFF DCX B MOV A,B ORA C JNZ LOOP DCX H MOV A,L ORA H JNZ L1

7E D3 CD EB 13 23 CD EB 7E D3 CD EB 13 23 CD EB 7E D3 23 7E D3 CD C3 7E D3 23 7E D3 23 7E D3 CD C9 E5 21 01 0B 78 B1 C2 2B 7D B4 C2

0D 66,41

42,41 0E 66,41

42,41 0E 0C 66,41 04,41 0E 0D 0C 51,41 1F,00 FF,FF

58,41

55,41

61

4164 4165 4166 4167 416A 416D 416E 416F 4170 4173 4174 4175 4176 4179 417A 417B 4180 4185 4187 12 27 44 10 2B 92 10 9D 84 48 2E 84 48 4B 20 49 04

POP H RET PUSH H LXI H,001F LXI B,FFFF DCX B MOV A,B ORA C JNZ LOOP2 DCX H MOV A,L ORA H JNZ L2 POP H RET

E1 C9 E5 21 01 0B 78 B1 C2 2B 7D B4 C2 E1 C9

1F,00 FF,FF

6D,41

6A,41

EX.No:6
AIM:

INTERFACING STEPPER MOTOR WITH 8085

To interface a stepper motor with 8085 microprocessor and operate it. THEORY: A motor in which the rotor is able to assume only discrete stationary angular position is a stepper motor. The rotary motion occurs in a step-wise manner from one equilibrium position to the next. Stepper Motors are used very wisely in position control systems like printers, disk drives, process control machine tools, etc. The basic two-phase stepper motor consists of two pairs of stator poles. Each of the four poles has its own winding. The excitation of any one winding generates a North Pole. A South Pole gets induced at the diametrically opposite side. The rotor magnetic system has two end faces. It is a permanent magnet with one face as South Pole and the other as North Pole. The Stepper Motor windings A1, A2, B1, B2 are cyclically excited with a DC current to run the motor in clockwise direction. By reversing the phase sequence as A1, B2, A2, B1, anticlockwise stepping can be obtained. 2-PHASE SWITCHING SCHEME: In this scheme, any two adjacent stator windings are energized. The switching scheme is shown in the table given below. This scheme produces more torque.

62

ANTICLOCKWISE STEP A1 A2 B1

B2

DATA

CLOCKWISE STEP A1 A2

B1

B2

DATA

1 2 3 4

1 0 0 1

0 1 1 0

0 0 1 1

1 1 0 0

9h 5h 6h Ah

1 2 3 4

1 0 0 1

0 1 1 0

1 1 0 0

0 0 1 1

Ah 6h 5h 9h

ADDRESS DECODING LOGIC: The 74138 chip is used for generating the address decoding logic to generate the device select pulses, CS1 & CS2 for selecting the IC 74175.The 74175 latches the data bus to the stepper motor driving circuitry. Stepper Motor requires logic signals of relatively high power. Therefore, the interface circuitry that generates the driving pulses use silicon darlington pair transistors. The inputs for the interface circuit are TTL pulses generated under software control using the Microcontroller Kit. The TTL levels of pulse sequence from the data bus is translated to high voltage output pulses using a buffer 7407 with open collector. PROCEDURE: Enter the above program starting from location 4100.and execute the same. The stepper motor rotates. Varying the count at R4 and R5 can vary the speed. Entering the data in the look-up TABLE in the reverse order can vary direction of rotation.

63

PROGRAM: ADDRESS 4100 4103 4105 4106 4108 410B 410C 410D 410E 410F 4112 4113 4114 4117 411A LABEL START: REPT: DELAY MNEMON ICS LXI H,LOOK UP MVI B,04 MOV A,M OUT 0C0H LXI D,0303H NOP DCX D MOV A,E ORA D JNZ DELAY INX H DCR B JNZ REPT JMP START DB 09 05 06 0A OPCODE OPERAND COMMENT

LOOK UP:

RESULT: Thus a stepper motor was interfaced with 8085 microprocessor and run in forward and reverse directions at various speeds.

EX.No:7
AIM:

7(a) INTERFACING 8251 WITH 8085

To write a program to initiate 8251 and to check the transmission and reception of character. THEORY: 64

The 8251 is used as a peripheral device for serial communication and is programmed by the CPU to operate using virtually any serial data transmission technique. The USART accepts data characters from the CPU in parallel format and the converts them in a continuous serial data stream of transmission. Simultaneously, it can receive serial data streams and convert them into parallel data characters for the CPU. The CPU can read the status of USART at any time. These include data transmissions errors and control signals. Prior to starting data transmission or reception ,the 8251 must be loaded with a set of control words generated by the CPU.These control signals define the complete functional definition of the 8251 and must immediately follow a RESET operation. Control words should be written in to the control register of 8251. words should be written in to the control register of 8251.words should be written in to the control register of 8251.Thesecontrol words are split into two formats. 1. MODE INSTRUCTION WORD 2. COMMAND INSTRUCTION WORD. 1. MODE INSTRUCTION WORD This format defines the BAUD rate, character length, parity and stop bits required to work with asynchronous data communication. by selecting the appropriate BAUD factor synchronous mode, the 8251 can be operated in synchronous mode. Initializing 8251 using the Mode instructions to the following conditions. 8 bit data No parity Baud rate factor(16X) 1 stop bit Gives a mode command word of 01001110=4E(X) ALGORITHM 1. Initialize timer (8253) IC 2. Move the Mode command word (4EH) to A reg. 3. Output it port address C2 4. Move the command instruction word (37H) to A reg. 5. Output it to port address C2 6. Move the data to be transfer to A reg. 7. Output it to port address C0. 8. Reset the system 9. Get the data through input port address C0. 10. Store the value in memory 11. Reset the system PROGRAM:

65

ADDRESS

LABEL

MNEMON ICS MVI A,36H OUT CEH MVI A,OAH OUT C8H MVI A,00 OUT C8H LXI H,4200 MVI A,4E OUT C2 MVI A,37 OUT C2 MVI A,41 OUT C0 RST1 IN C0 STA 4500 RST1

OPCODE OPERAND

COMMENT

OBSERVATION: Memory location Input Data Output Data

RESULT: Thus the program to initiate 8251 was written and the transmission and reception of character was checked by interfacing 8251 with 8085.

7(B) INTERFACING 8279 WITH 8085

AIM: To interface 8279 Programmable Keyboard Display Controller to 8085 Microprocessor. APPARATUS REQUIRED:

66

1 8085 Microprocessor toolkit. 2. 8279 Interface board 3. VXT parallel bus. 4. Regulated D.C. power supply. PROGRAM: ADDRESS LABEL START MNEMON ICS LXI H, 4130H H, 4130H MVI D, D, 0FH MVI A, 10H OUT C2H Set Mode Display and OPCO DE OPERAND COMMENT

0FH

Initialize counter

C2H MVI

A,

CCH

clear display

A, 90H OUT C2H MVI A, 90H Write Display

A, 90H OUT C2H C2H MOV A, M OUT C0H 67 C0H

LOOP

CALL DELAY DELAY INX H DCR D D JNZ LOOP JMP START

DELAY LOOP1 LOOP2

START MVI B, A0H MVI C, FFH DCR C JNZ LOOP 1 DCR B JNZ LOOP 2 RET

Pointer equal to 4130 .FF repeated eight times 4130 4131 4132 4133 4134 4135 4136 4137 4138 4139 413A 413B 413C 413D FF FF FF FF FF FF FF FF 98 68 7C C8 1C 29

68

413E 413F

FF FF

RESULT Thus 8279 controller was interfaced with 8085 and program for rolling display was executed successfully.

7(c) INTERFACING 8253 TIMER WITH 8085 Interfacing 8253 Programmable Interval Timer with 8085 p
AIM: To interface 8253 Interface board to 8085 p and verify the operation of 8253in six different modes. APPARATUS REQUIRED: 8085 p kit, 8253 Interface board, DC regulated power supply, VXT parallel bus, CRO. Mode 0 Interrupt on terminal count: The output will be initially low after mode set operations. After loading the counter, the output will be remaining low while counting and on terminal count; the output will become high, until reloaded again. Let us set the channel 0 in mode 0. Connect the CLK 0 to the debounce circuit by changing the jumper J3 and then execute the following program. Program: Address Opcodes 4100 4102 4104 4106 4108 410A 410C Label Mnemonic Operands START: MVI A, 30 OUT CE MVI A, 05 OUT C8 MVI A, 00 OUT C8 HLT Comments Channel 0 in mode 0 Send Mode Control word LSB of count Write count to register MSB of count Write count to register

69

It is observed in CRO that the output of Channel 0 is initially LOW. After giving six clock pulses, the output goes HIGH. Mode 1 Programmable ONE-SHOT: After loading the counter, the output will remain low following the rising edge of the gate input. The output will go high on the terminal count. It is retriggerable; hence the output will remain low for the full count, after any rising edge of the gate input. Example: The following program initializes channel 0 of 8253 in Mode 1 and also initiates triggering of Gate 0. OUT 0 goes low, as clock pulse after triggering the goes back to high level after 5 clock pulses. Execute the program, give clock pulses through the debounce logic and verify using CRO. PROGRAM: Address Opcodes 4100 4102 4104 4106 4108 410A 410C 4100 Label Mnemonic Operands START: MVI A, 32 OUT CE MVI A, 05 OUT C8 MVI A, 00 OUT C8 OUT D0 HLT Comments Channel 0 in mode 1 Send Mode Control word LSB of count Write count to register MSB of count Write count to register Trigger Gate0

Mode 2 Rate Generator: It is a simple divide by N counter. The output will be low for one period of the input clock. The period from one output pulse to the next equals the number of input counts in the count register. If the count register is reloaded between output pulses the present period will not be affected but the subsequent period will reflect the new value. Example: Using Mode 2, Let us divide the clock present at Channel 1 by 10. Connect the CLK1 to PCLK. PROGRAM: Address 4100 4102 4104 4106 4108 410A 410C Opcodes 3E 74 D3 CE 3E 0A D3 CA 3E 00 D3 CA 76 Label Mnemonic Operands START: MVI A, 74 OUT CE MVI A, 0A OUT CA MVI A, 00 OUT CA HLT Comments Channel 1 in mode 2 Send Mode Control word LSB of count Write count to register MSB of count Write count to register

70

In CRO observe simultaneously the input clock to channel 1 and the output at Out1. Mode 3 Square wave generator: It is similar to Mode 2 except that the output will remain high until one half of count and go low for the other half for even number count. If the count is odd, the output will be high for (count + 1)/2 counts. This mode is used of generating Baud rate for 8251A (USART). Example: We utilize Mode 0 to generate a square wave of frequency 150 KHz at channel 0. PROGRAM: Address Opcodes Label Mnemonic Operands Comments 4100 3E 36 START: MVI A, 36 Channel 0 in mode 3 4102 D3 CE OUT CE Send Mode Control word 4104 3E 0A MVI A, 0A LSB of count 4106 D3 C8 OUT C8 Write count to register 4108 3E 00 MVI A, 00 MSB of count 410A D3 C8 OUT C8 Write count to register 410C 76 HLT Set the jumper, so that the clock 0 of 8253 is given a square wave of frequency 1.5 MHz. This program divides this PCLK by 10 and thus the output at channel 0 is 150 KHz. Vary the frequency by varying the count. Here the maximum count is FFFF H. So, the square wave will remain high for 7FFF H counts and remain low for 7FFF H counts. Thus with the input clock frequency of 1.5 MHz, which corresponds to a period of 0.067 microseconds, the resulting square wave has an ON time of 0.02184 microseconds and an OFF time of 0.02184 microseconds. To increase the time period of square wave, set the jumpers such that CLK2 of 8253 is connected to OUT 0. Using the above-mentioned program, output a square wave of frequency 150 KHz at channel 0. Now this is the clock to channel 2. Mode 4: Software Triggered Strobe: The output is high after mode is set and also during counting. On terminal count, the output will go low for one clock period and becomes high again. This mode can be used for interrupt generation. The following program initializes channel 2 of 8253 in mode 4. Example: Connect OUT 0 to CLK 2 (jumper J1). Execute the program and observe the output OUT 2. Counter 2 will generate a pulse after 1 second. PROGRAM: Address Opcodes 4100 Label Mnemonic Operands START: MVI A, 36 Comments Channel 0 in mode 0 71

4102 4104 4106 4108 410A 410C 410E 4110 4112 4114 4116 4118

OUT MVI OUT MVI OUT MVI OUT MVI OUT MVI OUT HLT

CE A, 0A C8 A, 00 C8 A, B8 CE A, 98 CC A, 3A CC

Send Mode Control word LSB of count Write count to register MSB of count Write count to register Channel 2 in Mode 4 Send Mode control Word LSB of Count Write Count to register MSB of Count Write Count to register

Mode 5 Hardware triggered strobe: Counter starts counting after rising edge of trigger input and output goes low for one clock period when terminal count is reached. The counter is retriggerable. Example: The program that follows initializes channel 0 in mode 5 and also triggers Gate 0. Connect CLK 0 to debounce circuit. Execute the program. After giving Six clock pulses, you can see using CRO, the initially HIGH output goes LOW. The output ( OUT 0 pin) goes high on the next clock pulse. PROGRAM: Address Opcodes 4100 4102 4104 4106 4108 410A 410C Label Mnemonic Operands START: MVI A, 1A OUT CE MVI A, 05 OUT C8 MVI A, 00 OUT D0 HLT Comments Channel 0 in mode 5 Send Mode Control word LSB of count Write count to register MSB of count Trigger Gate 0

72

Result: Thus the 8253 has been interfaced to 8085 p and six different modes of 8253 have been studied.

73

II 16 BIT MICROPROCESSOR Ex.No: 1

AIM: To add two 16- bit numbers stored at consecutive memory locations. ALGORITHM: 1. 2. 3. 4. Initialize memory pointer to data location. Get the first number from memory in accumulator. Get the second number and add it to the accumulator. Store the answer at another memory location.

8(a). 16 BIT DATA ADDITION

PROGRAM: ADDRESS OPCODE LABEL 4100 4101 4102 4103 4104 4105 4106 4107 MNEMONICS OPERAND MOV AX,[1100] ADD AX,[1102] COMMENT Move the content in Acc. Add AX with the content [1102]

MOV

[1200],AX

Move the Acc. Content

74

4108 4109 410A OBSERVATION: INPUT 1100 1102 RESULT: 1200

in to the location 1200 HLT Terminate

OUTPUT

Thus the 16 bit numbers stored at the memory locations 1100 & 1102 are added and the result stored at 1200

75

76

8(b). 16 BIT DATA SUBTRACTION

AIM: To subtract two 16- bit numbers stored at consecutive memory locations. ALGORITHM: 1. 2. 3. 4. Initialize memory pointer to data location. Get the first number from memory in accumulator. Get the second number and subtract it to the accumulator. Store the answer at another memory location.

PROGRAM: ADDRESS OPCODE LABEL 4100 4102 4102 4103 4104 4105 4106 4107 4108 4109 410A OBSERVATION: INPUT 1100 1102 RESULT: Thus the 16 bit numbers stored at the memory locations 1100 & 1102 are subtracted and the result stored at 1200 1200 OUTPUT MNEMONICS OPERAND MOV AX,[1100] SUB AX,[1102] COMMENT Move the content in Acc. Subtract AX with the content [1102]

MOV HLT

[1200],AX

Move the Acc. Content in to the location 1200 Terminate

77

78

8(b). 16 BIT DATA SUBTRACTION

AIM: To subtract two 16- bit numbers stored at consecutive memory locations. ALGORITHM: 5. 6. 7. 8. Initialize memory pointer to data location. Get the first number from memory in accumulator. Get the second number and subtract it to the accumulator. Store the answer at another memory location.

PROGRAM: ADDRESS OPCODE LABEL 4100 4103 4102 4103 4104 4105 4106 4107 4108 4109 410A OBSERVATION: INPUT 1100 1102 RESULT: Thus the 16 bit numbers stored at the memory locations 1100 & 1102 are subtracted and the result stored at 1200 1200 OUTPUT MNEMONICS OPERAND MOV AX,[1100] SUB AX,[1102] COMMENT Move the content in Acc. Subtract AX with the content [1102]

MOV HLT

[1200],AX

Move the Acc. Content in to the location 1200 Terminate

79

80

8(c). 16 BIT DATA MULTIPLICATION

AIM: To multiply two 16- bit numbers stored at consecutive memory locations. ALGORITHM: 1. Initialize memory pointer to data location. 2. Get the first number from memory in accumulator. 3. Get the second number and multiply it to the accumulator. 4. Store the answer at another memory location. PROGRAM: ADDRESS OPCODE LABEL 4100 4104 4102 4103 4104 4105 4106 4107 4108 4109 410A OBSERVATION: INPUT 1100 1102 RESULT: Thus the 16 bit numbers stored at the memory locations 1100 & 1102 are multiplied and the result stored at 1200 1200 OUTPUT MNEMONICS OPERAND MOV AX,[1100] MUL AX,[1102] COMMENT Move the content in Acc. Multiply AX with the content [1102]

MOV HLT

[1200],AX

Move the Acc. Content in to the location 1200 Terminate

81

82

8(c). 16 BIT DATA DIVISION

AIM: To divide two 16- bit numbers stored at consecutive memory locations. ALGORITHM: 1. Initialize memory pointer to data location. 2. Get the first number from memory in accumulator. 3. Get the second number and divide it to the accumulator. 4. Store the answer at another memory location. PROGRAM: ADDRESS OPCODE LABEL 4100 4105 4102 4103 4104 4105 4106 4107 4108 4109 410A OBSERVATION: INPUT 1100 1102 RESULT: Thus the 16 bit numbers stored at the memory locations 1100 & 1102 are divided and the result stored at 1200 1200 OUTPUT MNEMONICS OPERAND MOV AX,[1100] DIV AX,[1104] COMMENT Move the content in Acc. Divide AX with the content [1104]

MOV HLT

[1200],AX

Move the Acc. Content in to the location 1200 Terminate

83

84

III 8- BIT MICROCONTROLLER Ex.No:9

AIM: To find the sum of elements in an array. ALGORITHM: 1. 2. counter. 3. 4. 5. 6. 7. Clear the accumulator. Load the other register with the value of the memory pointer. Add the register with the accumulator. Check for carry, if exist, increment the carry register by 1. otherwise, continue Decrement the counter and if it reaches 0, stop. Otherwise increment the memory pointer by 1 and go to step 4. Load the array in the consecutive memory location and initialize the memory pointer with the starting address. Load the total number of elements in a separate register as a

9(a) 8051 - SUM OF ELEMENTS IN AN ARRAY

85

OBSERVATION: INPUT 4200 4201 4202 4203 OUTPUT 4500 4501

PROGRAM: 86

ADDRESS OPCODE LABEL 4100 4101 4102 4103 4104 4105 4106 LOOP2: 4107 4108 4109 410A LOOP

MNEMONICS MOV MOVX MOV MOV MOV INC CLR MOVX ADD MOV JNC INC INC DJNZ MOV MOV MOVX INC MOV INC DJNZ MOV MOV MOVX INC MOV MOVX HLT

OPERAND DPTR, #4200 A, @DPTR R0, A B, #00 R1, B DPTR C A, @DPTR A, B B, A LOOP R1 DPTR R0, LOOP2 DPTR, #4500 A, R1 @DPTR, A DPTR A, B DPTR R0, LOOP2 DPTR, #4500 A,R1 @DPTR, A DPTR A, B @DPTR, A

COMMENT

RESULT: The sum of elements in an array is calculated.

87

9(b)

88

89

Ex.No:10
AIM:

INTERFACING 8279 WITH 8051 MICROCONTROLLER

To interface 8279 Programmable Keyboard Display Controller to 8051 microcontroller APPARATUS REQUIRED: 1 8051 microcontroller toolkit.

90

2. 8279 Interface board 3. VXT parallel bus. 4. Regulated D.C. power supply. a f g c e d .dp Table below shows the correspondence between the data bus and output port bits of 8279. Also the segment relation with these are given Data bus D7 8279 o/p A3 Segment d D6 A2 c D5 A1 b D4 A0 a D3 B3 dp D2 B2 g D1 B1 f D0 B0 e

D0 bit of the byte sent to the display RAM corresponds to B0 and D7 of the byte sent to the display RAM corresponds A3. In order to light up a segment the corresponding bit of data written into the display RAM should be a 0. PROGRAM: ADDRE SS 4100 4103 4105 4107 4109 410A 410C 410D 410F 4110 4112 4114 4115 LABEL MNEMON ICS MOV DPTR,#FFCW MOV R0,#00 MOV R1,#44 MOV A1,#10 MOVX @DPTR,A MOV A,#CC MOVX @DPTR,A MOV A,#90 MOVX @DPTR,A MOV DPH,R1 MOV DPL,R0 MOVX @DPTR,A MOV DPTR,#FFC0 91 TO INITIALISE LOOK UP TABLE OPC ODE OPERAND COMMENT

4118 4119 411C 411D 4120 LOOK UP TABLE: 4400 4404 4408 440C 4500 4502 4504 4505 4507 4509 LOOP2: LOOP1:

MOVX @DPTR,A LCALL DELAY INC R0 CJNE R0,30F,LOOP START FF FF FF FF FF FF FF FF 98 68 7C C8 FF IC 29 FF MOV R4,#A0 MOV R5,#FF NOP DJNZ R5,LOOP1 DJNZ R4,LOOP2 RET

DELAY SUBROUTINE

RESULT Thus 8279 controller was interfaced with 8051 microcontroller and program for rolling display was executed successfully. Ex.No:11 11(a). STEPPER MOTOR INTERFACING WITH 8051 AIM: To interface a stepper motor with 8051 microcontroller and operate it. THEORY: A motor in which the rotor is able to assume only discrete stationary angular position is a stepper motor. The rotary motion occurs in a step-wise manner from one equilibrium position to the next. Stepper Motors are used very wisely in position control systems like printers, disk drives, process control machine tools, etc.

92

The basic two-phase stepper motor consists of two pairs of stator poles. Each of the four poles has its own winding. The excitation of any one winding generates a North Pole. A South Pole gets induced at the diametrically opposite side. The rotor magnetic system has two end faces. It is a permanent magnet with one face as South Pole and the other as North Pole. The Stepper Motor windings A1, A2, B1, B2 are cyclically excited with a DC current to run the motor in clockwise direction. By reversing the phase sequence as A1, B2, A2, B1, anticlockwise stepping can be obtained. 2-PHASE SWITCHING SCHEME: In this scheme, any two adjacent stator windings are energized. The switching scheme is shown in the table given below. This scheme produces more torque.
ANTICLOCKWISE STEP A1 A2 B1 CLOCKWISE STEP A1 A2

B2

DATA

B1

B2

DATA

1 2 3 4

1 0 0 1

0 1 1 0

0 0 1 1

1 1 0 0

9h 5h 6h Ah

1 2 3 4

1 0 0 1

0 1 1 0

1 1 0 0

0 0 1 1

Ah 6h 5h 9h

ADDRESS DECODING LOGIC: The 74138 chip is used for generating the address decoding logic to generate the device select pulses, CS1 & CS2 for selecting the IC 74175.The 74175 latches the data bus to the stepper motor driving circuitry. Stepper Motor requires logic signals of relatively high power. Therefore, the interface circuitry that generates the driving pulses use silicon darlington pair transistors. The inputs for the interface circuit are TTL pulses generated under software control using the Microcontroller Kit. The TTL levels of pulse sequence from the data bus is translated to high voltage output pulses using a buffer 7407 with open collector. PROCEDURE: Enter the above program starting from location 4100.and execute the same. The stepper motor rotates. Varying the count at R4 and R5 can vary the speed. Entering the data in the look-up TABLE in the reverse order can vary direction of rotation.

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PROGRAM : Address OPCODES Label MNEM ONICS ORG OPERAND 4100h DPTR, #TABLE Load the start address of switching scheme data TABLE into Data Pointer (DPTR) Load the count in R0 Load the number in TABLE into A Push DPTR value to Stack Load the Motor port address into DPTR Send the value in A to stepper Motor port address Delay loop to cause a specific amount of time delay before next data item is sent to the Motor POP back DPTR value from Stack Increment DPTR to point to next item in the table Decrement R0, if not zero repeat the loop Short jump to Start of the program to make the motor rotate continuously Values as per twophase switching scheme Comments

4100

START MOV

4103 4105 4106 4108 410A 410D 410E 4110 4112 4114 4116 4118 411A 411B 411D

LOOP:

MOV MOVX PUSH PUSH MOV MOVX MOV MOV DJNZ DJNZ POP POP INC DJNZ SJMP

R0, #04 A, @DPTR DPH DPL DPTR, #0FFC0h @DPTR, A R4, #0FFh R5, #0FFh R5, DELAY1 R4, DELAY DPL DPH DPTR R0, LOOP START

DELA Y: DELA Y1:

411F

TABLE DB :

09 05 06 0Ah

RESULT: Thus a stepper motor was interfaced with 8051 and run in forward and reverse directions at various speeds.

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11 (b) INTERFACING D/A CONVERTER WITH 8051

AIM: To interface DAC with 8051 to demonstrate the generation of square, saw tooth and triangular wave. APPARATUS REQUIRED: SL.NO 1 2 3 THEORY: SOFTWARE EXAMPLES After going through the software examples you can learn how to control the DAC using 8085 and generate sine wave, saw tooth wave etc by means of software. EXAMPLE 1: MEASUREMENT OF ANALOG VOLTAGE AIM : To obtain an output of 0 Volts at DAC1. Since DAC 0800 is an 8-bit DAC and the output voltage variation is between -5V and +5V. The output voltage VARIES IN STEPS OF 10/256 = 0.04(APPROX). The digital data input and the corresponding output voltages are presented in the following able. Input Data in Hex 00 01 02 . . . 7F . . . FD FE FF Output Voltage -5.00 -4.96 -4092 ITEM Microprocessor kit Power supply DAC Interface board SPECIFICATION 8085,Vi Microsystems +5 V dc Vi Microsystems QUANTITY 1 1 1

0.00

4.92 4.96 5.00 Execute the following program and observe that the output voltage at DAC1 is 0 Volts.

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PROGRAM: ADDRESS LABEL MNEMON ICS MOV A,#3F A, 7F MOV DPTR,#FFC0 MOV @DPTR,A SJMP HERE ANALOG VOLTAGE OPCODE OPERAND COMMENT

HERE OBSERVATION: DIGITAL DATA 00 7F FE FF

ALGORITHM: (a) SQUARE WAVE GENERATION: 1. Load the initial value (00) to Accumulator and move it to DAC. 2. Call the delay program 3. Load the final value (FF) to accumulator and move it to DAC. 4. Call the delay program. 5. Repeat steps 2 to 5. PROGRAM: The basic idea behind the generation of waveforms is the continuous generation of Analog output of DAC. With 00(HEX) as input to DAC2, the analog output is -5V. Similarly, with FF (Hex) as input, the output is +5V. Outputting digital data 00 and FF at regular intervals, to DAC2, results in a square wave of amplitude I5 Volts. ADDRESS LABEL START MNEMON ICS MOV DPTR,#FFC8 MOV A,#00 MOVX @DPTR,A LCALL DELAY MOV A,# FF MOVX @DPTR,A LCALL DELAY LJMP START MOV R1,#05 MOV R2,#FF DJNZ R2,HERE DJNZ R1,LOOP OPCODE OPERAND COMMENT

DELAY LOO[P

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RET SJMP START Execute the program and using a CRO, verify that the waveform at the DAC2 output is a square-wave. Modify the frequency of the square-wave, by varying the time delay. (b) SAW TOOTH GENERATION 1. Load the initial value (00) to Accumulator 2. Move the accumulator content to DAC. 3. Increment the accumulator content by 1. 4. Repeat steps 3 and 4. Output digital data from 00 to FF constant steps of 01 to DAC1 repeat this sequence again and again. As a result a saw tooth wave will be generated at DAC1 output. PROGRAM: ADDRESS LABEL LOOP MNEMON ICS MOV DPTR,#FFC0 MOV A,#00 MOVX @DPTR,A INC A SJMP LOOP OPCODE OPERAND COMMENT

(c) TRIANGULAR WAVE GENERATION 1. Load the initial value (00) to Accumulator. 2. Move the accumulator content to DAC 3. Increment the accumulator content by 1. 4. If accumulator content is zero proceed to next step. Else go to step 3. 5. Load value (FF) to accumulator. 6. Move the accumulator content to DAC. 7. Decrement the accumulator content by 1. 8. If accumulator content is zero go to step 2. Else go to step 2. The following program will generate a triangular wave at DAC2 output. The program is self explanatory. ADDRESS LABEL START LOOP1 MNEMON ICS MOV DPTR,#FFC8 MOV A,#00 MOVX @DPTR,A INC A JNZ LOOP1 MOV A,#FF MOVX @DPTR,A DEC A JNZ LOOP2 LJMP START OPCODE OPERAND COMMENT

LOOP2

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OBSERVATION: WAVE FORMS Square waveform Saw tooth waveform Triangular waveform AMPLITUDE TIME PERIOD

Result: Thus the square, triangular and saw tooth wave form were generated by interfacing DAC with 8051 trainer kit.

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11(c ) TRAFFIC LIGHT CONTROL USING 8051 MICROCONTROLLER

Aim: To write the ALP for 8051 controller to control the traffic light is an intersection using traffic light interface. Apparatus Required: 1. 8051 micro controller kit 2. Power supply 3. Traffic light interface kit Algorithm: 1. Interface the ports. 2. Initialise the memory location 4100,the input data should be available 3. Read data for each sequence from memory and display it through the ports 4. After completing all the sequence, repeat ste2.

PROGRAM: ADDRESS LABEL START REPEAT LXI H,DATA_SQ LXI D,DATA_E CALL OUT XCHG MOV A,M OUT PORTA CALL DELAY1 XCHG INX D INX H 99 MNEMON ICS MVI A,08H OUT CONTROL OPCODE OPERAND COMMENT

CALL OUT XCHG MOV A,M OUT PORTB CALL DELAY1 XCHG INX D INX H CALL OUT XCHG MOV A,M OUT PORTC CALL DELAY1 XCHG INX D INX H CALL OUT XCHG MOV A,M OUT PORTC INX H MOV A,M OUT PORTA CALL DELAY1 JMP REPEAT OUT MOV A,M OUT PORTC INX H MOV A,M OUT PORTB INX H MOV A,M OUT PORTA CALL DELAY RET DELAY PUSH H LXI H,001FH L1 LXI B,FFFFH LOOP DCX B MOV A,B ORA C 100

JNZ LOOP DCX H MOV A,L ORA H JNZ L1 POP H RET DELAY PUSH H LXI H,001H L2 LXI B,FFFFH LOOP2 DCX B MOV A,B ORA C JNZ LOOP2 DCX H MOV A,L ORA H JNZ L2 POP H RET DATA_SQ DB DATA_E DB END

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Result: Thus an ALP for 8051 micro controller was written to control the traffic light at an intersection using traffic light interface.

11(d) INTERFACING 8251 WITH 8051

AIM: To write a program to initiate 8251 and to check the transmission and reception of character using 8051 microcontroller. THEORY: The 8251 is used as a peripheral device for serial communication and is programmed by the CPU to operate using virtually any serial data transmission technique. The USART accepts data characters from the CPU in parallel format and the converts them in a continuous serial data stream of transmission. Simultaneously, it can receive serial data streams and convert them into parallel data characters for the CPU. The CPU can read the status of USART at any time. These include data transmissions errors and control signals. Prior to starting data transmission or reception ,the 8251 must be loaded with a set of control words generated by the CPU.These control signals define the complete functional definition of the 8251 and must immediately follow a RESET operation. Control words should be written in to the control register of 8251. words should be written in to the control register of 8251.words should be written in to the control register of 8251.Thesecontrol words are split into two formats. 1. MODE INSTRUCTION WORD 2. COMMAND INSTRUCTION WORD. 2. MODE INSTRUCTION WORD This format defines the BAUD rate, character length, parity and stop bits required to work with asynchronous data communication. by selecting the appropriate BAUD factor synchronous mode, the 8251 can be operated in synchronous mode. Initializing 8251 using the Mode instructions to the following conditions. 8 bit data No parity Baud rate factor(16X) 1 stop bit Gives a mode command word of 01001110=4E(X) ALGORITHM 1. Initialize timer (8253) IC 102

2. Move the Mode command word (4EH) to A reg. 3. Output it port address C2 4. Move the command instruction word (37H) to A reg. 5. Output it to port address C2 6. Move the data to be transfer to A reg. 7. Output it to port address C0. 8. Reset the system 9. Get the data through input port address C0. 10. Store the value in memory 11. Reset the system PROGRAM: ADDRESS 4100 4102 4105 4106 4108 410B 410C 410E 410F 4111 4114 4115 4117 4118 411A 411D 411E 411F 4122 4123 Observation: HERE LABEL MNEMON ICS MOV A,#36 DPTR,#FFCE @DPTR,A A,#12 DPTR,#FFC8 @DPTR,A A,#00 @DPTR,A A,#4E DPTR,#PFC2 @DPTR,A A,#37 @DPTR,A A,#41 DPTR,#FFCO @DPTR,A A, @DPTR DPTR,#4200 @DPTR,A SJMP HERE OPCODE OPERAND COMMENT

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Memory location

Input Data

Output Data

Result: Thus the transmission and reception of data were done by interfacing serial port
communication with 8051

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